Merge branch 'master' into upstream-fixes
[deliverable/linux.git] / drivers / net / phy / cicada.c
1 /*
2 * drivers/net/phy/cicada.c
3 *
4 * Driver for Cicada PHYs
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 */
16 #include <linux/config.h>
17 #include <linux/kernel.h>
18 #include <linux/sched.h>
19 #include <linux/string.h>
20 #include <linux/errno.h>
21 #include <linux/unistd.h>
22 #include <linux/slab.h>
23 #include <linux/interrupt.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
26 #include <linux/netdevice.h>
27 #include <linux/etherdevice.h>
28 #include <linux/skbuff.h>
29 #include <linux/spinlock.h>
30 #include <linux/mm.h>
31 #include <linux/module.h>
32 #include <linux/mii.h>
33 #include <linux/ethtool.h>
34 #include <linux/phy.h>
35
36 #include <asm/io.h>
37 #include <asm/irq.h>
38 #include <asm/uaccess.h>
39
40 /* Cicada Extended Control Register 1 */
41 #define MII_CIS8201_EXT_CON1 0x17
42 #define MII_CIS8201_EXTCON1_INIT 0x0000
43
44 /* Cicada Interrupt Mask Register */
45 #define MII_CIS8201_IMASK 0x19
46 #define MII_CIS8201_IMASK_IEN 0x8000
47 #define MII_CIS8201_IMASK_SPEED 0x4000
48 #define MII_CIS8201_IMASK_LINK 0x2000
49 #define MII_CIS8201_IMASK_DUPLEX 0x1000
50 #define MII_CIS8201_IMASK_MASK 0xf000
51
52 /* Cicada Interrupt Status Register */
53 #define MII_CIS8201_ISTAT 0x1a
54 #define MII_CIS8201_ISTAT_STATUS 0x8000
55 #define MII_CIS8201_ISTAT_SPEED 0x4000
56 #define MII_CIS8201_ISTAT_LINK 0x2000
57 #define MII_CIS8201_ISTAT_DUPLEX 0x1000
58
59 /* Cicada Auxiliary Control/Status Register */
60 #define MII_CIS8201_AUX_CONSTAT 0x1c
61 #define MII_CIS8201_AUXCONSTAT_INIT 0x0004
62 #define MII_CIS8201_AUXCONSTAT_DUPLEX 0x0020
63 #define MII_CIS8201_AUXCONSTAT_SPEED 0x0018
64 #define MII_CIS8201_AUXCONSTAT_GBIT 0x0010
65 #define MII_CIS8201_AUXCONSTAT_100 0x0008
66
67 MODULE_DESCRIPTION("Cicadia PHY driver");
68 MODULE_AUTHOR("Andy Fleming");
69 MODULE_LICENSE("GPL");
70
71 static int cis820x_config_init(struct phy_device *phydev)
72 {
73 int err;
74
75 err = phy_write(phydev, MII_CIS8201_AUX_CONSTAT,
76 MII_CIS8201_AUXCONSTAT_INIT);
77
78 if (err < 0)
79 return err;
80
81 err = phy_write(phydev, MII_CIS8201_EXT_CON1,
82 MII_CIS8201_EXTCON1_INIT);
83
84 return err;
85 }
86
87 static int cis820x_ack_interrupt(struct phy_device *phydev)
88 {
89 int err = phy_read(phydev, MII_CIS8201_ISTAT);
90
91 return (err < 0) ? err : 0;
92 }
93
94 static int cis820x_config_intr(struct phy_device *phydev)
95 {
96 int err;
97
98 if(phydev->interrupts == PHY_INTERRUPT_ENABLED)
99 err = phy_write(phydev, MII_CIS8201_IMASK,
100 MII_CIS8201_IMASK_MASK);
101 else
102 err = phy_write(phydev, MII_CIS8201_IMASK, 0);
103
104 return err;
105 }
106
107 /* Cicada 820x */
108 static struct phy_driver cis8204_driver = {
109 .phy_id = 0x000fc440,
110 .name = "Cicada Cis8204",
111 .phy_id_mask = 0x000fffc0,
112 .features = PHY_GBIT_FEATURES,
113 .flags = PHY_HAS_INTERRUPT,
114 .config_init = &cis820x_config_init,
115 .config_aneg = &genphy_config_aneg,
116 .read_status = &genphy_read_status,
117 .ack_interrupt = &cis820x_ack_interrupt,
118 .config_intr = &cis820x_config_intr,
119 .driver = { .owner = THIS_MODULE,},
120 };
121
122 static int __init cis8204_init(void)
123 {
124 return phy_driver_register(&cis8204_driver);
125 }
126
127 static void __exit cis8204_exit(void)
128 {
129 phy_driver_unregister(&cis8204_driver);
130 }
131
132 module_init(cis8204_init);
133 module_exit(cis8204_exit);
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