2 * drivers/net/phy/marvell.c
4 * Driver for Marvell PHYs
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/errno.h>
19 #include <linux/unistd.h>
20 #include <linux/slab.h>
21 #include <linux/interrupt.h>
22 #include <linux/init.h>
23 #include <linux/delay.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/skbuff.h>
27 #include <linux/spinlock.h>
29 #include <linux/module.h>
30 #include <linux/mii.h>
31 #include <linux/ethtool.h>
32 #include <linux/phy.h>
36 #include <asm/uaccess.h>
38 #define MII_M1011_IEVENT 0x13
39 #define MII_M1011_IEVENT_CLEAR 0x0000
41 #define MII_M1011_IMASK 0x12
42 #define MII_M1011_IMASK_INIT 0x6400
43 #define MII_M1011_IMASK_CLEAR 0x0000
45 #define MII_M1011_PHY_SCR 0x10
46 #define MII_M1011_PHY_SCR_AUTO_CROSS 0x0060
48 #define MII_M1145_PHY_EXT_CR 0x14
49 #define MII_M1145_RGMII_RX_DELAY 0x0080
50 #define MII_M1145_RGMII_TX_DELAY 0x0002
52 #define M1145_DEV_FLAGS_RESISTANCE 0x00000001
54 #define MII_M1111_PHY_LED_CONTROL 0x18
55 #define MII_M1111_PHY_LED_DIRECT 0x4100
56 #define MII_M1111_PHY_LED_COMBINE 0x411c
57 #define MII_M1111_PHY_EXT_CR 0x14
58 #define MII_M1111_RX_DELAY 0x80
59 #define MII_M1111_TX_DELAY 0x2
60 #define MII_M1111_PHY_EXT_SR 0x1b
62 #define MII_M1111_HWCFG_MODE_MASK 0xf
63 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
64 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
65 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
66 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO 0x8000
67 #define MII_M1111_HWCFG_FIBER_COPPER_RES 0x2000
69 #define MII_M1111_COPPER 0
70 #define MII_M1111_FIBER 1
72 #define MII_M1011_PHY_STATUS 0x11
73 #define MII_M1011_PHY_STATUS_1000 0x8000
74 #define MII_M1011_PHY_STATUS_100 0x4000
75 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
76 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
77 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
78 #define MII_M1011_PHY_STATUS_LINK 0x0400
81 MODULE_DESCRIPTION("Marvell PHY driver");
82 MODULE_AUTHOR("Andy Fleming");
83 MODULE_LICENSE("GPL");
85 static int marvell_ack_interrupt(struct phy_device
*phydev
)
89 /* Clear the interrupts by reading the reg */
90 err
= phy_read(phydev
, MII_M1011_IEVENT
);
98 static int marvell_config_intr(struct phy_device
*phydev
)
102 if (phydev
->interrupts
== PHY_INTERRUPT_ENABLED
)
103 err
= phy_write(phydev
, MII_M1011_IMASK
, MII_M1011_IMASK_INIT
);
105 err
= phy_write(phydev
, MII_M1011_IMASK
, MII_M1011_IMASK_CLEAR
);
110 static int marvell_config_aneg(struct phy_device
*phydev
)
114 /* The Marvell PHY has an errata which requires
115 * that certain registers get written in order
116 * to restart autonegotiation */
117 err
= phy_write(phydev
, MII_BMCR
, BMCR_RESET
);
122 err
= phy_write(phydev
, 0x1d, 0x1f);
126 err
= phy_write(phydev
, 0x1e, 0x200c);
130 err
= phy_write(phydev
, 0x1d, 0x5);
134 err
= phy_write(phydev
, 0x1e, 0);
138 err
= phy_write(phydev
, 0x1e, 0x100);
142 err
= phy_write(phydev
, MII_M1011_PHY_SCR
,
143 MII_M1011_PHY_SCR_AUTO_CROSS
);
147 err
= phy_write(phydev
, MII_M1111_PHY_LED_CONTROL
,
148 MII_M1111_PHY_LED_DIRECT
);
152 err
= genphy_config_aneg(phydev
);
157 static int m88e1111_config_init(struct phy_device
*phydev
)
163 /* Enable Fiber/Copper auto selection */
164 temp
= phy_read(phydev
, MII_M1111_PHY_EXT_SR
);
165 temp
|= MII_M1111_HWCFG_FIBER_COPPER_AUTO
;
166 phy_write(phydev
, MII_M1111_PHY_EXT_SR
, temp
);
168 temp
= phy_read(phydev
, MII_BMCR
);
170 phy_write(phydev
, MII_BMCR
, temp
);
172 if ((phydev
->interface
== PHY_INTERFACE_MODE_RGMII
) ||
173 (phydev
->interface
== PHY_INTERFACE_MODE_RGMII_ID
) ||
174 (phydev
->interface
== PHY_INTERFACE_MODE_RGMII_RXID
) ||
175 (phydev
->interface
== PHY_INTERFACE_MODE_RGMII_TXID
)) {
177 temp
= phy_read(phydev
, MII_M1111_PHY_EXT_CR
);
181 if (phydev
->interface
== PHY_INTERFACE_MODE_RGMII_ID
) {
182 temp
|= (MII_M1111_RX_DELAY
| MII_M1111_TX_DELAY
);
183 } else if (phydev
->interface
== PHY_INTERFACE_MODE_RGMII_RXID
) {
184 temp
&= ~MII_M1111_TX_DELAY
;
185 temp
|= MII_M1111_RX_DELAY
;
186 } else if (phydev
->interface
== PHY_INTERFACE_MODE_RGMII_TXID
) {
187 temp
&= ~MII_M1111_RX_DELAY
;
188 temp
|= MII_M1111_TX_DELAY
;
191 err
= phy_write(phydev
, MII_M1111_PHY_EXT_CR
, temp
);
195 temp
= phy_read(phydev
, MII_M1111_PHY_EXT_SR
);
199 temp
&= ~(MII_M1111_HWCFG_MODE_MASK
);
201 mode
= phy_read(phydev
, MII_M1111_PHY_EXT_CR
);
203 if (mode
& MII_M1111_HWCFG_FIBER_COPPER_RES
)
204 temp
|= MII_M1111_HWCFG_MODE_FIBER_RGMII
;
206 temp
|= MII_M1111_HWCFG_MODE_COPPER_RGMII
;
208 err
= phy_write(phydev
, MII_M1111_PHY_EXT_SR
, temp
);
213 if (phydev
->interface
== PHY_INTERFACE_MODE_SGMII
) {
216 temp
= phy_read(phydev
, MII_M1111_PHY_EXT_SR
);
220 temp
&= ~(MII_M1111_HWCFG_MODE_MASK
);
221 temp
|= MII_M1111_HWCFG_MODE_SGMII_NO_CLK
;
223 err
= phy_write(phydev
, MII_M1111_PHY_EXT_SR
, temp
);
228 err
= phy_write(phydev
, MII_BMCR
, BMCR_RESET
);
235 static int m88e1145_config_init(struct phy_device
*phydev
)
239 /* Take care of errata E0 & E1 */
240 err
= phy_write(phydev
, 0x1d, 0x001b);
244 err
= phy_write(phydev
, 0x1e, 0x418f);
248 err
= phy_write(phydev
, 0x1d, 0x0016);
252 err
= phy_write(phydev
, 0x1e, 0xa2da);
256 if (phydev
->interface
== PHY_INTERFACE_MODE_RGMII_ID
) {
257 int temp
= phy_read(phydev
, MII_M1145_PHY_EXT_CR
);
261 temp
|= (MII_M1145_RGMII_RX_DELAY
| MII_M1145_RGMII_TX_DELAY
);
263 err
= phy_write(phydev
, MII_M1145_PHY_EXT_CR
, temp
);
267 if (phydev
->dev_flags
& M1145_DEV_FLAGS_RESISTANCE
) {
268 err
= phy_write(phydev
, 0x1d, 0x0012);
272 temp
= phy_read(phydev
, 0x1e);
277 temp
|= 2 << 9; /* 36 ohm */
278 temp
|= 2 << 6; /* 39 ohm */
280 err
= phy_write(phydev
, 0x1e, temp
);
284 err
= phy_write(phydev
, 0x1d, 0x3);
288 err
= phy_write(phydev
, 0x1e, 0x8000);
297 /* marvell_read_status
299 * Generic status code does not detect Fiber correctly!
301 * Check the link, then figure out the current state
302 * by comparing what we advertise with what the link partner
303 * advertises. Start by checking the gigabit possibilities,
304 * then move on to 10/100.
306 static int marvell_read_status(struct phy_device
*phydev
)
313 /* Update the link, but return if there
315 err
= genphy_update_link(phydev
);
319 if (AUTONEG_ENABLE
== phydev
->autoneg
) {
320 status
= phy_read(phydev
, MII_M1011_PHY_STATUS
);
324 lpa
= phy_read(phydev
, MII_LPA
);
328 adv
= phy_read(phydev
, MII_ADVERTISE
);
334 if (status
& MII_M1011_PHY_STATUS_FULLDUPLEX
)
335 phydev
->duplex
= DUPLEX_FULL
;
337 phydev
->duplex
= DUPLEX_HALF
;
339 status
= status
& MII_M1011_PHY_STATUS_SPD_MASK
;
340 phydev
->pause
= phydev
->asym_pause
= 0;
343 case MII_M1011_PHY_STATUS_1000
:
344 phydev
->speed
= SPEED_1000
;
347 case MII_M1011_PHY_STATUS_100
:
348 phydev
->speed
= SPEED_100
;
352 phydev
->speed
= SPEED_10
;
356 if (phydev
->duplex
== DUPLEX_FULL
) {
357 phydev
->pause
= lpa
& LPA_PAUSE_CAP
? 1 : 0;
358 phydev
->asym_pause
= lpa
& LPA_PAUSE_ASYM
? 1 : 0;
361 int bmcr
= phy_read(phydev
, MII_BMCR
);
366 if (bmcr
& BMCR_FULLDPLX
)
367 phydev
->duplex
= DUPLEX_FULL
;
369 phydev
->duplex
= DUPLEX_HALF
;
371 if (bmcr
& BMCR_SPEED1000
)
372 phydev
->speed
= SPEED_1000
;
373 else if (bmcr
& BMCR_SPEED100
)
374 phydev
->speed
= SPEED_100
;
376 phydev
->speed
= SPEED_10
;
378 phydev
->pause
= phydev
->asym_pause
= 0;
384 static struct phy_driver marvell_drivers
[] = {
386 .phy_id
= 0x01410c60,
387 .phy_id_mask
= 0xfffffff0,
388 .name
= "Marvell 88E1101",
389 .features
= PHY_GBIT_FEATURES
,
390 .flags
= PHY_HAS_INTERRUPT
,
391 .config_aneg
= &marvell_config_aneg
,
392 .read_status
= &genphy_read_status
,
393 .ack_interrupt
= &marvell_ack_interrupt
,
394 .config_intr
= &marvell_config_intr
,
395 .driver
= { .owner
= THIS_MODULE
},
398 .phy_id
= 0x01410c90,
399 .phy_id_mask
= 0xfffffff0,
400 .name
= "Marvell 88E1112",
401 .features
= PHY_GBIT_FEATURES
,
402 .flags
= PHY_HAS_INTERRUPT
,
403 .config_init
= &m88e1111_config_init
,
404 .config_aneg
= &marvell_config_aneg
,
405 .read_status
= &genphy_read_status
,
406 .ack_interrupt
= &marvell_ack_interrupt
,
407 .config_intr
= &marvell_config_intr
,
408 .driver
= { .owner
= THIS_MODULE
},
411 .phy_id
= 0x01410cc0,
412 .phy_id_mask
= 0xfffffff0,
413 .name
= "Marvell 88E1111",
414 .features
= PHY_GBIT_FEATURES
,
415 .flags
= PHY_HAS_INTERRUPT
,
416 .config_init
= &m88e1111_config_init
,
417 .config_aneg
= &marvell_config_aneg
,
418 .read_status
= &marvell_read_status
,
419 .ack_interrupt
= &marvell_ack_interrupt
,
420 .config_intr
= &marvell_config_intr
,
421 .driver
= { .owner
= THIS_MODULE
},
424 .phy_id
= 0x01410cd0,
425 .phy_id_mask
= 0xfffffff0,
426 .name
= "Marvell 88E1145",
427 .features
= PHY_GBIT_FEATURES
,
428 .flags
= PHY_HAS_INTERRUPT
,
429 .config_init
= &m88e1145_config_init
,
430 .config_aneg
= &marvell_config_aneg
,
431 .read_status
= &genphy_read_status
,
432 .ack_interrupt
= &marvell_ack_interrupt
,
433 .config_intr
= &marvell_config_intr
,
434 .driver
= { .owner
= THIS_MODULE
},
437 .phy_id
= 0x01410e30,
438 .phy_id_mask
= 0xfffffff0,
439 .name
= "Marvell 88E1240",
440 .features
= PHY_GBIT_FEATURES
,
441 .flags
= PHY_HAS_INTERRUPT
,
442 .config_init
= &m88e1111_config_init
,
443 .config_aneg
= &marvell_config_aneg
,
444 .read_status
= &genphy_read_status
,
445 .ack_interrupt
= &marvell_ack_interrupt
,
446 .config_intr
= &marvell_config_intr
,
447 .driver
= { .owner
= THIS_MODULE
},
451 static int __init
marvell_init(void)
456 for (i
= 0; i
< ARRAY_SIZE(marvell_drivers
); i
++) {
457 ret
= phy_driver_register(&marvell_drivers
[i
]);
461 phy_driver_unregister(&marvell_drivers
[i
]);
469 static void __exit
marvell_exit(void)
473 for (i
= 0; i
< ARRAY_SIZE(marvell_drivers
); i
++)
474 phy_driver_unregister(&marvell_drivers
[i
]);
477 module_init(marvell_init
);
478 module_exit(marvell_exit
);