Merge branch 'fix/asoc' into topic/asoc
[deliverable/linux.git] / drivers / net / phy / marvell.c
1 /*
2 * drivers/net/phy/marvell.c
3 *
4 * Driver for Marvell PHYs
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 */
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/errno.h>
19 #include <linux/unistd.h>
20 #include <linux/slab.h>
21 #include <linux/interrupt.h>
22 #include <linux/init.h>
23 #include <linux/delay.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/skbuff.h>
27 #include <linux/spinlock.h>
28 #include <linux/mm.h>
29 #include <linux/module.h>
30 #include <linux/mii.h>
31 #include <linux/ethtool.h>
32 #include <linux/phy.h>
33
34 #include <asm/io.h>
35 #include <asm/irq.h>
36 #include <asm/uaccess.h>
37
38 #define MII_M1011_IEVENT 0x13
39 #define MII_M1011_IEVENT_CLEAR 0x0000
40
41 #define MII_M1011_IMASK 0x12
42 #define MII_M1011_IMASK_INIT 0x6400
43 #define MII_M1011_IMASK_CLEAR 0x0000
44
45 #define MII_M1011_PHY_SCR 0x10
46 #define MII_M1011_PHY_SCR_AUTO_CROSS 0x0060
47
48 #define MII_M1145_PHY_EXT_CR 0x14
49 #define MII_M1145_RGMII_RX_DELAY 0x0080
50 #define MII_M1145_RGMII_TX_DELAY 0x0002
51
52 #define M1145_DEV_FLAGS_RESISTANCE 0x00000001
53
54 #define MII_M1111_PHY_LED_CONTROL 0x18
55 #define MII_M1111_PHY_LED_DIRECT 0x4100
56 #define MII_M1111_PHY_LED_COMBINE 0x411c
57 #define MII_M1111_PHY_EXT_CR 0x14
58 #define MII_M1111_RX_DELAY 0x80
59 #define MII_M1111_TX_DELAY 0x2
60 #define MII_M1111_PHY_EXT_SR 0x1b
61
62 #define MII_M1111_HWCFG_MODE_MASK 0xf
63 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
64 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
65 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
66 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO 0x8000
67 #define MII_M1111_HWCFG_FIBER_COPPER_RES 0x2000
68
69 #define MII_M1111_COPPER 0
70 #define MII_M1111_FIBER 1
71
72 #define MII_88E1121_PHY_LED_CTRL 16
73 #define MII_88E1121_PHY_LED_PAGE 3
74 #define MII_88E1121_PHY_LED_DEF 0x0030
75 #define MII_88E1121_PHY_PAGE 22
76
77 #define MII_M1011_PHY_STATUS 0x11
78 #define MII_M1011_PHY_STATUS_1000 0x8000
79 #define MII_M1011_PHY_STATUS_100 0x4000
80 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
81 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
82 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
83 #define MII_M1011_PHY_STATUS_LINK 0x0400
84
85
86 MODULE_DESCRIPTION("Marvell PHY driver");
87 MODULE_AUTHOR("Andy Fleming");
88 MODULE_LICENSE("GPL");
89
90 static int marvell_ack_interrupt(struct phy_device *phydev)
91 {
92 int err;
93
94 /* Clear the interrupts by reading the reg */
95 err = phy_read(phydev, MII_M1011_IEVENT);
96
97 if (err < 0)
98 return err;
99
100 return 0;
101 }
102
103 static int marvell_config_intr(struct phy_device *phydev)
104 {
105 int err;
106
107 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
108 err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT);
109 else
110 err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR);
111
112 return err;
113 }
114
115 static int marvell_config_aneg(struct phy_device *phydev)
116 {
117 int err;
118
119 /* The Marvell PHY has an errata which requires
120 * that certain registers get written in order
121 * to restart autonegotiation */
122 err = phy_write(phydev, MII_BMCR, BMCR_RESET);
123
124 if (err < 0)
125 return err;
126
127 err = phy_write(phydev, 0x1d, 0x1f);
128 if (err < 0)
129 return err;
130
131 err = phy_write(phydev, 0x1e, 0x200c);
132 if (err < 0)
133 return err;
134
135 err = phy_write(phydev, 0x1d, 0x5);
136 if (err < 0)
137 return err;
138
139 err = phy_write(phydev, 0x1e, 0);
140 if (err < 0)
141 return err;
142
143 err = phy_write(phydev, 0x1e, 0x100);
144 if (err < 0)
145 return err;
146
147 err = phy_write(phydev, MII_M1011_PHY_SCR,
148 MII_M1011_PHY_SCR_AUTO_CROSS);
149 if (err < 0)
150 return err;
151
152 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
153 MII_M1111_PHY_LED_DIRECT);
154 if (err < 0)
155 return err;
156
157 err = genphy_config_aneg(phydev);
158
159 return err;
160 }
161
162 static int m88e1121_config_aneg(struct phy_device *phydev)
163 {
164 int err, temp;
165
166 err = phy_write(phydev, MII_BMCR, BMCR_RESET);
167 if (err < 0)
168 return err;
169
170 err = phy_write(phydev, MII_M1011_PHY_SCR,
171 MII_M1011_PHY_SCR_AUTO_CROSS);
172 if (err < 0)
173 return err;
174
175 temp = phy_read(phydev, MII_88E1121_PHY_PAGE);
176
177 phy_write(phydev, MII_88E1121_PHY_PAGE, MII_88E1121_PHY_LED_PAGE);
178 phy_write(phydev, MII_88E1121_PHY_LED_CTRL, MII_88E1121_PHY_LED_DEF);
179 phy_write(phydev, MII_88E1121_PHY_PAGE, temp);
180
181 err = genphy_config_aneg(phydev);
182
183 return err;
184 }
185
186 static int m88e1111_config_init(struct phy_device *phydev)
187 {
188 int err;
189 int temp;
190
191 /* Enable Fiber/Copper auto selection */
192 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
193 temp &= ~MII_M1111_HWCFG_FIBER_COPPER_AUTO;
194 phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
195
196 temp = phy_read(phydev, MII_BMCR);
197 temp |= BMCR_RESET;
198 phy_write(phydev, MII_BMCR, temp);
199
200 if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
201 (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
202 (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) ||
203 (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {
204
205 temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
206 if (temp < 0)
207 return temp;
208
209 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
210 temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
211 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
212 temp &= ~MII_M1111_TX_DELAY;
213 temp |= MII_M1111_RX_DELAY;
214 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
215 temp &= ~MII_M1111_RX_DELAY;
216 temp |= MII_M1111_TX_DELAY;
217 }
218
219 err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
220 if (err < 0)
221 return err;
222
223 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
224 if (temp < 0)
225 return temp;
226
227 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
228
229 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
230 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
231 else
232 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
233
234 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
235 if (err < 0)
236 return err;
237 }
238
239 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
240 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
241 if (temp < 0)
242 return temp;
243
244 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
245 temp |= MII_M1111_HWCFG_MODE_SGMII_NO_CLK;
246
247 err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
248 if (err < 0)
249 return err;
250 }
251
252 err = phy_write(phydev, MII_BMCR, BMCR_RESET);
253 if (err < 0)
254 return err;
255
256 return 0;
257 }
258
259 static int m88e1118_config_aneg(struct phy_device *phydev)
260 {
261 int err;
262
263 err = phy_write(phydev, MII_BMCR, BMCR_RESET);
264 if (err < 0)
265 return err;
266
267 err = phy_write(phydev, MII_M1011_PHY_SCR,
268 MII_M1011_PHY_SCR_AUTO_CROSS);
269 if (err < 0)
270 return err;
271
272 err = genphy_config_aneg(phydev);
273 return 0;
274 }
275
276 static int m88e1118_config_init(struct phy_device *phydev)
277 {
278 int err;
279
280 /* Change address */
281 err = phy_write(phydev, 0x16, 0x0002);
282 if (err < 0)
283 return err;
284
285 /* Enable 1000 Mbit */
286 err = phy_write(phydev, 0x15, 0x1070);
287 if (err < 0)
288 return err;
289
290 /* Change address */
291 err = phy_write(phydev, 0x16, 0x0003);
292 if (err < 0)
293 return err;
294
295 /* Adjust LED Control */
296 err = phy_write(phydev, 0x10, 0x021e);
297 if (err < 0)
298 return err;
299
300 /* Reset address */
301 err = phy_write(phydev, 0x16, 0x0);
302 if (err < 0)
303 return err;
304
305 err = phy_write(phydev, MII_BMCR, BMCR_RESET);
306 if (err < 0)
307 return err;
308
309 return 0;
310 }
311
312 static int m88e1145_config_init(struct phy_device *phydev)
313 {
314 int err;
315
316 /* Take care of errata E0 & E1 */
317 err = phy_write(phydev, 0x1d, 0x001b);
318 if (err < 0)
319 return err;
320
321 err = phy_write(phydev, 0x1e, 0x418f);
322 if (err < 0)
323 return err;
324
325 err = phy_write(phydev, 0x1d, 0x0016);
326 if (err < 0)
327 return err;
328
329 err = phy_write(phydev, 0x1e, 0xa2da);
330 if (err < 0)
331 return err;
332
333 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
334 int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR);
335 if (temp < 0)
336 return temp;
337
338 temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY);
339
340 err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp);
341 if (err < 0)
342 return err;
343
344 if (phydev->dev_flags & M1145_DEV_FLAGS_RESISTANCE) {
345 err = phy_write(phydev, 0x1d, 0x0012);
346 if (err < 0)
347 return err;
348
349 temp = phy_read(phydev, 0x1e);
350 if (temp < 0)
351 return temp;
352
353 temp &= 0xf03f;
354 temp |= 2 << 9; /* 36 ohm */
355 temp |= 2 << 6; /* 39 ohm */
356
357 err = phy_write(phydev, 0x1e, temp);
358 if (err < 0)
359 return err;
360
361 err = phy_write(phydev, 0x1d, 0x3);
362 if (err < 0)
363 return err;
364
365 err = phy_write(phydev, 0x1e, 0x8000);
366 if (err < 0)
367 return err;
368 }
369 }
370
371 return 0;
372 }
373
374 /* marvell_read_status
375 *
376 * Generic status code does not detect Fiber correctly!
377 * Description:
378 * Check the link, then figure out the current state
379 * by comparing what we advertise with what the link partner
380 * advertises. Start by checking the gigabit possibilities,
381 * then move on to 10/100.
382 */
383 static int marvell_read_status(struct phy_device *phydev)
384 {
385 int adv;
386 int err;
387 int lpa;
388 int status = 0;
389
390 /* Update the link, but return if there
391 * was an error */
392 err = genphy_update_link(phydev);
393 if (err)
394 return err;
395
396 if (AUTONEG_ENABLE == phydev->autoneg) {
397 status = phy_read(phydev, MII_M1011_PHY_STATUS);
398 if (status < 0)
399 return status;
400
401 lpa = phy_read(phydev, MII_LPA);
402 if (lpa < 0)
403 return lpa;
404
405 adv = phy_read(phydev, MII_ADVERTISE);
406 if (adv < 0)
407 return adv;
408
409 lpa &= adv;
410
411 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
412 phydev->duplex = DUPLEX_FULL;
413 else
414 phydev->duplex = DUPLEX_HALF;
415
416 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
417 phydev->pause = phydev->asym_pause = 0;
418
419 switch (status) {
420 case MII_M1011_PHY_STATUS_1000:
421 phydev->speed = SPEED_1000;
422 break;
423
424 case MII_M1011_PHY_STATUS_100:
425 phydev->speed = SPEED_100;
426 break;
427
428 default:
429 phydev->speed = SPEED_10;
430 break;
431 }
432
433 if (phydev->duplex == DUPLEX_FULL) {
434 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
435 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
436 }
437 } else {
438 int bmcr = phy_read(phydev, MII_BMCR);
439
440 if (bmcr < 0)
441 return bmcr;
442
443 if (bmcr & BMCR_FULLDPLX)
444 phydev->duplex = DUPLEX_FULL;
445 else
446 phydev->duplex = DUPLEX_HALF;
447
448 if (bmcr & BMCR_SPEED1000)
449 phydev->speed = SPEED_1000;
450 else if (bmcr & BMCR_SPEED100)
451 phydev->speed = SPEED_100;
452 else
453 phydev->speed = SPEED_10;
454
455 phydev->pause = phydev->asym_pause = 0;
456 }
457
458 return 0;
459 }
460
461 static int m88e1121_did_interrupt(struct phy_device *phydev)
462 {
463 int imask;
464
465 imask = phy_read(phydev, MII_M1011_IEVENT);
466
467 if (imask & MII_M1011_IMASK_INIT)
468 return 1;
469
470 return 0;
471 }
472
473 static struct phy_driver marvell_drivers[] = {
474 {
475 .phy_id = 0x01410c60,
476 .phy_id_mask = 0xfffffff0,
477 .name = "Marvell 88E1101",
478 .features = PHY_GBIT_FEATURES,
479 .flags = PHY_HAS_INTERRUPT,
480 .config_aneg = &marvell_config_aneg,
481 .read_status = &genphy_read_status,
482 .ack_interrupt = &marvell_ack_interrupt,
483 .config_intr = &marvell_config_intr,
484 .driver = { .owner = THIS_MODULE },
485 },
486 {
487 .phy_id = 0x01410c90,
488 .phy_id_mask = 0xfffffff0,
489 .name = "Marvell 88E1112",
490 .features = PHY_GBIT_FEATURES,
491 .flags = PHY_HAS_INTERRUPT,
492 .config_init = &m88e1111_config_init,
493 .config_aneg = &marvell_config_aneg,
494 .read_status = &genphy_read_status,
495 .ack_interrupt = &marvell_ack_interrupt,
496 .config_intr = &marvell_config_intr,
497 .driver = { .owner = THIS_MODULE },
498 },
499 {
500 .phy_id = 0x01410cc0,
501 .phy_id_mask = 0xfffffff0,
502 .name = "Marvell 88E1111",
503 .features = PHY_GBIT_FEATURES,
504 .flags = PHY_HAS_INTERRUPT,
505 .config_init = &m88e1111_config_init,
506 .config_aneg = &marvell_config_aneg,
507 .read_status = &marvell_read_status,
508 .ack_interrupt = &marvell_ack_interrupt,
509 .config_intr = &marvell_config_intr,
510 .driver = { .owner = THIS_MODULE },
511 },
512 {
513 .phy_id = 0x01410e10,
514 .phy_id_mask = 0xfffffff0,
515 .name = "Marvell 88E1118",
516 .features = PHY_GBIT_FEATURES,
517 .flags = PHY_HAS_INTERRUPT,
518 .config_init = &m88e1118_config_init,
519 .config_aneg = &m88e1118_config_aneg,
520 .read_status = &genphy_read_status,
521 .ack_interrupt = &marvell_ack_interrupt,
522 .config_intr = &marvell_config_intr,
523 .driver = {.owner = THIS_MODULE,},
524 },
525 {
526 .phy_id = 0x01410cb0,
527 .phy_id_mask = 0xfffffff0,
528 .name = "Marvell 88E1121R",
529 .features = PHY_GBIT_FEATURES,
530 .flags = PHY_HAS_INTERRUPT,
531 .config_aneg = &m88e1121_config_aneg,
532 .read_status = &marvell_read_status,
533 .ack_interrupt = &marvell_ack_interrupt,
534 .config_intr = &marvell_config_intr,
535 .did_interrupt = &m88e1121_did_interrupt,
536 .driver = { .owner = THIS_MODULE },
537 },
538 {
539 .phy_id = 0x01410cd0,
540 .phy_id_mask = 0xfffffff0,
541 .name = "Marvell 88E1145",
542 .features = PHY_GBIT_FEATURES,
543 .flags = PHY_HAS_INTERRUPT,
544 .config_init = &m88e1145_config_init,
545 .config_aneg = &marvell_config_aneg,
546 .read_status = &genphy_read_status,
547 .ack_interrupt = &marvell_ack_interrupt,
548 .config_intr = &marvell_config_intr,
549 .driver = { .owner = THIS_MODULE },
550 },
551 {
552 .phy_id = 0x01410e30,
553 .phy_id_mask = 0xfffffff0,
554 .name = "Marvell 88E1240",
555 .features = PHY_GBIT_FEATURES,
556 .flags = PHY_HAS_INTERRUPT,
557 .config_init = &m88e1111_config_init,
558 .config_aneg = &marvell_config_aneg,
559 .read_status = &genphy_read_status,
560 .ack_interrupt = &marvell_ack_interrupt,
561 .config_intr = &marvell_config_intr,
562 .driver = { .owner = THIS_MODULE },
563 },
564 };
565
566 static int __init marvell_init(void)
567 {
568 int ret;
569 int i;
570
571 for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++) {
572 ret = phy_driver_register(&marvell_drivers[i]);
573
574 if (ret) {
575 while (i-- > 0)
576 phy_driver_unregister(&marvell_drivers[i]);
577 return ret;
578 }
579 }
580
581 return 0;
582 }
583
584 static void __exit marvell_exit(void)
585 {
586 int i;
587
588 for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++)
589 phy_driver_unregister(&marvell_drivers[i]);
590 }
591
592 module_init(marvell_init);
593 module_exit(marvell_exit);
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