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[deliverable/linux.git] / drivers / net / qlcnic / qlcnic_ctx.c
1 /*
2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2010 QLogic Corporation
4 *
5 * See LICENSE.qlcnic for copyright and licensing details.
6 */
7
8 #include "qlcnic.h"
9
10 static u32
11 qlcnic_poll_rsp(struct qlcnic_adapter *adapter)
12 {
13 u32 rsp;
14 int timeout = 0;
15
16 do {
17 /* give atleast 1ms for firmware to respond */
18 msleep(1);
19
20 if (++timeout > QLCNIC_OS_CRB_RETRY_COUNT)
21 return QLCNIC_CDRP_RSP_TIMEOUT;
22
23 rsp = QLCRD32(adapter, QLCNIC_CDRP_CRB_OFFSET);
24 } while (!QLCNIC_CDRP_IS_RSP(rsp));
25
26 return rsp;
27 }
28
29 u32
30 qlcnic_issue_cmd(struct qlcnic_adapter *adapter,
31 u32 pci_fn, u32 version, u32 arg1, u32 arg2, u32 arg3, u32 cmd)
32 {
33 u32 rsp;
34 u32 signature;
35 u32 rcode = QLCNIC_RCODE_SUCCESS;
36 struct pci_dev *pdev = adapter->pdev;
37
38 signature = QLCNIC_CDRP_SIGNATURE_MAKE(pci_fn, version);
39
40 /* Acquire semaphore before accessing CRB */
41 if (qlcnic_api_lock(adapter))
42 return QLCNIC_RCODE_TIMEOUT;
43
44 QLCWR32(adapter, QLCNIC_SIGN_CRB_OFFSET, signature);
45 QLCWR32(adapter, QLCNIC_ARG1_CRB_OFFSET, arg1);
46 QLCWR32(adapter, QLCNIC_ARG2_CRB_OFFSET, arg2);
47 QLCWR32(adapter, QLCNIC_ARG3_CRB_OFFSET, arg3);
48 QLCWR32(adapter, QLCNIC_CDRP_CRB_OFFSET, QLCNIC_CDRP_FORM_CMD(cmd));
49
50 rsp = qlcnic_poll_rsp(adapter);
51
52 if (rsp == QLCNIC_CDRP_RSP_TIMEOUT) {
53 dev_err(&pdev->dev, "card response timeout.\n");
54 rcode = QLCNIC_RCODE_TIMEOUT;
55 } else if (rsp == QLCNIC_CDRP_RSP_FAIL) {
56 rcode = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
57 dev_err(&pdev->dev, "failed card response code:0x%x\n",
58 rcode);
59 }
60
61 /* Release semaphore */
62 qlcnic_api_unlock(adapter);
63
64 return rcode;
65 }
66
67 int
68 qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu)
69 {
70 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
71
72 if (recv_ctx->state == QLCNIC_HOST_CTX_STATE_ACTIVE) {
73 if (qlcnic_issue_cmd(adapter,
74 adapter->ahw->pci_func,
75 adapter->fw_hal_version,
76 recv_ctx->context_id,
77 mtu,
78 0,
79 QLCNIC_CDRP_CMD_SET_MTU)) {
80
81 dev_err(&adapter->pdev->dev, "Failed to set mtu\n");
82 return -EIO;
83 }
84 }
85
86 return 0;
87 }
88
89 static int
90 qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
91 {
92 void *addr;
93 struct qlcnic_hostrq_rx_ctx *prq;
94 struct qlcnic_cardrsp_rx_ctx *prsp;
95 struct qlcnic_hostrq_rds_ring *prq_rds;
96 struct qlcnic_hostrq_sds_ring *prq_sds;
97 struct qlcnic_cardrsp_rds_ring *prsp_rds;
98 struct qlcnic_cardrsp_sds_ring *prsp_sds;
99 struct qlcnic_host_rds_ring *rds_ring;
100 struct qlcnic_host_sds_ring *sds_ring;
101
102 dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
103 u64 phys_addr;
104
105 u8 i, nrds_rings, nsds_rings;
106 size_t rq_size, rsp_size;
107 u32 cap, reg, val, reg2;
108 int err;
109
110 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
111
112 nrds_rings = adapter->max_rds_rings;
113 nsds_rings = adapter->max_sds_rings;
114
115 rq_size =
116 SIZEOF_HOSTRQ_RX(struct qlcnic_hostrq_rx_ctx, nrds_rings,
117 nsds_rings);
118 rsp_size =
119 SIZEOF_CARDRSP_RX(struct qlcnic_cardrsp_rx_ctx, nrds_rings,
120 nsds_rings);
121
122 addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
123 &hostrq_phys_addr, GFP_KERNEL);
124 if (addr == NULL)
125 return -ENOMEM;
126 prq = (struct qlcnic_hostrq_rx_ctx *)addr;
127
128 addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
129 &cardrsp_phys_addr, GFP_KERNEL);
130 if (addr == NULL) {
131 err = -ENOMEM;
132 goto out_free_rq;
133 }
134 prsp = (struct qlcnic_cardrsp_rx_ctx *)addr;
135
136 prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
137
138 cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN
139 | QLCNIC_CAP0_VALIDOFF);
140 cap |= (QLCNIC_CAP0_JUMBO_CONTIGUOUS | QLCNIC_CAP0_LRO_CONTIGUOUS);
141
142 prq->valid_field_offset = offsetof(struct qlcnic_hostrq_rx_ctx,
143 msix_handler);
144 prq->txrx_sds_binding = nsds_rings - 1;
145
146 prq->capabilities[0] = cpu_to_le32(cap);
147 prq->host_int_crb_mode =
148 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
149 prq->host_rds_crb_mode =
150 cpu_to_le32(QLCNIC_HOST_RDS_CRB_MODE_UNIQUE);
151
152 prq->num_rds_rings = cpu_to_le16(nrds_rings);
153 prq->num_sds_rings = cpu_to_le16(nsds_rings);
154 prq->rds_ring_offset = 0;
155
156 val = le32_to_cpu(prq->rds_ring_offset) +
157 (sizeof(struct qlcnic_hostrq_rds_ring) * nrds_rings);
158 prq->sds_ring_offset = cpu_to_le32(val);
159
160 prq_rds = (struct qlcnic_hostrq_rds_ring *)(prq->data +
161 le32_to_cpu(prq->rds_ring_offset));
162
163 for (i = 0; i < nrds_rings; i++) {
164
165 rds_ring = &recv_ctx->rds_rings[i];
166 rds_ring->producer = 0;
167
168 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
169 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
170 prq_rds[i].ring_kind = cpu_to_le32(i);
171 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
172 }
173
174 prq_sds = (struct qlcnic_hostrq_sds_ring *)(prq->data +
175 le32_to_cpu(prq->sds_ring_offset));
176
177 for (i = 0; i < nsds_rings; i++) {
178
179 sds_ring = &recv_ctx->sds_rings[i];
180 sds_ring->consumer = 0;
181 memset(sds_ring->desc_head, 0, STATUS_DESC_RINGSIZE(sds_ring));
182
183 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
184 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
185 prq_sds[i].msi_index = cpu_to_le16(i);
186 }
187
188 phys_addr = hostrq_phys_addr;
189 err = qlcnic_issue_cmd(adapter,
190 adapter->ahw->pci_func,
191 adapter->fw_hal_version,
192 (u32)(phys_addr >> 32),
193 (u32)(phys_addr & 0xffffffff),
194 rq_size,
195 QLCNIC_CDRP_CMD_CREATE_RX_CTX);
196 if (err) {
197 dev_err(&adapter->pdev->dev,
198 "Failed to create rx ctx in firmware%d\n", err);
199 goto out_free_rsp;
200 }
201
202
203 prsp_rds = ((struct qlcnic_cardrsp_rds_ring *)
204 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
205
206 for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
207 rds_ring = &recv_ctx->rds_rings[i];
208
209 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
210 rds_ring->crb_rcv_producer = adapter->ahw->pci_base0 + reg;
211 }
212
213 prsp_sds = ((struct qlcnic_cardrsp_sds_ring *)
214 &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
215
216 for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
217 sds_ring = &recv_ctx->sds_rings[i];
218
219 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
220 reg2 = le32_to_cpu(prsp_sds[i].interrupt_crb);
221
222 sds_ring->crb_sts_consumer = adapter->ahw->pci_base0 + reg;
223 sds_ring->crb_intr_mask = adapter->ahw->pci_base0 + reg2;
224 }
225
226 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
227 recv_ctx->context_id = le16_to_cpu(prsp->context_id);
228 recv_ctx->virt_port = prsp->virt_port;
229
230 out_free_rsp:
231 dma_free_coherent(&adapter->pdev->dev, rsp_size, prsp,
232 cardrsp_phys_addr);
233 out_free_rq:
234 dma_free_coherent(&adapter->pdev->dev, rq_size, prq, hostrq_phys_addr);
235 return err;
236 }
237
238 static void
239 qlcnic_fw_cmd_destroy_rx_ctx(struct qlcnic_adapter *adapter)
240 {
241 struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
242
243 if (qlcnic_issue_cmd(adapter,
244 adapter->ahw->pci_func,
245 adapter->fw_hal_version,
246 recv_ctx->context_id,
247 QLCNIC_DESTROY_CTX_RESET,
248 0,
249 QLCNIC_CDRP_CMD_DESTROY_RX_CTX)) {
250
251 dev_err(&adapter->pdev->dev,
252 "Failed to destroy rx ctx in firmware\n");
253 }
254
255 recv_ctx->state = QLCNIC_HOST_CTX_STATE_FREED;
256 }
257
258 static int
259 qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter)
260 {
261 struct qlcnic_hostrq_tx_ctx *prq;
262 struct qlcnic_hostrq_cds_ring *prq_cds;
263 struct qlcnic_cardrsp_tx_ctx *prsp;
264 void *rq_addr, *rsp_addr;
265 size_t rq_size, rsp_size;
266 u32 temp;
267 int err;
268 u64 phys_addr;
269 dma_addr_t rq_phys_addr, rsp_phys_addr;
270 struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
271
272 /* reset host resources */
273 tx_ring->producer = 0;
274 tx_ring->sw_consumer = 0;
275 *(tx_ring->hw_consumer) = 0;
276
277 rq_size = SIZEOF_HOSTRQ_TX(struct qlcnic_hostrq_tx_ctx);
278 rq_addr = dma_alloc_coherent(&adapter->pdev->dev, rq_size,
279 &rq_phys_addr, GFP_KERNEL);
280 if (!rq_addr)
281 return -ENOMEM;
282
283 rsp_size = SIZEOF_CARDRSP_TX(struct qlcnic_cardrsp_tx_ctx);
284 rsp_addr = dma_alloc_coherent(&adapter->pdev->dev, rsp_size,
285 &rsp_phys_addr, GFP_KERNEL);
286 if (!rsp_addr) {
287 err = -ENOMEM;
288 goto out_free_rq;
289 }
290
291 memset(rq_addr, 0, rq_size);
292 prq = (struct qlcnic_hostrq_tx_ctx *)rq_addr;
293
294 memset(rsp_addr, 0, rsp_size);
295 prsp = (struct qlcnic_cardrsp_tx_ctx *)rsp_addr;
296
297 prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
298
299 temp = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN |
300 QLCNIC_CAP0_LSO);
301 prq->capabilities[0] = cpu_to_le32(temp);
302
303 prq->host_int_crb_mode =
304 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
305
306 prq->interrupt_ctl = 0;
307 prq->msi_index = 0;
308 prq->cmd_cons_dma_addr = cpu_to_le64(tx_ring->hw_cons_phys_addr);
309
310 prq_cds = &prq->cds_ring;
311
312 prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
313 prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
314
315 phys_addr = rq_phys_addr;
316 err = qlcnic_issue_cmd(adapter,
317 adapter->ahw->pci_func,
318 adapter->fw_hal_version,
319 (u32)(phys_addr >> 32),
320 ((u32)phys_addr & 0xffffffff),
321 rq_size,
322 QLCNIC_CDRP_CMD_CREATE_TX_CTX);
323
324 if (err == QLCNIC_RCODE_SUCCESS) {
325 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
326 tx_ring->crb_cmd_producer = adapter->ahw->pci_base0 + temp;
327
328 adapter->tx_context_id =
329 le16_to_cpu(prsp->context_id);
330 } else {
331 dev_err(&adapter->pdev->dev,
332 "Failed to create tx ctx in firmware%d\n", err);
333 err = -EIO;
334 }
335
336 dma_free_coherent(&adapter->pdev->dev, rsp_size, rsp_addr,
337 rsp_phys_addr);
338
339 out_free_rq:
340 dma_free_coherent(&adapter->pdev->dev, rq_size, rq_addr, rq_phys_addr);
341
342 return err;
343 }
344
345 static void
346 qlcnic_fw_cmd_destroy_tx_ctx(struct qlcnic_adapter *adapter)
347 {
348 if (qlcnic_issue_cmd(adapter,
349 adapter->ahw->pci_func,
350 adapter->fw_hal_version,
351 adapter->tx_context_id,
352 QLCNIC_DESTROY_CTX_RESET,
353 0,
354 QLCNIC_CDRP_CMD_DESTROY_TX_CTX)) {
355
356 dev_err(&adapter->pdev->dev,
357 "Failed to destroy tx ctx in firmware\n");
358 }
359 }
360
361 int
362 qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config)
363 {
364 return qlcnic_issue_cmd(adapter,
365 adapter->ahw->pci_func,
366 adapter->fw_hal_version,
367 config,
368 0,
369 0,
370 QLCNIC_CDRP_CMD_CONFIG_PORT);
371 }
372
373 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter)
374 {
375 void *addr;
376 int err;
377 int ring;
378 struct qlcnic_recv_context *recv_ctx;
379 struct qlcnic_host_rds_ring *rds_ring;
380 struct qlcnic_host_sds_ring *sds_ring;
381 struct qlcnic_host_tx_ring *tx_ring;
382
383 struct pci_dev *pdev = adapter->pdev;
384
385 recv_ctx = adapter->recv_ctx;
386 tx_ring = adapter->tx_ring;
387
388 tx_ring->hw_consumer = (__le32 *) dma_alloc_coherent(&pdev->dev,
389 sizeof(u32), &tx_ring->hw_cons_phys_addr, GFP_KERNEL);
390 if (tx_ring->hw_consumer == NULL) {
391 dev_err(&pdev->dev, "failed to allocate tx consumer\n");
392 return -ENOMEM;
393 }
394
395 /* cmd desc ring */
396 addr = dma_alloc_coherent(&pdev->dev, TX_DESC_RINGSIZE(tx_ring),
397 &tx_ring->phys_addr, GFP_KERNEL);
398
399 if (addr == NULL) {
400 dev_err(&pdev->dev, "failed to allocate tx desc ring\n");
401 err = -ENOMEM;
402 goto err_out_free;
403 }
404
405 tx_ring->desc_head = (struct cmd_desc_type0 *)addr;
406
407 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
408 rds_ring = &recv_ctx->rds_rings[ring];
409 addr = dma_alloc_coherent(&adapter->pdev->dev,
410 RCV_DESC_RINGSIZE(rds_ring),
411 &rds_ring->phys_addr, GFP_KERNEL);
412 if (addr == NULL) {
413 dev_err(&pdev->dev,
414 "failed to allocate rds ring [%d]\n", ring);
415 err = -ENOMEM;
416 goto err_out_free;
417 }
418 rds_ring->desc_head = (struct rcv_desc *)addr;
419
420 }
421
422 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
423 sds_ring = &recv_ctx->sds_rings[ring];
424
425 addr = dma_alloc_coherent(&adapter->pdev->dev,
426 STATUS_DESC_RINGSIZE(sds_ring),
427 &sds_ring->phys_addr, GFP_KERNEL);
428 if (addr == NULL) {
429 dev_err(&pdev->dev,
430 "failed to allocate sds ring [%d]\n", ring);
431 err = -ENOMEM;
432 goto err_out_free;
433 }
434 sds_ring->desc_head = (struct status_desc *)addr;
435 }
436
437 return 0;
438
439 err_out_free:
440 qlcnic_free_hw_resources(adapter);
441 return err;
442 }
443
444
445 int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter)
446 {
447 int err;
448
449 if (adapter->flags & QLCNIC_NEED_FLR) {
450 pci_reset_function(adapter->pdev);
451 adapter->flags &= ~QLCNIC_NEED_FLR;
452 }
453
454 err = qlcnic_fw_cmd_create_rx_ctx(adapter);
455 if (err)
456 return err;
457
458 err = qlcnic_fw_cmd_create_tx_ctx(adapter);
459 if (err) {
460 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
461 return err;
462 }
463
464 set_bit(__QLCNIC_FW_ATTACHED, &adapter->state);
465 return 0;
466 }
467
468 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter)
469 {
470 if (test_and_clear_bit(__QLCNIC_FW_ATTACHED, &adapter->state)) {
471 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
472 qlcnic_fw_cmd_destroy_tx_ctx(adapter);
473
474 /* Allow dma queues to drain after context reset */
475 msleep(20);
476 }
477 }
478
479 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter)
480 {
481 struct qlcnic_recv_context *recv_ctx;
482 struct qlcnic_host_rds_ring *rds_ring;
483 struct qlcnic_host_sds_ring *sds_ring;
484 struct qlcnic_host_tx_ring *tx_ring;
485 int ring;
486
487 recv_ctx = adapter->recv_ctx;
488
489 tx_ring = adapter->tx_ring;
490 if (tx_ring->hw_consumer != NULL) {
491 dma_free_coherent(&adapter->pdev->dev,
492 sizeof(u32),
493 tx_ring->hw_consumer,
494 tx_ring->hw_cons_phys_addr);
495 tx_ring->hw_consumer = NULL;
496 }
497
498 if (tx_ring->desc_head != NULL) {
499 dma_free_coherent(&adapter->pdev->dev,
500 TX_DESC_RINGSIZE(tx_ring),
501 tx_ring->desc_head, tx_ring->phys_addr);
502 tx_ring->desc_head = NULL;
503 }
504
505 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
506 rds_ring = &recv_ctx->rds_rings[ring];
507
508 if (rds_ring->desc_head != NULL) {
509 dma_free_coherent(&adapter->pdev->dev,
510 RCV_DESC_RINGSIZE(rds_ring),
511 rds_ring->desc_head,
512 rds_ring->phys_addr);
513 rds_ring->desc_head = NULL;
514 }
515 }
516
517 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
518 sds_ring = &recv_ctx->sds_rings[ring];
519
520 if (sds_ring->desc_head != NULL) {
521 dma_free_coherent(&adapter->pdev->dev,
522 STATUS_DESC_RINGSIZE(sds_ring),
523 sds_ring->desc_head,
524 sds_ring->phys_addr);
525 sds_ring->desc_head = NULL;
526 }
527 }
528 }
529
530
531 /* Get MAC address of a NIC partition */
532 int qlcnic_get_mac_address(struct qlcnic_adapter *adapter, u8 *mac)
533 {
534 int err;
535 u32 arg1;
536
537 arg1 = adapter->ahw->pci_func | BIT_8;
538 err = qlcnic_issue_cmd(adapter,
539 adapter->ahw->pci_func,
540 adapter->fw_hal_version,
541 arg1,
542 0,
543 0,
544 QLCNIC_CDRP_CMD_MAC_ADDRESS);
545
546 if (err == QLCNIC_RCODE_SUCCESS)
547 qlcnic_fetch_mac(adapter, QLCNIC_ARG1_CRB_OFFSET,
548 QLCNIC_ARG2_CRB_OFFSET, 0, mac);
549 else {
550 dev_err(&adapter->pdev->dev,
551 "Failed to get mac address%d\n", err);
552 err = -EIO;
553 }
554
555 return err;
556 }
557
558 /* Get info of a NIC partition */
559 int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
560 struct qlcnic_info *npar_info, u8 func_id)
561 {
562 int err;
563 dma_addr_t nic_dma_t;
564 struct qlcnic_info *nic_info;
565 void *nic_info_addr;
566 size_t nic_size = sizeof(struct qlcnic_info);
567
568 nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
569 &nic_dma_t, GFP_KERNEL);
570 if (!nic_info_addr)
571 return -ENOMEM;
572 memset(nic_info_addr, 0, nic_size);
573
574 nic_info = (struct qlcnic_info *) nic_info_addr;
575 err = qlcnic_issue_cmd(adapter,
576 adapter->ahw->pci_func,
577 adapter->fw_hal_version,
578 MSD(nic_dma_t),
579 LSD(nic_dma_t),
580 (func_id << 16 | nic_size),
581 QLCNIC_CDRP_CMD_GET_NIC_INFO);
582
583 if (err == QLCNIC_RCODE_SUCCESS) {
584 npar_info->pci_func = le16_to_cpu(nic_info->pci_func);
585 npar_info->op_mode = le16_to_cpu(nic_info->op_mode);
586 npar_info->phys_port = le16_to_cpu(nic_info->phys_port);
587 npar_info->switch_mode = le16_to_cpu(nic_info->switch_mode);
588 npar_info->max_tx_ques = le16_to_cpu(nic_info->max_tx_ques);
589 npar_info->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques);
590 npar_info->min_tx_bw = le16_to_cpu(nic_info->min_tx_bw);
591 npar_info->max_tx_bw = le16_to_cpu(nic_info->max_tx_bw);
592 npar_info->capabilities = le32_to_cpu(nic_info->capabilities);
593 npar_info->max_mtu = le16_to_cpu(nic_info->max_mtu);
594
595 dev_info(&adapter->pdev->dev,
596 "phy port: %d switch_mode: %d,\n"
597 "\tmax_tx_q: %d max_rx_q: %d min_tx_bw: 0x%x,\n"
598 "\tmax_tx_bw: 0x%x max_mtu:0x%x, capabilities: 0x%x\n",
599 npar_info->phys_port, npar_info->switch_mode,
600 npar_info->max_tx_ques, npar_info->max_rx_ques,
601 npar_info->min_tx_bw, npar_info->max_tx_bw,
602 npar_info->max_mtu, npar_info->capabilities);
603 } else {
604 dev_err(&adapter->pdev->dev,
605 "Failed to get nic info%d\n", err);
606 err = -EIO;
607 }
608
609 dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
610 nic_dma_t);
611 return err;
612 }
613
614 /* Configure a NIC partition */
615 int qlcnic_set_nic_info(struct qlcnic_adapter *adapter, struct qlcnic_info *nic)
616 {
617 int err = -EIO;
618 dma_addr_t nic_dma_t;
619 void *nic_info_addr;
620 struct qlcnic_info *nic_info;
621 size_t nic_size = sizeof(struct qlcnic_info);
622
623 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
624 return err;
625
626 nic_info_addr = dma_alloc_coherent(&adapter->pdev->dev, nic_size,
627 &nic_dma_t, GFP_KERNEL);
628 if (!nic_info_addr)
629 return -ENOMEM;
630
631 memset(nic_info_addr, 0, nic_size);
632 nic_info = (struct qlcnic_info *)nic_info_addr;
633
634 nic_info->pci_func = cpu_to_le16(nic->pci_func);
635 nic_info->op_mode = cpu_to_le16(nic->op_mode);
636 nic_info->phys_port = cpu_to_le16(nic->phys_port);
637 nic_info->switch_mode = cpu_to_le16(nic->switch_mode);
638 nic_info->capabilities = cpu_to_le32(nic->capabilities);
639 nic_info->max_mac_filters = nic->max_mac_filters;
640 nic_info->max_tx_ques = cpu_to_le16(nic->max_tx_ques);
641 nic_info->max_rx_ques = cpu_to_le16(nic->max_rx_ques);
642 nic_info->min_tx_bw = cpu_to_le16(nic->min_tx_bw);
643 nic_info->max_tx_bw = cpu_to_le16(nic->max_tx_bw);
644
645 err = qlcnic_issue_cmd(adapter,
646 adapter->ahw->pci_func,
647 adapter->fw_hal_version,
648 MSD(nic_dma_t),
649 LSD(nic_dma_t),
650 ((nic->pci_func << 16) | nic_size),
651 QLCNIC_CDRP_CMD_SET_NIC_INFO);
652
653 if (err != QLCNIC_RCODE_SUCCESS) {
654 dev_err(&adapter->pdev->dev,
655 "Failed to set nic info%d\n", err);
656 err = -EIO;
657 }
658
659 dma_free_coherent(&adapter->pdev->dev, nic_size, nic_info_addr,
660 nic_dma_t);
661 return err;
662 }
663
664 /* Get PCI Info of a partition */
665 int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
666 struct qlcnic_pci_info *pci_info)
667 {
668 int err = 0, i;
669 dma_addr_t pci_info_dma_t;
670 struct qlcnic_pci_info *npar;
671 void *pci_info_addr;
672 size_t npar_size = sizeof(struct qlcnic_pci_info);
673 size_t pci_size = npar_size * QLCNIC_MAX_PCI_FUNC;
674
675 pci_info_addr = dma_alloc_coherent(&adapter->pdev->dev, pci_size,
676 &pci_info_dma_t, GFP_KERNEL);
677 if (!pci_info_addr)
678 return -ENOMEM;
679 memset(pci_info_addr, 0, pci_size);
680
681 npar = (struct qlcnic_pci_info *) pci_info_addr;
682 err = qlcnic_issue_cmd(adapter,
683 adapter->ahw->pci_func,
684 adapter->fw_hal_version,
685 MSD(pci_info_dma_t),
686 LSD(pci_info_dma_t),
687 pci_size,
688 QLCNIC_CDRP_CMD_GET_PCI_INFO);
689
690 if (err == QLCNIC_RCODE_SUCCESS) {
691 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++, npar++, pci_info++) {
692 pci_info->id = le16_to_cpu(npar->id);
693 pci_info->active = le16_to_cpu(npar->active);
694 pci_info->type = le16_to_cpu(npar->type);
695 pci_info->default_port =
696 le16_to_cpu(npar->default_port);
697 pci_info->tx_min_bw =
698 le16_to_cpu(npar->tx_min_bw);
699 pci_info->tx_max_bw =
700 le16_to_cpu(npar->tx_max_bw);
701 memcpy(pci_info->mac, npar->mac, ETH_ALEN);
702 }
703 } else {
704 dev_err(&adapter->pdev->dev,
705 "Failed to get PCI Info%d\n", err);
706 err = -EIO;
707 }
708
709 dma_free_coherent(&adapter->pdev->dev, pci_size, pci_info_addr,
710 pci_info_dma_t);
711 return err;
712 }
713
714 /* Configure eSwitch for port mirroring */
715 int qlcnic_config_port_mirroring(struct qlcnic_adapter *adapter, u8 id,
716 u8 enable_mirroring, u8 pci_func)
717 {
718 int err = -EIO;
719 u32 arg1;
720
721 if (adapter->op_mode != QLCNIC_MGMT_FUNC ||
722 !(adapter->eswitch[id].flags & QLCNIC_SWITCH_ENABLE))
723 return err;
724
725 arg1 = id | (enable_mirroring ? BIT_4 : 0);
726 arg1 |= pci_func << 8;
727
728 err = qlcnic_issue_cmd(adapter,
729 adapter->ahw->pci_func,
730 adapter->fw_hal_version,
731 arg1,
732 0,
733 0,
734 QLCNIC_CDRP_CMD_SET_PORTMIRRORING);
735
736 if (err != QLCNIC_RCODE_SUCCESS) {
737 dev_err(&adapter->pdev->dev,
738 "Failed to configure port mirroring%d on eswitch:%d\n",
739 pci_func, id);
740 } else {
741 dev_info(&adapter->pdev->dev,
742 "Configured eSwitch %d for port mirroring:%d\n",
743 id, pci_func);
744 }
745
746 return err;
747 }
748
749 int qlcnic_get_port_stats(struct qlcnic_adapter *adapter, const u8 func,
750 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
751
752 size_t stats_size = sizeof(struct __qlcnic_esw_statistics);
753 struct __qlcnic_esw_statistics *stats;
754 dma_addr_t stats_dma_t;
755 void *stats_addr;
756 u32 arg1;
757 int err;
758
759 if (esw_stats == NULL)
760 return -ENOMEM;
761
762 if (adapter->op_mode != QLCNIC_MGMT_FUNC &&
763 func != adapter->ahw->pci_func) {
764 dev_err(&adapter->pdev->dev,
765 "Not privilege to query stats for func=%d", func);
766 return -EIO;
767 }
768
769 stats_addr = dma_alloc_coherent(&adapter->pdev->dev, stats_size,
770 &stats_dma_t, GFP_KERNEL);
771 if (!stats_addr) {
772 dev_err(&adapter->pdev->dev, "Unable to allocate memory\n");
773 return -ENOMEM;
774 }
775 memset(stats_addr, 0, stats_size);
776
777 arg1 = func | QLCNIC_STATS_VERSION << 8 | QLCNIC_STATS_PORT << 12;
778 arg1 |= rx_tx << 15 | stats_size << 16;
779
780 err = qlcnic_issue_cmd(adapter,
781 adapter->ahw->pci_func,
782 adapter->fw_hal_version,
783 arg1,
784 MSD(stats_dma_t),
785 LSD(stats_dma_t),
786 QLCNIC_CDRP_CMD_GET_ESWITCH_STATS);
787
788 if (!err) {
789 stats = (struct __qlcnic_esw_statistics *)stats_addr;
790 esw_stats->context_id = le16_to_cpu(stats->context_id);
791 esw_stats->version = le16_to_cpu(stats->version);
792 esw_stats->size = le16_to_cpu(stats->size);
793 esw_stats->multicast_frames =
794 le64_to_cpu(stats->multicast_frames);
795 esw_stats->broadcast_frames =
796 le64_to_cpu(stats->broadcast_frames);
797 esw_stats->unicast_frames = le64_to_cpu(stats->unicast_frames);
798 esw_stats->dropped_frames = le64_to_cpu(stats->dropped_frames);
799 esw_stats->local_frames = le64_to_cpu(stats->local_frames);
800 esw_stats->errors = le64_to_cpu(stats->errors);
801 esw_stats->numbytes = le64_to_cpu(stats->numbytes);
802 }
803
804 dma_free_coherent(&adapter->pdev->dev, stats_size, stats_addr,
805 stats_dma_t);
806 return err;
807 }
808
809 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *adapter, const u8 eswitch,
810 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
811
812 struct __qlcnic_esw_statistics port_stats;
813 u8 i;
814 int ret = -EIO;
815
816 if (esw_stats == NULL)
817 return -ENOMEM;
818 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
819 return -EIO;
820 if (adapter->npars == NULL)
821 return -EIO;
822
823 memset(esw_stats, 0, sizeof(u64));
824 esw_stats->unicast_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
825 esw_stats->multicast_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
826 esw_stats->broadcast_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
827 esw_stats->dropped_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
828 esw_stats->errors = QLCNIC_ESW_STATS_NOT_AVAIL;
829 esw_stats->local_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
830 esw_stats->numbytes = QLCNIC_ESW_STATS_NOT_AVAIL;
831 esw_stats->context_id = eswitch;
832
833 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++) {
834 if (adapter->npars[i].phy_port != eswitch)
835 continue;
836
837 memset(&port_stats, 0, sizeof(struct __qlcnic_esw_statistics));
838 if (qlcnic_get_port_stats(adapter, i, rx_tx, &port_stats))
839 continue;
840
841 esw_stats->size = port_stats.size;
842 esw_stats->version = port_stats.version;
843 QLCNIC_ADD_ESW_STATS(esw_stats->unicast_frames,
844 port_stats.unicast_frames);
845 QLCNIC_ADD_ESW_STATS(esw_stats->multicast_frames,
846 port_stats.multicast_frames);
847 QLCNIC_ADD_ESW_STATS(esw_stats->broadcast_frames,
848 port_stats.broadcast_frames);
849 QLCNIC_ADD_ESW_STATS(esw_stats->dropped_frames,
850 port_stats.dropped_frames);
851 QLCNIC_ADD_ESW_STATS(esw_stats->errors,
852 port_stats.errors);
853 QLCNIC_ADD_ESW_STATS(esw_stats->local_frames,
854 port_stats.local_frames);
855 QLCNIC_ADD_ESW_STATS(esw_stats->numbytes,
856 port_stats.numbytes);
857 ret = 0;
858 }
859 return ret;
860 }
861
862 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, const u8 func_esw,
863 const u8 port, const u8 rx_tx)
864 {
865
866 u32 arg1;
867
868 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
869 return -EIO;
870
871 if (func_esw == QLCNIC_STATS_PORT) {
872 if (port >= QLCNIC_MAX_PCI_FUNC)
873 goto err_ret;
874 } else if (func_esw == QLCNIC_STATS_ESWITCH) {
875 if (port >= QLCNIC_NIU_MAX_XG_PORTS)
876 goto err_ret;
877 } else {
878 goto err_ret;
879 }
880
881 if (rx_tx > QLCNIC_QUERY_TX_COUNTER)
882 goto err_ret;
883
884 arg1 = port | QLCNIC_STATS_VERSION << 8 | func_esw << 12;
885 arg1 |= BIT_14 | rx_tx << 15;
886
887 return qlcnic_issue_cmd(adapter,
888 adapter->ahw->pci_func,
889 adapter->fw_hal_version,
890 arg1,
891 0,
892 0,
893 QLCNIC_CDRP_CMD_GET_ESWITCH_STATS);
894
895 err_ret:
896 dev_err(&adapter->pdev->dev, "Invalid argument func_esw=%d port=%d"
897 "rx_ctx=%d\n", func_esw, port, rx_tx);
898 return -EIO;
899 }
900
901 static int
902 __qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
903 u32 *arg1, u32 *arg2)
904 {
905 int err = -EIO;
906 u8 pci_func;
907 pci_func = (*arg1 >> 8);
908 err = qlcnic_issue_cmd(adapter,
909 adapter->ahw->pci_func,
910 adapter->fw_hal_version,
911 *arg1,
912 0,
913 0,
914 QLCNIC_CDRP_CMD_GET_ESWITCH_PORT_CONFIG);
915
916 if (err == QLCNIC_RCODE_SUCCESS) {
917 *arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
918 *arg2 = QLCRD32(adapter, QLCNIC_ARG2_CRB_OFFSET);
919 dev_info(&adapter->pdev->dev,
920 "eSwitch port config for pci func %d\n", pci_func);
921 } else {
922 dev_err(&adapter->pdev->dev,
923 "Failed to get eswitch port config for pci func %d\n",
924 pci_func);
925 }
926 return err;
927 }
928 /* Configure eSwitch port
929 op_mode = 0 for setting default port behavior
930 op_mode = 1 for setting vlan id
931 op_mode = 2 for deleting vlan id
932 op_type = 0 for vlan_id
933 op_type = 1 for port vlan_id
934 */
935 int qlcnic_config_switch_port(struct qlcnic_adapter *adapter,
936 struct qlcnic_esw_func_cfg *esw_cfg)
937 {
938 int err = -EIO;
939 u32 arg1, arg2 = 0;
940 u8 pci_func;
941
942 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
943 return err;
944 pci_func = esw_cfg->pci_func;
945 arg1 = (adapter->npars[pci_func].phy_port & BIT_0);
946 arg1 |= (pci_func << 8);
947
948 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
949 return err;
950 arg1 &= ~(0x0ff << 8);
951 arg1 |= (pci_func << 8);
952 arg1 &= ~(BIT_2 | BIT_3);
953 switch (esw_cfg->op_mode) {
954 case QLCNIC_PORT_DEFAULTS:
955 arg1 |= (BIT_4 | BIT_6 | BIT_7);
956 arg2 |= (BIT_0 | BIT_1);
957 if (adapter->capabilities & QLCNIC_FW_CAPABILITY_TSO)
958 arg2 |= (BIT_2 | BIT_3);
959 if (!(esw_cfg->discard_tagged))
960 arg1 &= ~BIT_4;
961 if (!(esw_cfg->promisc_mode))
962 arg1 &= ~BIT_6;
963 if (!(esw_cfg->mac_override))
964 arg1 &= ~BIT_7;
965 if (!(esw_cfg->mac_anti_spoof))
966 arg2 &= ~BIT_0;
967 if (!(esw_cfg->offload_flags & BIT_0))
968 arg2 &= ~(BIT_1 | BIT_2 | BIT_3);
969 if (!(esw_cfg->offload_flags & BIT_1))
970 arg2 &= ~BIT_2;
971 if (!(esw_cfg->offload_flags & BIT_2))
972 arg2 &= ~BIT_3;
973 break;
974 case QLCNIC_ADD_VLAN:
975 arg1 |= (BIT_2 | BIT_5);
976 arg1 |= (esw_cfg->vlan_id << 16);
977 break;
978 case QLCNIC_DEL_VLAN:
979 arg1 |= (BIT_3 | BIT_5);
980 arg1 &= ~(0x0ffff << 16);
981 break;
982 default:
983 return err;
984 }
985
986 err = qlcnic_issue_cmd(adapter,
987 adapter->ahw->pci_func,
988 adapter->fw_hal_version,
989 arg1,
990 arg2,
991 0,
992 QLCNIC_CDRP_CMD_CONFIGURE_ESWITCH);
993
994 if (err != QLCNIC_RCODE_SUCCESS) {
995 dev_err(&adapter->pdev->dev,
996 "Failed to configure eswitch pci func %d\n", pci_func);
997 } else {
998 dev_info(&adapter->pdev->dev,
999 "Configured eSwitch for pci func %d\n", pci_func);
1000 }
1001
1002 return err;
1003 }
1004
1005 int
1006 qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1007 struct qlcnic_esw_func_cfg *esw_cfg)
1008 {
1009 u32 arg1, arg2;
1010 u8 phy_port;
1011 if (adapter->op_mode == QLCNIC_MGMT_FUNC)
1012 phy_port = adapter->npars[esw_cfg->pci_func].phy_port;
1013 else
1014 phy_port = adapter->physical_port;
1015 arg1 = phy_port;
1016 arg1 |= (esw_cfg->pci_func << 8);
1017 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1018 return -EIO;
1019
1020 esw_cfg->discard_tagged = !!(arg1 & BIT_4);
1021 esw_cfg->host_vlan_tag = !!(arg1 & BIT_5);
1022 esw_cfg->promisc_mode = !!(arg1 & BIT_6);
1023 esw_cfg->mac_override = !!(arg1 & BIT_7);
1024 esw_cfg->vlan_id = LSW(arg1 >> 16);
1025 esw_cfg->mac_anti_spoof = (arg2 & 0x1);
1026 esw_cfg->offload_flags = ((arg2 >> 1) & 0x7);
1027
1028 return 0;
1029 }
Linux kernel - Deliverables
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