1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2009 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include "net_driver.h"
30 #include "workarounds.h"
32 /**************************************************************************
36 **************************************************************************
39 /* Loopback mode names (see LOOPBACK_MODE()) */
40 const unsigned int efx_loopback_mode_max
= LOOPBACK_MAX
;
41 const char *efx_loopback_mode_names
[] = {
42 [LOOPBACK_NONE
] = "NONE",
43 [LOOPBACK_DATA
] = "DATAPATH",
44 [LOOPBACK_GMAC
] = "GMAC",
45 [LOOPBACK_XGMII
] = "XGMII",
46 [LOOPBACK_XGXS
] = "XGXS",
47 [LOOPBACK_XAUI
] = "XAUI",
48 [LOOPBACK_GMII
] = "GMII",
49 [LOOPBACK_SGMII
] = "SGMII",
50 [LOOPBACK_XGBR
] = "XGBR",
51 [LOOPBACK_XFI
] = "XFI",
52 [LOOPBACK_XAUI_FAR
] = "XAUI_FAR",
53 [LOOPBACK_GMII_FAR
] = "GMII_FAR",
54 [LOOPBACK_SGMII_FAR
] = "SGMII_FAR",
55 [LOOPBACK_XFI_FAR
] = "XFI_FAR",
56 [LOOPBACK_GPHY
] = "GPHY",
57 [LOOPBACK_PHYXS
] = "PHYXS",
58 [LOOPBACK_PCS
] = "PCS",
59 [LOOPBACK_PMAPMD
] = "PMA/PMD",
60 [LOOPBACK_XPORT
] = "XPORT",
61 [LOOPBACK_XGMII_WS
] = "XGMII_WS",
62 [LOOPBACK_XAUI_WS
] = "XAUI_WS",
63 [LOOPBACK_XAUI_WS_FAR
] = "XAUI_WS_FAR",
64 [LOOPBACK_XAUI_WS_NEAR
] = "XAUI_WS_NEAR",
65 [LOOPBACK_GMII_WS
] = "GMII_WS",
66 [LOOPBACK_XFI_WS
] = "XFI_WS",
67 [LOOPBACK_XFI_WS_FAR
] = "XFI_WS_FAR",
68 [LOOPBACK_PHYXS_WS
] = "PHYXS_WS",
71 /* Interrupt mode names (see INT_MODE())) */
72 const unsigned int efx_interrupt_mode_max
= EFX_INT_MODE_MAX
;
73 const char *efx_interrupt_mode_names
[] = {
74 [EFX_INT_MODE_MSIX
] = "MSI-X",
75 [EFX_INT_MODE_MSI
] = "MSI",
76 [EFX_INT_MODE_LEGACY
] = "legacy",
79 const unsigned int efx_reset_type_max
= RESET_TYPE_MAX
;
80 const char *efx_reset_type_names
[] = {
81 [RESET_TYPE_INVISIBLE
] = "INVISIBLE",
82 [RESET_TYPE_ALL
] = "ALL",
83 [RESET_TYPE_WORLD
] = "WORLD",
84 [RESET_TYPE_DISABLE
] = "DISABLE",
85 [RESET_TYPE_TX_WATCHDOG
] = "TX_WATCHDOG",
86 [RESET_TYPE_INT_ERROR
] = "INT_ERROR",
87 [RESET_TYPE_RX_RECOVERY
] = "RX_RECOVERY",
88 [RESET_TYPE_RX_DESC_FETCH
] = "RX_DESC_FETCH",
89 [RESET_TYPE_TX_DESC_FETCH
] = "TX_DESC_FETCH",
90 [RESET_TYPE_TX_SKIP
] = "TX_SKIP",
91 [RESET_TYPE_MC_FAILURE
] = "MC_FAILURE",
94 #define EFX_MAX_MTU (9 * 1024)
96 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
97 * queued onto this work queue. This is not a per-nic work queue, because
98 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
100 static struct workqueue_struct
*reset_workqueue
;
102 /**************************************************************************
104 * Configurable values
106 *************************************************************************/
109 * Use separate channels for TX and RX events
111 * Set this to 1 to use separate channels for TX and RX. It allows us
112 * to control interrupt affinity separately for TX and RX.
114 * This is only used in MSI-X interrupt mode
116 static unsigned int separate_tx_channels
;
117 module_param(separate_tx_channels
, uint
, 0644);
118 MODULE_PARM_DESC(separate_tx_channels
,
119 "Use separate channels for TX and RX");
121 /* This is the weight assigned to each of the (per-channel) virtual
124 static int napi_weight
= 64;
126 /* This is the time (in jiffies) between invocations of the hardware
127 * monitor, which checks for known hardware bugs and resets the
128 * hardware and driver as necessary.
130 unsigned int efx_monitor_interval
= 1 * HZ
;
132 /* This controls whether or not the driver will initialise devices
133 * with invalid MAC addresses stored in the EEPROM or flash. If true,
134 * such devices will be initialised with a random locally-generated
135 * MAC address. This allows for loading the sfc_mtd driver to
136 * reprogram the flash, even if the flash contents (including the MAC
137 * address) have previously been erased.
139 static unsigned int allow_bad_hwaddr
;
141 /* Initial interrupt moderation settings. They can be modified after
142 * module load with ethtool.
144 * The default for RX should strike a balance between increasing the
145 * round-trip latency and reducing overhead.
147 static unsigned int rx_irq_mod_usec
= 60;
149 /* Initial interrupt moderation settings. They can be modified after
150 * module load with ethtool.
152 * This default is chosen to ensure that a 10G link does not go idle
153 * while a TX queue is stopped after it has become full. A queue is
154 * restarted when it drops below half full. The time this takes (assuming
155 * worst case 3 descriptors per packet and 1024 descriptors) is
156 * 512 / 3 * 1.2 = 205 usec.
158 static unsigned int tx_irq_mod_usec
= 150;
160 /* This is the first interrupt mode to try out of:
165 static unsigned int interrupt_mode
;
167 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
168 * i.e. the number of CPUs among which we may distribute simultaneous
169 * interrupt handling.
171 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
172 * The default (0) means to assign an interrupt to each package (level II cache)
174 static unsigned int rss_cpus
;
175 module_param(rss_cpus
, uint
, 0444);
176 MODULE_PARM_DESC(rss_cpus
, "Number of CPUs to use for Receive-Side Scaling");
178 static int phy_flash_cfg
;
179 module_param(phy_flash_cfg
, int, 0644);
180 MODULE_PARM_DESC(phy_flash_cfg
, "Set PHYs into reflash mode initially");
182 static unsigned irq_adapt_low_thresh
= 10000;
183 module_param(irq_adapt_low_thresh
, uint
, 0644);
184 MODULE_PARM_DESC(irq_adapt_low_thresh
,
185 "Threshold score for reducing IRQ moderation");
187 static unsigned irq_adapt_high_thresh
= 20000;
188 module_param(irq_adapt_high_thresh
, uint
, 0644);
189 MODULE_PARM_DESC(irq_adapt_high_thresh
,
190 "Threshold score for increasing IRQ moderation");
192 /**************************************************************************
194 * Utility functions and prototypes
196 *************************************************************************/
197 static void efx_remove_channel(struct efx_channel
*channel
);
198 static void efx_remove_port(struct efx_nic
*efx
);
199 static void efx_fini_napi(struct efx_nic
*efx
);
200 static void efx_fini_channels(struct efx_nic
*efx
);
202 #define EFX_ASSERT_RESET_SERIALISED(efx) \
204 if ((efx->state == STATE_RUNNING) || \
205 (efx->state == STATE_DISABLED)) \
209 /**************************************************************************
211 * Event queue processing
213 *************************************************************************/
215 /* Process channel's event queue
217 * This function is responsible for processing the event queue of a
218 * single channel. The caller must guarantee that this function will
219 * never be concurrently called more than once on the same channel,
220 * though different channels may be being processed concurrently.
222 static int efx_process_channel(struct efx_channel
*channel
, int budget
)
224 struct efx_nic
*efx
= channel
->efx
;
227 if (unlikely(efx
->reset_pending
!= RESET_TYPE_NONE
||
231 spent
= efx_nic_process_eventq(channel
, budget
);
235 /* Deliver last RX packet. */
236 if (channel
->rx_pkt
) {
237 __efx_rx_packet(channel
, channel
->rx_pkt
,
238 channel
->rx_pkt_csummed
);
239 channel
->rx_pkt
= NULL
;
242 efx_rx_strategy(channel
);
244 efx_fast_push_rx_descriptors(&efx
->rx_queue
[channel
->channel
]);
249 /* Mark channel as finished processing
251 * Note that since we will not receive further interrupts for this
252 * channel before we finish processing and call the eventq_read_ack()
253 * method, there is no need to use the interrupt hold-off timers.
255 static inline void efx_channel_processed(struct efx_channel
*channel
)
257 /* The interrupt handler for this channel may set work_pending
258 * as soon as we acknowledge the events we've seen. Make sure
259 * it's cleared before then. */
260 channel
->work_pending
= false;
263 efx_nic_eventq_read_ack(channel
);
268 * NAPI guarantees serialisation of polls of the same device, which
269 * provides the guarantee required by efx_process_channel().
271 static int efx_poll(struct napi_struct
*napi
, int budget
)
273 struct efx_channel
*channel
=
274 container_of(napi
, struct efx_channel
, napi_str
);
277 EFX_TRACE(channel
->efx
, "channel %d NAPI poll executing on CPU %d\n",
278 channel
->channel
, raw_smp_processor_id());
280 spent
= efx_process_channel(channel
, budget
);
282 if (spent
< budget
) {
283 struct efx_nic
*efx
= channel
->efx
;
285 if (channel
->channel
< efx
->n_rx_channels
&&
286 efx
->irq_rx_adaptive
&&
287 unlikely(++channel
->irq_count
== 1000)) {
288 if (unlikely(channel
->irq_mod_score
<
289 irq_adapt_low_thresh
)) {
290 if (channel
->irq_moderation
> 1) {
291 channel
->irq_moderation
-= 1;
292 efx
->type
->push_irq_moderation(channel
);
294 } else if (unlikely(channel
->irq_mod_score
>
295 irq_adapt_high_thresh
)) {
296 if (channel
->irq_moderation
<
297 efx
->irq_rx_moderation
) {
298 channel
->irq_moderation
+= 1;
299 efx
->type
->push_irq_moderation(channel
);
302 channel
->irq_count
= 0;
303 channel
->irq_mod_score
= 0;
306 /* There is no race here; although napi_disable() will
307 * only wait for napi_complete(), this isn't a problem
308 * since efx_channel_processed() will have no effect if
309 * interrupts have already been disabled.
312 efx_channel_processed(channel
);
318 /* Process the eventq of the specified channel immediately on this CPU
320 * Disable hardware generated interrupts, wait for any existing
321 * processing to finish, then directly poll (and ack ) the eventq.
322 * Finally reenable NAPI and interrupts.
324 * Since we are touching interrupts the caller should hold the suspend lock
326 void efx_process_channel_now(struct efx_channel
*channel
)
328 struct efx_nic
*efx
= channel
->efx
;
330 BUG_ON(!channel
->enabled
);
332 /* Disable interrupts and wait for ISRs to complete */
333 efx_nic_disable_interrupts(efx
);
335 synchronize_irq(efx
->legacy_irq
);
337 synchronize_irq(channel
->irq
);
339 /* Wait for any NAPI processing to complete */
340 napi_disable(&channel
->napi_str
);
342 /* Poll the channel */
343 efx_process_channel(channel
, EFX_EVQ_SIZE
);
345 /* Ack the eventq. This may cause an interrupt to be generated
346 * when they are reenabled */
347 efx_channel_processed(channel
);
349 napi_enable(&channel
->napi_str
);
350 efx_nic_enable_interrupts(efx
);
353 /* Create event queue
354 * Event queue memory allocations are done only once. If the channel
355 * is reset, the memory buffer will be reused; this guards against
356 * errors during channel reset and also simplifies interrupt handling.
358 static int efx_probe_eventq(struct efx_channel
*channel
)
360 EFX_LOG(channel
->efx
, "chan %d create event queue\n", channel
->channel
);
362 return efx_nic_probe_eventq(channel
);
365 /* Prepare channel's event queue */
366 static void efx_init_eventq(struct efx_channel
*channel
)
368 EFX_LOG(channel
->efx
, "chan %d init event queue\n", channel
->channel
);
370 channel
->eventq_read_ptr
= 0;
372 efx_nic_init_eventq(channel
);
375 static void efx_fini_eventq(struct efx_channel
*channel
)
377 EFX_LOG(channel
->efx
, "chan %d fini event queue\n", channel
->channel
);
379 efx_nic_fini_eventq(channel
);
382 static void efx_remove_eventq(struct efx_channel
*channel
)
384 EFX_LOG(channel
->efx
, "chan %d remove event queue\n", channel
->channel
);
386 efx_nic_remove_eventq(channel
);
389 /**************************************************************************
393 *************************************************************************/
395 static int efx_probe_channel(struct efx_channel
*channel
)
397 struct efx_tx_queue
*tx_queue
;
398 struct efx_rx_queue
*rx_queue
;
401 EFX_LOG(channel
->efx
, "creating channel %d\n", channel
->channel
);
403 rc
= efx_probe_eventq(channel
);
407 efx_for_each_channel_tx_queue(tx_queue
, channel
) {
408 rc
= efx_probe_tx_queue(tx_queue
);
413 efx_for_each_channel_rx_queue(rx_queue
, channel
) {
414 rc
= efx_probe_rx_queue(rx_queue
);
419 channel
->n_rx_frm_trunc
= 0;
424 efx_for_each_channel_rx_queue(rx_queue
, channel
)
425 efx_remove_rx_queue(rx_queue
);
427 efx_for_each_channel_tx_queue(tx_queue
, channel
)
428 efx_remove_tx_queue(tx_queue
);
434 static void efx_set_channel_names(struct efx_nic
*efx
)
436 struct efx_channel
*channel
;
437 const char *type
= "";
440 efx_for_each_channel(channel
, efx
) {
441 number
= channel
->channel
;
442 if (efx
->n_channels
> efx
->n_rx_channels
) {
443 if (channel
->channel
< efx
->n_rx_channels
) {
447 number
-= efx
->n_rx_channels
;
450 snprintf(channel
->name
, sizeof(channel
->name
),
451 "%s%s-%d", efx
->name
, type
, number
);
455 /* Channels are shutdown and reinitialised whilst the NIC is running
456 * to propagate configuration changes (mtu, checksum offload), or
457 * to clear hardware error conditions
459 static void efx_init_channels(struct efx_nic
*efx
)
461 struct efx_tx_queue
*tx_queue
;
462 struct efx_rx_queue
*rx_queue
;
463 struct efx_channel
*channel
;
465 /* Calculate the rx buffer allocation parameters required to
466 * support the current MTU, including padding for header
467 * alignment and overruns.
469 efx
->rx_buffer_len
= (max(EFX_PAGE_IP_ALIGN
, NET_IP_ALIGN
) +
470 EFX_MAX_FRAME_LEN(efx
->net_dev
->mtu
) +
471 efx
->type
->rx_buffer_padding
);
472 efx
->rx_buffer_order
= get_order(efx
->rx_buffer_len
+
473 sizeof(struct efx_rx_page_state
));
475 /* Initialise the channels */
476 efx_for_each_channel(channel
, efx
) {
477 EFX_LOG(channel
->efx
, "init chan %d\n", channel
->channel
);
479 efx_init_eventq(channel
);
481 efx_for_each_channel_tx_queue(tx_queue
, channel
)
482 efx_init_tx_queue(tx_queue
);
484 /* The rx buffer allocation strategy is MTU dependent */
485 efx_rx_strategy(channel
);
487 efx_for_each_channel_rx_queue(rx_queue
, channel
)
488 efx_init_rx_queue(rx_queue
);
490 WARN_ON(channel
->rx_pkt
!= NULL
);
491 efx_rx_strategy(channel
);
495 /* This enables event queue processing and packet transmission.
497 * Note that this function is not allowed to fail, since that would
498 * introduce too much complexity into the suspend/resume path.
500 static void efx_start_channel(struct efx_channel
*channel
)
502 struct efx_rx_queue
*rx_queue
;
504 EFX_LOG(channel
->efx
, "starting chan %d\n", channel
->channel
);
506 /* The interrupt handler for this channel may set work_pending
507 * as soon as we enable it. Make sure it's cleared before
508 * then. Similarly, make sure it sees the enabled flag set. */
509 channel
->work_pending
= false;
510 channel
->enabled
= true;
513 /* Fill the queues before enabling NAPI */
514 efx_for_each_channel_rx_queue(rx_queue
, channel
)
515 efx_fast_push_rx_descriptors(rx_queue
);
517 napi_enable(&channel
->napi_str
);
520 /* This disables event queue processing and packet transmission.
521 * This function does not guarantee that all queue processing
522 * (e.g. RX refill) is complete.
524 static void efx_stop_channel(struct efx_channel
*channel
)
526 if (!channel
->enabled
)
529 EFX_LOG(channel
->efx
, "stop chan %d\n", channel
->channel
);
531 channel
->enabled
= false;
532 napi_disable(&channel
->napi_str
);
535 static void efx_fini_channels(struct efx_nic
*efx
)
537 struct efx_channel
*channel
;
538 struct efx_tx_queue
*tx_queue
;
539 struct efx_rx_queue
*rx_queue
;
542 EFX_ASSERT_RESET_SERIALISED(efx
);
543 BUG_ON(efx
->port_enabled
);
545 rc
= efx_nic_flush_queues(efx
);
546 if (rc
&& EFX_WORKAROUND_7803(efx
)) {
547 /* Schedule a reset to recover from the flush failure. The
548 * descriptor caches reference memory we're about to free,
549 * but falcon_reconfigure_mac_wrapper() won't reconnect
550 * the MACs because of the pending reset. */
551 EFX_ERR(efx
, "Resetting to recover from flush failure\n");
552 efx_schedule_reset(efx
, RESET_TYPE_ALL
);
554 EFX_ERR(efx
, "failed to flush queues\n");
556 EFX_LOG(efx
, "successfully flushed all queues\n");
559 efx_for_each_channel(channel
, efx
) {
560 EFX_LOG(channel
->efx
, "shut down chan %d\n", channel
->channel
);
562 efx_for_each_channel_rx_queue(rx_queue
, channel
)
563 efx_fini_rx_queue(rx_queue
);
564 efx_for_each_channel_tx_queue(tx_queue
, channel
)
565 efx_fini_tx_queue(tx_queue
);
566 efx_fini_eventq(channel
);
570 static void efx_remove_channel(struct efx_channel
*channel
)
572 struct efx_tx_queue
*tx_queue
;
573 struct efx_rx_queue
*rx_queue
;
575 EFX_LOG(channel
->efx
, "destroy chan %d\n", channel
->channel
);
577 efx_for_each_channel_rx_queue(rx_queue
, channel
)
578 efx_remove_rx_queue(rx_queue
);
579 efx_for_each_channel_tx_queue(tx_queue
, channel
)
580 efx_remove_tx_queue(tx_queue
);
581 efx_remove_eventq(channel
);
584 void efx_schedule_slow_fill(struct efx_rx_queue
*rx_queue
)
586 mod_timer(&rx_queue
->slow_fill
, jiffies
+ msecs_to_jiffies(100));
589 /**************************************************************************
593 **************************************************************************/
595 /* This ensures that the kernel is kept informed (via
596 * netif_carrier_on/off) of the link status, and also maintains the
597 * link status's stop on the port's TX queue.
599 void efx_link_status_changed(struct efx_nic
*efx
)
601 struct efx_link_state
*link_state
= &efx
->link_state
;
603 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
604 * that no events are triggered between unregister_netdev() and the
605 * driver unloading. A more general condition is that NETDEV_CHANGE
606 * can only be generated between NETDEV_UP and NETDEV_DOWN */
607 if (!netif_running(efx
->net_dev
))
610 if (efx
->port_inhibited
) {
611 netif_carrier_off(efx
->net_dev
);
615 if (link_state
->up
!= netif_carrier_ok(efx
->net_dev
)) {
616 efx
->n_link_state_changes
++;
619 netif_carrier_on(efx
->net_dev
);
621 netif_carrier_off(efx
->net_dev
);
624 /* Status message for kernel log */
625 if (link_state
->up
) {
626 EFX_INFO(efx
, "link up at %uMbps %s-duplex (MTU %d)%s\n",
627 link_state
->speed
, link_state
->fd
? "full" : "half",
629 (efx
->promiscuous
? " [PROMISC]" : ""));
631 EFX_INFO(efx
, "link down\n");
636 void efx_link_set_advertising(struct efx_nic
*efx
, u32 advertising
)
638 efx
->link_advertising
= advertising
;
640 if (advertising
& ADVERTISED_Pause
)
641 efx
->wanted_fc
|= (EFX_FC_TX
| EFX_FC_RX
);
643 efx
->wanted_fc
&= ~(EFX_FC_TX
| EFX_FC_RX
);
644 if (advertising
& ADVERTISED_Asym_Pause
)
645 efx
->wanted_fc
^= EFX_FC_TX
;
649 void efx_link_set_wanted_fc(struct efx_nic
*efx
, enum efx_fc_type wanted_fc
)
651 efx
->wanted_fc
= wanted_fc
;
652 if (efx
->link_advertising
) {
653 if (wanted_fc
& EFX_FC_RX
)
654 efx
->link_advertising
|= (ADVERTISED_Pause
|
655 ADVERTISED_Asym_Pause
);
657 efx
->link_advertising
&= ~(ADVERTISED_Pause
|
658 ADVERTISED_Asym_Pause
);
659 if (wanted_fc
& EFX_FC_TX
)
660 efx
->link_advertising
^= ADVERTISED_Asym_Pause
;
664 static void efx_fini_port(struct efx_nic
*efx
);
666 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
667 * the MAC appropriately. All other PHY configuration changes are pushed
668 * through phy_op->set_settings(), and pushed asynchronously to the MAC
669 * through efx_monitor().
671 * Callers must hold the mac_lock
673 int __efx_reconfigure_port(struct efx_nic
*efx
)
675 enum efx_phy_mode phy_mode
;
678 WARN_ON(!mutex_is_locked(&efx
->mac_lock
));
680 /* Serialise the promiscuous flag with efx_set_multicast_list. */
681 if (efx_dev_registered(efx
)) {
682 netif_addr_lock_bh(efx
->net_dev
);
683 netif_addr_unlock_bh(efx
->net_dev
);
686 /* Disable PHY transmit in mac level loopbacks */
687 phy_mode
= efx
->phy_mode
;
688 if (LOOPBACK_INTERNAL(efx
))
689 efx
->phy_mode
|= PHY_MODE_TX_DISABLED
;
691 efx
->phy_mode
&= ~PHY_MODE_TX_DISABLED
;
693 rc
= efx
->type
->reconfigure_port(efx
);
696 efx
->phy_mode
= phy_mode
;
701 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
703 int efx_reconfigure_port(struct efx_nic
*efx
)
707 EFX_ASSERT_RESET_SERIALISED(efx
);
709 mutex_lock(&efx
->mac_lock
);
710 rc
= __efx_reconfigure_port(efx
);
711 mutex_unlock(&efx
->mac_lock
);
716 /* Asynchronous work item for changing MAC promiscuity and multicast
717 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
719 static void efx_mac_work(struct work_struct
*data
)
721 struct efx_nic
*efx
= container_of(data
, struct efx_nic
, mac_work
);
723 mutex_lock(&efx
->mac_lock
);
724 if (efx
->port_enabled
) {
725 efx
->type
->push_multicast_hash(efx
);
726 efx
->mac_op
->reconfigure(efx
);
728 mutex_unlock(&efx
->mac_lock
);
731 static int efx_probe_port(struct efx_nic
*efx
)
735 EFX_LOG(efx
, "create port\n");
738 efx
->phy_mode
= PHY_MODE_SPECIAL
;
740 /* Connect up MAC/PHY operations table */
741 rc
= efx
->type
->probe_port(efx
);
745 /* Sanity check MAC address */
746 if (is_valid_ether_addr(efx
->mac_address
)) {
747 memcpy(efx
->net_dev
->dev_addr
, efx
->mac_address
, ETH_ALEN
);
749 EFX_ERR(efx
, "invalid MAC address %pM\n",
751 if (!allow_bad_hwaddr
) {
755 random_ether_addr(efx
->net_dev
->dev_addr
);
756 EFX_INFO(efx
, "using locally-generated MAC %pM\n",
757 efx
->net_dev
->dev_addr
);
763 efx_remove_port(efx
);
767 static int efx_init_port(struct efx_nic
*efx
)
771 EFX_LOG(efx
, "init port\n");
773 mutex_lock(&efx
->mac_lock
);
775 rc
= efx
->phy_op
->init(efx
);
779 efx
->port_initialized
= true;
781 /* Reconfigure the MAC before creating dma queues (required for
782 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
783 efx
->mac_op
->reconfigure(efx
);
785 /* Ensure the PHY advertises the correct flow control settings */
786 rc
= efx
->phy_op
->reconfigure(efx
);
790 mutex_unlock(&efx
->mac_lock
);
794 efx
->phy_op
->fini(efx
);
796 mutex_unlock(&efx
->mac_lock
);
800 static void efx_start_port(struct efx_nic
*efx
)
802 EFX_LOG(efx
, "start port\n");
803 BUG_ON(efx
->port_enabled
);
805 mutex_lock(&efx
->mac_lock
);
806 efx
->port_enabled
= true;
808 /* efx_mac_work() might have been scheduled after efx_stop_port(),
809 * and then cancelled by efx_flush_all() */
810 efx
->type
->push_multicast_hash(efx
);
811 efx
->mac_op
->reconfigure(efx
);
813 mutex_unlock(&efx
->mac_lock
);
816 /* Prevent efx_mac_work() and efx_monitor() from working */
817 static void efx_stop_port(struct efx_nic
*efx
)
819 EFX_LOG(efx
, "stop port\n");
821 mutex_lock(&efx
->mac_lock
);
822 efx
->port_enabled
= false;
823 mutex_unlock(&efx
->mac_lock
);
825 /* Serialise against efx_set_multicast_list() */
826 if (efx_dev_registered(efx
)) {
827 netif_addr_lock_bh(efx
->net_dev
);
828 netif_addr_unlock_bh(efx
->net_dev
);
832 static void efx_fini_port(struct efx_nic
*efx
)
834 EFX_LOG(efx
, "shut down port\n");
836 if (!efx
->port_initialized
)
839 efx
->phy_op
->fini(efx
);
840 efx
->port_initialized
= false;
842 efx
->link_state
.up
= false;
843 efx_link_status_changed(efx
);
846 static void efx_remove_port(struct efx_nic
*efx
)
848 EFX_LOG(efx
, "destroying port\n");
850 efx
->type
->remove_port(efx
);
853 /**************************************************************************
857 **************************************************************************/
859 /* This configures the PCI device to enable I/O and DMA. */
860 static int efx_init_io(struct efx_nic
*efx
)
862 struct pci_dev
*pci_dev
= efx
->pci_dev
;
863 dma_addr_t dma_mask
= efx
->type
->max_dma_mask
;
866 EFX_LOG(efx
, "initialising I/O\n");
868 rc
= pci_enable_device(pci_dev
);
870 EFX_ERR(efx
, "failed to enable PCI device\n");
874 pci_set_master(pci_dev
);
876 /* Set the PCI DMA mask. Try all possibilities from our
877 * genuine mask down to 32 bits, because some architectures
878 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
879 * masks event though they reject 46 bit masks.
881 while (dma_mask
> 0x7fffffffUL
) {
882 if (pci_dma_supported(pci_dev
, dma_mask
) &&
883 ((rc
= pci_set_dma_mask(pci_dev
, dma_mask
)) == 0))
888 EFX_ERR(efx
, "could not find a suitable DMA mask\n");
891 EFX_LOG(efx
, "using DMA mask %llx\n", (unsigned long long) dma_mask
);
892 rc
= pci_set_consistent_dma_mask(pci_dev
, dma_mask
);
894 /* pci_set_consistent_dma_mask() is not *allowed* to
895 * fail with a mask that pci_set_dma_mask() accepted,
896 * but just in case...
898 EFX_ERR(efx
, "failed to set consistent DMA mask\n");
902 efx
->membase_phys
= pci_resource_start(efx
->pci_dev
, EFX_MEM_BAR
);
903 rc
= pci_request_region(pci_dev
, EFX_MEM_BAR
, "sfc");
905 EFX_ERR(efx
, "request for memory BAR failed\n");
909 efx
->membase
= ioremap_nocache(efx
->membase_phys
,
910 efx
->type
->mem_map_size
);
912 EFX_ERR(efx
, "could not map memory BAR at %llx+%x\n",
913 (unsigned long long)efx
->membase_phys
,
914 efx
->type
->mem_map_size
);
918 EFX_LOG(efx
, "memory BAR at %llx+%x (virtual %p)\n",
919 (unsigned long long)efx
->membase_phys
,
920 efx
->type
->mem_map_size
, efx
->membase
);
925 pci_release_region(efx
->pci_dev
, EFX_MEM_BAR
);
927 efx
->membase_phys
= 0;
929 pci_disable_device(efx
->pci_dev
);
934 static void efx_fini_io(struct efx_nic
*efx
)
936 EFX_LOG(efx
, "shutting down I/O\n");
939 iounmap(efx
->membase
);
943 if (efx
->membase_phys
) {
944 pci_release_region(efx
->pci_dev
, EFX_MEM_BAR
);
945 efx
->membase_phys
= 0;
948 pci_disable_device(efx
->pci_dev
);
951 /* Get number of channels wanted. Each channel will have its own IRQ,
952 * 1 RX queue and/or 2 TX queues. */
953 static int efx_wanted_channels(void)
955 cpumask_var_t core_mask
;
959 if (unlikely(!zalloc_cpumask_var(&core_mask
, GFP_KERNEL
))) {
961 "sfc: RSS disabled due to allocation failure\n");
966 for_each_online_cpu(cpu
) {
967 if (!cpumask_test_cpu(cpu
, core_mask
)) {
969 cpumask_or(core_mask
, core_mask
,
970 topology_core_cpumask(cpu
));
974 free_cpumask_var(core_mask
);
978 /* Probe the number and type of interrupts we are able to obtain, and
979 * the resulting numbers of channels and RX queues.
981 static void efx_probe_interrupts(struct efx_nic
*efx
)
984 min_t(int, efx
->type
->phys_addr_channels
, EFX_MAX_CHANNELS
);
987 if (efx
->interrupt_mode
== EFX_INT_MODE_MSIX
) {
988 struct msix_entry xentries
[EFX_MAX_CHANNELS
];
991 n_channels
= efx_wanted_channels();
992 if (separate_tx_channels
)
994 n_channels
= min(n_channels
, max_channels
);
996 for (i
= 0; i
< n_channels
; i
++)
997 xentries
[i
].entry
= i
;
998 rc
= pci_enable_msix(efx
->pci_dev
, xentries
, n_channels
);
1000 EFX_ERR(efx
, "WARNING: Insufficient MSI-X vectors"
1001 " available (%d < %d).\n", rc
, n_channels
);
1002 EFX_ERR(efx
, "WARNING: Performance may be reduced.\n");
1003 EFX_BUG_ON_PARANOID(rc
>= n_channels
);
1005 rc
= pci_enable_msix(efx
->pci_dev
, xentries
,
1010 efx
->n_channels
= n_channels
;
1011 if (separate_tx_channels
) {
1012 efx
->n_tx_channels
=
1013 max(efx
->n_channels
/ 2, 1U);
1014 efx
->n_rx_channels
=
1015 max(efx
->n_channels
-
1016 efx
->n_tx_channels
, 1U);
1018 efx
->n_tx_channels
= efx
->n_channels
;
1019 efx
->n_rx_channels
= efx
->n_channels
;
1021 for (i
= 0; i
< n_channels
; i
++)
1022 efx
->channel
[i
].irq
= xentries
[i
].vector
;
1024 /* Fall back to single channel MSI */
1025 efx
->interrupt_mode
= EFX_INT_MODE_MSI
;
1026 EFX_ERR(efx
, "could not enable MSI-X\n");
1030 /* Try single interrupt MSI */
1031 if (efx
->interrupt_mode
== EFX_INT_MODE_MSI
) {
1032 efx
->n_channels
= 1;
1033 efx
->n_rx_channels
= 1;
1034 efx
->n_tx_channels
= 1;
1035 rc
= pci_enable_msi(efx
->pci_dev
);
1037 efx
->channel
[0].irq
= efx
->pci_dev
->irq
;
1039 EFX_ERR(efx
, "could not enable MSI\n");
1040 efx
->interrupt_mode
= EFX_INT_MODE_LEGACY
;
1044 /* Assume legacy interrupts */
1045 if (efx
->interrupt_mode
== EFX_INT_MODE_LEGACY
) {
1046 efx
->n_channels
= 1 + (separate_tx_channels
? 1 : 0);
1047 efx
->n_rx_channels
= 1;
1048 efx
->n_tx_channels
= 1;
1049 efx
->legacy_irq
= efx
->pci_dev
->irq
;
1053 static void efx_remove_interrupts(struct efx_nic
*efx
)
1055 struct efx_channel
*channel
;
1057 /* Remove MSI/MSI-X interrupts */
1058 efx_for_each_channel(channel
, efx
)
1060 pci_disable_msi(efx
->pci_dev
);
1061 pci_disable_msix(efx
->pci_dev
);
1063 /* Remove legacy interrupt */
1064 efx
->legacy_irq
= 0;
1067 static void efx_set_channels(struct efx_nic
*efx
)
1069 struct efx_channel
*channel
;
1070 struct efx_tx_queue
*tx_queue
;
1071 struct efx_rx_queue
*rx_queue
;
1072 unsigned tx_channel_offset
=
1073 separate_tx_channels
? efx
->n_channels
- efx
->n_tx_channels
: 0;
1075 efx_for_each_channel(channel
, efx
) {
1076 if (channel
->channel
- tx_channel_offset
< efx
->n_tx_channels
) {
1077 channel
->tx_queue
= &efx
->tx_queue
[
1078 (channel
->channel
- tx_channel_offset
) *
1080 efx_for_each_channel_tx_queue(tx_queue
, channel
)
1081 tx_queue
->channel
= channel
;
1085 efx_for_each_rx_queue(rx_queue
, efx
)
1086 rx_queue
->channel
= &efx
->channel
[rx_queue
->queue
];
1089 static int efx_probe_nic(struct efx_nic
*efx
)
1093 EFX_LOG(efx
, "creating NIC\n");
1095 /* Carry out hardware-type specific initialisation */
1096 rc
= efx
->type
->probe(efx
);
1100 /* Determine the number of channels and queues by trying to hook
1101 * in MSI-X interrupts. */
1102 efx_probe_interrupts(efx
);
1104 efx_set_channels(efx
);
1105 efx
->net_dev
->real_num_tx_queues
= efx
->n_tx_channels
;
1107 /* Initialise the interrupt moderation settings */
1108 efx_init_irq_moderation(efx
, tx_irq_mod_usec
, rx_irq_mod_usec
, true);
1113 static void efx_remove_nic(struct efx_nic
*efx
)
1115 EFX_LOG(efx
, "destroying NIC\n");
1117 efx_remove_interrupts(efx
);
1118 efx
->type
->remove(efx
);
1121 /**************************************************************************
1123 * NIC startup/shutdown
1125 *************************************************************************/
1127 static int efx_probe_all(struct efx_nic
*efx
)
1129 struct efx_channel
*channel
;
1133 rc
= efx_probe_nic(efx
);
1135 EFX_ERR(efx
, "failed to create NIC\n");
1140 rc
= efx_probe_port(efx
);
1142 EFX_ERR(efx
, "failed to create port\n");
1146 /* Create channels */
1147 efx_for_each_channel(channel
, efx
) {
1148 rc
= efx_probe_channel(channel
);
1150 EFX_ERR(efx
, "failed to create channel %d\n",
1155 efx_set_channel_names(efx
);
1160 efx_for_each_channel(channel
, efx
)
1161 efx_remove_channel(channel
);
1162 efx_remove_port(efx
);
1164 efx_remove_nic(efx
);
1169 /* Called after previous invocation(s) of efx_stop_all, restarts the
1170 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1171 * and ensures that the port is scheduled to be reconfigured.
1172 * This function is safe to call multiple times when the NIC is in any
1174 static void efx_start_all(struct efx_nic
*efx
)
1176 struct efx_channel
*channel
;
1178 EFX_ASSERT_RESET_SERIALISED(efx
);
1180 /* Check that it is appropriate to restart the interface. All
1181 * of these flags are safe to read under just the rtnl lock */
1182 if (efx
->port_enabled
)
1184 if ((efx
->state
!= STATE_RUNNING
) && (efx
->state
!= STATE_INIT
))
1186 if (efx_dev_registered(efx
) && !netif_running(efx
->net_dev
))
1189 /* Mark the port as enabled so port reconfigurations can start, then
1190 * restart the transmit interface early so the watchdog timer stops */
1191 efx_start_port(efx
);
1193 efx_for_each_channel(channel
, efx
) {
1194 if (efx_dev_registered(efx
))
1195 efx_wake_queue(channel
);
1196 efx_start_channel(channel
);
1199 efx_nic_enable_interrupts(efx
);
1201 /* Switch to event based MCDI completions after enabling interrupts.
1202 * If a reset has been scheduled, then we need to stay in polled mode.
1203 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1204 * reset_pending [modified from an atomic context], we instead guarantee
1205 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1206 efx_mcdi_mode_event(efx
);
1207 if (efx
->reset_pending
!= RESET_TYPE_NONE
)
1208 efx_mcdi_mode_poll(efx
);
1210 /* Start the hardware monitor if there is one. Otherwise (we're link
1211 * event driven), we have to poll the PHY because after an event queue
1212 * flush, we could have a missed a link state change */
1213 if (efx
->type
->monitor
!= NULL
) {
1214 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1215 efx_monitor_interval
);
1217 mutex_lock(&efx
->mac_lock
);
1218 if (efx
->phy_op
->poll(efx
))
1219 efx_link_status_changed(efx
);
1220 mutex_unlock(&efx
->mac_lock
);
1223 efx
->type
->start_stats(efx
);
1226 /* Flush all delayed work. Should only be called when no more delayed work
1227 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1228 * since we're holding the rtnl_lock at this point. */
1229 static void efx_flush_all(struct efx_nic
*efx
)
1231 /* Make sure the hardware monitor is stopped */
1232 cancel_delayed_work_sync(&efx
->monitor_work
);
1233 /* Stop scheduled port reconfigurations */
1234 cancel_work_sync(&efx
->mac_work
);
1237 /* Quiesce hardware and software without bringing the link down.
1238 * Safe to call multiple times, when the nic and interface is in any
1239 * state. The caller is guaranteed to subsequently be in a position
1240 * to modify any hardware and software state they see fit without
1242 static void efx_stop_all(struct efx_nic
*efx
)
1244 struct efx_channel
*channel
;
1246 EFX_ASSERT_RESET_SERIALISED(efx
);
1248 /* port_enabled can be read safely under the rtnl lock */
1249 if (!efx
->port_enabled
)
1252 efx
->type
->stop_stats(efx
);
1254 /* Switch to MCDI polling on Siena before disabling interrupts */
1255 efx_mcdi_mode_poll(efx
);
1257 /* Disable interrupts and wait for ISR to complete */
1258 efx_nic_disable_interrupts(efx
);
1259 if (efx
->legacy_irq
)
1260 synchronize_irq(efx
->legacy_irq
);
1261 efx_for_each_channel(channel
, efx
) {
1263 synchronize_irq(channel
->irq
);
1266 /* Stop all NAPI processing and synchronous rx refills */
1267 efx_for_each_channel(channel
, efx
)
1268 efx_stop_channel(channel
);
1270 /* Stop all asynchronous port reconfigurations. Since all
1271 * event processing has already been stopped, there is no
1272 * window to loose phy events */
1275 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1278 /* Stop the kernel transmit interface late, so the watchdog
1279 * timer isn't ticking over the flush */
1280 if (efx_dev_registered(efx
)) {
1281 struct efx_channel
*channel
;
1282 efx_for_each_channel(channel
, efx
)
1283 efx_stop_queue(channel
);
1284 netif_tx_lock_bh(efx
->net_dev
);
1285 netif_tx_unlock_bh(efx
->net_dev
);
1289 static void efx_remove_all(struct efx_nic
*efx
)
1291 struct efx_channel
*channel
;
1293 efx_for_each_channel(channel
, efx
)
1294 efx_remove_channel(channel
);
1295 efx_remove_port(efx
);
1296 efx_remove_nic(efx
);
1299 /**************************************************************************
1301 * Interrupt moderation
1303 **************************************************************************/
1305 static unsigned irq_mod_ticks(int usecs
, int resolution
)
1308 return 0; /* cannot receive interrupts ahead of time :-) */
1309 if (usecs
< resolution
)
1310 return 1; /* never round down to 0 */
1311 return usecs
/ resolution
;
1314 /* Set interrupt moderation parameters */
1315 void efx_init_irq_moderation(struct efx_nic
*efx
, int tx_usecs
, int rx_usecs
,
1318 struct efx_tx_queue
*tx_queue
;
1319 struct efx_rx_queue
*rx_queue
;
1320 unsigned tx_ticks
= irq_mod_ticks(tx_usecs
, EFX_IRQ_MOD_RESOLUTION
);
1321 unsigned rx_ticks
= irq_mod_ticks(rx_usecs
, EFX_IRQ_MOD_RESOLUTION
);
1323 EFX_ASSERT_RESET_SERIALISED(efx
);
1325 efx_for_each_tx_queue(tx_queue
, efx
)
1326 tx_queue
->channel
->irq_moderation
= tx_ticks
;
1328 efx
->irq_rx_adaptive
= rx_adaptive
;
1329 efx
->irq_rx_moderation
= rx_ticks
;
1330 efx_for_each_rx_queue(rx_queue
, efx
)
1331 rx_queue
->channel
->irq_moderation
= rx_ticks
;
1334 /**************************************************************************
1338 **************************************************************************/
1340 /* Run periodically off the general workqueue. Serialised against
1341 * efx_reconfigure_port via the mac_lock */
1342 static void efx_monitor(struct work_struct
*data
)
1344 struct efx_nic
*efx
= container_of(data
, struct efx_nic
,
1347 EFX_TRACE(efx
, "hardware monitor executing on CPU %d\n",
1348 raw_smp_processor_id());
1349 BUG_ON(efx
->type
->monitor
== NULL
);
1351 /* If the mac_lock is already held then it is likely a port
1352 * reconfiguration is already in place, which will likely do
1353 * most of the work of check_hw() anyway. */
1354 if (!mutex_trylock(&efx
->mac_lock
))
1356 if (!efx
->port_enabled
)
1358 efx
->type
->monitor(efx
);
1361 mutex_unlock(&efx
->mac_lock
);
1363 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1364 efx_monitor_interval
);
1367 /**************************************************************************
1371 *************************************************************************/
1374 * Context: process, rtnl_lock() held.
1376 static int efx_ioctl(struct net_device
*net_dev
, struct ifreq
*ifr
, int cmd
)
1378 struct efx_nic
*efx
= netdev_priv(net_dev
);
1379 struct mii_ioctl_data
*data
= if_mii(ifr
);
1381 EFX_ASSERT_RESET_SERIALISED(efx
);
1383 /* Convert phy_id from older PRTAD/DEVAD format */
1384 if ((cmd
== SIOCGMIIREG
|| cmd
== SIOCSMIIREG
) &&
1385 (data
->phy_id
& 0xfc00) == 0x0400)
1386 data
->phy_id
^= MDIO_PHY_ID_C45
| 0x0400;
1388 return mdio_mii_ioctl(&efx
->mdio
, data
, cmd
);
1391 /**************************************************************************
1395 **************************************************************************/
1397 static int efx_init_napi(struct efx_nic
*efx
)
1399 struct efx_channel
*channel
;
1401 efx_for_each_channel(channel
, efx
) {
1402 channel
->napi_dev
= efx
->net_dev
;
1403 netif_napi_add(channel
->napi_dev
, &channel
->napi_str
,
1404 efx_poll
, napi_weight
);
1409 static void efx_fini_napi(struct efx_nic
*efx
)
1411 struct efx_channel
*channel
;
1413 efx_for_each_channel(channel
, efx
) {
1414 if (channel
->napi_dev
)
1415 netif_napi_del(&channel
->napi_str
);
1416 channel
->napi_dev
= NULL
;
1420 /**************************************************************************
1422 * Kernel netpoll interface
1424 *************************************************************************/
1426 #ifdef CONFIG_NET_POLL_CONTROLLER
1428 /* Although in the common case interrupts will be disabled, this is not
1429 * guaranteed. However, all our work happens inside the NAPI callback,
1430 * so no locking is required.
1432 static void efx_netpoll(struct net_device
*net_dev
)
1434 struct efx_nic
*efx
= netdev_priv(net_dev
);
1435 struct efx_channel
*channel
;
1437 efx_for_each_channel(channel
, efx
)
1438 efx_schedule_channel(channel
);
1443 /**************************************************************************
1445 * Kernel net device interface
1447 *************************************************************************/
1449 /* Context: process, rtnl_lock() held. */
1450 static int efx_net_open(struct net_device
*net_dev
)
1452 struct efx_nic
*efx
= netdev_priv(net_dev
);
1453 EFX_ASSERT_RESET_SERIALISED(efx
);
1455 EFX_LOG(efx
, "opening device %s on CPU %d\n", net_dev
->name
,
1456 raw_smp_processor_id());
1458 if (efx
->state
== STATE_DISABLED
)
1460 if (efx
->phy_mode
& PHY_MODE_SPECIAL
)
1462 if (efx_mcdi_poll_reboot(efx
) && efx_reset(efx
, RESET_TYPE_ALL
))
1465 /* Notify the kernel of the link state polled during driver load,
1466 * before the monitor starts running */
1467 efx_link_status_changed(efx
);
1473 /* Context: process, rtnl_lock() held.
1474 * Note that the kernel will ignore our return code; this method
1475 * should really be a void.
1477 static int efx_net_stop(struct net_device
*net_dev
)
1479 struct efx_nic
*efx
= netdev_priv(net_dev
);
1481 EFX_LOG(efx
, "closing %s on CPU %d\n", net_dev
->name
,
1482 raw_smp_processor_id());
1484 if (efx
->state
!= STATE_DISABLED
) {
1485 /* Stop the device and flush all the channels */
1487 efx_fini_channels(efx
);
1488 efx_init_channels(efx
);
1494 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1495 static struct net_device_stats
*efx_net_stats(struct net_device
*net_dev
)
1497 struct efx_nic
*efx
= netdev_priv(net_dev
);
1498 struct efx_mac_stats
*mac_stats
= &efx
->mac_stats
;
1499 struct net_device_stats
*stats
= &net_dev
->stats
;
1501 spin_lock_bh(&efx
->stats_lock
);
1502 efx
->type
->update_stats(efx
);
1503 spin_unlock_bh(&efx
->stats_lock
);
1505 stats
->rx_packets
= mac_stats
->rx_packets
;
1506 stats
->tx_packets
= mac_stats
->tx_packets
;
1507 stats
->rx_bytes
= mac_stats
->rx_bytes
;
1508 stats
->tx_bytes
= mac_stats
->tx_bytes
;
1509 stats
->multicast
= mac_stats
->rx_multicast
;
1510 stats
->collisions
= mac_stats
->tx_collision
;
1511 stats
->rx_length_errors
= (mac_stats
->rx_gtjumbo
+
1512 mac_stats
->rx_length_error
);
1513 stats
->rx_over_errors
= efx
->n_rx_nodesc_drop_cnt
;
1514 stats
->rx_crc_errors
= mac_stats
->rx_bad
;
1515 stats
->rx_frame_errors
= mac_stats
->rx_align_error
;
1516 stats
->rx_fifo_errors
= mac_stats
->rx_overflow
;
1517 stats
->rx_missed_errors
= mac_stats
->rx_missed
;
1518 stats
->tx_window_errors
= mac_stats
->tx_late_collision
;
1520 stats
->rx_errors
= (stats
->rx_length_errors
+
1521 stats
->rx_crc_errors
+
1522 stats
->rx_frame_errors
+
1523 mac_stats
->rx_symbol_error
);
1524 stats
->tx_errors
= (stats
->tx_window_errors
+
1530 /* Context: netif_tx_lock held, BHs disabled. */
1531 static void efx_watchdog(struct net_device
*net_dev
)
1533 struct efx_nic
*efx
= netdev_priv(net_dev
);
1535 EFX_ERR(efx
, "TX stuck with port_enabled=%d: resetting channels\n",
1538 efx_schedule_reset(efx
, RESET_TYPE_TX_WATCHDOG
);
1542 /* Context: process, rtnl_lock() held. */
1543 static int efx_change_mtu(struct net_device
*net_dev
, int new_mtu
)
1545 struct efx_nic
*efx
= netdev_priv(net_dev
);
1548 EFX_ASSERT_RESET_SERIALISED(efx
);
1550 if (new_mtu
> EFX_MAX_MTU
)
1555 EFX_LOG(efx
, "changing MTU to %d\n", new_mtu
);
1557 efx_fini_channels(efx
);
1559 mutex_lock(&efx
->mac_lock
);
1560 /* Reconfigure the MAC before enabling the dma queues so that
1561 * the RX buffers don't overflow */
1562 net_dev
->mtu
= new_mtu
;
1563 efx
->mac_op
->reconfigure(efx
);
1564 mutex_unlock(&efx
->mac_lock
);
1566 efx_init_channels(efx
);
1572 static int efx_set_mac_address(struct net_device
*net_dev
, void *data
)
1574 struct efx_nic
*efx
= netdev_priv(net_dev
);
1575 struct sockaddr
*addr
= data
;
1576 char *new_addr
= addr
->sa_data
;
1578 EFX_ASSERT_RESET_SERIALISED(efx
);
1580 if (!is_valid_ether_addr(new_addr
)) {
1581 EFX_ERR(efx
, "invalid ethernet MAC address requested: %pM\n",
1586 memcpy(net_dev
->dev_addr
, new_addr
, net_dev
->addr_len
);
1588 /* Reconfigure the MAC */
1589 mutex_lock(&efx
->mac_lock
);
1590 efx
->mac_op
->reconfigure(efx
);
1591 mutex_unlock(&efx
->mac_lock
);
1596 /* Context: netif_addr_lock held, BHs disabled. */
1597 static void efx_set_multicast_list(struct net_device
*net_dev
)
1599 struct efx_nic
*efx
= netdev_priv(net_dev
);
1600 struct netdev_hw_addr
*ha
;
1601 union efx_multicast_hash
*mc_hash
= &efx
->multicast_hash
;
1605 efx
->promiscuous
= !!(net_dev
->flags
& IFF_PROMISC
);
1607 /* Build multicast hash table */
1608 if (efx
->promiscuous
|| (net_dev
->flags
& IFF_ALLMULTI
)) {
1609 memset(mc_hash
, 0xff, sizeof(*mc_hash
));
1611 memset(mc_hash
, 0x00, sizeof(*mc_hash
));
1612 netdev_for_each_mc_addr(ha
, net_dev
) {
1613 crc
= ether_crc_le(ETH_ALEN
, ha
->addr
);
1614 bit
= crc
& (EFX_MCAST_HASH_ENTRIES
- 1);
1615 set_bit_le(bit
, mc_hash
->byte
);
1618 /* Broadcast packets go through the multicast hash filter.
1619 * ether_crc_le() of the broadcast address is 0xbe2612ff
1620 * so we always add bit 0xff to the mask.
1622 set_bit_le(0xff, mc_hash
->byte
);
1625 if (efx
->port_enabled
)
1626 queue_work(efx
->workqueue
, &efx
->mac_work
);
1627 /* Otherwise efx_start_port() will do this */
1630 static const struct net_device_ops efx_netdev_ops
= {
1631 .ndo_open
= efx_net_open
,
1632 .ndo_stop
= efx_net_stop
,
1633 .ndo_get_stats
= efx_net_stats
,
1634 .ndo_tx_timeout
= efx_watchdog
,
1635 .ndo_start_xmit
= efx_hard_start_xmit
,
1636 .ndo_validate_addr
= eth_validate_addr
,
1637 .ndo_do_ioctl
= efx_ioctl
,
1638 .ndo_change_mtu
= efx_change_mtu
,
1639 .ndo_set_mac_address
= efx_set_mac_address
,
1640 .ndo_set_multicast_list
= efx_set_multicast_list
,
1641 #ifdef CONFIG_NET_POLL_CONTROLLER
1642 .ndo_poll_controller
= efx_netpoll
,
1646 static void efx_update_name(struct efx_nic
*efx
)
1648 strcpy(efx
->name
, efx
->net_dev
->name
);
1649 efx_mtd_rename(efx
);
1650 efx_set_channel_names(efx
);
1653 static int efx_netdev_event(struct notifier_block
*this,
1654 unsigned long event
, void *ptr
)
1656 struct net_device
*net_dev
= ptr
;
1658 if (net_dev
->netdev_ops
== &efx_netdev_ops
&&
1659 event
== NETDEV_CHANGENAME
)
1660 efx_update_name(netdev_priv(net_dev
));
1665 static struct notifier_block efx_netdev_notifier
= {
1666 .notifier_call
= efx_netdev_event
,
1670 show_phy_type(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1672 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
1673 return sprintf(buf
, "%d\n", efx
->phy_type
);
1675 static DEVICE_ATTR(phy_type
, 0644, show_phy_type
, NULL
);
1677 static int efx_register_netdev(struct efx_nic
*efx
)
1679 struct net_device
*net_dev
= efx
->net_dev
;
1682 net_dev
->watchdog_timeo
= 5 * HZ
;
1683 net_dev
->irq
= efx
->pci_dev
->irq
;
1684 net_dev
->netdev_ops
= &efx_netdev_ops
;
1685 SET_NETDEV_DEV(net_dev
, &efx
->pci_dev
->dev
);
1686 SET_ETHTOOL_OPS(net_dev
, &efx_ethtool_ops
);
1688 /* Clear MAC statistics */
1689 efx
->mac_op
->update_stats(efx
);
1690 memset(&efx
->mac_stats
, 0, sizeof(efx
->mac_stats
));
1694 rc
= dev_alloc_name(net_dev
, net_dev
->name
);
1697 efx_update_name(efx
);
1699 rc
= register_netdevice(net_dev
);
1703 /* Always start with carrier off; PHY events will detect the link */
1704 netif_carrier_off(efx
->net_dev
);
1708 rc
= device_create_file(&efx
->pci_dev
->dev
, &dev_attr_phy_type
);
1710 EFX_ERR(efx
, "failed to init net dev attributes\n");
1711 goto fail_registered
;
1718 EFX_ERR(efx
, "could not register net dev\n");
1722 unregister_netdev(net_dev
);
1726 static void efx_unregister_netdev(struct efx_nic
*efx
)
1728 struct efx_tx_queue
*tx_queue
;
1733 BUG_ON(netdev_priv(efx
->net_dev
) != efx
);
1735 /* Free up any skbs still remaining. This has to happen before
1736 * we try to unregister the netdev as running their destructors
1737 * may be needed to get the device ref. count to 0. */
1738 efx_for_each_tx_queue(tx_queue
, efx
)
1739 efx_release_tx_buffers(tx_queue
);
1741 if (efx_dev_registered(efx
)) {
1742 strlcpy(efx
->name
, pci_name(efx
->pci_dev
), sizeof(efx
->name
));
1743 device_remove_file(&efx
->pci_dev
->dev
, &dev_attr_phy_type
);
1744 unregister_netdev(efx
->net_dev
);
1748 /**************************************************************************
1750 * Device reset and suspend
1752 **************************************************************************/
1754 /* Tears down the entire software state and most of the hardware state
1756 void efx_reset_down(struct efx_nic
*efx
, enum reset_type method
)
1758 EFX_ASSERT_RESET_SERIALISED(efx
);
1761 mutex_lock(&efx
->mac_lock
);
1762 mutex_lock(&efx
->spi_lock
);
1764 efx_fini_channels(efx
);
1765 if (efx
->port_initialized
&& method
!= RESET_TYPE_INVISIBLE
)
1766 efx
->phy_op
->fini(efx
);
1767 efx
->type
->fini(efx
);
1770 /* This function will always ensure that the locks acquired in
1771 * efx_reset_down() are released. A failure return code indicates
1772 * that we were unable to reinitialise the hardware, and the
1773 * driver should be disabled. If ok is false, then the rx and tx
1774 * engines are not restarted, pending a RESET_DISABLE. */
1775 int efx_reset_up(struct efx_nic
*efx
, enum reset_type method
, bool ok
)
1779 EFX_ASSERT_RESET_SERIALISED(efx
);
1781 rc
= efx
->type
->init(efx
);
1783 EFX_ERR(efx
, "failed to initialise NIC\n");
1790 if (efx
->port_initialized
&& method
!= RESET_TYPE_INVISIBLE
) {
1791 rc
= efx
->phy_op
->init(efx
);
1794 if (efx
->phy_op
->reconfigure(efx
))
1795 EFX_ERR(efx
, "could not restore PHY settings\n");
1798 efx
->mac_op
->reconfigure(efx
);
1800 efx_init_channels(efx
);
1802 mutex_unlock(&efx
->spi_lock
);
1803 mutex_unlock(&efx
->mac_lock
);
1810 efx
->port_initialized
= false;
1812 mutex_unlock(&efx
->spi_lock
);
1813 mutex_unlock(&efx
->mac_lock
);
1818 /* Reset the NIC using the specified method. Note that the reset may
1819 * fail, in which case the card will be left in an unusable state.
1821 * Caller must hold the rtnl_lock.
1823 int efx_reset(struct efx_nic
*efx
, enum reset_type method
)
1828 EFX_INFO(efx
, "resetting (%s)\n", RESET_TYPE(method
));
1830 efx_reset_down(efx
, method
);
1832 rc
= efx
->type
->reset(efx
, method
);
1834 EFX_ERR(efx
, "failed to reset hardware\n");
1838 /* Allow resets to be rescheduled. */
1839 efx
->reset_pending
= RESET_TYPE_NONE
;
1841 /* Reinitialise bus-mastering, which may have been turned off before
1842 * the reset was scheduled. This is still appropriate, even in the
1843 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
1844 * can respond to requests. */
1845 pci_set_master(efx
->pci_dev
);
1848 /* Leave device stopped if necessary */
1849 disabled
= rc
|| method
== RESET_TYPE_DISABLE
;
1850 rc2
= efx_reset_up(efx
, method
, !disabled
);
1858 dev_close(efx
->net_dev
);
1859 EFX_ERR(efx
, "has been disabled\n");
1860 efx
->state
= STATE_DISABLED
;
1862 EFX_LOG(efx
, "reset complete\n");
1867 /* The worker thread exists so that code that cannot sleep can
1868 * schedule a reset for later.
1870 static void efx_reset_work(struct work_struct
*data
)
1872 struct efx_nic
*efx
= container_of(data
, struct efx_nic
, reset_work
);
1874 if (efx
->reset_pending
== RESET_TYPE_NONE
)
1877 /* If we're not RUNNING then don't reset. Leave the reset_pending
1878 * flag set so that efx_pci_probe_main will be retried */
1879 if (efx
->state
!= STATE_RUNNING
) {
1880 EFX_INFO(efx
, "scheduled reset quenched. NIC not RUNNING\n");
1885 (void)efx_reset(efx
, efx
->reset_pending
);
1889 void efx_schedule_reset(struct efx_nic
*efx
, enum reset_type type
)
1891 enum reset_type method
;
1893 if (efx
->reset_pending
!= RESET_TYPE_NONE
) {
1894 EFX_INFO(efx
, "quenching already scheduled reset\n");
1899 case RESET_TYPE_INVISIBLE
:
1900 case RESET_TYPE_ALL
:
1901 case RESET_TYPE_WORLD
:
1902 case RESET_TYPE_DISABLE
:
1905 case RESET_TYPE_RX_RECOVERY
:
1906 case RESET_TYPE_RX_DESC_FETCH
:
1907 case RESET_TYPE_TX_DESC_FETCH
:
1908 case RESET_TYPE_TX_SKIP
:
1909 method
= RESET_TYPE_INVISIBLE
;
1911 case RESET_TYPE_MC_FAILURE
:
1913 method
= RESET_TYPE_ALL
;
1918 EFX_LOG(efx
, "scheduling %s reset for %s\n",
1919 RESET_TYPE(method
), RESET_TYPE(type
));
1921 EFX_LOG(efx
, "scheduling %s reset\n", RESET_TYPE(method
));
1923 efx
->reset_pending
= method
;
1925 /* efx_process_channel() will no longer read events once a
1926 * reset is scheduled. So switch back to poll'd MCDI completions. */
1927 efx_mcdi_mode_poll(efx
);
1929 queue_work(reset_workqueue
, &efx
->reset_work
);
1932 /**************************************************************************
1934 * List of NICs we support
1936 **************************************************************************/
1938 /* PCI device ID table */
1939 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table
) = {
1940 {PCI_DEVICE(EFX_VENDID_SFC
, FALCON_A_P_DEVID
),
1941 .driver_data
= (unsigned long) &falcon_a1_nic_type
},
1942 {PCI_DEVICE(EFX_VENDID_SFC
, FALCON_B_P_DEVID
),
1943 .driver_data
= (unsigned long) &falcon_b0_nic_type
},
1944 {PCI_DEVICE(EFX_VENDID_SFC
, BETHPAGE_A_P_DEVID
),
1945 .driver_data
= (unsigned long) &siena_a0_nic_type
},
1946 {PCI_DEVICE(EFX_VENDID_SFC
, SIENA_A_P_DEVID
),
1947 .driver_data
= (unsigned long) &siena_a0_nic_type
},
1948 {0} /* end of list */
1951 /**************************************************************************
1953 * Dummy PHY/MAC operations
1955 * Can be used for some unimplemented operations
1956 * Needed so all function pointers are valid and do not have to be tested
1959 **************************************************************************/
1960 int efx_port_dummy_op_int(struct efx_nic
*efx
)
1964 void efx_port_dummy_op_void(struct efx_nic
*efx
) {}
1965 void efx_port_dummy_op_set_id_led(struct efx_nic
*efx
, enum efx_led_mode mode
)
1968 bool efx_port_dummy_op_poll(struct efx_nic
*efx
)
1973 static struct efx_phy_operations efx_dummy_phy_operations
= {
1974 .init
= efx_port_dummy_op_int
,
1975 .reconfigure
= efx_port_dummy_op_int
,
1976 .poll
= efx_port_dummy_op_poll
,
1977 .fini
= efx_port_dummy_op_void
,
1980 /**************************************************************************
1984 **************************************************************************/
1986 /* This zeroes out and then fills in the invariants in a struct
1987 * efx_nic (including all sub-structures).
1989 static int efx_init_struct(struct efx_nic
*efx
, struct efx_nic_type
*type
,
1990 struct pci_dev
*pci_dev
, struct net_device
*net_dev
)
1992 struct efx_channel
*channel
;
1993 struct efx_tx_queue
*tx_queue
;
1994 struct efx_rx_queue
*rx_queue
;
1997 /* Initialise common structures */
1998 memset(efx
, 0, sizeof(*efx
));
1999 spin_lock_init(&efx
->biu_lock
);
2000 mutex_init(&efx
->mdio_lock
);
2001 mutex_init(&efx
->spi_lock
);
2002 #ifdef CONFIG_SFC_MTD
2003 INIT_LIST_HEAD(&efx
->mtd_list
);
2005 INIT_WORK(&efx
->reset_work
, efx_reset_work
);
2006 INIT_DELAYED_WORK(&efx
->monitor_work
, efx_monitor
);
2007 efx
->pci_dev
= pci_dev
;
2008 efx
->state
= STATE_INIT
;
2009 efx
->reset_pending
= RESET_TYPE_NONE
;
2010 strlcpy(efx
->name
, pci_name(pci_dev
), sizeof(efx
->name
));
2012 efx
->net_dev
= net_dev
;
2013 efx
->rx_checksum_enabled
= true;
2014 spin_lock_init(&efx
->stats_lock
);
2015 mutex_init(&efx
->mac_lock
);
2016 efx
->mac_op
= type
->default_mac_ops
;
2017 efx
->phy_op
= &efx_dummy_phy_operations
;
2018 efx
->mdio
.dev
= net_dev
;
2019 INIT_WORK(&efx
->mac_work
, efx_mac_work
);
2021 for (i
= 0; i
< EFX_MAX_CHANNELS
; i
++) {
2022 channel
= &efx
->channel
[i
];
2024 channel
->channel
= i
;
2025 channel
->work_pending
= false;
2026 spin_lock_init(&channel
->tx_stop_lock
);
2027 atomic_set(&channel
->tx_stop_count
, 1);
2029 for (i
= 0; i
< EFX_MAX_TX_QUEUES
; i
++) {
2030 tx_queue
= &efx
->tx_queue
[i
];
2031 tx_queue
->efx
= efx
;
2032 tx_queue
->queue
= i
;
2033 tx_queue
->buffer
= NULL
;
2034 tx_queue
->channel
= &efx
->channel
[0]; /* for safety */
2035 tx_queue
->tso_headers_free
= NULL
;
2037 for (i
= 0; i
< EFX_MAX_RX_QUEUES
; i
++) {
2038 rx_queue
= &efx
->rx_queue
[i
];
2039 rx_queue
->efx
= efx
;
2040 rx_queue
->queue
= i
;
2041 rx_queue
->channel
= &efx
->channel
[0]; /* for safety */
2042 rx_queue
->buffer
= NULL
;
2043 setup_timer(&rx_queue
->slow_fill
, efx_rx_slow_fill
,
2044 (unsigned long)rx_queue
);
2049 /* As close as we can get to guaranteeing that we don't overflow */
2050 BUILD_BUG_ON(EFX_EVQ_SIZE
< EFX_TXQ_SIZE
+ EFX_RXQ_SIZE
);
2052 EFX_BUG_ON_PARANOID(efx
->type
->phys_addr_channels
> EFX_MAX_CHANNELS
);
2054 /* Higher numbered interrupt modes are less capable! */
2055 efx
->interrupt_mode
= max(efx
->type
->max_interrupt_mode
,
2058 /* Would be good to use the net_dev name, but we're too early */
2059 snprintf(efx
->workqueue_name
, sizeof(efx
->workqueue_name
), "sfc%s",
2061 efx
->workqueue
= create_singlethread_workqueue(efx
->workqueue_name
);
2062 if (!efx
->workqueue
)
2068 static void efx_fini_struct(struct efx_nic
*efx
)
2070 if (efx
->workqueue
) {
2071 destroy_workqueue(efx
->workqueue
);
2072 efx
->workqueue
= NULL
;
2076 /**************************************************************************
2080 **************************************************************************/
2082 /* Main body of final NIC shutdown code
2083 * This is called only at module unload (or hotplug removal).
2085 static void efx_pci_remove_main(struct efx_nic
*efx
)
2087 efx_nic_fini_interrupt(efx
);
2088 efx_fini_channels(efx
);
2090 efx
->type
->fini(efx
);
2092 efx_remove_all(efx
);
2095 /* Final NIC shutdown
2096 * This is called only at module unload (or hotplug removal).
2098 static void efx_pci_remove(struct pci_dev
*pci_dev
)
2100 struct efx_nic
*efx
;
2102 efx
= pci_get_drvdata(pci_dev
);
2106 /* Mark the NIC as fini, then stop the interface */
2108 efx
->state
= STATE_FINI
;
2109 dev_close(efx
->net_dev
);
2111 /* Allow any queued efx_resets() to complete */
2114 efx_unregister_netdev(efx
);
2116 efx_mtd_remove(efx
);
2118 /* Wait for any scheduled resets to complete. No more will be
2119 * scheduled from this point because efx_stop_all() has been
2120 * called, we are no longer registered with driverlink, and
2121 * the net_device's have been removed. */
2122 cancel_work_sync(&efx
->reset_work
);
2124 efx_pci_remove_main(efx
);
2127 EFX_LOG(efx
, "shutdown successful\n");
2129 pci_set_drvdata(pci_dev
, NULL
);
2130 efx_fini_struct(efx
);
2131 free_netdev(efx
->net_dev
);
2134 /* Main body of NIC initialisation
2135 * This is called at module load (or hotplug insertion, theoretically).
2137 static int efx_pci_probe_main(struct efx_nic
*efx
)
2141 /* Do start-of-day initialisation */
2142 rc
= efx_probe_all(efx
);
2146 rc
= efx_init_napi(efx
);
2150 rc
= efx
->type
->init(efx
);
2152 EFX_ERR(efx
, "failed to initialise NIC\n");
2156 rc
= efx_init_port(efx
);
2158 EFX_ERR(efx
, "failed to initialise port\n");
2162 efx_init_channels(efx
);
2164 rc
= efx_nic_init_interrupt(efx
);
2171 efx_fini_channels(efx
);
2174 efx
->type
->fini(efx
);
2178 efx_remove_all(efx
);
2183 /* NIC initialisation
2185 * This is called at module load (or hotplug insertion,
2186 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2187 * sets up and registers the network devices with the kernel and hooks
2188 * the interrupt service routine. It does not prepare the device for
2189 * transmission; this is left to the first time one of the network
2190 * interfaces is brought up (i.e. efx_net_open).
2192 static int __devinit
efx_pci_probe(struct pci_dev
*pci_dev
,
2193 const struct pci_device_id
*entry
)
2195 struct efx_nic_type
*type
= (struct efx_nic_type
*) entry
->driver_data
;
2196 struct net_device
*net_dev
;
2197 struct efx_nic
*efx
;
2200 /* Allocate and initialise a struct net_device and struct efx_nic */
2201 net_dev
= alloc_etherdev_mq(sizeof(*efx
), EFX_MAX_CORE_TX_QUEUES
);
2204 net_dev
->features
|= (type
->offload_features
| NETIF_F_SG
|
2205 NETIF_F_HIGHDMA
| NETIF_F_TSO
|
2207 if (type
->offload_features
& NETIF_F_V6_CSUM
)
2208 net_dev
->features
|= NETIF_F_TSO6
;
2209 /* Mask for features that also apply to VLAN devices */
2210 net_dev
->vlan_features
|= (NETIF_F_ALL_CSUM
| NETIF_F_SG
|
2211 NETIF_F_HIGHDMA
| NETIF_F_TSO
);
2212 efx
= netdev_priv(net_dev
);
2213 pci_set_drvdata(pci_dev
, efx
);
2214 rc
= efx_init_struct(efx
, type
, pci_dev
, net_dev
);
2218 EFX_INFO(efx
, "Solarflare Communications NIC detected\n");
2220 /* Set up basic I/O (BAR mappings etc) */
2221 rc
= efx_init_io(efx
);
2225 /* No serialisation is required with the reset path because
2226 * we're in STATE_INIT. */
2227 for (i
= 0; i
< 5; i
++) {
2228 rc
= efx_pci_probe_main(efx
);
2230 /* Serialise against efx_reset(). No more resets will be
2231 * scheduled since efx_stop_all() has been called, and we
2232 * have not and never have been registered with either
2233 * the rtnetlink or driverlink layers. */
2234 cancel_work_sync(&efx
->reset_work
);
2237 if (efx
->reset_pending
!= RESET_TYPE_NONE
) {
2238 /* If there was a scheduled reset during
2239 * probe, the NIC is probably hosed anyway */
2240 efx_pci_remove_main(efx
);
2247 /* Retry if a recoverably reset event has been scheduled */
2248 if ((efx
->reset_pending
!= RESET_TYPE_INVISIBLE
) &&
2249 (efx
->reset_pending
!= RESET_TYPE_ALL
))
2252 efx
->reset_pending
= RESET_TYPE_NONE
;
2256 EFX_ERR(efx
, "Could not reset NIC\n");
2260 /* Switch to the running state before we expose the device to the OS,
2261 * so that dev_open()|efx_start_all() will actually start the device */
2262 efx
->state
= STATE_RUNNING
;
2264 rc
= efx_register_netdev(efx
);
2268 EFX_LOG(efx
, "initialisation successful\n");
2271 efx_mtd_probe(efx
); /* allowed to fail */
2276 efx_pci_remove_main(efx
);
2281 efx_fini_struct(efx
);
2284 EFX_LOG(efx
, "initialisation failed. rc=%d\n", rc
);
2285 free_netdev(net_dev
);
2289 static int efx_pm_freeze(struct device
*dev
)
2291 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
2293 efx
->state
= STATE_FINI
;
2295 netif_device_detach(efx
->net_dev
);
2298 efx_fini_channels(efx
);
2303 static int efx_pm_thaw(struct device
*dev
)
2305 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
2307 efx
->state
= STATE_INIT
;
2309 efx_init_channels(efx
);
2311 mutex_lock(&efx
->mac_lock
);
2312 efx
->phy_op
->reconfigure(efx
);
2313 mutex_unlock(&efx
->mac_lock
);
2317 netif_device_attach(efx
->net_dev
);
2319 efx
->state
= STATE_RUNNING
;
2321 efx
->type
->resume_wol(efx
);
2323 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2324 queue_work(reset_workqueue
, &efx
->reset_work
);
2329 static int efx_pm_poweroff(struct device
*dev
)
2331 struct pci_dev
*pci_dev
= to_pci_dev(dev
);
2332 struct efx_nic
*efx
= pci_get_drvdata(pci_dev
);
2334 efx
->type
->fini(efx
);
2336 efx
->reset_pending
= RESET_TYPE_NONE
;
2338 pci_save_state(pci_dev
);
2339 return pci_set_power_state(pci_dev
, PCI_D3hot
);
2342 /* Used for both resume and restore */
2343 static int efx_pm_resume(struct device
*dev
)
2345 struct pci_dev
*pci_dev
= to_pci_dev(dev
);
2346 struct efx_nic
*efx
= pci_get_drvdata(pci_dev
);
2349 rc
= pci_set_power_state(pci_dev
, PCI_D0
);
2352 pci_restore_state(pci_dev
);
2353 rc
= pci_enable_device(pci_dev
);
2356 pci_set_master(efx
->pci_dev
);
2357 rc
= efx
->type
->reset(efx
, RESET_TYPE_ALL
);
2360 rc
= efx
->type
->init(efx
);
2367 static int efx_pm_suspend(struct device
*dev
)
2372 rc
= efx_pm_poweroff(dev
);
2378 static struct dev_pm_ops efx_pm_ops
= {
2379 .suspend
= efx_pm_suspend
,
2380 .resume
= efx_pm_resume
,
2381 .freeze
= efx_pm_freeze
,
2382 .thaw
= efx_pm_thaw
,
2383 .poweroff
= efx_pm_poweroff
,
2384 .restore
= efx_pm_resume
,
2387 static struct pci_driver efx_pci_driver
= {
2388 .name
= EFX_DRIVER_NAME
,
2389 .id_table
= efx_pci_table
,
2390 .probe
= efx_pci_probe
,
2391 .remove
= efx_pci_remove
,
2392 .driver
.pm
= &efx_pm_ops
,
2395 /**************************************************************************
2397 * Kernel module interface
2399 *************************************************************************/
2401 module_param(interrupt_mode
, uint
, 0444);
2402 MODULE_PARM_DESC(interrupt_mode
,
2403 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2405 static int __init
efx_init_module(void)
2409 printk(KERN_INFO
"Solarflare NET driver v" EFX_DRIVER_VERSION
"\n");
2411 rc
= register_netdevice_notifier(&efx_netdev_notifier
);
2415 reset_workqueue
= create_singlethread_workqueue("sfc_reset");
2416 if (!reset_workqueue
) {
2421 rc
= pci_register_driver(&efx_pci_driver
);
2428 destroy_workqueue(reset_workqueue
);
2430 unregister_netdevice_notifier(&efx_netdev_notifier
);
2435 static void __exit
efx_exit_module(void)
2437 printk(KERN_INFO
"Solarflare NET driver unloading\n");
2439 pci_unregister_driver(&efx_pci_driver
);
2440 destroy_workqueue(reset_workqueue
);
2441 unregister_netdevice_notifier(&efx_netdev_notifier
);
2445 module_init(efx_init_module
);
2446 module_exit(efx_exit_module
);
2448 MODULE_AUTHOR("Solarflare Communications and "
2449 "Michael Brown <mbrown@fensystems.co.uk>");
2450 MODULE_DESCRIPTION("Solarflare Communications network driver");
2451 MODULE_LICENSE("GPL");
2452 MODULE_DEVICE_TABLE(pci
, efx_pci_table
);