sfc: Log interrupt and reset type names, not numbers
[deliverable/linux.git] / drivers / net / sfc / efx.c
1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2008 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/in.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include "net_driver.h"
24 #include "efx.h"
25 #include "mdio_10g.h"
26 #include "falcon.h"
27
28 /**************************************************************************
29 *
30 * Type name strings
31 *
32 **************************************************************************
33 */
34
35 /* Loopback mode names (see LOOPBACK_MODE()) */
36 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
37 const char *efx_loopback_mode_names[] = {
38 [LOOPBACK_NONE] = "NONE",
39 [LOOPBACK_GMAC] = "GMAC",
40 [LOOPBACK_XGMII] = "XGMII",
41 [LOOPBACK_XGXS] = "XGXS",
42 [LOOPBACK_XAUI] = "XAUI",
43 [LOOPBACK_GPHY] = "GPHY",
44 [LOOPBACK_PHYXS] = "PHYXS",
45 [LOOPBACK_PCS] = "PCS",
46 [LOOPBACK_PMAPMD] = "PMA/PMD",
47 [LOOPBACK_NETWORK] = "NETWORK",
48 };
49
50 /* Interrupt mode names (see INT_MODE())) */
51 const unsigned int efx_interrupt_mode_max = EFX_INT_MODE_MAX;
52 const char *efx_interrupt_mode_names[] = {
53 [EFX_INT_MODE_MSIX] = "MSI-X",
54 [EFX_INT_MODE_MSI] = "MSI",
55 [EFX_INT_MODE_LEGACY] = "legacy",
56 };
57
58 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
59 const char *efx_reset_type_names[] = {
60 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
61 [RESET_TYPE_ALL] = "ALL",
62 [RESET_TYPE_WORLD] = "WORLD",
63 [RESET_TYPE_DISABLE] = "DISABLE",
64 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
65 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
66 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
67 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
68 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
69 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
70 };
71
72 #define EFX_MAX_MTU (9 * 1024)
73
74 /* RX slow fill workqueue. If memory allocation fails in the fast path,
75 * a work item is pushed onto this work queue to retry the allocation later,
76 * to avoid the NIC being starved of RX buffers. Since this is a per cpu
77 * workqueue, there is nothing to be gained in making it per NIC
78 */
79 static struct workqueue_struct *refill_workqueue;
80
81 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
82 * queued onto this work queue. This is not a per-nic work queue, because
83 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
84 */
85 static struct workqueue_struct *reset_workqueue;
86
87 /**************************************************************************
88 *
89 * Configurable values
90 *
91 *************************************************************************/
92
93 /*
94 * Use separate channels for TX and RX events
95 *
96 * Set this to 1 to use separate channels for TX and RX. It allows us
97 * to control interrupt affinity separately for TX and RX.
98 *
99 * This is only used in MSI-X interrupt mode
100 */
101 static unsigned int separate_tx_channels;
102 module_param(separate_tx_channels, uint, 0644);
103 MODULE_PARM_DESC(separate_tx_channels,
104 "Use separate channels for TX and RX");
105
106 /* This is the weight assigned to each of the (per-channel) virtual
107 * NAPI devices.
108 */
109 static int napi_weight = 64;
110
111 /* This is the time (in jiffies) between invocations of the hardware
112 * monitor, which checks for known hardware bugs and resets the
113 * hardware and driver as necessary.
114 */
115 unsigned int efx_monitor_interval = 1 * HZ;
116
117 /* This controls whether or not the driver will initialise devices
118 * with invalid MAC addresses stored in the EEPROM or flash. If true,
119 * such devices will be initialised with a random locally-generated
120 * MAC address. This allows for loading the sfc_mtd driver to
121 * reprogram the flash, even if the flash contents (including the MAC
122 * address) have previously been erased.
123 */
124 static unsigned int allow_bad_hwaddr;
125
126 /* Initial interrupt moderation settings. They can be modified after
127 * module load with ethtool.
128 *
129 * The default for RX should strike a balance between increasing the
130 * round-trip latency and reducing overhead.
131 */
132 static unsigned int rx_irq_mod_usec = 60;
133
134 /* Initial interrupt moderation settings. They can be modified after
135 * module load with ethtool.
136 *
137 * This default is chosen to ensure that a 10G link does not go idle
138 * while a TX queue is stopped after it has become full. A queue is
139 * restarted when it drops below half full. The time this takes (assuming
140 * worst case 3 descriptors per packet and 1024 descriptors) is
141 * 512 / 3 * 1.2 = 205 usec.
142 */
143 static unsigned int tx_irq_mod_usec = 150;
144
145 /* This is the first interrupt mode to try out of:
146 * 0 => MSI-X
147 * 1 => MSI
148 * 2 => legacy
149 */
150 static unsigned int interrupt_mode;
151
152 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
153 * i.e. the number of CPUs among which we may distribute simultaneous
154 * interrupt handling.
155 *
156 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
157 * The default (0) means to assign an interrupt to each package (level II cache)
158 */
159 static unsigned int rss_cpus;
160 module_param(rss_cpus, uint, 0444);
161 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
162
163 static int phy_flash_cfg;
164 module_param(phy_flash_cfg, int, 0644);
165 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
166
167 static unsigned irq_adapt_low_thresh = 10000;
168 module_param(irq_adapt_low_thresh, uint, 0644);
169 MODULE_PARM_DESC(irq_adapt_low_thresh,
170 "Threshold score for reducing IRQ moderation");
171
172 static unsigned irq_adapt_high_thresh = 20000;
173 module_param(irq_adapt_high_thresh, uint, 0644);
174 MODULE_PARM_DESC(irq_adapt_high_thresh,
175 "Threshold score for increasing IRQ moderation");
176
177 /**************************************************************************
178 *
179 * Utility functions and prototypes
180 *
181 *************************************************************************/
182 static void efx_remove_channel(struct efx_channel *channel);
183 static void efx_remove_port(struct efx_nic *efx);
184 static void efx_fini_napi(struct efx_nic *efx);
185 static void efx_fini_channels(struct efx_nic *efx);
186
187 #define EFX_ASSERT_RESET_SERIALISED(efx) \
188 do { \
189 if (efx->state == STATE_RUNNING) \
190 ASSERT_RTNL(); \
191 } while (0)
192
193 /**************************************************************************
194 *
195 * Event queue processing
196 *
197 *************************************************************************/
198
199 /* Process channel's event queue
200 *
201 * This function is responsible for processing the event queue of a
202 * single channel. The caller must guarantee that this function will
203 * never be concurrently called more than once on the same channel,
204 * though different channels may be being processed concurrently.
205 */
206 static int efx_process_channel(struct efx_channel *channel, int rx_quota)
207 {
208 struct efx_nic *efx = channel->efx;
209 int rx_packets;
210
211 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
212 !channel->enabled))
213 return 0;
214
215 rx_packets = falcon_process_eventq(channel, rx_quota);
216 if (rx_packets == 0)
217 return 0;
218
219 /* Deliver last RX packet. */
220 if (channel->rx_pkt) {
221 __efx_rx_packet(channel, channel->rx_pkt,
222 channel->rx_pkt_csummed);
223 channel->rx_pkt = NULL;
224 }
225
226 efx_rx_strategy(channel);
227
228 efx_fast_push_rx_descriptors(&efx->rx_queue[channel->channel]);
229
230 return rx_packets;
231 }
232
233 /* Mark channel as finished processing
234 *
235 * Note that since we will not receive further interrupts for this
236 * channel before we finish processing and call the eventq_read_ack()
237 * method, there is no need to use the interrupt hold-off timers.
238 */
239 static inline void efx_channel_processed(struct efx_channel *channel)
240 {
241 /* The interrupt handler for this channel may set work_pending
242 * as soon as we acknowledge the events we've seen. Make sure
243 * it's cleared before then. */
244 channel->work_pending = false;
245 smp_wmb();
246
247 falcon_eventq_read_ack(channel);
248 }
249
250 /* NAPI poll handler
251 *
252 * NAPI guarantees serialisation of polls of the same device, which
253 * provides the guarantee required by efx_process_channel().
254 */
255 static int efx_poll(struct napi_struct *napi, int budget)
256 {
257 struct efx_channel *channel =
258 container_of(napi, struct efx_channel, napi_str);
259 int rx_packets;
260
261 EFX_TRACE(channel->efx, "channel %d NAPI poll executing on CPU %d\n",
262 channel->channel, raw_smp_processor_id());
263
264 rx_packets = efx_process_channel(channel, budget);
265
266 if (rx_packets < budget) {
267 struct efx_nic *efx = channel->efx;
268
269 if (channel->used_flags & EFX_USED_BY_RX &&
270 efx->irq_rx_adaptive &&
271 unlikely(++channel->irq_count == 1000)) {
272 if (unlikely(channel->irq_mod_score <
273 irq_adapt_low_thresh)) {
274 if (channel->irq_moderation > 1) {
275 channel->irq_moderation -= 1;
276 falcon_set_int_moderation(channel);
277 }
278 } else if (unlikely(channel->irq_mod_score >
279 irq_adapt_high_thresh)) {
280 if (channel->irq_moderation <
281 efx->irq_rx_moderation) {
282 channel->irq_moderation += 1;
283 falcon_set_int_moderation(channel);
284 }
285 }
286 channel->irq_count = 0;
287 channel->irq_mod_score = 0;
288 }
289
290 /* There is no race here; although napi_disable() will
291 * only wait for napi_complete(), this isn't a problem
292 * since efx_channel_processed() will have no effect if
293 * interrupts have already been disabled.
294 */
295 napi_complete(napi);
296 efx_channel_processed(channel);
297 }
298
299 return rx_packets;
300 }
301
302 /* Process the eventq of the specified channel immediately on this CPU
303 *
304 * Disable hardware generated interrupts, wait for any existing
305 * processing to finish, then directly poll (and ack ) the eventq.
306 * Finally reenable NAPI and interrupts.
307 *
308 * Since we are touching interrupts the caller should hold the suspend lock
309 */
310 void efx_process_channel_now(struct efx_channel *channel)
311 {
312 struct efx_nic *efx = channel->efx;
313
314 BUG_ON(!channel->used_flags);
315 BUG_ON(!channel->enabled);
316
317 /* Disable interrupts and wait for ISRs to complete */
318 falcon_disable_interrupts(efx);
319 if (efx->legacy_irq)
320 synchronize_irq(efx->legacy_irq);
321 if (channel->irq)
322 synchronize_irq(channel->irq);
323
324 /* Wait for any NAPI processing to complete */
325 napi_disable(&channel->napi_str);
326
327 /* Poll the channel */
328 efx_process_channel(channel, EFX_EVQ_SIZE);
329
330 /* Ack the eventq. This may cause an interrupt to be generated
331 * when they are reenabled */
332 efx_channel_processed(channel);
333
334 napi_enable(&channel->napi_str);
335 falcon_enable_interrupts(efx);
336 }
337
338 /* Create event queue
339 * Event queue memory allocations are done only once. If the channel
340 * is reset, the memory buffer will be reused; this guards against
341 * errors during channel reset and also simplifies interrupt handling.
342 */
343 static int efx_probe_eventq(struct efx_channel *channel)
344 {
345 EFX_LOG(channel->efx, "chan %d create event queue\n", channel->channel);
346
347 return falcon_probe_eventq(channel);
348 }
349
350 /* Prepare channel's event queue */
351 static void efx_init_eventq(struct efx_channel *channel)
352 {
353 EFX_LOG(channel->efx, "chan %d init event queue\n", channel->channel);
354
355 channel->eventq_read_ptr = 0;
356
357 falcon_init_eventq(channel);
358 }
359
360 static void efx_fini_eventq(struct efx_channel *channel)
361 {
362 EFX_LOG(channel->efx, "chan %d fini event queue\n", channel->channel);
363
364 falcon_fini_eventq(channel);
365 }
366
367 static void efx_remove_eventq(struct efx_channel *channel)
368 {
369 EFX_LOG(channel->efx, "chan %d remove event queue\n", channel->channel);
370
371 falcon_remove_eventq(channel);
372 }
373
374 /**************************************************************************
375 *
376 * Channel handling
377 *
378 *************************************************************************/
379
380 static int efx_probe_channel(struct efx_channel *channel)
381 {
382 struct efx_tx_queue *tx_queue;
383 struct efx_rx_queue *rx_queue;
384 int rc;
385
386 EFX_LOG(channel->efx, "creating channel %d\n", channel->channel);
387
388 rc = efx_probe_eventq(channel);
389 if (rc)
390 goto fail1;
391
392 efx_for_each_channel_tx_queue(tx_queue, channel) {
393 rc = efx_probe_tx_queue(tx_queue);
394 if (rc)
395 goto fail2;
396 }
397
398 efx_for_each_channel_rx_queue(rx_queue, channel) {
399 rc = efx_probe_rx_queue(rx_queue);
400 if (rc)
401 goto fail3;
402 }
403
404 channel->n_rx_frm_trunc = 0;
405
406 return 0;
407
408 fail3:
409 efx_for_each_channel_rx_queue(rx_queue, channel)
410 efx_remove_rx_queue(rx_queue);
411 fail2:
412 efx_for_each_channel_tx_queue(tx_queue, channel)
413 efx_remove_tx_queue(tx_queue);
414 fail1:
415 return rc;
416 }
417
418
419 static void efx_set_channel_names(struct efx_nic *efx)
420 {
421 struct efx_channel *channel;
422 const char *type = "";
423 int number;
424
425 efx_for_each_channel(channel, efx) {
426 number = channel->channel;
427 if (efx->n_channels > efx->n_rx_queues) {
428 if (channel->channel < efx->n_rx_queues) {
429 type = "-rx";
430 } else {
431 type = "-tx";
432 number -= efx->n_rx_queues;
433 }
434 }
435 snprintf(channel->name, sizeof(channel->name),
436 "%s%s-%d", efx->name, type, number);
437 }
438 }
439
440 /* Channels are shutdown and reinitialised whilst the NIC is running
441 * to propagate configuration changes (mtu, checksum offload), or
442 * to clear hardware error conditions
443 */
444 static void efx_init_channels(struct efx_nic *efx)
445 {
446 struct efx_tx_queue *tx_queue;
447 struct efx_rx_queue *rx_queue;
448 struct efx_channel *channel;
449
450 /* Calculate the rx buffer allocation parameters required to
451 * support the current MTU, including padding for header
452 * alignment and overruns.
453 */
454 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
455 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
456 efx->type->rx_buffer_padding);
457 efx->rx_buffer_order = get_order(efx->rx_buffer_len);
458
459 /* Initialise the channels */
460 efx_for_each_channel(channel, efx) {
461 EFX_LOG(channel->efx, "init chan %d\n", channel->channel);
462
463 efx_init_eventq(channel);
464
465 efx_for_each_channel_tx_queue(tx_queue, channel)
466 efx_init_tx_queue(tx_queue);
467
468 /* The rx buffer allocation strategy is MTU dependent */
469 efx_rx_strategy(channel);
470
471 efx_for_each_channel_rx_queue(rx_queue, channel)
472 efx_init_rx_queue(rx_queue);
473
474 WARN_ON(channel->rx_pkt != NULL);
475 efx_rx_strategy(channel);
476 }
477 }
478
479 /* This enables event queue processing and packet transmission.
480 *
481 * Note that this function is not allowed to fail, since that would
482 * introduce too much complexity into the suspend/resume path.
483 */
484 static void efx_start_channel(struct efx_channel *channel)
485 {
486 struct efx_rx_queue *rx_queue;
487
488 EFX_LOG(channel->efx, "starting chan %d\n", channel->channel);
489
490 /* The interrupt handler for this channel may set work_pending
491 * as soon as we enable it. Make sure it's cleared before
492 * then. Similarly, make sure it sees the enabled flag set. */
493 channel->work_pending = false;
494 channel->enabled = true;
495 smp_wmb();
496
497 napi_enable(&channel->napi_str);
498
499 /* Load up RX descriptors */
500 efx_for_each_channel_rx_queue(rx_queue, channel)
501 efx_fast_push_rx_descriptors(rx_queue);
502 }
503
504 /* This disables event queue processing and packet transmission.
505 * This function does not guarantee that all queue processing
506 * (e.g. RX refill) is complete.
507 */
508 static void efx_stop_channel(struct efx_channel *channel)
509 {
510 struct efx_rx_queue *rx_queue;
511
512 if (!channel->enabled)
513 return;
514
515 EFX_LOG(channel->efx, "stop chan %d\n", channel->channel);
516
517 channel->enabled = false;
518 napi_disable(&channel->napi_str);
519
520 /* Ensure that any worker threads have exited or will be no-ops */
521 efx_for_each_channel_rx_queue(rx_queue, channel) {
522 spin_lock_bh(&rx_queue->add_lock);
523 spin_unlock_bh(&rx_queue->add_lock);
524 }
525 }
526
527 static void efx_fini_channels(struct efx_nic *efx)
528 {
529 struct efx_channel *channel;
530 struct efx_tx_queue *tx_queue;
531 struct efx_rx_queue *rx_queue;
532 int rc;
533
534 EFX_ASSERT_RESET_SERIALISED(efx);
535 BUG_ON(efx->port_enabled);
536
537 rc = falcon_flush_queues(efx);
538 if (rc)
539 EFX_ERR(efx, "failed to flush queues\n");
540 else
541 EFX_LOG(efx, "successfully flushed all queues\n");
542
543 efx_for_each_channel(channel, efx) {
544 EFX_LOG(channel->efx, "shut down chan %d\n", channel->channel);
545
546 efx_for_each_channel_rx_queue(rx_queue, channel)
547 efx_fini_rx_queue(rx_queue);
548 efx_for_each_channel_tx_queue(tx_queue, channel)
549 efx_fini_tx_queue(tx_queue);
550 efx_fini_eventq(channel);
551 }
552 }
553
554 static void efx_remove_channel(struct efx_channel *channel)
555 {
556 struct efx_tx_queue *tx_queue;
557 struct efx_rx_queue *rx_queue;
558
559 EFX_LOG(channel->efx, "destroy chan %d\n", channel->channel);
560
561 efx_for_each_channel_rx_queue(rx_queue, channel)
562 efx_remove_rx_queue(rx_queue);
563 efx_for_each_channel_tx_queue(tx_queue, channel)
564 efx_remove_tx_queue(tx_queue);
565 efx_remove_eventq(channel);
566
567 channel->used_flags = 0;
568 }
569
570 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue, int delay)
571 {
572 queue_delayed_work(refill_workqueue, &rx_queue->work, delay);
573 }
574
575 /**************************************************************************
576 *
577 * Port handling
578 *
579 **************************************************************************/
580
581 /* This ensures that the kernel is kept informed (via
582 * netif_carrier_on/off) of the link status, and also maintains the
583 * link status's stop on the port's TX queue.
584 */
585 static void efx_link_status_changed(struct efx_nic *efx)
586 {
587 struct efx_link_state *link_state = &efx->link_state;
588
589 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
590 * that no events are triggered between unregister_netdev() and the
591 * driver unloading. A more general condition is that NETDEV_CHANGE
592 * can only be generated between NETDEV_UP and NETDEV_DOWN */
593 if (!netif_running(efx->net_dev))
594 return;
595
596 if (efx->port_inhibited) {
597 netif_carrier_off(efx->net_dev);
598 return;
599 }
600
601 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
602 efx->n_link_state_changes++;
603
604 if (link_state->up)
605 netif_carrier_on(efx->net_dev);
606 else
607 netif_carrier_off(efx->net_dev);
608 }
609
610 /* Status message for kernel log */
611 if (link_state->up) {
612 EFX_INFO(efx, "link up at %uMbps %s-duplex (MTU %d)%s\n",
613 link_state->speed, link_state->fd ? "full" : "half",
614 efx->net_dev->mtu,
615 (efx->promiscuous ? " [PROMISC]" : ""));
616 } else {
617 EFX_INFO(efx, "link down\n");
618 }
619
620 }
621
622 static void efx_fini_port(struct efx_nic *efx);
623
624 /* This call reinitialises the MAC to pick up new PHY settings. The
625 * caller must hold the mac_lock */
626 void __efx_reconfigure_port(struct efx_nic *efx)
627 {
628 WARN_ON(!mutex_is_locked(&efx->mac_lock));
629
630 EFX_LOG(efx, "reconfiguring MAC from PHY settings on CPU %d\n",
631 raw_smp_processor_id());
632
633 /* Serialise the promiscuous flag with efx_set_multicast_list. */
634 if (efx_dev_registered(efx)) {
635 netif_addr_lock_bh(efx->net_dev);
636 netif_addr_unlock_bh(efx->net_dev);
637 }
638
639 falcon_deconfigure_mac_wrapper(efx);
640
641 /* Reconfigure the PHY, disabling transmit in mac level loopback. */
642 if (LOOPBACK_INTERNAL(efx))
643 efx->phy_mode |= PHY_MODE_TX_DISABLED;
644 else
645 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
646 efx->phy_op->reconfigure(efx);
647
648 if (falcon_switch_mac(efx))
649 goto fail;
650
651 efx->mac_op->reconfigure(efx);
652
653 /* Inform kernel of loss/gain of carrier */
654 efx_link_status_changed(efx);
655 return;
656
657 fail:
658 EFX_ERR(efx, "failed to reconfigure MAC\n");
659 efx->port_enabled = false;
660 efx_fini_port(efx);
661 }
662
663 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
664 * disabled. */
665 void efx_reconfigure_port(struct efx_nic *efx)
666 {
667 EFX_ASSERT_RESET_SERIALISED(efx);
668
669 mutex_lock(&efx->mac_lock);
670 __efx_reconfigure_port(efx);
671 mutex_unlock(&efx->mac_lock);
672 }
673
674 /* Asynchronous efx_reconfigure_port work item. To speed up efx_flush_all()
675 * we don't efx_reconfigure_port() if the port is disabled. Care is taken
676 * in efx_stop_all() and efx_start_port() to prevent PHY events being lost */
677 static void efx_phy_work(struct work_struct *data)
678 {
679 struct efx_nic *efx = container_of(data, struct efx_nic, phy_work);
680
681 mutex_lock(&efx->mac_lock);
682 if (efx->port_enabled)
683 __efx_reconfigure_port(efx);
684 mutex_unlock(&efx->mac_lock);
685 }
686
687 static void efx_mac_work(struct work_struct *data)
688 {
689 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
690
691 mutex_lock(&efx->mac_lock);
692 if (efx->port_enabled)
693 efx->mac_op->irq(efx);
694 mutex_unlock(&efx->mac_lock);
695 }
696
697 static int efx_probe_port(struct efx_nic *efx)
698 {
699 int rc;
700
701 EFX_LOG(efx, "create port\n");
702
703 /* Connect up MAC/PHY operations table and read MAC address */
704 rc = falcon_probe_port(efx);
705 if (rc)
706 goto err;
707
708 if (phy_flash_cfg)
709 efx->phy_mode = PHY_MODE_SPECIAL;
710
711 /* Sanity check MAC address */
712 if (is_valid_ether_addr(efx->mac_address)) {
713 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
714 } else {
715 EFX_ERR(efx, "invalid MAC address %pM\n",
716 efx->mac_address);
717 if (!allow_bad_hwaddr) {
718 rc = -EINVAL;
719 goto err;
720 }
721 random_ether_addr(efx->net_dev->dev_addr);
722 EFX_INFO(efx, "using locally-generated MAC %pM\n",
723 efx->net_dev->dev_addr);
724 }
725
726 return 0;
727
728 err:
729 efx_remove_port(efx);
730 return rc;
731 }
732
733 static int efx_init_port(struct efx_nic *efx)
734 {
735 int rc;
736
737 EFX_LOG(efx, "init port\n");
738
739 rc = efx->phy_op->init(efx);
740 if (rc)
741 return rc;
742 mutex_lock(&efx->mac_lock);
743 efx->phy_op->reconfigure(efx);
744 rc = falcon_switch_mac(efx);
745 mutex_unlock(&efx->mac_lock);
746 if (rc)
747 goto fail;
748 efx->mac_op->reconfigure(efx);
749
750 efx->port_initialized = true;
751 efx_stats_enable(efx);
752 return 0;
753
754 fail:
755 efx->phy_op->fini(efx);
756 return rc;
757 }
758
759 /* Allow efx_reconfigure_port() to be scheduled, and close the window
760 * between efx_stop_port and efx_flush_all whereby a previously scheduled
761 * efx_phy_work()/efx_mac_work() may have been cancelled */
762 static void efx_start_port(struct efx_nic *efx)
763 {
764 EFX_LOG(efx, "start port\n");
765 BUG_ON(efx->port_enabled);
766
767 mutex_lock(&efx->mac_lock);
768 efx->port_enabled = true;
769 __efx_reconfigure_port(efx);
770 efx->mac_op->irq(efx);
771 mutex_unlock(&efx->mac_lock);
772 }
773
774 /* Prevent efx_phy_work, efx_mac_work, and efx_monitor() from executing,
775 * and efx_set_multicast_list() from scheduling efx_phy_work. efx_phy_work
776 * and efx_mac_work may still be scheduled via NAPI processing until
777 * efx_flush_all() is called */
778 static void efx_stop_port(struct efx_nic *efx)
779 {
780 EFX_LOG(efx, "stop port\n");
781
782 mutex_lock(&efx->mac_lock);
783 efx->port_enabled = false;
784 mutex_unlock(&efx->mac_lock);
785
786 /* Serialise against efx_set_multicast_list() */
787 if (efx_dev_registered(efx)) {
788 netif_addr_lock_bh(efx->net_dev);
789 netif_addr_unlock_bh(efx->net_dev);
790 }
791 }
792
793 static void efx_fini_port(struct efx_nic *efx)
794 {
795 EFX_LOG(efx, "shut down port\n");
796
797 if (!efx->port_initialized)
798 return;
799
800 efx_stats_disable(efx);
801 efx->phy_op->fini(efx);
802 efx->port_initialized = false;
803
804 efx->link_state.up = false;
805 efx_link_status_changed(efx);
806 }
807
808 static void efx_remove_port(struct efx_nic *efx)
809 {
810 EFX_LOG(efx, "destroying port\n");
811
812 falcon_remove_port(efx);
813 }
814
815 /**************************************************************************
816 *
817 * NIC handling
818 *
819 **************************************************************************/
820
821 /* This configures the PCI device to enable I/O and DMA. */
822 static int efx_init_io(struct efx_nic *efx)
823 {
824 struct pci_dev *pci_dev = efx->pci_dev;
825 dma_addr_t dma_mask = efx->type->max_dma_mask;
826 int rc;
827
828 EFX_LOG(efx, "initialising I/O\n");
829
830 rc = pci_enable_device(pci_dev);
831 if (rc) {
832 EFX_ERR(efx, "failed to enable PCI device\n");
833 goto fail1;
834 }
835
836 pci_set_master(pci_dev);
837
838 /* Set the PCI DMA mask. Try all possibilities from our
839 * genuine mask down to 32 bits, because some architectures
840 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
841 * masks event though they reject 46 bit masks.
842 */
843 while (dma_mask > 0x7fffffffUL) {
844 if (pci_dma_supported(pci_dev, dma_mask) &&
845 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
846 break;
847 dma_mask >>= 1;
848 }
849 if (rc) {
850 EFX_ERR(efx, "could not find a suitable DMA mask\n");
851 goto fail2;
852 }
853 EFX_LOG(efx, "using DMA mask %llx\n", (unsigned long long) dma_mask);
854 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
855 if (rc) {
856 /* pci_set_consistent_dma_mask() is not *allowed* to
857 * fail with a mask that pci_set_dma_mask() accepted,
858 * but just in case...
859 */
860 EFX_ERR(efx, "failed to set consistent DMA mask\n");
861 goto fail2;
862 }
863
864 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
865 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
866 if (rc) {
867 EFX_ERR(efx, "request for memory BAR failed\n");
868 rc = -EIO;
869 goto fail3;
870 }
871 efx->membase = ioremap_nocache(efx->membase_phys,
872 efx->type->mem_map_size);
873 if (!efx->membase) {
874 EFX_ERR(efx, "could not map memory BAR at %llx+%x\n",
875 (unsigned long long)efx->membase_phys,
876 efx->type->mem_map_size);
877 rc = -ENOMEM;
878 goto fail4;
879 }
880 EFX_LOG(efx, "memory BAR at %llx+%x (virtual %p)\n",
881 (unsigned long long)efx->membase_phys,
882 efx->type->mem_map_size, efx->membase);
883
884 return 0;
885
886 fail4:
887 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
888 fail3:
889 efx->membase_phys = 0;
890 fail2:
891 pci_disable_device(efx->pci_dev);
892 fail1:
893 return rc;
894 }
895
896 static void efx_fini_io(struct efx_nic *efx)
897 {
898 EFX_LOG(efx, "shutting down I/O\n");
899
900 if (efx->membase) {
901 iounmap(efx->membase);
902 efx->membase = NULL;
903 }
904
905 if (efx->membase_phys) {
906 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
907 efx->membase_phys = 0;
908 }
909
910 pci_disable_device(efx->pci_dev);
911 }
912
913 /* Get number of RX queues wanted. Return number of online CPU
914 * packages in the expectation that an IRQ balancer will spread
915 * interrupts across them. */
916 static int efx_wanted_rx_queues(void)
917 {
918 cpumask_var_t core_mask;
919 int count;
920 int cpu;
921
922 if (unlikely(!zalloc_cpumask_var(&core_mask, GFP_KERNEL))) {
923 printk(KERN_WARNING
924 "sfc: RSS disabled due to allocation failure\n");
925 return 1;
926 }
927
928 count = 0;
929 for_each_online_cpu(cpu) {
930 if (!cpumask_test_cpu(cpu, core_mask)) {
931 ++count;
932 cpumask_or(core_mask, core_mask,
933 topology_core_cpumask(cpu));
934 }
935 }
936
937 free_cpumask_var(core_mask);
938 return count;
939 }
940
941 /* Probe the number and type of interrupts we are able to obtain, and
942 * the resulting numbers of channels and RX queues.
943 */
944 static void efx_probe_interrupts(struct efx_nic *efx)
945 {
946 int max_channels =
947 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
948 int rc, i;
949
950 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
951 struct msix_entry xentries[EFX_MAX_CHANNELS];
952 int wanted_ints;
953 int rx_queues;
954
955 /* We want one RX queue and interrupt per CPU package
956 * (or as specified by the rss_cpus module parameter).
957 * We will need one channel per interrupt.
958 */
959 rx_queues = rss_cpus ? rss_cpus : efx_wanted_rx_queues();
960 wanted_ints = rx_queues + (separate_tx_channels ? 1 : 0);
961 wanted_ints = min(wanted_ints, max_channels);
962
963 for (i = 0; i < wanted_ints; i++)
964 xentries[i].entry = i;
965 rc = pci_enable_msix(efx->pci_dev, xentries, wanted_ints);
966 if (rc > 0) {
967 EFX_ERR(efx, "WARNING: Insufficient MSI-X vectors"
968 " available (%d < %d).\n", rc, wanted_ints);
969 EFX_ERR(efx, "WARNING: Performance may be reduced.\n");
970 EFX_BUG_ON_PARANOID(rc >= wanted_ints);
971 wanted_ints = rc;
972 rc = pci_enable_msix(efx->pci_dev, xentries,
973 wanted_ints);
974 }
975
976 if (rc == 0) {
977 efx->n_rx_queues = min(rx_queues, wanted_ints);
978 efx->n_channels = wanted_ints;
979 for (i = 0; i < wanted_ints; i++)
980 efx->channel[i].irq = xentries[i].vector;
981 } else {
982 /* Fall back to single channel MSI */
983 efx->interrupt_mode = EFX_INT_MODE_MSI;
984 EFX_ERR(efx, "could not enable MSI-X\n");
985 }
986 }
987
988 /* Try single interrupt MSI */
989 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
990 efx->n_rx_queues = 1;
991 efx->n_channels = 1;
992 rc = pci_enable_msi(efx->pci_dev);
993 if (rc == 0) {
994 efx->channel[0].irq = efx->pci_dev->irq;
995 } else {
996 EFX_ERR(efx, "could not enable MSI\n");
997 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
998 }
999 }
1000
1001 /* Assume legacy interrupts */
1002 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1003 efx->n_rx_queues = 1;
1004 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1005 efx->legacy_irq = efx->pci_dev->irq;
1006 }
1007 }
1008
1009 static void efx_remove_interrupts(struct efx_nic *efx)
1010 {
1011 struct efx_channel *channel;
1012
1013 /* Remove MSI/MSI-X interrupts */
1014 efx_for_each_channel(channel, efx)
1015 channel->irq = 0;
1016 pci_disable_msi(efx->pci_dev);
1017 pci_disable_msix(efx->pci_dev);
1018
1019 /* Remove legacy interrupt */
1020 efx->legacy_irq = 0;
1021 }
1022
1023 static void efx_set_channels(struct efx_nic *efx)
1024 {
1025 struct efx_tx_queue *tx_queue;
1026 struct efx_rx_queue *rx_queue;
1027
1028 efx_for_each_tx_queue(tx_queue, efx) {
1029 if (separate_tx_channels)
1030 tx_queue->channel = &efx->channel[efx->n_channels-1];
1031 else
1032 tx_queue->channel = &efx->channel[0];
1033 tx_queue->channel->used_flags |= EFX_USED_BY_TX;
1034 }
1035
1036 efx_for_each_rx_queue(rx_queue, efx) {
1037 rx_queue->channel = &efx->channel[rx_queue->queue];
1038 rx_queue->channel->used_flags |= EFX_USED_BY_RX;
1039 }
1040 }
1041
1042 static int efx_probe_nic(struct efx_nic *efx)
1043 {
1044 int rc;
1045
1046 EFX_LOG(efx, "creating NIC\n");
1047
1048 /* Carry out hardware-type specific initialisation */
1049 rc = falcon_probe_nic(efx);
1050 if (rc)
1051 return rc;
1052
1053 /* Determine the number of channels and RX queues by trying to hook
1054 * in MSI-X interrupts. */
1055 efx_probe_interrupts(efx);
1056
1057 efx_set_channels(efx);
1058
1059 /* Initialise the interrupt moderation settings */
1060 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true);
1061
1062 return 0;
1063 }
1064
1065 static void efx_remove_nic(struct efx_nic *efx)
1066 {
1067 EFX_LOG(efx, "destroying NIC\n");
1068
1069 efx_remove_interrupts(efx);
1070 falcon_remove_nic(efx);
1071 }
1072
1073 /**************************************************************************
1074 *
1075 * NIC startup/shutdown
1076 *
1077 *************************************************************************/
1078
1079 static int efx_probe_all(struct efx_nic *efx)
1080 {
1081 struct efx_channel *channel;
1082 int rc;
1083
1084 /* Create NIC */
1085 rc = efx_probe_nic(efx);
1086 if (rc) {
1087 EFX_ERR(efx, "failed to create NIC\n");
1088 goto fail1;
1089 }
1090
1091 /* Create port */
1092 rc = efx_probe_port(efx);
1093 if (rc) {
1094 EFX_ERR(efx, "failed to create port\n");
1095 goto fail2;
1096 }
1097
1098 /* Create channels */
1099 efx_for_each_channel(channel, efx) {
1100 rc = efx_probe_channel(channel);
1101 if (rc) {
1102 EFX_ERR(efx, "failed to create channel %d\n",
1103 channel->channel);
1104 goto fail3;
1105 }
1106 }
1107 efx_set_channel_names(efx);
1108
1109 return 0;
1110
1111 fail3:
1112 efx_for_each_channel(channel, efx)
1113 efx_remove_channel(channel);
1114 efx_remove_port(efx);
1115 fail2:
1116 efx_remove_nic(efx);
1117 fail1:
1118 return rc;
1119 }
1120
1121 /* Called after previous invocation(s) of efx_stop_all, restarts the
1122 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1123 * and ensures that the port is scheduled to be reconfigured.
1124 * This function is safe to call multiple times when the NIC is in any
1125 * state. */
1126 static void efx_start_all(struct efx_nic *efx)
1127 {
1128 struct efx_channel *channel;
1129
1130 EFX_ASSERT_RESET_SERIALISED(efx);
1131
1132 /* Check that it is appropriate to restart the interface. All
1133 * of these flags are safe to read under just the rtnl lock */
1134 if (efx->port_enabled)
1135 return;
1136 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1137 return;
1138 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1139 return;
1140
1141 /* Mark the port as enabled so port reconfigurations can start, then
1142 * restart the transmit interface early so the watchdog timer stops */
1143 efx_start_port(efx);
1144 if (efx_dev_registered(efx))
1145 efx_wake_queue(efx);
1146
1147 efx_for_each_channel(channel, efx)
1148 efx_start_channel(channel);
1149
1150 falcon_enable_interrupts(efx);
1151
1152 /* Start hardware monitor if we're in RUNNING */
1153 if (efx->state == STATE_RUNNING)
1154 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1155 efx_monitor_interval);
1156 }
1157
1158 /* Flush all delayed work. Should only be called when no more delayed work
1159 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1160 * since we're holding the rtnl_lock at this point. */
1161 static void efx_flush_all(struct efx_nic *efx)
1162 {
1163 struct efx_rx_queue *rx_queue;
1164
1165 /* Make sure the hardware monitor is stopped */
1166 cancel_delayed_work_sync(&efx->monitor_work);
1167
1168 /* Ensure that all RX slow refills are complete. */
1169 efx_for_each_rx_queue(rx_queue, efx)
1170 cancel_delayed_work_sync(&rx_queue->work);
1171
1172 /* Stop scheduled port reconfigurations */
1173 cancel_work_sync(&efx->mac_work);
1174 cancel_work_sync(&efx->phy_work);
1175
1176 }
1177
1178 /* Quiesce hardware and software without bringing the link down.
1179 * Safe to call multiple times, when the nic and interface is in any
1180 * state. The caller is guaranteed to subsequently be in a position
1181 * to modify any hardware and software state they see fit without
1182 * taking locks. */
1183 static void efx_stop_all(struct efx_nic *efx)
1184 {
1185 struct efx_channel *channel;
1186
1187 EFX_ASSERT_RESET_SERIALISED(efx);
1188
1189 /* port_enabled can be read safely under the rtnl lock */
1190 if (!efx->port_enabled)
1191 return;
1192
1193 /* Disable interrupts and wait for ISR to complete */
1194 falcon_disable_interrupts(efx);
1195 if (efx->legacy_irq)
1196 synchronize_irq(efx->legacy_irq);
1197 efx_for_each_channel(channel, efx) {
1198 if (channel->irq)
1199 synchronize_irq(channel->irq);
1200 }
1201
1202 /* Stop all NAPI processing and synchronous rx refills */
1203 efx_for_each_channel(channel, efx)
1204 efx_stop_channel(channel);
1205
1206 /* Stop all asynchronous port reconfigurations. Since all
1207 * event processing has already been stopped, there is no
1208 * window to loose phy events */
1209 efx_stop_port(efx);
1210
1211 /* Flush efx_phy_work, efx_mac_work, refill_workqueue, monitor_work */
1212 efx_flush_all(efx);
1213
1214 /* Isolate the MAC from the TX and RX engines, so that queue
1215 * flushes will complete in a timely fashion. */
1216 falcon_deconfigure_mac_wrapper(efx);
1217 msleep(10); /* Let the Rx FIFO drain */
1218 falcon_drain_tx_fifo(efx);
1219
1220 /* Stop the kernel transmit interface late, so the watchdog
1221 * timer isn't ticking over the flush */
1222 if (efx_dev_registered(efx)) {
1223 efx_stop_queue(efx);
1224 netif_tx_lock_bh(efx->net_dev);
1225 netif_tx_unlock_bh(efx->net_dev);
1226 }
1227 }
1228
1229 static void efx_remove_all(struct efx_nic *efx)
1230 {
1231 struct efx_channel *channel;
1232
1233 efx_for_each_channel(channel, efx)
1234 efx_remove_channel(channel);
1235 efx_remove_port(efx);
1236 efx_remove_nic(efx);
1237 }
1238
1239 /* A convinience function to safely flush all the queues */
1240 void efx_flush_queues(struct efx_nic *efx)
1241 {
1242 EFX_ASSERT_RESET_SERIALISED(efx);
1243
1244 efx_stop_all(efx);
1245
1246 efx_fini_channels(efx);
1247 efx_init_channels(efx);
1248
1249 efx_start_all(efx);
1250 }
1251
1252 /**************************************************************************
1253 *
1254 * Interrupt moderation
1255 *
1256 **************************************************************************/
1257
1258 static unsigned irq_mod_ticks(int usecs, int resolution)
1259 {
1260 if (usecs <= 0)
1261 return 0; /* cannot receive interrupts ahead of time :-) */
1262 if (usecs < resolution)
1263 return 1; /* never round down to 0 */
1264 return usecs / resolution;
1265 }
1266
1267 /* Set interrupt moderation parameters */
1268 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs,
1269 bool rx_adaptive)
1270 {
1271 struct efx_tx_queue *tx_queue;
1272 struct efx_rx_queue *rx_queue;
1273 unsigned tx_ticks = irq_mod_ticks(tx_usecs, FALCON_IRQ_MOD_RESOLUTION);
1274 unsigned rx_ticks = irq_mod_ticks(rx_usecs, FALCON_IRQ_MOD_RESOLUTION);
1275
1276 EFX_ASSERT_RESET_SERIALISED(efx);
1277
1278 efx_for_each_tx_queue(tx_queue, efx)
1279 tx_queue->channel->irq_moderation = tx_ticks;
1280
1281 efx->irq_rx_adaptive = rx_adaptive;
1282 efx->irq_rx_moderation = rx_ticks;
1283 efx_for_each_rx_queue(rx_queue, efx)
1284 rx_queue->channel->irq_moderation = rx_ticks;
1285 }
1286
1287 /**************************************************************************
1288 *
1289 * Hardware monitor
1290 *
1291 **************************************************************************/
1292
1293 /* Run periodically off the general workqueue. Serialised against
1294 * efx_reconfigure_port via the mac_lock */
1295 static void efx_monitor(struct work_struct *data)
1296 {
1297 struct efx_nic *efx = container_of(data, struct efx_nic,
1298 monitor_work.work);
1299 int rc;
1300
1301 EFX_TRACE(efx, "hardware monitor executing on CPU %d\n",
1302 raw_smp_processor_id());
1303
1304 /* If the mac_lock is already held then it is likely a port
1305 * reconfiguration is already in place, which will likely do
1306 * most of the work of check_hw() anyway. */
1307 if (!mutex_trylock(&efx->mac_lock))
1308 goto out_requeue;
1309 if (!efx->port_enabled)
1310 goto out_unlock;
1311 rc = falcon_board(efx)->monitor(efx);
1312 if (rc) {
1313 EFX_ERR(efx, "Board sensor %s; shutting down PHY\n",
1314 (rc == -ERANGE) ? "reported fault" : "failed");
1315 efx->phy_mode |= PHY_MODE_LOW_POWER;
1316 falcon_sim_phy_event(efx);
1317 }
1318 efx->phy_op->poll(efx);
1319 efx->mac_op->poll(efx);
1320
1321 out_unlock:
1322 mutex_unlock(&efx->mac_lock);
1323 out_requeue:
1324 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1325 efx_monitor_interval);
1326 }
1327
1328 /**************************************************************************
1329 *
1330 * ioctls
1331 *
1332 *************************************************************************/
1333
1334 /* Net device ioctl
1335 * Context: process, rtnl_lock() held.
1336 */
1337 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1338 {
1339 struct efx_nic *efx = netdev_priv(net_dev);
1340 struct mii_ioctl_data *data = if_mii(ifr);
1341
1342 EFX_ASSERT_RESET_SERIALISED(efx);
1343
1344 /* Convert phy_id from older PRTAD/DEVAD format */
1345 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1346 (data->phy_id & 0xfc00) == 0x0400)
1347 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1348
1349 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1350 }
1351
1352 /**************************************************************************
1353 *
1354 * NAPI interface
1355 *
1356 **************************************************************************/
1357
1358 static int efx_init_napi(struct efx_nic *efx)
1359 {
1360 struct efx_channel *channel;
1361
1362 efx_for_each_channel(channel, efx) {
1363 channel->napi_dev = efx->net_dev;
1364 netif_napi_add(channel->napi_dev, &channel->napi_str,
1365 efx_poll, napi_weight);
1366 }
1367 return 0;
1368 }
1369
1370 static void efx_fini_napi(struct efx_nic *efx)
1371 {
1372 struct efx_channel *channel;
1373
1374 efx_for_each_channel(channel, efx) {
1375 if (channel->napi_dev)
1376 netif_napi_del(&channel->napi_str);
1377 channel->napi_dev = NULL;
1378 }
1379 }
1380
1381 /**************************************************************************
1382 *
1383 * Kernel netpoll interface
1384 *
1385 *************************************************************************/
1386
1387 #ifdef CONFIG_NET_POLL_CONTROLLER
1388
1389 /* Although in the common case interrupts will be disabled, this is not
1390 * guaranteed. However, all our work happens inside the NAPI callback,
1391 * so no locking is required.
1392 */
1393 static void efx_netpoll(struct net_device *net_dev)
1394 {
1395 struct efx_nic *efx = netdev_priv(net_dev);
1396 struct efx_channel *channel;
1397
1398 efx_for_each_channel(channel, efx)
1399 efx_schedule_channel(channel);
1400 }
1401
1402 #endif
1403
1404 /**************************************************************************
1405 *
1406 * Kernel net device interface
1407 *
1408 *************************************************************************/
1409
1410 /* Context: process, rtnl_lock() held. */
1411 static int efx_net_open(struct net_device *net_dev)
1412 {
1413 struct efx_nic *efx = netdev_priv(net_dev);
1414 EFX_ASSERT_RESET_SERIALISED(efx);
1415
1416 EFX_LOG(efx, "opening device %s on CPU %d\n", net_dev->name,
1417 raw_smp_processor_id());
1418
1419 if (efx->state == STATE_DISABLED)
1420 return -EIO;
1421 if (efx->phy_mode & PHY_MODE_SPECIAL)
1422 return -EBUSY;
1423
1424 efx_start_all(efx);
1425 return 0;
1426 }
1427
1428 /* Context: process, rtnl_lock() held.
1429 * Note that the kernel will ignore our return code; this method
1430 * should really be a void.
1431 */
1432 static int efx_net_stop(struct net_device *net_dev)
1433 {
1434 struct efx_nic *efx = netdev_priv(net_dev);
1435
1436 EFX_LOG(efx, "closing %s on CPU %d\n", net_dev->name,
1437 raw_smp_processor_id());
1438
1439 if (efx->state != STATE_DISABLED) {
1440 /* Stop the device and flush all the channels */
1441 efx_stop_all(efx);
1442 efx_fini_channels(efx);
1443 efx_init_channels(efx);
1444 }
1445
1446 return 0;
1447 }
1448
1449 void efx_stats_disable(struct efx_nic *efx)
1450 {
1451 spin_lock(&efx->stats_lock);
1452 ++efx->stats_disable_count;
1453 spin_unlock(&efx->stats_lock);
1454 }
1455
1456 void efx_stats_enable(struct efx_nic *efx)
1457 {
1458 spin_lock(&efx->stats_lock);
1459 --efx->stats_disable_count;
1460 spin_unlock(&efx->stats_lock);
1461 }
1462
1463 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1464 static struct net_device_stats *efx_net_stats(struct net_device *net_dev)
1465 {
1466 struct efx_nic *efx = netdev_priv(net_dev);
1467 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1468 struct net_device_stats *stats = &net_dev->stats;
1469
1470 /* Update stats if possible, but do not wait if another thread
1471 * is updating them or if MAC stats fetches are temporarily
1472 * disabled; slightly stale stats are acceptable.
1473 */
1474 if (!spin_trylock(&efx->stats_lock))
1475 return stats;
1476 if (!efx->stats_disable_count) {
1477 efx->mac_op->update_stats(efx);
1478 falcon_update_nic_stats(efx);
1479 }
1480 spin_unlock(&efx->stats_lock);
1481
1482 stats->rx_packets = mac_stats->rx_packets;
1483 stats->tx_packets = mac_stats->tx_packets;
1484 stats->rx_bytes = mac_stats->rx_bytes;
1485 stats->tx_bytes = mac_stats->tx_bytes;
1486 stats->multicast = mac_stats->rx_multicast;
1487 stats->collisions = mac_stats->tx_collision;
1488 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1489 mac_stats->rx_length_error);
1490 stats->rx_over_errors = efx->n_rx_nodesc_drop_cnt;
1491 stats->rx_crc_errors = mac_stats->rx_bad;
1492 stats->rx_frame_errors = mac_stats->rx_align_error;
1493 stats->rx_fifo_errors = mac_stats->rx_overflow;
1494 stats->rx_missed_errors = mac_stats->rx_missed;
1495 stats->tx_window_errors = mac_stats->tx_late_collision;
1496
1497 stats->rx_errors = (stats->rx_length_errors +
1498 stats->rx_over_errors +
1499 stats->rx_crc_errors +
1500 stats->rx_frame_errors +
1501 stats->rx_fifo_errors +
1502 stats->rx_missed_errors +
1503 mac_stats->rx_symbol_error);
1504 stats->tx_errors = (stats->tx_window_errors +
1505 mac_stats->tx_bad);
1506
1507 return stats;
1508 }
1509
1510 /* Context: netif_tx_lock held, BHs disabled. */
1511 static void efx_watchdog(struct net_device *net_dev)
1512 {
1513 struct efx_nic *efx = netdev_priv(net_dev);
1514
1515 EFX_ERR(efx, "TX stuck with stop_count=%d port_enabled=%d:"
1516 " resetting channels\n",
1517 atomic_read(&efx->netif_stop_count), efx->port_enabled);
1518
1519 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1520 }
1521
1522
1523 /* Context: process, rtnl_lock() held. */
1524 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1525 {
1526 struct efx_nic *efx = netdev_priv(net_dev);
1527 int rc = 0;
1528
1529 EFX_ASSERT_RESET_SERIALISED(efx);
1530
1531 if (new_mtu > EFX_MAX_MTU)
1532 return -EINVAL;
1533
1534 efx_stop_all(efx);
1535
1536 EFX_LOG(efx, "changing MTU to %d\n", new_mtu);
1537
1538 efx_fini_channels(efx);
1539 net_dev->mtu = new_mtu;
1540 efx_init_channels(efx);
1541
1542 efx_start_all(efx);
1543 return rc;
1544 }
1545
1546 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1547 {
1548 struct efx_nic *efx = netdev_priv(net_dev);
1549 struct sockaddr *addr = data;
1550 char *new_addr = addr->sa_data;
1551
1552 EFX_ASSERT_RESET_SERIALISED(efx);
1553
1554 if (!is_valid_ether_addr(new_addr)) {
1555 EFX_ERR(efx, "invalid ethernet MAC address requested: %pM\n",
1556 new_addr);
1557 return -EINVAL;
1558 }
1559
1560 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1561
1562 /* Reconfigure the MAC */
1563 efx_reconfigure_port(efx);
1564
1565 return 0;
1566 }
1567
1568 /* Context: netif_addr_lock held, BHs disabled. */
1569 static void efx_set_multicast_list(struct net_device *net_dev)
1570 {
1571 struct efx_nic *efx = netdev_priv(net_dev);
1572 struct dev_mc_list *mc_list = net_dev->mc_list;
1573 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1574 bool promiscuous = !!(net_dev->flags & IFF_PROMISC);
1575 bool changed = (efx->promiscuous != promiscuous);
1576 u32 crc;
1577 int bit;
1578 int i;
1579
1580 efx->promiscuous = promiscuous;
1581
1582 /* Build multicast hash table */
1583 if (promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1584 memset(mc_hash, 0xff, sizeof(*mc_hash));
1585 } else {
1586 memset(mc_hash, 0x00, sizeof(*mc_hash));
1587 for (i = 0; i < net_dev->mc_count; i++) {
1588 crc = ether_crc_le(ETH_ALEN, mc_list->dmi_addr);
1589 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1590 set_bit_le(bit, mc_hash->byte);
1591 mc_list = mc_list->next;
1592 }
1593 }
1594
1595 if (!efx->port_enabled)
1596 /* Delay pushing settings until efx_start_port() */
1597 return;
1598
1599 if (changed)
1600 queue_work(efx->workqueue, &efx->phy_work);
1601
1602 /* Create and activate new global multicast hash table */
1603 falcon_set_multicast_hash(efx);
1604 }
1605
1606 static const struct net_device_ops efx_netdev_ops = {
1607 .ndo_open = efx_net_open,
1608 .ndo_stop = efx_net_stop,
1609 .ndo_get_stats = efx_net_stats,
1610 .ndo_tx_timeout = efx_watchdog,
1611 .ndo_start_xmit = efx_hard_start_xmit,
1612 .ndo_validate_addr = eth_validate_addr,
1613 .ndo_do_ioctl = efx_ioctl,
1614 .ndo_change_mtu = efx_change_mtu,
1615 .ndo_set_mac_address = efx_set_mac_address,
1616 .ndo_set_multicast_list = efx_set_multicast_list,
1617 #ifdef CONFIG_NET_POLL_CONTROLLER
1618 .ndo_poll_controller = efx_netpoll,
1619 #endif
1620 };
1621
1622 static void efx_update_name(struct efx_nic *efx)
1623 {
1624 strcpy(efx->name, efx->net_dev->name);
1625 efx_mtd_rename(efx);
1626 efx_set_channel_names(efx);
1627 }
1628
1629 static int efx_netdev_event(struct notifier_block *this,
1630 unsigned long event, void *ptr)
1631 {
1632 struct net_device *net_dev = ptr;
1633
1634 if (net_dev->netdev_ops == &efx_netdev_ops &&
1635 event == NETDEV_CHANGENAME)
1636 efx_update_name(netdev_priv(net_dev));
1637
1638 return NOTIFY_DONE;
1639 }
1640
1641 static struct notifier_block efx_netdev_notifier = {
1642 .notifier_call = efx_netdev_event,
1643 };
1644
1645 static ssize_t
1646 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1647 {
1648 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1649 return sprintf(buf, "%d\n", efx->phy_type);
1650 }
1651 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1652
1653 static int efx_register_netdev(struct efx_nic *efx)
1654 {
1655 struct net_device *net_dev = efx->net_dev;
1656 int rc;
1657
1658 net_dev->watchdog_timeo = 5 * HZ;
1659 net_dev->irq = efx->pci_dev->irq;
1660 net_dev->netdev_ops = &efx_netdev_ops;
1661 SET_NETDEV_DEV(net_dev, &efx->pci_dev->dev);
1662 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1663
1664 /* Clear MAC statistics */
1665 efx->mac_op->update_stats(efx);
1666 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1667
1668 rtnl_lock();
1669
1670 rc = dev_alloc_name(net_dev, net_dev->name);
1671 if (rc < 0)
1672 goto fail_locked;
1673 efx_update_name(efx);
1674
1675 rc = register_netdevice(net_dev);
1676 if (rc)
1677 goto fail_locked;
1678
1679 /* Always start with carrier off; PHY events will detect the link */
1680 netif_carrier_off(efx->net_dev);
1681
1682 rtnl_unlock();
1683
1684 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1685 if (rc) {
1686 EFX_ERR(efx, "failed to init net dev attributes\n");
1687 goto fail_registered;
1688 }
1689
1690 return 0;
1691
1692 fail_locked:
1693 rtnl_unlock();
1694 EFX_ERR(efx, "could not register net dev\n");
1695 return rc;
1696
1697 fail_registered:
1698 unregister_netdev(net_dev);
1699 return rc;
1700 }
1701
1702 static void efx_unregister_netdev(struct efx_nic *efx)
1703 {
1704 struct efx_tx_queue *tx_queue;
1705
1706 if (!efx->net_dev)
1707 return;
1708
1709 BUG_ON(netdev_priv(efx->net_dev) != efx);
1710
1711 /* Free up any skbs still remaining. This has to happen before
1712 * we try to unregister the netdev as running their destructors
1713 * may be needed to get the device ref. count to 0. */
1714 efx_for_each_tx_queue(tx_queue, efx)
1715 efx_release_tx_buffers(tx_queue);
1716
1717 if (efx_dev_registered(efx)) {
1718 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1719 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1720 unregister_netdev(efx->net_dev);
1721 }
1722 }
1723
1724 /**************************************************************************
1725 *
1726 * Device reset and suspend
1727 *
1728 **************************************************************************/
1729
1730 /* Tears down the entire software state and most of the hardware state
1731 * before reset. */
1732 void efx_reset_down(struct efx_nic *efx, enum reset_type method,
1733 struct ethtool_cmd *ecmd)
1734 {
1735 EFX_ASSERT_RESET_SERIALISED(efx);
1736
1737 efx_stats_disable(efx);
1738 efx_stop_all(efx);
1739 mutex_lock(&efx->mac_lock);
1740 mutex_lock(&efx->spi_lock);
1741
1742 efx->phy_op->get_settings(efx, ecmd);
1743
1744 efx_fini_channels(efx);
1745 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
1746 efx->phy_op->fini(efx);
1747 }
1748
1749 /* This function will always ensure that the locks acquired in
1750 * efx_reset_down() are released. A failure return code indicates
1751 * that we were unable to reinitialise the hardware, and the
1752 * driver should be disabled. If ok is false, then the rx and tx
1753 * engines are not restarted, pending a RESET_DISABLE. */
1754 int efx_reset_up(struct efx_nic *efx, enum reset_type method,
1755 struct ethtool_cmd *ecmd, bool ok)
1756 {
1757 int rc;
1758
1759 EFX_ASSERT_RESET_SERIALISED(efx);
1760
1761 rc = falcon_init_nic(efx);
1762 if (rc) {
1763 EFX_ERR(efx, "failed to initialise NIC\n");
1764 ok = false;
1765 }
1766
1767 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
1768 if (ok) {
1769 rc = efx->phy_op->init(efx);
1770 if (rc)
1771 ok = false;
1772 }
1773 if (!ok)
1774 efx->port_initialized = false;
1775 }
1776
1777 if (ok) {
1778 efx_init_channels(efx);
1779
1780 if (efx->phy_op->set_settings(efx, ecmd))
1781 EFX_ERR(efx, "could not restore PHY settings\n");
1782 }
1783
1784 mutex_unlock(&efx->spi_lock);
1785 mutex_unlock(&efx->mac_lock);
1786
1787 if (ok) {
1788 efx_start_all(efx);
1789 efx_stats_enable(efx);
1790 }
1791 return rc;
1792 }
1793
1794 /* Reset the NIC as transparently as possible. Do not reset the PHY
1795 * Note that the reset may fail, in which case the card will be left
1796 * in a most-probably-unusable state.
1797 *
1798 * This function will sleep. You cannot reset from within an atomic
1799 * state; use efx_schedule_reset() instead.
1800 *
1801 * Grabs the rtnl_lock.
1802 */
1803 static int efx_reset(struct efx_nic *efx)
1804 {
1805 struct ethtool_cmd ecmd;
1806 enum reset_type method = efx->reset_pending;
1807 int rc = 0;
1808
1809 /* Serialise with kernel interfaces */
1810 rtnl_lock();
1811
1812 /* If we're not RUNNING then don't reset. Leave the reset_pending
1813 * flag set so that efx_pci_probe_main will be retried */
1814 if (efx->state != STATE_RUNNING) {
1815 EFX_INFO(efx, "scheduled reset quenched. NIC not RUNNING\n");
1816 goto out_unlock;
1817 }
1818
1819 EFX_INFO(efx, "resetting (%s)\n", RESET_TYPE(method));
1820
1821 efx_reset_down(efx, method, &ecmd);
1822
1823 rc = falcon_reset_hw(efx, method);
1824 if (rc) {
1825 EFX_ERR(efx, "failed to reset hardware\n");
1826 goto out_disable;
1827 }
1828
1829 /* Allow resets to be rescheduled. */
1830 efx->reset_pending = RESET_TYPE_NONE;
1831
1832 /* Reinitialise bus-mastering, which may have been turned off before
1833 * the reset was scheduled. This is still appropriate, even in the
1834 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
1835 * can respond to requests. */
1836 pci_set_master(efx->pci_dev);
1837
1838 /* Leave device stopped if necessary */
1839 if (method == RESET_TYPE_DISABLE) {
1840 efx_reset_up(efx, method, &ecmd, false);
1841 rc = -EIO;
1842 } else {
1843 rc = efx_reset_up(efx, method, &ecmd, true);
1844 }
1845
1846 out_disable:
1847 if (rc) {
1848 EFX_ERR(efx, "has been disabled\n");
1849 efx->state = STATE_DISABLED;
1850 dev_close(efx->net_dev);
1851 } else {
1852 EFX_LOG(efx, "reset complete\n");
1853 }
1854
1855 out_unlock:
1856 rtnl_unlock();
1857 return rc;
1858 }
1859
1860 /* The worker thread exists so that code that cannot sleep can
1861 * schedule a reset for later.
1862 */
1863 static void efx_reset_work(struct work_struct *data)
1864 {
1865 struct efx_nic *nic = container_of(data, struct efx_nic, reset_work);
1866
1867 efx_reset(nic);
1868 }
1869
1870 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
1871 {
1872 enum reset_type method;
1873
1874 if (efx->reset_pending != RESET_TYPE_NONE) {
1875 EFX_INFO(efx, "quenching already scheduled reset\n");
1876 return;
1877 }
1878
1879 switch (type) {
1880 case RESET_TYPE_INVISIBLE:
1881 case RESET_TYPE_ALL:
1882 case RESET_TYPE_WORLD:
1883 case RESET_TYPE_DISABLE:
1884 method = type;
1885 break;
1886 case RESET_TYPE_RX_RECOVERY:
1887 case RESET_TYPE_RX_DESC_FETCH:
1888 case RESET_TYPE_TX_DESC_FETCH:
1889 case RESET_TYPE_TX_SKIP:
1890 method = RESET_TYPE_INVISIBLE;
1891 break;
1892 default:
1893 method = RESET_TYPE_ALL;
1894 break;
1895 }
1896
1897 if (method != type)
1898 EFX_LOG(efx, "scheduling %s reset for %s\n",
1899 RESET_TYPE(method), RESET_TYPE(type));
1900 else
1901 EFX_LOG(efx, "scheduling %s reset\n", RESET_TYPE(method));
1902
1903 efx->reset_pending = method;
1904
1905 queue_work(reset_workqueue, &efx->reset_work);
1906 }
1907
1908 /**************************************************************************
1909 *
1910 * List of NICs we support
1911 *
1912 **************************************************************************/
1913
1914 /* PCI device ID table */
1915 static struct pci_device_id efx_pci_table[] __devinitdata = {
1916 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
1917 .driver_data = (unsigned long) &falcon_a_nic_type},
1918 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
1919 .driver_data = (unsigned long) &falcon_b_nic_type},
1920 {0} /* end of list */
1921 };
1922
1923 /**************************************************************************
1924 *
1925 * Dummy PHY/MAC operations
1926 *
1927 * Can be used for some unimplemented operations
1928 * Needed so all function pointers are valid and do not have to be tested
1929 * before use
1930 *
1931 **************************************************************************/
1932 int efx_port_dummy_op_int(struct efx_nic *efx)
1933 {
1934 return 0;
1935 }
1936 void efx_port_dummy_op_void(struct efx_nic *efx) {}
1937 void efx_port_dummy_op_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
1938 {
1939 }
1940
1941 static struct efx_mac_operations efx_dummy_mac_operations = {
1942 .reconfigure = efx_port_dummy_op_void,
1943 .poll = efx_port_dummy_op_void,
1944 .irq = efx_port_dummy_op_void,
1945 };
1946
1947 static struct efx_phy_operations efx_dummy_phy_operations = {
1948 .init = efx_port_dummy_op_int,
1949 .reconfigure = efx_port_dummy_op_void,
1950 .poll = efx_port_dummy_op_void,
1951 .fini = efx_port_dummy_op_void,
1952 .clear_interrupt = efx_port_dummy_op_void,
1953 };
1954
1955 /**************************************************************************
1956 *
1957 * Data housekeeping
1958 *
1959 **************************************************************************/
1960
1961 /* This zeroes out and then fills in the invariants in a struct
1962 * efx_nic (including all sub-structures).
1963 */
1964 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
1965 struct pci_dev *pci_dev, struct net_device *net_dev)
1966 {
1967 struct efx_channel *channel;
1968 struct efx_tx_queue *tx_queue;
1969 struct efx_rx_queue *rx_queue;
1970 int i;
1971
1972 /* Initialise common structures */
1973 memset(efx, 0, sizeof(*efx));
1974 spin_lock_init(&efx->biu_lock);
1975 spin_lock_init(&efx->phy_lock);
1976 mutex_init(&efx->spi_lock);
1977 INIT_WORK(&efx->reset_work, efx_reset_work);
1978 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
1979 efx->pci_dev = pci_dev;
1980 efx->state = STATE_INIT;
1981 efx->reset_pending = RESET_TYPE_NONE;
1982 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
1983
1984 efx->net_dev = net_dev;
1985 efx->rx_checksum_enabled = true;
1986 spin_lock_init(&efx->netif_stop_lock);
1987 spin_lock_init(&efx->stats_lock);
1988 efx->stats_disable_count = 1;
1989 mutex_init(&efx->mac_lock);
1990 efx->mac_op = &efx_dummy_mac_operations;
1991 efx->phy_op = &efx_dummy_phy_operations;
1992 efx->mdio.dev = net_dev;
1993 INIT_WORK(&efx->phy_work, efx_phy_work);
1994 INIT_WORK(&efx->mac_work, efx_mac_work);
1995 atomic_set(&efx->netif_stop_count, 1);
1996
1997 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
1998 channel = &efx->channel[i];
1999 channel->efx = efx;
2000 channel->channel = i;
2001 channel->work_pending = false;
2002 }
2003 for (i = 0; i < EFX_TX_QUEUE_COUNT; i++) {
2004 tx_queue = &efx->tx_queue[i];
2005 tx_queue->efx = efx;
2006 tx_queue->queue = i;
2007 tx_queue->buffer = NULL;
2008 tx_queue->channel = &efx->channel[0]; /* for safety */
2009 tx_queue->tso_headers_free = NULL;
2010 }
2011 for (i = 0; i < EFX_MAX_RX_QUEUES; i++) {
2012 rx_queue = &efx->rx_queue[i];
2013 rx_queue->efx = efx;
2014 rx_queue->queue = i;
2015 rx_queue->channel = &efx->channel[0]; /* for safety */
2016 rx_queue->buffer = NULL;
2017 spin_lock_init(&rx_queue->add_lock);
2018 INIT_DELAYED_WORK(&rx_queue->work, efx_rx_work);
2019 }
2020
2021 efx->type = type;
2022
2023 /* As close as we can get to guaranteeing that we don't overflow */
2024 BUILD_BUG_ON(EFX_EVQ_SIZE < EFX_TXQ_SIZE + EFX_RXQ_SIZE);
2025
2026 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2027
2028 /* Higher numbered interrupt modes are less capable! */
2029 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2030 interrupt_mode);
2031
2032 /* Would be good to use the net_dev name, but we're too early */
2033 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2034 pci_name(pci_dev));
2035 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2036 if (!efx->workqueue)
2037 return -ENOMEM;
2038
2039 return 0;
2040 }
2041
2042 static void efx_fini_struct(struct efx_nic *efx)
2043 {
2044 if (efx->workqueue) {
2045 destroy_workqueue(efx->workqueue);
2046 efx->workqueue = NULL;
2047 }
2048 }
2049
2050 /**************************************************************************
2051 *
2052 * PCI interface
2053 *
2054 **************************************************************************/
2055
2056 /* Main body of final NIC shutdown code
2057 * This is called only at module unload (or hotplug removal).
2058 */
2059 static void efx_pci_remove_main(struct efx_nic *efx)
2060 {
2061 falcon_fini_interrupt(efx);
2062 efx_fini_channels(efx);
2063 efx_fini_port(efx);
2064 efx_fini_napi(efx);
2065 efx_remove_all(efx);
2066 }
2067
2068 /* Final NIC shutdown
2069 * This is called only at module unload (or hotplug removal).
2070 */
2071 static void efx_pci_remove(struct pci_dev *pci_dev)
2072 {
2073 struct efx_nic *efx;
2074
2075 efx = pci_get_drvdata(pci_dev);
2076 if (!efx)
2077 return;
2078
2079 /* Mark the NIC as fini, then stop the interface */
2080 rtnl_lock();
2081 efx->state = STATE_FINI;
2082 dev_close(efx->net_dev);
2083
2084 /* Allow any queued efx_resets() to complete */
2085 rtnl_unlock();
2086
2087 efx_unregister_netdev(efx);
2088
2089 efx_mtd_remove(efx);
2090
2091 /* Wait for any scheduled resets to complete. No more will be
2092 * scheduled from this point because efx_stop_all() has been
2093 * called, we are no longer registered with driverlink, and
2094 * the net_device's have been removed. */
2095 cancel_work_sync(&efx->reset_work);
2096
2097 efx_pci_remove_main(efx);
2098
2099 efx_fini_io(efx);
2100 EFX_LOG(efx, "shutdown successful\n");
2101
2102 pci_set_drvdata(pci_dev, NULL);
2103 efx_fini_struct(efx);
2104 free_netdev(efx->net_dev);
2105 };
2106
2107 /* Main body of NIC initialisation
2108 * This is called at module load (or hotplug insertion, theoretically).
2109 */
2110 static int efx_pci_probe_main(struct efx_nic *efx)
2111 {
2112 int rc;
2113
2114 /* Do start-of-day initialisation */
2115 rc = efx_probe_all(efx);
2116 if (rc)
2117 goto fail1;
2118
2119 rc = efx_init_napi(efx);
2120 if (rc)
2121 goto fail2;
2122
2123 rc = falcon_init_nic(efx);
2124 if (rc) {
2125 EFX_ERR(efx, "failed to initialise NIC\n");
2126 goto fail3;
2127 }
2128
2129 rc = efx_init_port(efx);
2130 if (rc) {
2131 EFX_ERR(efx, "failed to initialise port\n");
2132 goto fail4;
2133 }
2134
2135 efx_init_channels(efx);
2136
2137 rc = falcon_init_interrupt(efx);
2138 if (rc)
2139 goto fail5;
2140
2141 return 0;
2142
2143 fail5:
2144 efx_fini_channels(efx);
2145 efx_fini_port(efx);
2146 fail4:
2147 fail3:
2148 efx_fini_napi(efx);
2149 fail2:
2150 efx_remove_all(efx);
2151 fail1:
2152 return rc;
2153 }
2154
2155 /* NIC initialisation
2156 *
2157 * This is called at module load (or hotplug insertion,
2158 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2159 * sets up and registers the network devices with the kernel and hooks
2160 * the interrupt service routine. It does not prepare the device for
2161 * transmission; this is left to the first time one of the network
2162 * interfaces is brought up (i.e. efx_net_open).
2163 */
2164 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2165 const struct pci_device_id *entry)
2166 {
2167 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2168 struct net_device *net_dev;
2169 struct efx_nic *efx;
2170 int i, rc;
2171
2172 /* Allocate and initialise a struct net_device and struct efx_nic */
2173 net_dev = alloc_etherdev(sizeof(*efx));
2174 if (!net_dev)
2175 return -ENOMEM;
2176 net_dev->features |= (NETIF_F_IP_CSUM | NETIF_F_SG |
2177 NETIF_F_HIGHDMA | NETIF_F_TSO |
2178 NETIF_F_GRO);
2179 /* Mask for features that also apply to VLAN devices */
2180 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2181 NETIF_F_HIGHDMA | NETIF_F_TSO);
2182 efx = netdev_priv(net_dev);
2183 pci_set_drvdata(pci_dev, efx);
2184 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2185 if (rc)
2186 goto fail1;
2187
2188 EFX_INFO(efx, "Solarflare Communications NIC detected\n");
2189
2190 /* Set up basic I/O (BAR mappings etc) */
2191 rc = efx_init_io(efx);
2192 if (rc)
2193 goto fail2;
2194
2195 /* No serialisation is required with the reset path because
2196 * we're in STATE_INIT. */
2197 for (i = 0; i < 5; i++) {
2198 rc = efx_pci_probe_main(efx);
2199
2200 /* Serialise against efx_reset(). No more resets will be
2201 * scheduled since efx_stop_all() has been called, and we
2202 * have not and never have been registered with either
2203 * the rtnetlink or driverlink layers. */
2204 cancel_work_sync(&efx->reset_work);
2205
2206 if (rc == 0) {
2207 if (efx->reset_pending != RESET_TYPE_NONE) {
2208 /* If there was a scheduled reset during
2209 * probe, the NIC is probably hosed anyway */
2210 efx_pci_remove_main(efx);
2211 rc = -EIO;
2212 } else {
2213 break;
2214 }
2215 }
2216
2217 /* Retry if a recoverably reset event has been scheduled */
2218 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2219 (efx->reset_pending != RESET_TYPE_ALL))
2220 goto fail3;
2221
2222 efx->reset_pending = RESET_TYPE_NONE;
2223 }
2224
2225 if (rc) {
2226 EFX_ERR(efx, "Could not reset NIC\n");
2227 goto fail4;
2228 }
2229
2230 /* Switch to the running state before we expose the device to
2231 * the OS. This is to ensure that the initial gathering of
2232 * MAC stats succeeds. */
2233 efx->state = STATE_RUNNING;
2234
2235 rc = efx_register_netdev(efx);
2236 if (rc)
2237 goto fail5;
2238
2239 EFX_LOG(efx, "initialisation successful\n");
2240
2241 rtnl_lock();
2242 efx_mtd_probe(efx); /* allowed to fail */
2243 rtnl_unlock();
2244 return 0;
2245
2246 fail5:
2247 efx_pci_remove_main(efx);
2248 fail4:
2249 fail3:
2250 efx_fini_io(efx);
2251 fail2:
2252 efx_fini_struct(efx);
2253 fail1:
2254 EFX_LOG(efx, "initialisation failed. rc=%d\n", rc);
2255 free_netdev(net_dev);
2256 return rc;
2257 }
2258
2259 static struct pci_driver efx_pci_driver = {
2260 .name = EFX_DRIVER_NAME,
2261 .id_table = efx_pci_table,
2262 .probe = efx_pci_probe,
2263 .remove = efx_pci_remove,
2264 };
2265
2266 /**************************************************************************
2267 *
2268 * Kernel module interface
2269 *
2270 *************************************************************************/
2271
2272 module_param(interrupt_mode, uint, 0444);
2273 MODULE_PARM_DESC(interrupt_mode,
2274 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2275
2276 static int __init efx_init_module(void)
2277 {
2278 int rc;
2279
2280 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2281
2282 rc = register_netdevice_notifier(&efx_netdev_notifier);
2283 if (rc)
2284 goto err_notifier;
2285
2286 refill_workqueue = create_workqueue("sfc_refill");
2287 if (!refill_workqueue) {
2288 rc = -ENOMEM;
2289 goto err_refill;
2290 }
2291 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2292 if (!reset_workqueue) {
2293 rc = -ENOMEM;
2294 goto err_reset;
2295 }
2296
2297 rc = pci_register_driver(&efx_pci_driver);
2298 if (rc < 0)
2299 goto err_pci;
2300
2301 return 0;
2302
2303 err_pci:
2304 destroy_workqueue(reset_workqueue);
2305 err_reset:
2306 destroy_workqueue(refill_workqueue);
2307 err_refill:
2308 unregister_netdevice_notifier(&efx_netdev_notifier);
2309 err_notifier:
2310 return rc;
2311 }
2312
2313 static void __exit efx_exit_module(void)
2314 {
2315 printk(KERN_INFO "Solarflare NET driver unloading\n");
2316
2317 pci_unregister_driver(&efx_pci_driver);
2318 destroy_workqueue(reset_workqueue);
2319 destroy_workqueue(refill_workqueue);
2320 unregister_netdevice_notifier(&efx_netdev_notifier);
2321
2322 }
2323
2324 module_init(efx_init_module);
2325 module_exit(efx_exit_module);
2326
2327 MODULE_AUTHOR("Michael Brown <mbrown@fensystems.co.uk> and "
2328 "Solarflare Communications");
2329 MODULE_DESCRIPTION("Solarflare Communications network driver");
2330 MODULE_LICENSE("GPL");
2331 MODULE_DEVICE_TABLE(pci, efx_pci_table);
This page took 0.119948 seconds and 5 git commands to generate.