drivers/net/sfc/falcon_io.h

   1 /****************************************************************************
   2  * Driver for Solarflare Solarstorm network controllers and boards
   3  * Copyright 2005-2006 Fen Systems Ltd.
   4  * Copyright 2006-2008 Solarflare Communications Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 as published
   8  * by the Free Software Foundation, incorporated herein by reference.
   9  */
  10
  11 #ifndef EFX_FALCON_IO_H
  12 #define EFX_FALCON_IO_H
  13
  14 #include <linux/io.h>
  15 #include <linux/spinlock.h>
  16 #include "net_driver.h"
  17
  18 /**************************************************************************
  19  *
  20  * Falcon hardware access
  21  *
  22  **************************************************************************
  23  *
  24  * Notes on locking strategy:
  25  *
  26  * Most Falcon registers require 16-byte (or 8-byte, for SRAM
  27  * registers) atomic writes which necessitates locking.
  28  * Under normal operation few writes to the Falcon BAR are made and these
  29  * registers (EVQ_RPTR_REG, RX_DESC_UPD_REG and TX_DESC_UPD_REG) are special
  30  * cased to allow 4-byte (hence lockless) accesses.
  31  *
  32  * It *is* safe to write to these 4-byte registers in the middle of an
  33  * access to an 8-byte or 16-byte register.  We therefore use a
  34  * spinlock to protect accesses to the larger registers, but no locks
  35  * for the 4-byte registers.
  36  *
  37  * A write barrier is needed to ensure that DW3 is written after DW0/1/2
  38  * due to the way the 16byte registers are "collected" in the Falcon BIU
  39  *
  40  * We also lock when carrying out reads, to ensure consistency of the
  41  * data (made possible since the BIU reads all 128 bits into a cache).
  42  * Reads are very rare, so this isn't a significant performance
  43  * impact.  (Most data transferred from NIC to host is DMAed directly
  44  * into host memory).
  45  *
  46  * I/O BAR access uses locks for both reads and writes (but is only provided
  47  * for testing purposes).
  48  */
  49
  50 /* Special buffer descriptors (Falcon SRAM) */
  51 #define BUF_TBL_KER_A1 0x18000
  52 #define BUF_TBL_KER_B0 0x800000
  53
  54
  55 #if BITS_PER_LONG == 64
  56 #define FALCON_USE_QWORD_IO 1
  57 #endif
  58
  59 #define _falcon_writeq(efx, value, reg) \
  60         __raw_writeq((__force u64) (value), (efx)->membase + (reg))
  61 #define _falcon_writel(efx, value, reg) \
  62         __raw_writel((__force u32) (value), (efx)->membase + (reg))
  63 #define _falcon_readq(efx, reg) \
  64         ((__force __le64) __raw_readq((efx)->membase + (reg)))
  65 #define _falcon_readl(efx, reg) \
  66         ((__force __le32) __raw_readl((efx)->membase + (reg)))
  67
  68 /* Writes to a normal 16-byte Falcon register, locking as appropriate. */
  69 static inline void falcon_write(struct efx_nic *efx, efx_oword_t *value,
  70                                 unsigned int reg)
  71 {
  72         unsigned long flags;
  73
  74         EFX_REGDUMP(efx, "writing register %x with " EFX_OWORD_FMT "\n", reg,
  75                     EFX_OWORD_VAL(*value));
  76
  77         spin_lock_irqsave(&efx->biu_lock, flags);
  78 #ifdef FALCON_USE_QWORD_IO
  79         _falcon_writeq(efx, value->u64[0], reg + 0);
  80         wmb();
  81         _falcon_writeq(efx, value->u64[1], reg + 8);
  82 #else
  83         _falcon_writel(efx, value->u32[0], reg + 0);
  84         _falcon_writel(efx, value->u32[1], reg + 4);
  85         _falcon_writel(efx, value->u32[2], reg + 8);
  86         wmb();
  87         _falcon_writel(efx, value->u32[3], reg + 12);
  88 #endif
  89         mmiowb();
  90         spin_unlock_irqrestore(&efx->biu_lock, flags);
  91 }
  92
  93 /* Writes to an 8-byte Falcon SRAM register, locking as appropriate. */
  94 static inline void falcon_write_sram(struct efx_nic *efx, efx_qword_t *value,
  95                                      unsigned int index)
  96 {
  97         unsigned int reg = efx->type->buf_tbl_base + (index * sizeof(*value));
  98         unsigned long flags;
  99
 100         EFX_REGDUMP(efx, "writing SRAM register %x with " EFX_QWORD_FMT "\n",
 101                     reg, EFX_QWORD_VAL(*value));
 102
 103         spin_lock_irqsave(&efx->biu_lock, flags);
 104 #ifdef FALCON_USE_QWORD_IO
 105         _falcon_writeq(efx, value->u64[0], reg + 0);
 106 #else
 107         _falcon_writel(efx, value->u32[0], reg + 0);
 108         wmb();
 109         _falcon_writel(efx, value->u32[1], reg + 4);
 110 #endif
 111         mmiowb();
 112         spin_unlock_irqrestore(&efx->biu_lock, flags);
 113 }
 114
 115 /* Write dword to Falcon register that allows partial writes
 116  *
 117  * Some Falcon registers (EVQ_RPTR_REG, RX_DESC_UPD_REG and
 118  * TX_DESC_UPD_REG) can be written to as a single dword.  This allows
 119  * for lockless writes.
 120  */
 121 static inline void falcon_writel(struct efx_nic *efx, efx_dword_t *value,
 122                                  unsigned int reg)
 123 {
 124         EFX_REGDUMP(efx, "writing partial register %x with "EFX_DWORD_FMT"\n",
 125                     reg, EFX_DWORD_VAL(*value));
 126
 127         /* No lock required */
 128         _falcon_writel(efx, value->u32[0], reg);
 129 }
 130
 131 /* Read from a Falcon register
 132  *
 133  * This reads an entire 16-byte Falcon register in one go, locking as
 134  * appropriate.  It is essential to read the first dword first, as this
 135  * prompts Falcon to load the current value into the shadow register.
 136  */
 137 static inline void falcon_read(struct efx_nic *efx, efx_oword_t *value,
 138                                unsigned int reg)
 139 {
 140         unsigned long flags;
 141
 142         spin_lock_irqsave(&efx->biu_lock, flags);
 143         value->u32[0] = _falcon_readl(efx, reg + 0);
 144         rmb();
 145         value->u32[1] = _falcon_readl(efx, reg + 4);
 146         value->u32[2] = _falcon_readl(efx, reg + 8);
 147         value->u32[3] = _falcon_readl(efx, reg + 12);
 148         spin_unlock_irqrestore(&efx->biu_lock, flags);
 149
 150         EFX_REGDUMP(efx, "read from register %x, got " EFX_OWORD_FMT "\n", reg,
 151                     EFX_OWORD_VAL(*value));
 152 }
 153
 154 /* This reads an 8-byte Falcon SRAM entry in one go. */
 155 static inline void falcon_read_sram(struct efx_nic *efx, efx_qword_t *value,
 156                                     unsigned int index)
 157 {
 158         unsigned int reg = efx->type->buf_tbl_base + (index * sizeof(*value));
 159         unsigned long flags;
 160
 161         spin_lock_irqsave(&efx->biu_lock, flags);
 162 #ifdef FALCON_USE_QWORD_IO
 163         value->u64[0] = _falcon_readq(efx, reg + 0);
 164 #else
 165         value->u32[0] = _falcon_readl(efx, reg + 0);
 166         rmb();
 167         value->u32[1] = _falcon_readl(efx, reg + 4);
 168 #endif
 169         spin_unlock_irqrestore(&efx->biu_lock, flags);
 170
 171         EFX_REGDUMP(efx, "read from SRAM register %x, got "EFX_QWORD_FMT"\n",
 172                     reg, EFX_QWORD_VAL(*value));
 173 }
 174
 175 /* Read dword from Falcon register that allows partial writes (sic) */
 176 static inline void falcon_readl(struct efx_nic *efx, efx_dword_t *value,
 177                                 unsigned int reg)
 178 {
 179         value->u32[0] = _falcon_readl(efx, reg);
 180         EFX_REGDUMP(efx, "read from register %x, got "EFX_DWORD_FMT"\n",
 181                     reg, EFX_DWORD_VAL(*value));
 182 }
 183
 184 /* Write to a register forming part of a table */
 185 static inline void falcon_write_table(struct efx_nic *efx, efx_oword_t *value,
 186                                       unsigned int reg, unsigned int index)
 187 {
 188         falcon_write(efx, value, reg + index * sizeof(efx_oword_t));
 189 }
 190
 191 /* Read to a register forming part of a table */
 192 static inline void falcon_read_table(struct efx_nic *efx, efx_oword_t *value,
 193                                      unsigned int reg, unsigned int index)
 194 {
 195         falcon_read(efx, value, reg + index * sizeof(efx_oword_t));
 196 }
 197
 198 /* Write to a dword register forming part of a table */
 199 static inline void falcon_writel_table(struct efx_nic *efx, efx_dword_t *value,
 200                                        unsigned int reg, unsigned int index)
 201 {
 202         falcon_writel(efx, value, reg + index * sizeof(efx_oword_t));
 203 }
 204
 205 /* Page-mapped register block size */
 206 #define FALCON_PAGE_BLOCK_SIZE 0x2000
 207
 208 /* Calculate offset to page-mapped register block */
 209 #define FALCON_PAGED_REG(page, reg) \
 210         ((page) * FALCON_PAGE_BLOCK_SIZE + (reg))
 211
 212 /* As for falcon_write(), but for a page-mapped register. */
 213 static inline void falcon_write_page(struct efx_nic *efx, efx_oword_t *value,
 214                                      unsigned int reg, unsigned int page)
 215 {
 216         falcon_write(efx, value, FALCON_PAGED_REG(page, reg));
 217 }
 218
 219 /* As for falcon_writel(), but for a page-mapped register. */
 220 static inline void falcon_writel_page(struct efx_nic *efx, efx_dword_t *value,
 221                                       unsigned int reg, unsigned int page)
 222 {
 223         falcon_writel(efx, value, FALCON_PAGED_REG(page, reg));
 224 }
 225
 226 /* Write dword to Falcon page-mapped register with an extra lock.
 227  *
 228  * As for falcon_writel_page(), but for a register that suffers from
 229  * SFC bug 3181. Take out a lock so the BIU collector cannot be
 230  * confused. */
 231 static inline void falcon_writel_page_locked(struct efx_nic *efx,
 232                                              efx_dword_t *value,
 233                                              unsigned int reg,
 234                                              unsigned int page)
 235 {
 236         unsigned long flags;
 237
 238         spin_lock_irqsave(&efx->biu_lock, flags);
 239         falcon_writel(efx, value, FALCON_PAGED_REG(page, reg));
 240         spin_unlock_irqrestore(&efx->biu_lock, flags);
 241 }
 242
 243 #endif /* EFX_FALCON_IO_H */