drivers/net/sfc/net_driver.h

   1 /****************************************************************************
   2  * Driver for Solarflare Solarstorm network controllers and boards
   3  * Copyright 2005-2006 Fen Systems Ltd.
   4  * Copyright 2005-2008 Solarflare Communications Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 as published
   8  * by the Free Software Foundation, incorporated herein by reference.
   9  */
  10
  11 /* Common definitions for all Efx net driver code */
  12
  13 #ifndef EFX_NET_DRIVER_H
  14 #define EFX_NET_DRIVER_H
  15
  16 #include <linux/version.h>
  17 #include <linux/netdevice.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/ethtool.h>
  20 #include <linux/if_vlan.h>
  21 #include <linux/timer.h>
  22 #include <linux/mii.h>
  23 #include <linux/list.h>
  24 #include <linux/pci.h>
  25 #include <linux/device.h>
  26 #include <linux/highmem.h>
  27 #include <linux/workqueue.h>
  28 #include <linux/i2c.h>
  29
  30 #include "enum.h"
  31 #include "bitfield.h"
  32
  33 /**************************************************************************
  34  *
  35  * Build definitions
  36  *
  37  **************************************************************************/
  38 #ifndef EFX_DRIVER_NAME
  39 #define EFX_DRIVER_NAME "sfc"
  40 #endif
  41 #define EFX_DRIVER_VERSION      "2.3"
  42
  43 #ifdef EFX_ENABLE_DEBUG
  44 #define EFX_BUG_ON_PARANOID(x) BUG_ON(x)
  45 #define EFX_WARN_ON_PARANOID(x) WARN_ON(x)
  46 #else
  47 #define EFX_BUG_ON_PARANOID(x) do {} while (0)
  48 #define EFX_WARN_ON_PARANOID(x) do {} while (0)
  49 #endif
  50
  51 /* Un-rate-limited logging */
  52 #define EFX_ERR(efx, fmt, args...) \
  53 dev_err(&((efx)->pci_dev->dev), "ERR: %s " fmt, efx_dev_name(efx), ##args)
  54
  55 #define EFX_INFO(efx, fmt, args...) \
  56 dev_info(&((efx)->pci_dev->dev), "INFO: %s " fmt, efx_dev_name(efx), ##args)
  57
  58 #ifdef EFX_ENABLE_DEBUG
  59 #define EFX_LOG(efx, fmt, args...) \
  60 dev_info(&((efx)->pci_dev->dev), "DBG: %s " fmt, efx_dev_name(efx), ##args)
  61 #else
  62 #define EFX_LOG(efx, fmt, args...) \
  63 dev_dbg(&((efx)->pci_dev->dev), "DBG: %s " fmt, efx_dev_name(efx), ##args)
  64 #endif
  65
  66 #define EFX_TRACE(efx, fmt, args...) do {} while (0)
  67
  68 #define EFX_REGDUMP(efx, fmt, args...) do {} while (0)
  69
  70 /* Rate-limited logging */
  71 #define EFX_ERR_RL(efx, fmt, args...) \
  72 do {if (net_ratelimit()) EFX_ERR(efx, fmt, ##args); } while (0)
  73
  74 #define EFX_INFO_RL(efx, fmt, args...) \
  75 do {if (net_ratelimit()) EFX_INFO(efx, fmt, ##args); } while (0)
  76
  77 #define EFX_LOG_RL(efx, fmt, args...) \
  78 do {if (net_ratelimit()) EFX_LOG(efx, fmt, ##args); } while (0)
  79
  80 /**************************************************************************
  81  *
  82  * Efx data structures
  83  *
  84  **************************************************************************/
  85
  86 #define EFX_MAX_CHANNELS 32
  87 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
  88
  89 #define EFX_TX_QUEUE_OFFLOAD_CSUM       0
  90 #define EFX_TX_QUEUE_NO_CSUM            1
  91 #define EFX_TX_QUEUE_COUNT              2
  92
  93 /**
  94  * struct efx_special_buffer - An Efx special buffer
  95  * @addr: CPU base address of the buffer
  96  * @dma_addr: DMA base address of the buffer
  97  * @len: Buffer length, in bytes
  98  * @index: Buffer index within controller;s buffer table
  99  * @entries: Number of buffer table entries
 100  *
 101  * Special buffers are used for the event queues and the TX and RX
 102  * descriptor queues for each channel.  They are *not* used for the
 103  * actual transmit and receive buffers.
 104  *
 105  * Note that for Falcon, TX and RX descriptor queues live in host memory.
 106  * Allocation and freeing procedures must take this into account.
 107  */
 108 struct efx_special_buffer {
 109         void *addr;
 110         dma_addr_t dma_addr;
 111         unsigned int len;
 112         int index;
 113         int entries;
 114 };
 115
 116 /**
 117  * struct efx_tx_buffer - An Efx TX buffer
 118  * @skb: The associated socket buffer.
 119  *      Set only on the final fragment of a packet; %NULL for all other
 120  *      fragments.  When this fragment completes, then we can free this
 121  *      skb.
 122  * @tsoh: The associated TSO header structure, or %NULL if this
 123  *      buffer is not a TSO header.
 124  * @dma_addr: DMA address of the fragment.
 125  * @len: Length of this fragment.
 126  *      This field is zero when the queue slot is empty.
 127  * @continuation: True if this fragment is not the end of a packet.
 128  * @unmap_single: True if pci_unmap_single should be used.
 129  * @unmap_len: Length of this fragment to unmap
 130  */
 131 struct efx_tx_buffer {
 132         const struct sk_buff *skb;
 133         struct efx_tso_header *tsoh;
 134         dma_addr_t dma_addr;
 135         unsigned short len;
 136         bool continuation;
 137         bool unmap_single;
 138         unsigned short unmap_len;
 139 };
 140
 141 /**
 142  * struct efx_tx_queue - An Efx TX queue
 143  *
 144  * This is a ring buffer of TX fragments.
 145  * Since the TX completion path always executes on the same
 146  * CPU and the xmit path can operate on different CPUs,
 147  * performance is increased by ensuring that the completion
 148  * path and the xmit path operate on different cache lines.
 149  * This is particularly important if the xmit path is always
 150  * executing on one CPU which is different from the completion
 151  * path.  There is also a cache line for members which are
 152  * read but not written on the fast path.
 153  *
 154  * @efx: The associated Efx NIC
 155  * @queue: DMA queue number
 156  * @channel: The associated channel
 157  * @buffer: The software buffer ring
 158  * @txd: The hardware descriptor ring
 159  * @flushed: Used when handling queue flushing
 160  * @read_count: Current read pointer.
 161  *      This is the number of buffers that have been removed from both rings.
 162  * @stopped: Stopped count.
 163  *      Set if this TX queue is currently stopping its port.
 164  * @insert_count: Current insert pointer
 165  *      This is the number of buffers that have been added to the
 166  *      software ring.
 167  * @write_count: Current write pointer
 168  *      This is the number of buffers that have been added to the
 169  *      hardware ring.
 170  * @old_read_count: The value of read_count when last checked.
 171  *      This is here for performance reasons.  The xmit path will
 172  *      only get the up-to-date value of read_count if this
 173  *      variable indicates that the queue is full.  This is to
 174  *      avoid cache-line ping-pong between the xmit path and the
 175  *      completion path.
 176  * @tso_headers_free: A list of TSO headers allocated for this TX queue
 177  *      that are not in use, and so available for new TSO sends. The list
 178  *      is protected by the TX queue lock.
 179  * @tso_bursts: Number of times TSO xmit invoked by kernel
 180  * @tso_long_headers: Number of packets with headers too long for standard
 181  *      blocks
 182  * @tso_packets: Number of packets via the TSO xmit path
 183  */
 184 struct efx_tx_queue {
 185         /* Members which don't change on the fast path */
 186         struct efx_nic *efx ____cacheline_aligned_in_smp;
 187         int queue;
 188         struct efx_channel *channel;
 189         struct efx_nic *nic;
 190         struct efx_tx_buffer *buffer;
 191         struct efx_special_buffer txd;
 192         bool flushed;
 193
 194         /* Members used mainly on the completion path */
 195         unsigned int read_count ____cacheline_aligned_in_smp;
 196         int stopped;
 197
 198         /* Members used only on the xmit path */
 199         unsigned int insert_count ____cacheline_aligned_in_smp;
 200         unsigned int write_count;
 201         unsigned int old_read_count;
 202         struct efx_tso_header *tso_headers_free;
 203         unsigned int tso_bursts;
 204         unsigned int tso_long_headers;
 205         unsigned int tso_packets;
 206 };
 207
 208 /**
 209  * struct efx_rx_buffer - An Efx RX data buffer
 210  * @dma_addr: DMA base address of the buffer
 211  * @skb: The associated socket buffer, if any.
 212  *      If both this and page are %NULL, the buffer slot is currently free.
 213  * @page: The associated page buffer, if any.
 214  *      If both this and skb are %NULL, the buffer slot is currently free.
 215  * @data: Pointer to ethernet header
 216  * @len: Buffer length, in bytes.
 217  * @unmap_addr: DMA address to unmap
 218  */
 219 struct efx_rx_buffer {
 220         dma_addr_t dma_addr;
 221         struct sk_buff *skb;
 222         struct page *page;
 223         char *data;
 224         unsigned int len;
 225         dma_addr_t unmap_addr;
 226 };
 227
 228 /**
 229  * struct efx_rx_queue - An Efx RX queue
 230  * @efx: The associated Efx NIC
 231  * @queue: DMA queue number
 232  * @channel: The associated channel
 233  * @buffer: The software buffer ring
 234  * @rxd: The hardware descriptor ring
 235  * @added_count: Number of buffers added to the receive queue.
 236  * @notified_count: Number of buffers given to NIC (<= @added_count).
 237  * @removed_count: Number of buffers removed from the receive queue.
 238  * @add_lock: Receive queue descriptor add spin lock.
 239  *      This lock must be held in order to add buffers to the RX
 240  *      descriptor ring (rxd and buffer) and to update added_count (but
 241  *      not removed_count).
 242  * @max_fill: RX descriptor maximum fill level (<= ring size)
 243  * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
 244  *      (<= @max_fill)
 245  * @fast_fill_limit: The level to which a fast fill will fill
 246  *      (@fast_fill_trigger <= @fast_fill_limit <= @max_fill)
 247  * @min_fill: RX descriptor minimum non-zero fill level.
 248  *      This records the minimum fill level observed when a ring
 249  *      refill was triggered.
 250  * @min_overfill: RX descriptor minimum overflow fill level.
 251  *      This records the minimum fill level at which RX queue
 252  *      overflow was observed.  It should never be set.
 253  * @alloc_page_count: RX allocation strategy counter.
 254  * @alloc_skb_count: RX allocation strategy counter.
 255  * @work: Descriptor push work thread
 256  * @buf_page: Page for next RX buffer.
 257  *      We can use a single page for multiple RX buffers. This tracks
 258  *      the remaining space in the allocation.
 259  * @buf_dma_addr: Page's DMA address.
 260  * @buf_data: Page's host address.
 261  * @flushed: Use when handling queue flushing
 262  */
 263 struct efx_rx_queue {
 264         struct efx_nic *efx;
 265         int queue;
 266         struct efx_channel *channel;
 267         struct efx_rx_buffer *buffer;
 268         struct efx_special_buffer rxd;
 269
 270         int added_count;
 271         int notified_count;
 272         int removed_count;
 273         spinlock_t add_lock;
 274         unsigned int max_fill;
 275         unsigned int fast_fill_trigger;
 276         unsigned int fast_fill_limit;
 277         unsigned int min_fill;
 278         unsigned int min_overfill;
 279         unsigned int alloc_page_count;
 280         unsigned int alloc_skb_count;
 281         struct delayed_work work;
 282         unsigned int slow_fill_count;
 283
 284         struct page *buf_page;
 285         dma_addr_t buf_dma_addr;
 286         char *buf_data;
 287         bool flushed;
 288 };
 289
 290 /**
 291  * struct efx_buffer - An Efx general-purpose buffer
 292  * @addr: host base address of the buffer
 293  * @dma_addr: DMA base address of the buffer
 294  * @len: Buffer length, in bytes
 295  *
 296  * Falcon uses these buffers for its interrupt status registers and
 297  * MAC stats dumps.
 298  */
 299 struct efx_buffer {
 300         void *addr;
 301         dma_addr_t dma_addr;
 302         unsigned int len;
 303 };
 304
 305
 306 /* Flags for channel->used_flags */
 307 #define EFX_USED_BY_RX 1
 308 #define EFX_USED_BY_TX 2
 309 #define EFX_USED_BY_RX_TX (EFX_USED_BY_RX | EFX_USED_BY_TX)
 310
 311 enum efx_rx_alloc_method {
 312         RX_ALLOC_METHOD_AUTO = 0,
 313         RX_ALLOC_METHOD_SKB = 1,
 314         RX_ALLOC_METHOD_PAGE = 2,
 315 };
 316
 317 /**
 318  * struct efx_channel - An Efx channel
 319  *
 320  * A channel comprises an event queue, at least one TX queue, at least
 321  * one RX queue, and an associated tasklet for processing the event
 322  * queue.
 323  *
 324  * @efx: Associated Efx NIC
 325  * @channel: Channel instance number
 326  * @name: Name for channel and IRQ
 327  * @used_flags: Channel is used by net driver
 328  * @enabled: Channel enabled indicator
 329  * @irq: IRQ number (MSI and MSI-X only)
 330  * @irq_moderation: IRQ moderation value (in us)
 331  * @napi_dev: Net device used with NAPI
 332  * @napi_str: NAPI control structure
 333  * @reset_work: Scheduled reset work thread
 334  * @work_pending: Is work pending via NAPI?
 335  * @eventq: Event queue buffer
 336  * @eventq_read_ptr: Event queue read pointer
 337  * @last_eventq_read_ptr: Last event queue read pointer value.
 338  * @eventq_magic: Event queue magic value for driver-generated test events
 339  * @irq_count: Number of IRQs since last adaptive moderation decision
 340  * @irq_mod_score: IRQ moderation score
 341  * @rx_alloc_level: Watermark based heuristic counter for pushing descriptors
 342  *      and diagnostic counters
 343  * @rx_alloc_push_pages: RX allocation method currently in use for pushing
 344  *      descriptors
 345  * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors
 346  * @n_rx_ip_frag_err: Count of RX IP fragment errors
 347  * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
 348  * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
 349  * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors
 350  * @n_rx_overlength: Count of RX_OVERLENGTH errors
 351  * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
 352  */
 353 struct efx_channel {
 354         struct efx_nic *efx;
 355         int channel;
 356         char name[IFNAMSIZ + 6];
 357         int used_flags;
 358         bool enabled;
 359         int irq;
 360         unsigned int irq_moderation;
 361         struct net_device *napi_dev;
 362         struct napi_struct napi_str;
 363         bool work_pending;
 364         struct efx_special_buffer eventq;
 365         unsigned int eventq_read_ptr;
 366         unsigned int last_eventq_read_ptr;
 367         unsigned int eventq_magic;
 368
 369         unsigned int irq_count;
 370         unsigned int irq_mod_score;
 371
 372         int rx_alloc_level;
 373         int rx_alloc_push_pages;
 374
 375         unsigned n_rx_tobe_disc;
 376         unsigned n_rx_ip_frag_err;
 377         unsigned n_rx_ip_hdr_chksum_err;
 378         unsigned n_rx_tcp_udp_chksum_err;
 379         unsigned n_rx_frm_trunc;
 380         unsigned n_rx_overlength;
 381         unsigned n_skbuff_leaks;
 382
 383         /* Used to pipeline received packets in order to optimise memory
 384          * access with prefetches.
 385          */
 386         struct efx_rx_buffer *rx_pkt;
 387         bool rx_pkt_csummed;
 388
 389 };
 390
 391 /**
 392  * struct efx_blinker - S/W LED blinking context
 393  * @state: Current state - on or off
 394  * @resubmit: Timer resubmission flag
 395  * @timer: Control timer for blinking
 396  */
 397 struct efx_blinker {
 398         bool state;
 399         bool resubmit;
 400         struct timer_list timer;
 401 };
 402
 403
 404 /**
 405  * struct efx_board - board information
 406  * @type: Board model type
 407  * @major: Major rev. ('A', 'B' ...)
 408  * @minor: Minor rev. (0, 1, ...)
 409  * @init: Initialisation function
 410  * @init_leds: Sets up board LEDs. May be called repeatedly.
 411  * @set_id_led: Turns the identification LED on or off
 412  * @blink: Starts/stops blinking
 413  * @monitor: Board-specific health check function
 414  * @fini: Cleanup function
 415  * @blinker: used to blink LEDs in software
 416  * @hwmon_client: I2C client for hardware monitor
 417  * @ioexp_client: I2C client for power/port control
 418  */
 419 struct efx_board {
 420         int type;
 421         int major;
 422         int minor;
 423         int (*init) (struct efx_nic *nic);
 424         /* As the LEDs are typically attached to the PHY, LEDs
 425          * have a separate init callback that happens later than
 426          * board init. */
 427         void (*init_leds)(struct efx_nic *efx);
 428         void (*set_id_led) (struct efx_nic *efx, bool state);
 429         int (*monitor) (struct efx_nic *nic);
 430         void (*blink) (struct efx_nic *efx, bool start);
 431         void (*fini) (struct efx_nic *nic);
 432         struct efx_blinker blinker;
 433         struct i2c_client *hwmon_client, *ioexp_client;
 434 };
 435
 436 #define STRING_TABLE_LOOKUP(val, member)        \
 437         member ## _names[val]
 438
 439 enum efx_int_mode {
 440         /* Be careful if altering to correct macro below */
 441         EFX_INT_MODE_MSIX = 0,
 442         EFX_INT_MODE_MSI = 1,
 443         EFX_INT_MODE_LEGACY = 2,
 444         EFX_INT_MODE_MAX        /* Insert any new items before this */
 445 };
 446 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
 447
 448 enum phy_type {
 449         PHY_TYPE_NONE = 0,
 450         PHY_TYPE_TXC43128 = 1,
 451         PHY_TYPE_88E1111 = 2,
 452         PHY_TYPE_SFX7101 = 3,
 453         PHY_TYPE_QT2022C2 = 4,
 454         PHY_TYPE_PM8358 = 6,
 455         PHY_TYPE_SFT9001A = 8,
 456         PHY_TYPE_QT2025C = 9,
 457         PHY_TYPE_SFT9001B = 10,
 458         PHY_TYPE_MAX    /* Insert any new items before this */
 459 };
 460
 461 #define PHY_ADDR_INVALID 0xff
 462
 463 #define EFX_IS10G(efx) ((efx)->link_speed == 10000)
 464
 465 enum nic_state {
 466         STATE_INIT = 0,
 467         STATE_RUNNING = 1,
 468         STATE_FINI = 2,
 469         STATE_DISABLED = 3,
 470         STATE_MAX,
 471 };
 472
 473 /*
 474  * Alignment of page-allocated RX buffers
 475  *
 476  * Controls the number of bytes inserted at the start of an RX buffer.
 477  * This is the equivalent of NET_IP_ALIGN [which controls the alignment
 478  * of the skb->head for hardware DMA].
 479  */
 480 #ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
 481 #define EFX_PAGE_IP_ALIGN 0
 482 #else
 483 #define EFX_PAGE_IP_ALIGN NET_IP_ALIGN
 484 #endif
 485
 486 /*
 487  * Alignment of the skb->head which wraps a page-allocated RX buffer
 488  *
 489  * The skb allocated to wrap an rx_buffer can have this alignment. Since
 490  * the data is memcpy'd from the rx_buf, it does not need to be equal to
 491  * EFX_PAGE_IP_ALIGN.
 492  */
 493 #define EFX_PAGE_SKB_ALIGN 2
 494
 495 /* Forward declaration */
 496 struct efx_nic;
 497
 498 /* Pseudo bit-mask flow control field */
 499 enum efx_fc_type {
 500         EFX_FC_RX = 1,
 501         EFX_FC_TX = 2,
 502         EFX_FC_AUTO = 4,
 503 };
 504
 505 /* Supported MAC bit-mask */
 506 enum efx_mac_type {
 507         EFX_GMAC = 1,
 508         EFX_XMAC = 2,
 509 };
 510
 511 static inline unsigned int efx_fc_advertise(enum efx_fc_type wanted_fc)
 512 {
 513         unsigned int adv = 0;
 514         if (wanted_fc & EFX_FC_RX)
 515                 adv = ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
 516         if (wanted_fc & EFX_FC_TX)
 517                 adv ^= ADVERTISE_PAUSE_ASYM;
 518         return adv;
 519 }
 520
 521 static inline enum efx_fc_type efx_fc_resolve(enum efx_fc_type wanted_fc,
 522                                               unsigned int lpa)
 523 {
 524         unsigned int adv = efx_fc_advertise(wanted_fc);
 525
 526         if (!(wanted_fc & EFX_FC_AUTO))
 527                 return wanted_fc;
 528
 529         if (adv & lpa & ADVERTISE_PAUSE_CAP)
 530                 return EFX_FC_RX | EFX_FC_TX;
 531         if (adv & lpa & ADVERTISE_PAUSE_ASYM) {
 532                 if (adv & ADVERTISE_PAUSE_CAP)
 533                         return EFX_FC_RX;
 534                 if (lpa & ADVERTISE_PAUSE_CAP)
 535                         return EFX_FC_TX;
 536         }
 537         return 0;
 538 }
 539
 540 /**
 541  * struct efx_mac_operations - Efx MAC operations table
 542  * @reconfigure: Reconfigure MAC. Serialised by the mac_lock
 543  * @update_stats: Update statistics
 544  * @irq: Hardware MAC event callback. Serialised by the mac_lock
 545  * @poll: Poll for hardware state. Serialised by the mac_lock
 546  */
 547 struct efx_mac_operations {
 548         void (*reconfigure) (struct efx_nic *efx);
 549         void (*update_stats) (struct efx_nic *efx);
 550         void (*irq) (struct efx_nic *efx);
 551         void (*poll) (struct efx_nic *efx);
 552 };
 553
 554 /**
 555  * struct efx_phy_operations - Efx PHY operations table
 556  * @init: Initialise PHY
 557  * @fini: Shut down PHY
 558  * @reconfigure: Reconfigure PHY (e.g. for new link parameters)
 559  * @clear_interrupt: Clear down interrupt
 560  * @blink: Blink LEDs
 561  * @poll: Poll for hardware state. Serialised by the mac_lock.
 562  * @get_settings: Get ethtool settings. Serialised by the mac_lock.
 563  * @set_settings: Set ethtool settings. Serialised by the mac_lock.
 564  * @set_npage_adv: Set abilities advertised in (Extended) Next Page
 565  *      (only needed where AN bit is set in mmds)
 566  * @num_tests: Number of PHY-specific tests/results
 567  * @test_names: Names of the tests/results
 568  * @run_tests: Run tests and record results as appropriate.
 569  *      Flags are the ethtool tests flags.
 570  * @mmds: MMD presence mask
 571  * @loopbacks: Supported loopback modes mask
 572  */
 573 struct efx_phy_operations {
 574         enum efx_mac_type macs;
 575         int (*init) (struct efx_nic *efx);
 576         void (*fini) (struct efx_nic *efx);
 577         void (*reconfigure) (struct efx_nic *efx);
 578         void (*clear_interrupt) (struct efx_nic *efx);
 579         void (*poll) (struct efx_nic *efx);
 580         void (*get_settings) (struct efx_nic *efx,
 581                               struct ethtool_cmd *ecmd);
 582         int (*set_settings) (struct efx_nic *efx,
 583                              struct ethtool_cmd *ecmd);
 584         void (*set_npage_adv) (struct efx_nic *efx, u32);
 585         u32 num_tests;
 586         const char *const *test_names;
 587         int (*run_tests) (struct efx_nic *efx, int *results, unsigned flags);
 588         int mmds;
 589         unsigned loopbacks;
 590 };
 591
 592 /**
 593  * @enum efx_phy_mode - PHY operating mode flags
 594  * @PHY_MODE_NORMAL: on and should pass traffic
 595  * @PHY_MODE_TX_DISABLED: on with TX disabled
 596  * @PHY_MODE_LOW_POWER: set to low power through MDIO
 597  * @PHY_MODE_OFF: switched off through external control
 598  * @PHY_MODE_SPECIAL: on but will not pass traffic
 599  */
 600 enum efx_phy_mode {
 601         PHY_MODE_NORMAL         = 0,
 602         PHY_MODE_TX_DISABLED    = 1,
 603         PHY_MODE_LOW_POWER      = 2,
 604         PHY_MODE_OFF            = 4,
 605         PHY_MODE_SPECIAL        = 8,
 606 };
 607
 608 static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode)
 609 {
 610         return !!(mode & ~PHY_MODE_TX_DISABLED);
 611 }
 612
 613 /*
 614  * Efx extended statistics
 615  *
 616  * Not all statistics are provided by all supported MACs.  The purpose
 617  * is this structure is to contain the raw statistics provided by each
 618  * MAC.
 619  */
 620 struct efx_mac_stats {
 621         u64 tx_bytes;
 622         u64 tx_good_bytes;
 623         u64 tx_bad_bytes;
 624         unsigned long tx_packets;
 625         unsigned long tx_bad;
 626         unsigned long tx_pause;
 627         unsigned long tx_control;
 628         unsigned long tx_unicast;
 629         unsigned long tx_multicast;
 630         unsigned long tx_broadcast;
 631         unsigned long tx_lt64;
 632         unsigned long tx_64;
 633         unsigned long tx_65_to_127;
 634         unsigned long tx_128_to_255;
 635         unsigned long tx_256_to_511;
 636         unsigned long tx_512_to_1023;
 637         unsigned long tx_1024_to_15xx;
 638         unsigned long tx_15xx_to_jumbo;
 639         unsigned long tx_gtjumbo;
 640         unsigned long tx_collision;
 641         unsigned long tx_single_collision;
 642         unsigned long tx_multiple_collision;
 643         unsigned long tx_excessive_collision;
 644         unsigned long tx_deferred;
 645         unsigned long tx_late_collision;
 646         unsigned long tx_excessive_deferred;
 647         unsigned long tx_non_tcpudp;
 648         unsigned long tx_mac_src_error;
 649         unsigned long tx_ip_src_error;
 650         u64 rx_bytes;
 651         u64 rx_good_bytes;
 652         u64 rx_bad_bytes;
 653         unsigned long rx_packets;
 654         unsigned long rx_good;
 655         unsigned long rx_bad;
 656         unsigned long rx_pause;
 657         unsigned long rx_control;
 658         unsigned long rx_unicast;
 659         unsigned long rx_multicast;
 660         unsigned long rx_broadcast;
 661         unsigned long rx_lt64;
 662         unsigned long rx_64;
 663         unsigned long rx_65_to_127;
 664         unsigned long rx_128_to_255;
 665         unsigned long rx_256_to_511;
 666         unsigned long rx_512_to_1023;
 667         unsigned long rx_1024_to_15xx;
 668         unsigned long rx_15xx_to_jumbo;
 669         unsigned long rx_gtjumbo;
 670         unsigned long rx_bad_lt64;
 671         unsigned long rx_bad_64_to_15xx;
 672         unsigned long rx_bad_15xx_to_jumbo;
 673         unsigned long rx_bad_gtjumbo;
 674         unsigned long rx_overflow;
 675         unsigned long rx_missed;
 676         unsigned long rx_false_carrier;
 677         unsigned long rx_symbol_error;
 678         unsigned long rx_align_error;
 679         unsigned long rx_length_error;
 680         unsigned long rx_internal_error;
 681         unsigned long rx_good_lt64;
 682 };
 683
 684 /* Number of bits used in a multicast filter hash address */
 685 #define EFX_MCAST_HASH_BITS 8
 686
 687 /* Number of (single-bit) entries in a multicast filter hash */
 688 #define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS)
 689
 690 /* An Efx multicast filter hash */
 691 union efx_multicast_hash {
 692         u8 byte[EFX_MCAST_HASH_ENTRIES / 8];
 693         efx_oword_t oword[EFX_MCAST_HASH_ENTRIES / sizeof(efx_oword_t) / 8];
 694 };
 695
 696 /**
 697  * struct efx_nic - an Efx NIC
 698  * @name: Device name (net device name or bus id before net device registered)
 699  * @pci_dev: The PCI device
 700  * @type: Controller type attributes
 701  * @legacy_irq: IRQ number
 702  * @workqueue: Workqueue for port reconfigures and the HW monitor.
 703  *      Work items do not hold and must not acquire RTNL.
 704  * @workqueue_name: Name of workqueue
 705  * @reset_work: Scheduled reset workitem
 706  * @monitor_work: Hardware monitor workitem
 707  * @membase_phys: Memory BAR value as physical address
 708  * @membase: Memory BAR value
 709  * @biu_lock: BIU (bus interface unit) lock
 710  * @interrupt_mode: Interrupt mode
 711  * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
 712  * @irq_rx_moderation: IRQ moderation time for RX event queues
 713  * @i2c_adap: I2C adapter
 714  * @board_info: Board-level information
 715  * @state: Device state flag. Serialised by the rtnl_lock.
 716  * @reset_pending: Pending reset method (normally RESET_TYPE_NONE)
 717  * @tx_queue: TX DMA queues
 718  * @rx_queue: RX DMA queues
 719  * @channel: Channels
 720  * @n_rx_queues: Number of RX queues
 721  * @n_channels: Number of channels in use
 722  * @rx_buffer_len: RX buffer length
 723  * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
 724  * @irq_status: Interrupt status buffer
 725  * @last_irq_cpu: Last CPU to handle interrupt.
 726  *      This register is written with the SMP processor ID whenever an
 727  *      interrupt is handled.  It is used by falcon_test_interrupt()
 728  *      to verify that an interrupt has occurred.
 729  * @spi_flash: SPI flash device
 730  *      This field will be %NULL if no flash device is present.
 731  * @spi_eeprom: SPI EEPROM device
 732  *      This field will be %NULL if no EEPROM device is present.
 733  * @spi_lock: SPI bus lock
 734  * @n_rx_nodesc_drop_cnt: RX no descriptor drop count
 735  * @nic_data: Hardware dependant state
 736  * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode,
 737  *      @port_inhibited, efx_monitor() and efx_reconfigure_port()
 738  * @port_enabled: Port enabled indicator.
 739  *      Serialises efx_stop_all(), efx_start_all(), efx_monitor(),
 740  *      efx_phy_work(), and efx_mac_work() with kernel interfaces. Safe to read
 741  *      under any one of the rtnl_lock, mac_lock, or netif_tx_lock, but all
 742  *      three must be held to modify it.
 743  * @port_inhibited: If set, the netif_carrier is always off. Hold the mac_lock
 744  * @port_initialized: Port initialized?
 745  * @net_dev: Operating system network device. Consider holding the rtnl lock
 746  * @rx_checksum_enabled: RX checksumming enabled
 747  * @netif_stop_count: Port stop count
 748  * @netif_stop_lock: Port stop lock
 749  * @mac_stats: MAC statistics. These include all statistics the MACs
 750  *      can provide.  Generic code converts these into a standard
 751  *      &struct net_device_stats.
 752  * @stats_buffer: DMA buffer for statistics
 753  * @stats_lock: Statistics update lock. Serialises statistics fetches
 754  * @stats_disable_count: Nest count for disabling statistics fetches
 755  * @mac_op: MAC interface
 756  * @mac_address: Permanent MAC address
 757  * @phy_type: PHY type
 758  * @phy_lock: PHY access lock
 759  * @phy_op: PHY interface
 760  * @phy_data: PHY private data (including PHY-specific stats)
 761  * @mii: PHY interface
 762  * @phy_mode: PHY operating mode. Serialised by @mac_lock.
 763  * @mac_up: MAC link state
 764  * @link_up: Link status
 765  * @link_fd: Link is full duplex
 766  * @link_fc: Actualy flow control flags
 767  * @link_speed: Link speed (Mbps)
 768  * @n_link_state_changes: Number of times the link has changed state
 769  * @promiscuous: Promiscuous flag. Protected by netif_tx_lock.
 770  * @multicast_hash: Multicast hash table
 771  * @wanted_fc: Wanted flow control flags
 772  * @phy_work: work item for dealing with PHY events
 773  * @mac_work: work item for dealing with MAC events
 774  * @loopback_mode: Loopback status
 775  * @loopback_modes: Supported loopback mode bitmask
 776  * @loopback_selftest: Offline self-test private state
 777  *
 778  * The @priv field of the corresponding &struct net_device points to
 779  * this.
 780  */
 781 struct efx_nic {
 782         char name[IFNAMSIZ];
 783         struct pci_dev *pci_dev;
 784         const struct efx_nic_type *type;
 785         int legacy_irq;
 786         struct workqueue_struct *workqueue;
 787         char workqueue_name[16];
 788         struct work_struct reset_work;
 789         struct delayed_work monitor_work;
 790         resource_size_t membase_phys;
 791         void __iomem *membase;
 792         spinlock_t biu_lock;
 793         enum efx_int_mode interrupt_mode;
 794         bool irq_rx_adaptive;
 795         unsigned int irq_rx_moderation;
 796
 797         struct i2c_adapter i2c_adap;
 798         struct efx_board board_info;
 799
 800         enum nic_state state;
 801         enum reset_type reset_pending;
 802
 803         struct efx_tx_queue tx_queue[EFX_TX_QUEUE_COUNT];
 804         struct efx_rx_queue rx_queue[EFX_MAX_RX_QUEUES];
 805         struct efx_channel channel[EFX_MAX_CHANNELS];
 806
 807         int n_rx_queues;
 808         int n_channels;
 809         unsigned int rx_buffer_len;
 810         unsigned int rx_buffer_order;
 811
 812         struct efx_buffer irq_status;
 813         volatile signed int last_irq_cpu;
 814
 815         struct efx_spi_device *spi_flash;
 816         struct efx_spi_device *spi_eeprom;
 817         struct mutex spi_lock;
 818
 819         unsigned n_rx_nodesc_drop_cnt;
 820
 821         struct falcon_nic_data *nic_data;
 822
 823         struct mutex mac_lock;
 824         struct work_struct mac_work;
 825         bool port_enabled;
 826         bool port_inhibited;
 827
 828         bool port_initialized;
 829         struct net_device *net_dev;
 830         bool rx_checksum_enabled;
 831
 832         atomic_t netif_stop_count;
 833         spinlock_t netif_stop_lock;
 834
 835         struct efx_mac_stats mac_stats;
 836         struct efx_buffer stats_buffer;
 837         spinlock_t stats_lock;
 838         unsigned int stats_disable_count;
 839
 840         struct efx_mac_operations *mac_op;
 841         unsigned char mac_address[ETH_ALEN];
 842
 843         enum phy_type phy_type;
 844         spinlock_t phy_lock;
 845         struct work_struct phy_work;
 846         struct efx_phy_operations *phy_op;
 847         void *phy_data;
 848         struct mii_if_info mii;
 849         enum efx_phy_mode phy_mode;
 850
 851         bool mac_up;
 852         bool link_up;
 853         bool link_fd;
 854         enum efx_fc_type link_fc;
 855         unsigned int link_speed;
 856         unsigned int n_link_state_changes;
 857
 858         bool promiscuous;
 859         union efx_multicast_hash multicast_hash;
 860         enum efx_fc_type wanted_fc;
 861
 862         atomic_t rx_reset;
 863         enum efx_loopback_mode loopback_mode;
 864         unsigned int loopback_modes;
 865
 866         void *loopback_selftest;
 867 };
 868
 869 static inline int efx_dev_registered(struct efx_nic *efx)
 870 {
 871         return efx->net_dev->reg_state == NETREG_REGISTERED;
 872 }
 873
 874 /* Net device name, for inclusion in log messages if it has been registered.
 875  * Use efx->name not efx->net_dev->name so that races with (un)registration
 876  * are harmless.
 877  */
 878 static inline const char *efx_dev_name(struct efx_nic *efx)
 879 {
 880         return efx_dev_registered(efx) ? efx->name : "";
 881 }
 882
 883 /**
 884  * struct efx_nic_type - Efx device type definition
 885  * @mem_bar: Memory BAR number
 886  * @mem_map_size: Memory BAR mapped size
 887  * @txd_ptr_tbl_base: TX descriptor ring base address
 888  * @rxd_ptr_tbl_base: RX descriptor ring base address
 889  * @buf_tbl_base: Buffer table base address
 890  * @evq_ptr_tbl_base: Event queue pointer table base address
 891  * @evq_rptr_tbl_base: Event queue read-pointer table base address
 892  * @txd_ring_mask: TX descriptor ring size - 1 (must be a power of two - 1)
 893  * @rxd_ring_mask: RX descriptor ring size - 1 (must be a power of two - 1)
 894  * @evq_size: Event queue size (must be a power of two)
 895  * @max_dma_mask: Maximum possible DMA mask
 896  * @tx_dma_mask: TX DMA mask
 897  * @bug5391_mask: Address mask for bug 5391 workaround
 898  * @rx_xoff_thresh: RX FIFO XOFF watermark (bytes)
 899  * @rx_xon_thresh: RX FIFO XON watermark (bytes)
 900  * @rx_buffer_padding: Padding added to each RX buffer
 901  * @max_interrupt_mode: Highest capability interrupt mode supported
 902  *      from &enum efx_init_mode.
 903  * @phys_addr_channels: Number of channels with physically addressed
 904  *      descriptors
 905  */
 906 struct efx_nic_type {
 907         unsigned int mem_bar;
 908         unsigned int mem_map_size;
 909         unsigned int txd_ptr_tbl_base;
 910         unsigned int rxd_ptr_tbl_base;
 911         unsigned int buf_tbl_base;
 912         unsigned int evq_ptr_tbl_base;
 913         unsigned int evq_rptr_tbl_base;
 914
 915         unsigned int txd_ring_mask;
 916         unsigned int rxd_ring_mask;
 917         unsigned int evq_size;
 918         u64 max_dma_mask;
 919         unsigned int tx_dma_mask;
 920         unsigned bug5391_mask;
 921
 922         int rx_xoff_thresh;
 923         int rx_xon_thresh;
 924         unsigned int rx_buffer_padding;
 925         unsigned int max_interrupt_mode;
 926         unsigned int phys_addr_channels;
 927 };
 928
 929 /**************************************************************************
 930  *
 931  * Prototypes and inline functions
 932  *
 933  *************************************************************************/
 934
 935 /* Iterate over all used channels */
 936 #define efx_for_each_channel(_channel, _efx)                            \
 937         for (_channel = &_efx->channel[0];                              \
 938              _channel < &_efx->channel[EFX_MAX_CHANNELS];               \
 939              _channel++)                                                \
 940                 if (!_channel->used_flags)                              \
 941                         continue;                                       \
 942                 else
 943
 944 /* Iterate over all used TX queues */
 945 #define efx_for_each_tx_queue(_tx_queue, _efx)                          \
 946         for (_tx_queue = &_efx->tx_queue[0];                            \
 947              _tx_queue < &_efx->tx_queue[EFX_TX_QUEUE_COUNT];           \
 948              _tx_queue++)
 949
 950 /* Iterate over all TX queues belonging to a channel */
 951 #define efx_for_each_channel_tx_queue(_tx_queue, _channel)              \
 952         for (_tx_queue = &_channel->efx->tx_queue[0];                   \
 953              _tx_queue < &_channel->efx->tx_queue[EFX_TX_QUEUE_COUNT];  \
 954              _tx_queue++)                                               \
 955                 if (_tx_queue->channel != _channel)                     \
 956                         continue;                                       \
 957                 else
 958
 959 /* Iterate over all used RX queues */
 960 #define efx_for_each_rx_queue(_rx_queue, _efx)                          \
 961         for (_rx_queue = &_efx->rx_queue[0];                            \
 962              _rx_queue < &_efx->rx_queue[_efx->n_rx_queues];            \
 963              _rx_queue++)
 964
 965 /* Iterate over all RX queues belonging to a channel */
 966 #define efx_for_each_channel_rx_queue(_rx_queue, _channel)              \
 967         for (_rx_queue = &_channel->efx->rx_queue[_channel->channel];   \
 968              _rx_queue;                                                 \
 969              _rx_queue = NULL)                                          \
 970                 if (_rx_queue->channel != _channel)                     \
 971                         continue;                                       \
 972                 else
 973
 974 /* Returns a pointer to the specified receive buffer in the RX
 975  * descriptor queue.
 976  */
 977 static inline struct efx_rx_buffer *efx_rx_buffer(struct efx_rx_queue *rx_queue,
 978                                                   unsigned int index)
 979 {
 980         return (&rx_queue->buffer[index]);
 981 }
 982
 983 /* Set bit in a little-endian bitfield */
 984 static inline void set_bit_le(unsigned nr, unsigned char *addr)
 985 {
 986         addr[nr / 8] |= (1 << (nr % 8));
 987 }
 988
 989 /* Clear bit in a little-endian bitfield */
 990 static inline void clear_bit_le(unsigned nr, unsigned char *addr)
 991 {
 992         addr[nr / 8] &= ~(1 << (nr % 8));
 993 }
 994
 995
 996 /**
 997  * EFX_MAX_FRAME_LEN - calculate maximum frame length
 998  *
 999  * This calculates the maximum frame length that will be used for a
1000  * given MTU.  The frame length will be equal to the MTU plus a
1001  * constant amount of header space and padding.  This is the quantity
1002  * that the net driver will program into the MAC as the maximum frame
1003  * length.
1004  *
1005  * The 10G MAC used in Falcon requires 8-byte alignment on the frame
1006  * length, so we round up to the nearest 8.
1007  */
1008 #define EFX_MAX_FRAME_LEN(mtu) \
1009         ((((mtu) + ETH_HLEN + VLAN_HLEN + 4/* FCS */) + 7) & ~7)
1010
1011
1012 #endif /* EFX_NET_DRIVER_H */