projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq
[deliverable/linux.git] / drivers / net / sis900.c
1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
2 Copyright 1999 Silicon Integrated System Corporation
3 Revision: 1.08.08 Jan. 22 2005
4
5 Modified from the driver which is originally written by Donald Becker.
6
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
11
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
19
20 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
21 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <webvenza@libero.it> add suspend/resume support
22 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
23 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
24 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
25 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
26 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
27 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
28 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
29 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
30 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
31 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
32 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
33 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
34 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
35 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
36 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
37 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule
38 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
39 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
40 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
41 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
42 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
43 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
44 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
45 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
46 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
47 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
48 */
49
50 #include <linux/module.h>
51 #include <linux/moduleparam.h>
52 #include <linux/kernel.h>
53 #include <linux/string.h>
54 #include <linux/timer.h>
55 #include <linux/errno.h>
56 #include <linux/ioport.h>
57 #include <linux/slab.h>
58 #include <linux/interrupt.h>
59 #include <linux/pci.h>
60 #include <linux/netdevice.h>
61 #include <linux/init.h>
62 #include <linux/mii.h>
63 #include <linux/etherdevice.h>
64 #include <linux/skbuff.h>
65 #include <linux/delay.h>
66 #include <linux/ethtool.h>
67 #include <linux/crc32.h>
68 #include <linux/bitops.h>
69 #include <linux/dma-mapping.h>
70
71 #include <asm/processor.h> /* Processor type for cache alignment. */
72 #include <asm/io.h>
73 #include <asm/irq.h>
74 #include <asm/uaccess.h> /* User space memory access functions */
75
76 #include "sis900.h"
77
78 #define SIS900_MODULE_NAME "sis900"
79 #define SIS900_DRV_VERSION "v1.08.08 Jan. 22 2005"
80
81 static char version[] __devinitdata =
82 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
83
84 static int max_interrupt_work = 40;
85 static int multicast_filter_limit = 128;
86
87 static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
88
89 #define SIS900_DEF_MSG \
90 (NETIF_MSG_DRV | \
91 NETIF_MSG_LINK | \
92 NETIF_MSG_RX_ERR | \
93 NETIF_MSG_TX_ERR)
94
95 /* Time in jiffies before concluding the transmitter is hung. */
96 #define TX_TIMEOUT (4*HZ)
97
98 enum {
99 SIS_900 = 0,
100 SIS_7016
101 };
102 static char * card_names[] = {
103 "SiS 900 PCI Fast Ethernet",
104 "SiS 7016 PCI Fast Ethernet"
105 };
106 static struct pci_device_id sis900_pci_tbl [] = {
107 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
108 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
109 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
110 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
111 {0,}
112 };
113 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
114
115 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
116
117 static struct mii_chip_info {
118 const char * name;
119 u16 phy_id0;
120 u16 phy_id1;
121 u8 phy_types;
122 #define HOME 0x0001
123 #define LAN 0x0002
124 #define MIX 0x0003
125 #define UNKNOWN 0x0
126 } mii_chip_table[] = {
127 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
128 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
129 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
130 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
131 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
132 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
133 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
134 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
135 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
136 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
137 {NULL,},
138 };
139
140 struct mii_phy {
141 struct mii_phy * next;
142 int phy_addr;
143 u16 phy_id0;
144 u16 phy_id1;
145 u16 status;
146 u8 phy_types;
147 };
148
149 typedef struct _BufferDesc {
150 u32 link;
151 u32 cmdsts;
152 u32 bufptr;
153 } BufferDesc;
154
155 struct sis900_private {
156 struct net_device_stats stats;
157 struct pci_dev * pci_dev;
158
159 spinlock_t lock;
160
161 struct mii_phy * mii;
162 struct mii_phy * first_mii; /* record the first mii structure */
163 unsigned int cur_phy;
164 struct mii_if_info mii_info;
165
166 struct timer_list timer; /* Link status detection timer. */
167 u8 autong_complete; /* 1: auto-negotiate complete */
168
169 u32 msg_enable;
170
171 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
172 unsigned int cur_tx, dirty_tx;
173
174 /* The saved address of a sent/receive-in-place packet buffer */
175 struct sk_buff *tx_skbuff[NUM_TX_DESC];
176 struct sk_buff *rx_skbuff[NUM_RX_DESC];
177 BufferDesc *tx_ring;
178 BufferDesc *rx_ring;
179
180 dma_addr_t tx_ring_dma;
181 dma_addr_t rx_ring_dma;
182
183 unsigned int tx_full; /* The Tx queue is full. */
184 u8 host_bridge_rev;
185 u8 chipset_rev;
186 };
187
188 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
189 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
190 MODULE_LICENSE("GPL");
191
192 module_param(multicast_filter_limit, int, 0444);
193 module_param(max_interrupt_work, int, 0444);
194 module_param(sis900_debug, int, 0444);
195 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
196 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
197 MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
198
199 #ifdef CONFIG_NET_POLL_CONTROLLER
200 static void sis900_poll(struct net_device *dev);
201 #endif
202 static int sis900_open(struct net_device *net_dev);
203 static int sis900_mii_probe (struct net_device * net_dev);
204 static void sis900_init_rxfilter (struct net_device * net_dev);
205 static u16 read_eeprom(long ioaddr, int location);
206 static int mdio_read(struct net_device *net_dev, int phy_id, int location);
207 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
208 static void sis900_timer(unsigned long data);
209 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
210 static void sis900_tx_timeout(struct net_device *net_dev);
211 static void sis900_init_tx_ring(struct net_device *net_dev);
212 static void sis900_init_rx_ring(struct net_device *net_dev);
213 static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
214 static int sis900_rx(struct net_device *net_dev);
215 static void sis900_finish_xmit (struct net_device *net_dev);
216 static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
217 static int sis900_close(struct net_device *net_dev);
218 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
219 static struct net_device_stats *sis900_get_stats(struct net_device *net_dev);
220 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
221 static void set_rx_mode(struct net_device *net_dev);
222 static void sis900_reset(struct net_device *net_dev);
223 static void sis630_set_eq(struct net_device *net_dev, u8 revision);
224 static int sis900_set_config(struct net_device *dev, struct ifmap *map);
225 static u16 sis900_default_phy(struct net_device * net_dev);
226 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
227 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
228 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
229 static void sis900_set_mode (long ioaddr, int speed, int duplex);
230 static struct ethtool_ops sis900_ethtool_ops;
231
232 /**
233 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
234 * @pci_dev: the sis900 pci device
235 * @net_dev: the net device to get address for
236 *
237 * Older SiS900 and friends, use EEPROM to store MAC address.
238 * MAC address is read from read_eeprom() into @net_dev->dev_addr.
239 */
240
241 static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
242 {
243 long ioaddr = pci_resource_start(pci_dev, 0);
244 u16 signature;
245 int i;
246
247 /* check to see if we have sane EEPROM */
248 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
249 if (signature == 0xffff || signature == 0x0000) {
250 printk (KERN_WARNING "%s: Error EERPOM read %x\n",
251 pci_name(pci_dev), signature);
252 return 0;
253 }
254
255 /* get MAC address from EEPROM */
256 for (i = 0; i < 3; i++)
257 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
258
259 return 1;
260 }
261
262 /**
263 * sis630e_get_mac_addr - Get MAC address for SiS630E model
264 * @pci_dev: the sis900 pci device
265 * @net_dev: the net device to get address for
266 *
267 * SiS630E model, use APC CMOS RAM to store MAC address.
268 * APC CMOS RAM is accessed through ISA bridge.
269 * MAC address is read into @net_dev->dev_addr.
270 */
271
272 static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
273 struct net_device *net_dev)
274 {
275 struct pci_dev *isa_bridge = NULL;
276 u8 reg;
277 int i;
278
279 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
280 if (!isa_bridge)
281 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
282 if (!isa_bridge) {
283 printk(KERN_WARNING "%s: Can not find ISA bridge\n",
284 pci_name(pci_dev));
285 return 0;
286 }
287 pci_read_config_byte(isa_bridge, 0x48, &reg);
288 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
289
290 for (i = 0; i < 6; i++) {
291 outb(0x09 + i, 0x70);
292 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
293 }
294 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
295 pci_dev_put(isa_bridge);
296
297 return 1;
298 }
299
300
301 /**
302 * sis635_get_mac_addr - Get MAC address for SIS635 model
303 * @pci_dev: the sis900 pci device
304 * @net_dev: the net device to get address for
305 *
306 * SiS635 model, set MAC Reload Bit to load Mac address from APC
307 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
308 * @net_dev->dev_addr.
309 */
310
311 static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
312 struct net_device *net_dev)
313 {
314 long ioaddr = net_dev->base_addr;
315 u32 rfcrSave;
316 u32 i;
317
318 rfcrSave = inl(rfcr + ioaddr);
319
320 outl(rfcrSave | RELOAD, ioaddr + cr);
321 outl(0, ioaddr + cr);
322
323 /* disable packet filtering before setting filter */
324 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
325
326 /* load MAC addr to filter data register */
327 for (i = 0 ; i < 3 ; i++) {
328 outl((i << RFADDR_shift), ioaddr + rfcr);
329 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
330 }
331
332 /* enable packet filtering */
333 outl(rfcrSave | RFEN, rfcr + ioaddr);
334
335 return 1;
336 }
337
338 /**
339 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
340 * @pci_dev: the sis900 pci device
341 * @net_dev: the net device to get address for
342 *
343 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
344 * is shared by
345 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
346 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
347 * by LAN, otherwise is not. After MAC address is read from EEPROM, send
348 * EEDONE signal to refuse EEPROM access by LAN.
349 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
350 * The signature field in SiS962 or SiS963 spec is meaningless.
351 * MAC address is read into @net_dev->dev_addr.
352 */
353
354 static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
355 struct net_device *net_dev)
356 {
357 long ioaddr = net_dev->base_addr;
358 long ee_addr = ioaddr + mear;
359 u32 waittime = 0;
360 int i;
361
362 outl(EEREQ, ee_addr);
363 while(waittime < 2000) {
364 if(inl(ee_addr) & EEGNT) {
365
366 /* get MAC address from EEPROM */
367 for (i = 0; i < 3; i++)
368 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
369
370 outl(EEDONE, ee_addr);
371 return 1;
372 } else {
373 udelay(1);
374 waittime ++;
375 }
376 }
377 outl(EEDONE, ee_addr);
378 return 0;
379 }
380
381 /**
382 * sis900_probe - Probe for sis900 device
383 * @pci_dev: the sis900 pci device
384 * @pci_id: the pci device ID
385 *
386 * Check and probe sis900 net device for @pci_dev.
387 * Get mac address according to the chip revision,
388 * and assign SiS900-specific entries in the device structure.
389 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
390 */
391
392 static int __devinit sis900_probe(struct pci_dev *pci_dev,
393 const struct pci_device_id *pci_id)
394 {
395 struct sis900_private *sis_priv;
396 struct net_device *net_dev;
397 struct pci_dev *dev;
398 dma_addr_t ring_dma;
399 void *ring_space;
400 long ioaddr;
401 int i, ret;
402 char *card_name = card_names[pci_id->driver_data];
403 const char *dev_name = pci_name(pci_dev);
404
405 /* when built into the kernel, we only print version if device is found */
406 #ifndef MODULE
407 static int printed_version;
408 if (!printed_version++)
409 printk(version);
410 #endif
411
412 /* setup various bits in PCI command register */
413 ret = pci_enable_device(pci_dev);
414 if(ret) return ret;
415
416 i = pci_set_dma_mask(pci_dev, DMA_32BIT_MASK);
417 if(i){
418 printk(KERN_ERR "sis900.c: architecture does not support"
419 "32bit PCI busmaster DMA\n");
420 return i;
421 }
422
423 pci_set_master(pci_dev);
424
425 net_dev = alloc_etherdev(sizeof(struct sis900_private));
426 if (!net_dev)
427 return -ENOMEM;
428 SET_MODULE_OWNER(net_dev);
429 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
430
431 /* We do a request_region() to register /proc/ioports info. */
432 ioaddr = pci_resource_start(pci_dev, 0);
433 ret = pci_request_regions(pci_dev, "sis900");
434 if (ret)
435 goto err_out;
436
437 sis_priv = net_dev->priv;
438 net_dev->base_addr = ioaddr;
439 net_dev->irq = pci_dev->irq;
440 sis_priv->pci_dev = pci_dev;
441 spin_lock_init(&sis_priv->lock);
442
443 pci_set_drvdata(pci_dev, net_dev);
444
445 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
446 if (!ring_space) {
447 ret = -ENOMEM;
448 goto err_out_cleardev;
449 }
450 sis_priv->tx_ring = (BufferDesc *)ring_space;
451 sis_priv->tx_ring_dma = ring_dma;
452
453 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
454 if (!ring_space) {
455 ret = -ENOMEM;
456 goto err_unmap_tx;
457 }
458 sis_priv->rx_ring = (BufferDesc *)ring_space;
459 sis_priv->rx_ring_dma = ring_dma;
460
461 /* The SiS900-specific entries in the device structure. */
462 net_dev->open = &sis900_open;
463 net_dev->hard_start_xmit = &sis900_start_xmit;
464 net_dev->stop = &sis900_close;
465 net_dev->get_stats = &sis900_get_stats;
466 net_dev->set_config = &sis900_set_config;
467 net_dev->set_multicast_list = &set_rx_mode;
468 net_dev->do_ioctl = &mii_ioctl;
469 net_dev->tx_timeout = sis900_tx_timeout;
470 net_dev->watchdog_timeo = TX_TIMEOUT;
471 net_dev->ethtool_ops = &sis900_ethtool_ops;
472
473 #ifdef CONFIG_NET_POLL_CONTROLLER
474 net_dev->poll_controller = &sis900_poll;
475 #endif
476
477 if (sis900_debug > 0)
478 sis_priv->msg_enable = sis900_debug;
479 else
480 sis_priv->msg_enable = SIS900_DEF_MSG;
481
482 sis_priv->mii_info.dev = net_dev;
483 sis_priv->mii_info.mdio_read = mdio_read;
484 sis_priv->mii_info.mdio_write = mdio_write;
485 sis_priv->mii_info.phy_id_mask = 0x1f;
486 sis_priv->mii_info.reg_num_mask = 0x1f;
487
488 /* Get Mac address according to the chip revision */
489 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev));
490 if(netif_msg_probe(sis_priv))
491 printk(KERN_DEBUG "%s: detected revision %2.2x, "
492 "trying to get MAC address...\n",
493 dev_name, sis_priv->chipset_rev);
494
495 ret = 0;
496 if (sis_priv->chipset_rev == SIS630E_900_REV)
497 ret = sis630e_get_mac_addr(pci_dev, net_dev);
498 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
499 ret = sis635_get_mac_addr(pci_dev, net_dev);
500 else if (sis_priv->chipset_rev == SIS96x_900_REV)
501 ret = sis96x_get_mac_addr(pci_dev, net_dev);
502 else
503 ret = sis900_get_mac_addr(pci_dev, net_dev);
504
505 if (ret == 0) {
506 printk(KERN_WARNING "%s: Cannot read MAC address.\n", dev_name);
507 ret = -ENODEV;
508 goto err_unmap_rx;
509 }
510
511 /* 630ET : set the mii access mode as software-mode */
512 if (sis_priv->chipset_rev == SIS630ET_900_REV)
513 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
514
515 /* probe for mii transceiver */
516 if (sis900_mii_probe(net_dev) == 0) {
517 printk(KERN_WARNING "%s: Error probing MII device.\n",
518 dev_name);
519 ret = -ENODEV;
520 goto err_unmap_rx;
521 }
522
523 /* save our host bridge revision */
524 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
525 if (dev) {
526 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
527 pci_dev_put(dev);
528 }
529
530 ret = register_netdev(net_dev);
531 if (ret)
532 goto err_unmap_rx;
533
534 /* print some information about our NIC */
535 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, ", net_dev->name,
536 card_name, ioaddr, net_dev->irq);
537 for (i = 0; i < 5; i++)
538 printk("%2.2x:", (u8)net_dev->dev_addr[i]);
539 printk("%2.2x.\n", net_dev->dev_addr[i]);
540
541 return 0;
542
543 err_unmap_rx:
544 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
545 sis_priv->rx_ring_dma);
546 err_unmap_tx:
547 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
548 sis_priv->tx_ring_dma);
549 err_out_cleardev:
550 pci_set_drvdata(pci_dev, NULL);
551 pci_release_regions(pci_dev);
552 err_out:
553 free_netdev(net_dev);
554 return ret;
555 }
556
557 /**
558 * sis900_mii_probe - Probe MII PHY for sis900
559 * @net_dev: the net device to probe for
560 *
561 * Search for total of 32 possible mii phy addresses.
562 * Identify and set current phy if found one,
563 * return error if it failed to found.
564 */
565
566 static int __init sis900_mii_probe(struct net_device * net_dev)
567 {
568 struct sis900_private * sis_priv = net_dev->priv;
569 const char *dev_name = pci_name(sis_priv->pci_dev);
570 u16 poll_bit = MII_STAT_LINK, status = 0;
571 unsigned long timeout = jiffies + 5 * HZ;
572 int phy_addr;
573
574 sis_priv->mii = NULL;
575
576 /* search for total of 32 possible mii phy addresses */
577 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
578 struct mii_phy * mii_phy = NULL;
579 u16 mii_status;
580 int i;
581
582 mii_phy = NULL;
583 for(i = 0; i < 2; i++)
584 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
585
586 if (mii_status == 0xffff || mii_status == 0x0000) {
587 if (netif_msg_probe(sis_priv))
588 printk(KERN_DEBUG "%s: MII at address %d"
589 " not accessible\n",
590 dev_name, phy_addr);
591 continue;
592 }
593
594 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
595 printk(KERN_WARNING "Cannot allocate mem for struct mii_phy\n");
596 mii_phy = sis_priv->first_mii;
597 while (mii_phy) {
598 struct mii_phy *phy;
599 phy = mii_phy;
600 mii_phy = mii_phy->next;
601 kfree(phy);
602 }
603 return 0;
604 }
605
606 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
607 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
608 mii_phy->phy_addr = phy_addr;
609 mii_phy->status = mii_status;
610 mii_phy->next = sis_priv->mii;
611 sis_priv->mii = mii_phy;
612 sis_priv->first_mii = mii_phy;
613
614 for (i = 0; mii_chip_table[i].phy_id1; i++)
615 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
616 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
617 mii_phy->phy_types = mii_chip_table[i].phy_types;
618 if (mii_chip_table[i].phy_types == MIX)
619 mii_phy->phy_types =
620 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
621 printk(KERN_INFO "%s: %s transceiver found "
622 "at address %d.\n",
623 dev_name,
624 mii_chip_table[i].name,
625 phy_addr);
626 break;
627 }
628
629 if( !mii_chip_table[i].phy_id1 ) {
630 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
631 dev_name, phy_addr);
632 mii_phy->phy_types = UNKNOWN;
633 }
634 }
635
636 if (sis_priv->mii == NULL) {
637 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
638 return 0;
639 }
640
641 /* select default PHY for mac */
642 sis_priv->mii = NULL;
643 sis900_default_phy( net_dev );
644
645 /* Reset phy if default phy is internal sis900 */
646 if ((sis_priv->mii->phy_id0 == 0x001D) &&
647 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
648 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
649
650 /* workaround for ICS1893 PHY */
651 if ((sis_priv->mii->phy_id0 == 0x0015) &&
652 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
653 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
654
655 if(status & MII_STAT_LINK){
656 while (poll_bit) {
657 yield();
658
659 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
660 if (time_after_eq(jiffies, timeout)) {
661 printk(KERN_WARNING "%s: reset phy and link down now\n",
662 dev_name);
663 return -ETIME;
664 }
665 }
666 }
667
668 if (sis_priv->chipset_rev == SIS630E_900_REV) {
669 /* SiS 630E has some bugs on default value of PHY registers */
670 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
671 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
672 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
673 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
674 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
675 }
676
677 if (sis_priv->mii->status & MII_STAT_LINK)
678 netif_carrier_on(net_dev);
679 else
680 netif_carrier_off(net_dev);
681
682 return 1;
683 }
684
685 /**
686 * sis900_default_phy - Select default PHY for sis900 mac.
687 * @net_dev: the net device to probe for
688 *
689 * Select first detected PHY with link as default.
690 * If no one is link on, select PHY whose types is HOME as default.
691 * If HOME doesn't exist, select LAN.
692 */
693
694 static u16 sis900_default_phy(struct net_device * net_dev)
695 {
696 struct sis900_private * sis_priv = net_dev->priv;
697 struct mii_phy *phy = NULL, *phy_home = NULL,
698 *default_phy = NULL, *phy_lan = NULL;
699 u16 status;
700
701 for (phy=sis_priv->first_mii; phy; phy=phy->next) {
702 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
703 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
704
705 /* Link ON & Not select default PHY & not ghost PHY */
706 if ((status & MII_STAT_LINK) && !default_phy &&
707 (phy->phy_types != UNKNOWN))
708 default_phy = phy;
709 else {
710 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
711 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
712 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
713 if (phy->phy_types == HOME)
714 phy_home = phy;
715 else if(phy->phy_types == LAN)
716 phy_lan = phy;
717 }
718 }
719
720 if (!default_phy && phy_home)
721 default_phy = phy_home;
722 else if (!default_phy && phy_lan)
723 default_phy = phy_lan;
724 else if (!default_phy)
725 default_phy = sis_priv->first_mii;
726
727 if (sis_priv->mii != default_phy) {
728 sis_priv->mii = default_phy;
729 sis_priv->cur_phy = default_phy->phy_addr;
730 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
731 pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
732 }
733
734 sis_priv->mii_info.phy_id = sis_priv->cur_phy;
735
736 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
737 status &= (~MII_CNTL_ISOLATE);
738
739 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
740 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
741 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
742
743 return status;
744 }
745
746
747 /**
748 * sis900_set_capability - set the media capability of network adapter.
749 * @net_dev : the net device to probe for
750 * @phy : default PHY
751 *
752 * Set the media capability of network adapter according to
753 * mii status register. It's necessary before auto-negotiate.
754 */
755
756 static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
757 {
758 u16 cap;
759 u16 status;
760
761 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
762 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
763
764 cap = MII_NWAY_CSMA_CD |
765 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
766 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
767 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
768 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
769
770 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
771 }
772
773
774 /* Delay between EEPROM clock transitions. */
775 #define eeprom_delay() inl(ee_addr)
776
777 /**
778 * read_eeprom - Read Serial EEPROM
779 * @ioaddr: base i/o address
780 * @location: the EEPROM location to read
781 *
782 * Read Serial EEPROM through EEPROM Access Register.
783 * Note that location is in word (16 bits) unit
784 */
785
786 static u16 __devinit read_eeprom(long ioaddr, int location)
787 {
788 int i;
789 u16 retval = 0;
790 long ee_addr = ioaddr + mear;
791 u32 read_cmd = location | EEread;
792
793 outl(0, ee_addr);
794 eeprom_delay();
795 outl(EECS, ee_addr);
796 eeprom_delay();
797
798 /* Shift the read command (9) bits out. */
799 for (i = 8; i >= 0; i--) {
800 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
801 outl(dataval, ee_addr);
802 eeprom_delay();
803 outl(dataval | EECLK, ee_addr);
804 eeprom_delay();
805 }
806 outl(EECS, ee_addr);
807 eeprom_delay();
808
809 /* read the 16-bits data in */
810 for (i = 16; i > 0; i--) {
811 outl(EECS, ee_addr);
812 eeprom_delay();
813 outl(EECS | EECLK, ee_addr);
814 eeprom_delay();
815 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
816 eeprom_delay();
817 }
818
819 /* Terminate the EEPROM access. */
820 outl(0, ee_addr);
821 eeprom_delay();
822
823 return (retval);
824 }
825
826 /* Read and write the MII management registers using software-generated
827 serial MDIO protocol. Note that the command bits and data bits are
828 send out separately */
829 #define mdio_delay() inl(mdio_addr)
830
831 static void mdio_idle(long mdio_addr)
832 {
833 outl(MDIO | MDDIR, mdio_addr);
834 mdio_delay();
835 outl(MDIO | MDDIR | MDC, mdio_addr);
836 }
837
838 /* Syncronize the MII management interface by shifting 32 one bits out. */
839 static void mdio_reset(long mdio_addr)
840 {
841 int i;
842
843 for (i = 31; i >= 0; i--) {
844 outl(MDDIR | MDIO, mdio_addr);
845 mdio_delay();
846 outl(MDDIR | MDIO | MDC, mdio_addr);
847 mdio_delay();
848 }
849 return;
850 }
851
852 /**
853 * mdio_read - read MII PHY register
854 * @net_dev: the net device to read
855 * @phy_id: the phy address to read
856 * @location: the phy regiester id to read
857 *
858 * Read MII registers through MDIO and MDC
859 * using MDIO management frame structure and protocol(defined by ISO/IEC).
860 * Please see SiS7014 or ICS spec
861 */
862
863 static int mdio_read(struct net_device *net_dev, int phy_id, int location)
864 {
865 long mdio_addr = net_dev->base_addr + mear;
866 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
867 u16 retval = 0;
868 int i;
869
870 mdio_reset(mdio_addr);
871 mdio_idle(mdio_addr);
872
873 for (i = 15; i >= 0; i--) {
874 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
875 outl(dataval, mdio_addr);
876 mdio_delay();
877 outl(dataval | MDC, mdio_addr);
878 mdio_delay();
879 }
880
881 /* Read the 16 data bits. */
882 for (i = 16; i > 0; i--) {
883 outl(0, mdio_addr);
884 mdio_delay();
885 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
886 outl(MDC, mdio_addr);
887 mdio_delay();
888 }
889 outl(0x00, mdio_addr);
890
891 return retval;
892 }
893
894 /**
895 * mdio_write - write MII PHY register
896 * @net_dev: the net device to write
897 * @phy_id: the phy address to write
898 * @location: the phy regiester id to write
899 * @value: the register value to write with
900 *
901 * Write MII registers with @value through MDIO and MDC
902 * using MDIO management frame structure and protocol(defined by ISO/IEC)
903 * please see SiS7014 or ICS spec
904 */
905
906 static void mdio_write(struct net_device *net_dev, int phy_id, int location,
907 int value)
908 {
909 long mdio_addr = net_dev->base_addr + mear;
910 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
911 int i;
912
913 mdio_reset(mdio_addr);
914 mdio_idle(mdio_addr);
915
916 /* Shift the command bits out. */
917 for (i = 15; i >= 0; i--) {
918 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
919 outb(dataval, mdio_addr);
920 mdio_delay();
921 outb(dataval | MDC, mdio_addr);
922 mdio_delay();
923 }
924 mdio_delay();
925
926 /* Shift the value bits out. */
927 for (i = 15; i >= 0; i--) {
928 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
929 outl(dataval, mdio_addr);
930 mdio_delay();
931 outl(dataval | MDC, mdio_addr);
932 mdio_delay();
933 }
934 mdio_delay();
935
936 /* Clear out extra bits. */
937 for (i = 2; i > 0; i--) {
938 outb(0, mdio_addr);
939 mdio_delay();
940 outb(MDC, mdio_addr);
941 mdio_delay();
942 }
943 outl(0x00, mdio_addr);
944
945 return;
946 }
947
948
949 /**
950 * sis900_reset_phy - reset sis900 mii phy.
951 * @net_dev: the net device to write
952 * @phy_addr: default phy address
953 *
954 * Some specific phy can't work properly without reset.
955 * This function will be called during initialization and
956 * link status change from ON to DOWN.
957 */
958
959 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
960 {
961 int i = 0;
962 u16 status;
963
964 while (i++ < 2)
965 status = mdio_read(net_dev, phy_addr, MII_STATUS);
966
967 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
968
969 return status;
970 }
971
972 #ifdef CONFIG_NET_POLL_CONTROLLER
973 /*
974 * Polling 'interrupt' - used by things like netconsole to send skbs
975 * without having to re-enable interrupts. It's not called while
976 * the interrupt routine is executing.
977 */
978 static void sis900_poll(struct net_device *dev)
979 {
980 disable_irq(dev->irq);
981 sis900_interrupt(dev->irq, dev, NULL);
982 enable_irq(dev->irq);
983 }
984 #endif
985
986 /**
987 * sis900_open - open sis900 device
988 * @net_dev: the net device to open
989 *
990 * Do some initialization and start net interface.
991 * enable interrupts and set sis900 timer.
992 */
993
994 static int
995 sis900_open(struct net_device *net_dev)
996 {
997 struct sis900_private *sis_priv = net_dev->priv;
998 long ioaddr = net_dev->base_addr;
999 int ret;
1000
1001 /* Soft reset the chip. */
1002 sis900_reset(net_dev);
1003
1004 /* Equalizer workaround Rule */
1005 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1006
1007 ret = request_irq(net_dev->irq, &sis900_interrupt, SA_SHIRQ,
1008 net_dev->name, net_dev);
1009 if (ret)
1010 return ret;
1011
1012 sis900_init_rxfilter(net_dev);
1013
1014 sis900_init_tx_ring(net_dev);
1015 sis900_init_rx_ring(net_dev);
1016
1017 set_rx_mode(net_dev);
1018
1019 netif_start_queue(net_dev);
1020
1021 /* Workaround for EDB */
1022 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1023
1024 /* Enable all known interrupts by setting the interrupt mask. */
1025 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1026 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
1027 outl(IE, ioaddr + ier);
1028
1029 sis900_check_mode(net_dev, sis_priv->mii);
1030
1031 /* Set the timer to switch to check for link beat and perhaps switch
1032 to an alternate media type. */
1033 init_timer(&sis_priv->timer);
1034 sis_priv->timer.expires = jiffies + HZ;
1035 sis_priv->timer.data = (unsigned long)net_dev;
1036 sis_priv->timer.function = &sis900_timer;
1037 add_timer(&sis_priv->timer);
1038
1039 return 0;
1040 }
1041
1042 /**
1043 * sis900_init_rxfilter - Initialize the Rx filter
1044 * @net_dev: the net device to initialize for
1045 *
1046 * Set receive filter address to our MAC address
1047 * and enable packet filtering.
1048 */
1049
1050 static void
1051 sis900_init_rxfilter (struct net_device * net_dev)
1052 {
1053 struct sis900_private *sis_priv = net_dev->priv;
1054 long ioaddr = net_dev->base_addr;
1055 u32 rfcrSave;
1056 u32 i;
1057
1058 rfcrSave = inl(rfcr + ioaddr);
1059
1060 /* disable packet filtering before setting filter */
1061 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
1062
1063 /* load MAC addr to filter data register */
1064 for (i = 0 ; i < 3 ; i++) {
1065 u32 w;
1066
1067 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1068 outl((i << RFADDR_shift), ioaddr + rfcr);
1069 outl(w, ioaddr + rfdr);
1070
1071 if (netif_msg_hw(sis_priv)) {
1072 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1073 net_dev->name, i, inl(ioaddr + rfdr));
1074 }
1075 }
1076
1077 /* enable packet filtering */
1078 outl(rfcrSave | RFEN, rfcr + ioaddr);
1079 }
1080
1081 /**
1082 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1083 * @net_dev: the net device to initialize for
1084 *
1085 * Initialize the Tx descriptor ring,
1086 */
1087
1088 static void
1089 sis900_init_tx_ring(struct net_device *net_dev)
1090 {
1091 struct sis900_private *sis_priv = net_dev->priv;
1092 long ioaddr = net_dev->base_addr;
1093 int i;
1094
1095 sis_priv->tx_full = 0;
1096 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1097
1098 for (i = 0; i < NUM_TX_DESC; i++) {
1099 sis_priv->tx_skbuff[i] = NULL;
1100
1101 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1102 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1103 sis_priv->tx_ring[i].cmdsts = 0;
1104 sis_priv->tx_ring[i].bufptr = 0;
1105 }
1106
1107 /* load Transmit Descriptor Register */
1108 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1109 if (netif_msg_hw(sis_priv))
1110 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1111 net_dev->name, inl(ioaddr + txdp));
1112 }
1113
1114 /**
1115 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1116 * @net_dev: the net device to initialize for
1117 *
1118 * Initialize the Rx descriptor ring,
1119 * and pre-allocate recevie buffers (socket buffer)
1120 */
1121
1122 static void
1123 sis900_init_rx_ring(struct net_device *net_dev)
1124 {
1125 struct sis900_private *sis_priv = net_dev->priv;
1126 long ioaddr = net_dev->base_addr;
1127 int i;
1128
1129 sis_priv->cur_rx = 0;
1130 sis_priv->dirty_rx = 0;
1131
1132 /* init RX descriptor */
1133 for (i = 0; i < NUM_RX_DESC; i++) {
1134 sis_priv->rx_skbuff[i] = NULL;
1135
1136 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1137 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1138 sis_priv->rx_ring[i].cmdsts = 0;
1139 sis_priv->rx_ring[i].bufptr = 0;
1140 }
1141
1142 /* allocate sock buffers */
1143 for (i = 0; i < NUM_RX_DESC; i++) {
1144 struct sk_buff *skb;
1145
1146 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1147 /* not enough memory for skbuff, this makes a "hole"
1148 on the buffer ring, it is not clear how the
1149 hardware will react to this kind of degenerated
1150 buffer */
1151 break;
1152 }
1153 skb->dev = net_dev;
1154 sis_priv->rx_skbuff[i] = skb;
1155 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1156 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
1157 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1158 }
1159 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1160
1161 /* load Receive Descriptor Register */
1162 outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1163 if (netif_msg_hw(sis_priv))
1164 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1165 net_dev->name, inl(ioaddr + rxdp));
1166 }
1167
1168 /**
1169 * sis630_set_eq - set phy equalizer value for 630 LAN
1170 * @net_dev: the net device to set equalizer value
1171 * @revision: 630 LAN revision number
1172 *
1173 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1174 * PHY register 14h(Test)
1175 * Bit 14: 0 -- Automatically dectect (default)
1176 * 1 -- Manually set Equalizer filter
1177 * Bit 13: 0 -- (Default)
1178 * 1 -- Speed up convergence of equalizer setting
1179 * Bit 9 : 0 -- (Default)
1180 * 1 -- Disable Baseline Wander
1181 * Bit 3~7 -- Equalizer filter setting
1182 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1183 * Then calculate equalizer value
1184 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1185 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1186 * Calculate Equalizer value:
1187 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-dectect proper equalizer value.
1188 * When the equalizer is stable, this value is not a fixed value. It will be within
1189 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1190 * 0 <= max <= 4 --> set equalizer to max
1191 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1192 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1193 */
1194
1195 static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1196 {
1197 struct sis900_private *sis_priv = net_dev->priv;
1198 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1199 int i, maxcount=10;
1200
1201 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1202 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1203 return;
1204
1205 if (netif_carrier_ok(net_dev)) {
1206 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1207 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1208 (0x2200 | reg14h) & 0xBFFF);
1209 for (i=0; i < maxcount; i++) {
1210 eq_value = (0x00F8 & mdio_read(net_dev,
1211 sis_priv->cur_phy, MII_RESV)) >> 3;
1212 if (i == 0)
1213 max_value=min_value=eq_value;
1214 max_value = (eq_value > max_value) ?
1215 eq_value : max_value;
1216 min_value = (eq_value < min_value) ?
1217 eq_value : min_value;
1218 }
1219 /* 630E rule to determine the equalizer value */
1220 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1221 revision == SIS630ET_900_REV) {
1222 if (max_value < 5)
1223 eq_value = max_value;
1224 else if (max_value >= 5 && max_value < 15)
1225 eq_value = (max_value == min_value) ?
1226 max_value+2 : max_value+1;
1227 else if (max_value >= 15)
1228 eq_value=(max_value == min_value) ?
1229 max_value+6 : max_value+5;
1230 }
1231 /* 630B0&B1 rule to determine the equalizer value */
1232 if (revision == SIS630A_900_REV &&
1233 (sis_priv->host_bridge_rev == SIS630B0 ||
1234 sis_priv->host_bridge_rev == SIS630B1)) {
1235 if (max_value == 0)
1236 eq_value = 3;
1237 else
1238 eq_value = (max_value + min_value + 1)/2;
1239 }
1240 /* write equalizer value and setting */
1241 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1242 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1243 reg14h = (reg14h | 0x6000) & 0xFDFF;
1244 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1245 } else {
1246 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1247 if (revision == SIS630A_900_REV &&
1248 (sis_priv->host_bridge_rev == SIS630B0 ||
1249 sis_priv->host_bridge_rev == SIS630B1))
1250 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1251 (reg14h | 0x2200) & 0xBFFF);
1252 else
1253 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1254 (reg14h | 0x2000) & 0xBFFF);
1255 }
1256 return;
1257 }
1258
1259 /**
1260 * sis900_timer - sis900 timer routine
1261 * @data: pointer to sis900 net device
1262 *
1263 * On each timer ticks we check two things,
1264 * link status (ON/OFF) and link mode (10/100/Full/Half)
1265 */
1266
1267 static void sis900_timer(unsigned long data)
1268 {
1269 struct net_device *net_dev = (struct net_device *)data;
1270 struct sis900_private *sis_priv = net_dev->priv;
1271 struct mii_phy *mii_phy = sis_priv->mii;
1272 static int next_tick = 5*HZ;
1273 u16 status;
1274
1275 if (!sis_priv->autong_complete){
1276 int speed, duplex = 0;
1277
1278 sis900_read_mode(net_dev, &speed, &duplex);
1279 if (duplex){
1280 sis900_set_mode(net_dev->base_addr, speed, duplex);
1281 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1282 netif_start_queue(net_dev);
1283 }
1284
1285 sis_priv->timer.expires = jiffies + HZ;
1286 add_timer(&sis_priv->timer);
1287 return;
1288 }
1289
1290 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1291 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1292
1293 /* Link OFF -> ON */
1294 if (!netif_carrier_ok(net_dev)) {
1295 LookForLink:
1296 /* Search for new PHY */
1297 status = sis900_default_phy(net_dev);
1298 mii_phy = sis_priv->mii;
1299
1300 if (status & MII_STAT_LINK){
1301 sis900_check_mode(net_dev, mii_phy);
1302 netif_carrier_on(net_dev);
1303 }
1304 } else {
1305 /* Link ON -> OFF */
1306 if (!(status & MII_STAT_LINK)){
1307 netif_carrier_off(net_dev);
1308 if(netif_msg_link(sis_priv))
1309 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1310
1311 /* Change mode issue */
1312 if ((mii_phy->phy_id0 == 0x001D) &&
1313 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1314 sis900_reset_phy(net_dev, sis_priv->cur_phy);
1315
1316 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1317
1318 goto LookForLink;
1319 }
1320 }
1321
1322 sis_priv->timer.expires = jiffies + next_tick;
1323 add_timer(&sis_priv->timer);
1324 }
1325
1326 /**
1327 * sis900_check_mode - check the media mode for sis900
1328 * @net_dev: the net device to be checked
1329 * @mii_phy: the mii phy
1330 *
1331 * Older driver gets the media mode from mii status output
1332 * register. Now we set our media capability and auto-negotiate
1333 * to get the upper bound of speed and duplex between two ends.
1334 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1335 * and autong_complete should be set to 1.
1336 */
1337
1338 static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1339 {
1340 struct sis900_private *sis_priv = net_dev->priv;
1341 long ioaddr = net_dev->base_addr;
1342 int speed, duplex;
1343
1344 if (mii_phy->phy_types == LAN) {
1345 outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg);
1346 sis900_set_capability(net_dev , mii_phy);
1347 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1348 } else {
1349 outl(EXD | inl(ioaddr + cfg), ioaddr + cfg);
1350 speed = HW_SPEED_HOME;
1351 duplex = FDX_CAPABLE_HALF_SELECTED;
1352 sis900_set_mode(ioaddr, speed, duplex);
1353 sis_priv->autong_complete = 1;
1354 }
1355 }
1356
1357 /**
1358 * sis900_set_mode - Set the media mode of mac register.
1359 * @ioaddr: the address of the device
1360 * @speed : the transmit speed to be determined
1361 * @duplex: the duplex mode to be determined
1362 *
1363 * Set the media mode of mac register txcfg/rxcfg according to
1364 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1365 * bus is used instead of PCI bus. When this bit is set 1, the
1366 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1367 * double words.
1368 */
1369
1370 static void sis900_set_mode (long ioaddr, int speed, int duplex)
1371 {
1372 u32 tx_flags = 0, rx_flags = 0;
1373
1374 if (inl(ioaddr + cfg) & EDB_MASTER_EN) {
1375 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1376 (TX_FILL_THRESH << TxFILLT_shift);
1377 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1378 } else {
1379 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1380 (TX_FILL_THRESH << TxFILLT_shift);
1381 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1382 }
1383
1384 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1385 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1386 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1387 } else {
1388 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1389 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1390 }
1391
1392 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1393 tx_flags |= (TxCSI | TxHBI);
1394 rx_flags |= RxATX;
1395 }
1396
1397 outl (tx_flags, ioaddr + txcfg);
1398 outl (rx_flags, ioaddr + rxcfg);
1399 }
1400
1401 /**
1402 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1403 * @net_dev: the net device to read mode for
1404 * @phy_addr: mii phy address
1405 *
1406 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1407 * autong_complete should be set to 0 when starting auto-negotiation.
1408 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1409 * sis900_timer will wait for link on again if autong_complete = 0.
1410 */
1411
1412 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1413 {
1414 struct sis900_private *sis_priv = net_dev->priv;
1415 int i = 0;
1416 u32 status;
1417
1418 while (i++ < 2)
1419 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1420
1421 if (!(status & MII_STAT_LINK)){
1422 if(netif_msg_link(sis_priv))
1423 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1424 sis_priv->autong_complete = 1;
1425 netif_carrier_off(net_dev);
1426 return;
1427 }
1428
1429 /* (Re)start AutoNegotiate */
1430 mdio_write(net_dev, phy_addr, MII_CONTROL,
1431 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1432 sis_priv->autong_complete = 0;
1433 }
1434
1435
1436 /**
1437 * sis900_read_mode - read media mode for sis900 internal phy
1438 * @net_dev: the net device to read mode for
1439 * @speed : the transmit speed to be determined
1440 * @duplex : the duplex mode to be determined
1441 *
1442 * The capability of remote end will be put in mii register autorec
1443 * after auto-negotiation. Use AND operation to get the upper bound
1444 * of speed and duplex between two ends.
1445 */
1446
1447 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1448 {
1449 struct sis900_private *sis_priv = net_dev->priv;
1450 struct mii_phy *phy = sis_priv->mii;
1451 int phy_addr = sis_priv->cur_phy;
1452 u32 status;
1453 u16 autoadv, autorec;
1454 int i = 0;
1455
1456 while (i++ < 2)
1457 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1458
1459 if (!(status & MII_STAT_LINK))
1460 return;
1461
1462 /* AutoNegotiate completed */
1463 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1464 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1465 status = autoadv & autorec;
1466
1467 *speed = HW_SPEED_10_MBPS;
1468 *duplex = FDX_CAPABLE_HALF_SELECTED;
1469
1470 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1471 *speed = HW_SPEED_100_MBPS;
1472 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1473 *duplex = FDX_CAPABLE_FULL_SELECTED;
1474
1475 sis_priv->autong_complete = 1;
1476
1477 /* Workaround for Realtek RTL8201 PHY issue */
1478 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1479 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1480 *duplex = FDX_CAPABLE_FULL_SELECTED;
1481 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1482 *speed = HW_SPEED_100_MBPS;
1483 }
1484
1485 if(netif_msg_link(sis_priv))
1486 printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1487 net_dev->name,
1488 *speed == HW_SPEED_100_MBPS ?
1489 "100mbps" : "10mbps",
1490 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1491 "full" : "half");
1492 }
1493
1494 /**
1495 * sis900_tx_timeout - sis900 transmit timeout routine
1496 * @net_dev: the net device to transmit
1497 *
1498 * print transmit timeout status
1499 * disable interrupts and do some tasks
1500 */
1501
1502 static void sis900_tx_timeout(struct net_device *net_dev)
1503 {
1504 struct sis900_private *sis_priv = net_dev->priv;
1505 long ioaddr = net_dev->base_addr;
1506 unsigned long flags;
1507 int i;
1508
1509 if(netif_msg_tx_err(sis_priv))
1510 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n",
1511 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1512
1513 /* Disable interrupts by clearing the interrupt mask. */
1514 outl(0x0000, ioaddr + imr);
1515
1516 /* use spinlock to prevent interrupt handler accessing buffer ring */
1517 spin_lock_irqsave(&sis_priv->lock, flags);
1518
1519 /* discard unsent packets */
1520 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1521 for (i = 0; i < NUM_TX_DESC; i++) {
1522 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1523
1524 if (skb) {
1525 pci_unmap_single(sis_priv->pci_dev,
1526 sis_priv->tx_ring[i].bufptr, skb->len,
1527 PCI_DMA_TODEVICE);
1528 dev_kfree_skb_irq(skb);
1529 sis_priv->tx_skbuff[i] = NULL;
1530 sis_priv->tx_ring[i].cmdsts = 0;
1531 sis_priv->tx_ring[i].bufptr = 0;
1532 sis_priv->stats.tx_dropped++;
1533 }
1534 }
1535 sis_priv->tx_full = 0;
1536 netif_wake_queue(net_dev);
1537
1538 spin_unlock_irqrestore(&sis_priv->lock, flags);
1539
1540 net_dev->trans_start = jiffies;
1541
1542 /* load Transmit Descriptor Register */
1543 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1544
1545 /* Enable all known interrupts by setting the interrupt mask. */
1546 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1547 return;
1548 }
1549
1550 /**
1551 * sis900_start_xmit - sis900 start transmit routine
1552 * @skb: socket buffer pointer to put the data being transmitted
1553 * @net_dev: the net device to transmit with
1554 *
1555 * Set the transmit buffer descriptor,
1556 * and write TxENA to enable transmit state machine.
1557 * tell upper layer if the buffer is full
1558 */
1559
1560 static int
1561 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1562 {
1563 struct sis900_private *sis_priv = net_dev->priv;
1564 long ioaddr = net_dev->base_addr;
1565 unsigned int entry;
1566 unsigned long flags;
1567 unsigned int index_cur_tx, index_dirty_tx;
1568 unsigned int count_dirty_tx;
1569
1570 /* Don't transmit data before the complete of auto-negotiation */
1571 if(!sis_priv->autong_complete){
1572 netif_stop_queue(net_dev);
1573 return 1;
1574 }
1575
1576 spin_lock_irqsave(&sis_priv->lock, flags);
1577
1578 /* Calculate the next Tx descriptor entry. */
1579 entry = sis_priv->cur_tx % NUM_TX_DESC;
1580 sis_priv->tx_skbuff[entry] = skb;
1581
1582 /* set the transmit buffer descriptor and enable Transmit State Machine */
1583 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1584 skb->data, skb->len, PCI_DMA_TODEVICE);
1585 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1586 outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1587
1588 sis_priv->cur_tx ++;
1589 index_cur_tx = sis_priv->cur_tx;
1590 index_dirty_tx = sis_priv->dirty_tx;
1591
1592 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1593 count_dirty_tx ++;
1594
1595 if (index_cur_tx == index_dirty_tx) {
1596 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1597 sis_priv->tx_full = 1;
1598 netif_stop_queue(net_dev);
1599 } else if (count_dirty_tx < NUM_TX_DESC) {
1600 /* Typical path, tell upper layer that more transmission is possible */
1601 netif_start_queue(net_dev);
1602 } else {
1603 /* buffer full, tell upper layer no more transmission */
1604 sis_priv->tx_full = 1;
1605 netif_stop_queue(net_dev);
1606 }
1607
1608 spin_unlock_irqrestore(&sis_priv->lock, flags);
1609
1610 net_dev->trans_start = jiffies;
1611
1612 if (netif_msg_tx_queued(sis_priv))
1613 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1614 "to slot %d.\n",
1615 net_dev->name, skb->data, (int)skb->len, entry);
1616
1617 return 0;
1618 }
1619
1620 /**
1621 * sis900_interrupt - sis900 interrupt handler
1622 * @irq: the irq number
1623 * @dev_instance: the client data object
1624 * @regs: snapshot of processor context
1625 *
1626 * The interrupt handler does all of the Rx thread work,
1627 * and cleans up after the Tx thread
1628 */
1629
1630 static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
1631 {
1632 struct net_device *net_dev = dev_instance;
1633 struct sis900_private *sis_priv = net_dev->priv;
1634 int boguscnt = max_interrupt_work;
1635 long ioaddr = net_dev->base_addr;
1636 u32 status;
1637 unsigned int handled = 0;
1638
1639 spin_lock (&sis_priv->lock);
1640
1641 do {
1642 status = inl(ioaddr + isr);
1643
1644 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1645 /* nothing intresting happened */
1646 break;
1647 handled = 1;
1648
1649 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1650 if (status & (RxORN | RxERR | RxOK))
1651 /* Rx interrupt */
1652 sis900_rx(net_dev);
1653
1654 if (status & (TxURN | TxERR | TxIDLE))
1655 /* Tx interrupt */
1656 sis900_finish_xmit(net_dev);
1657
1658 /* something strange happened !!! */
1659 if (status & HIBERR) {
1660 if(netif_msg_intr(sis_priv))
1661 printk(KERN_INFO "%s: Abnormal interrupt,"
1662 "status %#8.8x.\n", net_dev->name, status);
1663 break;
1664 }
1665 if (--boguscnt < 0) {
1666 if(netif_msg_intr(sis_priv))
1667 printk(KERN_INFO "%s: Too much work at interrupt, "
1668 "interrupt status = %#8.8x.\n",
1669 net_dev->name, status);
1670 break;
1671 }
1672 } while (1);
1673
1674 if(netif_msg_intr(sis_priv))
1675 printk(KERN_DEBUG "%s: exiting interrupt, "
1676 "interrupt status = 0x%#8.8x.\n",
1677 net_dev->name, inl(ioaddr + isr));
1678
1679 spin_unlock (&sis_priv->lock);
1680 return IRQ_RETVAL(handled);
1681 }
1682
1683 /**
1684 * sis900_rx - sis900 receive routine
1685 * @net_dev: the net device which receives data
1686 *
1687 * Process receive interrupt events,
1688 * put buffer to higher layer and refill buffer pool
1689 * Note: This fucntion is called by interrupt handler,
1690 * don't do "too much" work here
1691 */
1692
1693 static int sis900_rx(struct net_device *net_dev)
1694 {
1695 struct sis900_private *sis_priv = net_dev->priv;
1696 long ioaddr = net_dev->base_addr;
1697 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1698 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1699 int rx_work_limit;
1700
1701 if (netif_msg_rx_status(sis_priv))
1702 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1703 "status:0x%8.8x\n",
1704 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1705 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1706
1707 while (rx_status & OWN) {
1708 unsigned int rx_size;
1709
1710 if (--rx_work_limit < 0)
1711 break;
1712
1713 rx_size = (rx_status & DSIZE) - CRC_SIZE;
1714
1715 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1716 /* corrupted packet received */
1717 if (netif_msg_rx_err(sis_priv))
1718 printk(KERN_DEBUG "%s: Corrupted packet "
1719 "received, buffer status = 0x%8.8x.\n",
1720 net_dev->name, rx_status);
1721 sis_priv->stats.rx_errors++;
1722 if (rx_status & OVERRUN)
1723 sis_priv->stats.rx_over_errors++;
1724 if (rx_status & (TOOLONG|RUNT))
1725 sis_priv->stats.rx_length_errors++;
1726 if (rx_status & (RXISERR | FAERR))
1727 sis_priv->stats.rx_frame_errors++;
1728 if (rx_status & CRCERR)
1729 sis_priv->stats.rx_crc_errors++;
1730 /* reset buffer descriptor state */
1731 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1732 } else {
1733 struct sk_buff * skb;
1734
1735 /* This situation should never happen, but due to
1736 some unknow bugs, it is possible that
1737 we are working on NULL sk_buff :-( */
1738 if (sis_priv->rx_skbuff[entry] == NULL) {
1739 if (netif_msg_rx_err(sis_priv))
1740 printk(KERN_WARNING "%s: NULL pointer "
1741 "encountered in Rx ring\n"
1742 "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1743 net_dev->name, sis_priv->cur_rx,
1744 sis_priv->dirty_rx);
1745 break;
1746 }
1747
1748 pci_unmap_single(sis_priv->pci_dev,
1749 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1750 PCI_DMA_FROMDEVICE);
1751 /* give the socket buffer to upper layers */
1752 skb = sis_priv->rx_skbuff[entry];
1753 skb_put(skb, rx_size);
1754 skb->protocol = eth_type_trans(skb, net_dev);
1755 netif_rx(skb);
1756
1757 /* some network statistics */
1758 if ((rx_status & BCAST) == MCAST)
1759 sis_priv->stats.multicast++;
1760 net_dev->last_rx = jiffies;
1761 sis_priv->stats.rx_bytes += rx_size;
1762 sis_priv->stats.rx_packets++;
1763
1764 /* refill the Rx buffer, what if there is not enought
1765 * memory for new socket buffer ?? */
1766 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1767 /* not enough memory for skbuff, this makes a
1768 * "hole" on the buffer ring, it is not clear
1769 * how the hardware will react to this kind
1770 * of degenerated buffer */
1771 if (netif_msg_rx_status(sis_priv))
1772 printk(KERN_INFO "%s: Memory squeeze,"
1773 "deferring packet.\n",
1774 net_dev->name);
1775 sis_priv->rx_skbuff[entry] = NULL;
1776 /* reset buffer descriptor state */
1777 sis_priv->rx_ring[entry].cmdsts = 0;
1778 sis_priv->rx_ring[entry].bufptr = 0;
1779 sis_priv->stats.rx_dropped++;
1780 sis_priv->cur_rx++;
1781 break;
1782 }
1783 skb->dev = net_dev;
1784 sis_priv->rx_skbuff[entry] = skb;
1785 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1786 sis_priv->rx_ring[entry].bufptr =
1787 pci_map_single(sis_priv->pci_dev, skb->data,
1788 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1789 sis_priv->dirty_rx++;
1790 }
1791 sis_priv->cur_rx++;
1792 entry = sis_priv->cur_rx % NUM_RX_DESC;
1793 rx_status = sis_priv->rx_ring[entry].cmdsts;
1794 } // while
1795
1796 /* refill the Rx buffer, what if the rate of refilling is slower
1797 * than consuming ?? */
1798 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1799 struct sk_buff *skb;
1800
1801 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1802
1803 if (sis_priv->rx_skbuff[entry] == NULL) {
1804 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1805 /* not enough memory for skbuff, this makes a
1806 * "hole" on the buffer ring, it is not clear
1807 * how the hardware will react to this kind
1808 * of degenerated buffer */
1809 if (netif_msg_rx_err(sis_priv))
1810 printk(KERN_INFO "%s: Memory squeeze,"
1811 "deferring packet.\n",
1812 net_dev->name);
1813 sis_priv->stats.rx_dropped++;
1814 break;
1815 }
1816 skb->dev = net_dev;
1817 sis_priv->rx_skbuff[entry] = skb;
1818 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1819 sis_priv->rx_ring[entry].bufptr =
1820 pci_map_single(sis_priv->pci_dev, skb->data,
1821 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1822 }
1823 }
1824 /* re-enable the potentially idle receive state matchine */
1825 outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
1826
1827 return 0;
1828 }
1829
1830 /**
1831 * sis900_finish_xmit - finish up transmission of packets
1832 * @net_dev: the net device to be transmitted on
1833 *
1834 * Check for error condition and free socket buffer etc
1835 * schedule for more transmission as needed
1836 * Note: This fucntion is called by interrupt handler,
1837 * don't do "too much" work here
1838 */
1839
1840 static void sis900_finish_xmit (struct net_device *net_dev)
1841 {
1842 struct sis900_private *sis_priv = net_dev->priv;
1843
1844 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1845 struct sk_buff *skb;
1846 unsigned int entry;
1847 u32 tx_status;
1848
1849 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1850 tx_status = sis_priv->tx_ring[entry].cmdsts;
1851
1852 if (tx_status & OWN) {
1853 /* The packet is not transmitted yet (owned by hardware) !
1854 * Note: the interrupt is generated only when Tx Machine
1855 * is idle, so this is an almost impossible case */
1856 break;
1857 }
1858
1859 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1860 /* packet unsuccessfully transmitted */
1861 if (netif_msg_tx_err(sis_priv))
1862 printk(KERN_DEBUG "%s: Transmit "
1863 "error, Tx status %8.8x.\n",
1864 net_dev->name, tx_status);
1865 sis_priv->stats.tx_errors++;
1866 if (tx_status & UNDERRUN)
1867 sis_priv->stats.tx_fifo_errors++;
1868 if (tx_status & ABORT)
1869 sis_priv->stats.tx_aborted_errors++;
1870 if (tx_status & NOCARRIER)
1871 sis_priv->stats.tx_carrier_errors++;
1872 if (tx_status & OWCOLL)
1873 sis_priv->stats.tx_window_errors++;
1874 } else {
1875 /* packet successfully transmitted */
1876 sis_priv->stats.collisions += (tx_status & COLCNT) >> 16;
1877 sis_priv->stats.tx_bytes += tx_status & DSIZE;
1878 sis_priv->stats.tx_packets++;
1879 }
1880 /* Free the original skb. */
1881 skb = sis_priv->tx_skbuff[entry];
1882 pci_unmap_single(sis_priv->pci_dev,
1883 sis_priv->tx_ring[entry].bufptr, skb->len,
1884 PCI_DMA_TODEVICE);
1885 dev_kfree_skb_irq(skb);
1886 sis_priv->tx_skbuff[entry] = NULL;
1887 sis_priv->tx_ring[entry].bufptr = 0;
1888 sis_priv->tx_ring[entry].cmdsts = 0;
1889 }
1890
1891 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1892 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1893 /* The ring is no longer full, clear tx_full and schedule
1894 * more transmission by netif_wake_queue(net_dev) */
1895 sis_priv->tx_full = 0;
1896 netif_wake_queue (net_dev);
1897 }
1898 }
1899
1900 /**
1901 * sis900_close - close sis900 device
1902 * @net_dev: the net device to be closed
1903 *
1904 * Disable interrupts, stop the Tx and Rx Status Machine
1905 * free Tx and RX socket buffer
1906 */
1907
1908 static int sis900_close(struct net_device *net_dev)
1909 {
1910 long ioaddr = net_dev->base_addr;
1911 struct sis900_private *sis_priv = net_dev->priv;
1912 struct sk_buff *skb;
1913 int i;
1914
1915 netif_stop_queue(net_dev);
1916
1917 /* Disable interrupts by clearing the interrupt mask. */
1918 outl(0x0000, ioaddr + imr);
1919 outl(0x0000, ioaddr + ier);
1920
1921 /* Stop the chip's Tx and Rx Status Machine */
1922 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
1923
1924 del_timer(&sis_priv->timer);
1925
1926 free_irq(net_dev->irq, net_dev);
1927
1928 /* Free Tx and RX skbuff */
1929 for (i = 0; i < NUM_RX_DESC; i++) {
1930 skb = sis_priv->rx_skbuff[i];
1931 if (skb) {
1932 pci_unmap_single(sis_priv->pci_dev,
1933 sis_priv->rx_ring[i].bufptr,
1934 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1935 dev_kfree_skb(skb);
1936 sis_priv->rx_skbuff[i] = NULL;
1937 }
1938 }
1939 for (i = 0; i < NUM_TX_DESC; i++) {
1940 skb = sis_priv->tx_skbuff[i];
1941 if (skb) {
1942 pci_unmap_single(sis_priv->pci_dev,
1943 sis_priv->tx_ring[i].bufptr, skb->len,
1944 PCI_DMA_TODEVICE);
1945 dev_kfree_skb(skb);
1946 sis_priv->tx_skbuff[i] = NULL;
1947 }
1948 }
1949
1950 /* Green! Put the chip in low-power mode. */
1951
1952 return 0;
1953 }
1954
1955 /**
1956 * sis900_get_drvinfo - Return information about driver
1957 * @net_dev: the net device to probe
1958 * @info: container for info returned
1959 *
1960 * Process ethtool command such as "ehtool -i" to show information
1961 */
1962
1963 static void sis900_get_drvinfo(struct net_device *net_dev,
1964 struct ethtool_drvinfo *info)
1965 {
1966 struct sis900_private *sis_priv = net_dev->priv;
1967
1968 strcpy (info->driver, SIS900_MODULE_NAME);
1969 strcpy (info->version, SIS900_DRV_VERSION);
1970 strcpy (info->bus_info, pci_name(sis_priv->pci_dev));
1971 }
1972
1973 static u32 sis900_get_msglevel(struct net_device *net_dev)
1974 {
1975 struct sis900_private *sis_priv = net_dev->priv;
1976 return sis_priv->msg_enable;
1977 }
1978
1979 static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
1980 {
1981 struct sis900_private *sis_priv = net_dev->priv;
1982 sis_priv->msg_enable = value;
1983 }
1984
1985 static u32 sis900_get_link(struct net_device *net_dev)
1986 {
1987 struct sis900_private *sis_priv = net_dev->priv;
1988 return mii_link_ok(&sis_priv->mii_info);
1989 }
1990
1991 static int sis900_get_settings(struct net_device *net_dev,
1992 struct ethtool_cmd *cmd)
1993 {
1994 struct sis900_private *sis_priv = net_dev->priv;
1995 spin_lock_irq(&sis_priv->lock);
1996 mii_ethtool_gset(&sis_priv->mii_info, cmd);
1997 spin_unlock_irq(&sis_priv->lock);
1998 return 0;
1999 }
2000
2001 static int sis900_set_settings(struct net_device *net_dev,
2002 struct ethtool_cmd *cmd)
2003 {
2004 struct sis900_private *sis_priv = net_dev->priv;
2005 int rt;
2006 spin_lock_irq(&sis_priv->lock);
2007 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
2008 spin_unlock_irq(&sis_priv->lock);
2009 return rt;
2010 }
2011
2012 static int sis900_nway_reset(struct net_device *net_dev)
2013 {
2014 struct sis900_private *sis_priv = net_dev->priv;
2015 return mii_nway_restart(&sis_priv->mii_info);
2016 }
2017
2018 static struct ethtool_ops sis900_ethtool_ops = {
2019 .get_drvinfo = sis900_get_drvinfo,
2020 .get_msglevel = sis900_get_msglevel,
2021 .set_msglevel = sis900_set_msglevel,
2022 .get_link = sis900_get_link,
2023 .get_settings = sis900_get_settings,
2024 .set_settings = sis900_set_settings,
2025 .nway_reset = sis900_nway_reset,
2026 };
2027
2028 /**
2029 * mii_ioctl - process MII i/o control command
2030 * @net_dev: the net device to command for
2031 * @rq: parameter for command
2032 * @cmd: the i/o command
2033 *
2034 * Process MII command like read/write MII register
2035 */
2036
2037 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2038 {
2039 struct sis900_private *sis_priv = net_dev->priv;
2040 struct mii_ioctl_data *data = if_mii(rq);
2041
2042 switch(cmd) {
2043 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2044 data->phy_id = sis_priv->mii->phy_addr;
2045 /* Fall Through */
2046
2047 case SIOCGMIIREG: /* Read MII PHY register. */
2048 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2049 return 0;
2050
2051 case SIOCSMIIREG: /* Write MII PHY register. */
2052 if (!capable(CAP_NET_ADMIN))
2053 return -EPERM;
2054 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2055 return 0;
2056 default:
2057 return -EOPNOTSUPP;
2058 }
2059 }
2060
2061 /**
2062 * sis900_get_stats - Get sis900 read/write statistics
2063 * @net_dev: the net device to get statistics for
2064 *
2065 * get tx/rx statistics for sis900
2066 */
2067
2068 static struct net_device_stats *
2069 sis900_get_stats(struct net_device *net_dev)
2070 {
2071 struct sis900_private *sis_priv = net_dev->priv;
2072
2073 return &sis_priv->stats;
2074 }
2075
2076 /**
2077 * sis900_set_config - Set media type by net_device.set_config
2078 * @dev: the net device for media type change
2079 * @map: ifmap passed by ifconfig
2080 *
2081 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
2082 * we support only port changes. All other runtime configuration
2083 * changes will be ignored
2084 */
2085
2086 static int sis900_set_config(struct net_device *dev, struct ifmap *map)
2087 {
2088 struct sis900_private *sis_priv = dev->priv;
2089 struct mii_phy *mii_phy = sis_priv->mii;
2090
2091 u16 status;
2092
2093 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2094 /* we switch on the ifmap->port field. I couldn't find anything
2095 * like a definition or standard for the values of that field.
2096 * I think the meaning of those values is device specific. But
2097 * since I would like to change the media type via the ifconfig
2098 * command I use the definition from linux/netdevice.h
2099 * (which seems to be different from the ifport(pcmcia) definition) */
2100 switch(map->port){
2101 case IF_PORT_UNKNOWN: /* use auto here */
2102 dev->if_port = map->port;
2103 /* we are going to change the media type, so the Link
2104 * will be temporary down and we need to reflect that
2105 * here. When the Link comes up again, it will be
2106 * sensed by the sis_timer procedure, which also does
2107 * all the rest for us */
2108 netif_carrier_off(dev);
2109
2110 /* read current state */
2111 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2112
2113 /* enable auto negotiation and reset the negotioation
2114 * (I don't really know what the auto negatiotiation
2115 * reset really means, but it sounds for me right to
2116 * do one here) */
2117 mdio_write(dev, mii_phy->phy_addr,
2118 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2119
2120 break;
2121
2122 case IF_PORT_10BASET: /* 10BaseT */
2123 dev->if_port = map->port;
2124
2125 /* we are going to change the media type, so the Link
2126 * will be temporary down and we need to reflect that
2127 * here. When the Link comes up again, it will be
2128 * sensed by the sis_timer procedure, which also does
2129 * all the rest for us */
2130 netif_carrier_off(dev);
2131
2132 /* set Speed to 10Mbps */
2133 /* read current state */
2134 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2135
2136 /* disable auto negotiation and force 10MBit mode*/
2137 mdio_write(dev, mii_phy->phy_addr,
2138 MII_CONTROL, status & ~(MII_CNTL_SPEED |
2139 MII_CNTL_AUTO));
2140 break;
2141
2142 case IF_PORT_100BASET: /* 100BaseT */
2143 case IF_PORT_100BASETX: /* 100BaseTx */
2144 dev->if_port = map->port;
2145
2146 /* we are going to change the media type, so the Link
2147 * will be temporary down and we need to reflect that
2148 * here. When the Link comes up again, it will be
2149 * sensed by the sis_timer procedure, which also does
2150 * all the rest for us */
2151 netif_carrier_off(dev);
2152
2153 /* set Speed to 100Mbps */
2154 /* disable auto negotiation and enable 100MBit Mode */
2155 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2156 mdio_write(dev, mii_phy->phy_addr,
2157 MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2158 MII_CNTL_SPEED);
2159
2160 break;
2161
2162 case IF_PORT_10BASE2: /* 10Base2 */
2163 case IF_PORT_AUI: /* AUI */
2164 case IF_PORT_100BASEFX: /* 100BaseFx */
2165 /* These Modes are not supported (are they?)*/
2166 return -EOPNOTSUPP;
2167 break;
2168
2169 default:
2170 return -EINVAL;
2171 }
2172 }
2173 return 0;
2174 }
2175
2176 /**
2177 * sis900_mcast_bitnr - compute hashtable index
2178 * @addr: multicast address
2179 * @revision: revision id of chip
2180 *
2181 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2182 * hash table, which makes this function a little bit different from other drivers
2183 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
2184 * multicast hash table.
2185 */
2186
2187 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2188 {
2189
2190 u32 crc = ether_crc(6, addr);
2191
2192 /* leave 8 or 7 most siginifant bits */
2193 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2194 return ((int)(crc >> 24));
2195 else
2196 return ((int)(crc >> 25));
2197 }
2198
2199 /**
2200 * set_rx_mode - Set SiS900 receive mode
2201 * @net_dev: the net device to be set
2202 *
2203 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2204 * And set the appropriate multicast filter.
2205 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2206 */
2207
2208 static void set_rx_mode(struct net_device *net_dev)
2209 {
2210 long ioaddr = net_dev->base_addr;
2211 struct sis900_private * sis_priv = net_dev->priv;
2212 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2213 int i, table_entries;
2214 u32 rx_mode;
2215
2216 /* 635 Hash Table entires = 256(2^16) */
2217 if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2218 (sis_priv->chipset_rev == SIS900B_900_REV))
2219 table_entries = 16;
2220 else
2221 table_entries = 8;
2222
2223 if (net_dev->flags & IFF_PROMISC) {
2224 /* Accept any kinds of packets */
2225 rx_mode = RFPromiscuous;
2226 for (i = 0; i < table_entries; i++)
2227 mc_filter[i] = 0xffff;
2228 } else if ((net_dev->mc_count > multicast_filter_limit) ||
2229 (net_dev->flags & IFF_ALLMULTI)) {
2230 /* too many multicast addresses or accept all multicast packet */
2231 rx_mode = RFAAB | RFAAM;
2232 for (i = 0; i < table_entries; i++)
2233 mc_filter[i] = 0xffff;
2234 } else {
2235 /* Accept Broadcast packet, destination address matchs our
2236 * MAC address, use Receive Filter to reject unwanted MCAST
2237 * packets */
2238 struct dev_mc_list *mclist;
2239 rx_mode = RFAAB;
2240 for (i = 0, mclist = net_dev->mc_list;
2241 mclist && i < net_dev->mc_count;
2242 i++, mclist = mclist->next) {
2243 unsigned int bit_nr =
2244 sis900_mcast_bitnr(mclist->dmi_addr, sis_priv->chipset_rev);
2245 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2246 }
2247 }
2248
2249 /* update Multicast Hash Table in Receive Filter */
2250 for (i = 0; i < table_entries; i++) {
2251 /* why plus 0x04 ??, That makes the correct value for hash table. */
2252 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
2253 outl(mc_filter[i], ioaddr + rfdr);
2254 }
2255
2256 outl(RFEN | rx_mode, ioaddr + rfcr);
2257
2258 /* sis900 is capable of looping back packets at MAC level for
2259 * debugging purpose */
2260 if (net_dev->flags & IFF_LOOPBACK) {
2261 u32 cr_saved;
2262 /* We must disable Tx/Rx before setting loopback mode */
2263 cr_saved = inl(ioaddr + cr);
2264 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
2265 /* enable loopback */
2266 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
2267 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
2268 /* restore cr */
2269 outl(cr_saved, ioaddr + cr);
2270 }
2271
2272 return;
2273 }
2274
2275 /**
2276 * sis900_reset - Reset sis900 MAC
2277 * @net_dev: the net device to reset
2278 *
2279 * reset sis900 MAC and wait until finished
2280 * reset through command register
2281 * change backoff algorithm for 900B0 & 635 M/B
2282 */
2283
2284 static void sis900_reset(struct net_device *net_dev)
2285 {
2286 struct sis900_private * sis_priv = net_dev->priv;
2287 long ioaddr = net_dev->base_addr;
2288 int i = 0;
2289 u32 status = TxRCMP | RxRCMP;
2290
2291 outl(0, ioaddr + ier);
2292 outl(0, ioaddr + imr);
2293 outl(0, ioaddr + rfcr);
2294
2295 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
2296
2297 /* Check that the chip has finished the reset. */
2298 while (status && (i++ < 1000)) {
2299 status ^= (inl(isr + ioaddr) & status);
2300 }
2301
2302 if( (sis_priv->chipset_rev >= SIS635A_900_REV) ||
2303 (sis_priv->chipset_rev == SIS900B_900_REV) )
2304 outl(PESEL | RND_CNT, ioaddr + cfg);
2305 else
2306 outl(PESEL, ioaddr + cfg);
2307 }
2308
2309 /**
2310 * sis900_remove - Remove sis900 device
2311 * @pci_dev: the pci device to be removed
2312 *
2313 * remove and release SiS900 net device
2314 */
2315
2316 static void __devexit sis900_remove(struct pci_dev *pci_dev)
2317 {
2318 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2319 struct sis900_private * sis_priv = net_dev->priv;
2320 struct mii_phy *phy = NULL;
2321
2322 while (sis_priv->first_mii) {
2323 phy = sis_priv->first_mii;
2324 sis_priv->first_mii = phy->next;
2325 kfree(phy);
2326 }
2327
2328 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2329 sis_priv->rx_ring_dma);
2330 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2331 sis_priv->tx_ring_dma);
2332 unregister_netdev(net_dev);
2333 free_netdev(net_dev);
2334 pci_release_regions(pci_dev);
2335 pci_set_drvdata(pci_dev, NULL);
2336 }
2337
2338 #ifdef CONFIG_PM
2339
2340 static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2341 {
2342 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2343 long ioaddr = net_dev->base_addr;
2344
2345 if(!netif_running(net_dev))
2346 return 0;
2347
2348 netif_stop_queue(net_dev);
2349 netif_device_detach(net_dev);
2350
2351 /* Stop the chip's Tx and Rx Status Machine */
2352 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2353
2354 pci_set_power_state(pci_dev, PCI_D3hot);
2355 pci_save_state(pci_dev);
2356
2357 return 0;
2358 }
2359
2360 static int sis900_resume(struct pci_dev *pci_dev)
2361 {
2362 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2363 struct sis900_private *sis_priv = net_dev->priv;
2364 long ioaddr = net_dev->base_addr;
2365
2366 if(!netif_running(net_dev))
2367 return 0;
2368 pci_restore_state(pci_dev);
2369 pci_set_power_state(pci_dev, PCI_D0);
2370
2371 sis900_init_rxfilter(net_dev);
2372
2373 sis900_init_tx_ring(net_dev);
2374 sis900_init_rx_ring(net_dev);
2375
2376 set_rx_mode(net_dev);
2377
2378 netif_device_attach(net_dev);
2379 netif_start_queue(net_dev);
2380
2381 /* Workaround for EDB */
2382 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2383
2384 /* Enable all known interrupts by setting the interrupt mask. */
2385 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
2386 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
2387 outl(IE, ioaddr + ier);
2388
2389 sis900_check_mode(net_dev, sis_priv->mii);
2390
2391 return 0;
2392 }
2393 #endif /* CONFIG_PM */
2394
2395 static struct pci_driver sis900_pci_driver = {
2396 .name = SIS900_MODULE_NAME,
2397 .id_table = sis900_pci_tbl,
2398 .probe = sis900_probe,
2399 .remove = __devexit_p(sis900_remove),
2400 #ifdef CONFIG_PM
2401 .suspend = sis900_suspend,
2402 .resume = sis900_resume,
2403 #endif /* CONFIG_PM */
2404 };
2405
2406 static int __init sis900_init_module(void)
2407 {
2408 /* when a module, this is printed whether or not devices are found in probe */
2409 #ifdef MODULE
2410 printk(version);
2411 #endif
2412
2413 return pci_module_init(&sis900_pci_driver);
2414 }
2415
2416 static void __exit sis900_cleanup_module(void)
2417 {
2418 pci_unregister_driver(&sis900_pci_driver);
2419 }
2420
2421 module_init(sis900_init_module);
2422 module_exit(sis900_cleanup_module);
2423
Linux kernel - Deliverables
This page took 0.079722 seconds and 5 git commands to generate.