Pull sony into release branch
[deliverable/linux.git] / drivers / net / sis900.c
1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
2 Copyright 1999 Silicon Integrated System Corporation
3 Revision: 1.08.10 Apr. 2 2006
4
5 Modified from the driver which is originally written by Donald Becker.
6
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
11
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
19
20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support
21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support
24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule
40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
50 */
51
52 #include <linux/module.h>
53 #include <linux/moduleparam.h>
54 #include <linux/kernel.h>
55 #include <linux/string.h>
56 #include <linux/timer.h>
57 #include <linux/errno.h>
58 #include <linux/ioport.h>
59 #include <linux/slab.h>
60 #include <linux/interrupt.h>
61 #include <linux/pci.h>
62 #include <linux/netdevice.h>
63 #include <linux/init.h>
64 #include <linux/mii.h>
65 #include <linux/etherdevice.h>
66 #include <linux/skbuff.h>
67 #include <linux/delay.h>
68 #include <linux/ethtool.h>
69 #include <linux/crc32.h>
70 #include <linux/bitops.h>
71 #include <linux/dma-mapping.h>
72
73 #include <asm/processor.h> /* Processor type for cache alignment. */
74 #include <asm/io.h>
75 #include <asm/irq.h>
76 #include <asm/uaccess.h> /* User space memory access functions */
77
78 #include "sis900.h"
79
80 #define SIS900_MODULE_NAME "sis900"
81 #define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006"
82
83 static char version[] __devinitdata =
84 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
85
86 static int max_interrupt_work = 40;
87 static int multicast_filter_limit = 128;
88
89 static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
90
91 #define SIS900_DEF_MSG \
92 (NETIF_MSG_DRV | \
93 NETIF_MSG_LINK | \
94 NETIF_MSG_RX_ERR | \
95 NETIF_MSG_TX_ERR)
96
97 /* Time in jiffies before concluding the transmitter is hung. */
98 #define TX_TIMEOUT (4*HZ)
99
100 enum {
101 SIS_900 = 0,
102 SIS_7016
103 };
104 static const char * card_names[] = {
105 "SiS 900 PCI Fast Ethernet",
106 "SiS 7016 PCI Fast Ethernet"
107 };
108 static struct pci_device_id sis900_pci_tbl [] = {
109 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
110 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
111 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
112 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
113 {0,}
114 };
115 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
116
117 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
118
119 static const struct mii_chip_info {
120 const char * name;
121 u16 phy_id0;
122 u16 phy_id1;
123 u8 phy_types;
124 #define HOME 0x0001
125 #define LAN 0x0002
126 #define MIX 0x0003
127 #define UNKNOWN 0x0
128 } mii_chip_table[] = {
129 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
130 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
131 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN },
132 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
133 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN },
134 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
135 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
136 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
137 { "ICS LAN PHY", 0x0143, 0xBC70, LAN },
138 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
139 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
140 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
141 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
142 {NULL,},
143 };
144
145 struct mii_phy {
146 struct mii_phy * next;
147 int phy_addr;
148 u16 phy_id0;
149 u16 phy_id1;
150 u16 status;
151 u8 phy_types;
152 };
153
154 typedef struct _BufferDesc {
155 u32 link;
156 u32 cmdsts;
157 u32 bufptr;
158 } BufferDesc;
159
160 struct sis900_private {
161 struct net_device_stats stats;
162 struct pci_dev * pci_dev;
163
164 spinlock_t lock;
165
166 struct mii_phy * mii;
167 struct mii_phy * first_mii; /* record the first mii structure */
168 unsigned int cur_phy;
169 struct mii_if_info mii_info;
170
171 struct timer_list timer; /* Link status detection timer. */
172 u8 autong_complete; /* 1: auto-negotiate complete */
173
174 u32 msg_enable;
175
176 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
177 unsigned int cur_tx, dirty_tx;
178
179 /* The saved address of a sent/receive-in-place packet buffer */
180 struct sk_buff *tx_skbuff[NUM_TX_DESC];
181 struct sk_buff *rx_skbuff[NUM_RX_DESC];
182 BufferDesc *tx_ring;
183 BufferDesc *rx_ring;
184
185 dma_addr_t tx_ring_dma;
186 dma_addr_t rx_ring_dma;
187
188 unsigned int tx_full; /* The Tx queue is full. */
189 u8 host_bridge_rev;
190 u8 chipset_rev;
191 };
192
193 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
194 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
195 MODULE_LICENSE("GPL");
196
197 module_param(multicast_filter_limit, int, 0444);
198 module_param(max_interrupt_work, int, 0444);
199 module_param(sis900_debug, int, 0444);
200 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
201 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
202 MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
203
204 #ifdef CONFIG_NET_POLL_CONTROLLER
205 static void sis900_poll(struct net_device *dev);
206 #endif
207 static int sis900_open(struct net_device *net_dev);
208 static int sis900_mii_probe (struct net_device * net_dev);
209 static void sis900_init_rxfilter (struct net_device * net_dev);
210 static u16 read_eeprom(long ioaddr, int location);
211 static int mdio_read(struct net_device *net_dev, int phy_id, int location);
212 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
213 static void sis900_timer(unsigned long data);
214 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
215 static void sis900_tx_timeout(struct net_device *net_dev);
216 static void sis900_init_tx_ring(struct net_device *net_dev);
217 static void sis900_init_rx_ring(struct net_device *net_dev);
218 static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
219 static int sis900_rx(struct net_device *net_dev);
220 static void sis900_finish_xmit (struct net_device *net_dev);
221 static irqreturn_t sis900_interrupt(int irq, void *dev_instance);
222 static int sis900_close(struct net_device *net_dev);
223 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
224 static struct net_device_stats *sis900_get_stats(struct net_device *net_dev);
225 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
226 static void set_rx_mode(struct net_device *net_dev);
227 static void sis900_reset(struct net_device *net_dev);
228 static void sis630_set_eq(struct net_device *net_dev, u8 revision);
229 static int sis900_set_config(struct net_device *dev, struct ifmap *map);
230 static u16 sis900_default_phy(struct net_device * net_dev);
231 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
232 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
233 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
234 static void sis900_set_mode (long ioaddr, int speed, int duplex);
235 static const struct ethtool_ops sis900_ethtool_ops;
236
237 /**
238 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
239 * @pci_dev: the sis900 pci device
240 * @net_dev: the net device to get address for
241 *
242 * Older SiS900 and friends, use EEPROM to store MAC address.
243 * MAC address is read from read_eeprom() into @net_dev->dev_addr.
244 */
245
246 static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
247 {
248 long ioaddr = pci_resource_start(pci_dev, 0);
249 u16 signature;
250 int i;
251
252 /* check to see if we have sane EEPROM */
253 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
254 if (signature == 0xffff || signature == 0x0000) {
255 printk (KERN_WARNING "%s: Error EERPOM read %x\n",
256 pci_name(pci_dev), signature);
257 return 0;
258 }
259
260 /* get MAC address from EEPROM */
261 for (i = 0; i < 3; i++)
262 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
263
264 return 1;
265 }
266
267 /**
268 * sis630e_get_mac_addr - Get MAC address for SiS630E model
269 * @pci_dev: the sis900 pci device
270 * @net_dev: the net device to get address for
271 *
272 * SiS630E model, use APC CMOS RAM to store MAC address.
273 * APC CMOS RAM is accessed through ISA bridge.
274 * MAC address is read into @net_dev->dev_addr.
275 */
276
277 static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
278 struct net_device *net_dev)
279 {
280 struct pci_dev *isa_bridge = NULL;
281 u8 reg;
282 int i;
283
284 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
285 if (!isa_bridge)
286 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
287 if (!isa_bridge) {
288 printk(KERN_WARNING "%s: Can not find ISA bridge\n",
289 pci_name(pci_dev));
290 return 0;
291 }
292 pci_read_config_byte(isa_bridge, 0x48, &reg);
293 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
294
295 for (i = 0; i < 6; i++) {
296 outb(0x09 + i, 0x70);
297 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
298 }
299 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
300 pci_dev_put(isa_bridge);
301
302 return 1;
303 }
304
305
306 /**
307 * sis635_get_mac_addr - Get MAC address for SIS635 model
308 * @pci_dev: the sis900 pci device
309 * @net_dev: the net device to get address for
310 *
311 * SiS635 model, set MAC Reload Bit to load Mac address from APC
312 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
313 * @net_dev->dev_addr.
314 */
315
316 static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
317 struct net_device *net_dev)
318 {
319 long ioaddr = net_dev->base_addr;
320 u32 rfcrSave;
321 u32 i;
322
323 rfcrSave = inl(rfcr + ioaddr);
324
325 outl(rfcrSave | RELOAD, ioaddr + cr);
326 outl(0, ioaddr + cr);
327
328 /* disable packet filtering before setting filter */
329 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
330
331 /* load MAC addr to filter data register */
332 for (i = 0 ; i < 3 ; i++) {
333 outl((i << RFADDR_shift), ioaddr + rfcr);
334 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
335 }
336
337 /* enable packet filtering */
338 outl(rfcrSave | RFEN, rfcr + ioaddr);
339
340 return 1;
341 }
342
343 /**
344 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
345 * @pci_dev: the sis900 pci device
346 * @net_dev: the net device to get address for
347 *
348 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
349 * is shared by
350 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
351 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
352 * by LAN, otherwise is not. After MAC address is read from EEPROM, send
353 * EEDONE signal to refuse EEPROM access by LAN.
354 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
355 * The signature field in SiS962 or SiS963 spec is meaningless.
356 * MAC address is read into @net_dev->dev_addr.
357 */
358
359 static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
360 struct net_device *net_dev)
361 {
362 long ioaddr = net_dev->base_addr;
363 long ee_addr = ioaddr + mear;
364 u32 waittime = 0;
365 int i;
366
367 outl(EEREQ, ee_addr);
368 while(waittime < 2000) {
369 if(inl(ee_addr) & EEGNT) {
370
371 /* get MAC address from EEPROM */
372 for (i = 0; i < 3; i++)
373 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
374
375 outl(EEDONE, ee_addr);
376 return 1;
377 } else {
378 udelay(1);
379 waittime ++;
380 }
381 }
382 outl(EEDONE, ee_addr);
383 return 0;
384 }
385
386 /**
387 * sis900_probe - Probe for sis900 device
388 * @pci_dev: the sis900 pci device
389 * @pci_id: the pci device ID
390 *
391 * Check and probe sis900 net device for @pci_dev.
392 * Get mac address according to the chip revision,
393 * and assign SiS900-specific entries in the device structure.
394 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
395 */
396
397 static int __devinit sis900_probe(struct pci_dev *pci_dev,
398 const struct pci_device_id *pci_id)
399 {
400 struct sis900_private *sis_priv;
401 struct net_device *net_dev;
402 struct pci_dev *dev;
403 dma_addr_t ring_dma;
404 void *ring_space;
405 long ioaddr;
406 int i, ret;
407 const char *card_name = card_names[pci_id->driver_data];
408 const char *dev_name = pci_name(pci_dev);
409
410 /* when built into the kernel, we only print version if device is found */
411 #ifndef MODULE
412 static int printed_version;
413 if (!printed_version++)
414 printk(version);
415 #endif
416
417 /* setup various bits in PCI command register */
418 ret = pci_enable_device(pci_dev);
419 if(ret) return ret;
420
421 i = pci_set_dma_mask(pci_dev, DMA_32BIT_MASK);
422 if(i){
423 printk(KERN_ERR "sis900.c: architecture does not support"
424 "32bit PCI busmaster DMA\n");
425 return i;
426 }
427
428 pci_set_master(pci_dev);
429
430 net_dev = alloc_etherdev(sizeof(struct sis900_private));
431 if (!net_dev)
432 return -ENOMEM;
433 SET_MODULE_OWNER(net_dev);
434 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
435
436 /* We do a request_region() to register /proc/ioports info. */
437 ioaddr = pci_resource_start(pci_dev, 0);
438 ret = pci_request_regions(pci_dev, "sis900");
439 if (ret)
440 goto err_out;
441
442 sis_priv = net_dev->priv;
443 net_dev->base_addr = ioaddr;
444 net_dev->irq = pci_dev->irq;
445 sis_priv->pci_dev = pci_dev;
446 spin_lock_init(&sis_priv->lock);
447
448 pci_set_drvdata(pci_dev, net_dev);
449
450 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
451 if (!ring_space) {
452 ret = -ENOMEM;
453 goto err_out_cleardev;
454 }
455 sis_priv->tx_ring = (BufferDesc *)ring_space;
456 sis_priv->tx_ring_dma = ring_dma;
457
458 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
459 if (!ring_space) {
460 ret = -ENOMEM;
461 goto err_unmap_tx;
462 }
463 sis_priv->rx_ring = (BufferDesc *)ring_space;
464 sis_priv->rx_ring_dma = ring_dma;
465
466 /* The SiS900-specific entries in the device structure. */
467 net_dev->open = &sis900_open;
468 net_dev->hard_start_xmit = &sis900_start_xmit;
469 net_dev->stop = &sis900_close;
470 net_dev->get_stats = &sis900_get_stats;
471 net_dev->set_config = &sis900_set_config;
472 net_dev->set_multicast_list = &set_rx_mode;
473 net_dev->do_ioctl = &mii_ioctl;
474 net_dev->tx_timeout = sis900_tx_timeout;
475 net_dev->watchdog_timeo = TX_TIMEOUT;
476 net_dev->ethtool_ops = &sis900_ethtool_ops;
477
478 #ifdef CONFIG_NET_POLL_CONTROLLER
479 net_dev->poll_controller = &sis900_poll;
480 #endif
481
482 if (sis900_debug > 0)
483 sis_priv->msg_enable = sis900_debug;
484 else
485 sis_priv->msg_enable = SIS900_DEF_MSG;
486
487 sis_priv->mii_info.dev = net_dev;
488 sis_priv->mii_info.mdio_read = mdio_read;
489 sis_priv->mii_info.mdio_write = mdio_write;
490 sis_priv->mii_info.phy_id_mask = 0x1f;
491 sis_priv->mii_info.reg_num_mask = 0x1f;
492
493 /* Get Mac address according to the chip revision */
494 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &(sis_priv->chipset_rev));
495 if(netif_msg_probe(sis_priv))
496 printk(KERN_DEBUG "%s: detected revision %2.2x, "
497 "trying to get MAC address...\n",
498 dev_name, sis_priv->chipset_rev);
499
500 ret = 0;
501 if (sis_priv->chipset_rev == SIS630E_900_REV)
502 ret = sis630e_get_mac_addr(pci_dev, net_dev);
503 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
504 ret = sis635_get_mac_addr(pci_dev, net_dev);
505 else if (sis_priv->chipset_rev == SIS96x_900_REV)
506 ret = sis96x_get_mac_addr(pci_dev, net_dev);
507 else
508 ret = sis900_get_mac_addr(pci_dev, net_dev);
509
510 if (ret == 0) {
511 printk(KERN_WARNING "%s: Cannot read MAC address.\n", dev_name);
512 ret = -ENODEV;
513 goto err_unmap_rx;
514 }
515
516 /* 630ET : set the mii access mode as software-mode */
517 if (sis_priv->chipset_rev == SIS630ET_900_REV)
518 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
519
520 /* probe for mii transceiver */
521 if (sis900_mii_probe(net_dev) == 0) {
522 printk(KERN_WARNING "%s: Error probing MII device.\n",
523 dev_name);
524 ret = -ENODEV;
525 goto err_unmap_rx;
526 }
527
528 /* save our host bridge revision */
529 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
530 if (dev) {
531 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
532 pci_dev_put(dev);
533 }
534
535 ret = register_netdev(net_dev);
536 if (ret)
537 goto err_unmap_rx;
538
539 /* print some information about our NIC */
540 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, ", net_dev->name,
541 card_name, ioaddr, net_dev->irq);
542 for (i = 0; i < 5; i++)
543 printk("%2.2x:", (u8)net_dev->dev_addr[i]);
544 printk("%2.2x.\n", net_dev->dev_addr[i]);
545
546 /* Detect Wake on Lan support */
547 ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27;
548 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
549 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
550
551 return 0;
552
553 err_unmap_rx:
554 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
555 sis_priv->rx_ring_dma);
556 err_unmap_tx:
557 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
558 sis_priv->tx_ring_dma);
559 err_out_cleardev:
560 pci_set_drvdata(pci_dev, NULL);
561 pci_release_regions(pci_dev);
562 err_out:
563 free_netdev(net_dev);
564 return ret;
565 }
566
567 /**
568 * sis900_mii_probe - Probe MII PHY for sis900
569 * @net_dev: the net device to probe for
570 *
571 * Search for total of 32 possible mii phy addresses.
572 * Identify and set current phy if found one,
573 * return error if it failed to found.
574 */
575
576 static int __init sis900_mii_probe(struct net_device * net_dev)
577 {
578 struct sis900_private * sis_priv = net_dev->priv;
579 const char *dev_name = pci_name(sis_priv->pci_dev);
580 u16 poll_bit = MII_STAT_LINK, status = 0;
581 unsigned long timeout = jiffies + 5 * HZ;
582 int phy_addr;
583
584 sis_priv->mii = NULL;
585
586 /* search for total of 32 possible mii phy addresses */
587 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
588 struct mii_phy * mii_phy = NULL;
589 u16 mii_status;
590 int i;
591
592 mii_phy = NULL;
593 for(i = 0; i < 2; i++)
594 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
595
596 if (mii_status == 0xffff || mii_status == 0x0000) {
597 if (netif_msg_probe(sis_priv))
598 printk(KERN_DEBUG "%s: MII at address %d"
599 " not accessible\n",
600 dev_name, phy_addr);
601 continue;
602 }
603
604 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
605 printk(KERN_WARNING "Cannot allocate mem for struct mii_phy\n");
606 mii_phy = sis_priv->first_mii;
607 while (mii_phy) {
608 struct mii_phy *phy;
609 phy = mii_phy;
610 mii_phy = mii_phy->next;
611 kfree(phy);
612 }
613 return 0;
614 }
615
616 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
617 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
618 mii_phy->phy_addr = phy_addr;
619 mii_phy->status = mii_status;
620 mii_phy->next = sis_priv->mii;
621 sis_priv->mii = mii_phy;
622 sis_priv->first_mii = mii_phy;
623
624 for (i = 0; mii_chip_table[i].phy_id1; i++)
625 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
626 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
627 mii_phy->phy_types = mii_chip_table[i].phy_types;
628 if (mii_chip_table[i].phy_types == MIX)
629 mii_phy->phy_types =
630 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
631 printk(KERN_INFO "%s: %s transceiver found "
632 "at address %d.\n",
633 dev_name,
634 mii_chip_table[i].name,
635 phy_addr);
636 break;
637 }
638
639 if( !mii_chip_table[i].phy_id1 ) {
640 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
641 dev_name, phy_addr);
642 mii_phy->phy_types = UNKNOWN;
643 }
644 }
645
646 if (sis_priv->mii == NULL) {
647 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
648 return 0;
649 }
650
651 /* select default PHY for mac */
652 sis_priv->mii = NULL;
653 sis900_default_phy( net_dev );
654
655 /* Reset phy if default phy is internal sis900 */
656 if ((sis_priv->mii->phy_id0 == 0x001D) &&
657 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
658 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
659
660 /* workaround for ICS1893 PHY */
661 if ((sis_priv->mii->phy_id0 == 0x0015) &&
662 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
663 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
664
665 if(status & MII_STAT_LINK){
666 while (poll_bit) {
667 yield();
668
669 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
670 if (time_after_eq(jiffies, timeout)) {
671 printk(KERN_WARNING "%s: reset phy and link down now\n",
672 dev_name);
673 return -ETIME;
674 }
675 }
676 }
677
678 if (sis_priv->chipset_rev == SIS630E_900_REV) {
679 /* SiS 630E has some bugs on default value of PHY registers */
680 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
681 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
682 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
683 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
684 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
685 }
686
687 if (sis_priv->mii->status & MII_STAT_LINK)
688 netif_carrier_on(net_dev);
689 else
690 netif_carrier_off(net_dev);
691
692 return 1;
693 }
694
695 /**
696 * sis900_default_phy - Select default PHY for sis900 mac.
697 * @net_dev: the net device to probe for
698 *
699 * Select first detected PHY with link as default.
700 * If no one is link on, select PHY whose types is HOME as default.
701 * If HOME doesn't exist, select LAN.
702 */
703
704 static u16 sis900_default_phy(struct net_device * net_dev)
705 {
706 struct sis900_private * sis_priv = net_dev->priv;
707 struct mii_phy *phy = NULL, *phy_home = NULL,
708 *default_phy = NULL, *phy_lan = NULL;
709 u16 status;
710
711 for (phy=sis_priv->first_mii; phy; phy=phy->next) {
712 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
713 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
714
715 /* Link ON & Not select default PHY & not ghost PHY */
716 if ((status & MII_STAT_LINK) && !default_phy &&
717 (phy->phy_types != UNKNOWN))
718 default_phy = phy;
719 else {
720 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
721 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
722 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
723 if (phy->phy_types == HOME)
724 phy_home = phy;
725 else if(phy->phy_types == LAN)
726 phy_lan = phy;
727 }
728 }
729
730 if (!default_phy && phy_home)
731 default_phy = phy_home;
732 else if (!default_phy && phy_lan)
733 default_phy = phy_lan;
734 else if (!default_phy)
735 default_phy = sis_priv->first_mii;
736
737 if (sis_priv->mii != default_phy) {
738 sis_priv->mii = default_phy;
739 sis_priv->cur_phy = default_phy->phy_addr;
740 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
741 pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
742 }
743
744 sis_priv->mii_info.phy_id = sis_priv->cur_phy;
745
746 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
747 status &= (~MII_CNTL_ISOLATE);
748
749 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
750 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
751 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
752
753 return status;
754 }
755
756
757 /**
758 * sis900_set_capability - set the media capability of network adapter.
759 * @net_dev : the net device to probe for
760 * @phy : default PHY
761 *
762 * Set the media capability of network adapter according to
763 * mii status register. It's necessary before auto-negotiate.
764 */
765
766 static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
767 {
768 u16 cap;
769 u16 status;
770
771 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
772 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
773
774 cap = MII_NWAY_CSMA_CD |
775 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
776 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
777 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
778 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
779
780 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
781 }
782
783
784 /* Delay between EEPROM clock transitions. */
785 #define eeprom_delay() inl(ee_addr)
786
787 /**
788 * read_eeprom - Read Serial EEPROM
789 * @ioaddr: base i/o address
790 * @location: the EEPROM location to read
791 *
792 * Read Serial EEPROM through EEPROM Access Register.
793 * Note that location is in word (16 bits) unit
794 */
795
796 static u16 __devinit read_eeprom(long ioaddr, int location)
797 {
798 int i;
799 u16 retval = 0;
800 long ee_addr = ioaddr + mear;
801 u32 read_cmd = location | EEread;
802
803 outl(0, ee_addr);
804 eeprom_delay();
805 outl(EECS, ee_addr);
806 eeprom_delay();
807
808 /* Shift the read command (9) bits out. */
809 for (i = 8; i >= 0; i--) {
810 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
811 outl(dataval, ee_addr);
812 eeprom_delay();
813 outl(dataval | EECLK, ee_addr);
814 eeprom_delay();
815 }
816 outl(EECS, ee_addr);
817 eeprom_delay();
818
819 /* read the 16-bits data in */
820 for (i = 16; i > 0; i--) {
821 outl(EECS, ee_addr);
822 eeprom_delay();
823 outl(EECS | EECLK, ee_addr);
824 eeprom_delay();
825 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
826 eeprom_delay();
827 }
828
829 /* Terminate the EEPROM access. */
830 outl(0, ee_addr);
831 eeprom_delay();
832
833 return (retval);
834 }
835
836 /* Read and write the MII management registers using software-generated
837 serial MDIO protocol. Note that the command bits and data bits are
838 send out separately */
839 #define mdio_delay() inl(mdio_addr)
840
841 static void mdio_idle(long mdio_addr)
842 {
843 outl(MDIO | MDDIR, mdio_addr);
844 mdio_delay();
845 outl(MDIO | MDDIR | MDC, mdio_addr);
846 }
847
848 /* Syncronize the MII management interface by shifting 32 one bits out. */
849 static void mdio_reset(long mdio_addr)
850 {
851 int i;
852
853 for (i = 31; i >= 0; i--) {
854 outl(MDDIR | MDIO, mdio_addr);
855 mdio_delay();
856 outl(MDDIR | MDIO | MDC, mdio_addr);
857 mdio_delay();
858 }
859 return;
860 }
861
862 /**
863 * mdio_read - read MII PHY register
864 * @net_dev: the net device to read
865 * @phy_id: the phy address to read
866 * @location: the phy regiester id to read
867 *
868 * Read MII registers through MDIO and MDC
869 * using MDIO management frame structure and protocol(defined by ISO/IEC).
870 * Please see SiS7014 or ICS spec
871 */
872
873 static int mdio_read(struct net_device *net_dev, int phy_id, int location)
874 {
875 long mdio_addr = net_dev->base_addr + mear;
876 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
877 u16 retval = 0;
878 int i;
879
880 mdio_reset(mdio_addr);
881 mdio_idle(mdio_addr);
882
883 for (i = 15; i >= 0; i--) {
884 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
885 outl(dataval, mdio_addr);
886 mdio_delay();
887 outl(dataval | MDC, mdio_addr);
888 mdio_delay();
889 }
890
891 /* Read the 16 data bits. */
892 for (i = 16; i > 0; i--) {
893 outl(0, mdio_addr);
894 mdio_delay();
895 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
896 outl(MDC, mdio_addr);
897 mdio_delay();
898 }
899 outl(0x00, mdio_addr);
900
901 return retval;
902 }
903
904 /**
905 * mdio_write - write MII PHY register
906 * @net_dev: the net device to write
907 * @phy_id: the phy address to write
908 * @location: the phy regiester id to write
909 * @value: the register value to write with
910 *
911 * Write MII registers with @value through MDIO and MDC
912 * using MDIO management frame structure and protocol(defined by ISO/IEC)
913 * please see SiS7014 or ICS spec
914 */
915
916 static void mdio_write(struct net_device *net_dev, int phy_id, int location,
917 int value)
918 {
919 long mdio_addr = net_dev->base_addr + mear;
920 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
921 int i;
922
923 mdio_reset(mdio_addr);
924 mdio_idle(mdio_addr);
925
926 /* Shift the command bits out. */
927 for (i = 15; i >= 0; i--) {
928 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
929 outb(dataval, mdio_addr);
930 mdio_delay();
931 outb(dataval | MDC, mdio_addr);
932 mdio_delay();
933 }
934 mdio_delay();
935
936 /* Shift the value bits out. */
937 for (i = 15; i >= 0; i--) {
938 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
939 outl(dataval, mdio_addr);
940 mdio_delay();
941 outl(dataval | MDC, mdio_addr);
942 mdio_delay();
943 }
944 mdio_delay();
945
946 /* Clear out extra bits. */
947 for (i = 2; i > 0; i--) {
948 outb(0, mdio_addr);
949 mdio_delay();
950 outb(MDC, mdio_addr);
951 mdio_delay();
952 }
953 outl(0x00, mdio_addr);
954
955 return;
956 }
957
958
959 /**
960 * sis900_reset_phy - reset sis900 mii phy.
961 * @net_dev: the net device to write
962 * @phy_addr: default phy address
963 *
964 * Some specific phy can't work properly without reset.
965 * This function will be called during initialization and
966 * link status change from ON to DOWN.
967 */
968
969 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
970 {
971 int i;
972 u16 status;
973
974 for (i = 0; i < 2; i++)
975 status = mdio_read(net_dev, phy_addr, MII_STATUS);
976
977 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
978
979 return status;
980 }
981
982 #ifdef CONFIG_NET_POLL_CONTROLLER
983 /*
984 * Polling 'interrupt' - used by things like netconsole to send skbs
985 * without having to re-enable interrupts. It's not called while
986 * the interrupt routine is executing.
987 */
988 static void sis900_poll(struct net_device *dev)
989 {
990 disable_irq(dev->irq);
991 sis900_interrupt(dev->irq, dev);
992 enable_irq(dev->irq);
993 }
994 #endif
995
996 /**
997 * sis900_open - open sis900 device
998 * @net_dev: the net device to open
999 *
1000 * Do some initialization and start net interface.
1001 * enable interrupts and set sis900 timer.
1002 */
1003
1004 static int
1005 sis900_open(struct net_device *net_dev)
1006 {
1007 struct sis900_private *sis_priv = net_dev->priv;
1008 long ioaddr = net_dev->base_addr;
1009 int ret;
1010
1011 /* Soft reset the chip. */
1012 sis900_reset(net_dev);
1013
1014 /* Equalizer workaround Rule */
1015 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1016
1017 ret = request_irq(net_dev->irq, &sis900_interrupt, IRQF_SHARED,
1018 net_dev->name, net_dev);
1019 if (ret)
1020 return ret;
1021
1022 sis900_init_rxfilter(net_dev);
1023
1024 sis900_init_tx_ring(net_dev);
1025 sis900_init_rx_ring(net_dev);
1026
1027 set_rx_mode(net_dev);
1028
1029 netif_start_queue(net_dev);
1030
1031 /* Workaround for EDB */
1032 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1033
1034 /* Enable all known interrupts by setting the interrupt mask. */
1035 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1036 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
1037 outl(IE, ioaddr + ier);
1038
1039 sis900_check_mode(net_dev, sis_priv->mii);
1040
1041 /* Set the timer to switch to check for link beat and perhaps switch
1042 to an alternate media type. */
1043 init_timer(&sis_priv->timer);
1044 sis_priv->timer.expires = jiffies + HZ;
1045 sis_priv->timer.data = (unsigned long)net_dev;
1046 sis_priv->timer.function = &sis900_timer;
1047 add_timer(&sis_priv->timer);
1048
1049 return 0;
1050 }
1051
1052 /**
1053 * sis900_init_rxfilter - Initialize the Rx filter
1054 * @net_dev: the net device to initialize for
1055 *
1056 * Set receive filter address to our MAC address
1057 * and enable packet filtering.
1058 */
1059
1060 static void
1061 sis900_init_rxfilter (struct net_device * net_dev)
1062 {
1063 struct sis900_private *sis_priv = net_dev->priv;
1064 long ioaddr = net_dev->base_addr;
1065 u32 rfcrSave;
1066 u32 i;
1067
1068 rfcrSave = inl(rfcr + ioaddr);
1069
1070 /* disable packet filtering before setting filter */
1071 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
1072
1073 /* load MAC addr to filter data register */
1074 for (i = 0 ; i < 3 ; i++) {
1075 u32 w;
1076
1077 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1078 outl((i << RFADDR_shift), ioaddr + rfcr);
1079 outl(w, ioaddr + rfdr);
1080
1081 if (netif_msg_hw(sis_priv)) {
1082 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1083 net_dev->name, i, inl(ioaddr + rfdr));
1084 }
1085 }
1086
1087 /* enable packet filtering */
1088 outl(rfcrSave | RFEN, rfcr + ioaddr);
1089 }
1090
1091 /**
1092 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1093 * @net_dev: the net device to initialize for
1094 *
1095 * Initialize the Tx descriptor ring,
1096 */
1097
1098 static void
1099 sis900_init_tx_ring(struct net_device *net_dev)
1100 {
1101 struct sis900_private *sis_priv = net_dev->priv;
1102 long ioaddr = net_dev->base_addr;
1103 int i;
1104
1105 sis_priv->tx_full = 0;
1106 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1107
1108 for (i = 0; i < NUM_TX_DESC; i++) {
1109 sis_priv->tx_skbuff[i] = NULL;
1110
1111 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1112 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1113 sis_priv->tx_ring[i].cmdsts = 0;
1114 sis_priv->tx_ring[i].bufptr = 0;
1115 }
1116
1117 /* load Transmit Descriptor Register */
1118 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1119 if (netif_msg_hw(sis_priv))
1120 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1121 net_dev->name, inl(ioaddr + txdp));
1122 }
1123
1124 /**
1125 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1126 * @net_dev: the net device to initialize for
1127 *
1128 * Initialize the Rx descriptor ring,
1129 * and pre-allocate recevie buffers (socket buffer)
1130 */
1131
1132 static void
1133 sis900_init_rx_ring(struct net_device *net_dev)
1134 {
1135 struct sis900_private *sis_priv = net_dev->priv;
1136 long ioaddr = net_dev->base_addr;
1137 int i;
1138
1139 sis_priv->cur_rx = 0;
1140 sis_priv->dirty_rx = 0;
1141
1142 /* init RX descriptor */
1143 for (i = 0; i < NUM_RX_DESC; i++) {
1144 sis_priv->rx_skbuff[i] = NULL;
1145
1146 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1147 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1148 sis_priv->rx_ring[i].cmdsts = 0;
1149 sis_priv->rx_ring[i].bufptr = 0;
1150 }
1151
1152 /* allocate sock buffers */
1153 for (i = 0; i < NUM_RX_DESC; i++) {
1154 struct sk_buff *skb;
1155
1156 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1157 /* not enough memory for skbuff, this makes a "hole"
1158 on the buffer ring, it is not clear how the
1159 hardware will react to this kind of degenerated
1160 buffer */
1161 break;
1162 }
1163 skb->dev = net_dev;
1164 sis_priv->rx_skbuff[i] = skb;
1165 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1166 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
1167 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1168 }
1169 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1170
1171 /* load Receive Descriptor Register */
1172 outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1173 if (netif_msg_hw(sis_priv))
1174 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1175 net_dev->name, inl(ioaddr + rxdp));
1176 }
1177
1178 /**
1179 * sis630_set_eq - set phy equalizer value for 630 LAN
1180 * @net_dev: the net device to set equalizer value
1181 * @revision: 630 LAN revision number
1182 *
1183 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1184 * PHY register 14h(Test)
1185 * Bit 14: 0 -- Automatically dectect (default)
1186 * 1 -- Manually set Equalizer filter
1187 * Bit 13: 0 -- (Default)
1188 * 1 -- Speed up convergence of equalizer setting
1189 * Bit 9 : 0 -- (Default)
1190 * 1 -- Disable Baseline Wander
1191 * Bit 3~7 -- Equalizer filter setting
1192 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1193 * Then calculate equalizer value
1194 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1195 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1196 * Calculate Equalizer value:
1197 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-dectect proper equalizer value.
1198 * When the equalizer is stable, this value is not a fixed value. It will be within
1199 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1200 * 0 <= max <= 4 --> set equalizer to max
1201 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1202 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1203 */
1204
1205 static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1206 {
1207 struct sis900_private *sis_priv = net_dev->priv;
1208 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1209 int i, maxcount=10;
1210
1211 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1212 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1213 return;
1214
1215 if (netif_carrier_ok(net_dev)) {
1216 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1217 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1218 (0x2200 | reg14h) & 0xBFFF);
1219 for (i=0; i < maxcount; i++) {
1220 eq_value = (0x00F8 & mdio_read(net_dev,
1221 sis_priv->cur_phy, MII_RESV)) >> 3;
1222 if (i == 0)
1223 max_value=min_value=eq_value;
1224 max_value = (eq_value > max_value) ?
1225 eq_value : max_value;
1226 min_value = (eq_value < min_value) ?
1227 eq_value : min_value;
1228 }
1229 /* 630E rule to determine the equalizer value */
1230 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1231 revision == SIS630ET_900_REV) {
1232 if (max_value < 5)
1233 eq_value = max_value;
1234 else if (max_value >= 5 && max_value < 15)
1235 eq_value = (max_value == min_value) ?
1236 max_value+2 : max_value+1;
1237 else if (max_value >= 15)
1238 eq_value=(max_value == min_value) ?
1239 max_value+6 : max_value+5;
1240 }
1241 /* 630B0&B1 rule to determine the equalizer value */
1242 if (revision == SIS630A_900_REV &&
1243 (sis_priv->host_bridge_rev == SIS630B0 ||
1244 sis_priv->host_bridge_rev == SIS630B1)) {
1245 if (max_value == 0)
1246 eq_value = 3;
1247 else
1248 eq_value = (max_value + min_value + 1)/2;
1249 }
1250 /* write equalizer value and setting */
1251 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1252 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1253 reg14h = (reg14h | 0x6000) & 0xFDFF;
1254 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1255 } else {
1256 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1257 if (revision == SIS630A_900_REV &&
1258 (sis_priv->host_bridge_rev == SIS630B0 ||
1259 sis_priv->host_bridge_rev == SIS630B1))
1260 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1261 (reg14h | 0x2200) & 0xBFFF);
1262 else
1263 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1264 (reg14h | 0x2000) & 0xBFFF);
1265 }
1266 return;
1267 }
1268
1269 /**
1270 * sis900_timer - sis900 timer routine
1271 * @data: pointer to sis900 net device
1272 *
1273 * On each timer ticks we check two things,
1274 * link status (ON/OFF) and link mode (10/100/Full/Half)
1275 */
1276
1277 static void sis900_timer(unsigned long data)
1278 {
1279 struct net_device *net_dev = (struct net_device *)data;
1280 struct sis900_private *sis_priv = net_dev->priv;
1281 struct mii_phy *mii_phy = sis_priv->mii;
1282 static const int next_tick = 5*HZ;
1283 u16 status;
1284
1285 if (!sis_priv->autong_complete){
1286 int speed, duplex = 0;
1287
1288 sis900_read_mode(net_dev, &speed, &duplex);
1289 if (duplex){
1290 sis900_set_mode(net_dev->base_addr, speed, duplex);
1291 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1292 netif_start_queue(net_dev);
1293 }
1294
1295 sis_priv->timer.expires = jiffies + HZ;
1296 add_timer(&sis_priv->timer);
1297 return;
1298 }
1299
1300 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1301 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1302
1303 /* Link OFF -> ON */
1304 if (!netif_carrier_ok(net_dev)) {
1305 LookForLink:
1306 /* Search for new PHY */
1307 status = sis900_default_phy(net_dev);
1308 mii_phy = sis_priv->mii;
1309
1310 if (status & MII_STAT_LINK){
1311 sis900_check_mode(net_dev, mii_phy);
1312 netif_carrier_on(net_dev);
1313 }
1314 } else {
1315 /* Link ON -> OFF */
1316 if (!(status & MII_STAT_LINK)){
1317 netif_carrier_off(net_dev);
1318 if(netif_msg_link(sis_priv))
1319 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1320
1321 /* Change mode issue */
1322 if ((mii_phy->phy_id0 == 0x001D) &&
1323 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1324 sis900_reset_phy(net_dev, sis_priv->cur_phy);
1325
1326 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1327
1328 goto LookForLink;
1329 }
1330 }
1331
1332 sis_priv->timer.expires = jiffies + next_tick;
1333 add_timer(&sis_priv->timer);
1334 }
1335
1336 /**
1337 * sis900_check_mode - check the media mode for sis900
1338 * @net_dev: the net device to be checked
1339 * @mii_phy: the mii phy
1340 *
1341 * Older driver gets the media mode from mii status output
1342 * register. Now we set our media capability and auto-negotiate
1343 * to get the upper bound of speed and duplex between two ends.
1344 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1345 * and autong_complete should be set to 1.
1346 */
1347
1348 static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1349 {
1350 struct sis900_private *sis_priv = net_dev->priv;
1351 long ioaddr = net_dev->base_addr;
1352 int speed, duplex;
1353
1354 if (mii_phy->phy_types == LAN) {
1355 outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg);
1356 sis900_set_capability(net_dev , mii_phy);
1357 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1358 } else {
1359 outl(EXD | inl(ioaddr + cfg), ioaddr + cfg);
1360 speed = HW_SPEED_HOME;
1361 duplex = FDX_CAPABLE_HALF_SELECTED;
1362 sis900_set_mode(ioaddr, speed, duplex);
1363 sis_priv->autong_complete = 1;
1364 }
1365 }
1366
1367 /**
1368 * sis900_set_mode - Set the media mode of mac register.
1369 * @ioaddr: the address of the device
1370 * @speed : the transmit speed to be determined
1371 * @duplex: the duplex mode to be determined
1372 *
1373 * Set the media mode of mac register txcfg/rxcfg according to
1374 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1375 * bus is used instead of PCI bus. When this bit is set 1, the
1376 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1377 * double words.
1378 */
1379
1380 static void sis900_set_mode (long ioaddr, int speed, int duplex)
1381 {
1382 u32 tx_flags = 0, rx_flags = 0;
1383
1384 if (inl(ioaddr + cfg) & EDB_MASTER_EN) {
1385 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1386 (TX_FILL_THRESH << TxFILLT_shift);
1387 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1388 } else {
1389 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1390 (TX_FILL_THRESH << TxFILLT_shift);
1391 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1392 }
1393
1394 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1395 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1396 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1397 } else {
1398 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1399 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1400 }
1401
1402 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1403 tx_flags |= (TxCSI | TxHBI);
1404 rx_flags |= RxATX;
1405 }
1406
1407 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1408 /* Can accept Jumbo packet */
1409 rx_flags |= RxAJAB;
1410 #endif
1411
1412 outl (tx_flags, ioaddr + txcfg);
1413 outl (rx_flags, ioaddr + rxcfg);
1414 }
1415
1416 /**
1417 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1418 * @net_dev: the net device to read mode for
1419 * @phy_addr: mii phy address
1420 *
1421 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1422 * autong_complete should be set to 0 when starting auto-negotiation.
1423 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1424 * sis900_timer will wait for link on again if autong_complete = 0.
1425 */
1426
1427 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1428 {
1429 struct sis900_private *sis_priv = net_dev->priv;
1430 int i = 0;
1431 u32 status;
1432
1433 for (i = 0; i < 2; i++)
1434 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1435
1436 if (!(status & MII_STAT_LINK)){
1437 if(netif_msg_link(sis_priv))
1438 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1439 sis_priv->autong_complete = 1;
1440 netif_carrier_off(net_dev);
1441 return;
1442 }
1443
1444 /* (Re)start AutoNegotiate */
1445 mdio_write(net_dev, phy_addr, MII_CONTROL,
1446 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1447 sis_priv->autong_complete = 0;
1448 }
1449
1450
1451 /**
1452 * sis900_read_mode - read media mode for sis900 internal phy
1453 * @net_dev: the net device to read mode for
1454 * @speed : the transmit speed to be determined
1455 * @duplex : the duplex mode to be determined
1456 *
1457 * The capability of remote end will be put in mii register autorec
1458 * after auto-negotiation. Use AND operation to get the upper bound
1459 * of speed and duplex between two ends.
1460 */
1461
1462 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1463 {
1464 struct sis900_private *sis_priv = net_dev->priv;
1465 struct mii_phy *phy = sis_priv->mii;
1466 int phy_addr = sis_priv->cur_phy;
1467 u32 status;
1468 u16 autoadv, autorec;
1469 int i;
1470
1471 for (i = 0; i < 2; i++)
1472 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1473
1474 if (!(status & MII_STAT_LINK))
1475 return;
1476
1477 /* AutoNegotiate completed */
1478 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1479 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1480 status = autoadv & autorec;
1481
1482 *speed = HW_SPEED_10_MBPS;
1483 *duplex = FDX_CAPABLE_HALF_SELECTED;
1484
1485 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1486 *speed = HW_SPEED_100_MBPS;
1487 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1488 *duplex = FDX_CAPABLE_FULL_SELECTED;
1489
1490 sis_priv->autong_complete = 1;
1491
1492 /* Workaround for Realtek RTL8201 PHY issue */
1493 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1494 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1495 *duplex = FDX_CAPABLE_FULL_SELECTED;
1496 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1497 *speed = HW_SPEED_100_MBPS;
1498 }
1499
1500 if(netif_msg_link(sis_priv))
1501 printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1502 net_dev->name,
1503 *speed == HW_SPEED_100_MBPS ?
1504 "100mbps" : "10mbps",
1505 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1506 "full" : "half");
1507 }
1508
1509 /**
1510 * sis900_tx_timeout - sis900 transmit timeout routine
1511 * @net_dev: the net device to transmit
1512 *
1513 * print transmit timeout status
1514 * disable interrupts and do some tasks
1515 */
1516
1517 static void sis900_tx_timeout(struct net_device *net_dev)
1518 {
1519 struct sis900_private *sis_priv = net_dev->priv;
1520 long ioaddr = net_dev->base_addr;
1521 unsigned long flags;
1522 int i;
1523
1524 if(netif_msg_tx_err(sis_priv))
1525 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n",
1526 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1527
1528 /* Disable interrupts by clearing the interrupt mask. */
1529 outl(0x0000, ioaddr + imr);
1530
1531 /* use spinlock to prevent interrupt handler accessing buffer ring */
1532 spin_lock_irqsave(&sis_priv->lock, flags);
1533
1534 /* discard unsent packets */
1535 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1536 for (i = 0; i < NUM_TX_DESC; i++) {
1537 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1538
1539 if (skb) {
1540 pci_unmap_single(sis_priv->pci_dev,
1541 sis_priv->tx_ring[i].bufptr, skb->len,
1542 PCI_DMA_TODEVICE);
1543 dev_kfree_skb_irq(skb);
1544 sis_priv->tx_skbuff[i] = NULL;
1545 sis_priv->tx_ring[i].cmdsts = 0;
1546 sis_priv->tx_ring[i].bufptr = 0;
1547 sis_priv->stats.tx_dropped++;
1548 }
1549 }
1550 sis_priv->tx_full = 0;
1551 netif_wake_queue(net_dev);
1552
1553 spin_unlock_irqrestore(&sis_priv->lock, flags);
1554
1555 net_dev->trans_start = jiffies;
1556
1557 /* load Transmit Descriptor Register */
1558 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1559
1560 /* Enable all known interrupts by setting the interrupt mask. */
1561 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1562 return;
1563 }
1564
1565 /**
1566 * sis900_start_xmit - sis900 start transmit routine
1567 * @skb: socket buffer pointer to put the data being transmitted
1568 * @net_dev: the net device to transmit with
1569 *
1570 * Set the transmit buffer descriptor,
1571 * and write TxENA to enable transmit state machine.
1572 * tell upper layer if the buffer is full
1573 */
1574
1575 static int
1576 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1577 {
1578 struct sis900_private *sis_priv = net_dev->priv;
1579 long ioaddr = net_dev->base_addr;
1580 unsigned int entry;
1581 unsigned long flags;
1582 unsigned int index_cur_tx, index_dirty_tx;
1583 unsigned int count_dirty_tx;
1584
1585 /* Don't transmit data before the complete of auto-negotiation */
1586 if(!sis_priv->autong_complete){
1587 netif_stop_queue(net_dev);
1588 return 1;
1589 }
1590
1591 spin_lock_irqsave(&sis_priv->lock, flags);
1592
1593 /* Calculate the next Tx descriptor entry. */
1594 entry = sis_priv->cur_tx % NUM_TX_DESC;
1595 sis_priv->tx_skbuff[entry] = skb;
1596
1597 /* set the transmit buffer descriptor and enable Transmit State Machine */
1598 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1599 skb->data, skb->len, PCI_DMA_TODEVICE);
1600 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1601 outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1602
1603 sis_priv->cur_tx ++;
1604 index_cur_tx = sis_priv->cur_tx;
1605 index_dirty_tx = sis_priv->dirty_tx;
1606
1607 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1608 count_dirty_tx ++;
1609
1610 if (index_cur_tx == index_dirty_tx) {
1611 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1612 sis_priv->tx_full = 1;
1613 netif_stop_queue(net_dev);
1614 } else if (count_dirty_tx < NUM_TX_DESC) {
1615 /* Typical path, tell upper layer that more transmission is possible */
1616 netif_start_queue(net_dev);
1617 } else {
1618 /* buffer full, tell upper layer no more transmission */
1619 sis_priv->tx_full = 1;
1620 netif_stop_queue(net_dev);
1621 }
1622
1623 spin_unlock_irqrestore(&sis_priv->lock, flags);
1624
1625 net_dev->trans_start = jiffies;
1626
1627 if (netif_msg_tx_queued(sis_priv))
1628 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1629 "to slot %d.\n",
1630 net_dev->name, skb->data, (int)skb->len, entry);
1631
1632 return 0;
1633 }
1634
1635 /**
1636 * sis900_interrupt - sis900 interrupt handler
1637 * @irq: the irq number
1638 * @dev_instance: the client data object
1639 * @regs: snapshot of processor context
1640 *
1641 * The interrupt handler does all of the Rx thread work,
1642 * and cleans up after the Tx thread
1643 */
1644
1645 static irqreturn_t sis900_interrupt(int irq, void *dev_instance)
1646 {
1647 struct net_device *net_dev = dev_instance;
1648 struct sis900_private *sis_priv = net_dev->priv;
1649 int boguscnt = max_interrupt_work;
1650 long ioaddr = net_dev->base_addr;
1651 u32 status;
1652 unsigned int handled = 0;
1653
1654 spin_lock (&sis_priv->lock);
1655
1656 do {
1657 status = inl(ioaddr + isr);
1658
1659 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1660 /* nothing intresting happened */
1661 break;
1662 handled = 1;
1663
1664 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1665 if (status & (RxORN | RxERR | RxOK))
1666 /* Rx interrupt */
1667 sis900_rx(net_dev);
1668
1669 if (status & (TxURN | TxERR | TxIDLE))
1670 /* Tx interrupt */
1671 sis900_finish_xmit(net_dev);
1672
1673 /* something strange happened !!! */
1674 if (status & HIBERR) {
1675 if(netif_msg_intr(sis_priv))
1676 printk(KERN_INFO "%s: Abnormal interrupt,"
1677 "status %#8.8x.\n", net_dev->name, status);
1678 break;
1679 }
1680 if (--boguscnt < 0) {
1681 if(netif_msg_intr(sis_priv))
1682 printk(KERN_INFO "%s: Too much work at interrupt, "
1683 "interrupt status = %#8.8x.\n",
1684 net_dev->name, status);
1685 break;
1686 }
1687 } while (1);
1688
1689 if(netif_msg_intr(sis_priv))
1690 printk(KERN_DEBUG "%s: exiting interrupt, "
1691 "interrupt status = 0x%#8.8x.\n",
1692 net_dev->name, inl(ioaddr + isr));
1693
1694 spin_unlock (&sis_priv->lock);
1695 return IRQ_RETVAL(handled);
1696 }
1697
1698 /**
1699 * sis900_rx - sis900 receive routine
1700 * @net_dev: the net device which receives data
1701 *
1702 * Process receive interrupt events,
1703 * put buffer to higher layer and refill buffer pool
1704 * Note: This function is called by interrupt handler,
1705 * don't do "too much" work here
1706 */
1707
1708 static int sis900_rx(struct net_device *net_dev)
1709 {
1710 struct sis900_private *sis_priv = net_dev->priv;
1711 long ioaddr = net_dev->base_addr;
1712 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1713 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1714 int rx_work_limit;
1715
1716 if (netif_msg_rx_status(sis_priv))
1717 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1718 "status:0x%8.8x\n",
1719 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1720 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1721
1722 while (rx_status & OWN) {
1723 unsigned int rx_size;
1724 unsigned int data_size;
1725
1726 if (--rx_work_limit < 0)
1727 break;
1728
1729 data_size = rx_status & DSIZE;
1730 rx_size = data_size - CRC_SIZE;
1731
1732 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1733 /* ``TOOLONG'' flag means jumbo packet recived. */
1734 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE)
1735 rx_status &= (~ ((unsigned int)TOOLONG));
1736 #endif
1737
1738 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1739 /* corrupted packet received */
1740 if (netif_msg_rx_err(sis_priv))
1741 printk(KERN_DEBUG "%s: Corrupted packet "
1742 "received, buffer status = 0x%8.8x/%d.\n",
1743 net_dev->name, rx_status, data_size);
1744 sis_priv->stats.rx_errors++;
1745 if (rx_status & OVERRUN)
1746 sis_priv->stats.rx_over_errors++;
1747 if (rx_status & (TOOLONG|RUNT))
1748 sis_priv->stats.rx_length_errors++;
1749 if (rx_status & (RXISERR | FAERR))
1750 sis_priv->stats.rx_frame_errors++;
1751 if (rx_status & CRCERR)
1752 sis_priv->stats.rx_crc_errors++;
1753 /* reset buffer descriptor state */
1754 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1755 } else {
1756 struct sk_buff * skb;
1757
1758 pci_unmap_single(sis_priv->pci_dev,
1759 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1760 PCI_DMA_FROMDEVICE);
1761
1762 /* refill the Rx buffer, what if there is not enought
1763 * memory for new socket buffer ?? */
1764 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1765 /*
1766 * Not enough memory to refill the buffer
1767 * so we need to recycle the old one so
1768 * as to avoid creating a memory hole
1769 * in the rx ring
1770 */
1771 skb = sis_priv->rx_skbuff[entry];
1772 sis_priv->stats.rx_dropped++;
1773 goto refill_rx_ring;
1774 }
1775
1776 /* This situation should never happen, but due to
1777 some unknow bugs, it is possible that
1778 we are working on NULL sk_buff :-( */
1779 if (sis_priv->rx_skbuff[entry] == NULL) {
1780 if (netif_msg_rx_err(sis_priv))
1781 printk(KERN_WARNING "%s: NULL pointer "
1782 "encountered in Rx ring\n"
1783 "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1784 net_dev->name, sis_priv->cur_rx,
1785 sis_priv->dirty_rx);
1786 break;
1787 }
1788
1789 /* give the socket buffer to upper layers */
1790 skb = sis_priv->rx_skbuff[entry];
1791 skb_put(skb, rx_size);
1792 skb->protocol = eth_type_trans(skb, net_dev);
1793 netif_rx(skb);
1794
1795 /* some network statistics */
1796 if ((rx_status & BCAST) == MCAST)
1797 sis_priv->stats.multicast++;
1798 net_dev->last_rx = jiffies;
1799 sis_priv->stats.rx_bytes += rx_size;
1800 sis_priv->stats.rx_packets++;
1801 sis_priv->dirty_rx++;
1802 refill_rx_ring:
1803 skb->dev = net_dev;
1804 sis_priv->rx_skbuff[entry] = skb;
1805 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1806 sis_priv->rx_ring[entry].bufptr =
1807 pci_map_single(sis_priv->pci_dev, skb->data,
1808 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1809 }
1810 sis_priv->cur_rx++;
1811 entry = sis_priv->cur_rx % NUM_RX_DESC;
1812 rx_status = sis_priv->rx_ring[entry].cmdsts;
1813 } // while
1814
1815 /* refill the Rx buffer, what if the rate of refilling is slower
1816 * than consuming ?? */
1817 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1818 struct sk_buff *skb;
1819
1820 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1821
1822 if (sis_priv->rx_skbuff[entry] == NULL) {
1823 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1824 /* not enough memory for skbuff, this makes a
1825 * "hole" on the buffer ring, it is not clear
1826 * how the hardware will react to this kind
1827 * of degenerated buffer */
1828 if (netif_msg_rx_err(sis_priv))
1829 printk(KERN_INFO "%s: Memory squeeze,"
1830 "deferring packet.\n",
1831 net_dev->name);
1832 sis_priv->stats.rx_dropped++;
1833 break;
1834 }
1835 skb->dev = net_dev;
1836 sis_priv->rx_skbuff[entry] = skb;
1837 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1838 sis_priv->rx_ring[entry].bufptr =
1839 pci_map_single(sis_priv->pci_dev, skb->data,
1840 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1841 }
1842 }
1843 /* re-enable the potentially idle receive state matchine */
1844 outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
1845
1846 return 0;
1847 }
1848
1849 /**
1850 * sis900_finish_xmit - finish up transmission of packets
1851 * @net_dev: the net device to be transmitted on
1852 *
1853 * Check for error condition and free socket buffer etc
1854 * schedule for more transmission as needed
1855 * Note: This function is called by interrupt handler,
1856 * don't do "too much" work here
1857 */
1858
1859 static void sis900_finish_xmit (struct net_device *net_dev)
1860 {
1861 struct sis900_private *sis_priv = net_dev->priv;
1862
1863 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1864 struct sk_buff *skb;
1865 unsigned int entry;
1866 u32 tx_status;
1867
1868 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1869 tx_status = sis_priv->tx_ring[entry].cmdsts;
1870
1871 if (tx_status & OWN) {
1872 /* The packet is not transmitted yet (owned by hardware) !
1873 * Note: the interrupt is generated only when Tx Machine
1874 * is idle, so this is an almost impossible case */
1875 break;
1876 }
1877
1878 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1879 /* packet unsuccessfully transmitted */
1880 if (netif_msg_tx_err(sis_priv))
1881 printk(KERN_DEBUG "%s: Transmit "
1882 "error, Tx status %8.8x.\n",
1883 net_dev->name, tx_status);
1884 sis_priv->stats.tx_errors++;
1885 if (tx_status & UNDERRUN)
1886 sis_priv->stats.tx_fifo_errors++;
1887 if (tx_status & ABORT)
1888 sis_priv->stats.tx_aborted_errors++;
1889 if (tx_status & NOCARRIER)
1890 sis_priv->stats.tx_carrier_errors++;
1891 if (tx_status & OWCOLL)
1892 sis_priv->stats.tx_window_errors++;
1893 } else {
1894 /* packet successfully transmitted */
1895 sis_priv->stats.collisions += (tx_status & COLCNT) >> 16;
1896 sis_priv->stats.tx_bytes += tx_status & DSIZE;
1897 sis_priv->stats.tx_packets++;
1898 }
1899 /* Free the original skb. */
1900 skb = sis_priv->tx_skbuff[entry];
1901 pci_unmap_single(sis_priv->pci_dev,
1902 sis_priv->tx_ring[entry].bufptr, skb->len,
1903 PCI_DMA_TODEVICE);
1904 dev_kfree_skb_irq(skb);
1905 sis_priv->tx_skbuff[entry] = NULL;
1906 sis_priv->tx_ring[entry].bufptr = 0;
1907 sis_priv->tx_ring[entry].cmdsts = 0;
1908 }
1909
1910 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1911 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1912 /* The ring is no longer full, clear tx_full and schedule
1913 * more transmission by netif_wake_queue(net_dev) */
1914 sis_priv->tx_full = 0;
1915 netif_wake_queue (net_dev);
1916 }
1917 }
1918
1919 /**
1920 * sis900_close - close sis900 device
1921 * @net_dev: the net device to be closed
1922 *
1923 * Disable interrupts, stop the Tx and Rx Status Machine
1924 * free Tx and RX socket buffer
1925 */
1926
1927 static int sis900_close(struct net_device *net_dev)
1928 {
1929 long ioaddr = net_dev->base_addr;
1930 struct sis900_private *sis_priv = net_dev->priv;
1931 struct sk_buff *skb;
1932 int i;
1933
1934 netif_stop_queue(net_dev);
1935
1936 /* Disable interrupts by clearing the interrupt mask. */
1937 outl(0x0000, ioaddr + imr);
1938 outl(0x0000, ioaddr + ier);
1939
1940 /* Stop the chip's Tx and Rx Status Machine */
1941 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
1942
1943 del_timer(&sis_priv->timer);
1944
1945 free_irq(net_dev->irq, net_dev);
1946
1947 /* Free Tx and RX skbuff */
1948 for (i = 0; i < NUM_RX_DESC; i++) {
1949 skb = sis_priv->rx_skbuff[i];
1950 if (skb) {
1951 pci_unmap_single(sis_priv->pci_dev,
1952 sis_priv->rx_ring[i].bufptr,
1953 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1954 dev_kfree_skb(skb);
1955 sis_priv->rx_skbuff[i] = NULL;
1956 }
1957 }
1958 for (i = 0; i < NUM_TX_DESC; i++) {
1959 skb = sis_priv->tx_skbuff[i];
1960 if (skb) {
1961 pci_unmap_single(sis_priv->pci_dev,
1962 sis_priv->tx_ring[i].bufptr, skb->len,
1963 PCI_DMA_TODEVICE);
1964 dev_kfree_skb(skb);
1965 sis_priv->tx_skbuff[i] = NULL;
1966 }
1967 }
1968
1969 /* Green! Put the chip in low-power mode. */
1970
1971 return 0;
1972 }
1973
1974 /**
1975 * sis900_get_drvinfo - Return information about driver
1976 * @net_dev: the net device to probe
1977 * @info: container for info returned
1978 *
1979 * Process ethtool command such as "ehtool -i" to show information
1980 */
1981
1982 static void sis900_get_drvinfo(struct net_device *net_dev,
1983 struct ethtool_drvinfo *info)
1984 {
1985 struct sis900_private *sis_priv = net_dev->priv;
1986
1987 strcpy (info->driver, SIS900_MODULE_NAME);
1988 strcpy (info->version, SIS900_DRV_VERSION);
1989 strcpy (info->bus_info, pci_name(sis_priv->pci_dev));
1990 }
1991
1992 static u32 sis900_get_msglevel(struct net_device *net_dev)
1993 {
1994 struct sis900_private *sis_priv = net_dev->priv;
1995 return sis_priv->msg_enable;
1996 }
1997
1998 static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
1999 {
2000 struct sis900_private *sis_priv = net_dev->priv;
2001 sis_priv->msg_enable = value;
2002 }
2003
2004 static u32 sis900_get_link(struct net_device *net_dev)
2005 {
2006 struct sis900_private *sis_priv = net_dev->priv;
2007 return mii_link_ok(&sis_priv->mii_info);
2008 }
2009
2010 static int sis900_get_settings(struct net_device *net_dev,
2011 struct ethtool_cmd *cmd)
2012 {
2013 struct sis900_private *sis_priv = net_dev->priv;
2014 spin_lock_irq(&sis_priv->lock);
2015 mii_ethtool_gset(&sis_priv->mii_info, cmd);
2016 spin_unlock_irq(&sis_priv->lock);
2017 return 0;
2018 }
2019
2020 static int sis900_set_settings(struct net_device *net_dev,
2021 struct ethtool_cmd *cmd)
2022 {
2023 struct sis900_private *sis_priv = net_dev->priv;
2024 int rt;
2025 spin_lock_irq(&sis_priv->lock);
2026 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
2027 spin_unlock_irq(&sis_priv->lock);
2028 return rt;
2029 }
2030
2031 static int sis900_nway_reset(struct net_device *net_dev)
2032 {
2033 struct sis900_private *sis_priv = net_dev->priv;
2034 return mii_nway_restart(&sis_priv->mii_info);
2035 }
2036
2037 /**
2038 * sis900_set_wol - Set up Wake on Lan registers
2039 * @net_dev: the net device to probe
2040 * @wol: container for info passed to the driver
2041 *
2042 * Process ethtool command "wol" to setup wake on lan features.
2043 * SiS900 supports sending WoL events if a correct packet is received,
2044 * but there is no simple way to filter them to only a subset (broadcast,
2045 * multicast, unicast or arp).
2046 */
2047
2048 static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2049 {
2050 struct sis900_private *sis_priv = net_dev->priv;
2051 long pmctrl_addr = net_dev->base_addr + pmctrl;
2052 u32 cfgpmcsr = 0, pmctrl_bits = 0;
2053
2054 if (wol->wolopts == 0) {
2055 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2056 cfgpmcsr &= ~PME_EN;
2057 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2058 outl(pmctrl_bits, pmctrl_addr);
2059 if (netif_msg_wol(sis_priv))
2060 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
2061 return 0;
2062 }
2063
2064 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
2065 | WAKE_BCAST | WAKE_ARP))
2066 return -EINVAL;
2067
2068 if (wol->wolopts & WAKE_MAGIC)
2069 pmctrl_bits |= MAGICPKT;
2070 if (wol->wolopts & WAKE_PHY)
2071 pmctrl_bits |= LINKON;
2072
2073 outl(pmctrl_bits, pmctrl_addr);
2074
2075 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2076 cfgpmcsr |= PME_EN;
2077 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2078 if (netif_msg_wol(sis_priv))
2079 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
2080
2081 return 0;
2082 }
2083
2084 static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2085 {
2086 long pmctrl_addr = net_dev->base_addr + pmctrl;
2087 u32 pmctrl_bits;
2088
2089 pmctrl_bits = inl(pmctrl_addr);
2090 if (pmctrl_bits & MAGICPKT)
2091 wol->wolopts |= WAKE_MAGIC;
2092 if (pmctrl_bits & LINKON)
2093 wol->wolopts |= WAKE_PHY;
2094
2095 wol->supported = (WAKE_PHY | WAKE_MAGIC);
2096 }
2097
2098 static const struct ethtool_ops sis900_ethtool_ops = {
2099 .get_drvinfo = sis900_get_drvinfo,
2100 .get_msglevel = sis900_get_msglevel,
2101 .set_msglevel = sis900_set_msglevel,
2102 .get_link = sis900_get_link,
2103 .get_settings = sis900_get_settings,
2104 .set_settings = sis900_set_settings,
2105 .nway_reset = sis900_nway_reset,
2106 .get_wol = sis900_get_wol,
2107 .set_wol = sis900_set_wol
2108 };
2109
2110 /**
2111 * mii_ioctl - process MII i/o control command
2112 * @net_dev: the net device to command for
2113 * @rq: parameter for command
2114 * @cmd: the i/o command
2115 *
2116 * Process MII command like read/write MII register
2117 */
2118
2119 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2120 {
2121 struct sis900_private *sis_priv = net_dev->priv;
2122 struct mii_ioctl_data *data = if_mii(rq);
2123
2124 switch(cmd) {
2125 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2126 data->phy_id = sis_priv->mii->phy_addr;
2127 /* Fall Through */
2128
2129 case SIOCGMIIREG: /* Read MII PHY register. */
2130 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2131 return 0;
2132
2133 case SIOCSMIIREG: /* Write MII PHY register. */
2134 if (!capable(CAP_NET_ADMIN))
2135 return -EPERM;
2136 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2137 return 0;
2138 default:
2139 return -EOPNOTSUPP;
2140 }
2141 }
2142
2143 /**
2144 * sis900_get_stats - Get sis900 read/write statistics
2145 * @net_dev: the net device to get statistics for
2146 *
2147 * get tx/rx statistics for sis900
2148 */
2149
2150 static struct net_device_stats *
2151 sis900_get_stats(struct net_device *net_dev)
2152 {
2153 struct sis900_private *sis_priv = net_dev->priv;
2154
2155 return &sis_priv->stats;
2156 }
2157
2158 /**
2159 * sis900_set_config - Set media type by net_device.set_config
2160 * @dev: the net device for media type change
2161 * @map: ifmap passed by ifconfig
2162 *
2163 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
2164 * we support only port changes. All other runtime configuration
2165 * changes will be ignored
2166 */
2167
2168 static int sis900_set_config(struct net_device *dev, struct ifmap *map)
2169 {
2170 struct sis900_private *sis_priv = dev->priv;
2171 struct mii_phy *mii_phy = sis_priv->mii;
2172
2173 u16 status;
2174
2175 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2176 /* we switch on the ifmap->port field. I couldn't find anything
2177 * like a definition or standard for the values of that field.
2178 * I think the meaning of those values is device specific. But
2179 * since I would like to change the media type via the ifconfig
2180 * command I use the definition from linux/netdevice.h
2181 * (which seems to be different from the ifport(pcmcia) definition) */
2182 switch(map->port){
2183 case IF_PORT_UNKNOWN: /* use auto here */
2184 dev->if_port = map->port;
2185 /* we are going to change the media type, so the Link
2186 * will be temporary down and we need to reflect that
2187 * here. When the Link comes up again, it will be
2188 * sensed by the sis_timer procedure, which also does
2189 * all the rest for us */
2190 netif_carrier_off(dev);
2191
2192 /* read current state */
2193 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2194
2195 /* enable auto negotiation and reset the negotioation
2196 * (I don't really know what the auto negatiotiation
2197 * reset really means, but it sounds for me right to
2198 * do one here) */
2199 mdio_write(dev, mii_phy->phy_addr,
2200 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2201
2202 break;
2203
2204 case IF_PORT_10BASET: /* 10BaseT */
2205 dev->if_port = map->port;
2206
2207 /* we are going to change the media type, so the Link
2208 * will be temporary down and we need to reflect that
2209 * here. When the Link comes up again, it will be
2210 * sensed by the sis_timer procedure, which also does
2211 * all the rest for us */
2212 netif_carrier_off(dev);
2213
2214 /* set Speed to 10Mbps */
2215 /* read current state */
2216 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2217
2218 /* disable auto negotiation and force 10MBit mode*/
2219 mdio_write(dev, mii_phy->phy_addr,
2220 MII_CONTROL, status & ~(MII_CNTL_SPEED |
2221 MII_CNTL_AUTO));
2222 break;
2223
2224 case IF_PORT_100BASET: /* 100BaseT */
2225 case IF_PORT_100BASETX: /* 100BaseTx */
2226 dev->if_port = map->port;
2227
2228 /* we are going to change the media type, so the Link
2229 * will be temporary down and we need to reflect that
2230 * here. When the Link comes up again, it will be
2231 * sensed by the sis_timer procedure, which also does
2232 * all the rest for us */
2233 netif_carrier_off(dev);
2234
2235 /* set Speed to 100Mbps */
2236 /* disable auto negotiation and enable 100MBit Mode */
2237 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2238 mdio_write(dev, mii_phy->phy_addr,
2239 MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2240 MII_CNTL_SPEED);
2241
2242 break;
2243
2244 case IF_PORT_10BASE2: /* 10Base2 */
2245 case IF_PORT_AUI: /* AUI */
2246 case IF_PORT_100BASEFX: /* 100BaseFx */
2247 /* These Modes are not supported (are they?)*/
2248 return -EOPNOTSUPP;
2249 break;
2250
2251 default:
2252 return -EINVAL;
2253 }
2254 }
2255 return 0;
2256 }
2257
2258 /**
2259 * sis900_mcast_bitnr - compute hashtable index
2260 * @addr: multicast address
2261 * @revision: revision id of chip
2262 *
2263 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2264 * hash table, which makes this function a little bit different from other drivers
2265 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
2266 * multicast hash table.
2267 */
2268
2269 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2270 {
2271
2272 u32 crc = ether_crc(6, addr);
2273
2274 /* leave 8 or 7 most siginifant bits */
2275 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2276 return ((int)(crc >> 24));
2277 else
2278 return ((int)(crc >> 25));
2279 }
2280
2281 /**
2282 * set_rx_mode - Set SiS900 receive mode
2283 * @net_dev: the net device to be set
2284 *
2285 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2286 * And set the appropriate multicast filter.
2287 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2288 */
2289
2290 static void set_rx_mode(struct net_device *net_dev)
2291 {
2292 long ioaddr = net_dev->base_addr;
2293 struct sis900_private * sis_priv = net_dev->priv;
2294 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2295 int i, table_entries;
2296 u32 rx_mode;
2297
2298 /* 635 Hash Table entries = 256(2^16) */
2299 if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2300 (sis_priv->chipset_rev == SIS900B_900_REV))
2301 table_entries = 16;
2302 else
2303 table_entries = 8;
2304
2305 if (net_dev->flags & IFF_PROMISC) {
2306 /* Accept any kinds of packets */
2307 rx_mode = RFPromiscuous;
2308 for (i = 0; i < table_entries; i++)
2309 mc_filter[i] = 0xffff;
2310 } else if ((net_dev->mc_count > multicast_filter_limit) ||
2311 (net_dev->flags & IFF_ALLMULTI)) {
2312 /* too many multicast addresses or accept all multicast packet */
2313 rx_mode = RFAAB | RFAAM;
2314 for (i = 0; i < table_entries; i++)
2315 mc_filter[i] = 0xffff;
2316 } else {
2317 /* Accept Broadcast packet, destination address matchs our
2318 * MAC address, use Receive Filter to reject unwanted MCAST
2319 * packets */
2320 struct dev_mc_list *mclist;
2321 rx_mode = RFAAB;
2322 for (i = 0, mclist = net_dev->mc_list;
2323 mclist && i < net_dev->mc_count;
2324 i++, mclist = mclist->next) {
2325 unsigned int bit_nr =
2326 sis900_mcast_bitnr(mclist->dmi_addr, sis_priv->chipset_rev);
2327 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2328 }
2329 }
2330
2331 /* update Multicast Hash Table in Receive Filter */
2332 for (i = 0; i < table_entries; i++) {
2333 /* why plus 0x04 ??, That makes the correct value for hash table. */
2334 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
2335 outl(mc_filter[i], ioaddr + rfdr);
2336 }
2337
2338 outl(RFEN | rx_mode, ioaddr + rfcr);
2339
2340 /* sis900 is capable of looping back packets at MAC level for
2341 * debugging purpose */
2342 if (net_dev->flags & IFF_LOOPBACK) {
2343 u32 cr_saved;
2344 /* We must disable Tx/Rx before setting loopback mode */
2345 cr_saved = inl(ioaddr + cr);
2346 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
2347 /* enable loopback */
2348 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
2349 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
2350 /* restore cr */
2351 outl(cr_saved, ioaddr + cr);
2352 }
2353
2354 return;
2355 }
2356
2357 /**
2358 * sis900_reset - Reset sis900 MAC
2359 * @net_dev: the net device to reset
2360 *
2361 * reset sis900 MAC and wait until finished
2362 * reset through command register
2363 * change backoff algorithm for 900B0 & 635 M/B
2364 */
2365
2366 static void sis900_reset(struct net_device *net_dev)
2367 {
2368 struct sis900_private * sis_priv = net_dev->priv;
2369 long ioaddr = net_dev->base_addr;
2370 int i = 0;
2371 u32 status = TxRCMP | RxRCMP;
2372
2373 outl(0, ioaddr + ier);
2374 outl(0, ioaddr + imr);
2375 outl(0, ioaddr + rfcr);
2376
2377 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
2378
2379 /* Check that the chip has finished the reset. */
2380 while (status && (i++ < 1000)) {
2381 status ^= (inl(isr + ioaddr) & status);
2382 }
2383
2384 if( (sis_priv->chipset_rev >= SIS635A_900_REV) ||
2385 (sis_priv->chipset_rev == SIS900B_900_REV) )
2386 outl(PESEL | RND_CNT, ioaddr + cfg);
2387 else
2388 outl(PESEL, ioaddr + cfg);
2389 }
2390
2391 /**
2392 * sis900_remove - Remove sis900 device
2393 * @pci_dev: the pci device to be removed
2394 *
2395 * remove and release SiS900 net device
2396 */
2397
2398 static void __devexit sis900_remove(struct pci_dev *pci_dev)
2399 {
2400 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2401 struct sis900_private * sis_priv = net_dev->priv;
2402 struct mii_phy *phy = NULL;
2403
2404 while (sis_priv->first_mii) {
2405 phy = sis_priv->first_mii;
2406 sis_priv->first_mii = phy->next;
2407 kfree(phy);
2408 }
2409
2410 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2411 sis_priv->rx_ring_dma);
2412 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2413 sis_priv->tx_ring_dma);
2414 unregister_netdev(net_dev);
2415 free_netdev(net_dev);
2416 pci_release_regions(pci_dev);
2417 pci_set_drvdata(pci_dev, NULL);
2418 }
2419
2420 #ifdef CONFIG_PM
2421
2422 static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2423 {
2424 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2425 long ioaddr = net_dev->base_addr;
2426
2427 if(!netif_running(net_dev))
2428 return 0;
2429
2430 netif_stop_queue(net_dev);
2431 netif_device_detach(net_dev);
2432
2433 /* Stop the chip's Tx and Rx Status Machine */
2434 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2435
2436 pci_set_power_state(pci_dev, PCI_D3hot);
2437 pci_save_state(pci_dev);
2438
2439 return 0;
2440 }
2441
2442 static int sis900_resume(struct pci_dev *pci_dev)
2443 {
2444 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2445 struct sis900_private *sis_priv = net_dev->priv;
2446 long ioaddr = net_dev->base_addr;
2447
2448 if(!netif_running(net_dev))
2449 return 0;
2450 pci_restore_state(pci_dev);
2451 pci_set_power_state(pci_dev, PCI_D0);
2452
2453 sis900_init_rxfilter(net_dev);
2454
2455 sis900_init_tx_ring(net_dev);
2456 sis900_init_rx_ring(net_dev);
2457
2458 set_rx_mode(net_dev);
2459
2460 netif_device_attach(net_dev);
2461 netif_start_queue(net_dev);
2462
2463 /* Workaround for EDB */
2464 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2465
2466 /* Enable all known interrupts by setting the interrupt mask. */
2467 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
2468 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
2469 outl(IE, ioaddr + ier);
2470
2471 sis900_check_mode(net_dev, sis_priv->mii);
2472
2473 return 0;
2474 }
2475 #endif /* CONFIG_PM */
2476
2477 static struct pci_driver sis900_pci_driver = {
2478 .name = SIS900_MODULE_NAME,
2479 .id_table = sis900_pci_tbl,
2480 .probe = sis900_probe,
2481 .remove = __devexit_p(sis900_remove),
2482 #ifdef CONFIG_PM
2483 .suspend = sis900_suspend,
2484 .resume = sis900_resume,
2485 #endif /* CONFIG_PM */
2486 };
2487
2488 static int __init sis900_init_module(void)
2489 {
2490 /* when a module, this is printed whether or not devices are found in probe */
2491 #ifdef MODULE
2492 printk(version);
2493 #endif
2494
2495 return pci_register_driver(&sis900_pci_driver);
2496 }
2497
2498 static void __exit sis900_cleanup_module(void)
2499 {
2500 pci_unregister_driver(&sis900_pci_driver);
2501 }
2502
2503 module_init(sis900_init_module);
2504 module_exit(sis900_cleanup_module);
2505
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