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signals: consolidate checks for whether or not to ignore a signal
[deliverable/linux.git] / drivers / net / smc91x.c
1 /*
2 * smc91x.c
3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
4 *
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 * Arguments:
26 * io = for the base address
27 * irq = for the IRQ
28 * nowait = 0 for normal wait states, 1 eliminates additional wait states
29 *
30 * original author:
31 * Erik Stahlman <erik@vt.edu>
32 *
33 * hardware multicast code:
34 * Peter Cammaert <pc@denkart.be>
35 *
36 * contributors:
37 * Daris A Nevil <dnevil@snmc.com>
38 * Nicolas Pitre <nico@cam.org>
39 * Russell King <rmk@arm.linux.org.uk>
40 *
41 * History:
42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
49 * more bus abstraction, big cleanup, etc.
50 * 29/09/03 Russell King - add driver model support
51 * - ethtool support
52 * - convert to use generic MII interface
53 * - add link up/down notification
54 * - don't try to handle full negotiation in
55 * smc_phy_configure
56 * - clean up (and fix stack overrun) in PHY
57 * MII read/write functions
58 * 22/09/04 Nicolas Pitre big update (see commit log for details)
59 */
60 static const char version[] =
61 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
62
63 /* Debugging level */
64 #ifndef SMC_DEBUG
65 #define SMC_DEBUG 0
66 #endif
67
68
69 #include <linux/init.h>
70 #include <linux/module.h>
71 #include <linux/kernel.h>
72 #include <linux/sched.h>
73 #include <linux/slab.h>
74 #include <linux/delay.h>
75 #include <linux/interrupt.h>
76 #include <linux/errno.h>
77 #include <linux/ioport.h>
78 #include <linux/crc32.h>
79 #include <linux/platform_device.h>
80 #include <linux/spinlock.h>
81 #include <linux/ethtool.h>
82 #include <linux/mii.h>
83 #include <linux/workqueue.h>
84
85 #include <linux/netdevice.h>
86 #include <linux/etherdevice.h>
87 #include <linux/skbuff.h>
88
89 #include <asm/io.h>
90
91 #include "smc91x.h"
92
93 #ifdef CONFIG_ISA
94 /*
95 * the LAN91C111 can be at any of the following port addresses. To change,
96 * for a slightly different card, you can add it to the array. Keep in
97 * mind that the array must end in zero.
98 */
99 static unsigned int smc_portlist[] __initdata = {
100 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
101 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
102 };
103
104 #ifndef SMC_IOADDR
105 # define SMC_IOADDR -1
106 #endif
107 static unsigned long io = SMC_IOADDR;
108 module_param(io, ulong, 0400);
109 MODULE_PARM_DESC(io, "I/O base address");
110
111 #ifndef SMC_IRQ
112 # define SMC_IRQ -1
113 #endif
114 static int irq = SMC_IRQ;
115 module_param(irq, int, 0400);
116 MODULE_PARM_DESC(irq, "IRQ number");
117
118 #endif /* CONFIG_ISA */
119
120 #ifndef SMC_NOWAIT
121 # define SMC_NOWAIT 0
122 #endif
123 static int nowait = SMC_NOWAIT;
124 module_param(nowait, int, 0400);
125 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
126
127 /*
128 * Transmit timeout, default 5 seconds.
129 */
130 static int watchdog = 1000;
131 module_param(watchdog, int, 0400);
132 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
133
134 MODULE_LICENSE("GPL");
135 MODULE_ALIAS("platform:smc91x");
136
137 /*
138 * The internal workings of the driver. If you are changing anything
139 * here with the SMC stuff, you should have the datasheet and know
140 * what you are doing.
141 */
142 #define CARDNAME "smc91x"
143
144 /*
145 * Use power-down feature of the chip
146 */
147 #define POWER_DOWN 1
148
149 /*
150 * Wait time for memory to be free. This probably shouldn't be
151 * tuned that much, as waiting for this means nothing else happens
152 * in the system
153 */
154 #define MEMORY_WAIT_TIME 16
155
156 /*
157 * The maximum number of processing loops allowed for each call to the
158 * IRQ handler.
159 */
160 #define MAX_IRQ_LOOPS 8
161
162 /*
163 * This selects whether TX packets are sent one by one to the SMC91x internal
164 * memory and throttled until transmission completes. This may prevent
165 * RX overruns a litle by keeping much of the memory free for RX packets
166 * but to the expense of reduced TX throughput and increased IRQ overhead.
167 * Note this is not a cure for a too slow data bus or too high IRQ latency.
168 */
169 #define THROTTLE_TX_PKTS 0
170
171 /*
172 * The MII clock high/low times. 2x this number gives the MII clock period
173 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
174 */
175 #define MII_DELAY 1
176
177 #if SMC_DEBUG > 0
178 #define DBG(n, args...) \
179 do { \
180 if (SMC_DEBUG >= (n)) \
181 printk(args); \
182 } while (0)
183
184 #define PRINTK(args...) printk(args)
185 #else
186 #define DBG(n, args...) do { } while(0)
187 #define PRINTK(args...) printk(KERN_DEBUG args)
188 #endif
189
190 #if SMC_DEBUG > 3
191 static void PRINT_PKT(u_char *buf, int length)
192 {
193 int i;
194 int remainder;
195 int lines;
196
197 lines = length / 16;
198 remainder = length % 16;
199
200 for (i = 0; i < lines ; i ++) {
201 int cur;
202 for (cur = 0; cur < 8; cur++) {
203 u_char a, b;
204 a = *buf++;
205 b = *buf++;
206 printk("%02x%02x ", a, b);
207 }
208 printk("\n");
209 }
210 for (i = 0; i < remainder/2 ; i++) {
211 u_char a, b;
212 a = *buf++;
213 b = *buf++;
214 printk("%02x%02x ", a, b);
215 }
216 printk("\n");
217 }
218 #else
219 #define PRINT_PKT(x...) do { } while(0)
220 #endif
221
222
223 /* this enables an interrupt in the interrupt mask register */
224 #define SMC_ENABLE_INT(lp, x) do { \
225 unsigned char mask; \
226 spin_lock_irq(&lp->lock); \
227 mask = SMC_GET_INT_MASK(lp); \
228 mask |= (x); \
229 SMC_SET_INT_MASK(lp, mask); \
230 spin_unlock_irq(&lp->lock); \
231 } while (0)
232
233 /* this disables an interrupt from the interrupt mask register */
234 #define SMC_DISABLE_INT(lp, x) do { \
235 unsigned char mask; \
236 spin_lock_irq(&lp->lock); \
237 mask = SMC_GET_INT_MASK(lp); \
238 mask &= ~(x); \
239 SMC_SET_INT_MASK(lp, mask); \
240 spin_unlock_irq(&lp->lock); \
241 } while (0)
242
243 /*
244 * Wait while MMU is busy. This is usually in the order of a few nanosecs
245 * if at all, but let's avoid deadlocking the system if the hardware
246 * decides to go south.
247 */
248 #define SMC_WAIT_MMU_BUSY(lp) do { \
249 if (unlikely(SMC_GET_MMU_CMD(lp) & MC_BUSY)) { \
250 unsigned long timeout = jiffies + 2; \
251 while (SMC_GET_MMU_CMD(lp) & MC_BUSY) { \
252 if (time_after(jiffies, timeout)) { \
253 printk("%s: timeout %s line %d\n", \
254 dev->name, __FILE__, __LINE__); \
255 break; \
256 } \
257 cpu_relax(); \
258 } \
259 } \
260 } while (0)
261
262
263 /*
264 * this does a soft reset on the device
265 */
266 static void smc_reset(struct net_device *dev)
267 {
268 struct smc_local *lp = netdev_priv(dev);
269 void __iomem *ioaddr = lp->base;
270 unsigned int ctl, cfg;
271 struct sk_buff *pending_skb;
272
273 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
274
275 /* Disable all interrupts, block TX tasklet */
276 spin_lock_irq(&lp->lock);
277 SMC_SELECT_BANK(lp, 2);
278 SMC_SET_INT_MASK(lp, 0);
279 pending_skb = lp->pending_tx_skb;
280 lp->pending_tx_skb = NULL;
281 spin_unlock_irq(&lp->lock);
282
283 /* free any pending tx skb */
284 if (pending_skb) {
285 dev_kfree_skb(pending_skb);
286 dev->stats.tx_errors++;
287 dev->stats.tx_aborted_errors++;
288 }
289
290 /*
291 * This resets the registers mostly to defaults, but doesn't
292 * affect EEPROM. That seems unnecessary
293 */
294 SMC_SELECT_BANK(lp, 0);
295 SMC_SET_RCR(lp, RCR_SOFTRST);
296
297 /*
298 * Setup the Configuration Register
299 * This is necessary because the CONFIG_REG is not affected
300 * by a soft reset
301 */
302 SMC_SELECT_BANK(lp, 1);
303
304 cfg = CONFIG_DEFAULT;
305
306 /*
307 * Setup for fast accesses if requested. If the card/system
308 * can't handle it then there will be no recovery except for
309 * a hard reset or power cycle
310 */
311 if (nowait)
312 cfg |= CONFIG_NO_WAIT;
313
314 /*
315 * Release from possible power-down state
316 * Configuration register is not affected by Soft Reset
317 */
318 cfg |= CONFIG_EPH_POWER_EN;
319
320 SMC_SET_CONFIG(lp, cfg);
321
322 /* this should pause enough for the chip to be happy */
323 /*
324 * elaborate? What does the chip _need_? --jgarzik
325 *
326 * This seems to be undocumented, but something the original
327 * driver(s) have always done. Suspect undocumented timing
328 * info/determined empirically. --rmk
329 */
330 udelay(1);
331
332 /* Disable transmit and receive functionality */
333 SMC_SELECT_BANK(lp, 0);
334 SMC_SET_RCR(lp, RCR_CLEAR);
335 SMC_SET_TCR(lp, TCR_CLEAR);
336
337 SMC_SELECT_BANK(lp, 1);
338 ctl = SMC_GET_CTL(lp) | CTL_LE_ENABLE;
339
340 /*
341 * Set the control register to automatically release successfully
342 * transmitted packets, to make the best use out of our limited
343 * memory
344 */
345 if(!THROTTLE_TX_PKTS)
346 ctl |= CTL_AUTO_RELEASE;
347 else
348 ctl &= ~CTL_AUTO_RELEASE;
349 SMC_SET_CTL(lp, ctl);
350
351 /* Reset the MMU */
352 SMC_SELECT_BANK(lp, 2);
353 SMC_SET_MMU_CMD(lp, MC_RESET);
354 SMC_WAIT_MMU_BUSY(lp);
355 }
356
357 /*
358 * Enable Interrupts, Receive, and Transmit
359 */
360 static void smc_enable(struct net_device *dev)
361 {
362 struct smc_local *lp = netdev_priv(dev);
363 void __iomem *ioaddr = lp->base;
364 int mask;
365
366 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
367
368 /* see the header file for options in TCR/RCR DEFAULT */
369 SMC_SELECT_BANK(lp, 0);
370 SMC_SET_TCR(lp, lp->tcr_cur_mode);
371 SMC_SET_RCR(lp, lp->rcr_cur_mode);
372
373 SMC_SELECT_BANK(lp, 1);
374 SMC_SET_MAC_ADDR(lp, dev->dev_addr);
375
376 /* now, enable interrupts */
377 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
378 if (lp->version >= (CHIP_91100 << 4))
379 mask |= IM_MDINT;
380 SMC_SELECT_BANK(lp, 2);
381 SMC_SET_INT_MASK(lp, mask);
382
383 /*
384 * From this point the register bank must _NOT_ be switched away
385 * to something else than bank 2 without proper locking against
386 * races with any tasklet or interrupt handlers until smc_shutdown()
387 * or smc_reset() is called.
388 */
389 }
390
391 /*
392 * this puts the device in an inactive state
393 */
394 static void smc_shutdown(struct net_device *dev)
395 {
396 struct smc_local *lp = netdev_priv(dev);
397 void __iomem *ioaddr = lp->base;
398 struct sk_buff *pending_skb;
399
400 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
401
402 /* no more interrupts for me */
403 spin_lock_irq(&lp->lock);
404 SMC_SELECT_BANK(lp, 2);
405 SMC_SET_INT_MASK(lp, 0);
406 pending_skb = lp->pending_tx_skb;
407 lp->pending_tx_skb = NULL;
408 spin_unlock_irq(&lp->lock);
409 if (pending_skb)
410 dev_kfree_skb(pending_skb);
411
412 /* and tell the card to stay away from that nasty outside world */
413 SMC_SELECT_BANK(lp, 0);
414 SMC_SET_RCR(lp, RCR_CLEAR);
415 SMC_SET_TCR(lp, TCR_CLEAR);
416
417 #ifdef POWER_DOWN
418 /* finally, shut the chip down */
419 SMC_SELECT_BANK(lp, 1);
420 SMC_SET_CONFIG(lp, SMC_GET_CONFIG(lp) & ~CONFIG_EPH_POWER_EN);
421 #endif
422 }
423
424 /*
425 * This is the procedure to handle the receipt of a packet.
426 */
427 static inline void smc_rcv(struct net_device *dev)
428 {
429 struct smc_local *lp = netdev_priv(dev);
430 void __iomem *ioaddr = lp->base;
431 unsigned int packet_number, status, packet_len;
432
433 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
434
435 packet_number = SMC_GET_RXFIFO(lp);
436 if (unlikely(packet_number & RXFIFO_REMPTY)) {
437 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
438 return;
439 }
440
441 /* read from start of packet */
442 SMC_SET_PTR(lp, PTR_READ | PTR_RCV | PTR_AUTOINC);
443
444 /* First two words are status and packet length */
445 SMC_GET_PKT_HDR(lp, status, packet_len);
446 packet_len &= 0x07ff; /* mask off top bits */
447 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
448 dev->name, packet_number, status,
449 packet_len, packet_len);
450
451 back:
452 if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
453 if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
454 /* accept VLAN packets */
455 status &= ~RS_TOOLONG;
456 goto back;
457 }
458 if (packet_len < 6) {
459 /* bloody hardware */
460 printk(KERN_ERR "%s: fubar (rxlen %u status %x\n",
461 dev->name, packet_len, status);
462 status |= RS_TOOSHORT;
463 }
464 SMC_WAIT_MMU_BUSY(lp);
465 SMC_SET_MMU_CMD(lp, MC_RELEASE);
466 dev->stats.rx_errors++;
467 if (status & RS_ALGNERR)
468 dev->stats.rx_frame_errors++;
469 if (status & (RS_TOOSHORT | RS_TOOLONG))
470 dev->stats.rx_length_errors++;
471 if (status & RS_BADCRC)
472 dev->stats.rx_crc_errors++;
473 } else {
474 struct sk_buff *skb;
475 unsigned char *data;
476 unsigned int data_len;
477
478 /* set multicast stats */
479 if (status & RS_MULTICAST)
480 dev->stats.multicast++;
481
482 /*
483 * Actual payload is packet_len - 6 (or 5 if odd byte).
484 * We want skb_reserve(2) and the final ctrl word
485 * (2 bytes, possibly containing the payload odd byte).
486 * Furthermore, we add 2 bytes to allow rounding up to
487 * multiple of 4 bytes on 32 bit buses.
488 * Hence packet_len - 6 + 2 + 2 + 2.
489 */
490 skb = dev_alloc_skb(packet_len);
491 if (unlikely(skb == NULL)) {
492 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
493 dev->name);
494 SMC_WAIT_MMU_BUSY(lp);
495 SMC_SET_MMU_CMD(lp, MC_RELEASE);
496 dev->stats.rx_dropped++;
497 return;
498 }
499
500 /* Align IP header to 32 bits */
501 skb_reserve(skb, 2);
502
503 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
504 if (lp->version == 0x90)
505 status |= RS_ODDFRAME;
506
507 /*
508 * If odd length: packet_len - 5,
509 * otherwise packet_len - 6.
510 * With the trailing ctrl byte it's packet_len - 4.
511 */
512 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
513 data = skb_put(skb, data_len);
514 SMC_PULL_DATA(lp, data, packet_len - 4);
515
516 SMC_WAIT_MMU_BUSY(lp);
517 SMC_SET_MMU_CMD(lp, MC_RELEASE);
518
519 PRINT_PKT(data, packet_len - 4);
520
521 dev->last_rx = jiffies;
522 skb->protocol = eth_type_trans(skb, dev);
523 netif_rx(skb);
524 dev->stats.rx_packets++;
525 dev->stats.rx_bytes += data_len;
526 }
527 }
528
529 #ifdef CONFIG_SMP
530 /*
531 * On SMP we have the following problem:
532 *
533 * A = smc_hardware_send_pkt()
534 * B = smc_hard_start_xmit()
535 * C = smc_interrupt()
536 *
537 * A and B can never be executed simultaneously. However, at least on UP,
538 * it is possible (and even desirable) for C to interrupt execution of
539 * A or B in order to have better RX reliability and avoid overruns.
540 * C, just like A and B, must have exclusive access to the chip and
541 * each of them must lock against any other concurrent access.
542 * Unfortunately this is not possible to have C suspend execution of A or
543 * B taking place on another CPU. On UP this is no an issue since A and B
544 * are run from softirq context and C from hard IRQ context, and there is
545 * no other CPU where concurrent access can happen.
546 * If ever there is a way to force at least B and C to always be executed
547 * on the same CPU then we could use read/write locks to protect against
548 * any other concurrent access and C would always interrupt B. But life
549 * isn't that easy in a SMP world...
550 */
551 #define smc_special_trylock(lock) \
552 ({ \
553 int __ret; \
554 local_irq_disable(); \
555 __ret = spin_trylock(lock); \
556 if (!__ret) \
557 local_irq_enable(); \
558 __ret; \
559 })
560 #define smc_special_lock(lock) spin_lock_irq(lock)
561 #define smc_special_unlock(lock) spin_unlock_irq(lock)
562 #else
563 #define smc_special_trylock(lock) (1)
564 #define smc_special_lock(lock) do { } while (0)
565 #define smc_special_unlock(lock) do { } while (0)
566 #endif
567
568 /*
569 * This is called to actually send a packet to the chip.
570 */
571 static void smc_hardware_send_pkt(unsigned long data)
572 {
573 struct net_device *dev = (struct net_device *)data;
574 struct smc_local *lp = netdev_priv(dev);
575 void __iomem *ioaddr = lp->base;
576 struct sk_buff *skb;
577 unsigned int packet_no, len;
578 unsigned char *buf;
579
580 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
581
582 if (!smc_special_trylock(&lp->lock)) {
583 netif_stop_queue(dev);
584 tasklet_schedule(&lp->tx_task);
585 return;
586 }
587
588 skb = lp->pending_tx_skb;
589 if (unlikely(!skb)) {
590 smc_special_unlock(&lp->lock);
591 return;
592 }
593 lp->pending_tx_skb = NULL;
594
595 packet_no = SMC_GET_AR(lp);
596 if (unlikely(packet_no & AR_FAILED)) {
597 printk("%s: Memory allocation failed.\n", dev->name);
598 dev->stats.tx_errors++;
599 dev->stats.tx_fifo_errors++;
600 smc_special_unlock(&lp->lock);
601 goto done;
602 }
603
604 /* point to the beginning of the packet */
605 SMC_SET_PN(lp, packet_no);
606 SMC_SET_PTR(lp, PTR_AUTOINC);
607
608 buf = skb->data;
609 len = skb->len;
610 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
611 dev->name, packet_no, len, len, buf);
612 PRINT_PKT(buf, len);
613
614 /*
615 * Send the packet length (+6 for status words, length, and ctl.
616 * The card will pad to 64 bytes with zeroes if packet is too small.
617 */
618 SMC_PUT_PKT_HDR(lp, 0, len + 6);
619
620 /* send the actual data */
621 SMC_PUSH_DATA(lp, buf, len & ~1);
622
623 /* Send final ctl word with the last byte if there is one */
624 SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG(lp));
625
626 /*
627 * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
628 * have the effect of having at most one packet queued for TX
629 * in the chip's memory at all time.
630 *
631 * If THROTTLE_TX_PKTS is not set then the queue is stopped only
632 * when memory allocation (MC_ALLOC) does not succeed right away.
633 */
634 if (THROTTLE_TX_PKTS)
635 netif_stop_queue(dev);
636
637 /* queue the packet for TX */
638 SMC_SET_MMU_CMD(lp, MC_ENQUEUE);
639 smc_special_unlock(&lp->lock);
640
641 dev->trans_start = jiffies;
642 dev->stats.tx_packets++;
643 dev->stats.tx_bytes += len;
644
645 SMC_ENABLE_INT(lp, IM_TX_INT | IM_TX_EMPTY_INT);
646
647 done: if (!THROTTLE_TX_PKTS)
648 netif_wake_queue(dev);
649
650 dev_kfree_skb(skb);
651 }
652
653 /*
654 * Since I am not sure if I will have enough room in the chip's ram
655 * to store the packet, I call this routine which either sends it
656 * now, or set the card to generates an interrupt when ready
657 * for the packet.
658 */
659 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
660 {
661 struct smc_local *lp = netdev_priv(dev);
662 void __iomem *ioaddr = lp->base;
663 unsigned int numPages, poll_count, status;
664
665 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
666
667 BUG_ON(lp->pending_tx_skb != NULL);
668
669 /*
670 * The MMU wants the number of pages to be the number of 256 bytes
671 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
672 *
673 * The 91C111 ignores the size bits, but earlier models don't.
674 *
675 * Pkt size for allocating is data length +6 (for additional status
676 * words, length and ctl)
677 *
678 * If odd size then last byte is included in ctl word.
679 */
680 numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
681 if (unlikely(numPages > 7)) {
682 printk("%s: Far too big packet error.\n", dev->name);
683 dev->stats.tx_errors++;
684 dev->stats.tx_dropped++;
685 dev_kfree_skb(skb);
686 return 0;
687 }
688
689 smc_special_lock(&lp->lock);
690
691 /* now, try to allocate the memory */
692 SMC_SET_MMU_CMD(lp, MC_ALLOC | numPages);
693
694 /*
695 * Poll the chip for a short amount of time in case the
696 * allocation succeeds quickly.
697 */
698 poll_count = MEMORY_WAIT_TIME;
699 do {
700 status = SMC_GET_INT(lp);
701 if (status & IM_ALLOC_INT) {
702 SMC_ACK_INT(lp, IM_ALLOC_INT);
703 break;
704 }
705 } while (--poll_count);
706
707 smc_special_unlock(&lp->lock);
708
709 lp->pending_tx_skb = skb;
710 if (!poll_count) {
711 /* oh well, wait until the chip finds memory later */
712 netif_stop_queue(dev);
713 DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
714 SMC_ENABLE_INT(lp, IM_ALLOC_INT);
715 } else {
716 /*
717 * Allocation succeeded: push packet to the chip's own memory
718 * immediately.
719 */
720 smc_hardware_send_pkt((unsigned long)dev);
721 }
722
723 return 0;
724 }
725
726 /*
727 * This handles a TX interrupt, which is only called when:
728 * - a TX error occurred, or
729 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
730 */
731 static void smc_tx(struct net_device *dev)
732 {
733 struct smc_local *lp = netdev_priv(dev);
734 void __iomem *ioaddr = lp->base;
735 unsigned int saved_packet, packet_no, tx_status, pkt_len;
736
737 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
738
739 /* If the TX FIFO is empty then nothing to do */
740 packet_no = SMC_GET_TXFIFO(lp);
741 if (unlikely(packet_no & TXFIFO_TEMPTY)) {
742 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
743 return;
744 }
745
746 /* select packet to read from */
747 saved_packet = SMC_GET_PN(lp);
748 SMC_SET_PN(lp, packet_no);
749
750 /* read the first word (status word) from this packet */
751 SMC_SET_PTR(lp, PTR_AUTOINC | PTR_READ);
752 SMC_GET_PKT_HDR(lp, tx_status, pkt_len);
753 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
754 dev->name, tx_status, packet_no);
755
756 if (!(tx_status & ES_TX_SUC))
757 dev->stats.tx_errors++;
758
759 if (tx_status & ES_LOSTCARR)
760 dev->stats.tx_carrier_errors++;
761
762 if (tx_status & (ES_LATCOL | ES_16COL)) {
763 PRINTK("%s: %s occurred on last xmit\n", dev->name,
764 (tx_status & ES_LATCOL) ?
765 "late collision" : "too many collisions");
766 dev->stats.tx_window_errors++;
767 if (!(dev->stats.tx_window_errors & 63) && net_ratelimit()) {
768 printk(KERN_INFO "%s: unexpectedly large number of "
769 "bad collisions. Please check duplex "
770 "setting.\n", dev->name);
771 }
772 }
773
774 /* kill the packet */
775 SMC_WAIT_MMU_BUSY(lp);
776 SMC_SET_MMU_CMD(lp, MC_FREEPKT);
777
778 /* Don't restore Packet Number Reg until busy bit is cleared */
779 SMC_WAIT_MMU_BUSY(lp);
780 SMC_SET_PN(lp, saved_packet);
781
782 /* re-enable transmit */
783 SMC_SELECT_BANK(lp, 0);
784 SMC_SET_TCR(lp, lp->tcr_cur_mode);
785 SMC_SELECT_BANK(lp, 2);
786 }
787
788
789 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
790
791 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
792 {
793 struct smc_local *lp = netdev_priv(dev);
794 void __iomem *ioaddr = lp->base;
795 unsigned int mii_reg, mask;
796
797 mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
798 mii_reg |= MII_MDOE;
799
800 for (mask = 1 << (bits - 1); mask; mask >>= 1) {
801 if (val & mask)
802 mii_reg |= MII_MDO;
803 else
804 mii_reg &= ~MII_MDO;
805
806 SMC_SET_MII(lp, mii_reg);
807 udelay(MII_DELAY);
808 SMC_SET_MII(lp, mii_reg | MII_MCLK);
809 udelay(MII_DELAY);
810 }
811 }
812
813 static unsigned int smc_mii_in(struct net_device *dev, int bits)
814 {
815 struct smc_local *lp = netdev_priv(dev);
816 void __iomem *ioaddr = lp->base;
817 unsigned int mii_reg, mask, val;
818
819 mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
820 SMC_SET_MII(lp, mii_reg);
821
822 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
823 if (SMC_GET_MII(lp) & MII_MDI)
824 val |= mask;
825
826 SMC_SET_MII(lp, mii_reg);
827 udelay(MII_DELAY);
828 SMC_SET_MII(lp, mii_reg | MII_MCLK);
829 udelay(MII_DELAY);
830 }
831
832 return val;
833 }
834
835 /*
836 * Reads a register from the MII Management serial interface
837 */
838 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
839 {
840 struct smc_local *lp = netdev_priv(dev);
841 void __iomem *ioaddr = lp->base;
842 unsigned int phydata;
843
844 SMC_SELECT_BANK(lp, 3);
845
846 /* Idle - 32 ones */
847 smc_mii_out(dev, 0xffffffff, 32);
848
849 /* Start code (01) + read (10) + phyaddr + phyreg */
850 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
851
852 /* Turnaround (2bits) + phydata */
853 phydata = smc_mii_in(dev, 18);
854
855 /* Return to idle state */
856 SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
857
858 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
859 __FUNCTION__, phyaddr, phyreg, phydata);
860
861 SMC_SELECT_BANK(lp, 2);
862 return phydata;
863 }
864
865 /*
866 * Writes a register to the MII Management serial interface
867 */
868 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
869 int phydata)
870 {
871 struct smc_local *lp = netdev_priv(dev);
872 void __iomem *ioaddr = lp->base;
873
874 SMC_SELECT_BANK(lp, 3);
875
876 /* Idle - 32 ones */
877 smc_mii_out(dev, 0xffffffff, 32);
878
879 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
880 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
881
882 /* Return to idle state */
883 SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
884
885 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
886 __FUNCTION__, phyaddr, phyreg, phydata);
887
888 SMC_SELECT_BANK(lp, 2);
889 }
890
891 /*
892 * Finds and reports the PHY address
893 */
894 static void smc_phy_detect(struct net_device *dev)
895 {
896 struct smc_local *lp = netdev_priv(dev);
897 int phyaddr;
898
899 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
900
901 lp->phy_type = 0;
902
903 /*
904 * Scan all 32 PHY addresses if necessary, starting at
905 * PHY#1 to PHY#31, and then PHY#0 last.
906 */
907 for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
908 unsigned int id1, id2;
909
910 /* Read the PHY identifiers */
911 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
912 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
913
914 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
915 dev->name, id1, id2);
916
917 /* Make sure it is a valid identifier */
918 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
919 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
920 /* Save the PHY's address */
921 lp->mii.phy_id = phyaddr & 31;
922 lp->phy_type = id1 << 16 | id2;
923 break;
924 }
925 }
926 }
927
928 /*
929 * Sets the PHY to a configuration as determined by the user
930 */
931 static int smc_phy_fixed(struct net_device *dev)
932 {
933 struct smc_local *lp = netdev_priv(dev);
934 void __iomem *ioaddr = lp->base;
935 int phyaddr = lp->mii.phy_id;
936 int bmcr, cfg1;
937
938 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
939
940 /* Enter Link Disable state */
941 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
942 cfg1 |= PHY_CFG1_LNKDIS;
943 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
944
945 /*
946 * Set our fixed capabilities
947 * Disable auto-negotiation
948 */
949 bmcr = 0;
950
951 if (lp->ctl_rfduplx)
952 bmcr |= BMCR_FULLDPLX;
953
954 if (lp->ctl_rspeed == 100)
955 bmcr |= BMCR_SPEED100;
956
957 /* Write our capabilities to the phy control register */
958 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
959
960 /* Re-Configure the Receive/Phy Control register */
961 SMC_SELECT_BANK(lp, 0);
962 SMC_SET_RPC(lp, lp->rpc_cur_mode);
963 SMC_SELECT_BANK(lp, 2);
964
965 return 1;
966 }
967
968 /*
969 * smc_phy_reset - reset the phy
970 * @dev: net device
971 * @phy: phy address
972 *
973 * Issue a software reset for the specified PHY and
974 * wait up to 100ms for the reset to complete. We should
975 * not access the PHY for 50ms after issuing the reset.
976 *
977 * The time to wait appears to be dependent on the PHY.
978 *
979 * Must be called with lp->lock locked.
980 */
981 static int smc_phy_reset(struct net_device *dev, int phy)
982 {
983 struct smc_local *lp = netdev_priv(dev);
984 unsigned int bmcr;
985 int timeout;
986
987 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
988
989 for (timeout = 2; timeout; timeout--) {
990 spin_unlock_irq(&lp->lock);
991 msleep(50);
992 spin_lock_irq(&lp->lock);
993
994 bmcr = smc_phy_read(dev, phy, MII_BMCR);
995 if (!(bmcr & BMCR_RESET))
996 break;
997 }
998
999 return bmcr & BMCR_RESET;
1000 }
1001
1002 /*
1003 * smc_phy_powerdown - powerdown phy
1004 * @dev: net device
1005 *
1006 * Power down the specified PHY
1007 */
1008 static void smc_phy_powerdown(struct net_device *dev)
1009 {
1010 struct smc_local *lp = netdev_priv(dev);
1011 unsigned int bmcr;
1012 int phy = lp->mii.phy_id;
1013
1014 if (lp->phy_type == 0)
1015 return;
1016
1017 /* We need to ensure that no calls to smc_phy_configure are
1018 pending.
1019
1020 flush_scheduled_work() cannot be called because we are
1021 running with the netlink semaphore held (from
1022 devinet_ioctl()) and the pending work queue contains
1023 linkwatch_event() (scheduled by netif_carrier_off()
1024 above). linkwatch_event() also wants the netlink semaphore.
1025 */
1026 while(lp->work_pending)
1027 yield();
1028
1029 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1030 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
1031 }
1032
1033 /*
1034 * smc_phy_check_media - check the media status and adjust TCR
1035 * @dev: net device
1036 * @init: set true for initialisation
1037 *
1038 * Select duplex mode depending on negotiation state. This
1039 * also updates our carrier state.
1040 */
1041 static void smc_phy_check_media(struct net_device *dev, int init)
1042 {
1043 struct smc_local *lp = netdev_priv(dev);
1044 void __iomem *ioaddr = lp->base;
1045
1046 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1047 /* duplex state has changed */
1048 if (lp->mii.full_duplex) {
1049 lp->tcr_cur_mode |= TCR_SWFDUP;
1050 } else {
1051 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1052 }
1053
1054 SMC_SELECT_BANK(lp, 0);
1055 SMC_SET_TCR(lp, lp->tcr_cur_mode);
1056 }
1057 }
1058
1059 /*
1060 * Configures the specified PHY through the MII management interface
1061 * using Autonegotiation.
1062 * Calls smc_phy_fixed() if the user has requested a certain config.
1063 * If RPC ANEG bit is set, the media selection is dependent purely on
1064 * the selection by the MII (either in the MII BMCR reg or the result
1065 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
1066 * is controlled by the RPC SPEED and RPC DPLX bits.
1067 */
1068 static void smc_phy_configure(struct work_struct *work)
1069 {
1070 struct smc_local *lp =
1071 container_of(work, struct smc_local, phy_configure);
1072 struct net_device *dev = lp->dev;
1073 void __iomem *ioaddr = lp->base;
1074 int phyaddr = lp->mii.phy_id;
1075 int my_phy_caps; /* My PHY capabilities */
1076 int my_ad_caps; /* My Advertised capabilities */
1077 int status;
1078
1079 DBG(3, "%s:smc_program_phy()\n", dev->name);
1080
1081 spin_lock_irq(&lp->lock);
1082
1083 /*
1084 * We should not be called if phy_type is zero.
1085 */
1086 if (lp->phy_type == 0)
1087 goto smc_phy_configure_exit;
1088
1089 if (smc_phy_reset(dev, phyaddr)) {
1090 printk("%s: PHY reset timed out\n", dev->name);
1091 goto smc_phy_configure_exit;
1092 }
1093
1094 /*
1095 * Enable PHY Interrupts (for register 18)
1096 * Interrupts listed here are disabled
1097 */
1098 smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1099 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1100 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1101 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1102
1103 /* Configure the Receive/Phy Control register */
1104 SMC_SELECT_BANK(lp, 0);
1105 SMC_SET_RPC(lp, lp->rpc_cur_mode);
1106
1107 /* If the user requested no auto neg, then go set his request */
1108 if (lp->mii.force_media) {
1109 smc_phy_fixed(dev);
1110 goto smc_phy_configure_exit;
1111 }
1112
1113 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1114 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1115
1116 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1117 printk(KERN_INFO "Auto negotiation NOT supported\n");
1118 smc_phy_fixed(dev);
1119 goto smc_phy_configure_exit;
1120 }
1121
1122 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1123
1124 if (my_phy_caps & BMSR_100BASE4)
1125 my_ad_caps |= ADVERTISE_100BASE4;
1126 if (my_phy_caps & BMSR_100FULL)
1127 my_ad_caps |= ADVERTISE_100FULL;
1128 if (my_phy_caps & BMSR_100HALF)
1129 my_ad_caps |= ADVERTISE_100HALF;
1130 if (my_phy_caps & BMSR_10FULL)
1131 my_ad_caps |= ADVERTISE_10FULL;
1132 if (my_phy_caps & BMSR_10HALF)
1133 my_ad_caps |= ADVERTISE_10HALF;
1134
1135 /* Disable capabilities not selected by our user */
1136 if (lp->ctl_rspeed != 100)
1137 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1138
1139 if (!lp->ctl_rfduplx)
1140 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1141
1142 /* Update our Auto-Neg Advertisement Register */
1143 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1144 lp->mii.advertising = my_ad_caps;
1145
1146 /*
1147 * Read the register back. Without this, it appears that when
1148 * auto-negotiation is restarted, sometimes it isn't ready and
1149 * the link does not come up.
1150 */
1151 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1152
1153 DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
1154 DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
1155
1156 /* Restart auto-negotiation process in order to advertise my caps */
1157 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1158
1159 smc_phy_check_media(dev, 1);
1160
1161 smc_phy_configure_exit:
1162 SMC_SELECT_BANK(lp, 2);
1163 spin_unlock_irq(&lp->lock);
1164 lp->work_pending = 0;
1165 }
1166
1167 /*
1168 * smc_phy_interrupt
1169 *
1170 * Purpose: Handle interrupts relating to PHY register 18. This is
1171 * called from the "hard" interrupt handler under our private spinlock.
1172 */
1173 static void smc_phy_interrupt(struct net_device *dev)
1174 {
1175 struct smc_local *lp = netdev_priv(dev);
1176 int phyaddr = lp->mii.phy_id;
1177 int phy18;
1178
1179 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1180
1181 if (lp->phy_type == 0)
1182 return;
1183
1184 for(;;) {
1185 smc_phy_check_media(dev, 0);
1186
1187 /* Read PHY Register 18, Status Output */
1188 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1189 if ((phy18 & PHY_INT_INT) == 0)
1190 break;
1191 }
1192 }
1193
1194 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1195
1196 static void smc_10bt_check_media(struct net_device *dev, int init)
1197 {
1198 struct smc_local *lp = netdev_priv(dev);
1199 void __iomem *ioaddr = lp->base;
1200 unsigned int old_carrier, new_carrier;
1201
1202 old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1203
1204 SMC_SELECT_BANK(lp, 0);
1205 new_carrier = (SMC_GET_EPH_STATUS(lp) & ES_LINK_OK) ? 1 : 0;
1206 SMC_SELECT_BANK(lp, 2);
1207
1208 if (init || (old_carrier != new_carrier)) {
1209 if (!new_carrier) {
1210 netif_carrier_off(dev);
1211 } else {
1212 netif_carrier_on(dev);
1213 }
1214 if (netif_msg_link(lp))
1215 printk(KERN_INFO "%s: link %s\n", dev->name,
1216 new_carrier ? "up" : "down");
1217 }
1218 }
1219
1220 static void smc_eph_interrupt(struct net_device *dev)
1221 {
1222 struct smc_local *lp = netdev_priv(dev);
1223 void __iomem *ioaddr = lp->base;
1224 unsigned int ctl;
1225
1226 smc_10bt_check_media(dev, 0);
1227
1228 SMC_SELECT_BANK(lp, 1);
1229 ctl = SMC_GET_CTL(lp);
1230 SMC_SET_CTL(lp, ctl & ~CTL_LE_ENABLE);
1231 SMC_SET_CTL(lp, ctl);
1232 SMC_SELECT_BANK(lp, 2);
1233 }
1234
1235 /*
1236 * This is the main routine of the driver, to handle the device when
1237 * it needs some attention.
1238 */
1239 static irqreturn_t smc_interrupt(int irq, void *dev_id)
1240 {
1241 struct net_device *dev = dev_id;
1242 struct smc_local *lp = netdev_priv(dev);
1243 void __iomem *ioaddr = lp->base;
1244 int status, mask, timeout, card_stats;
1245 int saved_pointer;
1246
1247 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
1248
1249 spin_lock(&lp->lock);
1250
1251 /* A preamble may be used when there is a potential race
1252 * between the interruptible transmit functions and this
1253 * ISR. */
1254 SMC_INTERRUPT_PREAMBLE;
1255
1256 saved_pointer = SMC_GET_PTR(lp);
1257 mask = SMC_GET_INT_MASK(lp);
1258 SMC_SET_INT_MASK(lp, 0);
1259
1260 /* set a timeout value, so I don't stay here forever */
1261 timeout = MAX_IRQ_LOOPS;
1262
1263 do {
1264 status = SMC_GET_INT(lp);
1265
1266 DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1267 dev->name, status, mask,
1268 ({ int meminfo; SMC_SELECT_BANK(lp, 0);
1269 meminfo = SMC_GET_MIR(lp);
1270 SMC_SELECT_BANK(lp, 2); meminfo; }),
1271 SMC_GET_FIFO(lp));
1272
1273 status &= mask;
1274 if (!status)
1275 break;
1276
1277 if (status & IM_TX_INT) {
1278 /* do this before RX as it will free memory quickly */
1279 DBG(3, "%s: TX int\n", dev->name);
1280 smc_tx(dev);
1281 SMC_ACK_INT(lp, IM_TX_INT);
1282 if (THROTTLE_TX_PKTS)
1283 netif_wake_queue(dev);
1284 } else if (status & IM_RCV_INT) {
1285 DBG(3, "%s: RX irq\n", dev->name);
1286 smc_rcv(dev);
1287 } else if (status & IM_ALLOC_INT) {
1288 DBG(3, "%s: Allocation irq\n", dev->name);
1289 tasklet_hi_schedule(&lp->tx_task);
1290 mask &= ~IM_ALLOC_INT;
1291 } else if (status & IM_TX_EMPTY_INT) {
1292 DBG(3, "%s: TX empty\n", dev->name);
1293 mask &= ~IM_TX_EMPTY_INT;
1294
1295 /* update stats */
1296 SMC_SELECT_BANK(lp, 0);
1297 card_stats = SMC_GET_COUNTER(lp);
1298 SMC_SELECT_BANK(lp, 2);
1299
1300 /* single collisions */
1301 dev->stats.collisions += card_stats & 0xF;
1302 card_stats >>= 4;
1303
1304 /* multiple collisions */
1305 dev->stats.collisions += card_stats & 0xF;
1306 } else if (status & IM_RX_OVRN_INT) {
1307 DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
1308 ({ int eph_st; SMC_SELECT_BANK(lp, 0);
1309 eph_st = SMC_GET_EPH_STATUS(lp);
1310 SMC_SELECT_BANK(lp, 2); eph_st; }));
1311 SMC_ACK_INT(lp, IM_RX_OVRN_INT);
1312 dev->stats.rx_errors++;
1313 dev->stats.rx_fifo_errors++;
1314 } else if (status & IM_EPH_INT) {
1315 smc_eph_interrupt(dev);
1316 } else if (status & IM_MDINT) {
1317 SMC_ACK_INT(lp, IM_MDINT);
1318 smc_phy_interrupt(dev);
1319 } else if (status & IM_ERCV_INT) {
1320 SMC_ACK_INT(lp, IM_ERCV_INT);
1321 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
1322 }
1323 } while (--timeout);
1324
1325 /* restore register states */
1326 SMC_SET_PTR(lp, saved_pointer);
1327 SMC_SET_INT_MASK(lp, mask);
1328 spin_unlock(&lp->lock);
1329
1330 #ifndef CONFIG_NET_POLL_CONTROLLER
1331 if (timeout == MAX_IRQ_LOOPS)
1332 PRINTK("%s: spurious interrupt (mask = 0x%02x)\n",
1333 dev->name, mask);
1334 #endif
1335 DBG(3, "%s: Interrupt done (%d loops)\n",
1336 dev->name, MAX_IRQ_LOOPS - timeout);
1337
1338 /*
1339 * We return IRQ_HANDLED unconditionally here even if there was
1340 * nothing to do. There is a possibility that a packet might
1341 * get enqueued into the chip right after TX_EMPTY_INT is raised
1342 * but just before the CPU acknowledges the IRQ.
1343 * Better take an unneeded IRQ in some occasions than complexifying
1344 * the code for all cases.
1345 */
1346 return IRQ_HANDLED;
1347 }
1348
1349 #ifdef CONFIG_NET_POLL_CONTROLLER
1350 /*
1351 * Polling receive - used by netconsole and other diagnostic tools
1352 * to allow network i/o with interrupts disabled.
1353 */
1354 static void smc_poll_controller(struct net_device *dev)
1355 {
1356 disable_irq(dev->irq);
1357 smc_interrupt(dev->irq, dev);
1358 enable_irq(dev->irq);
1359 }
1360 #endif
1361
1362 /* Our watchdog timed out. Called by the networking layer */
1363 static void smc_timeout(struct net_device *dev)
1364 {
1365 struct smc_local *lp = netdev_priv(dev);
1366 void __iomem *ioaddr = lp->base;
1367 int status, mask, eph_st, meminfo, fifo;
1368
1369 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1370
1371 spin_lock_irq(&lp->lock);
1372 status = SMC_GET_INT(lp);
1373 mask = SMC_GET_INT_MASK(lp);
1374 fifo = SMC_GET_FIFO(lp);
1375 SMC_SELECT_BANK(lp, 0);
1376 eph_st = SMC_GET_EPH_STATUS(lp);
1377 meminfo = SMC_GET_MIR(lp);
1378 SMC_SELECT_BANK(lp, 2);
1379 spin_unlock_irq(&lp->lock);
1380 PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
1381 "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1382 dev->name, status, mask, meminfo, fifo, eph_st );
1383
1384 smc_reset(dev);
1385 smc_enable(dev);
1386
1387 /*
1388 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1389 * smc_phy_configure() calls msleep() which calls schedule_timeout()
1390 * which calls schedule(). Hence we use a work queue.
1391 */
1392 if (lp->phy_type != 0) {
1393 if (schedule_work(&lp->phy_configure)) {
1394 lp->work_pending = 1;
1395 }
1396 }
1397
1398 /* We can accept TX packets again */
1399 dev->trans_start = jiffies;
1400 netif_wake_queue(dev);
1401 }
1402
1403 /*
1404 * This routine will, depending on the values passed to it,
1405 * either make it accept multicast packets, go into
1406 * promiscuous mode (for TCPDUMP and cousins) or accept
1407 * a select set of multicast packets
1408 */
1409 static void smc_set_multicast_list(struct net_device *dev)
1410 {
1411 struct smc_local *lp = netdev_priv(dev);
1412 void __iomem *ioaddr = lp->base;
1413 unsigned char multicast_table[8];
1414 int update_multicast = 0;
1415
1416 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1417
1418 if (dev->flags & IFF_PROMISC) {
1419 DBG(2, "%s: RCR_PRMS\n", dev->name);
1420 lp->rcr_cur_mode |= RCR_PRMS;
1421 }
1422
1423 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1424 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1425 when promiscuous mode is turned on.
1426 */
1427
1428 /*
1429 * Here, I am setting this to accept all multicast packets.
1430 * I don't need to zero the multicast table, because the flag is
1431 * checked before the table is
1432 */
1433 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1434 DBG(2, "%s: RCR_ALMUL\n", dev->name);
1435 lp->rcr_cur_mode |= RCR_ALMUL;
1436 }
1437
1438 /*
1439 * This sets the internal hardware table to filter out unwanted
1440 * multicast packets before they take up memory.
1441 *
1442 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1443 * address are the offset into the table. If that bit is 1, then the
1444 * multicast packet is accepted. Otherwise, it's dropped silently.
1445 *
1446 * To use the 6 bits as an offset into the table, the high 3 bits are
1447 * the number of the 8 bit register, while the low 3 bits are the bit
1448 * within that register.
1449 */
1450 else if (dev->mc_count) {
1451 int i;
1452 struct dev_mc_list *cur_addr;
1453
1454 /* table for flipping the order of 3 bits */
1455 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1456
1457 /* start with a table of all zeros: reject all */
1458 memset(multicast_table, 0, sizeof(multicast_table));
1459
1460 cur_addr = dev->mc_list;
1461 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1462 int position;
1463
1464 /* do we have a pointer here? */
1465 if (!cur_addr)
1466 break;
1467 /* make sure this is a multicast address -
1468 shouldn't this be a given if we have it here ? */
1469 if (!(*cur_addr->dmi_addr & 1))
1470 continue;
1471
1472 /* only use the low order bits */
1473 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1474
1475 /* do some messy swapping to put the bit in the right spot */
1476 multicast_table[invert3[position&7]] |=
1477 (1<<invert3[(position>>3)&7]);
1478 }
1479
1480 /* be sure I get rid of flags I might have set */
1481 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1482
1483 /* now, the table can be loaded into the chipset */
1484 update_multicast = 1;
1485 } else {
1486 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
1487 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1488
1489 /*
1490 * since I'm disabling all multicast entirely, I need to
1491 * clear the multicast list
1492 */
1493 memset(multicast_table, 0, sizeof(multicast_table));
1494 update_multicast = 1;
1495 }
1496
1497 spin_lock_irq(&lp->lock);
1498 SMC_SELECT_BANK(lp, 0);
1499 SMC_SET_RCR(lp, lp->rcr_cur_mode);
1500 if (update_multicast) {
1501 SMC_SELECT_BANK(lp, 3);
1502 SMC_SET_MCAST(lp, multicast_table);
1503 }
1504 SMC_SELECT_BANK(lp, 2);
1505 spin_unlock_irq(&lp->lock);
1506 }
1507
1508
1509 /*
1510 * Open and Initialize the board
1511 *
1512 * Set up everything, reset the card, etc..
1513 */
1514 static int
1515 smc_open(struct net_device *dev)
1516 {
1517 struct smc_local *lp = netdev_priv(dev);
1518
1519 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1520
1521 /*
1522 * Check that the address is valid. If its not, refuse
1523 * to bring the device up. The user must specify an
1524 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1525 */
1526 if (!is_valid_ether_addr(dev->dev_addr)) {
1527 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1528 return -EINVAL;
1529 }
1530
1531 /* Setup the default Register Modes */
1532 lp->tcr_cur_mode = TCR_DEFAULT;
1533 lp->rcr_cur_mode = RCR_DEFAULT;
1534 lp->rpc_cur_mode = RPC_DEFAULT;
1535
1536 /*
1537 * If we are not using a MII interface, we need to
1538 * monitor our own carrier signal to detect faults.
1539 */
1540 if (lp->phy_type == 0)
1541 lp->tcr_cur_mode |= TCR_MON_CSN;
1542
1543 /* reset the hardware */
1544 smc_reset(dev);
1545 smc_enable(dev);
1546
1547 /* Configure the PHY, initialize the link state */
1548 if (lp->phy_type != 0)
1549 smc_phy_configure(&lp->phy_configure);
1550 else {
1551 spin_lock_irq(&lp->lock);
1552 smc_10bt_check_media(dev, 1);
1553 spin_unlock_irq(&lp->lock);
1554 }
1555
1556 netif_start_queue(dev);
1557 return 0;
1558 }
1559
1560 /*
1561 * smc_close
1562 *
1563 * this makes the board clean up everything that it can
1564 * and not talk to the outside world. Caused by
1565 * an 'ifconfig ethX down'
1566 */
1567 static int smc_close(struct net_device *dev)
1568 {
1569 struct smc_local *lp = netdev_priv(dev);
1570
1571 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1572
1573 netif_stop_queue(dev);
1574 netif_carrier_off(dev);
1575
1576 /* clear everything */
1577 smc_shutdown(dev);
1578 tasklet_kill(&lp->tx_task);
1579 smc_phy_powerdown(dev);
1580 return 0;
1581 }
1582
1583 /*
1584 * Ethtool support
1585 */
1586 static int
1587 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1588 {
1589 struct smc_local *lp = netdev_priv(dev);
1590 int ret;
1591
1592 cmd->maxtxpkt = 1;
1593 cmd->maxrxpkt = 1;
1594
1595 if (lp->phy_type != 0) {
1596 spin_lock_irq(&lp->lock);
1597 ret = mii_ethtool_gset(&lp->mii, cmd);
1598 spin_unlock_irq(&lp->lock);
1599 } else {
1600 cmd->supported = SUPPORTED_10baseT_Half |
1601 SUPPORTED_10baseT_Full |
1602 SUPPORTED_TP | SUPPORTED_AUI;
1603
1604 if (lp->ctl_rspeed == 10)
1605 cmd->speed = SPEED_10;
1606 else if (lp->ctl_rspeed == 100)
1607 cmd->speed = SPEED_100;
1608
1609 cmd->autoneg = AUTONEG_DISABLE;
1610 cmd->transceiver = XCVR_INTERNAL;
1611 cmd->port = 0;
1612 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1613
1614 ret = 0;
1615 }
1616
1617 return ret;
1618 }
1619
1620 static int
1621 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1622 {
1623 struct smc_local *lp = netdev_priv(dev);
1624 int ret;
1625
1626 if (lp->phy_type != 0) {
1627 spin_lock_irq(&lp->lock);
1628 ret = mii_ethtool_sset(&lp->mii, cmd);
1629 spin_unlock_irq(&lp->lock);
1630 } else {
1631 if (cmd->autoneg != AUTONEG_DISABLE ||
1632 cmd->speed != SPEED_10 ||
1633 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1634 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1635 return -EINVAL;
1636
1637 // lp->port = cmd->port;
1638 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1639
1640 // if (netif_running(dev))
1641 // smc_set_port(dev);
1642
1643 ret = 0;
1644 }
1645
1646 return ret;
1647 }
1648
1649 static void
1650 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1651 {
1652 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1653 strncpy(info->version, version, sizeof(info->version));
1654 strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
1655 }
1656
1657 static int smc_ethtool_nwayreset(struct net_device *dev)
1658 {
1659 struct smc_local *lp = netdev_priv(dev);
1660 int ret = -EINVAL;
1661
1662 if (lp->phy_type != 0) {
1663 spin_lock_irq(&lp->lock);
1664 ret = mii_nway_restart(&lp->mii);
1665 spin_unlock_irq(&lp->lock);
1666 }
1667
1668 return ret;
1669 }
1670
1671 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1672 {
1673 struct smc_local *lp = netdev_priv(dev);
1674 return lp->msg_enable;
1675 }
1676
1677 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1678 {
1679 struct smc_local *lp = netdev_priv(dev);
1680 lp->msg_enable = level;
1681 }
1682
1683 static const struct ethtool_ops smc_ethtool_ops = {
1684 .get_settings = smc_ethtool_getsettings,
1685 .set_settings = smc_ethtool_setsettings,
1686 .get_drvinfo = smc_ethtool_getdrvinfo,
1687
1688 .get_msglevel = smc_ethtool_getmsglevel,
1689 .set_msglevel = smc_ethtool_setmsglevel,
1690 .nway_reset = smc_ethtool_nwayreset,
1691 .get_link = ethtool_op_get_link,
1692 // .get_eeprom = smc_ethtool_geteeprom,
1693 // .set_eeprom = smc_ethtool_seteeprom,
1694 };
1695
1696 /*
1697 * smc_findirq
1698 *
1699 * This routine has a simple purpose -- make the SMC chip generate an
1700 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1701 */
1702 /*
1703 * does this still work?
1704 *
1705 * I just deleted auto_irq.c, since it was never built...
1706 * --jgarzik
1707 */
1708 static int __init smc_findirq(struct smc_local *lp)
1709 {
1710 void __iomem *ioaddr = lp->base;
1711 int timeout = 20;
1712 unsigned long cookie;
1713
1714 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1715
1716 cookie = probe_irq_on();
1717
1718 /*
1719 * What I try to do here is trigger an ALLOC_INT. This is done
1720 * by allocating a small chunk of memory, which will give an interrupt
1721 * when done.
1722 */
1723 /* enable ALLOCation interrupts ONLY */
1724 SMC_SELECT_BANK(lp, 2);
1725 SMC_SET_INT_MASK(lp, IM_ALLOC_INT);
1726
1727 /*
1728 * Allocate 512 bytes of memory. Note that the chip was just
1729 * reset so all the memory is available
1730 */
1731 SMC_SET_MMU_CMD(lp, MC_ALLOC | 1);
1732
1733 /*
1734 * Wait until positive that the interrupt has been generated
1735 */
1736 do {
1737 int int_status;
1738 udelay(10);
1739 int_status = SMC_GET_INT(lp);
1740 if (int_status & IM_ALLOC_INT)
1741 break; /* got the interrupt */
1742 } while (--timeout);
1743
1744 /*
1745 * there is really nothing that I can do here if timeout fails,
1746 * as autoirq_report will return a 0 anyway, which is what I
1747 * want in this case. Plus, the clean up is needed in both
1748 * cases.
1749 */
1750
1751 /* and disable all interrupts again */
1752 SMC_SET_INT_MASK(lp, 0);
1753
1754 /* and return what I found */
1755 return probe_irq_off(cookie);
1756 }
1757
1758 /*
1759 * Function: smc_probe(unsigned long ioaddr)
1760 *
1761 * Purpose:
1762 * Tests to see if a given ioaddr points to an SMC91x chip.
1763 * Returns a 0 on success
1764 *
1765 * Algorithm:
1766 * (1) see if the high byte of BANK_SELECT is 0x33
1767 * (2) compare the ioaddr with the base register's address
1768 * (3) see if I recognize the chip ID in the appropriate register
1769 *
1770 * Here I do typical initialization tasks.
1771 *
1772 * o Initialize the structure if needed
1773 * o print out my vanity message if not done so already
1774 * o print out what type of hardware is detected
1775 * o print out the ethernet address
1776 * o find the IRQ
1777 * o set up my private data
1778 * o configure the dev structure with my subroutines
1779 * o actually GRAB the irq.
1780 * o GRAB the region
1781 */
1782 static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr,
1783 unsigned long irq_flags)
1784 {
1785 struct smc_local *lp = netdev_priv(dev);
1786 static int version_printed = 0;
1787 int retval;
1788 unsigned int val, revision_register;
1789 const char *version_string;
1790 DECLARE_MAC_BUF(mac);
1791
1792 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1793
1794 /* First, see if the high byte is 0x33 */
1795 val = SMC_CURRENT_BANK(lp);
1796 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
1797 if ((val & 0xFF00) != 0x3300) {
1798 if ((val & 0xFF) == 0x33) {
1799 printk(KERN_WARNING
1800 "%s: Detected possible byte-swapped interface"
1801 " at IOADDR %p\n", CARDNAME, ioaddr);
1802 }
1803 retval = -ENODEV;
1804 goto err_out;
1805 }
1806
1807 /*
1808 * The above MIGHT indicate a device, but I need to write to
1809 * further test this.
1810 */
1811 SMC_SELECT_BANK(lp, 0);
1812 val = SMC_CURRENT_BANK(lp);
1813 if ((val & 0xFF00) != 0x3300) {
1814 retval = -ENODEV;
1815 goto err_out;
1816 }
1817
1818 /*
1819 * well, we've already written once, so hopefully another
1820 * time won't hurt. This time, I need to switch the bank
1821 * register to bank 1, so I can access the base address
1822 * register
1823 */
1824 SMC_SELECT_BANK(lp, 1);
1825 val = SMC_GET_BASE(lp);
1826 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1827 if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
1828 printk("%s: IOADDR %p doesn't match configuration (%x).\n",
1829 CARDNAME, ioaddr, val);
1830 }
1831
1832 /*
1833 * check if the revision register is something that I
1834 * recognize. These might need to be added to later,
1835 * as future revisions could be added.
1836 */
1837 SMC_SELECT_BANK(lp, 3);
1838 revision_register = SMC_GET_REV(lp);
1839 DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1840 version_string = chip_ids[ (revision_register >> 4) & 0xF];
1841 if (!version_string || (revision_register & 0xff00) != 0x3300) {
1842 /* I don't recognize this chip, so... */
1843 printk("%s: IO %p: Unrecognized revision register 0x%04x"
1844 ", Contact author.\n", CARDNAME,
1845 ioaddr, revision_register);
1846
1847 retval = -ENODEV;
1848 goto err_out;
1849 }
1850
1851 /* At this point I'll assume that the chip is an SMC91x. */
1852 if (version_printed++ == 0)
1853 printk("%s", version);
1854
1855 /* fill in some of the fields */
1856 dev->base_addr = (unsigned long)ioaddr;
1857 lp->base = ioaddr;
1858 lp->version = revision_register & 0xff;
1859 spin_lock_init(&lp->lock);
1860
1861 /* Get the MAC address */
1862 SMC_SELECT_BANK(lp, 1);
1863 SMC_GET_MAC_ADDR(lp, dev->dev_addr);
1864
1865 /* now, reset the chip, and put it into a known state */
1866 smc_reset(dev);
1867
1868 /*
1869 * If dev->irq is 0, then the device has to be banged on to see
1870 * what the IRQ is.
1871 *
1872 * This banging doesn't always detect the IRQ, for unknown reasons.
1873 * a workaround is to reset the chip and try again.
1874 *
1875 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1876 * be what is requested on the command line. I don't do that, mostly
1877 * because the card that I have uses a non-standard method of accessing
1878 * the IRQs, and because this _should_ work in most configurations.
1879 *
1880 * Specifying an IRQ is done with the assumption that the user knows
1881 * what (s)he is doing. No checking is done!!!!
1882 */
1883 if (dev->irq < 1) {
1884 int trials;
1885
1886 trials = 3;
1887 while (trials--) {
1888 dev->irq = smc_findirq(lp);
1889 if (dev->irq)
1890 break;
1891 /* kick the card and try again */
1892 smc_reset(dev);
1893 }
1894 }
1895 if (dev->irq == 0) {
1896 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1897 dev->name);
1898 retval = -ENODEV;
1899 goto err_out;
1900 }
1901 dev->irq = irq_canonicalize(dev->irq);
1902
1903 /* Fill in the fields of the device structure with ethernet values. */
1904 ether_setup(dev);
1905
1906 dev->open = smc_open;
1907 dev->stop = smc_close;
1908 dev->hard_start_xmit = smc_hard_start_xmit;
1909 dev->tx_timeout = smc_timeout;
1910 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1911 dev->set_multicast_list = smc_set_multicast_list;
1912 dev->ethtool_ops = &smc_ethtool_ops;
1913 #ifdef CONFIG_NET_POLL_CONTROLLER
1914 dev->poll_controller = smc_poll_controller;
1915 #endif
1916
1917 tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1918 INIT_WORK(&lp->phy_configure, smc_phy_configure);
1919 lp->dev = dev;
1920 lp->mii.phy_id_mask = 0x1f;
1921 lp->mii.reg_num_mask = 0x1f;
1922 lp->mii.force_media = 0;
1923 lp->mii.full_duplex = 0;
1924 lp->mii.dev = dev;
1925 lp->mii.mdio_read = smc_phy_read;
1926 lp->mii.mdio_write = smc_phy_write;
1927
1928 /*
1929 * Locate the phy, if any.
1930 */
1931 if (lp->version >= (CHIP_91100 << 4))
1932 smc_phy_detect(dev);
1933
1934 /* then shut everything down to save power */
1935 smc_shutdown(dev);
1936 smc_phy_powerdown(dev);
1937
1938 /* Set default parameters */
1939 lp->msg_enable = NETIF_MSG_LINK;
1940 lp->ctl_rfduplx = 0;
1941 lp->ctl_rspeed = 10;
1942
1943 if (lp->version >= (CHIP_91100 << 4)) {
1944 lp->ctl_rfduplx = 1;
1945 lp->ctl_rspeed = 100;
1946 }
1947
1948 /* Grab the IRQ */
1949 retval = request_irq(dev->irq, &smc_interrupt, irq_flags, dev->name, dev);
1950 if (retval)
1951 goto err_out;
1952
1953 #ifdef SMC_USE_PXA_DMA
1954 {
1955 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
1956 smc_pxa_dma_irq, NULL);
1957 if (dma >= 0)
1958 dev->dma = dma;
1959 }
1960 #endif
1961
1962 retval = register_netdev(dev);
1963 if (retval == 0) {
1964 /* now, print out the card info, in a short format.. */
1965 printk("%s: %s (rev %d) at %p IRQ %d",
1966 dev->name, version_string, revision_register & 0x0f,
1967 lp->base, dev->irq);
1968
1969 if (dev->dma != (unsigned char)-1)
1970 printk(" DMA %d", dev->dma);
1971
1972 printk("%s%s\n", nowait ? " [nowait]" : "",
1973 THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
1974
1975 if (!is_valid_ether_addr(dev->dev_addr)) {
1976 printk("%s: Invalid ethernet MAC address. Please "
1977 "set using ifconfig\n", dev->name);
1978 } else {
1979 /* Print the Ethernet address */
1980 printk("%s: Ethernet addr: %s\n",
1981 dev->name, print_mac(mac, dev->dev_addr));
1982 }
1983
1984 if (lp->phy_type == 0) {
1985 PRINTK("%s: No PHY found\n", dev->name);
1986 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
1987 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
1988 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
1989 PRINTK("%s: PHY LAN83C180\n", dev->name);
1990 }
1991 }
1992
1993 err_out:
1994 #ifdef SMC_USE_PXA_DMA
1995 if (retval && dev->dma != (unsigned char)-1)
1996 pxa_free_dma(dev->dma);
1997 #endif
1998 return retval;
1999 }
2000
2001 static int smc_enable_device(struct platform_device *pdev)
2002 {
2003 struct net_device *ndev = platform_get_drvdata(pdev);
2004 struct smc_local *lp = netdev_priv(ndev);
2005 unsigned long flags;
2006 unsigned char ecor, ecsr;
2007 void __iomem *addr;
2008 struct resource * res;
2009
2010 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2011 if (!res)
2012 return 0;
2013
2014 /*
2015 * Map the attribute space. This is overkill, but clean.
2016 */
2017 addr = ioremap(res->start, ATTRIB_SIZE);
2018 if (!addr)
2019 return -ENOMEM;
2020
2021 /*
2022 * Reset the device. We must disable IRQs around this
2023 * since a reset causes the IRQ line become active.
2024 */
2025 local_irq_save(flags);
2026 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
2027 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
2028 readb(addr + (ECOR << SMC_IO_SHIFT));
2029
2030 /*
2031 * Wait 100us for the chip to reset.
2032 */
2033 udelay(100);
2034
2035 /*
2036 * The device will ignore all writes to the enable bit while
2037 * reset is asserted, even if the reset bit is cleared in the
2038 * same write. Must clear reset first, then enable the device.
2039 */
2040 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2041 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2042
2043 /*
2044 * Set the appropriate byte/word mode.
2045 */
2046 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2047 if (!SMC_16BIT(lp))
2048 ecsr |= ECSR_IOIS8;
2049 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2050 local_irq_restore(flags);
2051
2052 iounmap(addr);
2053
2054 /*
2055 * Wait for the chip to wake up. We could poll the control
2056 * register in the main register space, but that isn't mapped
2057 * yet. We know this is going to take 750us.
2058 */
2059 msleep(1);
2060
2061 return 0;
2062 }
2063
2064 static int smc_request_attrib(struct platform_device *pdev)
2065 {
2066 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2067
2068 if (!res)
2069 return 0;
2070
2071 if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
2072 return -EBUSY;
2073
2074 return 0;
2075 }
2076
2077 static void smc_release_attrib(struct platform_device *pdev)
2078 {
2079 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2080
2081 if (res)
2082 release_mem_region(res->start, ATTRIB_SIZE);
2083 }
2084
2085 static inline void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
2086 {
2087 if (SMC_CAN_USE_DATACS) {
2088 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2089 struct smc_local *lp = netdev_priv(ndev);
2090
2091 if (!res)
2092 return;
2093
2094 if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
2095 printk(KERN_INFO "%s: failed to request datacs memory region.\n", CARDNAME);
2096 return;
2097 }
2098
2099 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2100 }
2101 }
2102
2103 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
2104 {
2105 if (SMC_CAN_USE_DATACS) {
2106 struct smc_local *lp = netdev_priv(ndev);
2107 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2108
2109 if (lp->datacs)
2110 iounmap(lp->datacs);
2111
2112 lp->datacs = NULL;
2113
2114 if (res)
2115 release_mem_region(res->start, SMC_DATA_EXTENT);
2116 }
2117 }
2118
2119 /*
2120 * smc_init(void)
2121 * Input parameters:
2122 * dev->base_addr == 0, try to find all possible locations
2123 * dev->base_addr > 0x1ff, this is the address to check
2124 * dev->base_addr == <anything else>, return failure code
2125 *
2126 * Output:
2127 * 0 --> there is a device
2128 * anything else, error
2129 */
2130 static int smc_drv_probe(struct platform_device *pdev)
2131 {
2132 struct smc91x_platdata *pd = pdev->dev.platform_data;
2133 struct smc_local *lp;
2134 struct net_device *ndev;
2135 struct resource *res, *ires;
2136 unsigned int __iomem *addr;
2137 int ret;
2138
2139 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2140 if (!res)
2141 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2142 if (!res) {
2143 ret = -ENODEV;
2144 goto out;
2145 }
2146
2147
2148 if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
2149 ret = -EBUSY;
2150 goto out;
2151 }
2152
2153 ndev = alloc_etherdev(sizeof(struct smc_local));
2154 if (!ndev) {
2155 printk("%s: could not allocate device.\n", CARDNAME);
2156 ret = -ENOMEM;
2157 goto out_release_io;
2158 }
2159 SET_NETDEV_DEV(ndev, &pdev->dev);
2160
2161 /* get configuration from platform data, only allow use of
2162 * bus width if both SMC_CAN_USE_xxx and SMC91X_USE_xxx are set.
2163 */
2164
2165 lp = netdev_priv(ndev);
2166 lp->cfg.irq_flags = SMC_IRQ_FLAGS;
2167
2168 #ifdef SMC_DYNAMIC_BUS_CONFIG
2169 if (pd)
2170 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2171 else {
2172 lp->cfg.flags = SMC91X_USE_8BIT;
2173 lp->cfg.flags |= SMC91X_USE_16BIT;
2174 lp->cfg.flags |= SMC91X_USE_32BIT;
2175 }
2176
2177 lp->cfg.flags &= ~(SMC_CAN_USE_8BIT ? 0 : SMC91X_USE_8BIT);
2178 lp->cfg.flags &= ~(SMC_CAN_USE_16BIT ? 0 : SMC91X_USE_16BIT);
2179 lp->cfg.flags &= ~(SMC_CAN_USE_32BIT ? 0 : SMC91X_USE_32BIT);
2180 #endif
2181
2182 ndev->dma = (unsigned char)-1;
2183
2184 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2185 if (!ires) {
2186 ret = -ENODEV;
2187 goto out_free_netdev;
2188 }
2189
2190 ndev->irq = ires->start;
2191 if (SMC_IRQ_FLAGS == -1)
2192 lp->cfg.irq_flags = ires->flags & IRQF_TRIGGER_MASK;
2193
2194 ret = smc_request_attrib(pdev);
2195 if (ret)
2196 goto out_free_netdev;
2197 #if defined(CONFIG_SA1100_ASSABET)
2198 NCR_0 |= NCR_ENET_OSC_EN;
2199 #endif
2200 platform_set_drvdata(pdev, ndev);
2201 ret = smc_enable_device(pdev);
2202 if (ret)
2203 goto out_release_attrib;
2204
2205 addr = ioremap(res->start, SMC_IO_EXTENT);
2206 if (!addr) {
2207 ret = -ENOMEM;
2208 goto out_release_attrib;
2209 }
2210
2211 #ifdef SMC_USE_PXA_DMA
2212 {
2213 struct smc_local *lp = netdev_priv(ndev);
2214 lp->device = &pdev->dev;
2215 lp->physaddr = res->start;
2216 }
2217 #endif
2218
2219 ret = smc_probe(ndev, addr, lp->cfg.irq_flags);
2220 if (ret != 0)
2221 goto out_iounmap;
2222
2223 smc_request_datacs(pdev, ndev);
2224
2225 return 0;
2226
2227 out_iounmap:
2228 platform_set_drvdata(pdev, NULL);
2229 iounmap(addr);
2230 out_release_attrib:
2231 smc_release_attrib(pdev);
2232 out_free_netdev:
2233 free_netdev(ndev);
2234 out_release_io:
2235 release_mem_region(res->start, SMC_IO_EXTENT);
2236 out:
2237 printk("%s: not found (%d).\n", CARDNAME, ret);
2238
2239 return ret;
2240 }
2241
2242 static int smc_drv_remove(struct platform_device *pdev)
2243 {
2244 struct net_device *ndev = platform_get_drvdata(pdev);
2245 struct smc_local *lp = netdev_priv(ndev);
2246 struct resource *res;
2247
2248 platform_set_drvdata(pdev, NULL);
2249
2250 unregister_netdev(ndev);
2251
2252 free_irq(ndev->irq, ndev);
2253
2254 #ifdef SMC_USE_PXA_DMA
2255 if (ndev->dma != (unsigned char)-1)
2256 pxa_free_dma(ndev->dma);
2257 #endif
2258 iounmap(lp->base);
2259
2260 smc_release_datacs(pdev,ndev);
2261 smc_release_attrib(pdev);
2262
2263 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2264 if (!res)
2265 platform_get_resource(pdev, IORESOURCE_MEM, 0);
2266 release_mem_region(res->start, SMC_IO_EXTENT);
2267
2268 free_netdev(ndev);
2269
2270 return 0;
2271 }
2272
2273 static int smc_drv_suspend(struct platform_device *dev, pm_message_t state)
2274 {
2275 struct net_device *ndev = platform_get_drvdata(dev);
2276
2277 if (ndev) {
2278 if (netif_running(ndev)) {
2279 netif_device_detach(ndev);
2280 smc_shutdown(ndev);
2281 smc_phy_powerdown(ndev);
2282 }
2283 }
2284 return 0;
2285 }
2286
2287 static int smc_drv_resume(struct platform_device *dev)
2288 {
2289 struct net_device *ndev = platform_get_drvdata(dev);
2290
2291 if (ndev) {
2292 struct smc_local *lp = netdev_priv(ndev);
2293 smc_enable_device(dev);
2294 if (netif_running(ndev)) {
2295 smc_reset(ndev);
2296 smc_enable(ndev);
2297 if (lp->phy_type != 0)
2298 smc_phy_configure(&lp->phy_configure);
2299 netif_device_attach(ndev);
2300 }
2301 }
2302 return 0;
2303 }
2304
2305 static struct platform_driver smc_driver = {
2306 .probe = smc_drv_probe,
2307 .remove = smc_drv_remove,
2308 .suspend = smc_drv_suspend,
2309 .resume = smc_drv_resume,
2310 .driver = {
2311 .name = CARDNAME,
2312 .owner = THIS_MODULE,
2313 },
2314 };
2315
2316 static int __init smc_init(void)
2317 {
2318 #ifdef MODULE
2319 #ifdef CONFIG_ISA
2320 if (io == -1)
2321 printk(KERN_WARNING
2322 "%s: You shouldn't use auto-probing with insmod!\n",
2323 CARDNAME);
2324 #endif
2325 #endif
2326
2327 return platform_driver_register(&smc_driver);
2328 }
2329
2330 static void __exit smc_cleanup(void)
2331 {
2332 platform_driver_unregister(&smc_driver);
2333 }
2334
2335 module_init(smc_init);
2336 module_exit(smc_cleanup);
Linux kernel - Deliverables
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