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Remove two unneeded exports and make two symbols static in fs/mpage.c
[deliverable/linux.git] / drivers / net / tokenring / 3c359.c
1 /*
2 * 3c359.c (c) 2000 Mike Phillips (mikep@linuxtr.net) All Rights Reserved
3 *
4 * Linux driver for 3Com 3c359 Tokenlink Velocity XL PCI NIC
5 *
6 * Base Driver Olympic:
7 * Written 1999 Peter De Schrijver & Mike Phillips
8 *
9 * This software may be used and distributed according to the terms
10 * of the GNU General Public License, incorporated herein by reference.
11 *
12 * 7/17/00 - Clean up, version number 0.9.0. Ready to release to the world.
13 *
14 * 2/16/01 - Port up to kernel 2.4.2 ready for submission into the kernel.
15 * 3/05/01 - Last clean up stuff before submission.
16 * 2/15/01 - Finally, update to new pci api.
17 *
18 * To Do:
19 */
20
21 /*
22 * Technical Card Details
23 *
24 * All access to data is done with 16/8 bit transfers. The transfer
25 * method really sucks. You can only read or write one location at a time.
26 *
27 * Also, the microcode for the card must be uploaded if the card does not have
28 * the flashrom on board. This is a 28K bloat in the driver when compiled
29 * as a module.
30 *
31 * Rx is very simple, status into a ring of descriptors, dma data transfer,
32 * interrupts to tell us when a packet is received.
33 *
34 * Tx is a little more interesting. Similar scenario, descriptor and dma data
35 * transfers, but we don't have to interrupt the card to tell it another packet
36 * is ready for transmission, we are just doing simple memory writes, not io or mmio
37 * writes. The card can be set up to simply poll on the next
38 * descriptor pointer and when this value is non-zero will automatically download
39 * the next packet. The card then interrupts us when the packet is done.
40 *
41 */
42
43 #define XL_DEBUG 0
44
45 #include <linux/jiffies.h>
46 #include <linux/module.h>
47 #include <linux/kernel.h>
48 #include <linux/errno.h>
49 #include <linux/timer.h>
50 #include <linux/in.h>
51 #include <linux/ioport.h>
52 #include <linux/string.h>
53 #include <linux/proc_fs.h>
54 #include <linux/ptrace.h>
55 #include <linux/skbuff.h>
56 #include <linux/interrupt.h>
57 #include <linux/delay.h>
58 #include <linux/netdevice.h>
59 #include <linux/trdevice.h>
60 #include <linux/stddef.h>
61 #include <linux/init.h>
62 #include <linux/pci.h>
63 #include <linux/spinlock.h>
64 #include <linux/bitops.h>
65
66 #include <net/checksum.h>
67
68 #include <asm/io.h>
69 #include <asm/system.h>
70
71 #include "3c359.h"
72
73 static char version[] __devinitdata =
74 "3c359.c v1.2.0 2/17/01 - Mike Phillips (mikep@linuxtr.net)" ;
75
76 MODULE_AUTHOR("Mike Phillips <mikep@linuxtr.net>") ;
77 MODULE_DESCRIPTION("3Com 3C359 Velocity XL Token Ring Adapter Driver \n") ;
78
79 /* Module paramters */
80
81 /* Ring Speed 0,4,16
82 * 0 = Autosense
83 * 4,16 = Selected speed only, no autosense
84 * This allows the card to be the first on the ring
85 * and become the active monitor.
86 *
87 * WARNING: Some hubs will allow you to insert
88 * at the wrong speed.
89 *
90 * The adapter will _not_ fail to open if there are no
91 * active monitors on the ring, it will simply open up in
92 * its last known ringspeed if no ringspeed is specified.
93 */
94
95 static int ringspeed[XL_MAX_ADAPTERS] = {0,} ;
96
97 module_param_array(ringspeed, int, NULL, 0);
98 MODULE_PARM_DESC(ringspeed,"3c359: Ringspeed selection - 4,16 or 0") ;
99
100 /* Packet buffer size */
101
102 static int pkt_buf_sz[XL_MAX_ADAPTERS] = {0,} ;
103
104 module_param_array(pkt_buf_sz, int, NULL, 0) ;
105 MODULE_PARM_DESC(pkt_buf_sz,"3c359: Initial buffer size") ;
106 /* Message Level */
107
108 static int message_level[XL_MAX_ADAPTERS] = {0,} ;
109
110 module_param_array(message_level, int, NULL, 0) ;
111 MODULE_PARM_DESC(message_level, "3c359: Level of reported messages") ;
112 /*
113 * This is a real nasty way of doing this, but otherwise you
114 * will be stuck with 1555 lines of hex #'s in the code.
115 */
116
117 #include "3c359_microcode.h"
118
119 static struct pci_device_id xl_pci_tbl[] =
120 {
121 {PCI_VENDOR_ID_3COM,PCI_DEVICE_ID_3COM_3C359, PCI_ANY_ID, PCI_ANY_ID, },
122 { } /* terminate list */
123 };
124 MODULE_DEVICE_TABLE(pci,xl_pci_tbl) ;
125
126 static int xl_init(struct net_device *dev);
127 static int xl_open(struct net_device *dev);
128 static int xl_open_hw(struct net_device *dev) ;
129 static int xl_hw_reset(struct net_device *dev);
130 static int xl_xmit(struct sk_buff *skb, struct net_device *dev);
131 static void xl_dn_comp(struct net_device *dev);
132 static int xl_close(struct net_device *dev);
133 static void xl_set_rx_mode(struct net_device *dev);
134 static irqreturn_t xl_interrupt(int irq, void *dev_id);
135 static int xl_set_mac_address(struct net_device *dev, void *addr) ;
136 static void xl_arb_cmd(struct net_device *dev);
137 static void xl_asb_cmd(struct net_device *dev) ;
138 static void xl_srb_cmd(struct net_device *dev, int srb_cmd) ;
139 static void xl_wait_misr_flags(struct net_device *dev) ;
140 static int xl_change_mtu(struct net_device *dev, int mtu);
141 static void xl_srb_bh(struct net_device *dev) ;
142 static void xl_asb_bh(struct net_device *dev) ;
143 static void xl_reset(struct net_device *dev) ;
144 static void xl_freemem(struct net_device *dev) ;
145
146
147 /* EEProm Access Functions */
148 static u16 xl_ee_read(struct net_device *dev, int ee_addr) ;
149 static void xl_ee_write(struct net_device *dev, int ee_addr, u16 ee_value) ;
150
151 /* Debugging functions */
152 #if XL_DEBUG
153 static void print_tx_state(struct net_device *dev) ;
154 static void print_rx_state(struct net_device *dev) ;
155
156 static void print_tx_state(struct net_device *dev)
157 {
158
159 struct xl_private *xl_priv = netdev_priv(dev);
160 struct xl_tx_desc *txd ;
161 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
162 int i ;
163
164 printk("tx_ring_head: %d, tx_ring_tail: %d, free_ent: %d \n",xl_priv->tx_ring_head,
165 xl_priv->tx_ring_tail, xl_priv->free_ring_entries) ;
166 printk("Ring , Address , FSH , DnNextPtr, Buffer, Buffer_Len \n");
167 for (i = 0; i < 16; i++) {
168 txd = &(xl_priv->xl_tx_ring[i]) ;
169 printk("%d, %08lx, %08x, %08x, %08x, %08x \n", i, virt_to_bus(txd),
170 txd->framestartheader, txd->dnnextptr, txd->buffer, txd->buffer_length ) ;
171 }
172
173 printk("DNLISTPTR = %04x \n", readl(xl_mmio + MMIO_DNLISTPTR) );
174
175 printk("DmaCtl = %04x \n", readl(xl_mmio + MMIO_DMA_CTRL) );
176 printk("Queue status = %0x \n",netif_running(dev) ) ;
177 }
178
179 static void print_rx_state(struct net_device *dev)
180 {
181
182 struct xl_private *xl_priv = netdev_priv(dev);
183 struct xl_rx_desc *rxd ;
184 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
185 int i ;
186
187 printk("rx_ring_tail: %d \n", xl_priv->rx_ring_tail) ;
188 printk("Ring , Address , FrameState , UPNextPtr, FragAddr, Frag_Len \n");
189 for (i = 0; i < 16; i++) {
190 /* rxd = (struct xl_rx_desc *)xl_priv->rx_ring_dma_addr + (i * sizeof(struct xl_rx_desc)) ; */
191 rxd = &(xl_priv->xl_rx_ring[i]) ;
192 printk("%d, %08lx, %08x, %08x, %08x, %08x \n", i, virt_to_bus(rxd),
193 rxd->framestatus, rxd->upnextptr, rxd->upfragaddr, rxd->upfraglen ) ;
194 }
195
196 printk("UPLISTPTR = %04x \n", readl(xl_mmio + MMIO_UPLISTPTR) );
197
198 printk("DmaCtl = %04x \n", readl(xl_mmio + MMIO_DMA_CTRL) );
199 printk("Queue status = %0x \n",netif_running(dev) ) ;
200 }
201 #endif
202
203 /*
204 * Read values from the on-board EEProm. This looks very strange
205 * but you have to wait for the EEProm to get/set the value before
206 * passing/getting the next value from the nic. As with all requests
207 * on this nic it has to be done in two stages, a) tell the nic which
208 * memory address you want to access and b) pass/get the value from the nic.
209 * With the EEProm, you have to wait before and inbetween access a) and b).
210 * As this is only read at initialization time and the wait period is very
211 * small we shouldn't have to worry about scheduling issues.
212 */
213
214 static u16 xl_ee_read(struct net_device *dev, int ee_addr)
215 {
216 struct xl_private *xl_priv = netdev_priv(dev);
217 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
218
219 /* Wait for EEProm to not be busy */
220 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
221 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
222
223 /* Tell EEProm what we want to do and where */
224 writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
225 writew(EEREAD + ee_addr, xl_mmio + MMIO_MACDATA) ;
226
227 /* Wait for EEProm to not be busy */
228 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
229 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
230
231 /* Tell EEProm what we want to do and where */
232 writel(IO_WORD_WRITE | EECONTROL , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
233 writew(EEREAD + ee_addr, xl_mmio + MMIO_MACDATA) ;
234
235 /* Finally read the value from the EEProm */
236 writel(IO_WORD_READ | EEDATA , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
237 return readw(xl_mmio + MMIO_MACDATA) ;
238 }
239
240 /*
241 * Write values to the onboard eeprom. As with eeprom read you need to
242 * set which location to write, wait, value to write, wait, with the
243 * added twist of having to enable eeprom writes as well.
244 */
245
246 static void xl_ee_write(struct net_device *dev, int ee_addr, u16 ee_value)
247 {
248 struct xl_private *xl_priv = netdev_priv(dev);
249 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
250
251 /* Wait for EEProm to not be busy */
252 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
253 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
254
255 /* Enable write/erase */
256 writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
257 writew(EE_ENABLE_WRITE, xl_mmio + MMIO_MACDATA) ;
258
259 /* Wait for EEProm to not be busy */
260 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
261 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
262
263 /* Put the value we want to write into EEDATA */
264 writel(IO_WORD_WRITE | EEDATA, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
265 writew(ee_value, xl_mmio + MMIO_MACDATA) ;
266
267 /* Tell EEProm to write eevalue into ee_addr */
268 writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
269 writew(EEWRITE + ee_addr, xl_mmio + MMIO_MACDATA) ;
270
271 /* Wait for EEProm to not be busy, to ensure write gets done */
272 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
273 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
274
275 return ;
276 }
277
278 static const struct net_device_ops xl_netdev_ops = {
279 .ndo_open = xl_open,
280 .ndo_stop = xl_close,
281 .ndo_start_xmit = xl_xmit,
282 .ndo_change_mtu = xl_change_mtu,
283 .ndo_set_multicast_list = xl_set_rx_mode,
284 .ndo_set_mac_address = xl_set_mac_address,
285 };
286
287 static int __devinit xl_probe(struct pci_dev *pdev,
288 const struct pci_device_id *ent)
289 {
290 struct net_device *dev ;
291 struct xl_private *xl_priv ;
292 static int card_no = -1 ;
293 int i ;
294
295 card_no++ ;
296
297 if (pci_enable_device(pdev)) {
298 return -ENODEV ;
299 }
300
301 pci_set_master(pdev);
302
303 if ((i = pci_request_regions(pdev,"3c359"))) {
304 return i ;
305 } ;
306
307 /*
308 * Allowing init_trdev to allocate the private data will align
309 * xl_private on a 32 bytes boundary which we need for the rx/tx
310 * descriptors
311 */
312
313 dev = alloc_trdev(sizeof(struct xl_private)) ;
314 if (!dev) {
315 pci_release_regions(pdev) ;
316 return -ENOMEM ;
317 }
318 xl_priv = netdev_priv(dev);
319
320 #if XL_DEBUG
321 printk("pci_device: %p, dev:%p, dev->priv: %p, ba[0]: %10x, ba[1]:%10x\n",
322 pdev, dev, netdev_priv(dev), (unsigned int)pdev->resource[0].start, (unsigned int)pdev->resource[1].start);
323 #endif
324
325 dev->irq=pdev->irq;
326 dev->base_addr=pci_resource_start(pdev,0) ;
327 xl_priv->xl_card_name = pci_name(pdev);
328 xl_priv->xl_mmio=ioremap(pci_resource_start(pdev,1), XL_IO_SPACE);
329 xl_priv->pdev = pdev ;
330
331 if ((pkt_buf_sz[card_no] < 100) || (pkt_buf_sz[card_no] > 18000) )
332 xl_priv->pkt_buf_sz = PKT_BUF_SZ ;
333 else
334 xl_priv->pkt_buf_sz = pkt_buf_sz[card_no] ;
335
336 dev->mtu = xl_priv->pkt_buf_sz - TR_HLEN ;
337 xl_priv->xl_ring_speed = ringspeed[card_no] ;
338 xl_priv->xl_message_level = message_level[card_no] ;
339 xl_priv->xl_functional_addr[0] = xl_priv->xl_functional_addr[1] = xl_priv->xl_functional_addr[2] = xl_priv->xl_functional_addr[3] = 0 ;
340 xl_priv->xl_copy_all_options = 0 ;
341
342 if((i = xl_init(dev))) {
343 iounmap(xl_priv->xl_mmio) ;
344 free_netdev(dev) ;
345 pci_release_regions(pdev) ;
346 return i ;
347 }
348
349 dev->netdev_ops = &xl_netdev_ops;
350 SET_NETDEV_DEV(dev, &pdev->dev);
351
352 pci_set_drvdata(pdev,dev) ;
353 if ((i = register_netdev(dev))) {
354 printk(KERN_ERR "3C359, register netdev failed\n") ;
355 pci_set_drvdata(pdev,NULL) ;
356 iounmap(xl_priv->xl_mmio) ;
357 free_netdev(dev) ;
358 pci_release_regions(pdev) ;
359 return i ;
360 }
361
362 printk(KERN_INFO "3C359: %s registered as: %s\n",xl_priv->xl_card_name,dev->name) ;
363
364 return 0;
365 }
366
367
368 static int __devinit xl_init(struct net_device *dev)
369 {
370 struct xl_private *xl_priv = netdev_priv(dev);
371
372 printk(KERN_INFO "%s \n", version);
373 printk(KERN_INFO "%s: I/O at %hx, MMIO at %p, using irq %d\n",
374 xl_priv->xl_card_name, (unsigned int)dev->base_addr ,xl_priv->xl_mmio, dev->irq);
375
376 spin_lock_init(&xl_priv->xl_lock) ;
377
378 return xl_hw_reset(dev) ;
379
380 }
381
382
383 /*
384 * Hardware reset. This needs to be a separate entity as we need to reset the card
385 * when we change the EEProm settings.
386 */
387
388 static int xl_hw_reset(struct net_device *dev)
389 {
390 struct xl_private *xl_priv = netdev_priv(dev);
391 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
392 unsigned long t ;
393 u16 i ;
394 u16 result_16 ;
395 u8 result_8 ;
396 u16 start ;
397 int j ;
398
399 /*
400 * Reset the card. If the card has got the microcode on board, we have
401 * missed the initialization interrupt, so we must always do this.
402 */
403
404 writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ;
405
406 /*
407 * Must wait for cmdInProgress bit (12) to clear before continuing with
408 * card configuration.
409 */
410
411 t=jiffies;
412 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
413 schedule();
414 if (time_after(jiffies, t + 40 * HZ)) {
415 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL card not responding to global reset.\n", dev->name);
416 return -ENODEV;
417 }
418 }
419
420 /*
421 * Enable pmbar by setting bit in CPAttention
422 */
423
424 writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
425 result_8 = readb(xl_mmio + MMIO_MACDATA) ;
426 result_8 = result_8 | CPA_PMBARVIS ;
427 writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
428 writeb(result_8, xl_mmio + MMIO_MACDATA) ;
429
430 /*
431 * Read cpHold bit in pmbar, if cleared we have got Flashrom on board.
432 * If not, we need to upload the microcode to the card
433 */
434
435 writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD);
436
437 #if XL_DEBUG
438 printk(KERN_INFO "Read from PMBAR = %04x \n", readw(xl_mmio + MMIO_MACDATA)) ;
439 #endif
440
441 if ( readw( (xl_mmio + MMIO_MACDATA)) & PMB_CPHOLD ) {
442
443 /* Set PmBar, privateMemoryBase bits (8:2) to 0 */
444
445 writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD);
446 result_16 = readw(xl_mmio + MMIO_MACDATA) ;
447 result_16 = result_16 & ~((0x7F) << 2) ;
448 writel( (IO_WORD_WRITE | PMBAR), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
449 writew(result_16,xl_mmio + MMIO_MACDATA) ;
450
451 /* Set CPAttention, memWrEn bit */
452
453 writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
454 result_8 = readb(xl_mmio + MMIO_MACDATA) ;
455 result_8 = result_8 | CPA_MEMWREN ;
456 writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
457 writeb(result_8, xl_mmio + MMIO_MACDATA) ;
458
459 /*
460 * Now to write the microcode into the shared ram
461 * The microcode must finish at position 0xFFFF, so we must subtract
462 * to get the start position for the code
463 */
464
465 start = (0xFFFF - (mc_size) + 1 ) ; /* Looks strange but ensures compiler only uses 16 bit unsigned int for this */
466
467 printk(KERN_INFO "3C359: Uploading Microcode: ");
468
469 for (i = start, j = 0; j < mc_size; i++, j++) {
470 writel(MEM_BYTE_WRITE | 0XD0000 | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
471 writeb(microcode[j],xl_mmio + MMIO_MACDATA) ;
472 if (j % 1024 == 0)
473 printk(".");
474 }
475 printk("\n") ;
476
477 for (i=0;i < 16; i++) {
478 writel( (MEM_BYTE_WRITE | 0xDFFF0) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
479 writeb(microcode[mc_size - 16 + i], xl_mmio + MMIO_MACDATA) ;
480 }
481
482 /*
483 * Have to write the start address of the upload to FFF4, but
484 * the address must be >> 4. You do not want to know how long
485 * it took me to discover this.
486 */
487
488 writel(MEM_WORD_WRITE | 0xDFFF4, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
489 writew(start >> 4, xl_mmio + MMIO_MACDATA);
490
491 /* Clear the CPAttention, memWrEn Bit */
492
493 writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
494 result_8 = readb(xl_mmio + MMIO_MACDATA) ;
495 result_8 = result_8 & ~CPA_MEMWREN ;
496 writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
497 writeb(result_8, xl_mmio + MMIO_MACDATA) ;
498
499 /* Clear the cpHold bit in pmbar */
500
501 writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD);
502 result_16 = readw(xl_mmio + MMIO_MACDATA) ;
503 result_16 = result_16 & ~PMB_CPHOLD ;
504 writel( (IO_WORD_WRITE | PMBAR), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
505 writew(result_16,xl_mmio + MMIO_MACDATA) ;
506
507
508 } /* If microcode upload required */
509
510 /*
511 * The card should now go though a self test procedure and get itself ready
512 * to be opened, we must wait for an srb response with the initialization
513 * information.
514 */
515
516 #if XL_DEBUG
517 printk(KERN_INFO "%s: Microcode uploaded, must wait for the self test to complete\n", dev->name);
518 #endif
519
520 writew(SETINDENABLE | 0xFFF, xl_mmio + MMIO_COMMAND) ;
521
522 t=jiffies;
523 while ( !(readw(xl_mmio + MMIO_INTSTATUS_AUTO) & INTSTAT_SRB) ) {
524 schedule();
525 if (time_after(jiffies, t + 15 * HZ)) {
526 printk(KERN_ERR "3COM 3C359 Velocity XL card not responding.\n");
527 return -ENODEV;
528 }
529 }
530
531 /*
532 * Write the RxBufArea with D000, RxEarlyThresh, TxStartThresh,
533 * DnPriReqThresh, read the tech docs if you want to know what
534 * values they need to be.
535 */
536
537 writel(MMIO_WORD_WRITE | RXBUFAREA, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
538 writew(0xD000, xl_mmio + MMIO_MACDATA) ;
539
540 writel(MMIO_WORD_WRITE | RXEARLYTHRESH, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
541 writew(0X0020, xl_mmio + MMIO_MACDATA) ;
542
543 writew( SETTXSTARTTHRESH | 0x40 , xl_mmio + MMIO_COMMAND) ;
544
545 writeb(0x04, xl_mmio + MMIO_DNBURSTTHRESH) ;
546 writeb(0x04, xl_mmio + DNPRIREQTHRESH) ;
547
548 /*
549 * Read WRBR to provide the location of the srb block, have to use byte reads not word reads.
550 * Tech docs have this wrong !!!!
551 */
552
553 writel(MMIO_BYTE_READ | WRBR, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
554 xl_priv->srb = readb(xl_mmio + MMIO_MACDATA) << 8 ;
555 writel( (MMIO_BYTE_READ | WRBR) + 1, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
556 xl_priv->srb = xl_priv->srb | readb(xl_mmio + MMIO_MACDATA) ;
557
558 #if XL_DEBUG
559 writel(IO_WORD_READ | SWITCHSETTINGS, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
560 if ( readw(xl_mmio + MMIO_MACDATA) & 2) {
561 printk(KERN_INFO "Default ring speed 4 mbps \n") ;
562 } else {
563 printk(KERN_INFO "Default ring speed 16 mbps \n") ;
564 }
565 printk(KERN_INFO "%s: xl_priv->srb = %04x\n",xl_priv->xl_card_name, xl_priv->srb);
566 #endif
567
568 return 0;
569 }
570
571 static int xl_open(struct net_device *dev)
572 {
573 struct xl_private *xl_priv=netdev_priv(dev);
574 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
575 u8 i ;
576 __le16 hwaddr[3] ; /* Should be u8[6] but we get word return values */
577 int open_err ;
578
579 u16 switchsettings, switchsettings_eeprom ;
580
581 if(request_irq(dev->irq, &xl_interrupt, IRQF_SHARED , "3c359", dev)) {
582 return -EAGAIN;
583 }
584
585 /*
586 * Read the information from the EEPROM that we need.
587 */
588
589 hwaddr[0] = cpu_to_le16(xl_ee_read(dev,0x10));
590 hwaddr[1] = cpu_to_le16(xl_ee_read(dev,0x11));
591 hwaddr[2] = cpu_to_le16(xl_ee_read(dev,0x12));
592
593 /* Ring speed */
594
595 switchsettings_eeprom = xl_ee_read(dev,0x08) ;
596 switchsettings = switchsettings_eeprom ;
597
598 if (xl_priv->xl_ring_speed != 0) {
599 if (xl_priv->xl_ring_speed == 4)
600 switchsettings = switchsettings | 0x02 ;
601 else
602 switchsettings = switchsettings & ~0x02 ;
603 }
604
605 /* Only write EEProm if there has been a change */
606 if (switchsettings != switchsettings_eeprom) {
607 xl_ee_write(dev,0x08,switchsettings) ;
608 /* Hardware reset after changing EEProm */
609 xl_hw_reset(dev) ;
610 }
611
612 memcpy(dev->dev_addr,hwaddr,dev->addr_len) ;
613
614 open_err = xl_open_hw(dev) ;
615
616 /*
617 * This really needs to be cleaned up with better error reporting.
618 */
619
620 if (open_err != 0) { /* Something went wrong with the open command */
621 if (open_err & 0x07) { /* Wrong speed, retry at different speed */
622 printk(KERN_WARNING "%s: Open Error, retrying at different ringspeed \n", dev->name) ;
623 switchsettings = switchsettings ^ 2 ;
624 xl_ee_write(dev,0x08,switchsettings) ;
625 xl_hw_reset(dev) ;
626 open_err = xl_open_hw(dev) ;
627 if (open_err != 0) {
628 printk(KERN_WARNING "%s: Open error returned a second time, we're bombing out now\n", dev->name);
629 free_irq(dev->irq,dev) ;
630 return -ENODEV ;
631 }
632 } else {
633 printk(KERN_WARNING "%s: Open Error = %04x\n", dev->name, open_err) ;
634 free_irq(dev->irq,dev) ;
635 return -ENODEV ;
636 }
637 }
638
639 /*
640 * Now to set up the Rx and Tx buffer structures
641 */
642 /* These MUST be on 8 byte boundaries */
643 xl_priv->xl_tx_ring = kzalloc((sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE) + 7, GFP_DMA | GFP_KERNEL);
644 if (xl_priv->xl_tx_ring == NULL) {
645 printk(KERN_WARNING "%s: Not enough memory to allocate tx buffers.\n",
646 dev->name);
647 free_irq(dev->irq,dev);
648 return -ENOMEM;
649 }
650 xl_priv->xl_rx_ring = kzalloc((sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE) +7, GFP_DMA | GFP_KERNEL);
651 if (xl_priv->xl_rx_ring == NULL) {
652 printk(KERN_WARNING "%s: Not enough memory to allocate rx buffers.\n",
653 dev->name);
654 free_irq(dev->irq,dev);
655 kfree(xl_priv->xl_tx_ring);
656 return -ENOMEM;
657 }
658
659 /* Setup Rx Ring */
660 for (i=0 ; i < XL_RX_RING_SIZE ; i++) {
661 struct sk_buff *skb ;
662
663 skb = dev_alloc_skb(xl_priv->pkt_buf_sz) ;
664 if (skb==NULL)
665 break ;
666
667 skb->dev = dev ;
668 xl_priv->xl_rx_ring[i].upfragaddr = cpu_to_le32(pci_map_single(xl_priv->pdev, skb->data,xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE));
669 xl_priv->xl_rx_ring[i].upfraglen = cpu_to_le32(xl_priv->pkt_buf_sz) | RXUPLASTFRAG;
670 xl_priv->rx_ring_skb[i] = skb ;
671 }
672
673 if (i==0) {
674 printk(KERN_WARNING "%s: Not enough memory to allocate rx buffers. Adapter disabled \n",dev->name) ;
675 free_irq(dev->irq,dev) ;
676 kfree(xl_priv->xl_tx_ring);
677 kfree(xl_priv->xl_rx_ring);
678 return -EIO ;
679 }
680
681 xl_priv->rx_ring_no = i ;
682 xl_priv->rx_ring_tail = 0 ;
683 xl_priv->rx_ring_dma_addr = pci_map_single(xl_priv->pdev,xl_priv->xl_rx_ring, sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE, PCI_DMA_TODEVICE) ;
684 for (i=0;i<(xl_priv->rx_ring_no-1);i++) {
685 xl_priv->xl_rx_ring[i].upnextptr = cpu_to_le32(xl_priv->rx_ring_dma_addr + (sizeof (struct xl_rx_desc) * (i+1)));
686 }
687 xl_priv->xl_rx_ring[i].upnextptr = 0 ;
688
689 writel(xl_priv->rx_ring_dma_addr, xl_mmio + MMIO_UPLISTPTR) ;
690
691 /* Setup Tx Ring */
692
693 xl_priv->tx_ring_dma_addr = pci_map_single(xl_priv->pdev,xl_priv->xl_tx_ring, sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE,PCI_DMA_TODEVICE) ;
694
695 xl_priv->tx_ring_head = 1 ;
696 xl_priv->tx_ring_tail = 255 ; /* Special marker for first packet */
697 xl_priv->free_ring_entries = XL_TX_RING_SIZE ;
698
699 /*
700 * Setup the first dummy DPD entry for polling to start working.
701 */
702
703 xl_priv->xl_tx_ring[0].framestartheader = TXDPDEMPTY;
704 xl_priv->xl_tx_ring[0].buffer = 0 ;
705 xl_priv->xl_tx_ring[0].buffer_length = 0 ;
706 xl_priv->xl_tx_ring[0].dnnextptr = 0 ;
707
708 writel(xl_priv->tx_ring_dma_addr, xl_mmio + MMIO_DNLISTPTR) ;
709 writel(DNUNSTALL, xl_mmio + MMIO_COMMAND) ;
710 writel(UPUNSTALL, xl_mmio + MMIO_COMMAND) ;
711 writel(DNENABLE, xl_mmio + MMIO_COMMAND) ;
712 writeb(0x40, xl_mmio + MMIO_DNPOLL) ;
713
714 /*
715 * Enable interrupts on the card
716 */
717
718 writel(SETINTENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ;
719 writel(SETINDENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ;
720
721 netif_start_queue(dev) ;
722 return 0;
723
724 }
725
726 static int xl_open_hw(struct net_device *dev)
727 {
728 struct xl_private *xl_priv=netdev_priv(dev);
729 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
730 u16 vsoff ;
731 char ver_str[33];
732 int open_err ;
733 int i ;
734 unsigned long t ;
735
736 /*
737 * Okay, let's build up the Open.NIC srb command
738 *
739 */
740
741 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
742 writeb(OPEN_NIC, xl_mmio + MMIO_MACDATA) ;
743
744 /*
745 * Use this as a test byte, if it comes back with the same value, the command didn't work
746 */
747
748 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb)+ 2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
749 writeb(0xff,xl_mmio + MMIO_MACDATA) ;
750
751 /* Open options */
752 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + 8, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
753 writeb(0x00, xl_mmio + MMIO_MACDATA) ;
754 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + 9, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
755 writeb(0x00, xl_mmio + MMIO_MACDATA) ;
756
757 /*
758 * Node address, be careful here, the docs say you can just put zeros here and it will use
759 * the hardware address, it doesn't, you must include the node address in the open command.
760 */
761
762 if (xl_priv->xl_laa[0]) { /* If using a LAA address */
763 for (i=10;i<16;i++) {
764 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
765 writeb(xl_priv->xl_laa[i-10],xl_mmio + MMIO_MACDATA) ;
766 }
767 memcpy(dev->dev_addr,xl_priv->xl_laa,dev->addr_len) ;
768 } else { /* Regular hardware address */
769 for (i=10;i<16;i++) {
770 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
771 writeb(dev->dev_addr[i-10], xl_mmio + MMIO_MACDATA) ;
772 }
773 }
774
775 /* Default everything else to 0 */
776 for (i = 16; i < 34; i++) {
777 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
778 writeb(0x00,xl_mmio + MMIO_MACDATA) ;
779 }
780
781 /*
782 * Set the csrb bit in the MISR register
783 */
784
785 xl_wait_misr_flags(dev) ;
786 writel(MEM_BYTE_WRITE | MF_CSRB, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
787 writeb(0xFF, xl_mmio + MMIO_MACDATA) ;
788 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
789 writeb(MISR_CSRB , xl_mmio + MMIO_MACDATA) ;
790
791 /*
792 * Now wait for the command to run
793 */
794
795 t=jiffies;
796 while (! (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_SRB)) {
797 schedule();
798 if (time_after(jiffies, t + 40 * HZ)) {
799 printk(KERN_ERR "3COM 3C359 Velocity XL card not responding.\n");
800 break ;
801 }
802 }
803
804 /*
805 * Let's interpret the open response
806 */
807
808 writel( (MEM_BYTE_READ | 0xD0000 | xl_priv->srb)+2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
809 if (readb(xl_mmio + MMIO_MACDATA)!=0) {
810 open_err = readb(xl_mmio + MMIO_MACDATA) << 8 ;
811 writel( (MEM_BYTE_READ | 0xD0000 | xl_priv->srb) + 7, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
812 open_err |= readb(xl_mmio + MMIO_MACDATA) ;
813 return open_err ;
814 } else {
815 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 8, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
816 xl_priv->asb = swab16(readw(xl_mmio + MMIO_MACDATA)) ;
817 printk(KERN_INFO "%s: Adapter Opened Details: ",dev->name) ;
818 printk("ASB: %04x",xl_priv->asb ) ;
819 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 10, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
820 printk(", SRB: %04x",swab16(readw(xl_mmio + MMIO_MACDATA)) ) ;
821
822 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 12, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
823 xl_priv->arb = swab16(readw(xl_mmio + MMIO_MACDATA)) ;
824 printk(", ARB: %04x \n",xl_priv->arb ) ;
825 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 14, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
826 vsoff = swab16(readw(xl_mmio + MMIO_MACDATA)) ;
827
828 /*
829 * Interesting, sending the individual characters directly to printk was causing klogd to use
830 * use 100% of processor time, so we build up the string and print that instead.
831 */
832
833 for (i=0;i<0x20;i++) {
834 writel( (MEM_BYTE_READ | 0xD0000 | vsoff) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
835 ver_str[i] = readb(xl_mmio + MMIO_MACDATA) ;
836 }
837 ver_str[i] = '\0' ;
838 printk(KERN_INFO "%s: Microcode version String: %s \n",dev->name,ver_str);
839 }
840
841 /*
842 * Issue the AckInterrupt
843 */
844 writew(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
845
846 return 0 ;
847 }
848
849 /*
850 * There are two ways of implementing rx on the 359 NIC, either
851 * interrupt driven or polling. We are going to uses interrupts,
852 * it is the easier way of doing things.
853 *
854 * The Rx works with a ring of Rx descriptors. At initialise time the ring
855 * entries point to the next entry except for the last entry in the ring
856 * which points to 0. The card is programmed with the location of the first
857 * available descriptor and keeps reading the next_ptr until next_ptr is set
858 * to 0. Hopefully with a ring size of 16 the card will never get to read a next_ptr
859 * of 0. As the Rx interrupt is received we copy the frame up to the protocol layers
860 * and then point the end of the ring to our current position and point our current
861 * position to 0, therefore making the current position the last position on the ring.
862 * The last position on the ring therefore loops continually loops around the rx ring.
863 *
864 * rx_ring_tail is the position on the ring to process next. (Think of a snake, the head
865 * expands as the card adds new packets and we go around eating the tail processing the
866 * packets.)
867 *
868 * Undoubtably it could be streamlined and improved upon, but at the moment it works
869 * and the fast path through the routine is fine.
870 *
871 * adv_rx_ring could be inlined to increase performance, but its called a *lot* of times
872 * in xl_rx so would increase the size of the function significantly.
873 */
874
875 static void adv_rx_ring(struct net_device *dev) /* Advance rx_ring, cut down on bloat in xl_rx */
876 {
877 struct xl_private *xl_priv=netdev_priv(dev);
878 int n = xl_priv->rx_ring_tail;
879 int prev_ring_loc;
880
881 prev_ring_loc = (n + XL_RX_RING_SIZE - 1) & (XL_RX_RING_SIZE - 1);
882 xl_priv->xl_rx_ring[prev_ring_loc].upnextptr = cpu_to_le32(xl_priv->rx_ring_dma_addr + (sizeof (struct xl_rx_desc) * n));
883 xl_priv->xl_rx_ring[n].framestatus = 0;
884 xl_priv->xl_rx_ring[n].upnextptr = 0;
885 xl_priv->rx_ring_tail++;
886 xl_priv->rx_ring_tail &= (XL_RX_RING_SIZE-1);
887 }
888
889 static void xl_rx(struct net_device *dev)
890 {
891 struct xl_private *xl_priv=netdev_priv(dev);
892 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
893 struct sk_buff *skb, *skb2 ;
894 int frame_length = 0, copy_len = 0 ;
895 int temp_ring_loc ;
896
897 /*
898 * Receive the next frame, loop around the ring until all frames
899 * have been received.
900 */
901
902 while (xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus & (RXUPDCOMPLETE | RXUPDFULL) ) { /* Descriptor to process */
903
904 if (xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus & RXUPDFULL ) { /* UpdFull, Multiple Descriptors used for the frame */
905
906 /*
907 * This is a pain, you need to go through all the descriptors until the last one
908 * for this frame to find the framelength
909 */
910
911 temp_ring_loc = xl_priv->rx_ring_tail ;
912
913 while (xl_priv->xl_rx_ring[temp_ring_loc].framestatus & RXUPDFULL ) {
914 temp_ring_loc++ ;
915 temp_ring_loc &= (XL_RX_RING_SIZE-1) ;
916 }
917
918 frame_length = le32_to_cpu(xl_priv->xl_rx_ring[temp_ring_loc].framestatus) & 0x7FFF;
919
920 skb = dev_alloc_skb(frame_length) ;
921
922 if (skb==NULL) { /* No memory for frame, still need to roll forward the rx ring */
923 printk(KERN_WARNING "%s: dev_alloc_skb failed - multi buffer !\n", dev->name) ;
924 while (xl_priv->rx_ring_tail != temp_ring_loc)
925 adv_rx_ring(dev) ;
926
927 adv_rx_ring(dev) ; /* One more time just for luck :) */
928 dev->stats.rx_dropped++ ;
929
930 writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
931 return ;
932 }
933
934 while (xl_priv->rx_ring_tail != temp_ring_loc) {
935 copy_len = le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfraglen) & 0x7FFF;
936 frame_length -= copy_len ;
937 pci_dma_sync_single_for_cpu(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE);
938 skb_copy_from_linear_data(xl_priv->rx_ring_skb[xl_priv->rx_ring_tail],
939 skb_put(skb, copy_len),
940 copy_len);
941 pci_dma_sync_single_for_device(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE);
942 adv_rx_ring(dev) ;
943 }
944
945 /* Now we have found the last fragment */
946 pci_dma_sync_single_for_cpu(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE);
947 skb_copy_from_linear_data(xl_priv->rx_ring_skb[xl_priv->rx_ring_tail],
948 skb_put(skb,copy_len), frame_length);
949 /* memcpy(skb_put(skb,frame_length), bus_to_virt(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr), frame_length) ; */
950 pci_dma_sync_single_for_device(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE);
951 adv_rx_ring(dev) ;
952 skb->protocol = tr_type_trans(skb,dev) ;
953 netif_rx(skb) ;
954
955 } else { /* Single Descriptor Used, simply swap buffers over, fast path */
956
957 frame_length = le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus) & 0x7FFF;
958
959 skb = dev_alloc_skb(xl_priv->pkt_buf_sz) ;
960
961 if (skb==NULL) { /* Still need to fix the rx ring */
962 printk(KERN_WARNING "%s: dev_alloc_skb failed in rx, single buffer \n",dev->name) ;
963 adv_rx_ring(dev) ;
964 dev->stats.rx_dropped++ ;
965 writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
966 return ;
967 }
968
969 skb2 = xl_priv->rx_ring_skb[xl_priv->rx_ring_tail] ;
970 pci_unmap_single(xl_priv->pdev, le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr), xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ;
971 skb_put(skb2, frame_length) ;
972 skb2->protocol = tr_type_trans(skb2,dev) ;
973
974 xl_priv->rx_ring_skb[xl_priv->rx_ring_tail] = skb ;
975 xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr = cpu_to_le32(pci_map_single(xl_priv->pdev,skb->data,xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE));
976 xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfraglen = cpu_to_le32(xl_priv->pkt_buf_sz) | RXUPLASTFRAG;
977 adv_rx_ring(dev) ;
978 dev->stats.rx_packets++ ;
979 dev->stats.rx_bytes += frame_length ;
980
981 netif_rx(skb2) ;
982 } /* if multiple buffers */
983 } /* while packet to do */
984
985 /* Clear the updComplete interrupt */
986 writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
987 return ;
988 }
989
990 /*
991 * This is ruthless, it doesn't care what state the card is in it will
992 * completely reset the adapter.
993 */
994
995 static void xl_reset(struct net_device *dev)
996 {
997 struct xl_private *xl_priv=netdev_priv(dev);
998 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
999 unsigned long t;
1000
1001 writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ;
1002
1003 /*
1004 * Must wait for cmdInProgress bit (12) to clear before continuing with
1005 * card configuration.
1006 */
1007
1008 t=jiffies;
1009 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1010 if (time_after(jiffies, t + 40 * HZ)) {
1011 printk(KERN_ERR "3COM 3C359 Velocity XL card not responding.\n");
1012 break ;
1013 }
1014 }
1015
1016 }
1017
1018 static void xl_freemem(struct net_device *dev)
1019 {
1020 struct xl_private *xl_priv=netdev_priv(dev);
1021 int i ;
1022
1023 for (i=0;i<XL_RX_RING_SIZE;i++) {
1024 dev_kfree_skb_irq(xl_priv->rx_ring_skb[xl_priv->rx_ring_tail]) ;
1025 pci_unmap_single(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE);
1026 xl_priv->rx_ring_tail++ ;
1027 xl_priv->rx_ring_tail &= XL_RX_RING_SIZE-1;
1028 }
1029
1030 /* unmap ring */
1031 pci_unmap_single(xl_priv->pdev,xl_priv->rx_ring_dma_addr, sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE, PCI_DMA_FROMDEVICE) ;
1032
1033 pci_unmap_single(xl_priv->pdev,xl_priv->tx_ring_dma_addr, sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE, PCI_DMA_TODEVICE) ;
1034
1035 kfree(xl_priv->xl_rx_ring) ;
1036 kfree(xl_priv->xl_tx_ring) ;
1037
1038 return ;
1039 }
1040
1041 static irqreturn_t xl_interrupt(int irq, void *dev_id)
1042 {
1043 struct net_device *dev = (struct net_device *)dev_id;
1044 struct xl_private *xl_priv =netdev_priv(dev);
1045 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1046 u16 intstatus, macstatus ;
1047
1048 intstatus = readw(xl_mmio + MMIO_INTSTATUS) ;
1049
1050 if (!(intstatus & 1)) /* We didn't generate the interrupt */
1051 return IRQ_NONE;
1052
1053 spin_lock(&xl_priv->xl_lock) ;
1054
1055 /*
1056 * Process the interrupt
1057 */
1058 /*
1059 * Something fishy going on here, we shouldn't get 0001 ints, not fatal though.
1060 */
1061 if (intstatus == 0x0001) {
1062 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1063 printk(KERN_INFO "%s: 00001 int received \n",dev->name) ;
1064 } else {
1065 if (intstatus & (HOSTERRINT | SRBRINT | ARBCINT | UPCOMPINT | DNCOMPINT | HARDERRINT | (1<<8) | TXUNDERRUN | ASBFINT)) {
1066
1067 /*
1068 * Host Error.
1069 * It may be possible to recover from this, but usually it means something
1070 * is seriously fubar, so we just close the adapter.
1071 */
1072
1073 if (intstatus & HOSTERRINT) {
1074 printk(KERN_WARNING "%s: Host Error, performing global reset, intstatus = %04x \n",dev->name,intstatus) ;
1075 writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ;
1076 printk(KERN_WARNING "%s: Resetting hardware: \n", dev->name);
1077 netif_stop_queue(dev) ;
1078 xl_freemem(dev) ;
1079 free_irq(dev->irq,dev);
1080 xl_reset(dev) ;
1081 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1082 spin_unlock(&xl_priv->xl_lock) ;
1083 return IRQ_HANDLED;
1084 } /* Host Error */
1085
1086 if (intstatus & SRBRINT ) { /* Srbc interrupt */
1087 writel(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1088 if (xl_priv->srb_queued)
1089 xl_srb_bh(dev) ;
1090 } /* SRBR Interrupt */
1091
1092 if (intstatus & TXUNDERRUN) { /* Issue DnReset command */
1093 writel(DNRESET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1094 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { /* Wait for command to run */
1095 /* !!! FIX-ME !!!!
1096 Must put a timeout check here ! */
1097 /* Empty Loop */
1098 }
1099 printk(KERN_WARNING "%s: TX Underrun received \n",dev->name) ;
1100 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1101 } /* TxUnderRun */
1102
1103 if (intstatus & ARBCINT ) { /* Arbc interrupt */
1104 xl_arb_cmd(dev) ;
1105 } /* Arbc */
1106
1107 if (intstatus & ASBFINT) {
1108 if (xl_priv->asb_queued == 1) {
1109 xl_asb_cmd(dev) ;
1110 } else if (xl_priv->asb_queued == 2) {
1111 xl_asb_bh(dev) ;
1112 } else {
1113 writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ;
1114 }
1115 } /* Asbf */
1116
1117 if (intstatus & UPCOMPINT ) /* UpComplete */
1118 xl_rx(dev) ;
1119
1120 if (intstatus & DNCOMPINT ) /* DnComplete */
1121 xl_dn_comp(dev) ;
1122
1123 if (intstatus & HARDERRINT ) { /* Hardware error */
1124 writel(MMIO_WORD_READ | MACSTATUS, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1125 macstatus = readw(xl_mmio + MMIO_MACDATA) ;
1126 printk(KERN_WARNING "%s: MacStatusError, details: ", dev->name);
1127 if (macstatus & (1<<14))
1128 printk(KERN_WARNING "tchk error: Unrecoverable error \n") ;
1129 if (macstatus & (1<<3))
1130 printk(KERN_WARNING "eint error: Internal watchdog timer expired \n") ;
1131 if (macstatus & (1<<2))
1132 printk(KERN_WARNING "aint error: Host tried to perform invalid operation \n") ;
1133 printk(KERN_WARNING "Instatus = %02x, macstatus = %02x\n",intstatus,macstatus) ;
1134 printk(KERN_WARNING "%s: Resetting hardware: \n", dev->name);
1135 netif_stop_queue(dev) ;
1136 xl_freemem(dev) ;
1137 free_irq(dev->irq,dev);
1138 unregister_netdev(dev) ;
1139 free_netdev(dev) ;
1140 xl_reset(dev) ;
1141 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1142 spin_unlock(&xl_priv->xl_lock) ;
1143 return IRQ_HANDLED;
1144 }
1145 } else {
1146 printk(KERN_WARNING "%s: Received Unknown interrupt : %04x \n", dev->name, intstatus) ;
1147 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1148 }
1149 }
1150
1151 /* Turn interrupts back on */
1152
1153 writel( SETINDENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ;
1154 writel( SETINTENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ;
1155
1156 spin_unlock(&xl_priv->xl_lock) ;
1157 return IRQ_HANDLED;
1158 }
1159
1160 /*
1161 * Tx - Polling configuration
1162 */
1163
1164 static int xl_xmit(struct sk_buff *skb, struct net_device *dev)
1165 {
1166 struct xl_private *xl_priv=netdev_priv(dev);
1167 struct xl_tx_desc *txd ;
1168 int tx_head, tx_tail, tx_prev ;
1169 unsigned long flags ;
1170
1171 spin_lock_irqsave(&xl_priv->xl_lock,flags) ;
1172
1173 netif_stop_queue(dev) ;
1174
1175 if (xl_priv->free_ring_entries > 1 ) {
1176 /*
1177 * Set up the descriptor for the packet
1178 */
1179 tx_head = xl_priv->tx_ring_head ;
1180 tx_tail = xl_priv->tx_ring_tail ;
1181
1182 txd = &(xl_priv->xl_tx_ring[tx_head]) ;
1183 txd->dnnextptr = 0 ;
1184 txd->framestartheader = cpu_to_le32(skb->len) | TXDNINDICATE;
1185 txd->buffer = cpu_to_le32(pci_map_single(xl_priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE));
1186 txd->buffer_length = cpu_to_le32(skb->len) | TXDNFRAGLAST;
1187 xl_priv->tx_ring_skb[tx_head] = skb ;
1188 dev->stats.tx_packets++ ;
1189 dev->stats.tx_bytes += skb->len ;
1190
1191 /*
1192 * Set the nextptr of the previous descriptor equal to this descriptor, add XL_TX_RING_SIZE -1
1193 * to ensure no negative numbers in unsigned locations.
1194 */
1195
1196 tx_prev = (xl_priv->tx_ring_head + XL_TX_RING_SIZE - 1) & (XL_TX_RING_SIZE - 1) ;
1197
1198 xl_priv->tx_ring_head++ ;
1199 xl_priv->tx_ring_head &= (XL_TX_RING_SIZE - 1) ;
1200 xl_priv->free_ring_entries-- ;
1201
1202 xl_priv->xl_tx_ring[tx_prev].dnnextptr = cpu_to_le32(xl_priv->tx_ring_dma_addr + (sizeof (struct xl_tx_desc) * tx_head));
1203
1204 /* Sneaky, by doing a read on DnListPtr we can force the card to poll on the DnNextPtr */
1205 /* readl(xl_mmio + MMIO_DNLISTPTR) ; */
1206
1207 netif_wake_queue(dev) ;
1208
1209 spin_unlock_irqrestore(&xl_priv->xl_lock,flags) ;
1210
1211 return 0;
1212 } else {
1213 spin_unlock_irqrestore(&xl_priv->xl_lock,flags) ;
1214 return 1;
1215 }
1216
1217 }
1218
1219 /*
1220 * The NIC has told us that a packet has been downloaded onto the card, we must
1221 * find out which packet it has done, clear the skb and information for the packet
1222 * then advance around the ring for all tranmitted packets
1223 */
1224
1225 static void xl_dn_comp(struct net_device *dev)
1226 {
1227 struct xl_private *xl_priv=netdev_priv(dev);
1228 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1229 struct xl_tx_desc *txd ;
1230
1231
1232 if (xl_priv->tx_ring_tail == 255) {/* First time */
1233 xl_priv->xl_tx_ring[0].framestartheader = 0 ;
1234 xl_priv->xl_tx_ring[0].dnnextptr = 0 ;
1235 xl_priv->tx_ring_tail = 1 ;
1236 }
1237
1238 while (xl_priv->xl_tx_ring[xl_priv->tx_ring_tail].framestartheader & TXDNCOMPLETE ) {
1239 txd = &(xl_priv->xl_tx_ring[xl_priv->tx_ring_tail]) ;
1240 pci_unmap_single(xl_priv->pdev, le32_to_cpu(txd->buffer), xl_priv->tx_ring_skb[xl_priv->tx_ring_tail]->len, PCI_DMA_TODEVICE);
1241 txd->framestartheader = 0 ;
1242 txd->buffer = cpu_to_le32(0xdeadbeef);
1243 txd->buffer_length = 0 ;
1244 dev_kfree_skb_irq(xl_priv->tx_ring_skb[xl_priv->tx_ring_tail]) ;
1245 xl_priv->tx_ring_tail++ ;
1246 xl_priv->tx_ring_tail &= (XL_TX_RING_SIZE - 1) ;
1247 xl_priv->free_ring_entries++ ;
1248 }
1249
1250 netif_wake_queue(dev) ;
1251
1252 writel(ACK_INTERRUPT | DNCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
1253 }
1254
1255 /*
1256 * Close the adapter properly.
1257 * This srb reply cannot be handled from interrupt context as we have
1258 * to free the interrupt from the driver.
1259 */
1260
1261 static int xl_close(struct net_device *dev)
1262 {
1263 struct xl_private *xl_priv = netdev_priv(dev);
1264 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1265 unsigned long t ;
1266
1267 netif_stop_queue(dev) ;
1268
1269 /*
1270 * Close the adapter, need to stall the rx and tx queues.
1271 */
1272
1273 writew(DNSTALL, xl_mmio + MMIO_COMMAND) ;
1274 t=jiffies;
1275 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1276 schedule();
1277 if (time_after(jiffies, t + 10 * HZ)) {
1278 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNSTALL not responding.\n", dev->name);
1279 break ;
1280 }
1281 }
1282 writew(DNDISABLE, xl_mmio + MMIO_COMMAND) ;
1283 t=jiffies;
1284 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1285 schedule();
1286 if (time_after(jiffies, t + 10 * HZ)) {
1287 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNDISABLE not responding.\n", dev->name);
1288 break ;
1289 }
1290 }
1291 writew(UPSTALL, xl_mmio + MMIO_COMMAND) ;
1292 t=jiffies;
1293 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1294 schedule();
1295 if (time_after(jiffies, t + 10 * HZ)) {
1296 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-UPSTALL not responding.\n", dev->name);
1297 break ;
1298 }
1299 }
1300
1301 /* Turn off interrupts, we will still get the indication though
1302 * so we can trap it
1303 */
1304
1305 writel(SETINTENABLE, xl_mmio + MMIO_COMMAND) ;
1306
1307 xl_srb_cmd(dev,CLOSE_NIC) ;
1308
1309 t=jiffies;
1310 while (!(readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_SRB)) {
1311 schedule();
1312 if (time_after(jiffies, t + 10 * HZ)) {
1313 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-CLOSENIC not responding.\n", dev->name);
1314 break ;
1315 }
1316 }
1317 /* Read the srb response from the adapter */
1318
1319 writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD);
1320 if (readb(xl_mmio + MMIO_MACDATA) != CLOSE_NIC) {
1321 printk(KERN_INFO "%s: CLOSE_NIC did not get a CLOSE_NIC response \n",dev->name) ;
1322 } else {
1323 writel((MEM_BYTE_READ | 0xd0000 | xl_priv->srb) +2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1324 if (readb(xl_mmio + MMIO_MACDATA)==0) {
1325 printk(KERN_INFO "%s: Adapter has been closed \n",dev->name) ;
1326 writew(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1327
1328 xl_freemem(dev) ;
1329 free_irq(dev->irq,dev) ;
1330 } else {
1331 printk(KERN_INFO "%s: Close nic command returned error code %02x\n",dev->name, readb(xl_mmio + MMIO_MACDATA)) ;
1332 }
1333 }
1334
1335 /* Reset the upload and download logic */
1336
1337 writew(UPRESET, xl_mmio + MMIO_COMMAND) ;
1338 t=jiffies;
1339 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1340 schedule();
1341 if (time_after(jiffies, t + 10 * HZ)) {
1342 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-UPRESET not responding.\n", dev->name);
1343 break ;
1344 }
1345 }
1346 writew(DNRESET, xl_mmio + MMIO_COMMAND) ;
1347 t=jiffies;
1348 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1349 schedule();
1350 if (time_after(jiffies, t + 10 * HZ)) {
1351 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNRESET not responding.\n", dev->name);
1352 break ;
1353 }
1354 }
1355 xl_hw_reset(dev) ;
1356 return 0 ;
1357 }
1358
1359 static void xl_set_rx_mode(struct net_device *dev)
1360 {
1361 struct xl_private *xl_priv = netdev_priv(dev);
1362 struct dev_mc_list *dmi ;
1363 unsigned char dev_mc_address[4] ;
1364 u16 options ;
1365 int i ;
1366
1367 if (dev->flags & IFF_PROMISC)
1368 options = 0x0004 ;
1369 else
1370 options = 0x0000 ;
1371
1372 if (options ^ xl_priv->xl_copy_all_options) { /* Changed, must send command */
1373 xl_priv->xl_copy_all_options = options ;
1374 xl_srb_cmd(dev, SET_RECEIVE_MODE) ;
1375 return ;
1376 }
1377
1378 dev_mc_address[0] = dev_mc_address[1] = dev_mc_address[2] = dev_mc_address[3] = 0 ;
1379
1380 for (i=0,dmi=dev->mc_list;i < dev->mc_count; i++,dmi = dmi->next) {
1381 dev_mc_address[0] |= dmi->dmi_addr[2] ;
1382 dev_mc_address[1] |= dmi->dmi_addr[3] ;
1383 dev_mc_address[2] |= dmi->dmi_addr[4] ;
1384 dev_mc_address[3] |= dmi->dmi_addr[5] ;
1385 }
1386
1387 if (memcmp(xl_priv->xl_functional_addr,dev_mc_address,4) != 0) { /* Options have changed, run the command */
1388 memcpy(xl_priv->xl_functional_addr, dev_mc_address,4) ;
1389 xl_srb_cmd(dev, SET_FUNC_ADDRESS) ;
1390 }
1391 return ;
1392 }
1393
1394
1395 /*
1396 * We issued an srb command and now we must read
1397 * the response from the completed command.
1398 */
1399
1400 static void xl_srb_bh(struct net_device *dev)
1401 {
1402 struct xl_private *xl_priv = netdev_priv(dev);
1403 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1404 u8 srb_cmd, ret_code ;
1405 int i ;
1406
1407 writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1408 srb_cmd = readb(xl_mmio + MMIO_MACDATA) ;
1409 writel((MEM_BYTE_READ | 0xd0000 | xl_priv->srb) +2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1410 ret_code = readb(xl_mmio + MMIO_MACDATA) ;
1411
1412 /* Ret_code is standard across all commands */
1413
1414 switch (ret_code) {
1415 case 1:
1416 printk(KERN_INFO "%s: Command: %d - Invalid Command code\n",dev->name,srb_cmd) ;
1417 break ;
1418 case 4:
1419 printk(KERN_INFO "%s: Command: %d - Adapter is closed, must be open for this command \n",dev->name,srb_cmd) ;
1420 break ;
1421
1422 case 6:
1423 printk(KERN_INFO "%s: Command: %d - Options Invalid for command \n",dev->name,srb_cmd) ;
1424 break ;
1425
1426 case 0: /* Successful command execution */
1427 switch (srb_cmd) {
1428 case READ_LOG: /* Returns 14 bytes of data from the NIC */
1429 if(xl_priv->xl_message_level)
1430 printk(KERN_INFO "%s: READ.LOG 14 bytes of data ",dev->name) ;
1431 /*
1432 * We still have to read the log even if message_level = 0 and we don't want
1433 * to see it
1434 */
1435 for (i=0;i<14;i++) {
1436 writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1437 if(xl_priv->xl_message_level)
1438 printk("%02x:",readb(xl_mmio + MMIO_MACDATA)) ;
1439 }
1440 printk("\n") ;
1441 break ;
1442 case SET_FUNC_ADDRESS:
1443 if(xl_priv->xl_message_level)
1444 printk(KERN_INFO "%s: Functional Address Set \n",dev->name) ;
1445 break ;
1446 case CLOSE_NIC:
1447 if(xl_priv->xl_message_level)
1448 printk(KERN_INFO "%s: Received CLOSE_NIC interrupt in interrupt handler \n",dev->name) ;
1449 break ;
1450 case SET_MULTICAST_MODE:
1451 if(xl_priv->xl_message_level)
1452 printk(KERN_INFO "%s: Multicast options successfully changed\n",dev->name) ;
1453 break ;
1454 case SET_RECEIVE_MODE:
1455 if(xl_priv->xl_message_level) {
1456 if (xl_priv->xl_copy_all_options == 0x0004)
1457 printk(KERN_INFO "%s: Entering promiscuous mode \n", dev->name) ;
1458 else
1459 printk(KERN_INFO "%s: Entering normal receive mode \n",dev->name) ;
1460 }
1461 break ;
1462
1463 } /* switch */
1464 break ;
1465 } /* switch */
1466 return ;
1467 }
1468
1469 static int xl_set_mac_address (struct net_device *dev, void *addr)
1470 {
1471 struct sockaddr *saddr = addr ;
1472 struct xl_private *xl_priv = netdev_priv(dev);
1473
1474 if (netif_running(dev)) {
1475 printk(KERN_WARNING "%s: Cannot set mac/laa address while card is open\n", dev->name) ;
1476 return -EIO ;
1477 }
1478
1479 memcpy(xl_priv->xl_laa, saddr->sa_data,dev->addr_len) ;
1480
1481 if (xl_priv->xl_message_level) {
1482 printk(KERN_INFO "%s: MAC/LAA Set to = %x.%x.%x.%x.%x.%x\n",dev->name, xl_priv->xl_laa[0],
1483 xl_priv->xl_laa[1], xl_priv->xl_laa[2],
1484 xl_priv->xl_laa[3], xl_priv->xl_laa[4],
1485 xl_priv->xl_laa[5]);
1486 }
1487
1488 return 0 ;
1489 }
1490
1491 static void xl_arb_cmd(struct net_device *dev)
1492 {
1493 struct xl_private *xl_priv = netdev_priv(dev);
1494 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1495 u8 arb_cmd ;
1496 u16 lan_status, lan_status_diff ;
1497
1498 writel( ( MEM_BYTE_READ | 0xD0000 | xl_priv->arb), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1499 arb_cmd = readb(xl_mmio + MMIO_MACDATA) ;
1500
1501 if (arb_cmd == RING_STATUS_CHANGE) { /* Ring.Status.Change */
1502 writel( ( (MEM_WORD_READ | 0xD0000 | xl_priv->arb) + 6), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1503
1504 printk(KERN_INFO "%s: Ring Status Change: New Status = %04x\n", dev->name, swab16(readw(xl_mmio + MMIO_MACDATA) )) ;
1505
1506 lan_status = swab16(readw(xl_mmio + MMIO_MACDATA));
1507
1508 /* Acknowledge interrupt, this tells nic we are done with the arb */
1509 writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1510
1511 lan_status_diff = xl_priv->xl_lan_status ^ lan_status ;
1512
1513 if (lan_status_diff & (LSC_LWF | LSC_ARW | LSC_FPE | LSC_RR) ) {
1514 if (lan_status_diff & LSC_LWF)
1515 printk(KERN_WARNING "%s: Short circuit detected on the lobe\n",dev->name);
1516 if (lan_status_diff & LSC_ARW)
1517 printk(KERN_WARNING "%s: Auto removal error\n",dev->name);
1518 if (lan_status_diff & LSC_FPE)
1519 printk(KERN_WARNING "%s: FDX Protocol Error\n",dev->name);
1520 if (lan_status_diff & LSC_RR)
1521 printk(KERN_WARNING "%s: Force remove MAC frame received\n",dev->name);
1522
1523 /* Adapter has been closed by the hardware */
1524
1525 netif_stop_queue(dev);
1526 xl_freemem(dev) ;
1527 free_irq(dev->irq,dev);
1528
1529 printk(KERN_WARNING "%s: Adapter has been closed \n", dev->name) ;
1530 } /* If serious error */
1531
1532 if (xl_priv->xl_message_level) {
1533 if (lan_status_diff & LSC_SIG_LOSS)
1534 printk(KERN_WARNING "%s: No receive signal detected \n", dev->name) ;
1535 if (lan_status_diff & LSC_HARD_ERR)
1536 printk(KERN_INFO "%s: Beaconing \n",dev->name);
1537 if (lan_status_diff & LSC_SOFT_ERR)
1538 printk(KERN_WARNING "%s: Adapter transmitted Soft Error Report Mac Frame \n",dev->name);
1539 if (lan_status_diff & LSC_TRAN_BCN)
1540 printk(KERN_INFO "%s: We are tranmitting the beacon, aaah\n",dev->name);
1541 if (lan_status_diff & LSC_SS)
1542 printk(KERN_INFO "%s: Single Station on the ring \n", dev->name);
1543 if (lan_status_diff & LSC_RING_REC)
1544 printk(KERN_INFO "%s: Ring recovery ongoing\n",dev->name);
1545 if (lan_status_diff & LSC_FDX_MODE)
1546 printk(KERN_INFO "%s: Operating in FDX mode\n",dev->name);
1547 }
1548
1549 if (lan_status_diff & LSC_CO) {
1550 if (xl_priv->xl_message_level)
1551 printk(KERN_INFO "%s: Counter Overflow \n", dev->name);
1552 /* Issue READ.LOG command */
1553 xl_srb_cmd(dev, READ_LOG) ;
1554 }
1555
1556 /* There is no command in the tech docs to issue the read_sr_counters */
1557 if (lan_status_diff & LSC_SR_CO) {
1558 if (xl_priv->xl_message_level)
1559 printk(KERN_INFO "%s: Source routing counters overflow\n", dev->name);
1560 }
1561
1562 xl_priv->xl_lan_status = lan_status ;
1563
1564 } /* Lan.change.status */
1565 else if ( arb_cmd == RECEIVE_DATA) { /* Received.Data */
1566 #if XL_DEBUG
1567 printk(KERN_INFO "Received.Data \n") ;
1568 #endif
1569 writel( ((MEM_WORD_READ | 0xD0000 | xl_priv->arb) + 6), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1570 xl_priv->mac_buffer = swab16(readw(xl_mmio + MMIO_MACDATA)) ;
1571
1572 /* Now we are going to be really basic here and not do anything
1573 * with the data at all. The tech docs do not give me enough
1574 * information to calculate the buffers properly so we're
1575 * just going to tell the nic that we've dealt with the frame
1576 * anyway.
1577 */
1578
1579 /* Acknowledge interrupt, this tells nic we are done with the arb */
1580 writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1581
1582 /* Is the ASB free ? */
1583
1584 xl_priv->asb_queued = 0 ;
1585 writel( ((MEM_BYTE_READ | 0xD0000 | xl_priv->asb) + 2), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1586 if (readb(xl_mmio + MMIO_MACDATA) != 0xff) {
1587 xl_priv->asb_queued = 1 ;
1588
1589 xl_wait_misr_flags(dev) ;
1590
1591 writel(MEM_BYTE_WRITE | MF_ASBFR, xl_mmio + MMIO_MAC_ACCESS_CMD);
1592 writeb(0xff, xl_mmio + MMIO_MACDATA) ;
1593 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1594 writeb(MISR_ASBFR, xl_mmio + MMIO_MACDATA) ;
1595 return ;
1596 /* Drop out and wait for the bottom half to be run */
1597 }
1598
1599 xl_asb_cmd(dev) ;
1600
1601 } else {
1602 printk(KERN_WARNING "%s: Received unknown arb (xl_priv) command: %02x \n",dev->name,arb_cmd) ;
1603 }
1604
1605 /* Acknowledge the arb interrupt */
1606
1607 writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
1608
1609 return ;
1610 }
1611
1612
1613 /*
1614 * There is only one asb command, but we can get called from different
1615 * places.
1616 */
1617
1618 static void xl_asb_cmd(struct net_device *dev)
1619 {
1620 struct xl_private *xl_priv = netdev_priv(dev);
1621 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1622
1623 if (xl_priv->asb_queued == 1)
1624 writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ;
1625
1626 writel(MEM_BYTE_WRITE | 0xd0000 | xl_priv->asb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1627 writeb(0x81, xl_mmio + MMIO_MACDATA) ;
1628
1629 writel(MEM_WORD_WRITE | 0xd0000 | xl_priv->asb | 6, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1630 writew(swab16(xl_priv->mac_buffer), xl_mmio + MMIO_MACDATA) ;
1631
1632 xl_wait_misr_flags(dev) ;
1633
1634 writel(MEM_BYTE_WRITE | MF_RASB, xl_mmio + MMIO_MAC_ACCESS_CMD);
1635 writeb(0xff, xl_mmio + MMIO_MACDATA) ;
1636
1637 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1638 writeb(MISR_RASB, xl_mmio + MMIO_MACDATA) ;
1639
1640 xl_priv->asb_queued = 2 ;
1641
1642 return ;
1643 }
1644
1645 /*
1646 * This will only get called if there was an error
1647 * from the asb cmd.
1648 */
1649 static void xl_asb_bh(struct net_device *dev)
1650 {
1651 struct xl_private *xl_priv = netdev_priv(dev);
1652 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1653 u8 ret_code ;
1654
1655 writel(MMIO_BYTE_READ | 0xd0000 | xl_priv->asb | 2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1656 ret_code = readb(xl_mmio + MMIO_MACDATA) ;
1657 switch (ret_code) {
1658 case 0x01:
1659 printk(KERN_INFO "%s: ASB Command, unrecognized command code \n",dev->name) ;
1660 break ;
1661 case 0x26:
1662 printk(KERN_INFO "%s: ASB Command, unexpected receive buffer \n", dev->name) ;
1663 break ;
1664 case 0x40:
1665 printk(KERN_INFO "%s: ASB Command, Invalid Station ID \n", dev->name) ;
1666 break ;
1667 }
1668 xl_priv->asb_queued = 0 ;
1669 writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ;
1670 return ;
1671 }
1672
1673 /*
1674 * Issue srb commands to the nic
1675 */
1676
1677 static void xl_srb_cmd(struct net_device *dev, int srb_cmd)
1678 {
1679 struct xl_private *xl_priv = netdev_priv(dev);
1680 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1681
1682 switch (srb_cmd) {
1683 case READ_LOG:
1684 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1685 writeb(READ_LOG, xl_mmio + MMIO_MACDATA) ;
1686 break;
1687
1688 case CLOSE_NIC:
1689 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1690 writeb(CLOSE_NIC, xl_mmio + MMIO_MACDATA) ;
1691 break ;
1692
1693 case SET_RECEIVE_MODE:
1694 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1695 writeb(SET_RECEIVE_MODE, xl_mmio + MMIO_MACDATA) ;
1696 writel(MEM_WORD_WRITE | 0xD0000 | xl_priv->srb | 4, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1697 writew(xl_priv->xl_copy_all_options, xl_mmio + MMIO_MACDATA) ;
1698 break ;
1699
1700 case SET_FUNC_ADDRESS:
1701 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1702 writeb(SET_FUNC_ADDRESS, xl_mmio + MMIO_MACDATA) ;
1703 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 6 , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1704 writeb(xl_priv->xl_functional_addr[0], xl_mmio + MMIO_MACDATA) ;
1705 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 7 , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1706 writeb(xl_priv->xl_functional_addr[1], xl_mmio + MMIO_MACDATA) ;
1707 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 8 , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1708 writeb(xl_priv->xl_functional_addr[2], xl_mmio + MMIO_MACDATA) ;
1709 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 9 , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1710 writeb(xl_priv->xl_functional_addr[3], xl_mmio + MMIO_MACDATA) ;
1711 break ;
1712 } /* switch */
1713
1714
1715 xl_wait_misr_flags(dev) ;
1716
1717 /* Write 0xff to the CSRB flag */
1718 writel(MEM_BYTE_WRITE | MF_CSRB , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1719 writeb(0xFF, xl_mmio + MMIO_MACDATA) ;
1720 /* Set csrb bit in MISR register to process command */
1721 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1722 writeb(MISR_CSRB, xl_mmio + MMIO_MACDATA) ;
1723 xl_priv->srb_queued = 1 ;
1724
1725 return ;
1726 }
1727
1728 /*
1729 * This is nasty, to use the MISR command you have to wait for 6 memory locations
1730 * to be zero. This is the way the driver does on other OS'es so we should be ok with
1731 * the empty loop.
1732 */
1733
1734 static void xl_wait_misr_flags(struct net_device *dev)
1735 {
1736 struct xl_private *xl_priv = netdev_priv(dev);
1737 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1738
1739 int i ;
1740
1741 writel(MMIO_BYTE_READ | MISR_RW, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1742 if (readb(xl_mmio + MMIO_MACDATA) != 0) { /* Misr not clear */
1743 for (i=0; i<6; i++) {
1744 writel(MEM_BYTE_READ | 0xDFFE0 | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1745 while (readb(xl_mmio + MMIO_MACDATA) != 0 ) {} ; /* Empty Loop */
1746 }
1747 }
1748
1749 writel(MMIO_BYTE_WRITE | MISR_AND, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1750 writeb(0x80, xl_mmio + MMIO_MACDATA) ;
1751
1752 return ;
1753 }
1754
1755 /*
1756 * Change mtu size, this should work the same as olympic
1757 */
1758
1759 static int xl_change_mtu(struct net_device *dev, int mtu)
1760 {
1761 struct xl_private *xl_priv = netdev_priv(dev);
1762 u16 max_mtu ;
1763
1764 if (xl_priv->xl_ring_speed == 4)
1765 max_mtu = 4500 ;
1766 else
1767 max_mtu = 18000 ;
1768
1769 if (mtu > max_mtu)
1770 return -EINVAL ;
1771 if (mtu < 100)
1772 return -EINVAL ;
1773
1774 dev->mtu = mtu ;
1775 xl_priv->pkt_buf_sz = mtu + TR_HLEN ;
1776
1777 return 0 ;
1778 }
1779
1780 static void __devexit xl_remove_one (struct pci_dev *pdev)
1781 {
1782 struct net_device *dev = pci_get_drvdata(pdev);
1783 struct xl_private *xl_priv=netdev_priv(dev);
1784
1785 unregister_netdev(dev);
1786 iounmap(xl_priv->xl_mmio) ;
1787 pci_release_regions(pdev) ;
1788 pci_set_drvdata(pdev,NULL) ;
1789 free_netdev(dev);
1790 return ;
1791 }
1792
1793 static struct pci_driver xl_3c359_driver = {
1794 .name = "3c359",
1795 .id_table = xl_pci_tbl,
1796 .probe = xl_probe,
1797 .remove = __devexit_p(xl_remove_one),
1798 };
1799
1800 static int __init xl_pci_init (void)
1801 {
1802 return pci_register_driver(&xl_3c359_driver);
1803 }
1804
1805
1806 static void __exit xl_pci_cleanup (void)
1807 {
1808 pci_unregister_driver (&xl_3c359_driver);
1809 }
1810
1811 module_init(xl_pci_init);
1812 module_exit(xl_pci_cleanup);
1813
1814 MODULE_LICENSE("GPL") ;
Linux kernel - Deliverables
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