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[deliverable/linux.git] / drivers / net / usb / asix.c
1 /*
2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23 // #define DEBUG // error path messages, extra info
24 // #define VERBOSE // more; success messages
25
26 #include <linux/module.h>
27 #include <linux/kmod.h>
28 #include <linux/init.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/ethtool.h>
32 #include <linux/workqueue.h>
33 #include <linux/mii.h>
34 #include <linux/usb.h>
35 #include <linux/crc32.h>
36 #include <linux/usb/usbnet.h>
37 #include <linux/slab.h>
38
39 #define DRIVER_VERSION "26-Sep-2011"
40 static const char driver_name [] = "asix";
41
42 /* ASIX AX8817X based USB 2.0 Ethernet Devices */
43
44 #define AX_CMD_SET_SW_MII 0x06
45 #define AX_CMD_READ_MII_REG 0x07
46 #define AX_CMD_WRITE_MII_REG 0x08
47 #define AX_CMD_SET_HW_MII 0x0a
48 #define AX_CMD_READ_EEPROM 0x0b
49 #define AX_CMD_WRITE_EEPROM 0x0c
50 #define AX_CMD_WRITE_ENABLE 0x0d
51 #define AX_CMD_WRITE_DISABLE 0x0e
52 #define AX_CMD_READ_RX_CTL 0x0f
53 #define AX_CMD_WRITE_RX_CTL 0x10
54 #define AX_CMD_READ_IPG012 0x11
55 #define AX_CMD_WRITE_IPG0 0x12
56 #define AX_CMD_WRITE_IPG1 0x13
57 #define AX_CMD_READ_NODE_ID 0x13
58 #define AX_CMD_WRITE_NODE_ID 0x14
59 #define AX_CMD_WRITE_IPG2 0x14
60 #define AX_CMD_WRITE_MULTI_FILTER 0x16
61 #define AX88172_CMD_READ_NODE_ID 0x17
62 #define AX_CMD_READ_PHY_ID 0x19
63 #define AX_CMD_READ_MEDIUM_STATUS 0x1a
64 #define AX_CMD_WRITE_MEDIUM_MODE 0x1b
65 #define AX_CMD_READ_MONITOR_MODE 0x1c
66 #define AX_CMD_WRITE_MONITOR_MODE 0x1d
67 #define AX_CMD_READ_GPIOS 0x1e
68 #define AX_CMD_WRITE_GPIOS 0x1f
69 #define AX_CMD_SW_RESET 0x20
70 #define AX_CMD_SW_PHY_STATUS 0x21
71 #define AX_CMD_SW_PHY_SELECT 0x22
72
73 #define AX_MONITOR_MODE 0x01
74 #define AX_MONITOR_LINK 0x02
75 #define AX_MONITOR_MAGIC 0x04
76 #define AX_MONITOR_HSFS 0x10
77
78 /* AX88172 Medium Status Register values */
79 #define AX88172_MEDIUM_FD 0x02
80 #define AX88172_MEDIUM_TX 0x04
81 #define AX88172_MEDIUM_FC 0x10
82 #define AX88172_MEDIUM_DEFAULT \
83 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
84
85 #define AX_MCAST_FILTER_SIZE 8
86 #define AX_MAX_MCAST 64
87
88 #define AX_SWRESET_CLEAR 0x00
89 #define AX_SWRESET_RR 0x01
90 #define AX_SWRESET_RT 0x02
91 #define AX_SWRESET_PRTE 0x04
92 #define AX_SWRESET_PRL 0x08
93 #define AX_SWRESET_BZ 0x10
94 #define AX_SWRESET_IPRL 0x20
95 #define AX_SWRESET_IPPD 0x40
96
97 #define AX88772_IPG0_DEFAULT 0x15
98 #define AX88772_IPG1_DEFAULT 0x0c
99 #define AX88772_IPG2_DEFAULT 0x12
100
101 /* AX88772 & AX88178 Medium Mode Register */
102 #define AX_MEDIUM_PF 0x0080
103 #define AX_MEDIUM_JFE 0x0040
104 #define AX_MEDIUM_TFC 0x0020
105 #define AX_MEDIUM_RFC 0x0010
106 #define AX_MEDIUM_ENCK 0x0008
107 #define AX_MEDIUM_AC 0x0004
108 #define AX_MEDIUM_FD 0x0002
109 #define AX_MEDIUM_GM 0x0001
110 #define AX_MEDIUM_SM 0x1000
111 #define AX_MEDIUM_SBP 0x0800
112 #define AX_MEDIUM_PS 0x0200
113 #define AX_MEDIUM_RE 0x0100
114
115 #define AX88178_MEDIUM_DEFAULT \
116 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
117 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
118 AX_MEDIUM_RE )
119
120 #define AX88772_MEDIUM_DEFAULT \
121 (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
122 AX_MEDIUM_TFC | AX_MEDIUM_PS | \
123 AX_MEDIUM_AC | AX_MEDIUM_RE )
124
125 /* AX88772 & AX88178 RX_CTL values */
126 #define AX_RX_CTL_SO 0x0080
127 #define AX_RX_CTL_AP 0x0020
128 #define AX_RX_CTL_AM 0x0010
129 #define AX_RX_CTL_AB 0x0008
130 #define AX_RX_CTL_SEP 0x0004
131 #define AX_RX_CTL_AMALL 0x0002
132 #define AX_RX_CTL_PRO 0x0001
133 #define AX_RX_CTL_MFB_2048 0x0000
134 #define AX_RX_CTL_MFB_4096 0x0100
135 #define AX_RX_CTL_MFB_8192 0x0200
136 #define AX_RX_CTL_MFB_16384 0x0300
137
138 #define AX_DEFAULT_RX_CTL \
139 (AX_RX_CTL_SO | AX_RX_CTL_AB )
140
141 /* GPIO 0 .. 2 toggles */
142 #define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
143 #define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
144 #define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
145 #define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
146 #define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
147 #define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
148 #define AX_GPIO_RESERVED 0x40 /* Reserved */
149 #define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
150
151 #define AX_EEPROM_MAGIC 0xdeadbeef
152 #define AX88172_EEPROM_LEN 0x40
153 #define AX88772_EEPROM_LEN 0xff
154
155 #define PHY_MODE_MARVELL 0x0000
156 #define MII_MARVELL_LED_CTRL 0x0018
157 #define MII_MARVELL_STATUS 0x001b
158 #define MII_MARVELL_CTRL 0x0014
159
160 #define MARVELL_LED_MANUAL 0x0019
161
162 #define MARVELL_STATUS_HWCFG 0x0004
163
164 #define MARVELL_CTRL_TXDELAY 0x0002
165 #define MARVELL_CTRL_RXDELAY 0x0080
166
167 /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
168 struct asix_data {
169 u8 multi_filter[AX_MCAST_FILTER_SIZE];
170 u8 mac_addr[ETH_ALEN];
171 u8 phymode;
172 u8 ledmode;
173 u8 eeprom_len;
174 };
175
176 struct ax88172_int_data {
177 __le16 res1;
178 u8 link;
179 __le16 res2;
180 u8 status;
181 __le16 res3;
182 } __packed;
183
184 static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
185 u16 size, void *data)
186 {
187 void *buf;
188 int err = -ENOMEM;
189
190 netdev_dbg(dev->net, "asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
191 cmd, value, index, size);
192
193 buf = kmalloc(size, GFP_KERNEL);
194 if (!buf)
195 goto out;
196
197 err = usb_control_msg(
198 dev->udev,
199 usb_rcvctrlpipe(dev->udev, 0),
200 cmd,
201 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
202 value,
203 index,
204 buf,
205 size,
206 USB_CTRL_GET_TIMEOUT);
207 if (err == size)
208 memcpy(data, buf, size);
209 else if (err >= 0)
210 err = -EINVAL;
211 kfree(buf);
212
213 out:
214 return err;
215 }
216
217 static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
218 u16 size, void *data)
219 {
220 void *buf = NULL;
221 int err = -ENOMEM;
222
223 netdev_dbg(dev->net, "asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
224 cmd, value, index, size);
225
226 if (data) {
227 buf = kmemdup(data, size, GFP_KERNEL);
228 if (!buf)
229 goto out;
230 }
231
232 err = usb_control_msg(
233 dev->udev,
234 usb_sndctrlpipe(dev->udev, 0),
235 cmd,
236 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
237 value,
238 index,
239 buf,
240 size,
241 USB_CTRL_SET_TIMEOUT);
242 kfree(buf);
243
244 out:
245 return err;
246 }
247
248 static void asix_async_cmd_callback(struct urb *urb)
249 {
250 struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
251 int status = urb->status;
252
253 if (status < 0)
254 printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d",
255 status);
256
257 kfree(req);
258 usb_free_urb(urb);
259 }
260
261 static void
262 asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
263 u16 size, void *data)
264 {
265 struct usb_ctrlrequest *req;
266 int status;
267 struct urb *urb;
268
269 netdev_dbg(dev->net, "asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
270 cmd, value, index, size);
271 if ((urb = usb_alloc_urb(0, GFP_ATOMIC)) == NULL) {
272 netdev_err(dev->net, "Error allocating URB in write_cmd_async!\n");
273 return;
274 }
275
276 if ((req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC)) == NULL) {
277 netdev_err(dev->net, "Failed to allocate memory for control request\n");
278 usb_free_urb(urb);
279 return;
280 }
281
282 req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
283 req->bRequest = cmd;
284 req->wValue = cpu_to_le16(value);
285 req->wIndex = cpu_to_le16(index);
286 req->wLength = cpu_to_le16(size);
287
288 usb_fill_control_urb(urb, dev->udev,
289 usb_sndctrlpipe(dev->udev, 0),
290 (void *)req, data, size,
291 asix_async_cmd_callback, req);
292
293 if((status = usb_submit_urb(urb, GFP_ATOMIC)) < 0) {
294 netdev_err(dev->net, "Error submitting the control message: status=%d\n",
295 status);
296 kfree(req);
297 usb_free_urb(urb);
298 }
299 }
300
301 static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
302 {
303 u8 *head;
304 u32 header;
305 char *packet;
306 struct sk_buff *ax_skb;
307 u16 size;
308
309 head = (u8 *) skb->data;
310 memcpy(&header, head, sizeof(header));
311 le32_to_cpus(&header);
312 packet = head + sizeof(header);
313
314 skb_pull(skb, 4);
315
316 while (skb->len > 0) {
317 if ((header & 0x07ff) != ((~header >> 16) & 0x07ff))
318 netdev_err(dev->net, "asix_rx_fixup() Bad Header Length\n");
319
320 /* get the packet length */
321 size = (u16) (header & 0x000007ff);
322
323 if ((skb->len) - ((size + 1) & 0xfffe) == 0) {
324 u8 alignment = (unsigned long)skb->data & 0x3;
325 if (alignment != 0x2) {
326 /*
327 * not 16bit aligned so use the room provided by
328 * the 32 bit header to align the data
329 *
330 * note we want 16bit alignment as MAC header is
331 * 14bytes thus ip header will be aligned on
332 * 32bit boundary so accessing ipheader elements
333 * using a cast to struct ip header wont cause
334 * an unaligned accesses.
335 */
336 u8 realignment = (alignment + 2) & 0x3;
337 memmove(skb->data - realignment,
338 skb->data,
339 size);
340 skb->data -= realignment;
341 skb_set_tail_pointer(skb, size);
342 }
343 return 2;
344 }
345
346 if (size > dev->net->mtu + ETH_HLEN) {
347 netdev_err(dev->net, "asix_rx_fixup() Bad RX Length %d\n",
348 size);
349 return 0;
350 }
351 ax_skb = skb_clone(skb, GFP_ATOMIC);
352 if (ax_skb) {
353 u8 alignment = (unsigned long)packet & 0x3;
354 ax_skb->len = size;
355
356 if (alignment != 0x2) {
357 /*
358 * not 16bit aligned use the room provided by
359 * the 32 bit header to align the data
360 */
361 u8 realignment = (alignment + 2) & 0x3;
362 memmove(packet - realignment, packet, size);
363 packet -= realignment;
364 }
365 ax_skb->data = packet;
366 skb_set_tail_pointer(ax_skb, size);
367 usbnet_skb_return(dev, ax_skb);
368 } else {
369 return 0;
370 }
371
372 skb_pull(skb, (size + 1) & 0xfffe);
373
374 if (skb->len == 0)
375 break;
376
377 head = (u8 *) skb->data;
378 memcpy(&header, head, sizeof(header));
379 le32_to_cpus(&header);
380 packet = head + sizeof(header);
381 skb_pull(skb, 4);
382 }
383
384 if (skb->len < 0) {
385 netdev_err(dev->net, "asix_rx_fixup() Bad SKB Length %d\n",
386 skb->len);
387 return 0;
388 }
389 return 1;
390 }
391
392 static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
393 gfp_t flags)
394 {
395 int padlen;
396 int headroom = skb_headroom(skb);
397 int tailroom = skb_tailroom(skb);
398 u32 packet_len;
399 u32 padbytes = 0xffff0000;
400
401 padlen = ((skb->len + 4) % 512) ? 0 : 4;
402
403 if ((!skb_cloned(skb)) &&
404 ((headroom + tailroom) >= (4 + padlen))) {
405 if ((headroom < 4) || (tailroom < padlen)) {
406 skb->data = memmove(skb->head + 4, skb->data, skb->len);
407 skb_set_tail_pointer(skb, skb->len);
408 }
409 } else {
410 struct sk_buff *skb2;
411 skb2 = skb_copy_expand(skb, 4, padlen, flags);
412 dev_kfree_skb_any(skb);
413 skb = skb2;
414 if (!skb)
415 return NULL;
416 }
417
418 skb_push(skb, 4);
419 packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
420 cpu_to_le32s(&packet_len);
421 skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len));
422
423 if ((skb->len % 512) == 0) {
424 cpu_to_le32s(&padbytes);
425 memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes));
426 skb_put(skb, sizeof(padbytes));
427 }
428 return skb;
429 }
430
431 static void asix_status(struct usbnet *dev, struct urb *urb)
432 {
433 struct ax88172_int_data *event;
434 int link;
435
436 if (urb->actual_length < 8)
437 return;
438
439 event = urb->transfer_buffer;
440 link = event->link & 0x01;
441 if (netif_carrier_ok(dev->net) != link) {
442 if (link) {
443 netif_carrier_on(dev->net);
444 usbnet_defer_kevent (dev, EVENT_LINK_RESET );
445 } else
446 netif_carrier_off(dev->net);
447 netdev_dbg(dev->net, "Link Status is: %d\n", link);
448 }
449 }
450
451 static inline int asix_set_sw_mii(struct usbnet *dev)
452 {
453 int ret;
454 ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
455 if (ret < 0)
456 netdev_err(dev->net, "Failed to enable software MII access\n");
457 return ret;
458 }
459
460 static inline int asix_set_hw_mii(struct usbnet *dev)
461 {
462 int ret;
463 ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
464 if (ret < 0)
465 netdev_err(dev->net, "Failed to enable hardware MII access\n");
466 return ret;
467 }
468
469 static inline int asix_get_phy_addr(struct usbnet *dev)
470 {
471 u8 buf[2];
472 int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf);
473
474 netdev_dbg(dev->net, "asix_get_phy_addr()\n");
475
476 if (ret < 0) {
477 netdev_err(dev->net, "Error reading PHYID register: %02x\n", ret);
478 goto out;
479 }
480 netdev_dbg(dev->net, "asix_get_phy_addr() returning 0x%04x\n",
481 *((__le16 *)buf));
482 ret = buf[1];
483
484 out:
485 return ret;
486 }
487
488 static int asix_sw_reset(struct usbnet *dev, u8 flags)
489 {
490 int ret;
491
492 ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
493 if (ret < 0)
494 netdev_err(dev->net, "Failed to send software reset: %02x\n", ret);
495
496 return ret;
497 }
498
499 static u16 asix_read_rx_ctl(struct usbnet *dev)
500 {
501 __le16 v;
502 int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v);
503
504 if (ret < 0) {
505 netdev_err(dev->net, "Error reading RX_CTL register: %02x\n", ret);
506 goto out;
507 }
508 ret = le16_to_cpu(v);
509 out:
510 return ret;
511 }
512
513 static int asix_write_rx_ctl(struct usbnet *dev, u16 mode)
514 {
515 int ret;
516
517 netdev_dbg(dev->net, "asix_write_rx_ctl() - mode = 0x%04x\n", mode);
518 ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
519 if (ret < 0)
520 netdev_err(dev->net, "Failed to write RX_CTL mode to 0x%04x: %02x\n",
521 mode, ret);
522
523 return ret;
524 }
525
526 static u16 asix_read_medium_status(struct usbnet *dev)
527 {
528 __le16 v;
529 int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v);
530
531 if (ret < 0) {
532 netdev_err(dev->net, "Error reading Medium Status register: %02x\n",
533 ret);
534 goto out;
535 }
536 ret = le16_to_cpu(v);
537 out:
538 return ret;
539 }
540
541 static int asix_write_medium_mode(struct usbnet *dev, u16 mode)
542 {
543 int ret;
544
545 netdev_dbg(dev->net, "asix_write_medium_mode() - mode = 0x%04x\n", mode);
546 ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
547 if (ret < 0)
548 netdev_err(dev->net, "Failed to write Medium Mode mode to 0x%04x: %02x\n",
549 mode, ret);
550
551 return ret;
552 }
553
554 static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep)
555 {
556 int ret;
557
558 netdev_dbg(dev->net, "asix_write_gpio() - value = 0x%04x\n", value);
559 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL);
560 if (ret < 0)
561 netdev_err(dev->net, "Failed to write GPIO value 0x%04x: %02x\n",
562 value, ret);
563
564 if (sleep)
565 msleep(sleep);
566
567 return ret;
568 }
569
570 /*
571 * AX88772 & AX88178 have a 16-bit RX_CTL value
572 */
573 static void asix_set_multicast(struct net_device *net)
574 {
575 struct usbnet *dev = netdev_priv(net);
576 struct asix_data *data = (struct asix_data *)&dev->data;
577 u16 rx_ctl = AX_DEFAULT_RX_CTL;
578
579 if (net->flags & IFF_PROMISC) {
580 rx_ctl |= AX_RX_CTL_PRO;
581 } else if (net->flags & IFF_ALLMULTI ||
582 netdev_mc_count(net) > AX_MAX_MCAST) {
583 rx_ctl |= AX_RX_CTL_AMALL;
584 } else if (netdev_mc_empty(net)) {
585 /* just broadcast and directed */
586 } else {
587 /* We use the 20 byte dev->data
588 * for our 8 byte filter buffer
589 * to avoid allocating memory that
590 * is tricky to free later */
591 struct netdev_hw_addr *ha;
592 u32 crc_bits;
593
594 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
595
596 /* Build the multicast hash filter. */
597 netdev_for_each_mc_addr(ha, net) {
598 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
599 data->multi_filter[crc_bits >> 3] |=
600 1 << (crc_bits & 7);
601 }
602
603 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
604 AX_MCAST_FILTER_SIZE, data->multi_filter);
605
606 rx_ctl |= AX_RX_CTL_AM;
607 }
608
609 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
610 }
611
612 static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc)
613 {
614 struct usbnet *dev = netdev_priv(netdev);
615 __le16 res;
616
617 mutex_lock(&dev->phy_mutex);
618 asix_set_sw_mii(dev);
619 asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id,
620 (__u16)loc, 2, &res);
621 asix_set_hw_mii(dev);
622 mutex_unlock(&dev->phy_mutex);
623
624 netdev_dbg(dev->net, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n",
625 phy_id, loc, le16_to_cpu(res));
626
627 return le16_to_cpu(res);
628 }
629
630 static void
631 asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val)
632 {
633 struct usbnet *dev = netdev_priv(netdev);
634 __le16 res = cpu_to_le16(val);
635
636 netdev_dbg(dev->net, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n",
637 phy_id, loc, val);
638 mutex_lock(&dev->phy_mutex);
639 asix_set_sw_mii(dev);
640 asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res);
641 asix_set_hw_mii(dev);
642 mutex_unlock(&dev->phy_mutex);
643 }
644
645 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
646 static u32 asix_get_phyid(struct usbnet *dev)
647 {
648 int phy_reg;
649 u32 phy_id;
650
651 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
652 if (phy_reg < 0)
653 return 0;
654
655 phy_id = (phy_reg & 0xffff) << 16;
656
657 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
658 if (phy_reg < 0)
659 return 0;
660
661 phy_id |= (phy_reg & 0xffff);
662
663 return phy_id;
664 }
665
666 static void
667 asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
668 {
669 struct usbnet *dev = netdev_priv(net);
670 u8 opt;
671
672 if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
673 wolinfo->supported = 0;
674 wolinfo->wolopts = 0;
675 return;
676 }
677 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
678 wolinfo->wolopts = 0;
679 }
680
681 static int
682 asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
683 {
684 struct usbnet *dev = netdev_priv(net);
685 u8 opt = 0;
686
687 if (wolinfo->wolopts & WAKE_PHY)
688 opt |= AX_MONITOR_LINK;
689 if (wolinfo->wolopts & WAKE_MAGIC)
690 opt |= AX_MONITOR_MAGIC;
691
692 if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE,
693 opt, 0, 0, NULL) < 0)
694 return -EINVAL;
695
696 return 0;
697 }
698
699 static int asix_get_eeprom_len(struct net_device *net)
700 {
701 struct usbnet *dev = netdev_priv(net);
702 struct asix_data *data = (struct asix_data *)&dev->data;
703
704 return data->eeprom_len;
705 }
706
707 static int asix_get_eeprom(struct net_device *net,
708 struct ethtool_eeprom *eeprom, u8 *data)
709 {
710 struct usbnet *dev = netdev_priv(net);
711 __le16 *ebuf = (__le16 *)data;
712 int i;
713
714 /* Crude hack to ensure that we don't overwrite memory
715 * if an odd length is supplied
716 */
717 if (eeprom->len % 2)
718 return -EINVAL;
719
720 eeprom->magic = AX_EEPROM_MAGIC;
721
722 /* ax8817x returns 2 bytes from eeprom on read */
723 for (i=0; i < eeprom->len / 2; i++) {
724 if (asix_read_cmd(dev, AX_CMD_READ_EEPROM,
725 eeprom->offset + i, 0, 2, &ebuf[i]) < 0)
726 return -EINVAL;
727 }
728 return 0;
729 }
730
731 static void asix_get_drvinfo (struct net_device *net,
732 struct ethtool_drvinfo *info)
733 {
734 struct usbnet *dev = netdev_priv(net);
735 struct asix_data *data = (struct asix_data *)&dev->data;
736
737 /* Inherit standard device info */
738 usbnet_get_drvinfo(net, info);
739 strncpy (info->driver, driver_name, sizeof info->driver);
740 strncpy (info->version, DRIVER_VERSION, sizeof info->version);
741 info->eedump_len = data->eeprom_len;
742 }
743
744 static u32 asix_get_link(struct net_device *net)
745 {
746 struct usbnet *dev = netdev_priv(net);
747
748 return mii_link_ok(&dev->mii);
749 }
750
751 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
752 {
753 struct usbnet *dev = netdev_priv(net);
754
755 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
756 }
757
758 static int asix_set_mac_address(struct net_device *net, void *p)
759 {
760 struct usbnet *dev = netdev_priv(net);
761 struct asix_data *data = (struct asix_data *)&dev->data;
762 struct sockaddr *addr = p;
763
764 if (netif_running(net))
765 return -EBUSY;
766 if (!is_valid_ether_addr(addr->sa_data))
767 return -EADDRNOTAVAIL;
768
769 memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
770
771 /* We use the 20 byte dev->data
772 * for our 6 byte mac buffer
773 * to avoid allocating memory that
774 * is tricky to free later */
775 memcpy(data->mac_addr, addr->sa_data, ETH_ALEN);
776 asix_write_cmd_async(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
777 data->mac_addr);
778
779 return 0;
780 }
781
782 /* We need to override some ethtool_ops so we require our
783 own structure so we don't interfere with other usbnet
784 devices that may be connected at the same time. */
785 static const struct ethtool_ops ax88172_ethtool_ops = {
786 .get_drvinfo = asix_get_drvinfo,
787 .get_link = asix_get_link,
788 .get_msglevel = usbnet_get_msglevel,
789 .set_msglevel = usbnet_set_msglevel,
790 .get_wol = asix_get_wol,
791 .set_wol = asix_set_wol,
792 .get_eeprom_len = asix_get_eeprom_len,
793 .get_eeprom = asix_get_eeprom,
794 .get_settings = usbnet_get_settings,
795 .set_settings = usbnet_set_settings,
796 .nway_reset = usbnet_nway_reset,
797 };
798
799 static void ax88172_set_multicast(struct net_device *net)
800 {
801 struct usbnet *dev = netdev_priv(net);
802 struct asix_data *data = (struct asix_data *)&dev->data;
803 u8 rx_ctl = 0x8c;
804
805 if (net->flags & IFF_PROMISC) {
806 rx_ctl |= 0x01;
807 } else if (net->flags & IFF_ALLMULTI ||
808 netdev_mc_count(net) > AX_MAX_MCAST) {
809 rx_ctl |= 0x02;
810 } else if (netdev_mc_empty(net)) {
811 /* just broadcast and directed */
812 } else {
813 /* We use the 20 byte dev->data
814 * for our 8 byte filter buffer
815 * to avoid allocating memory that
816 * is tricky to free later */
817 struct netdev_hw_addr *ha;
818 u32 crc_bits;
819
820 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
821
822 /* Build the multicast hash filter. */
823 netdev_for_each_mc_addr(ha, net) {
824 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
825 data->multi_filter[crc_bits >> 3] |=
826 1 << (crc_bits & 7);
827 }
828
829 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
830 AX_MCAST_FILTER_SIZE, data->multi_filter);
831
832 rx_ctl |= 0x10;
833 }
834
835 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
836 }
837
838 static int ax88172_link_reset(struct usbnet *dev)
839 {
840 u8 mode;
841 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
842
843 mii_check_media(&dev->mii, 1, 1);
844 mii_ethtool_gset(&dev->mii, &ecmd);
845 mode = AX88172_MEDIUM_DEFAULT;
846
847 if (ecmd.duplex != DUPLEX_FULL)
848 mode |= ~AX88172_MEDIUM_FD;
849
850 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
851 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
852
853 asix_write_medium_mode(dev, mode);
854
855 return 0;
856 }
857
858 static const struct net_device_ops ax88172_netdev_ops = {
859 .ndo_open = usbnet_open,
860 .ndo_stop = usbnet_stop,
861 .ndo_start_xmit = usbnet_start_xmit,
862 .ndo_tx_timeout = usbnet_tx_timeout,
863 .ndo_change_mtu = usbnet_change_mtu,
864 .ndo_set_mac_address = eth_mac_addr,
865 .ndo_validate_addr = eth_validate_addr,
866 .ndo_do_ioctl = asix_ioctl,
867 .ndo_set_rx_mode = ax88172_set_multicast,
868 };
869
870 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
871 {
872 int ret = 0;
873 u8 buf[ETH_ALEN];
874 int i;
875 unsigned long gpio_bits = dev->driver_info->data;
876 struct asix_data *data = (struct asix_data *)&dev->data;
877
878 data->eeprom_len = AX88172_EEPROM_LEN;
879
880 usbnet_get_endpoints(dev,intf);
881
882 /* Toggle the GPIOs in a manufacturer/model specific way */
883 for (i = 2; i >= 0; i--) {
884 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
885 (gpio_bits >> (i * 8)) & 0xff, 0, 0,
886 NULL)) < 0)
887 goto out;
888 msleep(5);
889 }
890
891 if ((ret = asix_write_rx_ctl(dev, 0x80)) < 0)
892 goto out;
893
894 /* Get the MAC address */
895 if ((ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID,
896 0, 0, ETH_ALEN, buf)) < 0) {
897 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
898 goto out;
899 }
900 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
901
902 /* Initialize MII structure */
903 dev->mii.dev = dev->net;
904 dev->mii.mdio_read = asix_mdio_read;
905 dev->mii.mdio_write = asix_mdio_write;
906 dev->mii.phy_id_mask = 0x3f;
907 dev->mii.reg_num_mask = 0x1f;
908 dev->mii.phy_id = asix_get_phy_addr(dev);
909
910 dev->net->netdev_ops = &ax88172_netdev_ops;
911 dev->net->ethtool_ops = &ax88172_ethtool_ops;
912
913 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
914 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
915 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
916 mii_nway_restart(&dev->mii);
917
918 return 0;
919
920 out:
921 return ret;
922 }
923
924 static const struct ethtool_ops ax88772_ethtool_ops = {
925 .get_drvinfo = asix_get_drvinfo,
926 .get_link = asix_get_link,
927 .get_msglevel = usbnet_get_msglevel,
928 .set_msglevel = usbnet_set_msglevel,
929 .get_wol = asix_get_wol,
930 .set_wol = asix_set_wol,
931 .get_eeprom_len = asix_get_eeprom_len,
932 .get_eeprom = asix_get_eeprom,
933 .get_settings = usbnet_get_settings,
934 .set_settings = usbnet_set_settings,
935 .nway_reset = usbnet_nway_reset,
936 };
937
938 static int ax88772_link_reset(struct usbnet *dev)
939 {
940 u16 mode;
941 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
942
943 mii_check_media(&dev->mii, 1, 1);
944 mii_ethtool_gset(&dev->mii, &ecmd);
945 mode = AX88772_MEDIUM_DEFAULT;
946
947 if (ethtool_cmd_speed(&ecmd) != SPEED_100)
948 mode &= ~AX_MEDIUM_PS;
949
950 if (ecmd.duplex != DUPLEX_FULL)
951 mode &= ~AX_MEDIUM_FD;
952
953 netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
954 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
955
956 asix_write_medium_mode(dev, mode);
957
958 return 0;
959 }
960
961 static int ax88772_reset(struct usbnet *dev)
962 {
963 int ret, embd_phy;
964 u16 rx_ctl;
965
966 if ((ret = asix_write_gpio(dev,
967 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5)) < 0)
968 goto out;
969
970 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
971
972 if ((ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT,
973 embd_phy, 0, 0, NULL)) < 0) {
974 dbg("Select PHY #1 failed: %d", ret);
975 goto out;
976 }
977
978 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL)) < 0)
979 goto out;
980
981 msleep(150);
982 if ((ret = asix_sw_reset(dev, AX_SWRESET_CLEAR)) < 0)
983 goto out;
984
985 msleep(150);
986
987 if (embd_phy) {
988 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL)) < 0)
989 goto out;
990 }
991 else {
992 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRTE)) < 0)
993 goto out;
994 }
995
996 msleep(150);
997 rx_ctl = asix_read_rx_ctl(dev);
998 dbg("RX_CTL is 0x%04x after software reset", rx_ctl);
999 if ((ret = asix_write_rx_ctl(dev, 0x0000)) < 0)
1000 goto out;
1001
1002 rx_ctl = asix_read_rx_ctl(dev);
1003 dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl);
1004
1005 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRL)) < 0)
1006 goto out;
1007
1008 msleep(150);
1009
1010 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL)) < 0)
1011 goto out;
1012
1013 msleep(150);
1014
1015 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
1016 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1017 ADVERTISE_ALL | ADVERTISE_CSMA);
1018 mii_nway_restart(&dev->mii);
1019
1020 if ((ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT)) < 0)
1021 goto out;
1022
1023 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
1024 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
1025 AX88772_IPG2_DEFAULT, 0, NULL)) < 0) {
1026 dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
1027 goto out;
1028 }
1029
1030 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
1031 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
1032 goto out;
1033
1034 rx_ctl = asix_read_rx_ctl(dev);
1035 dbg("RX_CTL is 0x%04x after all initializations", rx_ctl);
1036
1037 rx_ctl = asix_read_medium_status(dev);
1038 dbg("Medium Status is 0x%04x after all initializations", rx_ctl);
1039
1040 return 0;
1041
1042 out:
1043 return ret;
1044
1045 }
1046
1047 static const struct net_device_ops ax88772_netdev_ops = {
1048 .ndo_open = usbnet_open,
1049 .ndo_stop = usbnet_stop,
1050 .ndo_start_xmit = usbnet_start_xmit,
1051 .ndo_tx_timeout = usbnet_tx_timeout,
1052 .ndo_change_mtu = usbnet_change_mtu,
1053 .ndo_set_mac_address = asix_set_mac_address,
1054 .ndo_validate_addr = eth_validate_addr,
1055 .ndo_do_ioctl = asix_ioctl,
1056 .ndo_set_rx_mode = asix_set_multicast,
1057 };
1058
1059 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
1060 {
1061 int ret;
1062 struct asix_data *data = (struct asix_data *)&dev->data;
1063 u8 buf[ETH_ALEN];
1064 u32 phyid;
1065
1066 data->eeprom_len = AX88772_EEPROM_LEN;
1067
1068 usbnet_get_endpoints(dev,intf);
1069
1070 /* Get the MAC address */
1071 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
1072 0, 0, ETH_ALEN, buf)) < 0) {
1073 dbg("Failed to read MAC address: %d", ret);
1074 goto out;
1075 }
1076 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1077
1078 /* Initialize MII structure */
1079 dev->mii.dev = dev->net;
1080 dev->mii.mdio_read = asix_mdio_read;
1081 dev->mii.mdio_write = asix_mdio_write;
1082 dev->mii.phy_id_mask = 0x1f;
1083 dev->mii.reg_num_mask = 0x1f;
1084 dev->mii.phy_id = asix_get_phy_addr(dev);
1085
1086 phyid = asix_get_phyid(dev);
1087 dbg("PHYID=0x%08x", phyid);
1088
1089 dev->net->netdev_ops = &ax88772_netdev_ops;
1090 dev->net->ethtool_ops = &ax88772_ethtool_ops;
1091
1092 if ((ret = ax88772_reset(dev)) < 0)
1093 goto out;
1094
1095 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1096 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1097 /* hard_mtu is still the default - the device does not support
1098 jumbo eth frames */
1099 dev->rx_urb_size = 2048;
1100 }
1101 return 0;
1102 out:
1103 return ret;
1104 }
1105
1106 static struct ethtool_ops ax88178_ethtool_ops = {
1107 .get_drvinfo = asix_get_drvinfo,
1108 .get_link = asix_get_link,
1109 .get_msglevel = usbnet_get_msglevel,
1110 .set_msglevel = usbnet_set_msglevel,
1111 .get_wol = asix_get_wol,
1112 .set_wol = asix_set_wol,
1113 .get_eeprom_len = asix_get_eeprom_len,
1114 .get_eeprom = asix_get_eeprom,
1115 .get_settings = usbnet_get_settings,
1116 .set_settings = usbnet_set_settings,
1117 .nway_reset = usbnet_nway_reset,
1118 };
1119
1120 static int marvell_phy_init(struct usbnet *dev)
1121 {
1122 struct asix_data *data = (struct asix_data *)&dev->data;
1123 u16 reg;
1124
1125 netdev_dbg(dev->net, "marvell_phy_init()\n");
1126
1127 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
1128 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
1129
1130 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
1131 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
1132
1133 if (data->ledmode) {
1134 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1135 MII_MARVELL_LED_CTRL);
1136 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
1137
1138 reg &= 0xf8ff;
1139 reg |= (1 + 0x0100);
1140 asix_mdio_write(dev->net, dev->mii.phy_id,
1141 MII_MARVELL_LED_CTRL, reg);
1142
1143 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1144 MII_MARVELL_LED_CTRL);
1145 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
1146 reg &= 0xfc0f;
1147 }
1148
1149 return 0;
1150 }
1151
1152 static int marvell_led_status(struct usbnet *dev, u16 speed)
1153 {
1154 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
1155
1156 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
1157
1158 /* Clear out the center LED bits - 0x03F0 */
1159 reg &= 0xfc0f;
1160
1161 switch (speed) {
1162 case SPEED_1000:
1163 reg |= 0x03e0;
1164 break;
1165 case SPEED_100:
1166 reg |= 0x03b0;
1167 break;
1168 default:
1169 reg |= 0x02f0;
1170 }
1171
1172 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
1173 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
1174
1175 return 0;
1176 }
1177
1178 static int ax88178_link_reset(struct usbnet *dev)
1179 {
1180 u16 mode;
1181 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
1182 struct asix_data *data = (struct asix_data *)&dev->data;
1183 u32 speed;
1184
1185 netdev_dbg(dev->net, "ax88178_link_reset()\n");
1186
1187 mii_check_media(&dev->mii, 1, 1);
1188 mii_ethtool_gset(&dev->mii, &ecmd);
1189 mode = AX88178_MEDIUM_DEFAULT;
1190 speed = ethtool_cmd_speed(&ecmd);
1191
1192 if (speed == SPEED_1000)
1193 mode |= AX_MEDIUM_GM;
1194 else if (speed == SPEED_100)
1195 mode |= AX_MEDIUM_PS;
1196 else
1197 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1198
1199 mode |= AX_MEDIUM_ENCK;
1200
1201 if (ecmd.duplex == DUPLEX_FULL)
1202 mode |= AX_MEDIUM_FD;
1203 else
1204 mode &= ~AX_MEDIUM_FD;
1205
1206 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
1207 speed, ecmd.duplex, mode);
1208
1209 asix_write_medium_mode(dev, mode);
1210
1211 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1212 marvell_led_status(dev, speed);
1213
1214 return 0;
1215 }
1216
1217 static void ax88178_set_mfb(struct usbnet *dev)
1218 {
1219 u16 mfb = AX_RX_CTL_MFB_16384;
1220 u16 rxctl;
1221 u16 medium;
1222 int old_rx_urb_size = dev->rx_urb_size;
1223
1224 if (dev->hard_mtu < 2048) {
1225 dev->rx_urb_size = 2048;
1226 mfb = AX_RX_CTL_MFB_2048;
1227 } else if (dev->hard_mtu < 4096) {
1228 dev->rx_urb_size = 4096;
1229 mfb = AX_RX_CTL_MFB_4096;
1230 } else if (dev->hard_mtu < 8192) {
1231 dev->rx_urb_size = 8192;
1232 mfb = AX_RX_CTL_MFB_8192;
1233 } else if (dev->hard_mtu < 16384) {
1234 dev->rx_urb_size = 16384;
1235 mfb = AX_RX_CTL_MFB_16384;
1236 }
1237
1238 rxctl = asix_read_rx_ctl(dev);
1239 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
1240
1241 medium = asix_read_medium_status(dev);
1242 if (dev->net->mtu > 1500)
1243 medium |= AX_MEDIUM_JFE;
1244 else
1245 medium &= ~AX_MEDIUM_JFE;
1246 asix_write_medium_mode(dev, medium);
1247
1248 if (dev->rx_urb_size > old_rx_urb_size)
1249 usbnet_unlink_rx_urbs(dev);
1250 }
1251
1252 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
1253 {
1254 struct usbnet *dev = netdev_priv(net);
1255 int ll_mtu = new_mtu + net->hard_header_len + 4;
1256
1257 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
1258
1259 if (new_mtu <= 0 || ll_mtu > 16384)
1260 return -EINVAL;
1261
1262 if ((ll_mtu % dev->maxpacket) == 0)
1263 return -EDOM;
1264
1265 net->mtu = new_mtu;
1266 dev->hard_mtu = net->mtu + net->hard_header_len;
1267 ax88178_set_mfb(dev);
1268
1269 return 0;
1270 }
1271
1272 static const struct net_device_ops ax88178_netdev_ops = {
1273 .ndo_open = usbnet_open,
1274 .ndo_stop = usbnet_stop,
1275 .ndo_start_xmit = usbnet_start_xmit,
1276 .ndo_tx_timeout = usbnet_tx_timeout,
1277 .ndo_set_mac_address = asix_set_mac_address,
1278 .ndo_validate_addr = eth_validate_addr,
1279 .ndo_set_rx_mode = asix_set_multicast,
1280 .ndo_do_ioctl = asix_ioctl,
1281 .ndo_change_mtu = ax88178_change_mtu,
1282 };
1283
1284 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1285 {
1286 struct asix_data *data = (struct asix_data *)&dev->data;
1287 int ret;
1288 u8 buf[ETH_ALEN];
1289 __le16 eeprom;
1290 u8 status;
1291 int gpio0 = 0;
1292 u32 phyid;
1293
1294 usbnet_get_endpoints(dev,intf);
1295
1296 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
1297 dbg("GPIO Status: 0x%04x", status);
1298
1299 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
1300 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
1301 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
1302
1303 dbg("EEPROM index 0x17 is 0x%04x", eeprom);
1304
1305 if (eeprom == cpu_to_le16(0xffff)) {
1306 data->phymode = PHY_MODE_MARVELL;
1307 data->ledmode = 0;
1308 gpio0 = 1;
1309 } else {
1310 data->phymode = le16_to_cpu(eeprom) & 7;
1311 data->ledmode = le16_to_cpu(eeprom) >> 8;
1312 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
1313 }
1314 dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode);
1315
1316 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
1317 if ((le16_to_cpu(eeprom) >> 8) != 1) {
1318 asix_write_gpio(dev, 0x003c, 30);
1319 asix_write_gpio(dev, 0x001c, 300);
1320 asix_write_gpio(dev, 0x003c, 30);
1321 } else {
1322 dbg("gpio phymode == 1 path");
1323 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
1324 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
1325 }
1326
1327 asix_sw_reset(dev, 0);
1328 msleep(150);
1329
1330 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1331 msleep(150);
1332
1333 asix_write_rx_ctl(dev, 0);
1334
1335 /* Get the MAC address */
1336 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
1337 0, 0, ETH_ALEN, buf)) < 0) {
1338 dbg("Failed to read MAC address: %d", ret);
1339 goto out;
1340 }
1341 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1342
1343 /* Initialize MII structure */
1344 dev->mii.dev = dev->net;
1345 dev->mii.mdio_read = asix_mdio_read;
1346 dev->mii.mdio_write = asix_mdio_write;
1347 dev->mii.phy_id_mask = 0x1f;
1348 dev->mii.reg_num_mask = 0xff;
1349 dev->mii.supports_gmii = 1;
1350 dev->mii.phy_id = asix_get_phy_addr(dev);
1351
1352 dev->net->netdev_ops = &ax88178_netdev_ops;
1353 dev->net->ethtool_ops = &ax88178_ethtool_ops;
1354
1355 phyid = asix_get_phyid(dev);
1356 dbg("PHYID=0x%08x", phyid);
1357
1358 if (data->phymode == PHY_MODE_MARVELL) {
1359 marvell_phy_init(dev);
1360 msleep(60);
1361 }
1362
1363 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
1364 BMCR_RESET | BMCR_ANENABLE);
1365 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1366 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
1367 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
1368 ADVERTISE_1000FULL);
1369
1370 mii_nway_restart(&dev->mii);
1371
1372 if ((ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT)) < 0)
1373 goto out;
1374
1375 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
1376 goto out;
1377
1378 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1379 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1380 /* hard_mtu is still the default - the device does not support
1381 jumbo eth frames */
1382 dev->rx_urb_size = 2048;
1383 }
1384 return 0;
1385
1386 out:
1387 return ret;
1388 }
1389
1390 static const struct driver_info ax8817x_info = {
1391 .description = "ASIX AX8817x USB 2.0 Ethernet",
1392 .bind = ax88172_bind,
1393 .status = asix_status,
1394 .link_reset = ax88172_link_reset,
1395 .reset = ax88172_link_reset,
1396 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1397 .data = 0x00130103,
1398 };
1399
1400 static const struct driver_info dlink_dub_e100_info = {
1401 .description = "DLink DUB-E100 USB Ethernet",
1402 .bind = ax88172_bind,
1403 .status = asix_status,
1404 .link_reset = ax88172_link_reset,
1405 .reset = ax88172_link_reset,
1406 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1407 .data = 0x009f9d9f,
1408 };
1409
1410 static const struct driver_info netgear_fa120_info = {
1411 .description = "Netgear FA-120 USB Ethernet",
1412 .bind = ax88172_bind,
1413 .status = asix_status,
1414 .link_reset = ax88172_link_reset,
1415 .reset = ax88172_link_reset,
1416 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1417 .data = 0x00130103,
1418 };
1419
1420 static const struct driver_info hawking_uf200_info = {
1421 .description = "Hawking UF200 USB Ethernet",
1422 .bind = ax88172_bind,
1423 .status = asix_status,
1424 .link_reset = ax88172_link_reset,
1425 .reset = ax88172_link_reset,
1426 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1427 .data = 0x001f1d1f,
1428 };
1429
1430 static const struct driver_info ax88772_info = {
1431 .description = "ASIX AX88772 USB 2.0 Ethernet",
1432 .bind = ax88772_bind,
1433 .status = asix_status,
1434 .link_reset = ax88772_link_reset,
1435 .reset = ax88772_reset,
1436 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
1437 .rx_fixup = asix_rx_fixup,
1438 .tx_fixup = asix_tx_fixup,
1439 };
1440
1441 static const struct driver_info ax88178_info = {
1442 .description = "ASIX AX88178 USB 2.0 Ethernet",
1443 .bind = ax88178_bind,
1444 .status = asix_status,
1445 .link_reset = ax88178_link_reset,
1446 .reset = ax88178_link_reset,
1447 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
1448 .rx_fixup = asix_rx_fixup,
1449 .tx_fixup = asix_tx_fixup,
1450 };
1451
1452 static const struct usb_device_id products [] = {
1453 {
1454 // Linksys USB200M
1455 USB_DEVICE (0x077b, 0x2226),
1456 .driver_info = (unsigned long) &ax8817x_info,
1457 }, {
1458 // Netgear FA120
1459 USB_DEVICE (0x0846, 0x1040),
1460 .driver_info = (unsigned long) &netgear_fa120_info,
1461 }, {
1462 // DLink DUB-E100
1463 USB_DEVICE (0x2001, 0x1a00),
1464 .driver_info = (unsigned long) &dlink_dub_e100_info,
1465 }, {
1466 // Intellinet, ST Lab USB Ethernet
1467 USB_DEVICE (0x0b95, 0x1720),
1468 .driver_info = (unsigned long) &ax8817x_info,
1469 }, {
1470 // Hawking UF200, TrendNet TU2-ET100
1471 USB_DEVICE (0x07b8, 0x420a),
1472 .driver_info = (unsigned long) &hawking_uf200_info,
1473 }, {
1474 // Billionton Systems, USB2AR
1475 USB_DEVICE (0x08dd, 0x90ff),
1476 .driver_info = (unsigned long) &ax8817x_info,
1477 }, {
1478 // ATEN UC210T
1479 USB_DEVICE (0x0557, 0x2009),
1480 .driver_info = (unsigned long) &ax8817x_info,
1481 }, {
1482 // Buffalo LUA-U2-KTX
1483 USB_DEVICE (0x0411, 0x003d),
1484 .driver_info = (unsigned long) &ax8817x_info,
1485 }, {
1486 // Buffalo LUA-U2-GT 10/100/1000
1487 USB_DEVICE (0x0411, 0x006e),
1488 .driver_info = (unsigned long) &ax88178_info,
1489 }, {
1490 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1491 USB_DEVICE (0x6189, 0x182d),
1492 .driver_info = (unsigned long) &ax8817x_info,
1493 }, {
1494 // corega FEther USB2-TX
1495 USB_DEVICE (0x07aa, 0x0017),
1496 .driver_info = (unsigned long) &ax8817x_info,
1497 }, {
1498 // Surecom EP-1427X-2
1499 USB_DEVICE (0x1189, 0x0893),
1500 .driver_info = (unsigned long) &ax8817x_info,
1501 }, {
1502 // goodway corp usb gwusb2e
1503 USB_DEVICE (0x1631, 0x6200),
1504 .driver_info = (unsigned long) &ax8817x_info,
1505 }, {
1506 // JVC MP-PRX1 Port Replicator
1507 USB_DEVICE (0x04f1, 0x3008),
1508 .driver_info = (unsigned long) &ax8817x_info,
1509 }, {
1510 // ASIX AX88772B 10/100
1511 USB_DEVICE (0x0b95, 0x772b),
1512 .driver_info = (unsigned long) &ax88772_info,
1513 }, {
1514 // ASIX AX88772 10/100
1515 USB_DEVICE (0x0b95, 0x7720),
1516 .driver_info = (unsigned long) &ax88772_info,
1517 }, {
1518 // ASIX AX88178 10/100/1000
1519 USB_DEVICE (0x0b95, 0x1780),
1520 .driver_info = (unsigned long) &ax88178_info,
1521 }, {
1522 // Logitec LAN-GTJ/U2A
1523 USB_DEVICE (0x0789, 0x0160),
1524 .driver_info = (unsigned long) &ax88178_info,
1525 }, {
1526 // Linksys USB200M Rev 2
1527 USB_DEVICE (0x13b1, 0x0018),
1528 .driver_info = (unsigned long) &ax88772_info,
1529 }, {
1530 // 0Q0 cable ethernet
1531 USB_DEVICE (0x1557, 0x7720),
1532 .driver_info = (unsigned long) &ax88772_info,
1533 }, {
1534 // DLink DUB-E100 H/W Ver B1
1535 USB_DEVICE (0x07d1, 0x3c05),
1536 .driver_info = (unsigned long) &ax88772_info,
1537 }, {
1538 // DLink DUB-E100 H/W Ver B1 Alternate
1539 USB_DEVICE (0x2001, 0x3c05),
1540 .driver_info = (unsigned long) &ax88772_info,
1541 }, {
1542 // Linksys USB1000
1543 USB_DEVICE (0x1737, 0x0039),
1544 .driver_info = (unsigned long) &ax88178_info,
1545 }, {
1546 // IO-DATA ETG-US2
1547 USB_DEVICE (0x04bb, 0x0930),
1548 .driver_info = (unsigned long) &ax88178_info,
1549 }, {
1550 // Belkin F5D5055
1551 USB_DEVICE(0x050d, 0x5055),
1552 .driver_info = (unsigned long) &ax88178_info,
1553 }, {
1554 // Apple USB Ethernet Adapter
1555 USB_DEVICE(0x05ac, 0x1402),
1556 .driver_info = (unsigned long) &ax88772_info,
1557 }, {
1558 // Cables-to-Go USB Ethernet Adapter
1559 USB_DEVICE(0x0b95, 0x772a),
1560 .driver_info = (unsigned long) &ax88772_info,
1561 }, {
1562 // ABOCOM for pci
1563 USB_DEVICE(0x14ea, 0xab11),
1564 .driver_info = (unsigned long) &ax88178_info,
1565 }, {
1566 // ASIX 88772a
1567 USB_DEVICE(0x0db0, 0xa877),
1568 .driver_info = (unsigned long) &ax88772_info,
1569 },
1570 { }, // END
1571 };
1572 MODULE_DEVICE_TABLE(usb, products);
1573
1574 static struct usb_driver asix_driver = {
1575 .name = "asix",
1576 .id_table = products,
1577 .probe = usbnet_probe,
1578 .suspend = usbnet_suspend,
1579 .resume = usbnet_resume,
1580 .disconnect = usbnet_disconnect,
1581 .supports_autosuspend = 1,
1582 };
1583
1584 static int __init asix_init(void)
1585 {
1586 return usb_register(&asix_driver);
1587 }
1588 module_init(asix_init);
1589
1590 static void __exit asix_exit(void)
1591 {
1592 usb_deregister(&asix_driver);
1593 }
1594 module_exit(asix_exit);
1595
1596 MODULE_AUTHOR("David Hollis");
1597 MODULE_VERSION(DRIVER_VERSION);
1598 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1599 MODULE_LICENSE("GPL");
1600
Linux kernel - Deliverables
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