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NET: fix phy init for Asix AX88178 USB (GigE)
[deliverable/linux.git] / drivers / net / usb / asix.c
1 /*
2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23 // #define DEBUG // error path messages, extra info
24 // #define VERBOSE // more; success messages
25
26 #include <linux/module.h>
27 #include <linux/kmod.h>
28 #include <linux/init.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/ethtool.h>
32 #include <linux/workqueue.h>
33 #include <linux/mii.h>
34 #include <linux/usb.h>
35 #include <linux/crc32.h>
36 #include <linux/usb/usbnet.h>
37 #include <linux/slab.h>
38
39 #define DRIVER_VERSION "26-Sep-2011"
40 static const char driver_name [] = "asix";
41
42 /* ASIX AX8817X based USB 2.0 Ethernet Devices */
43
44 #define AX_CMD_SET_SW_MII 0x06
45 #define AX_CMD_READ_MII_REG 0x07
46 #define AX_CMD_WRITE_MII_REG 0x08
47 #define AX_CMD_SET_HW_MII 0x0a
48 #define AX_CMD_READ_EEPROM 0x0b
49 #define AX_CMD_WRITE_EEPROM 0x0c
50 #define AX_CMD_WRITE_ENABLE 0x0d
51 #define AX_CMD_WRITE_DISABLE 0x0e
52 #define AX_CMD_READ_RX_CTL 0x0f
53 #define AX_CMD_WRITE_RX_CTL 0x10
54 #define AX_CMD_READ_IPG012 0x11
55 #define AX_CMD_WRITE_IPG0 0x12
56 #define AX_CMD_WRITE_IPG1 0x13
57 #define AX_CMD_READ_NODE_ID 0x13
58 #define AX_CMD_WRITE_NODE_ID 0x14
59 #define AX_CMD_WRITE_IPG2 0x14
60 #define AX_CMD_WRITE_MULTI_FILTER 0x16
61 #define AX88172_CMD_READ_NODE_ID 0x17
62 #define AX_CMD_READ_PHY_ID 0x19
63 #define AX_CMD_READ_MEDIUM_STATUS 0x1a
64 #define AX_CMD_WRITE_MEDIUM_MODE 0x1b
65 #define AX_CMD_READ_MONITOR_MODE 0x1c
66 #define AX_CMD_WRITE_MONITOR_MODE 0x1d
67 #define AX_CMD_READ_GPIOS 0x1e
68 #define AX_CMD_WRITE_GPIOS 0x1f
69 #define AX_CMD_SW_RESET 0x20
70 #define AX_CMD_SW_PHY_STATUS 0x21
71 #define AX_CMD_SW_PHY_SELECT 0x22
72
73 #define AX_MONITOR_MODE 0x01
74 #define AX_MONITOR_LINK 0x02
75 #define AX_MONITOR_MAGIC 0x04
76 #define AX_MONITOR_HSFS 0x10
77
78 /* AX88172 Medium Status Register values */
79 #define AX88172_MEDIUM_FD 0x02
80 #define AX88172_MEDIUM_TX 0x04
81 #define AX88172_MEDIUM_FC 0x10
82 #define AX88172_MEDIUM_DEFAULT \
83 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
84
85 #define AX_MCAST_FILTER_SIZE 8
86 #define AX_MAX_MCAST 64
87
88 #define AX_SWRESET_CLEAR 0x00
89 #define AX_SWRESET_RR 0x01
90 #define AX_SWRESET_RT 0x02
91 #define AX_SWRESET_PRTE 0x04
92 #define AX_SWRESET_PRL 0x08
93 #define AX_SWRESET_BZ 0x10
94 #define AX_SWRESET_IPRL 0x20
95 #define AX_SWRESET_IPPD 0x40
96
97 #define AX88772_IPG0_DEFAULT 0x15
98 #define AX88772_IPG1_DEFAULT 0x0c
99 #define AX88772_IPG2_DEFAULT 0x12
100
101 /* AX88772 & AX88178 Medium Mode Register */
102 #define AX_MEDIUM_PF 0x0080
103 #define AX_MEDIUM_JFE 0x0040
104 #define AX_MEDIUM_TFC 0x0020
105 #define AX_MEDIUM_RFC 0x0010
106 #define AX_MEDIUM_ENCK 0x0008
107 #define AX_MEDIUM_AC 0x0004
108 #define AX_MEDIUM_FD 0x0002
109 #define AX_MEDIUM_GM 0x0001
110 #define AX_MEDIUM_SM 0x1000
111 #define AX_MEDIUM_SBP 0x0800
112 #define AX_MEDIUM_PS 0x0200
113 #define AX_MEDIUM_RE 0x0100
114
115 #define AX88178_MEDIUM_DEFAULT \
116 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
117 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
118 AX_MEDIUM_RE )
119
120 #define AX88772_MEDIUM_DEFAULT \
121 (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
122 AX_MEDIUM_TFC | AX_MEDIUM_PS | \
123 AX_MEDIUM_AC | AX_MEDIUM_RE )
124
125 /* AX88772 & AX88178 RX_CTL values */
126 #define AX_RX_CTL_SO 0x0080
127 #define AX_RX_CTL_AP 0x0020
128 #define AX_RX_CTL_AM 0x0010
129 #define AX_RX_CTL_AB 0x0008
130 #define AX_RX_CTL_SEP 0x0004
131 #define AX_RX_CTL_AMALL 0x0002
132 #define AX_RX_CTL_PRO 0x0001
133 #define AX_RX_CTL_MFB_2048 0x0000
134 #define AX_RX_CTL_MFB_4096 0x0100
135 #define AX_RX_CTL_MFB_8192 0x0200
136 #define AX_RX_CTL_MFB_16384 0x0300
137
138 #define AX_DEFAULT_RX_CTL \
139 (AX_RX_CTL_SO | AX_RX_CTL_AB )
140
141 /* GPIO 0 .. 2 toggles */
142 #define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
143 #define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
144 #define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
145 #define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
146 #define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
147 #define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
148 #define AX_GPIO_RESERVED 0x40 /* Reserved */
149 #define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
150
151 #define AX_EEPROM_MAGIC 0xdeadbeef
152 #define AX88172_EEPROM_LEN 0x40
153 #define AX88772_EEPROM_LEN 0xff
154
155 #define PHY_MODE_MARVELL 0x0000
156 #define MII_MARVELL_LED_CTRL 0x0018
157 #define MII_MARVELL_STATUS 0x001b
158 #define MII_MARVELL_CTRL 0x0014
159
160 #define MARVELL_LED_MANUAL 0x0019
161
162 #define MARVELL_STATUS_HWCFG 0x0004
163
164 #define MARVELL_CTRL_TXDELAY 0x0002
165 #define MARVELL_CTRL_RXDELAY 0x0080
166
167 #define PHY_MODE_RTL8211CL 0x0004
168
169 /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
170 struct asix_data {
171 u8 multi_filter[AX_MCAST_FILTER_SIZE];
172 u8 mac_addr[ETH_ALEN];
173 u8 phymode;
174 u8 ledmode;
175 u8 eeprom_len;
176 };
177
178 struct ax88172_int_data {
179 __le16 res1;
180 u8 link;
181 __le16 res2;
182 u8 status;
183 __le16 res3;
184 } __packed;
185
186 static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
187 u16 size, void *data)
188 {
189 void *buf;
190 int err = -ENOMEM;
191
192 netdev_dbg(dev->net, "asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
193 cmd, value, index, size);
194
195 buf = kmalloc(size, GFP_KERNEL);
196 if (!buf)
197 goto out;
198
199 err = usb_control_msg(
200 dev->udev,
201 usb_rcvctrlpipe(dev->udev, 0),
202 cmd,
203 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
204 value,
205 index,
206 buf,
207 size,
208 USB_CTRL_GET_TIMEOUT);
209 if (err == size)
210 memcpy(data, buf, size);
211 else if (err >= 0)
212 err = -EINVAL;
213 kfree(buf);
214
215 out:
216 return err;
217 }
218
219 static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
220 u16 size, void *data)
221 {
222 void *buf = NULL;
223 int err = -ENOMEM;
224
225 netdev_dbg(dev->net, "asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
226 cmd, value, index, size);
227
228 if (data) {
229 buf = kmemdup(data, size, GFP_KERNEL);
230 if (!buf)
231 goto out;
232 }
233
234 err = usb_control_msg(
235 dev->udev,
236 usb_sndctrlpipe(dev->udev, 0),
237 cmd,
238 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
239 value,
240 index,
241 buf,
242 size,
243 USB_CTRL_SET_TIMEOUT);
244 kfree(buf);
245
246 out:
247 return err;
248 }
249
250 static void asix_async_cmd_callback(struct urb *urb)
251 {
252 struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
253 int status = urb->status;
254
255 if (status < 0)
256 printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d",
257 status);
258
259 kfree(req);
260 usb_free_urb(urb);
261 }
262
263 static void
264 asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
265 u16 size, void *data)
266 {
267 struct usb_ctrlrequest *req;
268 int status;
269 struct urb *urb;
270
271 netdev_dbg(dev->net, "asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
272 cmd, value, index, size);
273 if ((urb = usb_alloc_urb(0, GFP_ATOMIC)) == NULL) {
274 netdev_err(dev->net, "Error allocating URB in write_cmd_async!\n");
275 return;
276 }
277
278 if ((req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC)) == NULL) {
279 netdev_err(dev->net, "Failed to allocate memory for control request\n");
280 usb_free_urb(urb);
281 return;
282 }
283
284 req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
285 req->bRequest = cmd;
286 req->wValue = cpu_to_le16(value);
287 req->wIndex = cpu_to_le16(index);
288 req->wLength = cpu_to_le16(size);
289
290 usb_fill_control_urb(urb, dev->udev,
291 usb_sndctrlpipe(dev->udev, 0),
292 (void *)req, data, size,
293 asix_async_cmd_callback, req);
294
295 if((status = usb_submit_urb(urb, GFP_ATOMIC)) < 0) {
296 netdev_err(dev->net, "Error submitting the control message: status=%d\n",
297 status);
298 kfree(req);
299 usb_free_urb(urb);
300 }
301 }
302
303 static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
304 {
305 u8 *head;
306 u32 header;
307 char *packet;
308 struct sk_buff *ax_skb;
309 u16 size;
310
311 head = (u8 *) skb->data;
312 memcpy(&header, head, sizeof(header));
313 le32_to_cpus(&header);
314 packet = head + sizeof(header);
315
316 skb_pull(skb, 4);
317
318 while (skb->len > 0) {
319 if ((header & 0x07ff) != ((~header >> 16) & 0x07ff))
320 netdev_err(dev->net, "asix_rx_fixup() Bad Header Length\n");
321
322 /* get the packet length */
323 size = (u16) (header & 0x000007ff);
324
325 if ((skb->len) - ((size + 1) & 0xfffe) == 0) {
326 u8 alignment = (unsigned long)skb->data & 0x3;
327 if (alignment != 0x2) {
328 /*
329 * not 16bit aligned so use the room provided by
330 * the 32 bit header to align the data
331 *
332 * note we want 16bit alignment as MAC header is
333 * 14bytes thus ip header will be aligned on
334 * 32bit boundary so accessing ipheader elements
335 * using a cast to struct ip header wont cause
336 * an unaligned accesses.
337 */
338 u8 realignment = (alignment + 2) & 0x3;
339 memmove(skb->data - realignment,
340 skb->data,
341 size);
342 skb->data -= realignment;
343 skb_set_tail_pointer(skb, size);
344 }
345 return 2;
346 }
347
348 if (size > dev->net->mtu + ETH_HLEN) {
349 netdev_err(dev->net, "asix_rx_fixup() Bad RX Length %d\n",
350 size);
351 return 0;
352 }
353 ax_skb = skb_clone(skb, GFP_ATOMIC);
354 if (ax_skb) {
355 u8 alignment = (unsigned long)packet & 0x3;
356 ax_skb->len = size;
357
358 if (alignment != 0x2) {
359 /*
360 * not 16bit aligned use the room provided by
361 * the 32 bit header to align the data
362 */
363 u8 realignment = (alignment + 2) & 0x3;
364 memmove(packet - realignment, packet, size);
365 packet -= realignment;
366 }
367 ax_skb->data = packet;
368 skb_set_tail_pointer(ax_skb, size);
369 usbnet_skb_return(dev, ax_skb);
370 } else {
371 return 0;
372 }
373
374 skb_pull(skb, (size + 1) & 0xfffe);
375
376 if (skb->len == 0)
377 break;
378
379 head = (u8 *) skb->data;
380 memcpy(&header, head, sizeof(header));
381 le32_to_cpus(&header);
382 packet = head + sizeof(header);
383 skb_pull(skb, 4);
384 }
385
386 if (skb->len < 0) {
387 netdev_err(dev->net, "asix_rx_fixup() Bad SKB Length %d\n",
388 skb->len);
389 return 0;
390 }
391 return 1;
392 }
393
394 static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
395 gfp_t flags)
396 {
397 int padlen;
398 int headroom = skb_headroom(skb);
399 int tailroom = skb_tailroom(skb);
400 u32 packet_len;
401 u32 padbytes = 0xffff0000;
402
403 padlen = ((skb->len + 4) % 512) ? 0 : 4;
404
405 if ((!skb_cloned(skb)) &&
406 ((headroom + tailroom) >= (4 + padlen))) {
407 if ((headroom < 4) || (tailroom < padlen)) {
408 skb->data = memmove(skb->head + 4, skb->data, skb->len);
409 skb_set_tail_pointer(skb, skb->len);
410 }
411 } else {
412 struct sk_buff *skb2;
413 skb2 = skb_copy_expand(skb, 4, padlen, flags);
414 dev_kfree_skb_any(skb);
415 skb = skb2;
416 if (!skb)
417 return NULL;
418 }
419
420 skb_push(skb, 4);
421 packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
422 cpu_to_le32s(&packet_len);
423 skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len));
424
425 if ((skb->len % 512) == 0) {
426 cpu_to_le32s(&padbytes);
427 memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes));
428 skb_put(skb, sizeof(padbytes));
429 }
430 return skb;
431 }
432
433 static void asix_status(struct usbnet *dev, struct urb *urb)
434 {
435 struct ax88172_int_data *event;
436 int link;
437
438 if (urb->actual_length < 8)
439 return;
440
441 event = urb->transfer_buffer;
442 link = event->link & 0x01;
443 if (netif_carrier_ok(dev->net) != link) {
444 if (link) {
445 netif_carrier_on(dev->net);
446 usbnet_defer_kevent (dev, EVENT_LINK_RESET );
447 } else
448 netif_carrier_off(dev->net);
449 netdev_dbg(dev->net, "Link Status is: %d\n", link);
450 }
451 }
452
453 static inline int asix_set_sw_mii(struct usbnet *dev)
454 {
455 int ret;
456 ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
457 if (ret < 0)
458 netdev_err(dev->net, "Failed to enable software MII access\n");
459 return ret;
460 }
461
462 static inline int asix_set_hw_mii(struct usbnet *dev)
463 {
464 int ret;
465 ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
466 if (ret < 0)
467 netdev_err(dev->net, "Failed to enable hardware MII access\n");
468 return ret;
469 }
470
471 static inline int asix_get_phy_addr(struct usbnet *dev)
472 {
473 u8 buf[2];
474 int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf);
475
476 netdev_dbg(dev->net, "asix_get_phy_addr()\n");
477
478 if (ret < 0) {
479 netdev_err(dev->net, "Error reading PHYID register: %02x\n", ret);
480 goto out;
481 }
482 netdev_dbg(dev->net, "asix_get_phy_addr() returning 0x%04x\n",
483 *((__le16 *)buf));
484 ret = buf[1];
485
486 out:
487 return ret;
488 }
489
490 static int asix_sw_reset(struct usbnet *dev, u8 flags)
491 {
492 int ret;
493
494 ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
495 if (ret < 0)
496 netdev_err(dev->net, "Failed to send software reset: %02x\n", ret);
497
498 return ret;
499 }
500
501 static u16 asix_read_rx_ctl(struct usbnet *dev)
502 {
503 __le16 v;
504 int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v);
505
506 if (ret < 0) {
507 netdev_err(dev->net, "Error reading RX_CTL register: %02x\n", ret);
508 goto out;
509 }
510 ret = le16_to_cpu(v);
511 out:
512 return ret;
513 }
514
515 static int asix_write_rx_ctl(struct usbnet *dev, u16 mode)
516 {
517 int ret;
518
519 netdev_dbg(dev->net, "asix_write_rx_ctl() - mode = 0x%04x\n", mode);
520 ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
521 if (ret < 0)
522 netdev_err(dev->net, "Failed to write RX_CTL mode to 0x%04x: %02x\n",
523 mode, ret);
524
525 return ret;
526 }
527
528 static u16 asix_read_medium_status(struct usbnet *dev)
529 {
530 __le16 v;
531 int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v);
532
533 if (ret < 0) {
534 netdev_err(dev->net, "Error reading Medium Status register: %02x\n",
535 ret);
536 goto out;
537 }
538 ret = le16_to_cpu(v);
539 out:
540 return ret;
541 }
542
543 static int asix_write_medium_mode(struct usbnet *dev, u16 mode)
544 {
545 int ret;
546
547 netdev_dbg(dev->net, "asix_write_medium_mode() - mode = 0x%04x\n", mode);
548 ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
549 if (ret < 0)
550 netdev_err(dev->net, "Failed to write Medium Mode mode to 0x%04x: %02x\n",
551 mode, ret);
552
553 return ret;
554 }
555
556 static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep)
557 {
558 int ret;
559
560 netdev_dbg(dev->net, "asix_write_gpio() - value = 0x%04x\n", value);
561 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL);
562 if (ret < 0)
563 netdev_err(dev->net, "Failed to write GPIO value 0x%04x: %02x\n",
564 value, ret);
565
566 if (sleep)
567 msleep(sleep);
568
569 return ret;
570 }
571
572 /*
573 * AX88772 & AX88178 have a 16-bit RX_CTL value
574 */
575 static void asix_set_multicast(struct net_device *net)
576 {
577 struct usbnet *dev = netdev_priv(net);
578 struct asix_data *data = (struct asix_data *)&dev->data;
579 u16 rx_ctl = AX_DEFAULT_RX_CTL;
580
581 if (net->flags & IFF_PROMISC) {
582 rx_ctl |= AX_RX_CTL_PRO;
583 } else if (net->flags & IFF_ALLMULTI ||
584 netdev_mc_count(net) > AX_MAX_MCAST) {
585 rx_ctl |= AX_RX_CTL_AMALL;
586 } else if (netdev_mc_empty(net)) {
587 /* just broadcast and directed */
588 } else {
589 /* We use the 20 byte dev->data
590 * for our 8 byte filter buffer
591 * to avoid allocating memory that
592 * is tricky to free later */
593 struct netdev_hw_addr *ha;
594 u32 crc_bits;
595
596 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
597
598 /* Build the multicast hash filter. */
599 netdev_for_each_mc_addr(ha, net) {
600 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
601 data->multi_filter[crc_bits >> 3] |=
602 1 << (crc_bits & 7);
603 }
604
605 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
606 AX_MCAST_FILTER_SIZE, data->multi_filter);
607
608 rx_ctl |= AX_RX_CTL_AM;
609 }
610
611 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
612 }
613
614 static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc)
615 {
616 struct usbnet *dev = netdev_priv(netdev);
617 __le16 res;
618
619 mutex_lock(&dev->phy_mutex);
620 asix_set_sw_mii(dev);
621 asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id,
622 (__u16)loc, 2, &res);
623 asix_set_hw_mii(dev);
624 mutex_unlock(&dev->phy_mutex);
625
626 netdev_dbg(dev->net, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n",
627 phy_id, loc, le16_to_cpu(res));
628
629 return le16_to_cpu(res);
630 }
631
632 static void
633 asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val)
634 {
635 struct usbnet *dev = netdev_priv(netdev);
636 __le16 res = cpu_to_le16(val);
637
638 netdev_dbg(dev->net, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n",
639 phy_id, loc, val);
640 mutex_lock(&dev->phy_mutex);
641 asix_set_sw_mii(dev);
642 asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res);
643 asix_set_hw_mii(dev);
644 mutex_unlock(&dev->phy_mutex);
645 }
646
647 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
648 static u32 asix_get_phyid(struct usbnet *dev)
649 {
650 int phy_reg;
651 u32 phy_id;
652
653 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
654 if (phy_reg < 0)
655 return 0;
656
657 phy_id = (phy_reg & 0xffff) << 16;
658
659 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
660 if (phy_reg < 0)
661 return 0;
662
663 phy_id |= (phy_reg & 0xffff);
664
665 return phy_id;
666 }
667
668 static void
669 asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
670 {
671 struct usbnet *dev = netdev_priv(net);
672 u8 opt;
673
674 if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
675 wolinfo->supported = 0;
676 wolinfo->wolopts = 0;
677 return;
678 }
679 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
680 wolinfo->wolopts = 0;
681 }
682
683 static int
684 asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
685 {
686 struct usbnet *dev = netdev_priv(net);
687 u8 opt = 0;
688
689 if (wolinfo->wolopts & WAKE_PHY)
690 opt |= AX_MONITOR_LINK;
691 if (wolinfo->wolopts & WAKE_MAGIC)
692 opt |= AX_MONITOR_MAGIC;
693
694 if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE,
695 opt, 0, 0, NULL) < 0)
696 return -EINVAL;
697
698 return 0;
699 }
700
701 static int asix_get_eeprom_len(struct net_device *net)
702 {
703 struct usbnet *dev = netdev_priv(net);
704 struct asix_data *data = (struct asix_data *)&dev->data;
705
706 return data->eeprom_len;
707 }
708
709 static int asix_get_eeprom(struct net_device *net,
710 struct ethtool_eeprom *eeprom, u8 *data)
711 {
712 struct usbnet *dev = netdev_priv(net);
713 __le16 *ebuf = (__le16 *)data;
714 int i;
715
716 /* Crude hack to ensure that we don't overwrite memory
717 * if an odd length is supplied
718 */
719 if (eeprom->len % 2)
720 return -EINVAL;
721
722 eeprom->magic = AX_EEPROM_MAGIC;
723
724 /* ax8817x returns 2 bytes from eeprom on read */
725 for (i=0; i < eeprom->len / 2; i++) {
726 if (asix_read_cmd(dev, AX_CMD_READ_EEPROM,
727 eeprom->offset + i, 0, 2, &ebuf[i]) < 0)
728 return -EINVAL;
729 }
730 return 0;
731 }
732
733 static void asix_get_drvinfo (struct net_device *net,
734 struct ethtool_drvinfo *info)
735 {
736 struct usbnet *dev = netdev_priv(net);
737 struct asix_data *data = (struct asix_data *)&dev->data;
738
739 /* Inherit standard device info */
740 usbnet_get_drvinfo(net, info);
741 strncpy (info->driver, driver_name, sizeof info->driver);
742 strncpy (info->version, DRIVER_VERSION, sizeof info->version);
743 info->eedump_len = data->eeprom_len;
744 }
745
746 static u32 asix_get_link(struct net_device *net)
747 {
748 struct usbnet *dev = netdev_priv(net);
749
750 return mii_link_ok(&dev->mii);
751 }
752
753 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
754 {
755 struct usbnet *dev = netdev_priv(net);
756
757 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
758 }
759
760 static int asix_set_mac_address(struct net_device *net, void *p)
761 {
762 struct usbnet *dev = netdev_priv(net);
763 struct asix_data *data = (struct asix_data *)&dev->data;
764 struct sockaddr *addr = p;
765
766 if (netif_running(net))
767 return -EBUSY;
768 if (!is_valid_ether_addr(addr->sa_data))
769 return -EADDRNOTAVAIL;
770
771 memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
772
773 /* We use the 20 byte dev->data
774 * for our 6 byte mac buffer
775 * to avoid allocating memory that
776 * is tricky to free later */
777 memcpy(data->mac_addr, addr->sa_data, ETH_ALEN);
778 asix_write_cmd_async(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
779 data->mac_addr);
780
781 return 0;
782 }
783
784 /* We need to override some ethtool_ops so we require our
785 own structure so we don't interfere with other usbnet
786 devices that may be connected at the same time. */
787 static const struct ethtool_ops ax88172_ethtool_ops = {
788 .get_drvinfo = asix_get_drvinfo,
789 .get_link = asix_get_link,
790 .get_msglevel = usbnet_get_msglevel,
791 .set_msglevel = usbnet_set_msglevel,
792 .get_wol = asix_get_wol,
793 .set_wol = asix_set_wol,
794 .get_eeprom_len = asix_get_eeprom_len,
795 .get_eeprom = asix_get_eeprom,
796 .get_settings = usbnet_get_settings,
797 .set_settings = usbnet_set_settings,
798 .nway_reset = usbnet_nway_reset,
799 };
800
801 static void ax88172_set_multicast(struct net_device *net)
802 {
803 struct usbnet *dev = netdev_priv(net);
804 struct asix_data *data = (struct asix_data *)&dev->data;
805 u8 rx_ctl = 0x8c;
806
807 if (net->flags & IFF_PROMISC) {
808 rx_ctl |= 0x01;
809 } else if (net->flags & IFF_ALLMULTI ||
810 netdev_mc_count(net) > AX_MAX_MCAST) {
811 rx_ctl |= 0x02;
812 } else if (netdev_mc_empty(net)) {
813 /* just broadcast and directed */
814 } else {
815 /* We use the 20 byte dev->data
816 * for our 8 byte filter buffer
817 * to avoid allocating memory that
818 * is tricky to free later */
819 struct netdev_hw_addr *ha;
820 u32 crc_bits;
821
822 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
823
824 /* Build the multicast hash filter. */
825 netdev_for_each_mc_addr(ha, net) {
826 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
827 data->multi_filter[crc_bits >> 3] |=
828 1 << (crc_bits & 7);
829 }
830
831 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
832 AX_MCAST_FILTER_SIZE, data->multi_filter);
833
834 rx_ctl |= 0x10;
835 }
836
837 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
838 }
839
840 static int ax88172_link_reset(struct usbnet *dev)
841 {
842 u8 mode;
843 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
844
845 mii_check_media(&dev->mii, 1, 1);
846 mii_ethtool_gset(&dev->mii, &ecmd);
847 mode = AX88172_MEDIUM_DEFAULT;
848
849 if (ecmd.duplex != DUPLEX_FULL)
850 mode |= ~AX88172_MEDIUM_FD;
851
852 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
853 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
854
855 asix_write_medium_mode(dev, mode);
856
857 return 0;
858 }
859
860 static const struct net_device_ops ax88172_netdev_ops = {
861 .ndo_open = usbnet_open,
862 .ndo_stop = usbnet_stop,
863 .ndo_start_xmit = usbnet_start_xmit,
864 .ndo_tx_timeout = usbnet_tx_timeout,
865 .ndo_change_mtu = usbnet_change_mtu,
866 .ndo_set_mac_address = eth_mac_addr,
867 .ndo_validate_addr = eth_validate_addr,
868 .ndo_do_ioctl = asix_ioctl,
869 .ndo_set_rx_mode = ax88172_set_multicast,
870 };
871
872 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
873 {
874 int ret = 0;
875 u8 buf[ETH_ALEN];
876 int i;
877 unsigned long gpio_bits = dev->driver_info->data;
878 struct asix_data *data = (struct asix_data *)&dev->data;
879
880 data->eeprom_len = AX88172_EEPROM_LEN;
881
882 usbnet_get_endpoints(dev,intf);
883
884 /* Toggle the GPIOs in a manufacturer/model specific way */
885 for (i = 2; i >= 0; i--) {
886 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
887 (gpio_bits >> (i * 8)) & 0xff, 0, 0,
888 NULL)) < 0)
889 goto out;
890 msleep(5);
891 }
892
893 if ((ret = asix_write_rx_ctl(dev, 0x80)) < 0)
894 goto out;
895
896 /* Get the MAC address */
897 if ((ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID,
898 0, 0, ETH_ALEN, buf)) < 0) {
899 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
900 goto out;
901 }
902 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
903
904 /* Initialize MII structure */
905 dev->mii.dev = dev->net;
906 dev->mii.mdio_read = asix_mdio_read;
907 dev->mii.mdio_write = asix_mdio_write;
908 dev->mii.phy_id_mask = 0x3f;
909 dev->mii.reg_num_mask = 0x1f;
910 dev->mii.phy_id = asix_get_phy_addr(dev);
911
912 dev->net->netdev_ops = &ax88172_netdev_ops;
913 dev->net->ethtool_ops = &ax88172_ethtool_ops;
914
915 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
916 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
917 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
918 mii_nway_restart(&dev->mii);
919
920 return 0;
921
922 out:
923 return ret;
924 }
925
926 static const struct ethtool_ops ax88772_ethtool_ops = {
927 .get_drvinfo = asix_get_drvinfo,
928 .get_link = asix_get_link,
929 .get_msglevel = usbnet_get_msglevel,
930 .set_msglevel = usbnet_set_msglevel,
931 .get_wol = asix_get_wol,
932 .set_wol = asix_set_wol,
933 .get_eeprom_len = asix_get_eeprom_len,
934 .get_eeprom = asix_get_eeprom,
935 .get_settings = usbnet_get_settings,
936 .set_settings = usbnet_set_settings,
937 .nway_reset = usbnet_nway_reset,
938 };
939
940 static int ax88772_link_reset(struct usbnet *dev)
941 {
942 u16 mode;
943 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
944
945 mii_check_media(&dev->mii, 1, 1);
946 mii_ethtool_gset(&dev->mii, &ecmd);
947 mode = AX88772_MEDIUM_DEFAULT;
948
949 if (ethtool_cmd_speed(&ecmd) != SPEED_100)
950 mode &= ~AX_MEDIUM_PS;
951
952 if (ecmd.duplex != DUPLEX_FULL)
953 mode &= ~AX_MEDIUM_FD;
954
955 netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
956 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
957
958 asix_write_medium_mode(dev, mode);
959
960 return 0;
961 }
962
963 static int ax88772_reset(struct usbnet *dev)
964 {
965 int ret, embd_phy;
966 u16 rx_ctl;
967
968 if ((ret = asix_write_gpio(dev,
969 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5)) < 0)
970 goto out;
971
972 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
973
974 if ((ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT,
975 embd_phy, 0, 0, NULL)) < 0) {
976 dbg("Select PHY #1 failed: %d", ret);
977 goto out;
978 }
979
980 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL)) < 0)
981 goto out;
982
983 msleep(150);
984 if ((ret = asix_sw_reset(dev, AX_SWRESET_CLEAR)) < 0)
985 goto out;
986
987 msleep(150);
988
989 if (embd_phy) {
990 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL)) < 0)
991 goto out;
992 }
993 else {
994 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRTE)) < 0)
995 goto out;
996 }
997
998 msleep(150);
999 rx_ctl = asix_read_rx_ctl(dev);
1000 dbg("RX_CTL is 0x%04x after software reset", rx_ctl);
1001 if ((ret = asix_write_rx_ctl(dev, 0x0000)) < 0)
1002 goto out;
1003
1004 rx_ctl = asix_read_rx_ctl(dev);
1005 dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl);
1006
1007 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRL)) < 0)
1008 goto out;
1009
1010 msleep(150);
1011
1012 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL)) < 0)
1013 goto out;
1014
1015 msleep(150);
1016
1017 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
1018 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1019 ADVERTISE_ALL | ADVERTISE_CSMA);
1020 mii_nway_restart(&dev->mii);
1021
1022 if ((ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT)) < 0)
1023 goto out;
1024
1025 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
1026 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
1027 AX88772_IPG2_DEFAULT, 0, NULL)) < 0) {
1028 dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
1029 goto out;
1030 }
1031
1032 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
1033 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
1034 goto out;
1035
1036 rx_ctl = asix_read_rx_ctl(dev);
1037 dbg("RX_CTL is 0x%04x after all initializations", rx_ctl);
1038
1039 rx_ctl = asix_read_medium_status(dev);
1040 dbg("Medium Status is 0x%04x after all initializations", rx_ctl);
1041
1042 return 0;
1043
1044 out:
1045 return ret;
1046
1047 }
1048
1049 static const struct net_device_ops ax88772_netdev_ops = {
1050 .ndo_open = usbnet_open,
1051 .ndo_stop = usbnet_stop,
1052 .ndo_start_xmit = usbnet_start_xmit,
1053 .ndo_tx_timeout = usbnet_tx_timeout,
1054 .ndo_change_mtu = usbnet_change_mtu,
1055 .ndo_set_mac_address = asix_set_mac_address,
1056 .ndo_validate_addr = eth_validate_addr,
1057 .ndo_do_ioctl = asix_ioctl,
1058 .ndo_set_rx_mode = asix_set_multicast,
1059 };
1060
1061 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
1062 {
1063 int ret;
1064 struct asix_data *data = (struct asix_data *)&dev->data;
1065 u8 buf[ETH_ALEN];
1066 u32 phyid;
1067
1068 data->eeprom_len = AX88772_EEPROM_LEN;
1069
1070 usbnet_get_endpoints(dev,intf);
1071
1072 /* Get the MAC address */
1073 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
1074 0, 0, ETH_ALEN, buf)) < 0) {
1075 dbg("Failed to read MAC address: %d", ret);
1076 goto out;
1077 }
1078 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1079
1080 /* Initialize MII structure */
1081 dev->mii.dev = dev->net;
1082 dev->mii.mdio_read = asix_mdio_read;
1083 dev->mii.mdio_write = asix_mdio_write;
1084 dev->mii.phy_id_mask = 0x1f;
1085 dev->mii.reg_num_mask = 0x1f;
1086 dev->mii.phy_id = asix_get_phy_addr(dev);
1087
1088 phyid = asix_get_phyid(dev);
1089 dbg("PHYID=0x%08x", phyid);
1090
1091 dev->net->netdev_ops = &ax88772_netdev_ops;
1092 dev->net->ethtool_ops = &ax88772_ethtool_ops;
1093
1094 if ((ret = ax88772_reset(dev)) < 0)
1095 goto out;
1096
1097 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1098 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1099 /* hard_mtu is still the default - the device does not support
1100 jumbo eth frames */
1101 dev->rx_urb_size = 2048;
1102 }
1103 return 0;
1104 out:
1105 return ret;
1106 }
1107
1108 static struct ethtool_ops ax88178_ethtool_ops = {
1109 .get_drvinfo = asix_get_drvinfo,
1110 .get_link = asix_get_link,
1111 .get_msglevel = usbnet_get_msglevel,
1112 .set_msglevel = usbnet_set_msglevel,
1113 .get_wol = asix_get_wol,
1114 .set_wol = asix_set_wol,
1115 .get_eeprom_len = asix_get_eeprom_len,
1116 .get_eeprom = asix_get_eeprom,
1117 .get_settings = usbnet_get_settings,
1118 .set_settings = usbnet_set_settings,
1119 .nway_reset = usbnet_nway_reset,
1120 };
1121
1122 static int marvell_phy_init(struct usbnet *dev)
1123 {
1124 struct asix_data *data = (struct asix_data *)&dev->data;
1125 u16 reg;
1126
1127 netdev_dbg(dev->net, "marvell_phy_init()\n");
1128
1129 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
1130 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
1131
1132 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
1133 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
1134
1135 if (data->ledmode) {
1136 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1137 MII_MARVELL_LED_CTRL);
1138 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
1139
1140 reg &= 0xf8ff;
1141 reg |= (1 + 0x0100);
1142 asix_mdio_write(dev->net, dev->mii.phy_id,
1143 MII_MARVELL_LED_CTRL, reg);
1144
1145 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1146 MII_MARVELL_LED_CTRL);
1147 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
1148 reg &= 0xfc0f;
1149 }
1150
1151 return 0;
1152 }
1153
1154 static int rtl8211cl_phy_init(struct usbnet *dev)
1155 {
1156 struct asix_data *data = (struct asix_data *)&dev->data;
1157
1158 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
1159
1160 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
1161 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
1162 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
1163 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
1164 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
1165
1166 if (data->ledmode == 12) {
1167 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
1168 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
1169 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
1170 }
1171
1172 return 0;
1173 }
1174
1175 static int marvell_led_status(struct usbnet *dev, u16 speed)
1176 {
1177 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
1178
1179 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
1180
1181 /* Clear out the center LED bits - 0x03F0 */
1182 reg &= 0xfc0f;
1183
1184 switch (speed) {
1185 case SPEED_1000:
1186 reg |= 0x03e0;
1187 break;
1188 case SPEED_100:
1189 reg |= 0x03b0;
1190 break;
1191 default:
1192 reg |= 0x02f0;
1193 }
1194
1195 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
1196 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
1197
1198 return 0;
1199 }
1200
1201 static int ax88178_reset(struct usbnet *dev)
1202 {
1203 struct asix_data *data = (struct asix_data *)&dev->data;
1204 int ret;
1205 __le16 eeprom;
1206 u8 status;
1207 int gpio0 = 0;
1208
1209 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
1210 dbg("GPIO Status: 0x%04x", status);
1211
1212 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
1213 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
1214 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
1215
1216 dbg("EEPROM index 0x17 is 0x%04x", eeprom);
1217
1218 if (eeprom == cpu_to_le16(0xffff)) {
1219 data->phymode = PHY_MODE_MARVELL;
1220 data->ledmode = 0;
1221 gpio0 = 1;
1222 } else {
1223 data->phymode = le16_to_cpu(eeprom) & 7;
1224 data->ledmode = le16_to_cpu(eeprom) >> 8;
1225 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
1226 }
1227 dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode);
1228
1229 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
1230 if ((le16_to_cpu(eeprom) >> 8) != 1) {
1231 asix_write_gpio(dev, 0x003c, 30);
1232 asix_write_gpio(dev, 0x001c, 300);
1233 asix_write_gpio(dev, 0x003c, 30);
1234 } else {
1235 dbg("gpio phymode == 1 path");
1236 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
1237 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
1238 }
1239
1240 asix_sw_reset(dev, 0);
1241 msleep(150);
1242
1243 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1244 msleep(150);
1245
1246 asix_write_rx_ctl(dev, 0);
1247
1248 if (data->phymode == PHY_MODE_MARVELL) {
1249 marvell_phy_init(dev);
1250 msleep(60);
1251 } else if (data->phymode == PHY_MODE_RTL8211CL)
1252 rtl8211cl_phy_init(dev);
1253
1254 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
1255 BMCR_RESET | BMCR_ANENABLE);
1256 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1257 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
1258 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
1259 ADVERTISE_1000FULL);
1260
1261 mii_nway_restart(&dev->mii);
1262
1263 if ((ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT)) < 0)
1264 goto out;
1265
1266 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
1267 goto out;
1268
1269 return 0;
1270
1271 out:
1272 return ret;
1273
1274 }
1275
1276 static int ax88178_link_reset(struct usbnet *dev)
1277 {
1278 u16 mode;
1279 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
1280 struct asix_data *data = (struct asix_data *)&dev->data;
1281 u32 speed;
1282
1283 netdev_dbg(dev->net, "ax88178_link_reset()\n");
1284
1285 mii_check_media(&dev->mii, 1, 1);
1286 mii_ethtool_gset(&dev->mii, &ecmd);
1287 mode = AX88178_MEDIUM_DEFAULT;
1288 speed = ethtool_cmd_speed(&ecmd);
1289
1290 if (speed == SPEED_1000)
1291 mode |= AX_MEDIUM_GM;
1292 else if (speed == SPEED_100)
1293 mode |= AX_MEDIUM_PS;
1294 else
1295 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1296
1297 mode |= AX_MEDIUM_ENCK;
1298
1299 if (ecmd.duplex == DUPLEX_FULL)
1300 mode |= AX_MEDIUM_FD;
1301 else
1302 mode &= ~AX_MEDIUM_FD;
1303
1304 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
1305 speed, ecmd.duplex, mode);
1306
1307 asix_write_medium_mode(dev, mode);
1308
1309 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1310 marvell_led_status(dev, speed);
1311
1312 return 0;
1313 }
1314
1315 static void ax88178_set_mfb(struct usbnet *dev)
1316 {
1317 u16 mfb = AX_RX_CTL_MFB_16384;
1318 u16 rxctl;
1319 u16 medium;
1320 int old_rx_urb_size = dev->rx_urb_size;
1321
1322 if (dev->hard_mtu < 2048) {
1323 dev->rx_urb_size = 2048;
1324 mfb = AX_RX_CTL_MFB_2048;
1325 } else if (dev->hard_mtu < 4096) {
1326 dev->rx_urb_size = 4096;
1327 mfb = AX_RX_CTL_MFB_4096;
1328 } else if (dev->hard_mtu < 8192) {
1329 dev->rx_urb_size = 8192;
1330 mfb = AX_RX_CTL_MFB_8192;
1331 } else if (dev->hard_mtu < 16384) {
1332 dev->rx_urb_size = 16384;
1333 mfb = AX_RX_CTL_MFB_16384;
1334 }
1335
1336 rxctl = asix_read_rx_ctl(dev);
1337 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
1338
1339 medium = asix_read_medium_status(dev);
1340 if (dev->net->mtu > 1500)
1341 medium |= AX_MEDIUM_JFE;
1342 else
1343 medium &= ~AX_MEDIUM_JFE;
1344 asix_write_medium_mode(dev, medium);
1345
1346 if (dev->rx_urb_size > old_rx_urb_size)
1347 usbnet_unlink_rx_urbs(dev);
1348 }
1349
1350 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
1351 {
1352 struct usbnet *dev = netdev_priv(net);
1353 int ll_mtu = new_mtu + net->hard_header_len + 4;
1354
1355 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
1356
1357 if (new_mtu <= 0 || ll_mtu > 16384)
1358 return -EINVAL;
1359
1360 if ((ll_mtu % dev->maxpacket) == 0)
1361 return -EDOM;
1362
1363 net->mtu = new_mtu;
1364 dev->hard_mtu = net->mtu + net->hard_header_len;
1365 ax88178_set_mfb(dev);
1366
1367 return 0;
1368 }
1369
1370 static const struct net_device_ops ax88178_netdev_ops = {
1371 .ndo_open = usbnet_open,
1372 .ndo_stop = usbnet_stop,
1373 .ndo_start_xmit = usbnet_start_xmit,
1374 .ndo_tx_timeout = usbnet_tx_timeout,
1375 .ndo_set_mac_address = asix_set_mac_address,
1376 .ndo_validate_addr = eth_validate_addr,
1377 .ndo_set_rx_mode = asix_set_multicast,
1378 .ndo_do_ioctl = asix_ioctl,
1379 .ndo_change_mtu = ax88178_change_mtu,
1380 };
1381
1382 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1383 {
1384 int ret;
1385 u8 buf[ETH_ALEN];
1386 u32 phyid;
1387
1388 usbnet_get_endpoints(dev,intf);
1389
1390 /* Get the MAC address */
1391 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
1392 0, 0, ETH_ALEN, buf)) < 0) {
1393 dbg("Failed to read MAC address: %d", ret);
1394 goto out;
1395 }
1396 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1397
1398 /* Initialize MII structure */
1399 dev->mii.dev = dev->net;
1400 dev->mii.mdio_read = asix_mdio_read;
1401 dev->mii.mdio_write = asix_mdio_write;
1402 dev->mii.phy_id_mask = 0x1f;
1403 dev->mii.reg_num_mask = 0xff;
1404 dev->mii.supports_gmii = 1;
1405 dev->mii.phy_id = asix_get_phy_addr(dev);
1406
1407 dev->net->netdev_ops = &ax88178_netdev_ops;
1408 dev->net->ethtool_ops = &ax88178_ethtool_ops;
1409
1410 phyid = asix_get_phyid(dev);
1411 dbg("PHYID=0x%08x", phyid);
1412
1413 ret = ax88178_reset(dev);
1414 if (ret < 0)
1415 goto out;
1416
1417 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1418 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1419 /* hard_mtu is still the default - the device does not support
1420 jumbo eth frames */
1421 dev->rx_urb_size = 2048;
1422 }
1423 return 0;
1424
1425 out:
1426 return ret;
1427 }
1428
1429 static const struct driver_info ax8817x_info = {
1430 .description = "ASIX AX8817x USB 2.0 Ethernet",
1431 .bind = ax88172_bind,
1432 .status = asix_status,
1433 .link_reset = ax88172_link_reset,
1434 .reset = ax88172_link_reset,
1435 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1436 .data = 0x00130103,
1437 };
1438
1439 static const struct driver_info dlink_dub_e100_info = {
1440 .description = "DLink DUB-E100 USB Ethernet",
1441 .bind = ax88172_bind,
1442 .status = asix_status,
1443 .link_reset = ax88172_link_reset,
1444 .reset = ax88172_link_reset,
1445 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1446 .data = 0x009f9d9f,
1447 };
1448
1449 static const struct driver_info netgear_fa120_info = {
1450 .description = "Netgear FA-120 USB Ethernet",
1451 .bind = ax88172_bind,
1452 .status = asix_status,
1453 .link_reset = ax88172_link_reset,
1454 .reset = ax88172_link_reset,
1455 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1456 .data = 0x00130103,
1457 };
1458
1459 static const struct driver_info hawking_uf200_info = {
1460 .description = "Hawking UF200 USB Ethernet",
1461 .bind = ax88172_bind,
1462 .status = asix_status,
1463 .link_reset = ax88172_link_reset,
1464 .reset = ax88172_link_reset,
1465 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1466 .data = 0x001f1d1f,
1467 };
1468
1469 static const struct driver_info ax88772_info = {
1470 .description = "ASIX AX88772 USB 2.0 Ethernet",
1471 .bind = ax88772_bind,
1472 .status = asix_status,
1473 .link_reset = ax88772_link_reset,
1474 .reset = ax88772_reset,
1475 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
1476 .rx_fixup = asix_rx_fixup,
1477 .tx_fixup = asix_tx_fixup,
1478 };
1479
1480 static const struct driver_info ax88178_info = {
1481 .description = "ASIX AX88178 USB 2.0 Ethernet",
1482 .bind = ax88178_bind,
1483 .status = asix_status,
1484 .link_reset = ax88178_link_reset,
1485 .reset = ax88178_reset,
1486 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
1487 .rx_fixup = asix_rx_fixup,
1488 .tx_fixup = asix_tx_fixup,
1489 };
1490
1491 static const struct usb_device_id products [] = {
1492 {
1493 // Linksys USB200M
1494 USB_DEVICE (0x077b, 0x2226),
1495 .driver_info = (unsigned long) &ax8817x_info,
1496 }, {
1497 // Netgear FA120
1498 USB_DEVICE (0x0846, 0x1040),
1499 .driver_info = (unsigned long) &netgear_fa120_info,
1500 }, {
1501 // DLink DUB-E100
1502 USB_DEVICE (0x2001, 0x1a00),
1503 .driver_info = (unsigned long) &dlink_dub_e100_info,
1504 }, {
1505 // Intellinet, ST Lab USB Ethernet
1506 USB_DEVICE (0x0b95, 0x1720),
1507 .driver_info = (unsigned long) &ax8817x_info,
1508 }, {
1509 // Hawking UF200, TrendNet TU2-ET100
1510 USB_DEVICE (0x07b8, 0x420a),
1511 .driver_info = (unsigned long) &hawking_uf200_info,
1512 }, {
1513 // Billionton Systems, USB2AR
1514 USB_DEVICE (0x08dd, 0x90ff),
1515 .driver_info = (unsigned long) &ax8817x_info,
1516 }, {
1517 // ATEN UC210T
1518 USB_DEVICE (0x0557, 0x2009),
1519 .driver_info = (unsigned long) &ax8817x_info,
1520 }, {
1521 // Buffalo LUA-U2-KTX
1522 USB_DEVICE (0x0411, 0x003d),
1523 .driver_info = (unsigned long) &ax8817x_info,
1524 }, {
1525 // Buffalo LUA-U2-GT 10/100/1000
1526 USB_DEVICE (0x0411, 0x006e),
1527 .driver_info = (unsigned long) &ax88178_info,
1528 }, {
1529 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1530 USB_DEVICE (0x6189, 0x182d),
1531 .driver_info = (unsigned long) &ax8817x_info,
1532 }, {
1533 // corega FEther USB2-TX
1534 USB_DEVICE (0x07aa, 0x0017),
1535 .driver_info = (unsigned long) &ax8817x_info,
1536 }, {
1537 // Surecom EP-1427X-2
1538 USB_DEVICE (0x1189, 0x0893),
1539 .driver_info = (unsigned long) &ax8817x_info,
1540 }, {
1541 // goodway corp usb gwusb2e
1542 USB_DEVICE (0x1631, 0x6200),
1543 .driver_info = (unsigned long) &ax8817x_info,
1544 }, {
1545 // JVC MP-PRX1 Port Replicator
1546 USB_DEVICE (0x04f1, 0x3008),
1547 .driver_info = (unsigned long) &ax8817x_info,
1548 }, {
1549 // ASIX AX88772B 10/100
1550 USB_DEVICE (0x0b95, 0x772b),
1551 .driver_info = (unsigned long) &ax88772_info,
1552 }, {
1553 // ASIX AX88772 10/100
1554 USB_DEVICE (0x0b95, 0x7720),
1555 .driver_info = (unsigned long) &ax88772_info,
1556 }, {
1557 // ASIX AX88178 10/100/1000
1558 USB_DEVICE (0x0b95, 0x1780),
1559 .driver_info = (unsigned long) &ax88178_info,
1560 }, {
1561 // Logitec LAN-GTJ/U2A
1562 USB_DEVICE (0x0789, 0x0160),
1563 .driver_info = (unsigned long) &ax88178_info,
1564 }, {
1565 // Linksys USB200M Rev 2
1566 USB_DEVICE (0x13b1, 0x0018),
1567 .driver_info = (unsigned long) &ax88772_info,
1568 }, {
1569 // 0Q0 cable ethernet
1570 USB_DEVICE (0x1557, 0x7720),
1571 .driver_info = (unsigned long) &ax88772_info,
1572 }, {
1573 // DLink DUB-E100 H/W Ver B1
1574 USB_DEVICE (0x07d1, 0x3c05),
1575 .driver_info = (unsigned long) &ax88772_info,
1576 }, {
1577 // DLink DUB-E100 H/W Ver B1 Alternate
1578 USB_DEVICE (0x2001, 0x3c05),
1579 .driver_info = (unsigned long) &ax88772_info,
1580 }, {
1581 // Linksys USB1000
1582 USB_DEVICE (0x1737, 0x0039),
1583 .driver_info = (unsigned long) &ax88178_info,
1584 }, {
1585 // IO-DATA ETG-US2
1586 USB_DEVICE (0x04bb, 0x0930),
1587 .driver_info = (unsigned long) &ax88178_info,
1588 }, {
1589 // Belkin F5D5055
1590 USB_DEVICE(0x050d, 0x5055),
1591 .driver_info = (unsigned long) &ax88178_info,
1592 }, {
1593 // Apple USB Ethernet Adapter
1594 USB_DEVICE(0x05ac, 0x1402),
1595 .driver_info = (unsigned long) &ax88772_info,
1596 }, {
1597 // Cables-to-Go USB Ethernet Adapter
1598 USB_DEVICE(0x0b95, 0x772a),
1599 .driver_info = (unsigned long) &ax88772_info,
1600 }, {
1601 // ABOCOM for pci
1602 USB_DEVICE(0x14ea, 0xab11),
1603 .driver_info = (unsigned long) &ax88178_info,
1604 }, {
1605 // ASIX 88772a
1606 USB_DEVICE(0x0db0, 0xa877),
1607 .driver_info = (unsigned long) &ax88772_info,
1608 },
1609 { }, // END
1610 };
1611 MODULE_DEVICE_TABLE(usb, products);
1612
1613 static struct usb_driver asix_driver = {
1614 .name = "asix",
1615 .id_table = products,
1616 .probe = usbnet_probe,
1617 .suspend = usbnet_suspend,
1618 .resume = usbnet_resume,
1619 .disconnect = usbnet_disconnect,
1620 .supports_autosuspend = 1,
1621 };
1622
1623 static int __init asix_init(void)
1624 {
1625 return usb_register(&asix_driver);
1626 }
1627 module_init(asix_init);
1628
1629 static void __exit asix_exit(void)
1630 {
1631 usb_deregister(&asix_driver);
1632 }
1633 module_exit(asix_exit);
1634
1635 MODULE_AUTHOR("David Hollis");
1636 MODULE_VERSION(DRIVER_VERSION);
1637 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1638 MODULE_LICENSE("GPL");
1639
Linux kernel - Deliverables
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