2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #define PHY_MODE_MARVELL 0x0000
26 #define MII_MARVELL_LED_CTRL 0x0018
27 #define MII_MARVELL_STATUS 0x001b
28 #define MII_MARVELL_CTRL 0x0014
30 #define MARVELL_LED_MANUAL 0x0019
32 #define MARVELL_STATUS_HWCFG 0x0004
34 #define MARVELL_CTRL_TXDELAY 0x0002
35 #define MARVELL_CTRL_RXDELAY 0x0080
37 #define PHY_MODE_RTL8211CL 0x000C
39 struct ax88172_int_data
{
47 static void asix_status(struct usbnet
*dev
, struct urb
*urb
)
49 struct ax88172_int_data
*event
;
52 if (urb
->actual_length
< 8)
55 event
= urb
->transfer_buffer
;
56 link
= event
->link
& 0x01;
57 if (netif_carrier_ok(dev
->net
) != link
) {
59 netif_carrier_on(dev
->net
);
60 usbnet_defer_kevent (dev
, EVENT_LINK_RESET
);
62 netif_carrier_off(dev
->net
);
63 netdev_dbg(dev
->net
, "Link Status is: %d\n", link
);
67 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
68 static u32
asix_get_phyid(struct usbnet
*dev
)
74 /* Poll for the rare case the FW or phy isn't ready yet. */
75 for (i
= 0; i
< 100; i
++) {
76 phy_reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
, MII_PHYSID1
);
77 if (phy_reg
!= 0 && phy_reg
!= 0xFFFF)
82 if (phy_reg
<= 0 || phy_reg
== 0xFFFF)
85 phy_id
= (phy_reg
& 0xffff) << 16;
87 phy_reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
, MII_PHYSID2
);
91 phy_id
|= (phy_reg
& 0xffff);
96 static u32
asix_get_link(struct net_device
*net
)
98 struct usbnet
*dev
= netdev_priv(net
);
100 return mii_link_ok(&dev
->mii
);
103 static int asix_ioctl (struct net_device
*net
, struct ifreq
*rq
, int cmd
)
105 struct usbnet
*dev
= netdev_priv(net
);
107 return generic_mii_ioctl(&dev
->mii
, if_mii(rq
), cmd
, NULL
);
110 /* We need to override some ethtool_ops so we require our
111 own structure so we don't interfere with other usbnet
112 devices that may be connected at the same time. */
113 static const struct ethtool_ops ax88172_ethtool_ops
= {
114 .get_drvinfo
= asix_get_drvinfo
,
115 .get_link
= asix_get_link
,
116 .get_msglevel
= usbnet_get_msglevel
,
117 .set_msglevel
= usbnet_set_msglevel
,
118 .get_wol
= asix_get_wol
,
119 .set_wol
= asix_set_wol
,
120 .get_eeprom_len
= asix_get_eeprom_len
,
121 .get_eeprom
= asix_get_eeprom
,
122 .set_eeprom
= asix_set_eeprom
,
123 .get_settings
= usbnet_get_settings
,
124 .set_settings
= usbnet_set_settings
,
125 .nway_reset
= usbnet_nway_reset
,
128 static void ax88172_set_multicast(struct net_device
*net
)
130 struct usbnet
*dev
= netdev_priv(net
);
131 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
134 if (net
->flags
& IFF_PROMISC
) {
136 } else if (net
->flags
& IFF_ALLMULTI
||
137 netdev_mc_count(net
) > AX_MAX_MCAST
) {
139 } else if (netdev_mc_empty(net
)) {
140 /* just broadcast and directed */
142 /* We use the 20 byte dev->data
143 * for our 8 byte filter buffer
144 * to avoid allocating memory that
145 * is tricky to free later */
146 struct netdev_hw_addr
*ha
;
149 memset(data
->multi_filter
, 0, AX_MCAST_FILTER_SIZE
);
151 /* Build the multicast hash filter. */
152 netdev_for_each_mc_addr(ha
, net
) {
153 crc_bits
= ether_crc(ETH_ALEN
, ha
->addr
) >> 26;
154 data
->multi_filter
[crc_bits
>> 3] |=
158 asix_write_cmd_async(dev
, AX_CMD_WRITE_MULTI_FILTER
, 0, 0,
159 AX_MCAST_FILTER_SIZE
, data
->multi_filter
);
164 asix_write_cmd_async(dev
, AX_CMD_WRITE_RX_CTL
, rx_ctl
, 0, 0, NULL
);
167 static int ax88172_link_reset(struct usbnet
*dev
)
170 struct ethtool_cmd ecmd
= { .cmd
= ETHTOOL_GSET
};
172 mii_check_media(&dev
->mii
, 1, 1);
173 mii_ethtool_gset(&dev
->mii
, &ecmd
);
174 mode
= AX88172_MEDIUM_DEFAULT
;
176 if (ecmd
.duplex
!= DUPLEX_FULL
)
177 mode
|= ~AX88172_MEDIUM_FD
;
179 netdev_dbg(dev
->net
, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
180 ethtool_cmd_speed(&ecmd
), ecmd
.duplex
, mode
);
182 asix_write_medium_mode(dev
, mode
);
187 static const struct net_device_ops ax88172_netdev_ops
= {
188 .ndo_open
= usbnet_open
,
189 .ndo_stop
= usbnet_stop
,
190 .ndo_start_xmit
= usbnet_start_xmit
,
191 .ndo_tx_timeout
= usbnet_tx_timeout
,
192 .ndo_change_mtu
= usbnet_change_mtu
,
193 .ndo_set_mac_address
= eth_mac_addr
,
194 .ndo_validate_addr
= eth_validate_addr
,
195 .ndo_do_ioctl
= asix_ioctl
,
196 .ndo_set_rx_mode
= ax88172_set_multicast
,
199 static int ax88172_bind(struct usbnet
*dev
, struct usb_interface
*intf
)
204 unsigned long gpio_bits
= dev
->driver_info
->data
;
206 usbnet_get_endpoints(dev
,intf
);
208 /* Toggle the GPIOs in a manufacturer/model specific way */
209 for (i
= 2; i
>= 0; i
--) {
210 ret
= asix_write_cmd(dev
, AX_CMD_WRITE_GPIOS
,
211 (gpio_bits
>> (i
* 8)) & 0xff, 0, 0, NULL
);
217 ret
= asix_write_rx_ctl(dev
, 0x80);
221 /* Get the MAC address */
222 ret
= asix_read_cmd(dev
, AX88172_CMD_READ_NODE_ID
, 0, 0, ETH_ALEN
, buf
);
224 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret
);
227 memcpy(dev
->net
->dev_addr
, buf
, ETH_ALEN
);
229 /* Initialize MII structure */
230 dev
->mii
.dev
= dev
->net
;
231 dev
->mii
.mdio_read
= asix_mdio_read
;
232 dev
->mii
.mdio_write
= asix_mdio_write
;
233 dev
->mii
.phy_id_mask
= 0x3f;
234 dev
->mii
.reg_num_mask
= 0x1f;
235 dev
->mii
.phy_id
= asix_get_phy_addr(dev
);
237 dev
->net
->netdev_ops
= &ax88172_netdev_ops
;
238 dev
->net
->ethtool_ops
= &ax88172_ethtool_ops
;
239 dev
->net
->needed_headroom
= 4; /* cf asix_tx_fixup() */
240 dev
->net
->needed_tailroom
= 4; /* cf asix_tx_fixup() */
242 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_BMCR
, BMCR_RESET
);
243 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_ADVERTISE
,
244 ADVERTISE_ALL
| ADVERTISE_CSMA
| ADVERTISE_PAUSE_CAP
);
245 mii_nway_restart(&dev
->mii
);
253 static const struct ethtool_ops ax88772_ethtool_ops
= {
254 .get_drvinfo
= asix_get_drvinfo
,
255 .get_link
= asix_get_link
,
256 .get_msglevel
= usbnet_get_msglevel
,
257 .set_msglevel
= usbnet_set_msglevel
,
258 .get_wol
= asix_get_wol
,
259 .set_wol
= asix_set_wol
,
260 .get_eeprom_len
= asix_get_eeprom_len
,
261 .get_eeprom
= asix_get_eeprom
,
262 .set_eeprom
= asix_set_eeprom
,
263 .get_settings
= usbnet_get_settings
,
264 .set_settings
= usbnet_set_settings
,
265 .nway_reset
= usbnet_nway_reset
,
268 static int ax88772_link_reset(struct usbnet
*dev
)
271 struct ethtool_cmd ecmd
= { .cmd
= ETHTOOL_GSET
};
273 mii_check_media(&dev
->mii
, 1, 1);
274 mii_ethtool_gset(&dev
->mii
, &ecmd
);
275 mode
= AX88772_MEDIUM_DEFAULT
;
277 if (ethtool_cmd_speed(&ecmd
) != SPEED_100
)
278 mode
&= ~AX_MEDIUM_PS
;
280 if (ecmd
.duplex
!= DUPLEX_FULL
)
281 mode
&= ~AX_MEDIUM_FD
;
283 netdev_dbg(dev
->net
, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
284 ethtool_cmd_speed(&ecmd
), ecmd
.duplex
, mode
);
286 asix_write_medium_mode(dev
, mode
);
291 static int ax88772_reset(struct usbnet
*dev
)
293 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
297 ret
= asix_write_gpio(dev
,
298 AX_GPIO_RSE
| AX_GPIO_GPO_2
| AX_GPIO_GPO2EN
, 5);
302 embd_phy
= ((asix_get_phy_addr(dev
) & 0x1f) == 0x10 ? 1 : 0);
304 ret
= asix_write_cmd(dev
, AX_CMD_SW_PHY_SELECT
, embd_phy
, 0, 0, NULL
);
306 dbg("Select PHY #1 failed: %d", ret
);
310 ret
= asix_sw_reset(dev
, AX_SWRESET_IPPD
| AX_SWRESET_PRL
);
316 ret
= asix_sw_reset(dev
, AX_SWRESET_CLEAR
);
323 ret
= asix_sw_reset(dev
, AX_SWRESET_IPRL
);
327 ret
= asix_sw_reset(dev
, AX_SWRESET_PRTE
);
333 rx_ctl
= asix_read_rx_ctl(dev
);
334 dbg("RX_CTL is 0x%04x after software reset", rx_ctl
);
335 ret
= asix_write_rx_ctl(dev
, 0x0000);
339 rx_ctl
= asix_read_rx_ctl(dev
);
340 dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl
);
342 ret
= asix_sw_reset(dev
, AX_SWRESET_PRL
);
348 ret
= asix_sw_reset(dev
, AX_SWRESET_IPRL
| AX_SWRESET_PRL
);
354 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_BMCR
, BMCR_RESET
);
355 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_ADVERTISE
,
356 ADVERTISE_ALL
| ADVERTISE_CSMA
);
357 mii_nway_restart(&dev
->mii
);
359 ret
= asix_write_medium_mode(dev
, AX88772_MEDIUM_DEFAULT
);
363 ret
= asix_write_cmd(dev
, AX_CMD_WRITE_IPG0
,
364 AX88772_IPG0_DEFAULT
| AX88772_IPG1_DEFAULT
,
365 AX88772_IPG2_DEFAULT
, 0, NULL
);
367 dbg("Write IPG,IPG1,IPG2 failed: %d", ret
);
371 /* Rewrite MAC address */
372 memcpy(data
->mac_addr
, dev
->net
->dev_addr
, ETH_ALEN
);
373 ret
= asix_write_cmd(dev
, AX_CMD_WRITE_NODE_ID
, 0, 0, ETH_ALEN
,
378 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
379 ret
= asix_write_rx_ctl(dev
, AX_DEFAULT_RX_CTL
);
383 rx_ctl
= asix_read_rx_ctl(dev
);
384 dbg("RX_CTL is 0x%04x after all initializations", rx_ctl
);
386 rx_ctl
= asix_read_medium_status(dev
);
387 dbg("Medium Status is 0x%04x after all initializations", rx_ctl
);
396 static const struct net_device_ops ax88772_netdev_ops
= {
397 .ndo_open
= usbnet_open
,
398 .ndo_stop
= usbnet_stop
,
399 .ndo_start_xmit
= usbnet_start_xmit
,
400 .ndo_tx_timeout
= usbnet_tx_timeout
,
401 .ndo_change_mtu
= usbnet_change_mtu
,
402 .ndo_set_mac_address
= asix_set_mac_address
,
403 .ndo_validate_addr
= eth_validate_addr
,
404 .ndo_do_ioctl
= asix_ioctl
,
405 .ndo_set_rx_mode
= asix_set_multicast
,
408 static int ax88772_bind(struct usbnet
*dev
, struct usb_interface
*intf
)
414 usbnet_get_endpoints(dev
,intf
);
416 /* Get the MAC address */
417 ret
= asix_read_cmd(dev
, AX_CMD_READ_NODE_ID
, 0, 0, ETH_ALEN
, buf
);
419 dbg("Failed to read MAC address: %d", ret
);
422 memcpy(dev
->net
->dev_addr
, buf
, ETH_ALEN
);
424 /* Initialize MII structure */
425 dev
->mii
.dev
= dev
->net
;
426 dev
->mii
.mdio_read
= asix_mdio_read
;
427 dev
->mii
.mdio_write
= asix_mdio_write
;
428 dev
->mii
.phy_id_mask
= 0x1f;
429 dev
->mii
.reg_num_mask
= 0x1f;
430 dev
->mii
.phy_id
= asix_get_phy_addr(dev
);
432 dev
->net
->netdev_ops
= &ax88772_netdev_ops
;
433 dev
->net
->ethtool_ops
= &ax88772_ethtool_ops
;
434 dev
->net
->needed_headroom
= 4; /* cf asix_tx_fixup() */
435 dev
->net
->needed_tailroom
= 4; /* cf asix_tx_fixup() */
437 embd_phy
= ((dev
->mii
.phy_id
& 0x1f) == 0x10 ? 1 : 0);
439 /* Reset the PHY to normal operation mode */
440 ret
= asix_write_cmd(dev
, AX_CMD_SW_PHY_SELECT
, embd_phy
, 0, 0, NULL
);
442 dbg("Select PHY #1 failed: %d", ret
);
446 ret
= asix_sw_reset(dev
, AX_SWRESET_IPPD
| AX_SWRESET_PRL
);
452 ret
= asix_sw_reset(dev
, AX_SWRESET_CLEAR
);
458 ret
= asix_sw_reset(dev
, embd_phy
? AX_SWRESET_IPRL
: AX_SWRESET_PRTE
);
460 /* Read PHYID register *AFTER* the PHY was reset properly */
461 phyid
= asix_get_phyid(dev
);
462 dbg("PHYID=0x%08x", phyid
);
464 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
465 if (dev
->driver_info
->flags
& FLAG_FRAMING_AX
) {
466 /* hard_mtu is still the default - the device does not support
468 dev
->rx_urb_size
= 2048;
474 static const struct ethtool_ops ax88178_ethtool_ops
= {
475 .get_drvinfo
= asix_get_drvinfo
,
476 .get_link
= asix_get_link
,
477 .get_msglevel
= usbnet_get_msglevel
,
478 .set_msglevel
= usbnet_set_msglevel
,
479 .get_wol
= asix_get_wol
,
480 .set_wol
= asix_set_wol
,
481 .get_eeprom_len
= asix_get_eeprom_len
,
482 .get_eeprom
= asix_get_eeprom
,
483 .set_eeprom
= asix_set_eeprom
,
484 .get_settings
= usbnet_get_settings
,
485 .set_settings
= usbnet_set_settings
,
486 .nway_reset
= usbnet_nway_reset
,
489 static int marvell_phy_init(struct usbnet
*dev
)
491 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
494 netdev_dbg(dev
->net
, "marvell_phy_init()\n");
496 reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
, MII_MARVELL_STATUS
);
497 netdev_dbg(dev
->net
, "MII_MARVELL_STATUS = 0x%04x\n", reg
);
499 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_MARVELL_CTRL
,
500 MARVELL_CTRL_RXDELAY
| MARVELL_CTRL_TXDELAY
);
503 reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
,
504 MII_MARVELL_LED_CTRL
);
505 netdev_dbg(dev
->net
, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg
);
509 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
,
510 MII_MARVELL_LED_CTRL
, reg
);
512 reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
,
513 MII_MARVELL_LED_CTRL
);
514 netdev_dbg(dev
->net
, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg
);
521 static int rtl8211cl_phy_init(struct usbnet
*dev
)
523 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
525 netdev_dbg(dev
->net
, "rtl8211cl_phy_init()\n");
527 asix_mdio_write (dev
->net
, dev
->mii
.phy_id
, 0x1f, 0x0005);
528 asix_mdio_write (dev
->net
, dev
->mii
.phy_id
, 0x0c, 0);
529 asix_mdio_write (dev
->net
, dev
->mii
.phy_id
, 0x01,
530 asix_mdio_read (dev
->net
, dev
->mii
.phy_id
, 0x01) | 0x0080);
531 asix_mdio_write (dev
->net
, dev
->mii
.phy_id
, 0x1f, 0);
533 if (data
->ledmode
== 12) {
534 asix_mdio_write (dev
->net
, dev
->mii
.phy_id
, 0x1f, 0x0002);
535 asix_mdio_write (dev
->net
, dev
->mii
.phy_id
, 0x1a, 0x00cb);
536 asix_mdio_write (dev
->net
, dev
->mii
.phy_id
, 0x1f, 0);
542 static int marvell_led_status(struct usbnet
*dev
, u16 speed
)
544 u16 reg
= asix_mdio_read(dev
->net
, dev
->mii
.phy_id
, MARVELL_LED_MANUAL
);
546 netdev_dbg(dev
->net
, "marvell_led_status() read 0x%04x\n", reg
);
548 /* Clear out the center LED bits - 0x03F0 */
562 netdev_dbg(dev
->net
, "marvell_led_status() writing 0x%04x\n", reg
);
563 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MARVELL_LED_MANUAL
, reg
);
568 static int ax88178_reset(struct usbnet
*dev
)
570 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
577 asix_read_cmd(dev
, AX_CMD_READ_GPIOS
, 0, 0, 1, &status
);
578 dbg("GPIO Status: 0x%04x", status
);
580 asix_write_cmd(dev
, AX_CMD_WRITE_ENABLE
, 0, 0, 0, NULL
);
581 asix_read_cmd(dev
, AX_CMD_READ_EEPROM
, 0x0017, 0, 2, &eeprom
);
582 asix_write_cmd(dev
, AX_CMD_WRITE_DISABLE
, 0, 0, 0, NULL
);
584 dbg("EEPROM index 0x17 is 0x%04x", eeprom
);
586 if (eeprom
== cpu_to_le16(0xffff)) {
587 data
->phymode
= PHY_MODE_MARVELL
;
591 data
->phymode
= le16_to_cpu(eeprom
) & 0x7F;
592 data
->ledmode
= le16_to_cpu(eeprom
) >> 8;
593 gpio0
= (le16_to_cpu(eeprom
) & 0x80) ? 0 : 1;
595 dbg("GPIO0: %d, PhyMode: %d", gpio0
, data
->phymode
);
597 /* Power up external GigaPHY through AX88178 GPIO pin */
598 asix_write_gpio(dev
, AX_GPIO_RSE
| AX_GPIO_GPO_1
| AX_GPIO_GPO1EN
, 40);
599 if ((le16_to_cpu(eeprom
) >> 8) != 1) {
600 asix_write_gpio(dev
, 0x003c, 30);
601 asix_write_gpio(dev
, 0x001c, 300);
602 asix_write_gpio(dev
, 0x003c, 30);
604 dbg("gpio phymode == 1 path");
605 asix_write_gpio(dev
, AX_GPIO_GPO1EN
, 30);
606 asix_write_gpio(dev
, AX_GPIO_GPO1EN
| AX_GPIO_GPO_1
, 30);
609 /* Read PHYID register *AFTER* powering up PHY */
610 phyid
= asix_get_phyid(dev
);
611 dbg("PHYID=0x%08x", phyid
);
613 /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
614 asix_write_cmd(dev
, AX_CMD_SW_PHY_SELECT
, 0, 0, 0, NULL
);
616 asix_sw_reset(dev
, 0);
619 asix_sw_reset(dev
, AX_SWRESET_PRL
| AX_SWRESET_IPPD
);
622 asix_write_rx_ctl(dev
, 0);
624 if (data
->phymode
== PHY_MODE_MARVELL
) {
625 marvell_phy_init(dev
);
627 } else if (data
->phymode
== PHY_MODE_RTL8211CL
)
628 rtl8211cl_phy_init(dev
);
630 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_BMCR
,
631 BMCR_RESET
| BMCR_ANENABLE
);
632 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_ADVERTISE
,
633 ADVERTISE_ALL
| ADVERTISE_CSMA
| ADVERTISE_PAUSE_CAP
);
634 asix_mdio_write(dev
->net
, dev
->mii
.phy_id
, MII_CTRL1000
,
637 mii_nway_restart(&dev
->mii
);
639 ret
= asix_write_medium_mode(dev
, AX88178_MEDIUM_DEFAULT
);
643 /* Rewrite MAC address */
644 memcpy(data
->mac_addr
, dev
->net
->dev_addr
, ETH_ALEN
);
645 ret
= asix_write_cmd(dev
, AX_CMD_WRITE_NODE_ID
, 0, 0, ETH_ALEN
,
650 ret
= asix_write_rx_ctl(dev
, AX_DEFAULT_RX_CTL
);
657 static int ax88178_link_reset(struct usbnet
*dev
)
660 struct ethtool_cmd ecmd
= { .cmd
= ETHTOOL_GSET
};
661 struct asix_data
*data
= (struct asix_data
*)&dev
->data
;
664 netdev_dbg(dev
->net
, "ax88178_link_reset()\n");
666 mii_check_media(&dev
->mii
, 1, 1);
667 mii_ethtool_gset(&dev
->mii
, &ecmd
);
668 mode
= AX88178_MEDIUM_DEFAULT
;
669 speed
= ethtool_cmd_speed(&ecmd
);
671 if (speed
== SPEED_1000
)
672 mode
|= AX_MEDIUM_GM
;
673 else if (speed
== SPEED_100
)
674 mode
|= AX_MEDIUM_PS
;
676 mode
&= ~(AX_MEDIUM_PS
| AX_MEDIUM_GM
);
678 mode
|= AX_MEDIUM_ENCK
;
680 if (ecmd
.duplex
== DUPLEX_FULL
)
681 mode
|= AX_MEDIUM_FD
;
683 mode
&= ~AX_MEDIUM_FD
;
685 netdev_dbg(dev
->net
, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
686 speed
, ecmd
.duplex
, mode
);
688 asix_write_medium_mode(dev
, mode
);
690 if (data
->phymode
== PHY_MODE_MARVELL
&& data
->ledmode
)
691 marvell_led_status(dev
, speed
);
696 static void ax88178_set_mfb(struct usbnet
*dev
)
698 u16 mfb
= AX_RX_CTL_MFB_16384
;
701 int old_rx_urb_size
= dev
->rx_urb_size
;
703 if (dev
->hard_mtu
< 2048) {
704 dev
->rx_urb_size
= 2048;
705 mfb
= AX_RX_CTL_MFB_2048
;
706 } else if (dev
->hard_mtu
< 4096) {
707 dev
->rx_urb_size
= 4096;
708 mfb
= AX_RX_CTL_MFB_4096
;
709 } else if (dev
->hard_mtu
< 8192) {
710 dev
->rx_urb_size
= 8192;
711 mfb
= AX_RX_CTL_MFB_8192
;
712 } else if (dev
->hard_mtu
< 16384) {
713 dev
->rx_urb_size
= 16384;
714 mfb
= AX_RX_CTL_MFB_16384
;
717 rxctl
= asix_read_rx_ctl(dev
);
718 asix_write_rx_ctl(dev
, (rxctl
& ~AX_RX_CTL_MFB_16384
) | mfb
);
720 medium
= asix_read_medium_status(dev
);
721 if (dev
->net
->mtu
> 1500)
722 medium
|= AX_MEDIUM_JFE
;
724 medium
&= ~AX_MEDIUM_JFE
;
725 asix_write_medium_mode(dev
, medium
);
727 if (dev
->rx_urb_size
> old_rx_urb_size
)
728 usbnet_unlink_rx_urbs(dev
);
731 static int ax88178_change_mtu(struct net_device
*net
, int new_mtu
)
733 struct usbnet
*dev
= netdev_priv(net
);
734 int ll_mtu
= new_mtu
+ net
->hard_header_len
+ 4;
736 netdev_dbg(dev
->net
, "ax88178_change_mtu() new_mtu=%d\n", new_mtu
);
738 if (new_mtu
<= 0 || ll_mtu
> 16384)
741 if ((ll_mtu
% dev
->maxpacket
) == 0)
745 dev
->hard_mtu
= net
->mtu
+ net
->hard_header_len
;
746 ax88178_set_mfb(dev
);
751 static const struct net_device_ops ax88178_netdev_ops
= {
752 .ndo_open
= usbnet_open
,
753 .ndo_stop
= usbnet_stop
,
754 .ndo_start_xmit
= usbnet_start_xmit
,
755 .ndo_tx_timeout
= usbnet_tx_timeout
,
756 .ndo_set_mac_address
= asix_set_mac_address
,
757 .ndo_validate_addr
= eth_validate_addr
,
758 .ndo_set_rx_mode
= asix_set_multicast
,
759 .ndo_do_ioctl
= asix_ioctl
,
760 .ndo_change_mtu
= ax88178_change_mtu
,
763 static int ax88178_bind(struct usbnet
*dev
, struct usb_interface
*intf
)
768 usbnet_get_endpoints(dev
,intf
);
770 /* Get the MAC address */
771 ret
= asix_read_cmd(dev
, AX_CMD_READ_NODE_ID
, 0, 0, ETH_ALEN
, buf
);
773 dbg("Failed to read MAC address: %d", ret
);
776 memcpy(dev
->net
->dev_addr
, buf
, ETH_ALEN
);
778 /* Initialize MII structure */
779 dev
->mii
.dev
= dev
->net
;
780 dev
->mii
.mdio_read
= asix_mdio_read
;
781 dev
->mii
.mdio_write
= asix_mdio_write
;
782 dev
->mii
.phy_id_mask
= 0x1f;
783 dev
->mii
.reg_num_mask
= 0xff;
784 dev
->mii
.supports_gmii
= 1;
785 dev
->mii
.phy_id
= asix_get_phy_addr(dev
);
787 dev
->net
->netdev_ops
= &ax88178_netdev_ops
;
788 dev
->net
->ethtool_ops
= &ax88178_ethtool_ops
;
790 /* Blink LEDS so users know driver saw dongle */
791 asix_sw_reset(dev
, 0);
794 asix_sw_reset(dev
, AX_SWRESET_PRL
| AX_SWRESET_IPPD
);
797 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
798 if (dev
->driver_info
->flags
& FLAG_FRAMING_AX
) {
799 /* hard_mtu is still the default - the device does not support
801 dev
->rx_urb_size
= 2048;
807 static const struct driver_info ax8817x_info
= {
808 .description
= "ASIX AX8817x USB 2.0 Ethernet",
809 .bind
= ax88172_bind
,
810 .status
= asix_status
,
811 .link_reset
= ax88172_link_reset
,
812 .reset
= ax88172_link_reset
,
813 .flags
= FLAG_ETHER
| FLAG_LINK_INTR
,
817 static const struct driver_info dlink_dub_e100_info
= {
818 .description
= "DLink DUB-E100 USB Ethernet",
819 .bind
= ax88172_bind
,
820 .status
= asix_status
,
821 .link_reset
= ax88172_link_reset
,
822 .reset
= ax88172_link_reset
,
823 .flags
= FLAG_ETHER
| FLAG_LINK_INTR
,
827 static const struct driver_info netgear_fa120_info
= {
828 .description
= "Netgear FA-120 USB Ethernet",
829 .bind
= ax88172_bind
,
830 .status
= asix_status
,
831 .link_reset
= ax88172_link_reset
,
832 .reset
= ax88172_link_reset
,
833 .flags
= FLAG_ETHER
| FLAG_LINK_INTR
,
837 static const struct driver_info hawking_uf200_info
= {
838 .description
= "Hawking UF200 USB Ethernet",
839 .bind
= ax88172_bind
,
840 .status
= asix_status
,
841 .link_reset
= ax88172_link_reset
,
842 .reset
= ax88172_link_reset
,
843 .flags
= FLAG_ETHER
| FLAG_LINK_INTR
,
847 static const struct driver_info ax88772_info
= {
848 .description
= "ASIX AX88772 USB 2.0 Ethernet",
849 .bind
= ax88772_bind
,
850 .status
= asix_status
,
851 .link_reset
= ax88772_link_reset
,
852 .reset
= ax88772_reset
,
853 .flags
= FLAG_ETHER
| FLAG_FRAMING_AX
| FLAG_LINK_INTR
| FLAG_MULTI_PACKET
,
854 .rx_fixup
= asix_rx_fixup
,
855 .tx_fixup
= asix_tx_fixup
,
858 static const struct driver_info ax88178_info
= {
859 .description
= "ASIX AX88178 USB 2.0 Ethernet",
860 .bind
= ax88178_bind
,
861 .status
= asix_status
,
862 .link_reset
= ax88178_link_reset
,
863 .reset
= ax88178_reset
,
864 .flags
= FLAG_ETHER
| FLAG_FRAMING_AX
| FLAG_LINK_INTR
,
865 .rx_fixup
= asix_rx_fixup
,
866 .tx_fixup
= asix_tx_fixup
,
869 extern const struct driver_info ax88172a_info
;
871 static const struct usb_device_id products
[] = {
874 USB_DEVICE (0x077b, 0x2226),
875 .driver_info
= (unsigned long) &ax8817x_info
,
878 USB_DEVICE (0x0846, 0x1040),
879 .driver_info
= (unsigned long) &netgear_fa120_info
,
882 USB_DEVICE (0x2001, 0x1a00),
883 .driver_info
= (unsigned long) &dlink_dub_e100_info
,
885 // Intellinet, ST Lab USB Ethernet
886 USB_DEVICE (0x0b95, 0x1720),
887 .driver_info
= (unsigned long) &ax8817x_info
,
889 // Hawking UF200, TrendNet TU2-ET100
890 USB_DEVICE (0x07b8, 0x420a),
891 .driver_info
= (unsigned long) &hawking_uf200_info
,
893 // Billionton Systems, USB2AR
894 USB_DEVICE (0x08dd, 0x90ff),
895 .driver_info
= (unsigned long) &ax8817x_info
,
898 USB_DEVICE (0x0557, 0x2009),
899 .driver_info
= (unsigned long) &ax8817x_info
,
901 // Buffalo LUA-U2-KTX
902 USB_DEVICE (0x0411, 0x003d),
903 .driver_info
= (unsigned long) &ax8817x_info
,
905 // Buffalo LUA-U2-GT 10/100/1000
906 USB_DEVICE (0x0411, 0x006e),
907 .driver_info
= (unsigned long) &ax88178_info
,
909 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
910 USB_DEVICE (0x6189, 0x182d),
911 .driver_info
= (unsigned long) &ax8817x_info
,
913 // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
914 USB_DEVICE (0x0df6, 0x0056),
915 .driver_info
= (unsigned long) &ax88178_info
,
917 // corega FEther USB2-TX
918 USB_DEVICE (0x07aa, 0x0017),
919 .driver_info
= (unsigned long) &ax8817x_info
,
921 // Surecom EP-1427X-2
922 USB_DEVICE (0x1189, 0x0893),
923 .driver_info
= (unsigned long) &ax8817x_info
,
925 // goodway corp usb gwusb2e
926 USB_DEVICE (0x1631, 0x6200),
927 .driver_info
= (unsigned long) &ax8817x_info
,
929 // JVC MP-PRX1 Port Replicator
930 USB_DEVICE (0x04f1, 0x3008),
931 .driver_info
= (unsigned long) &ax8817x_info
,
933 // ASIX AX88772B 10/100
934 USB_DEVICE (0x0b95, 0x772b),
935 .driver_info
= (unsigned long) &ax88772_info
,
937 // ASIX AX88772 10/100
938 USB_DEVICE (0x0b95, 0x7720),
939 .driver_info
= (unsigned long) &ax88772_info
,
941 // ASIX AX88178 10/100/1000
942 USB_DEVICE (0x0b95, 0x1780),
943 .driver_info
= (unsigned long) &ax88178_info
,
945 // Logitec LAN-GTJ/U2A
946 USB_DEVICE (0x0789, 0x0160),
947 .driver_info
= (unsigned long) &ax88178_info
,
949 // Linksys USB200M Rev 2
950 USB_DEVICE (0x13b1, 0x0018),
951 .driver_info
= (unsigned long) &ax88772_info
,
953 // 0Q0 cable ethernet
954 USB_DEVICE (0x1557, 0x7720),
955 .driver_info
= (unsigned long) &ax88772_info
,
957 // DLink DUB-E100 H/W Ver B1
958 USB_DEVICE (0x07d1, 0x3c05),
959 .driver_info
= (unsigned long) &ax88772_info
,
961 // DLink DUB-E100 H/W Ver B1 Alternate
962 USB_DEVICE (0x2001, 0x3c05),
963 .driver_info
= (unsigned long) &ax88772_info
,
966 USB_DEVICE (0x1737, 0x0039),
967 .driver_info
= (unsigned long) &ax88178_info
,
970 USB_DEVICE (0x04bb, 0x0930),
971 .driver_info
= (unsigned long) &ax88178_info
,
974 USB_DEVICE(0x050d, 0x5055),
975 .driver_info
= (unsigned long) &ax88178_info
,
977 // Apple USB Ethernet Adapter
978 USB_DEVICE(0x05ac, 0x1402),
979 .driver_info
= (unsigned long) &ax88772_info
,
981 // Cables-to-Go USB Ethernet Adapter
982 USB_DEVICE(0x0b95, 0x772a),
983 .driver_info
= (unsigned long) &ax88772_info
,
986 USB_DEVICE(0x14ea, 0xab11),
987 .driver_info
= (unsigned long) &ax88178_info
,
990 USB_DEVICE(0x0db0, 0xa877),
991 .driver_info
= (unsigned long) &ax88772_info
,
993 // Asus USB Ethernet Adapter
994 USB_DEVICE (0x0b95, 0x7e2b),
995 .driver_info
= (unsigned long) &ax88772_info
,
997 /* ASIX 88172a demo board */
998 USB_DEVICE(0x0b95, 0x172a),
999 .driver_info
= (unsigned long) &ax88172a_info
,
1003 MODULE_DEVICE_TABLE(usb
, products
);
1005 static struct usb_driver asix_driver
= {
1006 .name
= DRIVER_NAME
,
1007 .id_table
= products
,
1008 .probe
= usbnet_probe
,
1009 .suspend
= usbnet_suspend
,
1010 .resume
= usbnet_resume
,
1011 .disconnect
= usbnet_disconnect
,
1012 .supports_autosuspend
= 1,
1013 .disable_hub_initiated_lpm
= 1,
1016 module_usb_driver(asix_driver
);
1018 MODULE_AUTHOR("David Hollis");
1019 MODULE_VERSION(DRIVER_VERSION
);
1020 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1021 MODULE_LICENSE("GPL");