2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
30 /* Information for net-next */
31 #define NETNEXT_VERSION "08"
33 /* Information for net */
34 #define NET_VERSION "3"
36 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
37 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
38 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
39 #define MODULENAME "r8152"
41 #define R8152_PHY_ID 32
43 #define PLA_IDR 0xc000
44 #define PLA_RCR 0xc010
45 #define PLA_RMS 0xc016
46 #define PLA_RXFIFO_CTRL0 0xc0a0
47 #define PLA_RXFIFO_CTRL1 0xc0a4
48 #define PLA_RXFIFO_CTRL2 0xc0a8
49 #define PLA_DMY_REG0 0xc0b0
50 #define PLA_FMC 0xc0b4
51 #define PLA_CFG_WOL 0xc0b6
52 #define PLA_TEREDO_CFG 0xc0bc
53 #define PLA_MAR 0xcd00
54 #define PLA_BACKUP 0xd000
55 #define PAL_BDC_CR 0xd1a0
56 #define PLA_TEREDO_TIMER 0xd2cc
57 #define PLA_REALWOW_TIMER 0xd2e8
58 #define PLA_LEDSEL 0xdd90
59 #define PLA_LED_FEATURE 0xdd92
60 #define PLA_PHYAR 0xde00
61 #define PLA_BOOT_CTRL 0xe004
62 #define PLA_GPHY_INTR_IMR 0xe022
63 #define PLA_EEE_CR 0xe040
64 #define PLA_EEEP_CR 0xe080
65 #define PLA_MAC_PWR_CTRL 0xe0c0
66 #define PLA_MAC_PWR_CTRL2 0xe0ca
67 #define PLA_MAC_PWR_CTRL3 0xe0cc
68 #define PLA_MAC_PWR_CTRL4 0xe0ce
69 #define PLA_WDT6_CTRL 0xe428
70 #define PLA_TCR0 0xe610
71 #define PLA_TCR1 0xe612
72 #define PLA_MTPS 0xe615
73 #define PLA_TXFIFO_CTRL 0xe618
74 #define PLA_RSTTALLY 0xe800
76 #define PLA_CRWECR 0xe81c
77 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
78 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
79 #define PLA_CONFIG5 0xe822
80 #define PLA_PHY_PWR 0xe84c
81 #define PLA_OOB_CTRL 0xe84f
82 #define PLA_CPCR 0xe854
83 #define PLA_MISC_0 0xe858
84 #define PLA_MISC_1 0xe85a
85 #define PLA_OCP_GPHY_BASE 0xe86c
86 #define PLA_TALLYCNT 0xe890
87 #define PLA_SFF_STS_7 0xe8de
88 #define PLA_PHYSTATUS 0xe908
89 #define PLA_BP_BA 0xfc26
90 #define PLA_BP_0 0xfc28
91 #define PLA_BP_1 0xfc2a
92 #define PLA_BP_2 0xfc2c
93 #define PLA_BP_3 0xfc2e
94 #define PLA_BP_4 0xfc30
95 #define PLA_BP_5 0xfc32
96 #define PLA_BP_6 0xfc34
97 #define PLA_BP_7 0xfc36
98 #define PLA_BP_EN 0xfc38
100 #define USB_USB2PHY 0xb41e
101 #define USB_SSPHYLINK2 0xb428
102 #define USB_U2P3_CTRL 0xb460
103 #define USB_CSR_DUMMY1 0xb464
104 #define USB_CSR_DUMMY2 0xb466
105 #define USB_DEV_STAT 0xb808
106 #define USB_CONNECT_TIMER 0xcbf8
107 #define USB_BURST_SIZE 0xcfc0
108 #define USB_USB_CTRL 0xd406
109 #define USB_PHY_CTRL 0xd408
110 #define USB_TX_AGG 0xd40a
111 #define USB_RX_BUF_TH 0xd40c
112 #define USB_USB_TIMER 0xd428
113 #define USB_RX_EARLY_TIMEOUT 0xd42c
114 #define USB_RX_EARLY_SIZE 0xd42e
115 #define USB_PM_CTRL_STATUS 0xd432
116 #define USB_TX_DMA 0xd434
117 #define USB_TOLERANCE 0xd490
118 #define USB_LPM_CTRL 0xd41a
119 #define USB_UPS_CTRL 0xd800
120 #define USB_MISC_0 0xd81a
121 #define USB_POWER_CUT 0xd80a
122 #define USB_AFE_CTRL2 0xd824
123 #define USB_WDT11_CTRL 0xe43c
124 #define USB_BP_BA 0xfc26
125 #define USB_BP_0 0xfc28
126 #define USB_BP_1 0xfc2a
127 #define USB_BP_2 0xfc2c
128 #define USB_BP_3 0xfc2e
129 #define USB_BP_4 0xfc30
130 #define USB_BP_5 0xfc32
131 #define USB_BP_6 0xfc34
132 #define USB_BP_7 0xfc36
133 #define USB_BP_EN 0xfc38
136 #define OCP_ALDPS_CONFIG 0x2010
137 #define OCP_EEE_CONFIG1 0x2080
138 #define OCP_EEE_CONFIG2 0x2092
139 #define OCP_EEE_CONFIG3 0x2094
140 #define OCP_BASE_MII 0xa400
141 #define OCP_EEE_AR 0xa41a
142 #define OCP_EEE_DATA 0xa41c
143 #define OCP_PHY_STATUS 0xa420
144 #define OCP_POWER_CFG 0xa430
145 #define OCP_EEE_CFG 0xa432
146 #define OCP_SRAM_ADDR 0xa436
147 #define OCP_SRAM_DATA 0xa438
148 #define OCP_DOWN_SPEED 0xa442
149 #define OCP_EEE_ABLE 0xa5c4
150 #define OCP_EEE_ADV 0xa5d0
151 #define OCP_EEE_LPABLE 0xa5d2
152 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
153 #define OCP_ADC_CFG 0xbc06
156 #define SRAM_LPF_CFG 0x8012
157 #define SRAM_10M_AMP1 0x8080
158 #define SRAM_10M_AMP2 0x8082
159 #define SRAM_IMPEDANCE 0x8084
162 #define RCR_AAP 0x00000001
163 #define RCR_APM 0x00000002
164 #define RCR_AM 0x00000004
165 #define RCR_AB 0x00000008
166 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
168 /* PLA_RXFIFO_CTRL0 */
169 #define RXFIFO_THR1_NORMAL 0x00080002
170 #define RXFIFO_THR1_OOB 0x01800003
172 /* PLA_RXFIFO_CTRL1 */
173 #define RXFIFO_THR2_FULL 0x00000060
174 #define RXFIFO_THR2_HIGH 0x00000038
175 #define RXFIFO_THR2_OOB 0x0000004a
176 #define RXFIFO_THR2_NORMAL 0x00a0
178 /* PLA_RXFIFO_CTRL2 */
179 #define RXFIFO_THR3_FULL 0x00000078
180 #define RXFIFO_THR3_HIGH 0x00000048
181 #define RXFIFO_THR3_OOB 0x0000005a
182 #define RXFIFO_THR3_NORMAL 0x0110
184 /* PLA_TXFIFO_CTRL */
185 #define TXFIFO_THR_NORMAL 0x00400008
186 #define TXFIFO_THR_NORMAL2 0x01000008
189 #define ECM_ALDPS 0x0002
192 #define FMC_FCR_MCU_EN 0x0001
195 #define EEEP_CR_EEEP_TX 0x0002
198 #define WDT6_SET_MODE 0x0010
201 #define TCR0_TX_EMPTY 0x0800
202 #define TCR0_AUTO_FIFO 0x0080
205 #define VERSION_MASK 0x7cf0
208 #define MTPS_JUMBO (12 * 1024 / 64)
209 #define MTPS_DEFAULT (6 * 1024 / 64)
212 #define TALLY_RESET 0x0001
220 #define CRWECR_NORAML 0x00
221 #define CRWECR_CONFIG 0xc0
224 #define NOW_IS_OOB 0x80
225 #define TXFIFO_EMPTY 0x20
226 #define RXFIFO_EMPTY 0x10
227 #define LINK_LIST_READY 0x02
228 #define DIS_MCU_CLROOB 0x01
229 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
232 #define RXDY_GATED_EN 0x0008
235 #define RE_INIT_LL 0x8000
236 #define MCU_BORW_EN 0x4000
239 #define CPCR_RX_VLAN 0x0040
242 #define MAGIC_EN 0x0001
245 #define TEREDO_SEL 0x8000
246 #define TEREDO_WAKE_MASK 0x7f00
247 #define TEREDO_RS_EVENT_MASK 0x00fe
248 #define OOB_TEREDO_EN 0x0001
251 #define ALDPS_PROXY_MODE 0x0001
254 #define LINK_ON_WAKE_EN 0x0010
255 #define LINK_OFF_WAKE_EN 0x0008
258 #define BWF_EN 0x0040
259 #define MWF_EN 0x0020
260 #define UWF_EN 0x0010
261 #define LAN_WAKE_EN 0x0002
263 /* PLA_LED_FEATURE */
264 #define LED_MODE_MASK 0x0700
267 #define TX_10M_IDLE_EN 0x0080
268 #define PFM_PWM_SWITCH 0x0040
270 /* PLA_MAC_PWR_CTRL */
271 #define D3_CLK_GATED_EN 0x00004000
272 #define MCU_CLK_RATIO 0x07010f07
273 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
274 #define ALDPS_SPDWN_RATIO 0x0f87
276 /* PLA_MAC_PWR_CTRL2 */
277 #define EEE_SPDWN_RATIO 0x8007
279 /* PLA_MAC_PWR_CTRL3 */
280 #define PKT_AVAIL_SPDWN_EN 0x0100
281 #define SUSPEND_SPDWN_EN 0x0004
282 #define U1U2_SPDWN_EN 0x0002
283 #define L1_SPDWN_EN 0x0001
285 /* PLA_MAC_PWR_CTRL4 */
286 #define PWRSAVE_SPDWN_EN 0x1000
287 #define RXDV_SPDWN_EN 0x0800
288 #define TX10MIDLE_EN 0x0100
289 #define TP100_SPDWN_EN 0x0020
290 #define TP500_SPDWN_EN 0x0010
291 #define TP1000_SPDWN_EN 0x0008
292 #define EEE_SPDWN_EN 0x0001
294 /* PLA_GPHY_INTR_IMR */
295 #define GPHY_STS_MSK 0x0001
296 #define SPEED_DOWN_MSK 0x0002
297 #define SPDWN_RXDV_MSK 0x0004
298 #define SPDWN_LINKCHG_MSK 0x0008
301 #define PHYAR_FLAG 0x80000000
304 #define EEE_RX_EN 0x0001
305 #define EEE_TX_EN 0x0002
308 #define AUTOLOAD_DONE 0x0002
311 #define USB2PHY_SUSPEND 0x0001
312 #define USB2PHY_L1 0x0002
315 #define pwd_dn_scale_mask 0x3ffe
316 #define pwd_dn_scale(x) ((x) << 1)
319 #define DYNAMIC_BURST 0x0001
322 #define EP4_FULL_FC 0x0001
325 #define STAT_SPEED_MASK 0x0006
326 #define STAT_SPEED_HIGH 0x0000
327 #define STAT_SPEED_FULL 0x0002
330 #define TX_AGG_MAX_THRESHOLD 0x03
333 #define RX_THR_SUPPER 0x0c350180
334 #define RX_THR_HIGH 0x7a120180
335 #define RX_THR_SLOW 0xffff0180
338 #define TEST_MODE_DISABLE 0x00000001
339 #define TX_SIZE_ADJUST1 0x00000100
342 #define POWER_CUT 0x0100
344 /* USB_PM_CTRL_STATUS */
345 #define RESUME_INDICATE 0x0001
348 #define RX_AGG_DISABLE 0x0010
349 #define RX_ZERO_EN 0x0080
352 #define U2P3_ENABLE 0x0001
355 #define PWR_EN 0x0001
356 #define PHASE2_EN 0x0008
359 #define PCUT_STATUS 0x0001
361 /* USB_RX_EARLY_TIMEOUT */
362 #define COALESCE_SUPER 85000U
363 #define COALESCE_HIGH 250000U
364 #define COALESCE_SLOW 524280U
367 #define TIMER11_EN 0x0001
370 /* bit 4 ~ 5: fifo empty boundary */
371 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
372 /* bit 2 ~ 3: LMP timer */
373 #define LPM_TIMER_MASK 0x0c
374 #define LPM_TIMER_500MS 0x04 /* 500 ms */
375 #define LPM_TIMER_500US 0x0c /* 500 us */
376 #define ROK_EXIT_LPM 0x02
379 #define SEN_VAL_MASK 0xf800
380 #define SEN_VAL_NORMAL 0xa000
381 #define SEL_RXIDLE 0x0100
383 /* OCP_ALDPS_CONFIG */
384 #define ENPWRSAVE 0x8000
385 #define ENPDNPS 0x0200
386 #define LINKENA 0x0100
387 #define DIS_SDSAVE 0x0010
390 #define PHY_STAT_MASK 0x0007
391 #define PHY_STAT_LAN_ON 3
392 #define PHY_STAT_PWRDN 5
395 #define EEE_CLKDIV_EN 0x8000
396 #define EN_ALDPS 0x0004
397 #define EN_10M_PLLOFF 0x0001
399 /* OCP_EEE_CONFIG1 */
400 #define RG_TXLPI_MSK_HFDUP 0x8000
401 #define RG_MATCLR_EN 0x4000
402 #define EEE_10_CAP 0x2000
403 #define EEE_NWAY_EN 0x1000
404 #define TX_QUIET_EN 0x0200
405 #define RX_QUIET_EN 0x0100
406 #define sd_rise_time_mask 0x0070
407 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
408 #define RG_RXLPI_MSK_HFDUP 0x0008
409 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
411 /* OCP_EEE_CONFIG2 */
412 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
413 #define RG_DACQUIET_EN 0x0400
414 #define RG_LDVQUIET_EN 0x0200
415 #define RG_CKRSEL 0x0020
416 #define RG_EEEPRG_EN 0x0010
418 /* OCP_EEE_CONFIG3 */
419 #define fast_snr_mask 0xff80
420 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
421 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
422 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
425 /* bit[15:14] function */
426 #define FUN_ADDR 0x0000
427 #define FUN_DATA 0x4000
428 /* bit[4:0] device addr */
431 #define CTAP_SHORT_EN 0x0040
432 #define EEE10_EN 0x0010
435 #define EN_10M_BGOFF 0x0080
438 #define TXDIS_STATE 0x01
439 #define ABD_STATE 0x02
442 #define CKADSEL_L 0x0100
443 #define ADC_EN 0x0080
444 #define EN_EMI_L 0x0040
447 #define LPF_AUTO_TUNE 0x8000
450 #define GDAC_IB_UPALL 0x0008
453 #define AMP_DN 0x0200
456 #define RX_DRIVING_MASK 0x6000
458 enum rtl_register_content
{
466 #define RTL8152_MAX_TX 4
467 #define RTL8152_MAX_RX 10
473 #define INTR_LINK 0x0004
475 #define RTL8152_REQT_READ 0xc0
476 #define RTL8152_REQT_WRITE 0x40
477 #define RTL8152_REQ_GET_REGS 0x05
478 #define RTL8152_REQ_SET_REGS 0x05
480 #define BYTE_EN_DWORD 0xff
481 #define BYTE_EN_WORD 0x33
482 #define BYTE_EN_BYTE 0x11
483 #define BYTE_EN_SIX_BYTES 0x3f
484 #define BYTE_EN_START_MASK 0x0f
485 #define BYTE_EN_END_MASK 0xf0
487 #define RTL8153_MAX_PACKET 9216 /* 9K */
488 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
489 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
490 #define RTL8153_RMS RTL8153_MAX_PACKET
491 #define RTL8152_TX_TIMEOUT (5 * HZ)
492 #define RTL8152_NAPI_WEIGHT 64
505 /* Define these values to match your device */
506 #define VENDOR_ID_REALTEK 0x0bda
507 #define VENDOR_ID_SAMSUNG 0x04e8
508 #define VENDOR_ID_LENOVO 0x17ef
509 #define VENDOR_ID_NVIDIA 0x0955
511 #define MCU_TYPE_PLA 0x0100
512 #define MCU_TYPE_USB 0x0000
514 struct tally_counter
{
521 __le32 tx_one_collision
;
522 __le32 tx_multi_collision
;
532 #define RX_LEN_MASK 0x7fff
535 #define RD_UDP_CS BIT(23)
536 #define RD_TCP_CS BIT(22)
537 #define RD_IPV6_CS BIT(20)
538 #define RD_IPV4_CS BIT(19)
541 #define IPF BIT(23) /* IP checksum fail */
542 #define UDPF BIT(22) /* UDP checksum fail */
543 #define TCPF BIT(21) /* TCP checksum fail */
544 #define RX_VLAN_TAG BIT(16)
553 #define TX_FS BIT(31) /* First segment of a packet */
554 #define TX_LS BIT(30) /* Final segment of a packet */
555 #define GTSENDV4 BIT(28)
556 #define GTSENDV6 BIT(27)
557 #define GTTCPHO_SHIFT 18
558 #define GTTCPHO_MAX 0x7fU
559 #define TX_LEN_MAX 0x3ffffU
562 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
563 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
564 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
565 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
567 #define MSS_MAX 0x7ffU
568 #define TCPHO_SHIFT 17
569 #define TCPHO_MAX 0x7ffU
570 #define TX_VLAN_TAG BIT(16)
576 struct list_head list
;
578 struct r8152
*context
;
584 struct list_head list
;
586 struct r8152
*context
;
595 struct usb_device
*udev
;
596 struct napi_struct napi
;
597 struct usb_interface
*intf
;
598 struct net_device
*netdev
;
599 struct urb
*intr_urb
;
600 struct tx_agg tx_info
[RTL8152_MAX_TX
];
601 struct rx_agg rx_info
[RTL8152_MAX_RX
];
602 struct list_head rx_done
, tx_free
;
603 struct sk_buff_head tx_queue
, rx_queue
;
604 spinlock_t rx_lock
, tx_lock
;
605 struct delayed_work schedule
, hw_phy_work
;
606 struct mii_if_info mii
;
607 struct mutex control
; /* use for hw setting */
608 #ifdef CONFIG_PM_SLEEP
609 struct notifier_block pm_notifier
;
613 void (*init
)(struct r8152
*);
614 int (*enable
)(struct r8152
*);
615 void (*disable
)(struct r8152
*);
616 void (*up
)(struct r8152
*);
617 void (*down
)(struct r8152
*);
618 void (*unload
)(struct r8152
*);
619 int (*eee_get
)(struct r8152
*, struct ethtool_eee
*);
620 int (*eee_set
)(struct r8152
*, struct ethtool_eee
*);
621 bool (*in_nway
)(struct r8152
*);
622 void (*hw_phy_cfg
)(struct r8152
*);
655 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
656 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
658 static const int multicast_filter_limit
= 32;
659 static unsigned int agg_buf_sz
= 16384;
661 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
662 VLAN_ETH_HLEN - VLAN_HLEN)
665 int get_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
670 tmp
= kmalloc(size
, GFP_KERNEL
);
674 ret
= usb_control_msg(tp
->udev
, usb_rcvctrlpipe(tp
->udev
, 0),
675 RTL8152_REQ_GET_REGS
, RTL8152_REQT_READ
,
676 value
, index
, tmp
, size
, 500);
678 memcpy(data
, tmp
, size
);
685 int set_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
690 tmp
= kmemdup(data
, size
, GFP_KERNEL
);
694 ret
= usb_control_msg(tp
->udev
, usb_sndctrlpipe(tp
->udev
, 0),
695 RTL8152_REQ_SET_REGS
, RTL8152_REQT_WRITE
,
696 value
, index
, tmp
, size
, 500);
703 static int generic_ocp_read(struct r8152
*tp
, u16 index
, u16 size
,
704 void *data
, u16 type
)
709 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
712 /* both size and indix must be 4 bytes align */
713 if ((size
& 3) || !size
|| (index
& 3) || !data
)
716 if ((u32
)index
+ (u32
)size
> 0xffff)
721 ret
= get_registers(tp
, index
, type
, limit
, data
);
729 ret
= get_registers(tp
, index
, type
, size
, data
);
741 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
746 static int generic_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
,
747 u16 size
, void *data
, u16 type
)
750 u16 byteen_start
, byteen_end
, byen
;
753 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
756 /* both size and indix must be 4 bytes align */
757 if ((size
& 3) || !size
|| (index
& 3) || !data
)
760 if ((u32
)index
+ (u32
)size
> 0xffff)
763 byteen_start
= byteen
& BYTE_EN_START_MASK
;
764 byteen_end
= byteen
& BYTE_EN_END_MASK
;
766 byen
= byteen_start
| (byteen_start
<< 4);
767 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
780 ret
= set_registers(tp
, index
,
781 type
| BYTE_EN_DWORD
,
790 ret
= set_registers(tp
, index
,
791 type
| BYTE_EN_DWORD
,
803 byen
= byteen_end
| (byteen_end
>> 4);
804 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
811 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
817 int pla_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
819 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_PLA
);
823 int pla_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
825 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_PLA
);
829 int usb_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
831 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_USB
);
835 int usb_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
837 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_USB
);
840 static u32
ocp_read_dword(struct r8152
*tp
, u16 type
, u16 index
)
844 generic_ocp_read(tp
, index
, sizeof(data
), &data
, type
);
846 return __le32_to_cpu(data
);
849 static void ocp_write_dword(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
851 __le32 tmp
= __cpu_to_le32(data
);
853 generic_ocp_write(tp
, index
, BYTE_EN_DWORD
, sizeof(tmp
), &tmp
, type
);
856 static u16
ocp_read_word(struct r8152
*tp
, u16 type
, u16 index
)
860 u8 shift
= index
& 2;
864 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
866 data
= __le32_to_cpu(tmp
);
867 data
>>= (shift
* 8);
873 static void ocp_write_word(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
877 u16 byen
= BYTE_EN_WORD
;
878 u8 shift
= index
& 2;
884 mask
<<= (shift
* 8);
885 data
<<= (shift
* 8);
889 tmp
= __cpu_to_le32(data
);
891 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
894 static u8
ocp_read_byte(struct r8152
*tp
, u16 type
, u16 index
)
898 u8 shift
= index
& 3;
902 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
904 data
= __le32_to_cpu(tmp
);
905 data
>>= (shift
* 8);
911 static void ocp_write_byte(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
915 u16 byen
= BYTE_EN_BYTE
;
916 u8 shift
= index
& 3;
922 mask
<<= (shift
* 8);
923 data
<<= (shift
* 8);
927 tmp
= __cpu_to_le32(data
);
929 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
932 static u16
ocp_reg_read(struct r8152
*tp
, u16 addr
)
934 u16 ocp_base
, ocp_index
;
936 ocp_base
= addr
& 0xf000;
937 if (ocp_base
!= tp
->ocp_base
) {
938 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
939 tp
->ocp_base
= ocp_base
;
942 ocp_index
= (addr
& 0x0fff) | 0xb000;
943 return ocp_read_word(tp
, MCU_TYPE_PLA
, ocp_index
);
946 static void ocp_reg_write(struct r8152
*tp
, u16 addr
, u16 data
)
948 u16 ocp_base
, ocp_index
;
950 ocp_base
= addr
& 0xf000;
951 if (ocp_base
!= tp
->ocp_base
) {
952 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
953 tp
->ocp_base
= ocp_base
;
956 ocp_index
= (addr
& 0x0fff) | 0xb000;
957 ocp_write_word(tp
, MCU_TYPE_PLA
, ocp_index
, data
);
960 static inline void r8152_mdio_write(struct r8152
*tp
, u32 reg_addr
, u32 value
)
962 ocp_reg_write(tp
, OCP_BASE_MII
+ reg_addr
* 2, value
);
965 static inline int r8152_mdio_read(struct r8152
*tp
, u32 reg_addr
)
967 return ocp_reg_read(tp
, OCP_BASE_MII
+ reg_addr
* 2);
970 static void sram_write(struct r8152
*tp
, u16 addr
, u16 data
)
972 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
973 ocp_reg_write(tp
, OCP_SRAM_DATA
, data
);
976 static int read_mii_word(struct net_device
*netdev
, int phy_id
, int reg
)
978 struct r8152
*tp
= netdev_priv(netdev
);
981 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
984 if (phy_id
!= R8152_PHY_ID
)
987 ret
= r8152_mdio_read(tp
, reg
);
993 void write_mii_word(struct net_device
*netdev
, int phy_id
, int reg
, int val
)
995 struct r8152
*tp
= netdev_priv(netdev
);
997 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1000 if (phy_id
!= R8152_PHY_ID
)
1003 r8152_mdio_write(tp
, reg
, val
);
1007 r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
);
1009 static int rtl8152_set_mac_address(struct net_device
*netdev
, void *p
)
1011 struct r8152
*tp
= netdev_priv(netdev
);
1012 struct sockaddr
*addr
= p
;
1013 int ret
= -EADDRNOTAVAIL
;
1015 if (!is_valid_ether_addr(addr
->sa_data
))
1018 ret
= usb_autopm_get_interface(tp
->intf
);
1022 mutex_lock(&tp
->control
);
1024 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
1026 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
1027 pla_ocp_write(tp
, PLA_IDR
, BYTE_EN_SIX_BYTES
, 8, addr
->sa_data
);
1028 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
1030 mutex_unlock(&tp
->control
);
1032 usb_autopm_put_interface(tp
->intf
);
1037 static int set_ethernet_addr(struct r8152
*tp
)
1039 struct net_device
*dev
= tp
->netdev
;
1043 if (tp
->version
== RTL_VER_01
)
1044 ret
= pla_ocp_read(tp
, PLA_IDR
, 8, sa
.sa_data
);
1046 ret
= pla_ocp_read(tp
, PLA_BACKUP
, 8, sa
.sa_data
);
1049 netif_err(tp
, probe
, dev
, "Get ether addr fail\n");
1050 } else if (!is_valid_ether_addr(sa
.sa_data
)) {
1051 netif_err(tp
, probe
, dev
, "Invalid ether addr %pM\n",
1053 eth_hw_addr_random(dev
);
1054 ether_addr_copy(sa
.sa_data
, dev
->dev_addr
);
1055 ret
= rtl8152_set_mac_address(dev
, &sa
);
1056 netif_info(tp
, probe
, dev
, "Random ether addr %pM\n",
1059 if (tp
->version
== RTL_VER_01
)
1060 ether_addr_copy(dev
->dev_addr
, sa
.sa_data
);
1062 ret
= rtl8152_set_mac_address(dev
, &sa
);
1068 static void read_bulk_callback(struct urb
*urb
)
1070 struct net_device
*netdev
;
1071 int status
= urb
->status
;
1083 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1086 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1089 netdev
= tp
->netdev
;
1091 /* When link down, the driver would cancel all bulks. */
1092 /* This avoid the re-submitting bulk */
1093 if (!netif_carrier_ok(netdev
))
1096 usb_mark_last_busy(tp
->udev
);
1100 if (urb
->actual_length
< ETH_ZLEN
)
1103 spin_lock(&tp
->rx_lock
);
1104 list_add_tail(&agg
->list
, &tp
->rx_done
);
1105 spin_unlock(&tp
->rx_lock
);
1106 napi_schedule(&tp
->napi
);
1109 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1110 netif_device_detach(tp
->netdev
);
1113 return; /* the urb is in unlink state */
1115 if (net_ratelimit())
1116 netdev_warn(netdev
, "maybe reset is needed?\n");
1119 if (net_ratelimit())
1120 netdev_warn(netdev
, "Rx status %d\n", status
);
1124 r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1127 static void write_bulk_callback(struct urb
*urb
)
1129 struct net_device_stats
*stats
;
1130 struct net_device
*netdev
;
1133 int status
= urb
->status
;
1143 netdev
= tp
->netdev
;
1144 stats
= &netdev
->stats
;
1146 if (net_ratelimit())
1147 netdev_warn(netdev
, "Tx status %d\n", status
);
1148 stats
->tx_errors
+= agg
->skb_num
;
1150 stats
->tx_packets
+= agg
->skb_num
;
1151 stats
->tx_bytes
+= agg
->skb_len
;
1154 spin_lock(&tp
->tx_lock
);
1155 list_add_tail(&agg
->list
, &tp
->tx_free
);
1156 spin_unlock(&tp
->tx_lock
);
1158 usb_autopm_put_interface_async(tp
->intf
);
1160 if (!netif_carrier_ok(netdev
))
1163 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1166 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1169 if (!skb_queue_empty(&tp
->tx_queue
))
1170 napi_schedule(&tp
->napi
);
1173 static void intr_callback(struct urb
*urb
)
1177 int status
= urb
->status
;
1184 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1187 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1191 case 0: /* success */
1193 case -ECONNRESET
: /* unlink */
1195 netif_device_detach(tp
->netdev
);
1198 netif_info(tp
, intr
, tp
->netdev
,
1199 "Stop submitting intr, status %d\n", status
);
1202 netif_info(tp
, intr
, tp
->netdev
, "intr status -EOVERFLOW\n");
1204 /* -EPIPE: should clear the halt */
1206 netif_info(tp
, intr
, tp
->netdev
, "intr status %d\n", status
);
1210 d
= urb
->transfer_buffer
;
1211 if (INTR_LINK
& __le16_to_cpu(d
[0])) {
1212 if (!netif_carrier_ok(tp
->netdev
)) {
1213 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1214 schedule_delayed_work(&tp
->schedule
, 0);
1217 if (netif_carrier_ok(tp
->netdev
)) {
1218 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1219 schedule_delayed_work(&tp
->schedule
, 0);
1224 res
= usb_submit_urb(urb
, GFP_ATOMIC
);
1225 if (res
== -ENODEV
) {
1226 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1227 netif_device_detach(tp
->netdev
);
1229 netif_err(tp
, intr
, tp
->netdev
,
1230 "can't resubmit intr, status %d\n", res
);
1234 static inline void *rx_agg_align(void *data
)
1236 return (void *)ALIGN((uintptr_t)data
, RX_ALIGN
);
1239 static inline void *tx_agg_align(void *data
)
1241 return (void *)ALIGN((uintptr_t)data
, TX_ALIGN
);
1244 static void free_all_mem(struct r8152
*tp
)
1248 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1249 usb_free_urb(tp
->rx_info
[i
].urb
);
1250 tp
->rx_info
[i
].urb
= NULL
;
1252 kfree(tp
->rx_info
[i
].buffer
);
1253 tp
->rx_info
[i
].buffer
= NULL
;
1254 tp
->rx_info
[i
].head
= NULL
;
1257 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1258 usb_free_urb(tp
->tx_info
[i
].urb
);
1259 tp
->tx_info
[i
].urb
= NULL
;
1261 kfree(tp
->tx_info
[i
].buffer
);
1262 tp
->tx_info
[i
].buffer
= NULL
;
1263 tp
->tx_info
[i
].head
= NULL
;
1266 usb_free_urb(tp
->intr_urb
);
1267 tp
->intr_urb
= NULL
;
1269 kfree(tp
->intr_buff
);
1270 tp
->intr_buff
= NULL
;
1273 static int alloc_all_mem(struct r8152
*tp
)
1275 struct net_device
*netdev
= tp
->netdev
;
1276 struct usb_interface
*intf
= tp
->intf
;
1277 struct usb_host_interface
*alt
= intf
->cur_altsetting
;
1278 struct usb_host_endpoint
*ep_intr
= alt
->endpoint
+ 2;
1283 node
= netdev
->dev
.parent
? dev_to_node(netdev
->dev
.parent
) : -1;
1285 spin_lock_init(&tp
->rx_lock
);
1286 spin_lock_init(&tp
->tx_lock
);
1287 INIT_LIST_HEAD(&tp
->tx_free
);
1288 skb_queue_head_init(&tp
->tx_queue
);
1289 skb_queue_head_init(&tp
->rx_queue
);
1291 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1292 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1296 if (buf
!= rx_agg_align(buf
)) {
1298 buf
= kmalloc_node(agg_buf_sz
+ RX_ALIGN
, GFP_KERNEL
,
1304 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1310 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
1311 tp
->rx_info
[i
].context
= tp
;
1312 tp
->rx_info
[i
].urb
= urb
;
1313 tp
->rx_info
[i
].buffer
= buf
;
1314 tp
->rx_info
[i
].head
= rx_agg_align(buf
);
1317 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1318 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1322 if (buf
!= tx_agg_align(buf
)) {
1324 buf
= kmalloc_node(agg_buf_sz
+ TX_ALIGN
, GFP_KERNEL
,
1330 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1336 INIT_LIST_HEAD(&tp
->tx_info
[i
].list
);
1337 tp
->tx_info
[i
].context
= tp
;
1338 tp
->tx_info
[i
].urb
= urb
;
1339 tp
->tx_info
[i
].buffer
= buf
;
1340 tp
->tx_info
[i
].head
= tx_agg_align(buf
);
1342 list_add_tail(&tp
->tx_info
[i
].list
, &tp
->tx_free
);
1345 tp
->intr_urb
= usb_alloc_urb(0, GFP_KERNEL
);
1349 tp
->intr_buff
= kmalloc(INTBUFSIZE
, GFP_KERNEL
);
1353 tp
->intr_interval
= (int)ep_intr
->desc
.bInterval
;
1354 usb_fill_int_urb(tp
->intr_urb
, tp
->udev
, usb_rcvintpipe(tp
->udev
, 3),
1355 tp
->intr_buff
, INTBUFSIZE
, intr_callback
,
1356 tp
, tp
->intr_interval
);
1365 static struct tx_agg
*r8152_get_tx_agg(struct r8152
*tp
)
1367 struct tx_agg
*agg
= NULL
;
1368 unsigned long flags
;
1370 if (list_empty(&tp
->tx_free
))
1373 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1374 if (!list_empty(&tp
->tx_free
)) {
1375 struct list_head
*cursor
;
1377 cursor
= tp
->tx_free
.next
;
1378 list_del_init(cursor
);
1379 agg
= list_entry(cursor
, struct tx_agg
, list
);
1381 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1386 /* r8152_csum_workaround()
1387 * The hw limites the value the transport offset. When the offset is out of the
1388 * range, calculate the checksum by sw.
1390 static void r8152_csum_workaround(struct r8152
*tp
, struct sk_buff
*skb
,
1391 struct sk_buff_head
*list
)
1393 if (skb_shinfo(skb
)->gso_size
) {
1394 netdev_features_t features
= tp
->netdev
->features
;
1395 struct sk_buff_head seg_list
;
1396 struct sk_buff
*segs
, *nskb
;
1398 features
&= ~(NETIF_F_SG
| NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
);
1399 segs
= skb_gso_segment(skb
, features
);
1400 if (IS_ERR(segs
) || !segs
)
1403 __skb_queue_head_init(&seg_list
);
1409 __skb_queue_tail(&seg_list
, nskb
);
1412 skb_queue_splice(&seg_list
, list
);
1414 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1415 if (skb_checksum_help(skb
) < 0)
1418 __skb_queue_head(list
, skb
);
1420 struct net_device_stats
*stats
;
1423 stats
= &tp
->netdev
->stats
;
1424 stats
->tx_dropped
++;
1429 /* msdn_giant_send_check()
1430 * According to the document of microsoft, the TCP Pseudo Header excludes the
1431 * packet length for IPv6 TCP large packets.
1433 static int msdn_giant_send_check(struct sk_buff
*skb
)
1435 const struct ipv6hdr
*ipv6h
;
1439 ret
= skb_cow_head(skb
, 0);
1443 ipv6h
= ipv6_hdr(skb
);
1447 th
->check
= ~tcp_v6_check(0, &ipv6h
->saddr
, &ipv6h
->daddr
, 0);
1452 static inline void rtl_tx_vlan_tag(struct tx_desc
*desc
, struct sk_buff
*skb
)
1454 if (skb_vlan_tag_present(skb
)) {
1457 opts2
= TX_VLAN_TAG
| swab16(skb_vlan_tag_get(skb
));
1458 desc
->opts2
|= cpu_to_le32(opts2
);
1462 static inline void rtl_rx_vlan_tag(struct rx_desc
*desc
, struct sk_buff
*skb
)
1464 u32 opts2
= le32_to_cpu(desc
->opts2
);
1466 if (opts2
& RX_VLAN_TAG
)
1467 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
),
1468 swab16(opts2
& 0xffff));
1471 static int r8152_tx_csum(struct r8152
*tp
, struct tx_desc
*desc
,
1472 struct sk_buff
*skb
, u32 len
, u32 transport_offset
)
1474 u32 mss
= skb_shinfo(skb
)->gso_size
;
1475 u32 opts1
, opts2
= 0;
1476 int ret
= TX_CSUM_SUCCESS
;
1478 WARN_ON_ONCE(len
> TX_LEN_MAX
);
1480 opts1
= len
| TX_FS
| TX_LS
;
1483 if (transport_offset
> GTTCPHO_MAX
) {
1484 netif_warn(tp
, tx_err
, tp
->netdev
,
1485 "Invalid transport offset 0x%x for TSO\n",
1491 switch (vlan_get_protocol(skb
)) {
1492 case htons(ETH_P_IP
):
1496 case htons(ETH_P_IPV6
):
1497 if (msdn_giant_send_check(skb
)) {
1509 opts1
|= transport_offset
<< GTTCPHO_SHIFT
;
1510 opts2
|= min(mss
, MSS_MAX
) << MSS_SHIFT
;
1511 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1514 if (transport_offset
> TCPHO_MAX
) {
1515 netif_warn(tp
, tx_err
, tp
->netdev
,
1516 "Invalid transport offset 0x%x\n",
1522 switch (vlan_get_protocol(skb
)) {
1523 case htons(ETH_P_IP
):
1525 ip_protocol
= ip_hdr(skb
)->protocol
;
1528 case htons(ETH_P_IPV6
):
1530 ip_protocol
= ipv6_hdr(skb
)->nexthdr
;
1534 ip_protocol
= IPPROTO_RAW
;
1538 if (ip_protocol
== IPPROTO_TCP
)
1540 else if (ip_protocol
== IPPROTO_UDP
)
1545 opts2
|= transport_offset
<< TCPHO_SHIFT
;
1548 desc
->opts2
= cpu_to_le32(opts2
);
1549 desc
->opts1
= cpu_to_le32(opts1
);
1555 static int r8152_tx_agg_fill(struct r8152
*tp
, struct tx_agg
*agg
)
1557 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1561 __skb_queue_head_init(&skb_head
);
1562 spin_lock(&tx_queue
->lock
);
1563 skb_queue_splice_init(tx_queue
, &skb_head
);
1564 spin_unlock(&tx_queue
->lock
);
1566 tx_data
= agg
->head
;
1569 remain
= agg_buf_sz
;
1571 while (remain
>= ETH_ZLEN
+ sizeof(struct tx_desc
)) {
1572 struct tx_desc
*tx_desc
;
1573 struct sk_buff
*skb
;
1577 skb
= __skb_dequeue(&skb_head
);
1581 len
= skb
->len
+ sizeof(*tx_desc
);
1584 __skb_queue_head(&skb_head
, skb
);
1588 tx_data
= tx_agg_align(tx_data
);
1589 tx_desc
= (struct tx_desc
*)tx_data
;
1591 offset
= (u32
)skb_transport_offset(skb
);
1593 if (r8152_tx_csum(tp
, tx_desc
, skb
, skb
->len
, offset
)) {
1594 r8152_csum_workaround(tp
, skb
, &skb_head
);
1598 rtl_tx_vlan_tag(tx_desc
, skb
);
1600 tx_data
+= sizeof(*tx_desc
);
1603 if (skb_copy_bits(skb
, 0, tx_data
, len
) < 0) {
1604 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1606 stats
->tx_dropped
++;
1607 dev_kfree_skb_any(skb
);
1608 tx_data
-= sizeof(*tx_desc
);
1613 agg
->skb_len
+= len
;
1616 dev_kfree_skb_any(skb
);
1618 remain
= agg_buf_sz
- (int)(tx_agg_align(tx_data
) - agg
->head
);
1621 if (!skb_queue_empty(&skb_head
)) {
1622 spin_lock(&tx_queue
->lock
);
1623 skb_queue_splice(&skb_head
, tx_queue
);
1624 spin_unlock(&tx_queue
->lock
);
1627 netif_tx_lock(tp
->netdev
);
1629 if (netif_queue_stopped(tp
->netdev
) &&
1630 skb_queue_len(&tp
->tx_queue
) < tp
->tx_qlen
)
1631 netif_wake_queue(tp
->netdev
);
1633 netif_tx_unlock(tp
->netdev
);
1635 ret
= usb_autopm_get_interface_async(tp
->intf
);
1639 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_sndbulkpipe(tp
->udev
, 2),
1640 agg
->head
, (int)(tx_data
- (u8
*)agg
->head
),
1641 (usb_complete_t
)write_bulk_callback
, agg
);
1643 ret
= usb_submit_urb(agg
->urb
, GFP_ATOMIC
);
1645 usb_autopm_put_interface_async(tp
->intf
);
1651 static u8
r8152_rx_csum(struct r8152
*tp
, struct rx_desc
*rx_desc
)
1653 u8 checksum
= CHECKSUM_NONE
;
1656 if (tp
->version
== RTL_VER_01
)
1659 opts2
= le32_to_cpu(rx_desc
->opts2
);
1660 opts3
= le32_to_cpu(rx_desc
->opts3
);
1662 if (opts2
& RD_IPV4_CS
) {
1664 checksum
= CHECKSUM_NONE
;
1665 else if ((opts2
& RD_UDP_CS
) && (opts3
& UDPF
))
1666 checksum
= CHECKSUM_NONE
;
1667 else if ((opts2
& RD_TCP_CS
) && (opts3
& TCPF
))
1668 checksum
= CHECKSUM_NONE
;
1670 checksum
= CHECKSUM_UNNECESSARY
;
1671 } else if (RD_IPV6_CS
) {
1672 if ((opts2
& RD_UDP_CS
) && !(opts3
& UDPF
))
1673 checksum
= CHECKSUM_UNNECESSARY
;
1674 else if ((opts2
& RD_TCP_CS
) && !(opts3
& TCPF
))
1675 checksum
= CHECKSUM_UNNECESSARY
;
1682 static int rx_bottom(struct r8152
*tp
, int budget
)
1684 unsigned long flags
;
1685 struct list_head
*cursor
, *next
, rx_queue
;
1686 int ret
= 0, work_done
= 0;
1688 if (!skb_queue_empty(&tp
->rx_queue
)) {
1689 while (work_done
< budget
) {
1690 struct sk_buff
*skb
= __skb_dequeue(&tp
->rx_queue
);
1691 struct net_device
*netdev
= tp
->netdev
;
1692 struct net_device_stats
*stats
= &netdev
->stats
;
1693 unsigned int pkt_len
;
1699 napi_gro_receive(&tp
->napi
, skb
);
1701 stats
->rx_packets
++;
1702 stats
->rx_bytes
+= pkt_len
;
1706 if (list_empty(&tp
->rx_done
))
1709 INIT_LIST_HEAD(&rx_queue
);
1710 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1711 list_splice_init(&tp
->rx_done
, &rx_queue
);
1712 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1714 list_for_each_safe(cursor
, next
, &rx_queue
) {
1715 struct rx_desc
*rx_desc
;
1721 list_del_init(cursor
);
1723 agg
= list_entry(cursor
, struct rx_agg
, list
);
1725 if (urb
->actual_length
< ETH_ZLEN
)
1728 rx_desc
= agg
->head
;
1729 rx_data
= agg
->head
;
1730 len_used
+= sizeof(struct rx_desc
);
1732 while (urb
->actual_length
> len_used
) {
1733 struct net_device
*netdev
= tp
->netdev
;
1734 struct net_device_stats
*stats
= &netdev
->stats
;
1735 unsigned int pkt_len
;
1736 struct sk_buff
*skb
;
1738 pkt_len
= le32_to_cpu(rx_desc
->opts1
) & RX_LEN_MASK
;
1739 if (pkt_len
< ETH_ZLEN
)
1742 len_used
+= pkt_len
;
1743 if (urb
->actual_length
< len_used
)
1746 pkt_len
-= CRC_SIZE
;
1747 rx_data
+= sizeof(struct rx_desc
);
1749 skb
= napi_alloc_skb(&tp
->napi
, pkt_len
);
1751 stats
->rx_dropped
++;
1755 skb
->ip_summed
= r8152_rx_csum(tp
, rx_desc
);
1756 memcpy(skb
->data
, rx_data
, pkt_len
);
1757 skb_put(skb
, pkt_len
);
1758 skb
->protocol
= eth_type_trans(skb
, netdev
);
1759 rtl_rx_vlan_tag(rx_desc
, skb
);
1760 if (work_done
< budget
) {
1761 napi_gro_receive(&tp
->napi
, skb
);
1763 stats
->rx_packets
++;
1764 stats
->rx_bytes
+= pkt_len
;
1766 __skb_queue_tail(&tp
->rx_queue
, skb
);
1770 rx_data
= rx_agg_align(rx_data
+ pkt_len
+ CRC_SIZE
);
1771 rx_desc
= (struct rx_desc
*)rx_data
;
1772 len_used
= (int)(rx_data
- (u8
*)agg
->head
);
1773 len_used
+= sizeof(struct rx_desc
);
1778 ret
= r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1780 urb
->actual_length
= 0;
1781 list_add_tail(&agg
->list
, next
);
1785 if (!list_empty(&rx_queue
)) {
1786 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1787 list_splice_tail(&rx_queue
, &tp
->rx_done
);
1788 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1795 static void tx_bottom(struct r8152
*tp
)
1802 if (skb_queue_empty(&tp
->tx_queue
))
1805 agg
= r8152_get_tx_agg(tp
);
1809 res
= r8152_tx_agg_fill(tp
, agg
);
1811 struct net_device
*netdev
= tp
->netdev
;
1813 if (res
== -ENODEV
) {
1814 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1815 netif_device_detach(netdev
);
1817 struct net_device_stats
*stats
= &netdev
->stats
;
1818 unsigned long flags
;
1820 netif_warn(tp
, tx_err
, netdev
,
1821 "failed tx_urb %d\n", res
);
1822 stats
->tx_dropped
+= agg
->skb_num
;
1824 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1825 list_add_tail(&agg
->list
, &tp
->tx_free
);
1826 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1832 static void bottom_half(struct r8152
*tp
)
1834 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1837 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1840 /* When link down, the driver would cancel all bulks. */
1841 /* This avoid the re-submitting bulk */
1842 if (!netif_carrier_ok(tp
->netdev
))
1845 clear_bit(SCHEDULE_NAPI
, &tp
->flags
);
1850 static int r8152_poll(struct napi_struct
*napi
, int budget
)
1852 struct r8152
*tp
= container_of(napi
, struct r8152
, napi
);
1855 work_done
= rx_bottom(tp
, budget
);
1858 if (work_done
< budget
) {
1859 napi_complete(napi
);
1860 if (!list_empty(&tp
->rx_done
))
1861 napi_schedule(napi
);
1868 int r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
)
1872 /* The rx would be stopped, so skip submitting */
1873 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) ||
1874 !test_bit(WORK_ENABLE
, &tp
->flags
) || !netif_carrier_ok(tp
->netdev
))
1877 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_rcvbulkpipe(tp
->udev
, 1),
1878 agg
->head
, agg_buf_sz
,
1879 (usb_complete_t
)read_bulk_callback
, agg
);
1881 ret
= usb_submit_urb(agg
->urb
, mem_flags
);
1882 if (ret
== -ENODEV
) {
1883 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1884 netif_device_detach(tp
->netdev
);
1886 struct urb
*urb
= agg
->urb
;
1887 unsigned long flags
;
1889 urb
->actual_length
= 0;
1890 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1891 list_add_tail(&agg
->list
, &tp
->rx_done
);
1892 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1894 netif_err(tp
, rx_err
, tp
->netdev
,
1895 "Couldn't submit rx[%p], ret = %d\n", agg
, ret
);
1897 napi_schedule(&tp
->napi
);
1903 static void rtl_drop_queued_tx(struct r8152
*tp
)
1905 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1906 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1907 struct sk_buff
*skb
;
1909 if (skb_queue_empty(tx_queue
))
1912 __skb_queue_head_init(&skb_head
);
1913 spin_lock_bh(&tx_queue
->lock
);
1914 skb_queue_splice_init(tx_queue
, &skb_head
);
1915 spin_unlock_bh(&tx_queue
->lock
);
1917 while ((skb
= __skb_dequeue(&skb_head
))) {
1919 stats
->tx_dropped
++;
1923 static void rtl8152_tx_timeout(struct net_device
*netdev
)
1925 struct r8152
*tp
= netdev_priv(netdev
);
1927 netif_warn(tp
, tx_err
, netdev
, "Tx timeout\n");
1929 usb_queue_reset_device(tp
->intf
);
1932 static void rtl8152_set_rx_mode(struct net_device
*netdev
)
1934 struct r8152
*tp
= netdev_priv(netdev
);
1936 if (netif_carrier_ok(netdev
)) {
1937 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
1938 schedule_delayed_work(&tp
->schedule
, 0);
1942 static void _rtl8152_set_rx_mode(struct net_device
*netdev
)
1944 struct r8152
*tp
= netdev_priv(netdev
);
1945 u32 mc_filter
[2]; /* Multicast hash filter */
1949 netif_stop_queue(netdev
);
1950 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
1951 ocp_data
&= ~RCR_ACPT_ALL
;
1952 ocp_data
|= RCR_AB
| RCR_APM
;
1954 if (netdev
->flags
& IFF_PROMISC
) {
1955 /* Unconditionally log net taps. */
1956 netif_notice(tp
, link
, netdev
, "Promiscuous mode enabled\n");
1957 ocp_data
|= RCR_AM
| RCR_AAP
;
1958 mc_filter
[1] = 0xffffffff;
1959 mc_filter
[0] = 0xffffffff;
1960 } else if ((netdev_mc_count(netdev
) > multicast_filter_limit
) ||
1961 (netdev
->flags
& IFF_ALLMULTI
)) {
1962 /* Too many to filter perfectly -- accept all multicasts. */
1964 mc_filter
[1] = 0xffffffff;
1965 mc_filter
[0] = 0xffffffff;
1967 struct netdev_hw_addr
*ha
;
1971 netdev_for_each_mc_addr(ha
, netdev
) {
1972 int bit_nr
= ether_crc(ETH_ALEN
, ha
->addr
) >> 26;
1974 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
1979 tmp
[0] = __cpu_to_le32(swab32(mc_filter
[1]));
1980 tmp
[1] = __cpu_to_le32(swab32(mc_filter
[0]));
1982 pla_ocp_write(tp
, PLA_MAR
, BYTE_EN_DWORD
, sizeof(tmp
), tmp
);
1983 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
1984 netif_wake_queue(netdev
);
1987 static netdev_features_t
1988 rtl8152_features_check(struct sk_buff
*skb
, struct net_device
*dev
,
1989 netdev_features_t features
)
1991 u32 mss
= skb_shinfo(skb
)->gso_size
;
1992 int max_offset
= mss
? GTTCPHO_MAX
: TCPHO_MAX
;
1993 int offset
= skb_transport_offset(skb
);
1995 if ((mss
|| skb
->ip_summed
== CHECKSUM_PARTIAL
) && offset
> max_offset
)
1996 features
&= ~(NETIF_F_CSUM_MASK
| NETIF_F_GSO_MASK
);
1997 else if ((skb
->len
+ sizeof(struct tx_desc
)) > agg_buf_sz
)
1998 features
&= ~NETIF_F_GSO_MASK
;
2003 static netdev_tx_t
rtl8152_start_xmit(struct sk_buff
*skb
,
2004 struct net_device
*netdev
)
2006 struct r8152
*tp
= netdev_priv(netdev
);
2008 skb_tx_timestamp(skb
);
2010 skb_queue_tail(&tp
->tx_queue
, skb
);
2012 if (!list_empty(&tp
->tx_free
)) {
2013 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
2014 set_bit(SCHEDULE_NAPI
, &tp
->flags
);
2015 schedule_delayed_work(&tp
->schedule
, 0);
2017 usb_mark_last_busy(tp
->udev
);
2018 napi_schedule(&tp
->napi
);
2020 } else if (skb_queue_len(&tp
->tx_queue
) > tp
->tx_qlen
) {
2021 netif_stop_queue(netdev
);
2024 return NETDEV_TX_OK
;
2027 static void r8152b_reset_packet_filter(struct r8152
*tp
)
2031 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_FMC
);
2032 ocp_data
&= ~FMC_FCR_MCU_EN
;
2033 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
2034 ocp_data
|= FMC_FCR_MCU_EN
;
2035 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
2038 static void rtl8152_nic_reset(struct r8152
*tp
)
2042 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, CR_RST
);
2044 for (i
= 0; i
< 1000; i
++) {
2045 if (!(ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
) & CR_RST
))
2047 usleep_range(100, 400);
2051 static void set_tx_qlen(struct r8152
*tp
)
2053 struct net_device
*netdev
= tp
->netdev
;
2055 tp
->tx_qlen
= agg_buf_sz
/ (netdev
->mtu
+ VLAN_ETH_HLEN
+ VLAN_HLEN
+
2056 sizeof(struct tx_desc
));
2059 static inline u8
rtl8152_get_speed(struct r8152
*tp
)
2061 return ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_PHYSTATUS
);
2064 static void rtl_set_eee_plus(struct r8152
*tp
)
2069 speed
= rtl8152_get_speed(tp
);
2070 if (speed
& _10bps
) {
2071 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2072 ocp_data
|= EEEP_CR_EEEP_TX
;
2073 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2075 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2076 ocp_data
&= ~EEEP_CR_EEEP_TX
;
2077 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2081 static void rxdy_gated_en(struct r8152
*tp
, bool enable
)
2085 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
);
2087 ocp_data
|= RXDY_GATED_EN
;
2089 ocp_data
&= ~RXDY_GATED_EN
;
2090 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
, ocp_data
);
2093 static int rtl_start_rx(struct r8152
*tp
)
2097 INIT_LIST_HEAD(&tp
->rx_done
);
2098 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
2099 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
2100 ret
= r8152_submit_rx(tp
, &tp
->rx_info
[i
], GFP_KERNEL
);
2105 if (ret
&& ++i
< RTL8152_MAX_RX
) {
2106 struct list_head rx_queue
;
2107 unsigned long flags
;
2109 INIT_LIST_HEAD(&rx_queue
);
2112 struct rx_agg
*agg
= &tp
->rx_info
[i
++];
2113 struct urb
*urb
= agg
->urb
;
2115 urb
->actual_length
= 0;
2116 list_add_tail(&agg
->list
, &rx_queue
);
2117 } while (i
< RTL8152_MAX_RX
);
2119 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2120 list_splice_tail(&rx_queue
, &tp
->rx_done
);
2121 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2127 static int rtl_stop_rx(struct r8152
*tp
)
2131 for (i
= 0; i
< RTL8152_MAX_RX
; i
++)
2132 usb_kill_urb(tp
->rx_info
[i
].urb
);
2134 while (!skb_queue_empty(&tp
->rx_queue
))
2135 dev_kfree_skb(__skb_dequeue(&tp
->rx_queue
));
2140 static int rtl_enable(struct r8152
*tp
)
2144 r8152b_reset_packet_filter(tp
);
2146 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
);
2147 ocp_data
|= CR_RE
| CR_TE
;
2148 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, ocp_data
);
2150 rxdy_gated_en(tp
, false);
2155 static int rtl8152_enable(struct r8152
*tp
)
2157 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2161 rtl_set_eee_plus(tp
);
2163 return rtl_enable(tp
);
2166 static void r8153_set_rx_early_timeout(struct r8152
*tp
)
2168 u32 ocp_data
= tp
->coalesce
/ 8;
2170 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_TIMEOUT
, ocp_data
);
2173 static void r8153_set_rx_early_size(struct r8152
*tp
)
2175 u32 mtu
= tp
->netdev
->mtu
;
2176 u32 ocp_data
= (agg_buf_sz
- mtu
- VLAN_ETH_HLEN
- VLAN_HLEN
) / 4;
2178 ocp_write_word(tp
, MCU_TYPE_USB
, USB_RX_EARLY_SIZE
, ocp_data
);
2181 static int rtl8153_enable(struct r8152
*tp
)
2183 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2186 usb_disable_lpm(tp
->udev
);
2188 rtl_set_eee_plus(tp
);
2189 r8153_set_rx_early_timeout(tp
);
2190 r8153_set_rx_early_size(tp
);
2192 return rtl_enable(tp
);
2195 static void rtl_disable(struct r8152
*tp
)
2200 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2201 rtl_drop_queued_tx(tp
);
2205 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2206 ocp_data
&= ~RCR_ACPT_ALL
;
2207 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2209 rtl_drop_queued_tx(tp
);
2211 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
2212 usb_kill_urb(tp
->tx_info
[i
].urb
);
2214 rxdy_gated_en(tp
, true);
2216 for (i
= 0; i
< 1000; i
++) {
2217 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2218 if ((ocp_data
& FIFO_EMPTY
) == FIFO_EMPTY
)
2220 usleep_range(1000, 2000);
2223 for (i
= 0; i
< 1000; i
++) {
2224 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
) & TCR0_TX_EMPTY
)
2226 usleep_range(1000, 2000);
2231 rtl8152_nic_reset(tp
);
2234 static void r8152_power_cut_en(struct r8152
*tp
, bool enable
)
2238 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
);
2240 ocp_data
|= POWER_CUT
;
2242 ocp_data
&= ~POWER_CUT
;
2243 ocp_write_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
, ocp_data
);
2245 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
);
2246 ocp_data
&= ~RESUME_INDICATE
;
2247 ocp_write_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
, ocp_data
);
2250 static void rtl_rx_vlan_en(struct r8152
*tp
, bool enable
)
2254 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
2256 ocp_data
|= CPCR_RX_VLAN
;
2258 ocp_data
&= ~CPCR_RX_VLAN
;
2259 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
2262 static int rtl8152_set_features(struct net_device
*dev
,
2263 netdev_features_t features
)
2265 netdev_features_t changed
= features
^ dev
->features
;
2266 struct r8152
*tp
= netdev_priv(dev
);
2269 ret
= usb_autopm_get_interface(tp
->intf
);
2273 mutex_lock(&tp
->control
);
2275 if (changed
& NETIF_F_HW_VLAN_CTAG_RX
) {
2276 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
2277 rtl_rx_vlan_en(tp
, true);
2279 rtl_rx_vlan_en(tp
, false);
2282 mutex_unlock(&tp
->control
);
2284 usb_autopm_put_interface(tp
->intf
);
2290 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2292 static u32
__rtl_get_wol(struct r8152
*tp
)
2297 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2298 if (!(ocp_data
& LAN_WAKE_EN
))
2301 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2302 if (ocp_data
& LINK_ON_WAKE_EN
)
2303 wolopts
|= WAKE_PHY
;
2305 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2306 if (ocp_data
& UWF_EN
)
2307 wolopts
|= WAKE_UCAST
;
2308 if (ocp_data
& BWF_EN
)
2309 wolopts
|= WAKE_BCAST
;
2310 if (ocp_data
& MWF_EN
)
2311 wolopts
|= WAKE_MCAST
;
2313 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2314 if (ocp_data
& MAGIC_EN
)
2315 wolopts
|= WAKE_MAGIC
;
2320 static void __rtl_set_wol(struct r8152
*tp
, u32 wolopts
)
2324 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2326 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2327 ocp_data
&= ~LINK_ON_WAKE_EN
;
2328 if (wolopts
& WAKE_PHY
)
2329 ocp_data
|= LINK_ON_WAKE_EN
;
2330 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2332 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2333 ocp_data
&= ~(UWF_EN
| BWF_EN
| MWF_EN
| LAN_WAKE_EN
);
2334 if (wolopts
& WAKE_UCAST
)
2336 if (wolopts
& WAKE_BCAST
)
2338 if (wolopts
& WAKE_MCAST
)
2340 if (wolopts
& WAKE_ANY
)
2341 ocp_data
|= LAN_WAKE_EN
;
2342 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
, ocp_data
);
2344 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2346 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2347 ocp_data
&= ~MAGIC_EN
;
2348 if (wolopts
& WAKE_MAGIC
)
2349 ocp_data
|= MAGIC_EN
;
2350 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
, ocp_data
);
2352 if (wolopts
& WAKE_ANY
)
2353 device_set_wakeup_enable(&tp
->udev
->dev
, true);
2355 device_set_wakeup_enable(&tp
->udev
->dev
, false);
2358 static void r8153_u1u2en(struct r8152
*tp
, bool enable
)
2363 memset(u1u2
, 0xff, sizeof(u1u2
));
2365 memset(u1u2
, 0x00, sizeof(u1u2
));
2367 usb_ocp_write(tp
, USB_TOLERANCE
, BYTE_EN_SIX_BYTES
, sizeof(u1u2
), u1u2
);
2370 static void r8153_u2p3en(struct r8152
*tp
, bool enable
)
2374 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
);
2375 if (enable
&& tp
->version
!= RTL_VER_03
&& tp
->version
!= RTL_VER_04
)
2376 ocp_data
|= U2P3_ENABLE
;
2378 ocp_data
&= ~U2P3_ENABLE
;
2379 ocp_write_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
, ocp_data
);
2382 static void r8153_power_cut_en(struct r8152
*tp
, bool enable
)
2386 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
2388 ocp_data
|= PWR_EN
| PHASE2_EN
;
2390 ocp_data
&= ~(PWR_EN
| PHASE2_EN
);
2391 ocp_write_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
2393 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
2394 ocp_data
&= ~PCUT_STATUS
;
2395 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
2398 static bool rtl_can_wakeup(struct r8152
*tp
)
2400 struct usb_device
*udev
= tp
->udev
;
2402 return (udev
->actconfig
->desc
.bmAttributes
& USB_CONFIG_ATT_WAKEUP
);
2405 static void rtl_runtime_suspend_enable(struct r8152
*tp
, bool enable
)
2410 r8153_u1u2en(tp
, false);
2411 r8153_u2p3en(tp
, false);
2413 __rtl_set_wol(tp
, WAKE_ANY
);
2415 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2417 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2418 ocp_data
|= LINK_OFF_WAKE_EN
;
2419 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2421 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2423 __rtl_set_wol(tp
, tp
->saved_wolopts
);
2424 r8153_u2p3en(tp
, true);
2425 r8153_u1u2en(tp
, true);
2429 static void rtl_phy_reset(struct r8152
*tp
)
2434 data
= r8152_mdio_read(tp
, MII_BMCR
);
2436 /* don't reset again before the previous one complete */
2437 if (data
& BMCR_RESET
)
2441 r8152_mdio_write(tp
, MII_BMCR
, data
);
2443 for (i
= 0; i
< 50; i
++) {
2445 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
2450 static void r8153_teredo_off(struct r8152
*tp
)
2454 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2455 ocp_data
&= ~(TEREDO_SEL
| TEREDO_RS_EVENT_MASK
| OOB_TEREDO_EN
);
2456 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2458 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_WDT6_CTRL
, WDT6_SET_MODE
);
2459 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_REALWOW_TIMER
, 0);
2460 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TEREDO_TIMER
, 0);
2463 static void r8152_aldps_en(struct r8152
*tp
, bool enable
)
2466 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPWRSAVE
| ENPDNPS
|
2467 LINKENA
| DIS_SDSAVE
);
2469 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPDNPS
| LINKENA
|
2475 static void rtl8152_disable(struct r8152
*tp
)
2477 r8152_aldps_en(tp
, false);
2479 r8152_aldps_en(tp
, true);
2482 static void r8152b_hw_phy_cfg(struct r8152
*tp
)
2486 data
= r8152_mdio_read(tp
, MII_BMCR
);
2487 if (data
& BMCR_PDOWN
) {
2488 data
&= ~BMCR_PDOWN
;
2489 r8152_mdio_write(tp
, MII_BMCR
, data
);
2492 set_bit(PHY_RESET
, &tp
->flags
);
2495 static void r8152b_exit_oob(struct r8152
*tp
)
2500 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2501 ocp_data
&= ~RCR_ACPT_ALL
;
2502 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2504 rxdy_gated_en(tp
, true);
2505 r8153_teredo_off(tp
);
2506 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2507 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, 0x00);
2509 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2510 ocp_data
&= ~NOW_IS_OOB
;
2511 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2513 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2514 ocp_data
&= ~MCU_BORW_EN
;
2515 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2517 for (i
= 0; i
< 1000; i
++) {
2518 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2519 if (ocp_data
& LINK_LIST_READY
)
2521 usleep_range(1000, 2000);
2524 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2525 ocp_data
|= RE_INIT_LL
;
2526 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2528 for (i
= 0; i
< 1000; i
++) {
2529 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2530 if (ocp_data
& LINK_LIST_READY
)
2532 usleep_range(1000, 2000);
2535 rtl8152_nic_reset(tp
);
2537 /* rx share fifo credit full threshold */
2538 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2540 if (tp
->udev
->speed
== USB_SPEED_FULL
||
2541 tp
->udev
->speed
== USB_SPEED_LOW
) {
2542 /* rx share fifo credit near full threshold */
2543 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2545 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2548 /* rx share fifo credit near full threshold */
2549 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2551 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2555 /* TX share fifo free credit full threshold */
2556 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL
);
2558 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_TX_AGG
, TX_AGG_MAX_THRESHOLD
);
2559 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_HIGH
);
2560 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_TX_DMA
,
2561 TEST_MODE_DISABLE
| TX_SIZE_ADJUST1
);
2563 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
2565 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2567 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2568 ocp_data
|= TCR0_AUTO_FIFO
;
2569 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2572 static void r8152b_enter_oob(struct r8152
*tp
)
2577 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2578 ocp_data
&= ~NOW_IS_OOB
;
2579 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2581 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_OOB
);
2582 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_OOB
);
2583 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_OOB
);
2587 for (i
= 0; i
< 1000; i
++) {
2588 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2589 if (ocp_data
& LINK_LIST_READY
)
2591 usleep_range(1000, 2000);
2594 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2595 ocp_data
|= RE_INIT_LL
;
2596 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2598 for (i
= 0; i
< 1000; i
++) {
2599 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2600 if (ocp_data
& LINK_LIST_READY
)
2602 usleep_range(1000, 2000);
2605 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2607 rtl_rx_vlan_en(tp
, true);
2609 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2610 ocp_data
|= ALDPS_PROXY_MODE
;
2611 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2613 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2614 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2615 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2617 rxdy_gated_en(tp
, false);
2619 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2620 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2621 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2624 static void r8153_hw_phy_cfg(struct r8152
*tp
)
2629 if (tp
->version
== RTL_VER_03
|| tp
->version
== RTL_VER_04
||
2630 tp
->version
== RTL_VER_05
)
2631 ocp_reg_write(tp
, OCP_ADC_CFG
, CKADSEL_L
| ADC_EN
| EN_EMI_L
);
2633 data
= r8152_mdio_read(tp
, MII_BMCR
);
2634 if (data
& BMCR_PDOWN
) {
2635 data
&= ~BMCR_PDOWN
;
2636 r8152_mdio_write(tp
, MII_BMCR
, data
);
2639 if (tp
->version
== RTL_VER_03
) {
2640 data
= ocp_reg_read(tp
, OCP_EEE_CFG
);
2641 data
&= ~CTAP_SHORT_EN
;
2642 ocp_reg_write(tp
, OCP_EEE_CFG
, data
);
2645 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2646 data
|= EEE_CLKDIV_EN
;
2647 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2649 data
= ocp_reg_read(tp
, OCP_DOWN_SPEED
);
2650 data
|= EN_10M_BGOFF
;
2651 ocp_reg_write(tp
, OCP_DOWN_SPEED
, data
);
2652 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2653 data
|= EN_10M_PLLOFF
;
2654 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2655 sram_write(tp
, SRAM_IMPEDANCE
, 0x0b13);
2657 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
2658 ocp_data
|= PFM_PWM_SWITCH
;
2659 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
2661 /* Enable LPF corner auto tune */
2662 sram_write(tp
, SRAM_LPF_CFG
, 0xf70f);
2664 /* Adjust 10M Amplitude */
2665 sram_write(tp
, SRAM_10M_AMP1
, 0x00af);
2666 sram_write(tp
, SRAM_10M_AMP2
, 0x0208);
2668 set_bit(PHY_RESET
, &tp
->flags
);
2671 static void r8153_first_init(struct r8152
*tp
)
2676 rxdy_gated_en(tp
, true);
2677 r8153_teredo_off(tp
);
2679 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2680 ocp_data
&= ~RCR_ACPT_ALL
;
2681 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2683 rtl8152_nic_reset(tp
);
2685 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2686 ocp_data
&= ~NOW_IS_OOB
;
2687 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2689 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2690 ocp_data
&= ~MCU_BORW_EN
;
2691 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2693 for (i
= 0; i
< 1000; i
++) {
2694 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2695 if (ocp_data
& LINK_LIST_READY
)
2697 usleep_range(1000, 2000);
2700 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2701 ocp_data
|= RE_INIT_LL
;
2702 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2704 for (i
= 0; i
< 1000; i
++) {
2705 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2706 if (ocp_data
& LINK_LIST_READY
)
2708 usleep_range(1000, 2000);
2711 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
2713 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8153_RMS
);
2714 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_MTPS
, MTPS_JUMBO
);
2716 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2717 ocp_data
|= TCR0_AUTO_FIFO
;
2718 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2720 rtl8152_nic_reset(tp
);
2722 /* rx share fifo credit full threshold */
2723 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2724 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_NORMAL
);
2725 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_NORMAL
);
2726 /* TX share fifo free credit full threshold */
2727 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL2
);
2729 /* rx aggregation */
2730 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
2731 ocp_data
&= ~(RX_AGG_DISABLE
| RX_ZERO_EN
);
2732 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
2735 static void r8153_enter_oob(struct r8152
*tp
)
2740 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2741 ocp_data
&= ~NOW_IS_OOB
;
2742 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2746 for (i
= 0; i
< 1000; i
++) {
2747 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2748 if (ocp_data
& LINK_LIST_READY
)
2750 usleep_range(1000, 2000);
2753 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2754 ocp_data
|= RE_INIT_LL
;
2755 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2757 for (i
= 0; i
< 1000; i
++) {
2758 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2759 if (ocp_data
& LINK_LIST_READY
)
2761 usleep_range(1000, 2000);
2764 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8153_RMS
);
2766 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2767 ocp_data
&= ~TEREDO_WAKE_MASK
;
2768 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2770 rtl_rx_vlan_en(tp
, true);
2772 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2773 ocp_data
|= ALDPS_PROXY_MODE
;
2774 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2776 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2777 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2778 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2780 rxdy_gated_en(tp
, false);
2782 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2783 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2784 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2787 static void r8153_aldps_en(struct r8152
*tp
, bool enable
)
2791 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2794 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2797 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2802 static void rtl8153_disable(struct r8152
*tp
)
2804 r8153_aldps_en(tp
, false);
2806 r8153_aldps_en(tp
, true);
2807 usb_enable_lpm(tp
->udev
);
2810 static int rtl8152_set_speed(struct r8152
*tp
, u8 autoneg
, u16 speed
, u8 duplex
)
2812 u16 bmcr
, anar
, gbcr
;
2815 cancel_delayed_work_sync(&tp
->schedule
);
2816 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
2817 anar
&= ~(ADVERTISE_10HALF
| ADVERTISE_10FULL
|
2818 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
2819 if (tp
->mii
.supports_gmii
) {
2820 gbcr
= r8152_mdio_read(tp
, MII_CTRL1000
);
2821 gbcr
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
2826 if (autoneg
== AUTONEG_DISABLE
) {
2827 if (speed
== SPEED_10
) {
2829 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2830 } else if (speed
== SPEED_100
) {
2831 bmcr
= BMCR_SPEED100
;
2832 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2833 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2834 bmcr
= BMCR_SPEED1000
;
2835 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2841 if (duplex
== DUPLEX_FULL
)
2842 bmcr
|= BMCR_FULLDPLX
;
2844 if (speed
== SPEED_10
) {
2845 if (duplex
== DUPLEX_FULL
)
2846 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2848 anar
|= ADVERTISE_10HALF
;
2849 } else if (speed
== SPEED_100
) {
2850 if (duplex
== DUPLEX_FULL
) {
2851 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2852 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2854 anar
|= ADVERTISE_10HALF
;
2855 anar
|= ADVERTISE_100HALF
;
2857 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2858 if (duplex
== DUPLEX_FULL
) {
2859 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2860 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2861 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2863 anar
|= ADVERTISE_10HALF
;
2864 anar
|= ADVERTISE_100HALF
;
2865 gbcr
|= ADVERTISE_1000HALF
;
2872 bmcr
= BMCR_ANENABLE
| BMCR_ANRESTART
;
2875 if (test_bit(PHY_RESET
, &tp
->flags
))
2878 if (tp
->mii
.supports_gmii
)
2879 r8152_mdio_write(tp
, MII_CTRL1000
, gbcr
);
2881 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
2882 r8152_mdio_write(tp
, MII_BMCR
, bmcr
);
2884 if (test_and_clear_bit(PHY_RESET
, &tp
->flags
)) {
2887 for (i
= 0; i
< 50; i
++) {
2889 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
2898 static void rtl8152_up(struct r8152
*tp
)
2900 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2903 r8152_aldps_en(tp
, false);
2904 r8152b_exit_oob(tp
);
2905 r8152_aldps_en(tp
, true);
2908 static void rtl8152_down(struct r8152
*tp
)
2910 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2911 rtl_drop_queued_tx(tp
);
2915 r8152_power_cut_en(tp
, false);
2916 r8152_aldps_en(tp
, false);
2917 r8152b_enter_oob(tp
);
2918 r8152_aldps_en(tp
, true);
2921 static void rtl8153_up(struct r8152
*tp
)
2923 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2926 r8153_u1u2en(tp
, false);
2927 r8153_aldps_en(tp
, false);
2928 r8153_first_init(tp
);
2929 r8153_aldps_en(tp
, true);
2930 r8153_u2p3en(tp
, true);
2931 r8153_u1u2en(tp
, true);
2932 usb_enable_lpm(tp
->udev
);
2935 static void rtl8153_down(struct r8152
*tp
)
2937 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2938 rtl_drop_queued_tx(tp
);
2942 r8153_u1u2en(tp
, false);
2943 r8153_u2p3en(tp
, false);
2944 r8153_power_cut_en(tp
, false);
2945 r8153_aldps_en(tp
, false);
2946 r8153_enter_oob(tp
);
2947 r8153_aldps_en(tp
, true);
2950 static bool rtl8152_in_nway(struct r8152
*tp
)
2954 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, 0x2000);
2955 tp
->ocp_base
= 0x2000;
2956 ocp_write_byte(tp
, MCU_TYPE_PLA
, 0xb014, 0x4c); /* phy state */
2957 nway_state
= ocp_read_word(tp
, MCU_TYPE_PLA
, 0xb01a);
2959 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
2960 if (nway_state
& 0xc000)
2966 static bool rtl8153_in_nway(struct r8152
*tp
)
2968 u16 phy_state
= ocp_reg_read(tp
, OCP_PHY_STATE
) & 0xff;
2970 if (phy_state
== TXDIS_STATE
|| phy_state
== ABD_STATE
)
2976 static void set_carrier(struct r8152
*tp
)
2978 struct net_device
*netdev
= tp
->netdev
;
2981 speed
= rtl8152_get_speed(tp
);
2983 if (speed
& LINK_STATUS
) {
2984 if (!netif_carrier_ok(netdev
)) {
2985 tp
->rtl_ops
.enable(tp
);
2986 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
2987 napi_disable(&tp
->napi
);
2988 netif_carrier_on(netdev
);
2990 napi_enable(&tp
->napi
);
2993 if (netif_carrier_ok(netdev
)) {
2994 netif_carrier_off(netdev
);
2995 napi_disable(&tp
->napi
);
2996 tp
->rtl_ops
.disable(tp
);
2997 napi_enable(&tp
->napi
);
3002 static void rtl_work_func_t(struct work_struct
*work
)
3004 struct r8152
*tp
= container_of(work
, struct r8152
, schedule
.work
);
3006 /* If the device is unplugged or !netif_running(), the workqueue
3007 * doesn't need to wake the device, and could return directly.
3009 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) || !netif_running(tp
->netdev
))
3012 if (usb_autopm_get_interface(tp
->intf
) < 0)
3015 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
3018 if (!mutex_trylock(&tp
->control
)) {
3019 schedule_delayed_work(&tp
->schedule
, 0);
3023 if (test_and_clear_bit(RTL8152_LINK_CHG
, &tp
->flags
))
3026 if (test_and_clear_bit(RTL8152_SET_RX_MODE
, &tp
->flags
))
3027 _rtl8152_set_rx_mode(tp
->netdev
);
3029 /* don't schedule napi before linking */
3030 if (test_and_clear_bit(SCHEDULE_NAPI
, &tp
->flags
) &&
3031 netif_carrier_ok(tp
->netdev
))
3032 napi_schedule(&tp
->napi
);
3034 if (test_and_clear_bit(PHY_RESET
, &tp
->flags
))
3037 mutex_unlock(&tp
->control
);
3040 usb_autopm_put_interface(tp
->intf
);
3043 static void rtl_hw_phy_work_func_t(struct work_struct
*work
)
3045 struct r8152
*tp
= container_of(work
, struct r8152
, hw_phy_work
.work
);
3047 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3050 if (usb_autopm_get_interface(tp
->intf
) < 0)
3053 mutex_lock(&tp
->control
);
3055 tp
->rtl_ops
.hw_phy_cfg(tp
);
3057 rtl8152_set_speed(tp
, tp
->autoneg
, tp
->speed
, tp
->duplex
);
3059 mutex_unlock(&tp
->control
);
3061 usb_autopm_put_interface(tp
->intf
);
3064 #ifdef CONFIG_PM_SLEEP
3065 static int rtl_notifier(struct notifier_block
*nb
, unsigned long action
,
3068 struct r8152
*tp
= container_of(nb
, struct r8152
, pm_notifier
);
3071 case PM_HIBERNATION_PREPARE
:
3072 case PM_SUSPEND_PREPARE
:
3073 usb_autopm_get_interface(tp
->intf
);
3076 case PM_POST_HIBERNATION
:
3077 case PM_POST_SUSPEND
:
3078 usb_autopm_put_interface(tp
->intf
);
3081 case PM_POST_RESTORE
:
3082 case PM_RESTORE_PREPARE
:
3091 static int rtl8152_open(struct net_device
*netdev
)
3093 struct r8152
*tp
= netdev_priv(netdev
);
3096 res
= alloc_all_mem(tp
);
3100 netif_carrier_off(netdev
);
3102 res
= usb_autopm_get_interface(tp
->intf
);
3108 mutex_lock(&tp
->control
);
3112 netif_carrier_off(netdev
);
3113 netif_start_queue(netdev
);
3114 set_bit(WORK_ENABLE
, &tp
->flags
);
3116 res
= usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
3119 netif_device_detach(tp
->netdev
);
3120 netif_warn(tp
, ifup
, netdev
, "intr_urb submit failed: %d\n",
3124 napi_enable(&tp
->napi
);
3127 mutex_unlock(&tp
->control
);
3129 usb_autopm_put_interface(tp
->intf
);
3130 #ifdef CONFIG_PM_SLEEP
3131 tp
->pm_notifier
.notifier_call
= rtl_notifier
;
3132 register_pm_notifier(&tp
->pm_notifier
);
3139 static int rtl8152_close(struct net_device
*netdev
)
3141 struct r8152
*tp
= netdev_priv(netdev
);
3144 #ifdef CONFIG_PM_SLEEP
3145 unregister_pm_notifier(&tp
->pm_notifier
);
3147 napi_disable(&tp
->napi
);
3148 clear_bit(WORK_ENABLE
, &tp
->flags
);
3149 usb_kill_urb(tp
->intr_urb
);
3150 cancel_delayed_work_sync(&tp
->schedule
);
3151 netif_stop_queue(netdev
);
3153 res
= usb_autopm_get_interface(tp
->intf
);
3154 if (res
< 0 || test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
3155 rtl_drop_queued_tx(tp
);
3158 mutex_lock(&tp
->control
);
3160 tp
->rtl_ops
.down(tp
);
3162 mutex_unlock(&tp
->control
);
3164 usb_autopm_put_interface(tp
->intf
);
3172 static inline void r8152_mmd_indirect(struct r8152
*tp
, u16 dev
, u16 reg
)
3174 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_ADDR
| dev
);
3175 ocp_reg_write(tp
, OCP_EEE_DATA
, reg
);
3176 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_DATA
| dev
);
3179 static u16
r8152_mmd_read(struct r8152
*tp
, u16 dev
, u16 reg
)
3183 r8152_mmd_indirect(tp
, dev
, reg
);
3184 data
= ocp_reg_read(tp
, OCP_EEE_DATA
);
3185 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
3190 static void r8152_mmd_write(struct r8152
*tp
, u16 dev
, u16 reg
, u16 data
)
3192 r8152_mmd_indirect(tp
, dev
, reg
);
3193 ocp_reg_write(tp
, OCP_EEE_DATA
, data
);
3194 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
3197 static void r8152_eee_en(struct r8152
*tp
, bool enable
)
3199 u16 config1
, config2
, config3
;
3202 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3203 config1
= ocp_reg_read(tp
, OCP_EEE_CONFIG1
) & ~sd_rise_time_mask
;
3204 config2
= ocp_reg_read(tp
, OCP_EEE_CONFIG2
);
3205 config3
= ocp_reg_read(tp
, OCP_EEE_CONFIG3
) & ~fast_snr_mask
;
3208 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
3209 config1
|= EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
| RX_QUIET_EN
;
3210 config1
|= sd_rise_time(1);
3211 config2
|= RG_DACQUIET_EN
| RG_LDVQUIET_EN
;
3212 config3
|= fast_snr(42);
3214 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
3215 config1
&= ~(EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
|
3217 config1
|= sd_rise_time(7);
3218 config2
&= ~(RG_DACQUIET_EN
| RG_LDVQUIET_EN
);
3219 config3
|= fast_snr(511);
3222 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
3223 ocp_reg_write(tp
, OCP_EEE_CONFIG1
, config1
);
3224 ocp_reg_write(tp
, OCP_EEE_CONFIG2
, config2
);
3225 ocp_reg_write(tp
, OCP_EEE_CONFIG3
, config3
);
3228 static void r8152b_enable_eee(struct r8152
*tp
)
3230 r8152_eee_en(tp
, true);
3231 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, MDIO_EEE_100TX
);
3234 static void r8153_eee_en(struct r8152
*tp
, bool enable
)
3239 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3240 config
= ocp_reg_read(tp
, OCP_EEE_CFG
);
3243 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
3246 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
3247 config
&= ~EEE10_EN
;
3250 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
3251 ocp_reg_write(tp
, OCP_EEE_CFG
, config
);
3254 static void r8153_enable_eee(struct r8152
*tp
)
3256 r8153_eee_en(tp
, true);
3257 ocp_reg_write(tp
, OCP_EEE_ADV
, MDIO_EEE_1000T
| MDIO_EEE_100TX
);
3260 static void r8152b_enable_fc(struct r8152
*tp
)
3264 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
3265 anar
|= ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
;
3266 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
3269 static void rtl_tally_reset(struct r8152
*tp
)
3273 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
);
3274 ocp_data
|= TALLY_RESET
;
3275 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
, ocp_data
);
3278 static void r8152b_init(struct r8152
*tp
)
3282 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3285 r8152_aldps_en(tp
, false);
3287 if (tp
->version
== RTL_VER_01
) {
3288 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
3289 ocp_data
&= ~LED_MODE_MASK
;
3290 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
3293 r8152_power_cut_en(tp
, false);
3295 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
3296 ocp_data
|= TX_10M_IDLE_EN
| PFM_PWM_SWITCH
;
3297 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
3298 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
);
3299 ocp_data
&= ~MCU_CLK_RATIO_MASK
;
3300 ocp_data
|= MCU_CLK_RATIO
| D3_CLK_GATED_EN
;
3301 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ocp_data
);
3302 ocp_data
= GPHY_STS_MSK
| SPEED_DOWN_MSK
|
3303 SPDWN_RXDV_MSK
| SPDWN_LINKCHG_MSK
;
3304 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_GPHY_INTR_IMR
, ocp_data
);
3306 r8152b_enable_eee(tp
);
3307 r8152_aldps_en(tp
, true);
3308 r8152b_enable_fc(tp
);
3309 rtl_tally_reset(tp
);
3311 /* enable rx aggregation */
3312 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
3313 ocp_data
&= ~(RX_AGG_DISABLE
| RX_ZERO_EN
);
3314 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
3317 static void r8153_init(struct r8152
*tp
)
3322 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3325 r8153_aldps_en(tp
, false);
3326 r8153_u1u2en(tp
, false);
3328 for (i
= 0; i
< 500; i
++) {
3329 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BOOT_CTRL
) &
3335 for (i
= 0; i
< 500; i
++) {
3336 ocp_data
= ocp_reg_read(tp
, OCP_PHY_STATUS
) & PHY_STAT_MASK
;
3337 if (ocp_data
== PHY_STAT_LAN_ON
|| ocp_data
== PHY_STAT_PWRDN
)
3342 usb_disable_lpm(tp
->udev
);
3343 r8153_u2p3en(tp
, false);
3345 if (tp
->version
== RTL_VER_04
) {
3346 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK2
);
3347 ocp_data
&= ~pwd_dn_scale_mask
;
3348 ocp_data
|= pwd_dn_scale(96);
3349 ocp_write_word(tp
, MCU_TYPE_USB
, USB_SSPHYLINK2
, ocp_data
);
3351 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
);
3352 ocp_data
|= USB2PHY_L1
| USB2PHY_SUSPEND
;
3353 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_USB2PHY
, ocp_data
);
3354 } else if (tp
->version
== RTL_VER_05
) {
3355 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_DMY_REG0
);
3356 ocp_data
&= ~ECM_ALDPS
;
3357 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_DMY_REG0
, ocp_data
);
3359 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
);
3360 if (ocp_read_word(tp
, MCU_TYPE_USB
, USB_BURST_SIZE
) == 0)
3361 ocp_data
&= ~DYNAMIC_BURST
;
3363 ocp_data
|= DYNAMIC_BURST
;
3364 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
, ocp_data
);
3365 } else if (tp
->version
== RTL_VER_06
) {
3366 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
);
3367 if (ocp_read_word(tp
, MCU_TYPE_USB
, USB_BURST_SIZE
) == 0)
3368 ocp_data
&= ~DYNAMIC_BURST
;
3370 ocp_data
|= DYNAMIC_BURST
;
3371 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY1
, ocp_data
);
3374 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY2
);
3375 ocp_data
|= EP4_FULL_FC
;
3376 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_CSR_DUMMY2
, ocp_data
);
3378 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
);
3379 ocp_data
&= ~TIMER11_EN
;
3380 ocp_write_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
, ocp_data
);
3382 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
3383 ocp_data
&= ~LED_MODE_MASK
;
3384 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
3386 ocp_data
= FIFO_EMPTY_1FB
| ROK_EXIT_LPM
;
3387 if (tp
->version
== RTL_VER_04
&& tp
->udev
->speed
< USB_SPEED_SUPER
)
3388 ocp_data
|= LPM_TIMER_500MS
;
3390 ocp_data
|= LPM_TIMER_500US
;
3391 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_LPM_CTRL
, ocp_data
);
3393 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
);
3394 ocp_data
&= ~SEN_VAL_MASK
;
3395 ocp_data
|= SEN_VAL_NORMAL
| SEL_RXIDLE
;
3396 ocp_write_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
, ocp_data
);
3398 ocp_write_word(tp
, MCU_TYPE_USB
, USB_CONNECT_TIMER
, 0x0001);
3400 r8153_power_cut_en(tp
, false);
3401 r8153_u1u2en(tp
, true);
3403 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ALDPS_SPDWN_RATIO
);
3404 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
, EEE_SPDWN_RATIO
);
3405 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
,
3406 PKT_AVAIL_SPDWN_EN
| SUSPEND_SPDWN_EN
|
3407 U1U2_SPDWN_EN
| L1_SPDWN_EN
);
3408 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL4
,
3409 PWRSAVE_SPDWN_EN
| RXDV_SPDWN_EN
| TX10MIDLE_EN
|
3410 TP100_SPDWN_EN
| TP500_SPDWN_EN
| TP1000_SPDWN_EN
|
3413 r8153_enable_eee(tp
);
3414 r8153_aldps_en(tp
, true);
3415 r8152b_enable_fc(tp
);
3416 rtl_tally_reset(tp
);
3417 r8153_u2p3en(tp
, true);
3420 static int rtl8152_pre_reset(struct usb_interface
*intf
)
3422 struct r8152
*tp
= usb_get_intfdata(intf
);
3423 struct net_device
*netdev
;
3428 netdev
= tp
->netdev
;
3429 if (!netif_running(netdev
))
3432 napi_disable(&tp
->napi
);
3433 clear_bit(WORK_ENABLE
, &tp
->flags
);
3434 usb_kill_urb(tp
->intr_urb
);
3435 cancel_delayed_work_sync(&tp
->schedule
);
3436 if (netif_carrier_ok(netdev
)) {
3437 netif_stop_queue(netdev
);
3438 mutex_lock(&tp
->control
);
3439 tp
->rtl_ops
.disable(tp
);
3440 mutex_unlock(&tp
->control
);
3446 static int rtl8152_post_reset(struct usb_interface
*intf
)
3448 struct r8152
*tp
= usb_get_intfdata(intf
);
3449 struct net_device
*netdev
;
3454 netdev
= tp
->netdev
;
3455 if (!netif_running(netdev
))
3458 set_bit(WORK_ENABLE
, &tp
->flags
);
3459 if (netif_carrier_ok(netdev
)) {
3460 mutex_lock(&tp
->control
);
3461 tp
->rtl_ops
.enable(tp
);
3462 rtl8152_set_rx_mode(netdev
);
3463 mutex_unlock(&tp
->control
);
3464 netif_wake_queue(netdev
);
3467 napi_enable(&tp
->napi
);
3472 static bool delay_autosuspend(struct r8152
*tp
)
3474 bool sw_linking
= !!netif_carrier_ok(tp
->netdev
);
3475 bool hw_linking
= !!(rtl8152_get_speed(tp
) & LINK_STATUS
);
3477 /* This means a linking change occurs and the driver doesn't detect it,
3478 * yet. If the driver has disabled tx/rx and hw is linking on, the
3479 * device wouldn't wake up by receiving any packet.
3481 if (work_busy(&tp
->schedule
.work
) || sw_linking
!= hw_linking
)
3484 /* If the linking down is occurred by nway, the device may miss the
3485 * linking change event. And it wouldn't wake when linking on.
3487 if (!sw_linking
&& tp
->rtl_ops
.in_nway(tp
))
3493 static int rtl8152_suspend(struct usb_interface
*intf
, pm_message_t message
)
3495 struct r8152
*tp
= usb_get_intfdata(intf
);
3496 struct net_device
*netdev
= tp
->netdev
;
3499 mutex_lock(&tp
->control
);
3501 if (PMSG_IS_AUTO(message
)) {
3502 if (netif_running(netdev
) && delay_autosuspend(tp
)) {
3507 set_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3509 netif_device_detach(netdev
);
3512 if (netif_running(netdev
) && test_bit(WORK_ENABLE
, &tp
->flags
)) {
3513 clear_bit(WORK_ENABLE
, &tp
->flags
);
3514 usb_kill_urb(tp
->intr_urb
);
3515 napi_disable(&tp
->napi
);
3516 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3518 rtl_runtime_suspend_enable(tp
, true);
3520 cancel_delayed_work_sync(&tp
->schedule
);
3521 tp
->rtl_ops
.down(tp
);
3523 napi_enable(&tp
->napi
);
3526 mutex_unlock(&tp
->control
);
3531 static int rtl8152_resume(struct usb_interface
*intf
)
3533 struct r8152
*tp
= usb_get_intfdata(intf
);
3535 mutex_lock(&tp
->control
);
3537 if (!test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3538 tp
->rtl_ops
.init(tp
);
3539 queue_delayed_work(system_long_wq
, &tp
->hw_phy_work
, 0);
3540 netif_device_attach(tp
->netdev
);
3543 if (netif_running(tp
->netdev
) && tp
->netdev
->flags
& IFF_UP
) {
3544 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3545 rtl_runtime_suspend_enable(tp
, false);
3546 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3547 napi_disable(&tp
->napi
);
3548 set_bit(WORK_ENABLE
, &tp
->flags
);
3549 if (netif_carrier_ok(tp
->netdev
))
3551 napi_enable(&tp
->napi
);
3554 netif_carrier_off(tp
->netdev
);
3555 set_bit(WORK_ENABLE
, &tp
->flags
);
3557 usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
3558 } else if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3559 if (tp
->netdev
->flags
& IFF_UP
)
3560 rtl_runtime_suspend_enable(tp
, false);
3561 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3564 mutex_unlock(&tp
->control
);
3569 static int rtl8152_reset_resume(struct usb_interface
*intf
)
3571 struct r8152
*tp
= usb_get_intfdata(intf
);
3573 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3574 return rtl8152_resume(intf
);
3577 static void rtl8152_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
3579 struct r8152
*tp
= netdev_priv(dev
);
3581 if (usb_autopm_get_interface(tp
->intf
) < 0)
3584 if (!rtl_can_wakeup(tp
)) {
3588 mutex_lock(&tp
->control
);
3589 wol
->supported
= WAKE_ANY
;
3590 wol
->wolopts
= __rtl_get_wol(tp
);
3591 mutex_unlock(&tp
->control
);
3594 usb_autopm_put_interface(tp
->intf
);
3597 static int rtl8152_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
3599 struct r8152
*tp
= netdev_priv(dev
);
3602 if (!rtl_can_wakeup(tp
))
3605 ret
= usb_autopm_get_interface(tp
->intf
);
3609 mutex_lock(&tp
->control
);
3611 __rtl_set_wol(tp
, wol
->wolopts
);
3612 tp
->saved_wolopts
= wol
->wolopts
& WAKE_ANY
;
3614 mutex_unlock(&tp
->control
);
3616 usb_autopm_put_interface(tp
->intf
);
3622 static u32
rtl8152_get_msglevel(struct net_device
*dev
)
3624 struct r8152
*tp
= netdev_priv(dev
);
3626 return tp
->msg_enable
;
3629 static void rtl8152_set_msglevel(struct net_device
*dev
, u32 value
)
3631 struct r8152
*tp
= netdev_priv(dev
);
3633 tp
->msg_enable
= value
;
3636 static void rtl8152_get_drvinfo(struct net_device
*netdev
,
3637 struct ethtool_drvinfo
*info
)
3639 struct r8152
*tp
= netdev_priv(netdev
);
3641 strlcpy(info
->driver
, MODULENAME
, sizeof(info
->driver
));
3642 strlcpy(info
->version
, DRIVER_VERSION
, sizeof(info
->version
));
3643 usb_make_path(tp
->udev
, info
->bus_info
, sizeof(info
->bus_info
));
3647 int rtl8152_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
3649 struct r8152
*tp
= netdev_priv(netdev
);
3652 if (!tp
->mii
.mdio_read
)
3655 ret
= usb_autopm_get_interface(tp
->intf
);
3659 mutex_lock(&tp
->control
);
3661 ret
= mii_ethtool_gset(&tp
->mii
, cmd
);
3663 mutex_unlock(&tp
->control
);
3665 usb_autopm_put_interface(tp
->intf
);
3671 static int rtl8152_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
3673 struct r8152
*tp
= netdev_priv(dev
);
3676 ret
= usb_autopm_get_interface(tp
->intf
);
3680 mutex_lock(&tp
->control
);
3682 ret
= rtl8152_set_speed(tp
, cmd
->autoneg
, cmd
->speed
, cmd
->duplex
);
3684 tp
->autoneg
= cmd
->autoneg
;
3685 tp
->speed
= cmd
->speed
;
3686 tp
->duplex
= cmd
->duplex
;
3689 mutex_unlock(&tp
->control
);
3691 usb_autopm_put_interface(tp
->intf
);
3697 static const char rtl8152_gstrings
[][ETH_GSTRING_LEN
] = {
3704 "tx_single_collisions",
3705 "tx_multi_collisions",
3713 static int rtl8152_get_sset_count(struct net_device
*dev
, int sset
)
3717 return ARRAY_SIZE(rtl8152_gstrings
);
3723 static void rtl8152_get_ethtool_stats(struct net_device
*dev
,
3724 struct ethtool_stats
*stats
, u64
*data
)
3726 struct r8152
*tp
= netdev_priv(dev
);
3727 struct tally_counter tally
;
3729 if (usb_autopm_get_interface(tp
->intf
) < 0)
3732 generic_ocp_read(tp
, PLA_TALLYCNT
, sizeof(tally
), &tally
, MCU_TYPE_PLA
);
3734 usb_autopm_put_interface(tp
->intf
);
3736 data
[0] = le64_to_cpu(tally
.tx_packets
);
3737 data
[1] = le64_to_cpu(tally
.rx_packets
);
3738 data
[2] = le64_to_cpu(tally
.tx_errors
);
3739 data
[3] = le32_to_cpu(tally
.rx_errors
);
3740 data
[4] = le16_to_cpu(tally
.rx_missed
);
3741 data
[5] = le16_to_cpu(tally
.align_errors
);
3742 data
[6] = le32_to_cpu(tally
.tx_one_collision
);
3743 data
[7] = le32_to_cpu(tally
.tx_multi_collision
);
3744 data
[8] = le64_to_cpu(tally
.rx_unicast
);
3745 data
[9] = le64_to_cpu(tally
.rx_broadcast
);
3746 data
[10] = le32_to_cpu(tally
.rx_multicast
);
3747 data
[11] = le16_to_cpu(tally
.tx_aborted
);
3748 data
[12] = le16_to_cpu(tally
.tx_underrun
);
3751 static void rtl8152_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
3753 switch (stringset
) {
3755 memcpy(data
, *rtl8152_gstrings
, sizeof(rtl8152_gstrings
));
3760 static int r8152_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3762 u32 ocp_data
, lp
, adv
, supported
= 0;
3765 val
= r8152_mmd_read(tp
, MDIO_MMD_PCS
, MDIO_PCS_EEE_ABLE
);
3766 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
3768 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
);
3769 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
3771 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_LPABLE
);
3772 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
3774 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3775 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
3777 eee
->eee_enabled
= !!ocp_data
;
3778 eee
->eee_active
= !!(supported
& adv
& lp
);
3779 eee
->supported
= supported
;
3780 eee
->advertised
= adv
;
3781 eee
->lp_advertised
= lp
;
3786 static int r8152_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3788 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
3790 r8152_eee_en(tp
, eee
->eee_enabled
);
3792 if (!eee
->eee_enabled
)
3795 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, val
);
3800 static int r8153_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3802 u32 ocp_data
, lp
, adv
, supported
= 0;
3805 val
= ocp_reg_read(tp
, OCP_EEE_ABLE
);
3806 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
3808 val
= ocp_reg_read(tp
, OCP_EEE_ADV
);
3809 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
3811 val
= ocp_reg_read(tp
, OCP_EEE_LPABLE
);
3812 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
3814 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3815 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
3817 eee
->eee_enabled
= !!ocp_data
;
3818 eee
->eee_active
= !!(supported
& adv
& lp
);
3819 eee
->supported
= supported
;
3820 eee
->advertised
= adv
;
3821 eee
->lp_advertised
= lp
;
3826 static int r8153_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3828 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
3830 r8153_eee_en(tp
, eee
->eee_enabled
);
3832 if (!eee
->eee_enabled
)
3835 ocp_reg_write(tp
, OCP_EEE_ADV
, val
);
3841 rtl_ethtool_get_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
3843 struct r8152
*tp
= netdev_priv(net
);
3846 ret
= usb_autopm_get_interface(tp
->intf
);
3850 mutex_lock(&tp
->control
);
3852 ret
= tp
->rtl_ops
.eee_get(tp
, edata
);
3854 mutex_unlock(&tp
->control
);
3856 usb_autopm_put_interface(tp
->intf
);
3863 rtl_ethtool_set_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
3865 struct r8152
*tp
= netdev_priv(net
);
3868 ret
= usb_autopm_get_interface(tp
->intf
);
3872 mutex_lock(&tp
->control
);
3874 ret
= tp
->rtl_ops
.eee_set(tp
, edata
);
3876 ret
= mii_nway_restart(&tp
->mii
);
3878 mutex_unlock(&tp
->control
);
3880 usb_autopm_put_interface(tp
->intf
);
3886 static int rtl8152_nway_reset(struct net_device
*dev
)
3888 struct r8152
*tp
= netdev_priv(dev
);
3891 ret
= usb_autopm_get_interface(tp
->intf
);
3895 mutex_lock(&tp
->control
);
3897 ret
= mii_nway_restart(&tp
->mii
);
3899 mutex_unlock(&tp
->control
);
3901 usb_autopm_put_interface(tp
->intf
);
3907 static int rtl8152_get_coalesce(struct net_device
*netdev
,
3908 struct ethtool_coalesce
*coalesce
)
3910 struct r8152
*tp
= netdev_priv(netdev
);
3912 switch (tp
->version
) {
3920 coalesce
->rx_coalesce_usecs
= tp
->coalesce
;
3925 static int rtl8152_set_coalesce(struct net_device
*netdev
,
3926 struct ethtool_coalesce
*coalesce
)
3928 struct r8152
*tp
= netdev_priv(netdev
);
3931 switch (tp
->version
) {
3939 if (coalesce
->rx_coalesce_usecs
> COALESCE_SLOW
)
3942 ret
= usb_autopm_get_interface(tp
->intf
);
3946 mutex_lock(&tp
->control
);
3948 if (tp
->coalesce
!= coalesce
->rx_coalesce_usecs
) {
3949 tp
->coalesce
= coalesce
->rx_coalesce_usecs
;
3951 if (netif_running(tp
->netdev
) && netif_carrier_ok(netdev
))
3952 r8153_set_rx_early_timeout(tp
);
3955 mutex_unlock(&tp
->control
);
3957 usb_autopm_put_interface(tp
->intf
);
3962 static struct ethtool_ops ops
= {
3963 .get_drvinfo
= rtl8152_get_drvinfo
,
3964 .get_settings
= rtl8152_get_settings
,
3965 .set_settings
= rtl8152_set_settings
,
3966 .get_link
= ethtool_op_get_link
,
3967 .nway_reset
= rtl8152_nway_reset
,
3968 .get_msglevel
= rtl8152_get_msglevel
,
3969 .set_msglevel
= rtl8152_set_msglevel
,
3970 .get_wol
= rtl8152_get_wol
,
3971 .set_wol
= rtl8152_set_wol
,
3972 .get_strings
= rtl8152_get_strings
,
3973 .get_sset_count
= rtl8152_get_sset_count
,
3974 .get_ethtool_stats
= rtl8152_get_ethtool_stats
,
3975 .get_coalesce
= rtl8152_get_coalesce
,
3976 .set_coalesce
= rtl8152_set_coalesce
,
3977 .get_eee
= rtl_ethtool_get_eee
,
3978 .set_eee
= rtl_ethtool_set_eee
,
3981 static int rtl8152_ioctl(struct net_device
*netdev
, struct ifreq
*rq
, int cmd
)
3983 struct r8152
*tp
= netdev_priv(netdev
);
3984 struct mii_ioctl_data
*data
= if_mii(rq
);
3987 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3990 res
= usb_autopm_get_interface(tp
->intf
);
3996 data
->phy_id
= R8152_PHY_ID
; /* Internal PHY */
4000 mutex_lock(&tp
->control
);
4001 data
->val_out
= r8152_mdio_read(tp
, data
->reg_num
);
4002 mutex_unlock(&tp
->control
);
4006 if (!capable(CAP_NET_ADMIN
)) {
4010 mutex_lock(&tp
->control
);
4011 r8152_mdio_write(tp
, data
->reg_num
, data
->val_in
);
4012 mutex_unlock(&tp
->control
);
4019 usb_autopm_put_interface(tp
->intf
);
4025 static int rtl8152_change_mtu(struct net_device
*dev
, int new_mtu
)
4027 struct r8152
*tp
= netdev_priv(dev
);
4030 switch (tp
->version
) {
4033 return eth_change_mtu(dev
, new_mtu
);
4038 if (new_mtu
< 68 || new_mtu
> RTL8153_MAX_MTU
)
4041 ret
= usb_autopm_get_interface(tp
->intf
);
4045 mutex_lock(&tp
->control
);
4049 if (netif_running(dev
) && netif_carrier_ok(dev
))
4050 r8153_set_rx_early_size(tp
);
4052 mutex_unlock(&tp
->control
);
4054 usb_autopm_put_interface(tp
->intf
);
4059 static const struct net_device_ops rtl8152_netdev_ops
= {
4060 .ndo_open
= rtl8152_open
,
4061 .ndo_stop
= rtl8152_close
,
4062 .ndo_do_ioctl
= rtl8152_ioctl
,
4063 .ndo_start_xmit
= rtl8152_start_xmit
,
4064 .ndo_tx_timeout
= rtl8152_tx_timeout
,
4065 .ndo_set_features
= rtl8152_set_features
,
4066 .ndo_set_rx_mode
= rtl8152_set_rx_mode
,
4067 .ndo_set_mac_address
= rtl8152_set_mac_address
,
4068 .ndo_change_mtu
= rtl8152_change_mtu
,
4069 .ndo_validate_addr
= eth_validate_addr
,
4070 .ndo_features_check
= rtl8152_features_check
,
4073 static void r8152b_get_version(struct r8152
*tp
)
4078 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR1
);
4079 version
= (u16
)(ocp_data
& VERSION_MASK
);
4083 tp
->version
= RTL_VER_01
;
4086 tp
->version
= RTL_VER_02
;
4089 tp
->version
= RTL_VER_03
;
4090 tp
->mii
.supports_gmii
= 1;
4093 tp
->version
= RTL_VER_04
;
4094 tp
->mii
.supports_gmii
= 1;
4097 tp
->version
= RTL_VER_05
;
4098 tp
->mii
.supports_gmii
= 1;
4101 tp
->version
= RTL_VER_06
;
4102 tp
->mii
.supports_gmii
= 1;
4105 netif_info(tp
, probe
, tp
->netdev
,
4106 "Unknown version 0x%04x\n", version
);
4111 static void rtl8152_unload(struct r8152
*tp
)
4113 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4116 if (tp
->version
!= RTL_VER_01
)
4117 r8152_power_cut_en(tp
, true);
4120 static void rtl8153_unload(struct r8152
*tp
)
4122 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
4125 r8153_power_cut_en(tp
, false);
4128 static int rtl_ops_init(struct r8152
*tp
)
4130 struct rtl_ops
*ops
= &tp
->rtl_ops
;
4133 switch (tp
->version
) {
4136 ops
->init
= r8152b_init
;
4137 ops
->enable
= rtl8152_enable
;
4138 ops
->disable
= rtl8152_disable
;
4139 ops
->up
= rtl8152_up
;
4140 ops
->down
= rtl8152_down
;
4141 ops
->unload
= rtl8152_unload
;
4142 ops
->eee_get
= r8152_get_eee
;
4143 ops
->eee_set
= r8152_set_eee
;
4144 ops
->in_nway
= rtl8152_in_nway
;
4145 ops
->hw_phy_cfg
= r8152b_hw_phy_cfg
;
4152 ops
->init
= r8153_init
;
4153 ops
->enable
= rtl8153_enable
;
4154 ops
->disable
= rtl8153_disable
;
4155 ops
->up
= rtl8153_up
;
4156 ops
->down
= rtl8153_down
;
4157 ops
->unload
= rtl8153_unload
;
4158 ops
->eee_get
= r8153_get_eee
;
4159 ops
->eee_set
= r8153_set_eee
;
4160 ops
->in_nway
= rtl8153_in_nway
;
4161 ops
->hw_phy_cfg
= r8153_hw_phy_cfg
;
4166 netif_err(tp
, probe
, tp
->netdev
, "Unknown Device\n");
4173 static int rtl8152_probe(struct usb_interface
*intf
,
4174 const struct usb_device_id
*id
)
4176 struct usb_device
*udev
= interface_to_usbdev(intf
);
4178 struct net_device
*netdev
;
4181 if (udev
->actconfig
->desc
.bConfigurationValue
!= 1) {
4182 usb_driver_set_configuration(udev
, 1);
4186 usb_reset_device(udev
);
4187 netdev
= alloc_etherdev(sizeof(struct r8152
));
4189 dev_err(&intf
->dev
, "Out of memory\n");
4193 SET_NETDEV_DEV(netdev
, &intf
->dev
);
4194 tp
= netdev_priv(netdev
);
4195 tp
->msg_enable
= 0x7FFF;
4198 tp
->netdev
= netdev
;
4201 r8152b_get_version(tp
);
4202 ret
= rtl_ops_init(tp
);
4206 mutex_init(&tp
->control
);
4207 INIT_DELAYED_WORK(&tp
->schedule
, rtl_work_func_t
);
4208 INIT_DELAYED_WORK(&tp
->hw_phy_work
, rtl_hw_phy_work_func_t
);
4210 netdev
->netdev_ops
= &rtl8152_netdev_ops
;
4211 netdev
->watchdog_timeo
= RTL8152_TX_TIMEOUT
;
4213 netdev
->features
|= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
4214 NETIF_F_TSO
| NETIF_F_FRAGLIST
| NETIF_F_IPV6_CSUM
|
4215 NETIF_F_TSO6
| NETIF_F_HW_VLAN_CTAG_RX
|
4216 NETIF_F_HW_VLAN_CTAG_TX
;
4217 netdev
->hw_features
= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
4218 NETIF_F_TSO
| NETIF_F_FRAGLIST
|
4219 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
|
4220 NETIF_F_HW_VLAN_CTAG_RX
| NETIF_F_HW_VLAN_CTAG_TX
;
4221 netdev
->vlan_features
= NETIF_F_SG
| NETIF_F_IP_CSUM
| NETIF_F_TSO
|
4222 NETIF_F_HIGHDMA
| NETIF_F_FRAGLIST
|
4223 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
;
4225 netdev
->ethtool_ops
= &ops
;
4226 netif_set_gso_max_size(netdev
, RTL_LIMITED_TSO_SIZE
);
4228 tp
->mii
.dev
= netdev
;
4229 tp
->mii
.mdio_read
= read_mii_word
;
4230 tp
->mii
.mdio_write
= write_mii_word
;
4231 tp
->mii
.phy_id_mask
= 0x3f;
4232 tp
->mii
.reg_num_mask
= 0x1f;
4233 tp
->mii
.phy_id
= R8152_PHY_ID
;
4235 switch (udev
->speed
) {
4236 case USB_SPEED_SUPER
:
4237 case USB_SPEED_SUPER_PLUS
:
4238 tp
->coalesce
= COALESCE_SUPER
;
4240 case USB_SPEED_HIGH
:
4241 tp
->coalesce
= COALESCE_HIGH
;
4244 tp
->coalesce
= COALESCE_SLOW
;
4248 tp
->autoneg
= AUTONEG_ENABLE
;
4249 tp
->speed
= tp
->mii
.supports_gmii
? SPEED_1000
: SPEED_100
;
4250 tp
->duplex
= DUPLEX_FULL
;
4252 intf
->needs_remote_wakeup
= 1;
4254 tp
->rtl_ops
.init(tp
);
4255 queue_delayed_work(system_long_wq
, &tp
->hw_phy_work
, 0);
4256 set_ethernet_addr(tp
);
4258 usb_set_intfdata(intf
, tp
);
4259 netif_napi_add(netdev
, &tp
->napi
, r8152_poll
, RTL8152_NAPI_WEIGHT
);
4261 ret
= register_netdev(netdev
);
4263 netif_err(tp
, probe
, netdev
, "couldn't register the device\n");
4267 if (!rtl_can_wakeup(tp
))
4268 __rtl_set_wol(tp
, 0);
4270 tp
->saved_wolopts
= __rtl_get_wol(tp
);
4271 if (tp
->saved_wolopts
)
4272 device_set_wakeup_enable(&udev
->dev
, true);
4274 device_set_wakeup_enable(&udev
->dev
, false);
4276 netif_info(tp
, probe
, netdev
, "%s\n", DRIVER_VERSION
);
4281 netif_napi_del(&tp
->napi
);
4282 usb_set_intfdata(intf
, NULL
);
4284 free_netdev(netdev
);
4288 static void rtl8152_disconnect(struct usb_interface
*intf
)
4290 struct r8152
*tp
= usb_get_intfdata(intf
);
4292 usb_set_intfdata(intf
, NULL
);
4294 struct usb_device
*udev
= tp
->udev
;
4296 if (udev
->state
== USB_STATE_NOTATTACHED
)
4297 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
4299 netif_napi_del(&tp
->napi
);
4300 unregister_netdev(tp
->netdev
);
4301 cancel_delayed_work_sync(&tp
->hw_phy_work
);
4302 tp
->rtl_ops
.unload(tp
);
4303 free_netdev(tp
->netdev
);
4307 #define REALTEK_USB_DEVICE(vend, prod) \
4308 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4309 USB_DEVICE_ID_MATCH_INT_CLASS, \
4310 .idVendor = (vend), \
4311 .idProduct = (prod), \
4312 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4315 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4316 USB_DEVICE_ID_MATCH_DEVICE, \
4317 .idVendor = (vend), \
4318 .idProduct = (prod), \
4319 .bInterfaceClass = USB_CLASS_COMM, \
4320 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4321 .bInterfaceProtocol = USB_CDC_PROTO_NONE
4323 /* table of devices that work with this driver */
4324 static struct usb_device_id rtl8152_table
[] = {
4325 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8152)},
4326 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8153)},
4327 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG
, 0xa101)},
4328 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x7205)},
4329 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO
, 0x304f)},
4330 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA
, 0x09ff)},
4334 MODULE_DEVICE_TABLE(usb
, rtl8152_table
);
4336 static struct usb_driver rtl8152_driver
= {
4338 .id_table
= rtl8152_table
,
4339 .probe
= rtl8152_probe
,
4340 .disconnect
= rtl8152_disconnect
,
4341 .suspend
= rtl8152_suspend
,
4342 .resume
= rtl8152_resume
,
4343 .reset_resume
= rtl8152_reset_resume
,
4344 .pre_reset
= rtl8152_pre_reset
,
4345 .post_reset
= rtl8152_post_reset
,
4346 .supports_autosuspend
= 1,
4347 .disable_hub_initiated_lpm
= 1,
4350 module_usb_driver(rtl8152_driver
);
4352 MODULE_AUTHOR(DRIVER_AUTHOR
);
4353 MODULE_DESCRIPTION(DRIVER_DESC
);
4354 MODULE_LICENSE("GPL");