2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
29 /* Version Information */
30 #define DRIVER_VERSION "v1.08.0 (2015/01/13)"
31 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
32 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
33 #define MODULENAME "r8152"
35 #define R8152_PHY_ID 32
37 #define PLA_IDR 0xc000
38 #define PLA_RCR 0xc010
39 #define PLA_RMS 0xc016
40 #define PLA_RXFIFO_CTRL0 0xc0a0
41 #define PLA_RXFIFO_CTRL1 0xc0a4
42 #define PLA_RXFIFO_CTRL2 0xc0a8
43 #define PLA_FMC 0xc0b4
44 #define PLA_CFG_WOL 0xc0b6
45 #define PLA_TEREDO_CFG 0xc0bc
46 #define PLA_MAR 0xcd00
47 #define PLA_BACKUP 0xd000
48 #define PAL_BDC_CR 0xd1a0
49 #define PLA_TEREDO_TIMER 0xd2cc
50 #define PLA_REALWOW_TIMER 0xd2e8
51 #define PLA_LEDSEL 0xdd90
52 #define PLA_LED_FEATURE 0xdd92
53 #define PLA_PHYAR 0xde00
54 #define PLA_BOOT_CTRL 0xe004
55 #define PLA_GPHY_INTR_IMR 0xe022
56 #define PLA_EEE_CR 0xe040
57 #define PLA_EEEP_CR 0xe080
58 #define PLA_MAC_PWR_CTRL 0xe0c0
59 #define PLA_MAC_PWR_CTRL2 0xe0ca
60 #define PLA_MAC_PWR_CTRL3 0xe0cc
61 #define PLA_MAC_PWR_CTRL4 0xe0ce
62 #define PLA_WDT6_CTRL 0xe428
63 #define PLA_TCR0 0xe610
64 #define PLA_TCR1 0xe612
65 #define PLA_MTPS 0xe615
66 #define PLA_TXFIFO_CTRL 0xe618
67 #define PLA_RSTTALLY 0xe800
69 #define PLA_CRWECR 0xe81c
70 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
71 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
72 #define PLA_CONFIG5 0xe822
73 #define PLA_PHY_PWR 0xe84c
74 #define PLA_OOB_CTRL 0xe84f
75 #define PLA_CPCR 0xe854
76 #define PLA_MISC_0 0xe858
77 #define PLA_MISC_1 0xe85a
78 #define PLA_OCP_GPHY_BASE 0xe86c
79 #define PLA_TALLYCNT 0xe890
80 #define PLA_SFF_STS_7 0xe8de
81 #define PLA_PHYSTATUS 0xe908
82 #define PLA_BP_BA 0xfc26
83 #define PLA_BP_0 0xfc28
84 #define PLA_BP_1 0xfc2a
85 #define PLA_BP_2 0xfc2c
86 #define PLA_BP_3 0xfc2e
87 #define PLA_BP_4 0xfc30
88 #define PLA_BP_5 0xfc32
89 #define PLA_BP_6 0xfc34
90 #define PLA_BP_7 0xfc36
91 #define PLA_BP_EN 0xfc38
93 #define USB_U2P3_CTRL 0xb460
94 #define USB_DEV_STAT 0xb808
95 #define USB_USB_CTRL 0xd406
96 #define USB_PHY_CTRL 0xd408
97 #define USB_TX_AGG 0xd40a
98 #define USB_RX_BUF_TH 0xd40c
99 #define USB_USB_TIMER 0xd428
100 #define USB_RX_EARLY_AGG 0xd42c
101 #define USB_PM_CTRL_STATUS 0xd432
102 #define USB_TX_DMA 0xd434
103 #define USB_TOLERANCE 0xd490
104 #define USB_LPM_CTRL 0xd41a
105 #define USB_UPS_CTRL 0xd800
106 #define USB_MISC_0 0xd81a
107 #define USB_POWER_CUT 0xd80a
108 #define USB_AFE_CTRL2 0xd824
109 #define USB_WDT11_CTRL 0xe43c
110 #define USB_BP_BA 0xfc26
111 #define USB_BP_0 0xfc28
112 #define USB_BP_1 0xfc2a
113 #define USB_BP_2 0xfc2c
114 #define USB_BP_3 0xfc2e
115 #define USB_BP_4 0xfc30
116 #define USB_BP_5 0xfc32
117 #define USB_BP_6 0xfc34
118 #define USB_BP_7 0xfc36
119 #define USB_BP_EN 0xfc38
122 #define OCP_ALDPS_CONFIG 0x2010
123 #define OCP_EEE_CONFIG1 0x2080
124 #define OCP_EEE_CONFIG2 0x2092
125 #define OCP_EEE_CONFIG3 0x2094
126 #define OCP_BASE_MII 0xa400
127 #define OCP_EEE_AR 0xa41a
128 #define OCP_EEE_DATA 0xa41c
129 #define OCP_PHY_STATUS 0xa420
130 #define OCP_POWER_CFG 0xa430
131 #define OCP_EEE_CFG 0xa432
132 #define OCP_SRAM_ADDR 0xa436
133 #define OCP_SRAM_DATA 0xa438
134 #define OCP_DOWN_SPEED 0xa442
135 #define OCP_EEE_ABLE 0xa5c4
136 #define OCP_EEE_ADV 0xa5d0
137 #define OCP_EEE_LPABLE 0xa5d2
138 #define OCP_ADC_CFG 0xbc06
141 #define SRAM_LPF_CFG 0x8012
142 #define SRAM_10M_AMP1 0x8080
143 #define SRAM_10M_AMP2 0x8082
144 #define SRAM_IMPEDANCE 0x8084
147 #define RCR_AAP 0x00000001
148 #define RCR_APM 0x00000002
149 #define RCR_AM 0x00000004
150 #define RCR_AB 0x00000008
151 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
153 /* PLA_RXFIFO_CTRL0 */
154 #define RXFIFO_THR1_NORMAL 0x00080002
155 #define RXFIFO_THR1_OOB 0x01800003
157 /* PLA_RXFIFO_CTRL1 */
158 #define RXFIFO_THR2_FULL 0x00000060
159 #define RXFIFO_THR2_HIGH 0x00000038
160 #define RXFIFO_THR2_OOB 0x0000004a
161 #define RXFIFO_THR2_NORMAL 0x00a0
163 /* PLA_RXFIFO_CTRL2 */
164 #define RXFIFO_THR3_FULL 0x00000078
165 #define RXFIFO_THR3_HIGH 0x00000048
166 #define RXFIFO_THR3_OOB 0x0000005a
167 #define RXFIFO_THR3_NORMAL 0x0110
169 /* PLA_TXFIFO_CTRL */
170 #define TXFIFO_THR_NORMAL 0x00400008
171 #define TXFIFO_THR_NORMAL2 0x01000008
174 #define FMC_FCR_MCU_EN 0x0001
177 #define EEEP_CR_EEEP_TX 0x0002
180 #define WDT6_SET_MODE 0x0010
183 #define TCR0_TX_EMPTY 0x0800
184 #define TCR0_AUTO_FIFO 0x0080
187 #define VERSION_MASK 0x7cf0
190 #define MTPS_JUMBO (12 * 1024 / 64)
191 #define MTPS_DEFAULT (6 * 1024 / 64)
194 #define TALLY_RESET 0x0001
202 #define CRWECR_NORAML 0x00
203 #define CRWECR_CONFIG 0xc0
206 #define NOW_IS_OOB 0x80
207 #define TXFIFO_EMPTY 0x20
208 #define RXFIFO_EMPTY 0x10
209 #define LINK_LIST_READY 0x02
210 #define DIS_MCU_CLROOB 0x01
211 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
214 #define RXDY_GATED_EN 0x0008
217 #define RE_INIT_LL 0x8000
218 #define MCU_BORW_EN 0x4000
221 #define CPCR_RX_VLAN 0x0040
224 #define MAGIC_EN 0x0001
227 #define TEREDO_SEL 0x8000
228 #define TEREDO_WAKE_MASK 0x7f00
229 #define TEREDO_RS_EVENT_MASK 0x00fe
230 #define OOB_TEREDO_EN 0x0001
233 #define ALDPS_PROXY_MODE 0x0001
236 #define LINK_ON_WAKE_EN 0x0010
237 #define LINK_OFF_WAKE_EN 0x0008
240 #define BWF_EN 0x0040
241 #define MWF_EN 0x0020
242 #define UWF_EN 0x0010
243 #define LAN_WAKE_EN 0x0002
245 /* PLA_LED_FEATURE */
246 #define LED_MODE_MASK 0x0700
249 #define TX_10M_IDLE_EN 0x0080
250 #define PFM_PWM_SWITCH 0x0040
252 /* PLA_MAC_PWR_CTRL */
253 #define D3_CLK_GATED_EN 0x00004000
254 #define MCU_CLK_RATIO 0x07010f07
255 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
256 #define ALDPS_SPDWN_RATIO 0x0f87
258 /* PLA_MAC_PWR_CTRL2 */
259 #define EEE_SPDWN_RATIO 0x8007
261 /* PLA_MAC_PWR_CTRL3 */
262 #define PKT_AVAIL_SPDWN_EN 0x0100
263 #define SUSPEND_SPDWN_EN 0x0004
264 #define U1U2_SPDWN_EN 0x0002
265 #define L1_SPDWN_EN 0x0001
267 /* PLA_MAC_PWR_CTRL4 */
268 #define PWRSAVE_SPDWN_EN 0x1000
269 #define RXDV_SPDWN_EN 0x0800
270 #define TX10MIDLE_EN 0x0100
271 #define TP100_SPDWN_EN 0x0020
272 #define TP500_SPDWN_EN 0x0010
273 #define TP1000_SPDWN_EN 0x0008
274 #define EEE_SPDWN_EN 0x0001
276 /* PLA_GPHY_INTR_IMR */
277 #define GPHY_STS_MSK 0x0001
278 #define SPEED_DOWN_MSK 0x0002
279 #define SPDWN_RXDV_MSK 0x0004
280 #define SPDWN_LINKCHG_MSK 0x0008
283 #define PHYAR_FLAG 0x80000000
286 #define EEE_RX_EN 0x0001
287 #define EEE_TX_EN 0x0002
290 #define AUTOLOAD_DONE 0x0002
293 #define STAT_SPEED_MASK 0x0006
294 #define STAT_SPEED_HIGH 0x0000
295 #define STAT_SPEED_FULL 0x0002
298 #define TX_AGG_MAX_THRESHOLD 0x03
301 #define RX_THR_SUPPER 0x0c350180
302 #define RX_THR_HIGH 0x7a120180
303 #define RX_THR_SLOW 0xffff0180
306 #define TEST_MODE_DISABLE 0x00000001
307 #define TX_SIZE_ADJUST1 0x00000100
310 #define POWER_CUT 0x0100
312 /* USB_PM_CTRL_STATUS */
313 #define RESUME_INDICATE 0x0001
316 #define RX_AGG_DISABLE 0x0010
319 #define U2P3_ENABLE 0x0001
322 #define PWR_EN 0x0001
323 #define PHASE2_EN 0x0008
326 #define PCUT_STATUS 0x0001
328 /* USB_RX_EARLY_AGG */
329 #define EARLY_AGG_SUPPER 0x0e832981
330 #define EARLY_AGG_HIGH 0x0e837a12
331 #define EARLY_AGG_SLOW 0x0e83ffff
334 #define TIMER11_EN 0x0001
337 #define LPM_TIMER_MASK 0x0c
338 #define LPM_TIMER_500MS 0x04 /* 500 ms */
339 #define LPM_TIMER_500US 0x0c /* 500 us */
342 #define SEN_VAL_MASK 0xf800
343 #define SEN_VAL_NORMAL 0xa000
344 #define SEL_RXIDLE 0x0100
346 /* OCP_ALDPS_CONFIG */
347 #define ENPWRSAVE 0x8000
348 #define ENPDNPS 0x0200
349 #define LINKENA 0x0100
350 #define DIS_SDSAVE 0x0010
353 #define PHY_STAT_MASK 0x0007
354 #define PHY_STAT_LAN_ON 3
355 #define PHY_STAT_PWRDN 5
358 #define EEE_CLKDIV_EN 0x8000
359 #define EN_ALDPS 0x0004
360 #define EN_10M_PLLOFF 0x0001
362 /* OCP_EEE_CONFIG1 */
363 #define RG_TXLPI_MSK_HFDUP 0x8000
364 #define RG_MATCLR_EN 0x4000
365 #define EEE_10_CAP 0x2000
366 #define EEE_NWAY_EN 0x1000
367 #define TX_QUIET_EN 0x0200
368 #define RX_QUIET_EN 0x0100
369 #define sd_rise_time_mask 0x0070
370 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
371 #define RG_RXLPI_MSK_HFDUP 0x0008
372 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
374 /* OCP_EEE_CONFIG2 */
375 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
376 #define RG_DACQUIET_EN 0x0400
377 #define RG_LDVQUIET_EN 0x0200
378 #define RG_CKRSEL 0x0020
379 #define RG_EEEPRG_EN 0x0010
381 /* OCP_EEE_CONFIG3 */
382 #define fast_snr_mask 0xff80
383 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
384 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
385 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
388 /* bit[15:14] function */
389 #define FUN_ADDR 0x0000
390 #define FUN_DATA 0x4000
391 /* bit[4:0] device addr */
394 #define CTAP_SHORT_EN 0x0040
395 #define EEE10_EN 0x0010
398 #define EN_10M_BGOFF 0x0080
401 #define CKADSEL_L 0x0100
402 #define ADC_EN 0x0080
403 #define EN_EMI_L 0x0040
406 #define LPF_AUTO_TUNE 0x8000
409 #define GDAC_IB_UPALL 0x0008
412 #define AMP_DN 0x0200
415 #define RX_DRIVING_MASK 0x6000
417 enum rtl_register_content
{
425 #define RTL8152_MAX_TX 4
426 #define RTL8152_MAX_RX 10
432 #define INTR_LINK 0x0004
434 #define RTL8152_REQT_READ 0xc0
435 #define RTL8152_REQT_WRITE 0x40
436 #define RTL8152_REQ_GET_REGS 0x05
437 #define RTL8152_REQ_SET_REGS 0x05
439 #define BYTE_EN_DWORD 0xff
440 #define BYTE_EN_WORD 0x33
441 #define BYTE_EN_BYTE 0x11
442 #define BYTE_EN_SIX_BYTES 0x3f
443 #define BYTE_EN_START_MASK 0x0f
444 #define BYTE_EN_END_MASK 0xf0
446 #define RTL8153_MAX_PACKET 9216 /* 9K */
447 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
448 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
449 #define RTL8153_RMS RTL8153_MAX_PACKET
450 #define RTL8152_TX_TIMEOUT (5 * HZ)
451 #define RTL8152_NAPI_WEIGHT 64
464 /* Define these values to match your device */
465 #define VENDOR_ID_REALTEK 0x0bda
466 #define VENDOR_ID_SAMSUNG 0x04e8
468 #define MCU_TYPE_PLA 0x0100
469 #define MCU_TYPE_USB 0x0000
471 struct tally_counter
{
478 __le32 tx_one_collision
;
479 __le32 tx_multi_collision
;
489 #define RX_LEN_MASK 0x7fff
492 #define RD_UDP_CS (1 << 23)
493 #define RD_TCP_CS (1 << 22)
494 #define RD_IPV6_CS (1 << 20)
495 #define RD_IPV4_CS (1 << 19)
498 #define IPF (1 << 23) /* IP checksum fail */
499 #define UDPF (1 << 22) /* UDP checksum fail */
500 #define TCPF (1 << 21) /* TCP checksum fail */
501 #define RX_VLAN_TAG (1 << 16)
510 #define TX_FS (1 << 31) /* First segment of a packet */
511 #define TX_LS (1 << 30) /* Final segment of a packet */
512 #define GTSENDV4 (1 << 28)
513 #define GTSENDV6 (1 << 27)
514 #define GTTCPHO_SHIFT 18
515 #define GTTCPHO_MAX 0x7fU
516 #define TX_LEN_MAX 0x3ffffU
519 #define UDP_CS (1 << 31) /* Calculate UDP/IP checksum */
520 #define TCP_CS (1 << 30) /* Calculate TCP/IP checksum */
521 #define IPV4_CS (1 << 29) /* Calculate IPv4 checksum */
522 #define IPV6_CS (1 << 28) /* Calculate IPv6 checksum */
524 #define MSS_MAX 0x7ffU
525 #define TCPHO_SHIFT 17
526 #define TCPHO_MAX 0x7ffU
527 #define TX_VLAN_TAG (1 << 16)
533 struct list_head list
;
535 struct r8152
*context
;
541 struct list_head list
;
543 struct r8152
*context
;
552 struct usb_device
*udev
;
553 struct napi_struct napi
;
554 struct usb_interface
*intf
;
555 struct net_device
*netdev
;
556 struct urb
*intr_urb
;
557 struct tx_agg tx_info
[RTL8152_MAX_TX
];
558 struct rx_agg rx_info
[RTL8152_MAX_RX
];
559 struct list_head rx_done
, tx_free
;
560 struct sk_buff_head tx_queue
, rx_queue
;
561 spinlock_t rx_lock
, tx_lock
;
562 struct delayed_work schedule
;
563 struct mii_if_info mii
;
564 struct mutex control
; /* use for hw setting */
567 void (*init
)(struct r8152
*);
568 int (*enable
)(struct r8152
*);
569 void (*disable
)(struct r8152
*);
570 void (*up
)(struct r8152
*);
571 void (*down
)(struct r8152
*);
572 void (*unload
)(struct r8152
*);
573 int (*eee_get
)(struct r8152
*, struct ethtool_eee
*);
574 int (*eee_set
)(struct r8152
*, struct ethtool_eee
*);
602 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
603 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
605 static const int multicast_filter_limit
= 32;
606 static unsigned int agg_buf_sz
= 16384;
608 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
609 VLAN_ETH_HLEN - VLAN_HLEN)
612 int get_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
617 tmp
= kmalloc(size
, GFP_KERNEL
);
621 ret
= usb_control_msg(tp
->udev
, usb_rcvctrlpipe(tp
->udev
, 0),
622 RTL8152_REQ_GET_REGS
, RTL8152_REQT_READ
,
623 value
, index
, tmp
, size
, 500);
625 memcpy(data
, tmp
, size
);
632 int set_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
637 tmp
= kmemdup(data
, size
, GFP_KERNEL
);
641 ret
= usb_control_msg(tp
->udev
, usb_sndctrlpipe(tp
->udev
, 0),
642 RTL8152_REQ_SET_REGS
, RTL8152_REQT_WRITE
,
643 value
, index
, tmp
, size
, 500);
650 static int generic_ocp_read(struct r8152
*tp
, u16 index
, u16 size
,
651 void *data
, u16 type
)
656 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
659 /* both size and indix must be 4 bytes align */
660 if ((size
& 3) || !size
|| (index
& 3) || !data
)
663 if ((u32
)index
+ (u32
)size
> 0xffff)
668 ret
= get_registers(tp
, index
, type
, limit
, data
);
676 ret
= get_registers(tp
, index
, type
, size
, data
);
688 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
693 static int generic_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
,
694 u16 size
, void *data
, u16 type
)
697 u16 byteen_start
, byteen_end
, byen
;
700 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
703 /* both size and indix must be 4 bytes align */
704 if ((size
& 3) || !size
|| (index
& 3) || !data
)
707 if ((u32
)index
+ (u32
)size
> 0xffff)
710 byteen_start
= byteen
& BYTE_EN_START_MASK
;
711 byteen_end
= byteen
& BYTE_EN_END_MASK
;
713 byen
= byteen_start
| (byteen_start
<< 4);
714 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
727 ret
= set_registers(tp
, index
,
728 type
| BYTE_EN_DWORD
,
737 ret
= set_registers(tp
, index
,
738 type
| BYTE_EN_DWORD
,
750 byen
= byteen_end
| (byteen_end
>> 4);
751 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
758 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
764 int pla_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
766 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_PLA
);
770 int pla_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
772 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_PLA
);
776 int usb_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
778 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_USB
);
782 int usb_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
784 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_USB
);
787 static u32
ocp_read_dword(struct r8152
*tp
, u16 type
, u16 index
)
791 generic_ocp_read(tp
, index
, sizeof(data
), &data
, type
);
793 return __le32_to_cpu(data
);
796 static void ocp_write_dword(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
798 __le32 tmp
= __cpu_to_le32(data
);
800 generic_ocp_write(tp
, index
, BYTE_EN_DWORD
, sizeof(tmp
), &tmp
, type
);
803 static u16
ocp_read_word(struct r8152
*tp
, u16 type
, u16 index
)
807 u8 shift
= index
& 2;
811 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
813 data
= __le32_to_cpu(tmp
);
814 data
>>= (shift
* 8);
820 static void ocp_write_word(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
824 u16 byen
= BYTE_EN_WORD
;
825 u8 shift
= index
& 2;
831 mask
<<= (shift
* 8);
832 data
<<= (shift
* 8);
836 tmp
= __cpu_to_le32(data
);
838 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
841 static u8
ocp_read_byte(struct r8152
*tp
, u16 type
, u16 index
)
845 u8 shift
= index
& 3;
849 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
851 data
= __le32_to_cpu(tmp
);
852 data
>>= (shift
* 8);
858 static void ocp_write_byte(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
862 u16 byen
= BYTE_EN_BYTE
;
863 u8 shift
= index
& 3;
869 mask
<<= (shift
* 8);
870 data
<<= (shift
* 8);
874 tmp
= __cpu_to_le32(data
);
876 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
879 static u16
ocp_reg_read(struct r8152
*tp
, u16 addr
)
881 u16 ocp_base
, ocp_index
;
883 ocp_base
= addr
& 0xf000;
884 if (ocp_base
!= tp
->ocp_base
) {
885 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
886 tp
->ocp_base
= ocp_base
;
889 ocp_index
= (addr
& 0x0fff) | 0xb000;
890 return ocp_read_word(tp
, MCU_TYPE_PLA
, ocp_index
);
893 static void ocp_reg_write(struct r8152
*tp
, u16 addr
, u16 data
)
895 u16 ocp_base
, ocp_index
;
897 ocp_base
= addr
& 0xf000;
898 if (ocp_base
!= tp
->ocp_base
) {
899 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
900 tp
->ocp_base
= ocp_base
;
903 ocp_index
= (addr
& 0x0fff) | 0xb000;
904 ocp_write_word(tp
, MCU_TYPE_PLA
, ocp_index
, data
);
907 static inline void r8152_mdio_write(struct r8152
*tp
, u32 reg_addr
, u32 value
)
909 ocp_reg_write(tp
, OCP_BASE_MII
+ reg_addr
* 2, value
);
912 static inline int r8152_mdio_read(struct r8152
*tp
, u32 reg_addr
)
914 return ocp_reg_read(tp
, OCP_BASE_MII
+ reg_addr
* 2);
917 static void sram_write(struct r8152
*tp
, u16 addr
, u16 data
)
919 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
920 ocp_reg_write(tp
, OCP_SRAM_DATA
, data
);
923 static int read_mii_word(struct net_device
*netdev
, int phy_id
, int reg
)
925 struct r8152
*tp
= netdev_priv(netdev
);
928 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
931 if (phy_id
!= R8152_PHY_ID
)
934 ret
= r8152_mdio_read(tp
, reg
);
940 void write_mii_word(struct net_device
*netdev
, int phy_id
, int reg
, int val
)
942 struct r8152
*tp
= netdev_priv(netdev
);
944 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
947 if (phy_id
!= R8152_PHY_ID
)
950 r8152_mdio_write(tp
, reg
, val
);
954 r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
);
956 static int rtl8152_set_mac_address(struct net_device
*netdev
, void *p
)
958 struct r8152
*tp
= netdev_priv(netdev
);
959 struct sockaddr
*addr
= p
;
960 int ret
= -EADDRNOTAVAIL
;
962 if (!is_valid_ether_addr(addr
->sa_data
))
965 ret
= usb_autopm_get_interface(tp
->intf
);
969 mutex_lock(&tp
->control
);
971 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
973 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
974 pla_ocp_write(tp
, PLA_IDR
, BYTE_EN_SIX_BYTES
, 8, addr
->sa_data
);
975 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
977 mutex_unlock(&tp
->control
);
979 usb_autopm_put_interface(tp
->intf
);
984 static int set_ethernet_addr(struct r8152
*tp
)
986 struct net_device
*dev
= tp
->netdev
;
990 if (tp
->version
== RTL_VER_01
)
991 ret
= pla_ocp_read(tp
, PLA_IDR
, 8, sa
.sa_data
);
993 ret
= pla_ocp_read(tp
, PLA_BACKUP
, 8, sa
.sa_data
);
996 netif_err(tp
, probe
, dev
, "Get ether addr fail\n");
997 } else if (!is_valid_ether_addr(sa
.sa_data
)) {
998 netif_err(tp
, probe
, dev
, "Invalid ether addr %pM\n",
1000 eth_hw_addr_random(dev
);
1001 ether_addr_copy(sa
.sa_data
, dev
->dev_addr
);
1002 ret
= rtl8152_set_mac_address(dev
, &sa
);
1003 netif_info(tp
, probe
, dev
, "Random ether addr %pM\n",
1006 if (tp
->version
== RTL_VER_01
)
1007 ether_addr_copy(dev
->dev_addr
, sa
.sa_data
);
1009 ret
= rtl8152_set_mac_address(dev
, &sa
);
1015 static void read_bulk_callback(struct urb
*urb
)
1017 struct net_device
*netdev
;
1018 int status
= urb
->status
;
1030 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1033 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1036 netdev
= tp
->netdev
;
1038 /* When link down, the driver would cancel all bulks. */
1039 /* This avoid the re-submitting bulk */
1040 if (!netif_carrier_ok(netdev
))
1043 usb_mark_last_busy(tp
->udev
);
1047 if (urb
->actual_length
< ETH_ZLEN
)
1050 spin_lock(&tp
->rx_lock
);
1051 list_add_tail(&agg
->list
, &tp
->rx_done
);
1052 spin_unlock(&tp
->rx_lock
);
1053 napi_schedule(&tp
->napi
);
1056 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1057 netif_device_detach(tp
->netdev
);
1060 return; /* the urb is in unlink state */
1062 if (net_ratelimit())
1063 netdev_warn(netdev
, "maybe reset is needed?\n");
1066 if (net_ratelimit())
1067 netdev_warn(netdev
, "Rx status %d\n", status
);
1071 r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1074 static void write_bulk_callback(struct urb
*urb
)
1076 struct net_device_stats
*stats
;
1077 struct net_device
*netdev
;
1080 int status
= urb
->status
;
1090 netdev
= tp
->netdev
;
1091 stats
= &netdev
->stats
;
1093 if (net_ratelimit())
1094 netdev_warn(netdev
, "Tx status %d\n", status
);
1095 stats
->tx_errors
+= agg
->skb_num
;
1097 stats
->tx_packets
+= agg
->skb_num
;
1098 stats
->tx_bytes
+= agg
->skb_len
;
1101 spin_lock(&tp
->tx_lock
);
1102 list_add_tail(&agg
->list
, &tp
->tx_free
);
1103 spin_unlock(&tp
->tx_lock
);
1105 usb_autopm_put_interface_async(tp
->intf
);
1107 if (!netif_carrier_ok(netdev
))
1110 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1113 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1116 if (!skb_queue_empty(&tp
->tx_queue
))
1117 napi_schedule(&tp
->napi
);
1120 static void intr_callback(struct urb
*urb
)
1124 int status
= urb
->status
;
1131 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1134 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1138 case 0: /* success */
1140 case -ECONNRESET
: /* unlink */
1142 netif_device_detach(tp
->netdev
);
1145 netif_info(tp
, intr
, tp
->netdev
,
1146 "Stop submitting intr, status %d\n", status
);
1149 netif_info(tp
, intr
, tp
->netdev
, "intr status -EOVERFLOW\n");
1151 /* -EPIPE: should clear the halt */
1153 netif_info(tp
, intr
, tp
->netdev
, "intr status %d\n", status
);
1157 d
= urb
->transfer_buffer
;
1158 if (INTR_LINK
& __le16_to_cpu(d
[0])) {
1159 if (!netif_carrier_ok(tp
->netdev
)) {
1160 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1161 schedule_delayed_work(&tp
->schedule
, 0);
1164 if (netif_carrier_ok(tp
->netdev
)) {
1165 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1166 schedule_delayed_work(&tp
->schedule
, 0);
1171 res
= usb_submit_urb(urb
, GFP_ATOMIC
);
1172 if (res
== -ENODEV
) {
1173 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1174 netif_device_detach(tp
->netdev
);
1176 netif_err(tp
, intr
, tp
->netdev
,
1177 "can't resubmit intr, status %d\n", res
);
1181 static inline void *rx_agg_align(void *data
)
1183 return (void *)ALIGN((uintptr_t)data
, RX_ALIGN
);
1186 static inline void *tx_agg_align(void *data
)
1188 return (void *)ALIGN((uintptr_t)data
, TX_ALIGN
);
1191 static void free_all_mem(struct r8152
*tp
)
1195 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1196 usb_free_urb(tp
->rx_info
[i
].urb
);
1197 tp
->rx_info
[i
].urb
= NULL
;
1199 kfree(tp
->rx_info
[i
].buffer
);
1200 tp
->rx_info
[i
].buffer
= NULL
;
1201 tp
->rx_info
[i
].head
= NULL
;
1204 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1205 usb_free_urb(tp
->tx_info
[i
].urb
);
1206 tp
->tx_info
[i
].urb
= NULL
;
1208 kfree(tp
->tx_info
[i
].buffer
);
1209 tp
->tx_info
[i
].buffer
= NULL
;
1210 tp
->tx_info
[i
].head
= NULL
;
1213 usb_free_urb(tp
->intr_urb
);
1214 tp
->intr_urb
= NULL
;
1216 kfree(tp
->intr_buff
);
1217 tp
->intr_buff
= NULL
;
1220 static int alloc_all_mem(struct r8152
*tp
)
1222 struct net_device
*netdev
= tp
->netdev
;
1223 struct usb_interface
*intf
= tp
->intf
;
1224 struct usb_host_interface
*alt
= intf
->cur_altsetting
;
1225 struct usb_host_endpoint
*ep_intr
= alt
->endpoint
+ 2;
1230 node
= netdev
->dev
.parent
? dev_to_node(netdev
->dev
.parent
) : -1;
1232 spin_lock_init(&tp
->rx_lock
);
1233 spin_lock_init(&tp
->tx_lock
);
1234 INIT_LIST_HEAD(&tp
->tx_free
);
1235 skb_queue_head_init(&tp
->tx_queue
);
1236 skb_queue_head_init(&tp
->rx_queue
);
1238 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1239 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1243 if (buf
!= rx_agg_align(buf
)) {
1245 buf
= kmalloc_node(agg_buf_sz
+ RX_ALIGN
, GFP_KERNEL
,
1251 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1257 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
1258 tp
->rx_info
[i
].context
= tp
;
1259 tp
->rx_info
[i
].urb
= urb
;
1260 tp
->rx_info
[i
].buffer
= buf
;
1261 tp
->rx_info
[i
].head
= rx_agg_align(buf
);
1264 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1265 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1269 if (buf
!= tx_agg_align(buf
)) {
1271 buf
= kmalloc_node(agg_buf_sz
+ TX_ALIGN
, GFP_KERNEL
,
1277 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1283 INIT_LIST_HEAD(&tp
->tx_info
[i
].list
);
1284 tp
->tx_info
[i
].context
= tp
;
1285 tp
->tx_info
[i
].urb
= urb
;
1286 tp
->tx_info
[i
].buffer
= buf
;
1287 tp
->tx_info
[i
].head
= tx_agg_align(buf
);
1289 list_add_tail(&tp
->tx_info
[i
].list
, &tp
->tx_free
);
1292 tp
->intr_urb
= usb_alloc_urb(0, GFP_KERNEL
);
1296 tp
->intr_buff
= kmalloc(INTBUFSIZE
, GFP_KERNEL
);
1300 tp
->intr_interval
= (int)ep_intr
->desc
.bInterval
;
1301 usb_fill_int_urb(tp
->intr_urb
, tp
->udev
, usb_rcvintpipe(tp
->udev
, 3),
1302 tp
->intr_buff
, INTBUFSIZE
, intr_callback
,
1303 tp
, tp
->intr_interval
);
1312 static struct tx_agg
*r8152_get_tx_agg(struct r8152
*tp
)
1314 struct tx_agg
*agg
= NULL
;
1315 unsigned long flags
;
1317 if (list_empty(&tp
->tx_free
))
1320 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1321 if (!list_empty(&tp
->tx_free
)) {
1322 struct list_head
*cursor
;
1324 cursor
= tp
->tx_free
.next
;
1325 list_del_init(cursor
);
1326 agg
= list_entry(cursor
, struct tx_agg
, list
);
1328 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1333 static inline __be16
get_protocol(struct sk_buff
*skb
)
1337 if (skb
->protocol
== htons(ETH_P_8021Q
))
1338 protocol
= vlan_eth_hdr(skb
)->h_vlan_encapsulated_proto
;
1340 protocol
= skb
->protocol
;
1345 /* r8152_csum_workaround()
1346 * The hw limites the value the transport offset. When the offset is out of the
1347 * range, calculate the checksum by sw.
1349 static void r8152_csum_workaround(struct r8152
*tp
, struct sk_buff
*skb
,
1350 struct sk_buff_head
*list
)
1352 if (skb_shinfo(skb
)->gso_size
) {
1353 netdev_features_t features
= tp
->netdev
->features
;
1354 struct sk_buff_head seg_list
;
1355 struct sk_buff
*segs
, *nskb
;
1357 features
&= ~(NETIF_F_SG
| NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
);
1358 segs
= skb_gso_segment(skb
, features
);
1359 if (IS_ERR(segs
) || !segs
)
1362 __skb_queue_head_init(&seg_list
);
1368 __skb_queue_tail(&seg_list
, nskb
);
1371 skb_queue_splice(&seg_list
, list
);
1373 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1374 if (skb_checksum_help(skb
) < 0)
1377 __skb_queue_head(list
, skb
);
1379 struct net_device_stats
*stats
;
1382 stats
= &tp
->netdev
->stats
;
1383 stats
->tx_dropped
++;
1388 /* msdn_giant_send_check()
1389 * According to the document of microsoft, the TCP Pseudo Header excludes the
1390 * packet length for IPv6 TCP large packets.
1392 static int msdn_giant_send_check(struct sk_buff
*skb
)
1394 const struct ipv6hdr
*ipv6h
;
1398 ret
= skb_cow_head(skb
, 0);
1402 ipv6h
= ipv6_hdr(skb
);
1406 th
->check
= ~tcp_v6_check(0, &ipv6h
->saddr
, &ipv6h
->daddr
, 0);
1411 static inline void rtl_tx_vlan_tag(struct tx_desc
*desc
, struct sk_buff
*skb
)
1413 if (skb_vlan_tag_present(skb
)) {
1416 opts2
= TX_VLAN_TAG
| swab16(skb_vlan_tag_get(skb
));
1417 desc
->opts2
|= cpu_to_le32(opts2
);
1421 static inline void rtl_rx_vlan_tag(struct rx_desc
*desc
, struct sk_buff
*skb
)
1423 u32 opts2
= le32_to_cpu(desc
->opts2
);
1425 if (opts2
& RX_VLAN_TAG
)
1426 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
),
1427 swab16(opts2
& 0xffff));
1430 static int r8152_tx_csum(struct r8152
*tp
, struct tx_desc
*desc
,
1431 struct sk_buff
*skb
, u32 len
, u32 transport_offset
)
1433 u32 mss
= skb_shinfo(skb
)->gso_size
;
1434 u32 opts1
, opts2
= 0;
1435 int ret
= TX_CSUM_SUCCESS
;
1437 WARN_ON_ONCE(len
> TX_LEN_MAX
);
1439 opts1
= len
| TX_FS
| TX_LS
;
1442 if (transport_offset
> GTTCPHO_MAX
) {
1443 netif_warn(tp
, tx_err
, tp
->netdev
,
1444 "Invalid transport offset 0x%x for TSO\n",
1450 switch (get_protocol(skb
)) {
1451 case htons(ETH_P_IP
):
1455 case htons(ETH_P_IPV6
):
1456 if (msdn_giant_send_check(skb
)) {
1468 opts1
|= transport_offset
<< GTTCPHO_SHIFT
;
1469 opts2
|= min(mss
, MSS_MAX
) << MSS_SHIFT
;
1470 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1473 if (transport_offset
> TCPHO_MAX
) {
1474 netif_warn(tp
, tx_err
, tp
->netdev
,
1475 "Invalid transport offset 0x%x\n",
1481 switch (get_protocol(skb
)) {
1482 case htons(ETH_P_IP
):
1484 ip_protocol
= ip_hdr(skb
)->protocol
;
1487 case htons(ETH_P_IPV6
):
1489 ip_protocol
= ipv6_hdr(skb
)->nexthdr
;
1493 ip_protocol
= IPPROTO_RAW
;
1497 if (ip_protocol
== IPPROTO_TCP
)
1499 else if (ip_protocol
== IPPROTO_UDP
)
1504 opts2
|= transport_offset
<< TCPHO_SHIFT
;
1507 desc
->opts2
= cpu_to_le32(opts2
);
1508 desc
->opts1
= cpu_to_le32(opts1
);
1514 static int r8152_tx_agg_fill(struct r8152
*tp
, struct tx_agg
*agg
)
1516 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1520 __skb_queue_head_init(&skb_head
);
1521 spin_lock(&tx_queue
->lock
);
1522 skb_queue_splice_init(tx_queue
, &skb_head
);
1523 spin_unlock(&tx_queue
->lock
);
1525 tx_data
= agg
->head
;
1528 remain
= agg_buf_sz
;
1530 while (remain
>= ETH_ZLEN
+ sizeof(struct tx_desc
)) {
1531 struct tx_desc
*tx_desc
;
1532 struct sk_buff
*skb
;
1536 skb
= __skb_dequeue(&skb_head
);
1540 len
= skb
->len
+ sizeof(*tx_desc
);
1543 __skb_queue_head(&skb_head
, skb
);
1547 tx_data
= tx_agg_align(tx_data
);
1548 tx_desc
= (struct tx_desc
*)tx_data
;
1550 offset
= (u32
)skb_transport_offset(skb
);
1552 if (r8152_tx_csum(tp
, tx_desc
, skb
, skb
->len
, offset
)) {
1553 r8152_csum_workaround(tp
, skb
, &skb_head
);
1557 rtl_tx_vlan_tag(tx_desc
, skb
);
1559 tx_data
+= sizeof(*tx_desc
);
1562 if (skb_copy_bits(skb
, 0, tx_data
, len
) < 0) {
1563 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1565 stats
->tx_dropped
++;
1566 dev_kfree_skb_any(skb
);
1567 tx_data
-= sizeof(*tx_desc
);
1572 agg
->skb_len
+= len
;
1575 dev_kfree_skb_any(skb
);
1577 remain
= agg_buf_sz
- (int)(tx_agg_align(tx_data
) - agg
->head
);
1580 if (!skb_queue_empty(&skb_head
)) {
1581 spin_lock(&tx_queue
->lock
);
1582 skb_queue_splice(&skb_head
, tx_queue
);
1583 spin_unlock(&tx_queue
->lock
);
1586 netif_tx_lock(tp
->netdev
);
1588 if (netif_queue_stopped(tp
->netdev
) &&
1589 skb_queue_len(&tp
->tx_queue
) < tp
->tx_qlen
)
1590 netif_wake_queue(tp
->netdev
);
1592 netif_tx_unlock(tp
->netdev
);
1594 ret
= usb_autopm_get_interface_async(tp
->intf
);
1598 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_sndbulkpipe(tp
->udev
, 2),
1599 agg
->head
, (int)(tx_data
- (u8
*)agg
->head
),
1600 (usb_complete_t
)write_bulk_callback
, agg
);
1602 ret
= usb_submit_urb(agg
->urb
, GFP_ATOMIC
);
1604 usb_autopm_put_interface_async(tp
->intf
);
1610 static u8
r8152_rx_csum(struct r8152
*tp
, struct rx_desc
*rx_desc
)
1612 u8 checksum
= CHECKSUM_NONE
;
1615 if (tp
->version
== RTL_VER_01
)
1618 opts2
= le32_to_cpu(rx_desc
->opts2
);
1619 opts3
= le32_to_cpu(rx_desc
->opts3
);
1621 if (opts2
& RD_IPV4_CS
) {
1623 checksum
= CHECKSUM_NONE
;
1624 else if ((opts2
& RD_UDP_CS
) && (opts3
& UDPF
))
1625 checksum
= CHECKSUM_NONE
;
1626 else if ((opts2
& RD_TCP_CS
) && (opts3
& TCPF
))
1627 checksum
= CHECKSUM_NONE
;
1629 checksum
= CHECKSUM_UNNECESSARY
;
1630 } else if (RD_IPV6_CS
) {
1631 if ((opts2
& RD_UDP_CS
) && !(opts3
& UDPF
))
1632 checksum
= CHECKSUM_UNNECESSARY
;
1633 else if ((opts2
& RD_TCP_CS
) && !(opts3
& TCPF
))
1634 checksum
= CHECKSUM_UNNECESSARY
;
1641 static int rx_bottom(struct r8152
*tp
, int budget
)
1643 unsigned long flags
;
1644 struct list_head
*cursor
, *next
, rx_queue
;
1645 int ret
= 0, work_done
= 0;
1647 if (!skb_queue_empty(&tp
->rx_queue
)) {
1648 while (work_done
< budget
) {
1649 struct sk_buff
*skb
= __skb_dequeue(&tp
->rx_queue
);
1650 struct net_device
*netdev
= tp
->netdev
;
1651 struct net_device_stats
*stats
= &netdev
->stats
;
1652 unsigned int pkt_len
;
1658 napi_gro_receive(&tp
->napi
, skb
);
1660 stats
->rx_packets
++;
1661 stats
->rx_bytes
+= pkt_len
;
1665 if (list_empty(&tp
->rx_done
))
1668 INIT_LIST_HEAD(&rx_queue
);
1669 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1670 list_splice_init(&tp
->rx_done
, &rx_queue
);
1671 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1673 list_for_each_safe(cursor
, next
, &rx_queue
) {
1674 struct rx_desc
*rx_desc
;
1680 list_del_init(cursor
);
1682 agg
= list_entry(cursor
, struct rx_agg
, list
);
1684 if (urb
->actual_length
< ETH_ZLEN
)
1687 rx_desc
= agg
->head
;
1688 rx_data
= agg
->head
;
1689 len_used
+= sizeof(struct rx_desc
);
1691 while (urb
->actual_length
> len_used
) {
1692 struct net_device
*netdev
= tp
->netdev
;
1693 struct net_device_stats
*stats
= &netdev
->stats
;
1694 unsigned int pkt_len
;
1695 struct sk_buff
*skb
;
1697 pkt_len
= le32_to_cpu(rx_desc
->opts1
) & RX_LEN_MASK
;
1698 if (pkt_len
< ETH_ZLEN
)
1701 len_used
+= pkt_len
;
1702 if (urb
->actual_length
< len_used
)
1705 pkt_len
-= CRC_SIZE
;
1706 rx_data
+= sizeof(struct rx_desc
);
1708 skb
= netdev_alloc_skb_ip_align(netdev
, pkt_len
);
1710 stats
->rx_dropped
++;
1714 skb
->ip_summed
= r8152_rx_csum(tp
, rx_desc
);
1715 memcpy(skb
->data
, rx_data
, pkt_len
);
1716 skb_put(skb
, pkt_len
);
1717 skb
->protocol
= eth_type_trans(skb
, netdev
);
1718 rtl_rx_vlan_tag(rx_desc
, skb
);
1719 if (work_done
< budget
) {
1720 napi_gro_receive(&tp
->napi
, skb
);
1722 stats
->rx_packets
++;
1723 stats
->rx_bytes
+= pkt_len
;
1725 __skb_queue_tail(&tp
->rx_queue
, skb
);
1729 rx_data
= rx_agg_align(rx_data
+ pkt_len
+ CRC_SIZE
);
1730 rx_desc
= (struct rx_desc
*)rx_data
;
1731 len_used
= (int)(rx_data
- (u8
*)agg
->head
);
1732 len_used
+= sizeof(struct rx_desc
);
1737 ret
= r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1739 urb
->actual_length
= 0;
1740 list_add_tail(&agg
->list
, next
);
1744 if (!list_empty(&rx_queue
)) {
1745 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1746 list_splice_tail(&rx_queue
, &tp
->rx_done
);
1747 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1754 static void tx_bottom(struct r8152
*tp
)
1761 if (skb_queue_empty(&tp
->tx_queue
))
1764 agg
= r8152_get_tx_agg(tp
);
1768 res
= r8152_tx_agg_fill(tp
, agg
);
1770 struct net_device
*netdev
= tp
->netdev
;
1772 if (res
== -ENODEV
) {
1773 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1774 netif_device_detach(netdev
);
1776 struct net_device_stats
*stats
= &netdev
->stats
;
1777 unsigned long flags
;
1779 netif_warn(tp
, tx_err
, netdev
,
1780 "failed tx_urb %d\n", res
);
1781 stats
->tx_dropped
+= agg
->skb_num
;
1783 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1784 list_add_tail(&agg
->list
, &tp
->tx_free
);
1785 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1791 static void bottom_half(struct r8152
*tp
)
1793 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1796 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1799 /* When link down, the driver would cancel all bulks. */
1800 /* This avoid the re-submitting bulk */
1801 if (!netif_carrier_ok(tp
->netdev
))
1804 clear_bit(SCHEDULE_NAPI
, &tp
->flags
);
1809 static int r8152_poll(struct napi_struct
*napi
, int budget
)
1811 struct r8152
*tp
= container_of(napi
, struct r8152
, napi
);
1814 work_done
= rx_bottom(tp
, budget
);
1817 if (work_done
< budget
) {
1818 napi_complete(napi
);
1819 if (!list_empty(&tp
->rx_done
))
1820 napi_schedule(napi
);
1827 int r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
)
1831 /* The rx would be stopped, so skip submitting */
1832 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) ||
1833 !test_bit(WORK_ENABLE
, &tp
->flags
) || !netif_carrier_ok(tp
->netdev
))
1836 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_rcvbulkpipe(tp
->udev
, 1),
1837 agg
->head
, agg_buf_sz
,
1838 (usb_complete_t
)read_bulk_callback
, agg
);
1840 ret
= usb_submit_urb(agg
->urb
, mem_flags
);
1841 if (ret
== -ENODEV
) {
1842 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1843 netif_device_detach(tp
->netdev
);
1845 struct urb
*urb
= agg
->urb
;
1846 unsigned long flags
;
1848 urb
->actual_length
= 0;
1849 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1850 list_add_tail(&agg
->list
, &tp
->rx_done
);
1851 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1853 netif_err(tp
, rx_err
, tp
->netdev
,
1854 "Couldn't submit rx[%p], ret = %d\n", agg
, ret
);
1856 napi_schedule(&tp
->napi
);
1862 static void rtl_drop_queued_tx(struct r8152
*tp
)
1864 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1865 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1866 struct sk_buff
*skb
;
1868 if (skb_queue_empty(tx_queue
))
1871 __skb_queue_head_init(&skb_head
);
1872 spin_lock_bh(&tx_queue
->lock
);
1873 skb_queue_splice_init(tx_queue
, &skb_head
);
1874 spin_unlock_bh(&tx_queue
->lock
);
1876 while ((skb
= __skb_dequeue(&skb_head
))) {
1878 stats
->tx_dropped
++;
1882 static void rtl8152_tx_timeout(struct net_device
*netdev
)
1884 struct r8152
*tp
= netdev_priv(netdev
);
1887 netif_warn(tp
, tx_err
, netdev
, "Tx timeout\n");
1888 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
1889 usb_unlink_urb(tp
->tx_info
[i
].urb
);
1892 static void rtl8152_set_rx_mode(struct net_device
*netdev
)
1894 struct r8152
*tp
= netdev_priv(netdev
);
1896 if (netif_carrier_ok(netdev
)) {
1897 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
1898 schedule_delayed_work(&tp
->schedule
, 0);
1902 static void _rtl8152_set_rx_mode(struct net_device
*netdev
)
1904 struct r8152
*tp
= netdev_priv(netdev
);
1905 u32 mc_filter
[2]; /* Multicast hash filter */
1909 clear_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
1910 netif_stop_queue(netdev
);
1911 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
1912 ocp_data
&= ~RCR_ACPT_ALL
;
1913 ocp_data
|= RCR_AB
| RCR_APM
;
1915 if (netdev
->flags
& IFF_PROMISC
) {
1916 /* Unconditionally log net taps. */
1917 netif_notice(tp
, link
, netdev
, "Promiscuous mode enabled\n");
1918 ocp_data
|= RCR_AM
| RCR_AAP
;
1919 mc_filter
[1] = 0xffffffff;
1920 mc_filter
[0] = 0xffffffff;
1921 } else if ((netdev_mc_count(netdev
) > multicast_filter_limit
) ||
1922 (netdev
->flags
& IFF_ALLMULTI
)) {
1923 /* Too many to filter perfectly -- accept all multicasts. */
1925 mc_filter
[1] = 0xffffffff;
1926 mc_filter
[0] = 0xffffffff;
1928 struct netdev_hw_addr
*ha
;
1932 netdev_for_each_mc_addr(ha
, netdev
) {
1933 int bit_nr
= ether_crc(ETH_ALEN
, ha
->addr
) >> 26;
1935 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
1940 tmp
[0] = __cpu_to_le32(swab32(mc_filter
[1]));
1941 tmp
[1] = __cpu_to_le32(swab32(mc_filter
[0]));
1943 pla_ocp_write(tp
, PLA_MAR
, BYTE_EN_DWORD
, sizeof(tmp
), tmp
);
1944 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
1945 netif_wake_queue(netdev
);
1948 static netdev_features_t
1949 rtl8152_features_check(struct sk_buff
*skb
, struct net_device
*dev
,
1950 netdev_features_t features
)
1952 u32 mss
= skb_shinfo(skb
)->gso_size
;
1953 int max_offset
= mss
? GTTCPHO_MAX
: TCPHO_MAX
;
1954 int offset
= skb_transport_offset(skb
);
1956 if ((mss
|| skb
->ip_summed
== CHECKSUM_PARTIAL
) && offset
> max_offset
)
1957 features
&= ~(NETIF_F_ALL_CSUM
| NETIF_F_GSO_MASK
);
1958 else if ((skb
->len
+ sizeof(struct tx_desc
)) > agg_buf_sz
)
1959 features
&= ~NETIF_F_GSO_MASK
;
1964 static netdev_tx_t
rtl8152_start_xmit(struct sk_buff
*skb
,
1965 struct net_device
*netdev
)
1967 struct r8152
*tp
= netdev_priv(netdev
);
1969 skb_tx_timestamp(skb
);
1971 skb_queue_tail(&tp
->tx_queue
, skb
);
1973 if (!list_empty(&tp
->tx_free
)) {
1974 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
1975 set_bit(SCHEDULE_NAPI
, &tp
->flags
);
1976 schedule_delayed_work(&tp
->schedule
, 0);
1978 usb_mark_last_busy(tp
->udev
);
1979 napi_schedule(&tp
->napi
);
1981 } else if (skb_queue_len(&tp
->tx_queue
) > tp
->tx_qlen
) {
1982 netif_stop_queue(netdev
);
1985 return NETDEV_TX_OK
;
1988 static void r8152b_reset_packet_filter(struct r8152
*tp
)
1992 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_FMC
);
1993 ocp_data
&= ~FMC_FCR_MCU_EN
;
1994 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
1995 ocp_data
|= FMC_FCR_MCU_EN
;
1996 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
1999 static void rtl8152_nic_reset(struct r8152
*tp
)
2003 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, CR_RST
);
2005 for (i
= 0; i
< 1000; i
++) {
2006 if (!(ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
) & CR_RST
))
2008 usleep_range(100, 400);
2012 static void set_tx_qlen(struct r8152
*tp
)
2014 struct net_device
*netdev
= tp
->netdev
;
2016 tp
->tx_qlen
= agg_buf_sz
/ (netdev
->mtu
+ VLAN_ETH_HLEN
+ VLAN_HLEN
+
2017 sizeof(struct tx_desc
));
2020 static inline u8
rtl8152_get_speed(struct r8152
*tp
)
2022 return ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_PHYSTATUS
);
2025 static void rtl_set_eee_plus(struct r8152
*tp
)
2030 speed
= rtl8152_get_speed(tp
);
2031 if (speed
& _10bps
) {
2032 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2033 ocp_data
|= EEEP_CR_EEEP_TX
;
2034 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2036 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
2037 ocp_data
&= ~EEEP_CR_EEEP_TX
;
2038 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
2042 static void rxdy_gated_en(struct r8152
*tp
, bool enable
)
2046 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
);
2048 ocp_data
|= RXDY_GATED_EN
;
2050 ocp_data
&= ~RXDY_GATED_EN
;
2051 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
, ocp_data
);
2054 static int rtl_start_rx(struct r8152
*tp
)
2058 napi_disable(&tp
->napi
);
2059 INIT_LIST_HEAD(&tp
->rx_done
);
2060 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
2061 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
2062 ret
= r8152_submit_rx(tp
, &tp
->rx_info
[i
], GFP_KERNEL
);
2066 napi_enable(&tp
->napi
);
2068 if (ret
&& ++i
< RTL8152_MAX_RX
) {
2069 struct list_head rx_queue
;
2070 unsigned long flags
;
2072 INIT_LIST_HEAD(&rx_queue
);
2075 struct rx_agg
*agg
= &tp
->rx_info
[i
++];
2076 struct urb
*urb
= agg
->urb
;
2078 urb
->actual_length
= 0;
2079 list_add_tail(&agg
->list
, &rx_queue
);
2080 } while (i
< RTL8152_MAX_RX
);
2082 spin_lock_irqsave(&tp
->rx_lock
, flags
);
2083 list_splice_tail(&rx_queue
, &tp
->rx_done
);
2084 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
2090 static int rtl_stop_rx(struct r8152
*tp
)
2094 for (i
= 0; i
< RTL8152_MAX_RX
; i
++)
2095 usb_kill_urb(tp
->rx_info
[i
].urb
);
2097 while (!skb_queue_empty(&tp
->rx_queue
))
2098 dev_kfree_skb(__skb_dequeue(&tp
->rx_queue
));
2103 static int rtl_enable(struct r8152
*tp
)
2107 r8152b_reset_packet_filter(tp
);
2109 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
);
2110 ocp_data
|= CR_RE
| CR_TE
;
2111 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, ocp_data
);
2113 rxdy_gated_en(tp
, false);
2118 static int rtl8152_enable(struct r8152
*tp
)
2120 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2124 rtl_set_eee_plus(tp
);
2126 return rtl_enable(tp
);
2129 static void r8153_set_rx_agg(struct r8152
*tp
)
2133 speed
= rtl8152_get_speed(tp
);
2134 if (speed
& _1000bps
) {
2135 if (tp
->udev
->speed
== USB_SPEED_SUPER
) {
2136 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
,
2138 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_EARLY_AGG
,
2141 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
,
2143 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_EARLY_AGG
,
2147 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_SLOW
);
2148 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_EARLY_AGG
,
2153 static int rtl8153_enable(struct r8152
*tp
)
2155 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2159 rtl_set_eee_plus(tp
);
2160 r8153_set_rx_agg(tp
);
2162 return rtl_enable(tp
);
2165 static void rtl_disable(struct r8152
*tp
)
2170 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2171 rtl_drop_queued_tx(tp
);
2175 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2176 ocp_data
&= ~RCR_ACPT_ALL
;
2177 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2179 rtl_drop_queued_tx(tp
);
2181 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
2182 usb_kill_urb(tp
->tx_info
[i
].urb
);
2184 rxdy_gated_en(tp
, true);
2186 for (i
= 0; i
< 1000; i
++) {
2187 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2188 if ((ocp_data
& FIFO_EMPTY
) == FIFO_EMPTY
)
2190 usleep_range(1000, 2000);
2193 for (i
= 0; i
< 1000; i
++) {
2194 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
) & TCR0_TX_EMPTY
)
2196 usleep_range(1000, 2000);
2201 rtl8152_nic_reset(tp
);
2204 static void r8152_power_cut_en(struct r8152
*tp
, bool enable
)
2208 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
);
2210 ocp_data
|= POWER_CUT
;
2212 ocp_data
&= ~POWER_CUT
;
2213 ocp_write_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
, ocp_data
);
2215 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
);
2216 ocp_data
&= ~RESUME_INDICATE
;
2217 ocp_write_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
, ocp_data
);
2220 static void rtl_rx_vlan_en(struct r8152
*tp
, bool enable
)
2224 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
2226 ocp_data
|= CPCR_RX_VLAN
;
2228 ocp_data
&= ~CPCR_RX_VLAN
;
2229 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
2232 static int rtl8152_set_features(struct net_device
*dev
,
2233 netdev_features_t features
)
2235 netdev_features_t changed
= features
^ dev
->features
;
2236 struct r8152
*tp
= netdev_priv(dev
);
2239 ret
= usb_autopm_get_interface(tp
->intf
);
2243 mutex_lock(&tp
->control
);
2245 if (changed
& NETIF_F_HW_VLAN_CTAG_RX
) {
2246 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
2247 rtl_rx_vlan_en(tp
, true);
2249 rtl_rx_vlan_en(tp
, false);
2252 mutex_unlock(&tp
->control
);
2254 usb_autopm_put_interface(tp
->intf
);
2260 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2262 static u32
__rtl_get_wol(struct r8152
*tp
)
2267 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2268 if (!(ocp_data
& LAN_WAKE_EN
))
2271 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2272 if (ocp_data
& LINK_ON_WAKE_EN
)
2273 wolopts
|= WAKE_PHY
;
2275 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2276 if (ocp_data
& UWF_EN
)
2277 wolopts
|= WAKE_UCAST
;
2278 if (ocp_data
& BWF_EN
)
2279 wolopts
|= WAKE_BCAST
;
2280 if (ocp_data
& MWF_EN
)
2281 wolopts
|= WAKE_MCAST
;
2283 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2284 if (ocp_data
& MAGIC_EN
)
2285 wolopts
|= WAKE_MAGIC
;
2290 static void __rtl_set_wol(struct r8152
*tp
, u32 wolopts
)
2294 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2296 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2297 ocp_data
&= ~LINK_ON_WAKE_EN
;
2298 if (wolopts
& WAKE_PHY
)
2299 ocp_data
|= LINK_ON_WAKE_EN
;
2300 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2302 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2303 ocp_data
&= ~(UWF_EN
| BWF_EN
| MWF_EN
| LAN_WAKE_EN
);
2304 if (wolopts
& WAKE_UCAST
)
2306 if (wolopts
& WAKE_BCAST
)
2308 if (wolopts
& WAKE_MCAST
)
2310 if (wolopts
& WAKE_ANY
)
2311 ocp_data
|= LAN_WAKE_EN
;
2312 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
, ocp_data
);
2314 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2316 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2317 ocp_data
&= ~MAGIC_EN
;
2318 if (wolopts
& WAKE_MAGIC
)
2319 ocp_data
|= MAGIC_EN
;
2320 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
, ocp_data
);
2322 if (wolopts
& WAKE_ANY
)
2323 device_set_wakeup_enable(&tp
->udev
->dev
, true);
2325 device_set_wakeup_enable(&tp
->udev
->dev
, false);
2328 static void rtl_runtime_suspend_enable(struct r8152
*tp
, bool enable
)
2333 __rtl_set_wol(tp
, WAKE_ANY
);
2335 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2337 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2338 ocp_data
|= LINK_OFF_WAKE_EN
;
2339 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2341 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2343 __rtl_set_wol(tp
, tp
->saved_wolopts
);
2347 static void rtl_phy_reset(struct r8152
*tp
)
2352 clear_bit(PHY_RESET
, &tp
->flags
);
2354 data
= r8152_mdio_read(tp
, MII_BMCR
);
2356 /* don't reset again before the previous one complete */
2357 if (data
& BMCR_RESET
)
2361 r8152_mdio_write(tp
, MII_BMCR
, data
);
2363 for (i
= 0; i
< 50; i
++) {
2365 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
2370 static void r8153_teredo_off(struct r8152
*tp
)
2374 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2375 ocp_data
&= ~(TEREDO_SEL
| TEREDO_RS_EVENT_MASK
| OOB_TEREDO_EN
);
2376 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2378 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_WDT6_CTRL
, WDT6_SET_MODE
);
2379 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_REALWOW_TIMER
, 0);
2380 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TEREDO_TIMER
, 0);
2383 static void r8152b_disable_aldps(struct r8152
*tp
)
2385 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPDNPS
| LINKENA
| DIS_SDSAVE
);
2389 static inline void r8152b_enable_aldps(struct r8152
*tp
)
2391 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPWRSAVE
| ENPDNPS
|
2392 LINKENA
| DIS_SDSAVE
);
2395 static void rtl8152_disable(struct r8152
*tp
)
2397 r8152b_disable_aldps(tp
);
2399 r8152b_enable_aldps(tp
);
2402 static void r8152b_hw_phy_cfg(struct r8152
*tp
)
2406 data
= r8152_mdio_read(tp
, MII_BMCR
);
2407 if (data
& BMCR_PDOWN
) {
2408 data
&= ~BMCR_PDOWN
;
2409 r8152_mdio_write(tp
, MII_BMCR
, data
);
2412 set_bit(PHY_RESET
, &tp
->flags
);
2415 static void r8152b_exit_oob(struct r8152
*tp
)
2420 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2421 ocp_data
&= ~RCR_ACPT_ALL
;
2422 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2424 rxdy_gated_en(tp
, true);
2425 r8153_teredo_off(tp
);
2426 r8152b_hw_phy_cfg(tp
);
2428 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2429 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, 0x00);
2431 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2432 ocp_data
&= ~NOW_IS_OOB
;
2433 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2435 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2436 ocp_data
&= ~MCU_BORW_EN
;
2437 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2439 for (i
= 0; i
< 1000; i
++) {
2440 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2441 if (ocp_data
& LINK_LIST_READY
)
2443 usleep_range(1000, 2000);
2446 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2447 ocp_data
|= RE_INIT_LL
;
2448 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2450 for (i
= 0; i
< 1000; i
++) {
2451 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2452 if (ocp_data
& LINK_LIST_READY
)
2454 usleep_range(1000, 2000);
2457 rtl8152_nic_reset(tp
);
2459 /* rx share fifo credit full threshold */
2460 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2462 if (tp
->udev
->speed
== USB_SPEED_FULL
||
2463 tp
->udev
->speed
== USB_SPEED_LOW
) {
2464 /* rx share fifo credit near full threshold */
2465 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2467 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2470 /* rx share fifo credit near full threshold */
2471 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2473 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2477 /* TX share fifo free credit full threshold */
2478 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL
);
2480 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_TX_AGG
, TX_AGG_MAX_THRESHOLD
);
2481 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_HIGH
);
2482 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_TX_DMA
,
2483 TEST_MODE_DISABLE
| TX_SIZE_ADJUST1
);
2485 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
2487 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2489 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2490 ocp_data
|= TCR0_AUTO_FIFO
;
2491 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2494 static void r8152b_enter_oob(struct r8152
*tp
)
2499 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2500 ocp_data
&= ~NOW_IS_OOB
;
2501 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2503 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_OOB
);
2504 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_OOB
);
2505 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_OOB
);
2509 for (i
= 0; i
< 1000; i
++) {
2510 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2511 if (ocp_data
& LINK_LIST_READY
)
2513 usleep_range(1000, 2000);
2516 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2517 ocp_data
|= RE_INIT_LL
;
2518 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2520 for (i
= 0; i
< 1000; i
++) {
2521 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2522 if (ocp_data
& LINK_LIST_READY
)
2524 usleep_range(1000, 2000);
2527 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2529 rtl_rx_vlan_en(tp
, true);
2531 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2532 ocp_data
|= ALDPS_PROXY_MODE
;
2533 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2535 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2536 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2537 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2539 rxdy_gated_en(tp
, false);
2541 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2542 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2543 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2546 static void r8153_hw_phy_cfg(struct r8152
*tp
)
2551 ocp_reg_write(tp
, OCP_ADC_CFG
, CKADSEL_L
| ADC_EN
| EN_EMI_L
);
2552 data
= r8152_mdio_read(tp
, MII_BMCR
);
2553 if (data
& BMCR_PDOWN
) {
2554 data
&= ~BMCR_PDOWN
;
2555 r8152_mdio_write(tp
, MII_BMCR
, data
);
2558 if (tp
->version
== RTL_VER_03
) {
2559 data
= ocp_reg_read(tp
, OCP_EEE_CFG
);
2560 data
&= ~CTAP_SHORT_EN
;
2561 ocp_reg_write(tp
, OCP_EEE_CFG
, data
);
2564 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2565 data
|= EEE_CLKDIV_EN
;
2566 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2568 data
= ocp_reg_read(tp
, OCP_DOWN_SPEED
);
2569 data
|= EN_10M_BGOFF
;
2570 ocp_reg_write(tp
, OCP_DOWN_SPEED
, data
);
2571 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2572 data
|= EN_10M_PLLOFF
;
2573 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2574 sram_write(tp
, SRAM_IMPEDANCE
, 0x0b13);
2576 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
2577 ocp_data
|= PFM_PWM_SWITCH
;
2578 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
2580 /* Enable LPF corner auto tune */
2581 sram_write(tp
, SRAM_LPF_CFG
, 0xf70f);
2583 /* Adjust 10M Amplitude */
2584 sram_write(tp
, SRAM_10M_AMP1
, 0x00af);
2585 sram_write(tp
, SRAM_10M_AMP2
, 0x0208);
2587 set_bit(PHY_RESET
, &tp
->flags
);
2590 static void r8153_u1u2en(struct r8152
*tp
, bool enable
)
2595 memset(u1u2
, 0xff, sizeof(u1u2
));
2597 memset(u1u2
, 0x00, sizeof(u1u2
));
2599 usb_ocp_write(tp
, USB_TOLERANCE
, BYTE_EN_SIX_BYTES
, sizeof(u1u2
), u1u2
);
2602 static void r8153_u2p3en(struct r8152
*tp
, bool enable
)
2606 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
);
2608 ocp_data
|= U2P3_ENABLE
;
2610 ocp_data
&= ~U2P3_ENABLE
;
2611 ocp_write_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
, ocp_data
);
2614 static void r8153_power_cut_en(struct r8152
*tp
, bool enable
)
2618 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
2620 ocp_data
|= PWR_EN
| PHASE2_EN
;
2622 ocp_data
&= ~(PWR_EN
| PHASE2_EN
);
2623 ocp_write_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
2625 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
2626 ocp_data
&= ~PCUT_STATUS
;
2627 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
2630 static void r8153_first_init(struct r8152
*tp
)
2635 rxdy_gated_en(tp
, true);
2636 r8153_teredo_off(tp
);
2638 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2639 ocp_data
&= ~RCR_ACPT_ALL
;
2640 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2642 r8153_hw_phy_cfg(tp
);
2644 rtl8152_nic_reset(tp
);
2646 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2647 ocp_data
&= ~NOW_IS_OOB
;
2648 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2650 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2651 ocp_data
&= ~MCU_BORW_EN
;
2652 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2654 for (i
= 0; i
< 1000; i
++) {
2655 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2656 if (ocp_data
& LINK_LIST_READY
)
2658 usleep_range(1000, 2000);
2661 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2662 ocp_data
|= RE_INIT_LL
;
2663 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2665 for (i
= 0; i
< 1000; i
++) {
2666 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2667 if (ocp_data
& LINK_LIST_READY
)
2669 usleep_range(1000, 2000);
2672 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
2674 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8153_RMS
);
2675 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_MTPS
, MTPS_JUMBO
);
2677 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2678 ocp_data
|= TCR0_AUTO_FIFO
;
2679 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2681 rtl8152_nic_reset(tp
);
2683 /* rx share fifo credit full threshold */
2684 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2685 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_NORMAL
);
2686 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_NORMAL
);
2687 /* TX share fifo free credit full threshold */
2688 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL2
);
2690 /* rx aggregation */
2691 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
2692 ocp_data
&= ~RX_AGG_DISABLE
;
2693 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
2696 static void r8153_enter_oob(struct r8152
*tp
)
2701 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2702 ocp_data
&= ~NOW_IS_OOB
;
2703 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2707 for (i
= 0; i
< 1000; i
++) {
2708 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2709 if (ocp_data
& LINK_LIST_READY
)
2711 usleep_range(1000, 2000);
2714 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2715 ocp_data
|= RE_INIT_LL
;
2716 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2718 for (i
= 0; i
< 1000; i
++) {
2719 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2720 if (ocp_data
& LINK_LIST_READY
)
2722 usleep_range(1000, 2000);
2725 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8153_RMS
);
2727 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2728 ocp_data
&= ~TEREDO_WAKE_MASK
;
2729 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2731 rtl_rx_vlan_en(tp
, true);
2733 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2734 ocp_data
|= ALDPS_PROXY_MODE
;
2735 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2737 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2738 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2739 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2741 rxdy_gated_en(tp
, false);
2743 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2744 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2745 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2748 static void r8153_disable_aldps(struct r8152
*tp
)
2752 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2754 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2758 static void r8153_enable_aldps(struct r8152
*tp
)
2762 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2764 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2767 static void rtl8153_disable(struct r8152
*tp
)
2769 r8153_disable_aldps(tp
);
2771 r8153_enable_aldps(tp
);
2774 static int rtl8152_set_speed(struct r8152
*tp
, u8 autoneg
, u16 speed
, u8 duplex
)
2776 u16 bmcr
, anar
, gbcr
;
2779 cancel_delayed_work_sync(&tp
->schedule
);
2780 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
2781 anar
&= ~(ADVERTISE_10HALF
| ADVERTISE_10FULL
|
2782 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
2783 if (tp
->mii
.supports_gmii
) {
2784 gbcr
= r8152_mdio_read(tp
, MII_CTRL1000
);
2785 gbcr
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
2790 if (autoneg
== AUTONEG_DISABLE
) {
2791 if (speed
== SPEED_10
) {
2793 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2794 } else if (speed
== SPEED_100
) {
2795 bmcr
= BMCR_SPEED100
;
2796 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2797 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2798 bmcr
= BMCR_SPEED1000
;
2799 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2805 if (duplex
== DUPLEX_FULL
)
2806 bmcr
|= BMCR_FULLDPLX
;
2808 if (speed
== SPEED_10
) {
2809 if (duplex
== DUPLEX_FULL
)
2810 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2812 anar
|= ADVERTISE_10HALF
;
2813 } else if (speed
== SPEED_100
) {
2814 if (duplex
== DUPLEX_FULL
) {
2815 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2816 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2818 anar
|= ADVERTISE_10HALF
;
2819 anar
|= ADVERTISE_100HALF
;
2821 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2822 if (duplex
== DUPLEX_FULL
) {
2823 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2824 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2825 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2827 anar
|= ADVERTISE_10HALF
;
2828 anar
|= ADVERTISE_100HALF
;
2829 gbcr
|= ADVERTISE_1000HALF
;
2836 bmcr
= BMCR_ANENABLE
| BMCR_ANRESTART
;
2839 if (test_bit(PHY_RESET
, &tp
->flags
))
2842 if (tp
->mii
.supports_gmii
)
2843 r8152_mdio_write(tp
, MII_CTRL1000
, gbcr
);
2845 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
2846 r8152_mdio_write(tp
, MII_BMCR
, bmcr
);
2848 if (test_bit(PHY_RESET
, &tp
->flags
)) {
2851 clear_bit(PHY_RESET
, &tp
->flags
);
2852 for (i
= 0; i
< 50; i
++) {
2854 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
2864 static void rtl8152_up(struct r8152
*tp
)
2866 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2869 r8152b_disable_aldps(tp
);
2870 r8152b_exit_oob(tp
);
2871 r8152b_enable_aldps(tp
);
2874 static void rtl8152_down(struct r8152
*tp
)
2876 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2877 rtl_drop_queued_tx(tp
);
2881 r8152_power_cut_en(tp
, false);
2882 r8152b_disable_aldps(tp
);
2883 r8152b_enter_oob(tp
);
2884 r8152b_enable_aldps(tp
);
2887 static void rtl8153_up(struct r8152
*tp
)
2889 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2892 r8153_disable_aldps(tp
);
2893 r8153_first_init(tp
);
2894 r8153_enable_aldps(tp
);
2897 static void rtl8153_down(struct r8152
*tp
)
2899 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2900 rtl_drop_queued_tx(tp
);
2904 r8153_u1u2en(tp
, false);
2905 r8153_power_cut_en(tp
, false);
2906 r8153_disable_aldps(tp
);
2907 r8153_enter_oob(tp
);
2908 r8153_enable_aldps(tp
);
2911 static void set_carrier(struct r8152
*tp
)
2913 struct net_device
*netdev
= tp
->netdev
;
2916 clear_bit(RTL8152_LINK_CHG
, &tp
->flags
);
2917 speed
= rtl8152_get_speed(tp
);
2919 if (speed
& LINK_STATUS
) {
2920 if (!netif_carrier_ok(netdev
)) {
2921 tp
->rtl_ops
.enable(tp
);
2922 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
2923 netif_carrier_on(netdev
);
2927 if (netif_carrier_ok(netdev
)) {
2928 netif_carrier_off(netdev
);
2929 napi_disable(&tp
->napi
);
2930 tp
->rtl_ops
.disable(tp
);
2931 napi_enable(&tp
->napi
);
2936 static void rtl_work_func_t(struct work_struct
*work
)
2938 struct r8152
*tp
= container_of(work
, struct r8152
, schedule
.work
);
2940 /* If the device is unplugged or !netif_running(), the workqueue
2941 * doesn't need to wake the device, and could return directly.
2943 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
) || !netif_running(tp
->netdev
))
2946 if (usb_autopm_get_interface(tp
->intf
) < 0)
2949 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
2952 if (!mutex_trylock(&tp
->control
)) {
2953 schedule_delayed_work(&tp
->schedule
, 0);
2957 if (test_bit(RTL8152_LINK_CHG
, &tp
->flags
))
2960 if (test_bit(RTL8152_SET_RX_MODE
, &tp
->flags
))
2961 _rtl8152_set_rx_mode(tp
->netdev
);
2963 /* don't schedule napi before linking */
2964 if (test_bit(SCHEDULE_NAPI
, &tp
->flags
) &&
2965 netif_carrier_ok(tp
->netdev
)) {
2966 clear_bit(SCHEDULE_NAPI
, &tp
->flags
);
2967 napi_schedule(&tp
->napi
);
2970 if (test_bit(PHY_RESET
, &tp
->flags
))
2973 mutex_unlock(&tp
->control
);
2976 usb_autopm_put_interface(tp
->intf
);
2979 static int rtl8152_open(struct net_device
*netdev
)
2981 struct r8152
*tp
= netdev_priv(netdev
);
2984 res
= alloc_all_mem(tp
);
2988 netif_carrier_off(netdev
);
2990 res
= usb_autopm_get_interface(tp
->intf
);
2996 mutex_lock(&tp
->control
);
2998 /* The WORK_ENABLE may be set when autoresume occurs */
2999 if (test_bit(WORK_ENABLE
, &tp
->flags
)) {
3000 clear_bit(WORK_ENABLE
, &tp
->flags
);
3001 usb_kill_urb(tp
->intr_urb
);
3002 cancel_delayed_work_sync(&tp
->schedule
);
3004 /* disable the tx/rx, if the workqueue has enabled them. */
3005 if (netif_carrier_ok(netdev
))
3006 tp
->rtl_ops
.disable(tp
);
3011 rtl8152_set_speed(tp
, AUTONEG_ENABLE
,
3012 tp
->mii
.supports_gmii
? SPEED_1000
: SPEED_100
,
3014 netif_carrier_off(netdev
);
3015 netif_start_queue(netdev
);
3016 set_bit(WORK_ENABLE
, &tp
->flags
);
3018 res
= usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
3021 netif_device_detach(tp
->netdev
);
3022 netif_warn(tp
, ifup
, netdev
, "intr_urb submit failed: %d\n",
3026 napi_enable(&tp
->napi
);
3029 mutex_unlock(&tp
->control
);
3031 usb_autopm_put_interface(tp
->intf
);
3037 static int rtl8152_close(struct net_device
*netdev
)
3039 struct r8152
*tp
= netdev_priv(netdev
);
3042 napi_disable(&tp
->napi
);
3043 clear_bit(WORK_ENABLE
, &tp
->flags
);
3044 usb_kill_urb(tp
->intr_urb
);
3045 cancel_delayed_work_sync(&tp
->schedule
);
3046 netif_stop_queue(netdev
);
3048 res
= usb_autopm_get_interface(tp
->intf
);
3049 if (res
< 0 || test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
3050 rtl_drop_queued_tx(tp
);
3053 mutex_lock(&tp
->control
);
3055 /* The autosuspend may have been enabled and wouldn't
3056 * be disable when autoresume occurs, because the
3057 * netif_running() would be false.
3059 rtl_runtime_suspend_enable(tp
, false);
3061 tp
->rtl_ops
.down(tp
);
3063 mutex_unlock(&tp
->control
);
3065 usb_autopm_put_interface(tp
->intf
);
3073 static inline void r8152_mmd_indirect(struct r8152
*tp
, u16 dev
, u16 reg
)
3075 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_ADDR
| dev
);
3076 ocp_reg_write(tp
, OCP_EEE_DATA
, reg
);
3077 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_DATA
| dev
);
3080 static u16
r8152_mmd_read(struct r8152
*tp
, u16 dev
, u16 reg
)
3084 r8152_mmd_indirect(tp
, dev
, reg
);
3085 data
= ocp_reg_read(tp
, OCP_EEE_DATA
);
3086 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
3091 static void r8152_mmd_write(struct r8152
*tp
, u16 dev
, u16 reg
, u16 data
)
3093 r8152_mmd_indirect(tp
, dev
, reg
);
3094 ocp_reg_write(tp
, OCP_EEE_DATA
, data
);
3095 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
3098 static void r8152_eee_en(struct r8152
*tp
, bool enable
)
3100 u16 config1
, config2
, config3
;
3103 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3104 config1
= ocp_reg_read(tp
, OCP_EEE_CONFIG1
) & ~sd_rise_time_mask
;
3105 config2
= ocp_reg_read(tp
, OCP_EEE_CONFIG2
);
3106 config3
= ocp_reg_read(tp
, OCP_EEE_CONFIG3
) & ~fast_snr_mask
;
3109 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
3110 config1
|= EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
| RX_QUIET_EN
;
3111 config1
|= sd_rise_time(1);
3112 config2
|= RG_DACQUIET_EN
| RG_LDVQUIET_EN
;
3113 config3
|= fast_snr(42);
3115 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
3116 config1
&= ~(EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
|
3118 config1
|= sd_rise_time(7);
3119 config2
&= ~(RG_DACQUIET_EN
| RG_LDVQUIET_EN
);
3120 config3
|= fast_snr(511);
3123 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
3124 ocp_reg_write(tp
, OCP_EEE_CONFIG1
, config1
);
3125 ocp_reg_write(tp
, OCP_EEE_CONFIG2
, config2
);
3126 ocp_reg_write(tp
, OCP_EEE_CONFIG3
, config3
);
3129 static void r8152b_enable_eee(struct r8152
*tp
)
3131 r8152_eee_en(tp
, true);
3132 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, MDIO_EEE_100TX
);
3135 static void r8153_eee_en(struct r8152
*tp
, bool enable
)
3140 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3141 config
= ocp_reg_read(tp
, OCP_EEE_CFG
);
3144 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
3147 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
3148 config
&= ~EEE10_EN
;
3151 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
3152 ocp_reg_write(tp
, OCP_EEE_CFG
, config
);
3155 static void r8153_enable_eee(struct r8152
*tp
)
3157 r8153_eee_en(tp
, true);
3158 ocp_reg_write(tp
, OCP_EEE_ADV
, MDIO_EEE_1000T
| MDIO_EEE_100TX
);
3161 static void r8152b_enable_fc(struct r8152
*tp
)
3165 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
3166 anar
|= ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
;
3167 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
3170 static void rtl_tally_reset(struct r8152
*tp
)
3174 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
);
3175 ocp_data
|= TALLY_RESET
;
3176 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
, ocp_data
);
3179 static void r8152b_init(struct r8152
*tp
)
3183 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3186 r8152b_disable_aldps(tp
);
3188 if (tp
->version
== RTL_VER_01
) {
3189 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
3190 ocp_data
&= ~LED_MODE_MASK
;
3191 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
3194 r8152_power_cut_en(tp
, false);
3196 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
3197 ocp_data
|= TX_10M_IDLE_EN
| PFM_PWM_SWITCH
;
3198 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
3199 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
);
3200 ocp_data
&= ~MCU_CLK_RATIO_MASK
;
3201 ocp_data
|= MCU_CLK_RATIO
| D3_CLK_GATED_EN
;
3202 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ocp_data
);
3203 ocp_data
= GPHY_STS_MSK
| SPEED_DOWN_MSK
|
3204 SPDWN_RXDV_MSK
| SPDWN_LINKCHG_MSK
;
3205 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_GPHY_INTR_IMR
, ocp_data
);
3207 r8152b_enable_eee(tp
);
3208 r8152b_enable_aldps(tp
);
3209 r8152b_enable_fc(tp
);
3210 rtl_tally_reset(tp
);
3212 /* enable rx aggregation */
3213 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
3214 ocp_data
&= ~RX_AGG_DISABLE
;
3215 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
3218 static void r8153_init(struct r8152
*tp
)
3223 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3226 r8153_disable_aldps(tp
);
3227 r8153_u1u2en(tp
, false);
3229 for (i
= 0; i
< 500; i
++) {
3230 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BOOT_CTRL
) &
3236 for (i
= 0; i
< 500; i
++) {
3237 ocp_data
= ocp_reg_read(tp
, OCP_PHY_STATUS
) & PHY_STAT_MASK
;
3238 if (ocp_data
== PHY_STAT_LAN_ON
|| ocp_data
== PHY_STAT_PWRDN
)
3243 r8153_u2p3en(tp
, false);
3245 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
);
3246 ocp_data
&= ~TIMER11_EN
;
3247 ocp_write_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
, ocp_data
);
3249 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
3250 ocp_data
&= ~LED_MODE_MASK
;
3251 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
3253 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_LPM_CTRL
);
3254 ocp_data
&= ~LPM_TIMER_MASK
;
3255 if (tp
->version
== RTL_VER_04
&& tp
->udev
->speed
!= USB_SPEED_SUPER
)
3256 ocp_data
|= LPM_TIMER_500MS
;
3258 ocp_data
|= LPM_TIMER_500US
;
3259 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_LPM_CTRL
, ocp_data
);
3261 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
);
3262 ocp_data
&= ~SEN_VAL_MASK
;
3263 ocp_data
|= SEN_VAL_NORMAL
| SEL_RXIDLE
;
3264 ocp_write_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
, ocp_data
);
3266 r8153_power_cut_en(tp
, false);
3267 r8153_u1u2en(tp
, true);
3269 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ALDPS_SPDWN_RATIO
);
3270 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
, EEE_SPDWN_RATIO
);
3271 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
,
3272 PKT_AVAIL_SPDWN_EN
| SUSPEND_SPDWN_EN
|
3273 U1U2_SPDWN_EN
| L1_SPDWN_EN
);
3274 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL4
,
3275 PWRSAVE_SPDWN_EN
| RXDV_SPDWN_EN
| TX10MIDLE_EN
|
3276 TP100_SPDWN_EN
| TP500_SPDWN_EN
| TP1000_SPDWN_EN
|
3279 r8153_enable_eee(tp
);
3280 r8153_enable_aldps(tp
);
3281 r8152b_enable_fc(tp
);
3282 rtl_tally_reset(tp
);
3285 static int rtl8152_suspend(struct usb_interface
*intf
, pm_message_t message
)
3287 struct r8152
*tp
= usb_get_intfdata(intf
);
3288 struct net_device
*netdev
= tp
->netdev
;
3291 mutex_lock(&tp
->control
);
3293 if (PMSG_IS_AUTO(message
)) {
3294 if (netif_running(netdev
) && work_busy(&tp
->schedule
.work
)) {
3299 set_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3301 netif_device_detach(netdev
);
3304 if (netif_running(netdev
) && test_bit(WORK_ENABLE
, &tp
->flags
)) {
3305 clear_bit(WORK_ENABLE
, &tp
->flags
);
3306 usb_kill_urb(tp
->intr_urb
);
3307 napi_disable(&tp
->napi
);
3308 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3310 rtl_runtime_suspend_enable(tp
, true);
3312 cancel_delayed_work_sync(&tp
->schedule
);
3313 tp
->rtl_ops
.down(tp
);
3315 napi_enable(&tp
->napi
);
3318 mutex_unlock(&tp
->control
);
3323 static int rtl8152_resume(struct usb_interface
*intf
)
3325 struct r8152
*tp
= usb_get_intfdata(intf
);
3327 mutex_lock(&tp
->control
);
3329 if (!test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3330 tp
->rtl_ops
.init(tp
);
3331 netif_device_attach(tp
->netdev
);
3334 if (netif_running(tp
->netdev
)) {
3335 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3336 rtl_runtime_suspend_enable(tp
, false);
3337 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3338 set_bit(WORK_ENABLE
, &tp
->flags
);
3339 if (netif_carrier_ok(tp
->netdev
))
3343 rtl8152_set_speed(tp
, AUTONEG_ENABLE
,
3344 tp
->mii
.supports_gmii
?
3345 SPEED_1000
: SPEED_100
,
3347 netif_carrier_off(tp
->netdev
);
3348 set_bit(WORK_ENABLE
, &tp
->flags
);
3350 usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
3351 } else if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3352 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3355 mutex_unlock(&tp
->control
);
3360 static void rtl8152_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
3362 struct r8152
*tp
= netdev_priv(dev
);
3364 if (usb_autopm_get_interface(tp
->intf
) < 0)
3367 mutex_lock(&tp
->control
);
3369 wol
->supported
= WAKE_ANY
;
3370 wol
->wolopts
= __rtl_get_wol(tp
);
3372 mutex_unlock(&tp
->control
);
3374 usb_autopm_put_interface(tp
->intf
);
3377 static int rtl8152_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
3379 struct r8152
*tp
= netdev_priv(dev
);
3382 ret
= usb_autopm_get_interface(tp
->intf
);
3386 mutex_lock(&tp
->control
);
3388 __rtl_set_wol(tp
, wol
->wolopts
);
3389 tp
->saved_wolopts
= wol
->wolopts
& WAKE_ANY
;
3391 mutex_unlock(&tp
->control
);
3393 usb_autopm_put_interface(tp
->intf
);
3399 static u32
rtl8152_get_msglevel(struct net_device
*dev
)
3401 struct r8152
*tp
= netdev_priv(dev
);
3403 return tp
->msg_enable
;
3406 static void rtl8152_set_msglevel(struct net_device
*dev
, u32 value
)
3408 struct r8152
*tp
= netdev_priv(dev
);
3410 tp
->msg_enable
= value
;
3413 static void rtl8152_get_drvinfo(struct net_device
*netdev
,
3414 struct ethtool_drvinfo
*info
)
3416 struct r8152
*tp
= netdev_priv(netdev
);
3418 strlcpy(info
->driver
, MODULENAME
, sizeof(info
->driver
));
3419 strlcpy(info
->version
, DRIVER_VERSION
, sizeof(info
->version
));
3420 usb_make_path(tp
->udev
, info
->bus_info
, sizeof(info
->bus_info
));
3424 int rtl8152_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
3426 struct r8152
*tp
= netdev_priv(netdev
);
3429 if (!tp
->mii
.mdio_read
)
3432 ret
= usb_autopm_get_interface(tp
->intf
);
3436 mutex_lock(&tp
->control
);
3438 ret
= mii_ethtool_gset(&tp
->mii
, cmd
);
3440 mutex_unlock(&tp
->control
);
3442 usb_autopm_put_interface(tp
->intf
);
3448 static int rtl8152_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
3450 struct r8152
*tp
= netdev_priv(dev
);
3453 ret
= usb_autopm_get_interface(tp
->intf
);
3457 mutex_lock(&tp
->control
);
3459 ret
= rtl8152_set_speed(tp
, cmd
->autoneg
, cmd
->speed
, cmd
->duplex
);
3461 mutex_unlock(&tp
->control
);
3463 usb_autopm_put_interface(tp
->intf
);
3469 static const char rtl8152_gstrings
[][ETH_GSTRING_LEN
] = {
3476 "tx_single_collisions",
3477 "tx_multi_collisions",
3485 static int rtl8152_get_sset_count(struct net_device
*dev
, int sset
)
3489 return ARRAY_SIZE(rtl8152_gstrings
);
3495 static void rtl8152_get_ethtool_stats(struct net_device
*dev
,
3496 struct ethtool_stats
*stats
, u64
*data
)
3498 struct r8152
*tp
= netdev_priv(dev
);
3499 struct tally_counter tally
;
3501 if (usb_autopm_get_interface(tp
->intf
) < 0)
3504 generic_ocp_read(tp
, PLA_TALLYCNT
, sizeof(tally
), &tally
, MCU_TYPE_PLA
);
3506 usb_autopm_put_interface(tp
->intf
);
3508 data
[0] = le64_to_cpu(tally
.tx_packets
);
3509 data
[1] = le64_to_cpu(tally
.rx_packets
);
3510 data
[2] = le64_to_cpu(tally
.tx_errors
);
3511 data
[3] = le32_to_cpu(tally
.rx_errors
);
3512 data
[4] = le16_to_cpu(tally
.rx_missed
);
3513 data
[5] = le16_to_cpu(tally
.align_errors
);
3514 data
[6] = le32_to_cpu(tally
.tx_one_collision
);
3515 data
[7] = le32_to_cpu(tally
.tx_multi_collision
);
3516 data
[8] = le64_to_cpu(tally
.rx_unicast
);
3517 data
[9] = le64_to_cpu(tally
.rx_broadcast
);
3518 data
[10] = le32_to_cpu(tally
.rx_multicast
);
3519 data
[11] = le16_to_cpu(tally
.tx_aborted
);
3520 data
[12] = le16_to_cpu(tally
.tx_underrun
);
3523 static void rtl8152_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
3525 switch (stringset
) {
3527 memcpy(data
, *rtl8152_gstrings
, sizeof(rtl8152_gstrings
));
3532 static int r8152_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3534 u32 ocp_data
, lp
, adv
, supported
= 0;
3537 val
= r8152_mmd_read(tp
, MDIO_MMD_PCS
, MDIO_PCS_EEE_ABLE
);
3538 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
3540 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
);
3541 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
3543 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_LPABLE
);
3544 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
3546 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3547 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
3549 eee
->eee_enabled
= !!ocp_data
;
3550 eee
->eee_active
= !!(supported
& adv
& lp
);
3551 eee
->supported
= supported
;
3552 eee
->advertised
= adv
;
3553 eee
->lp_advertised
= lp
;
3558 static int r8152_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3560 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
3562 r8152_eee_en(tp
, eee
->eee_enabled
);
3564 if (!eee
->eee_enabled
)
3567 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, val
);
3572 static int r8153_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3574 u32 ocp_data
, lp
, adv
, supported
= 0;
3577 val
= ocp_reg_read(tp
, OCP_EEE_ABLE
);
3578 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
3580 val
= ocp_reg_read(tp
, OCP_EEE_ADV
);
3581 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
3583 val
= ocp_reg_read(tp
, OCP_EEE_LPABLE
);
3584 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
3586 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3587 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
3589 eee
->eee_enabled
= !!ocp_data
;
3590 eee
->eee_active
= !!(supported
& adv
& lp
);
3591 eee
->supported
= supported
;
3592 eee
->advertised
= adv
;
3593 eee
->lp_advertised
= lp
;
3598 static int r8153_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3600 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
3602 r8153_eee_en(tp
, eee
->eee_enabled
);
3604 if (!eee
->eee_enabled
)
3607 ocp_reg_write(tp
, OCP_EEE_ADV
, val
);
3613 rtl_ethtool_get_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
3615 struct r8152
*tp
= netdev_priv(net
);
3618 ret
= usb_autopm_get_interface(tp
->intf
);
3622 mutex_lock(&tp
->control
);
3624 ret
= tp
->rtl_ops
.eee_get(tp
, edata
);
3626 mutex_unlock(&tp
->control
);
3628 usb_autopm_put_interface(tp
->intf
);
3635 rtl_ethtool_set_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
3637 struct r8152
*tp
= netdev_priv(net
);
3640 ret
= usb_autopm_get_interface(tp
->intf
);
3644 mutex_lock(&tp
->control
);
3646 ret
= tp
->rtl_ops
.eee_set(tp
, edata
);
3648 ret
= mii_nway_restart(&tp
->mii
);
3650 mutex_unlock(&tp
->control
);
3652 usb_autopm_put_interface(tp
->intf
);
3658 static int rtl8152_nway_reset(struct net_device
*dev
)
3660 struct r8152
*tp
= netdev_priv(dev
);
3663 ret
= usb_autopm_get_interface(tp
->intf
);
3667 mutex_lock(&tp
->control
);
3669 ret
= mii_nway_restart(&tp
->mii
);
3671 mutex_unlock(&tp
->control
);
3673 usb_autopm_put_interface(tp
->intf
);
3679 static struct ethtool_ops ops
= {
3680 .get_drvinfo
= rtl8152_get_drvinfo
,
3681 .get_settings
= rtl8152_get_settings
,
3682 .set_settings
= rtl8152_set_settings
,
3683 .get_link
= ethtool_op_get_link
,
3684 .nway_reset
= rtl8152_nway_reset
,
3685 .get_msglevel
= rtl8152_get_msglevel
,
3686 .set_msglevel
= rtl8152_set_msglevel
,
3687 .get_wol
= rtl8152_get_wol
,
3688 .set_wol
= rtl8152_set_wol
,
3689 .get_strings
= rtl8152_get_strings
,
3690 .get_sset_count
= rtl8152_get_sset_count
,
3691 .get_ethtool_stats
= rtl8152_get_ethtool_stats
,
3692 .get_eee
= rtl_ethtool_get_eee
,
3693 .set_eee
= rtl_ethtool_set_eee
,
3696 static int rtl8152_ioctl(struct net_device
*netdev
, struct ifreq
*rq
, int cmd
)
3698 struct r8152
*tp
= netdev_priv(netdev
);
3699 struct mii_ioctl_data
*data
= if_mii(rq
);
3702 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3705 res
= usb_autopm_get_interface(tp
->intf
);
3711 data
->phy_id
= R8152_PHY_ID
; /* Internal PHY */
3715 mutex_lock(&tp
->control
);
3716 data
->val_out
= r8152_mdio_read(tp
, data
->reg_num
);
3717 mutex_unlock(&tp
->control
);
3721 if (!capable(CAP_NET_ADMIN
)) {
3725 mutex_lock(&tp
->control
);
3726 r8152_mdio_write(tp
, data
->reg_num
, data
->val_in
);
3727 mutex_unlock(&tp
->control
);
3734 usb_autopm_put_interface(tp
->intf
);
3740 static int rtl8152_change_mtu(struct net_device
*dev
, int new_mtu
)
3742 struct r8152
*tp
= netdev_priv(dev
);
3744 switch (tp
->version
) {
3747 return eth_change_mtu(dev
, new_mtu
);
3752 if (new_mtu
< 68 || new_mtu
> RTL8153_MAX_MTU
)
3760 static const struct net_device_ops rtl8152_netdev_ops
= {
3761 .ndo_open
= rtl8152_open
,
3762 .ndo_stop
= rtl8152_close
,
3763 .ndo_do_ioctl
= rtl8152_ioctl
,
3764 .ndo_start_xmit
= rtl8152_start_xmit
,
3765 .ndo_tx_timeout
= rtl8152_tx_timeout
,
3766 .ndo_set_features
= rtl8152_set_features
,
3767 .ndo_set_rx_mode
= rtl8152_set_rx_mode
,
3768 .ndo_set_mac_address
= rtl8152_set_mac_address
,
3769 .ndo_change_mtu
= rtl8152_change_mtu
,
3770 .ndo_validate_addr
= eth_validate_addr
,
3771 .ndo_features_check
= rtl8152_features_check
,
3774 static void r8152b_get_version(struct r8152
*tp
)
3779 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR1
);
3780 version
= (u16
)(ocp_data
& VERSION_MASK
);
3784 tp
->version
= RTL_VER_01
;
3787 tp
->version
= RTL_VER_02
;
3790 tp
->version
= RTL_VER_03
;
3791 tp
->mii
.supports_gmii
= 1;
3794 tp
->version
= RTL_VER_04
;
3795 tp
->mii
.supports_gmii
= 1;
3798 tp
->version
= RTL_VER_05
;
3799 tp
->mii
.supports_gmii
= 1;
3802 netif_info(tp
, probe
, tp
->netdev
,
3803 "Unknown version 0x%04x\n", version
);
3808 static void rtl8152_unload(struct r8152
*tp
)
3810 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3813 if (tp
->version
!= RTL_VER_01
)
3814 r8152_power_cut_en(tp
, true);
3817 static void rtl8153_unload(struct r8152
*tp
)
3819 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3822 r8153_power_cut_en(tp
, false);
3825 static int rtl_ops_init(struct r8152
*tp
)
3827 struct rtl_ops
*ops
= &tp
->rtl_ops
;
3830 switch (tp
->version
) {
3833 ops
->init
= r8152b_init
;
3834 ops
->enable
= rtl8152_enable
;
3835 ops
->disable
= rtl8152_disable
;
3836 ops
->up
= rtl8152_up
;
3837 ops
->down
= rtl8152_down
;
3838 ops
->unload
= rtl8152_unload
;
3839 ops
->eee_get
= r8152_get_eee
;
3840 ops
->eee_set
= r8152_set_eee
;
3846 ops
->init
= r8153_init
;
3847 ops
->enable
= rtl8153_enable
;
3848 ops
->disable
= rtl8153_disable
;
3849 ops
->up
= rtl8153_up
;
3850 ops
->down
= rtl8153_down
;
3851 ops
->unload
= rtl8153_unload
;
3852 ops
->eee_get
= r8153_get_eee
;
3853 ops
->eee_set
= r8153_set_eee
;
3858 netif_err(tp
, probe
, tp
->netdev
, "Unknown Device\n");
3865 static int rtl8152_probe(struct usb_interface
*intf
,
3866 const struct usb_device_id
*id
)
3868 struct usb_device
*udev
= interface_to_usbdev(intf
);
3870 struct net_device
*netdev
;
3873 if (udev
->actconfig
->desc
.bConfigurationValue
!= 1) {
3874 usb_driver_set_configuration(udev
, 1);
3878 usb_reset_device(udev
);
3879 netdev
= alloc_etherdev(sizeof(struct r8152
));
3881 dev_err(&intf
->dev
, "Out of memory\n");
3885 SET_NETDEV_DEV(netdev
, &intf
->dev
);
3886 tp
= netdev_priv(netdev
);
3887 tp
->msg_enable
= 0x7FFF;
3890 tp
->netdev
= netdev
;
3893 r8152b_get_version(tp
);
3894 ret
= rtl_ops_init(tp
);
3898 mutex_init(&tp
->control
);
3899 INIT_DELAYED_WORK(&tp
->schedule
, rtl_work_func_t
);
3901 netdev
->netdev_ops
= &rtl8152_netdev_ops
;
3902 netdev
->watchdog_timeo
= RTL8152_TX_TIMEOUT
;
3904 netdev
->features
|= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
3905 NETIF_F_TSO
| NETIF_F_FRAGLIST
| NETIF_F_IPV6_CSUM
|
3906 NETIF_F_TSO6
| NETIF_F_HW_VLAN_CTAG_RX
|
3907 NETIF_F_HW_VLAN_CTAG_TX
;
3908 netdev
->hw_features
= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
3909 NETIF_F_TSO
| NETIF_F_FRAGLIST
|
3910 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
|
3911 NETIF_F_HW_VLAN_CTAG_RX
|
3912 NETIF_F_HW_VLAN_CTAG_TX
;
3913 netdev
->vlan_features
= NETIF_F_SG
| NETIF_F_IP_CSUM
| NETIF_F_TSO
|
3914 NETIF_F_HIGHDMA
| NETIF_F_FRAGLIST
|
3915 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
;
3917 netdev
->ethtool_ops
= &ops
;
3918 netif_set_gso_max_size(netdev
, RTL_LIMITED_TSO_SIZE
);
3920 tp
->mii
.dev
= netdev
;
3921 tp
->mii
.mdio_read
= read_mii_word
;
3922 tp
->mii
.mdio_write
= write_mii_word
;
3923 tp
->mii
.phy_id_mask
= 0x3f;
3924 tp
->mii
.reg_num_mask
= 0x1f;
3925 tp
->mii
.phy_id
= R8152_PHY_ID
;
3927 intf
->needs_remote_wakeup
= 1;
3929 tp
->rtl_ops
.init(tp
);
3930 set_ethernet_addr(tp
);
3932 usb_set_intfdata(intf
, tp
);
3933 netif_napi_add(netdev
, &tp
->napi
, r8152_poll
, RTL8152_NAPI_WEIGHT
);
3935 ret
= register_netdev(netdev
);
3937 netif_err(tp
, probe
, netdev
, "couldn't register the device\n");
3941 tp
->saved_wolopts
= __rtl_get_wol(tp
);
3942 if (tp
->saved_wolopts
)
3943 device_set_wakeup_enable(&udev
->dev
, true);
3945 device_set_wakeup_enable(&udev
->dev
, false);
3947 netif_info(tp
, probe
, netdev
, "%s\n", DRIVER_VERSION
);
3952 netif_napi_del(&tp
->napi
);
3953 usb_set_intfdata(intf
, NULL
);
3955 free_netdev(netdev
);
3959 static void rtl8152_disconnect(struct usb_interface
*intf
)
3961 struct r8152
*tp
= usb_get_intfdata(intf
);
3963 usb_set_intfdata(intf
, NULL
);
3965 struct usb_device
*udev
= tp
->udev
;
3967 if (udev
->state
== USB_STATE_NOTATTACHED
)
3968 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
3970 netif_napi_del(&tp
->napi
);
3971 unregister_netdev(tp
->netdev
);
3972 tp
->rtl_ops
.unload(tp
);
3973 free_netdev(tp
->netdev
);
3977 #define REALTEK_USB_DEVICE(vend, prod) \
3978 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
3979 USB_DEVICE_ID_MATCH_INT_CLASS, \
3980 .idVendor = (vend), \
3981 .idProduct = (prod), \
3982 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
3985 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
3986 USB_DEVICE_ID_MATCH_DEVICE, \
3987 .idVendor = (vend), \
3988 .idProduct = (prod), \
3989 .bInterfaceClass = USB_CLASS_COMM, \
3990 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
3991 .bInterfaceProtocol = USB_CDC_PROTO_NONE
3993 /* table of devices that work with this driver */
3994 static struct usb_device_id rtl8152_table
[] = {
3995 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8152)},
3996 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK
, 0x8153)},
3997 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG
, 0xa101)},
4001 MODULE_DEVICE_TABLE(usb
, rtl8152_table
);
4003 static struct usb_driver rtl8152_driver
= {
4005 .id_table
= rtl8152_table
,
4006 .probe
= rtl8152_probe
,
4007 .disconnect
= rtl8152_disconnect
,
4008 .suspend
= rtl8152_suspend
,
4009 .resume
= rtl8152_resume
,
4010 .reset_resume
= rtl8152_resume
,
4011 .supports_autosuspend
= 1,
4012 .disable_hub_initiated_lpm
= 1,
4015 module_usb_driver(rtl8152_driver
);
4017 MODULE_AUTHOR(DRIVER_AUTHOR
);
4018 MODULE_DESCRIPTION(DRIVER_DESC
);
4019 MODULE_LICENSE("GPL");