2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
28 /* Version Information */
29 #define DRIVER_VERSION "v1.07.0 (2014/10/09)"
30 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
31 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
32 #define MODULENAME "r8152"
34 #define R8152_PHY_ID 32
36 #define PLA_IDR 0xc000
37 #define PLA_RCR 0xc010
38 #define PLA_RMS 0xc016
39 #define PLA_RXFIFO_CTRL0 0xc0a0
40 #define PLA_RXFIFO_CTRL1 0xc0a4
41 #define PLA_RXFIFO_CTRL2 0xc0a8
42 #define PLA_FMC 0xc0b4
43 #define PLA_CFG_WOL 0xc0b6
44 #define PLA_TEREDO_CFG 0xc0bc
45 #define PLA_MAR 0xcd00
46 #define PLA_BACKUP 0xd000
47 #define PAL_BDC_CR 0xd1a0
48 #define PLA_TEREDO_TIMER 0xd2cc
49 #define PLA_REALWOW_TIMER 0xd2e8
50 #define PLA_LEDSEL 0xdd90
51 #define PLA_LED_FEATURE 0xdd92
52 #define PLA_PHYAR 0xde00
53 #define PLA_BOOT_CTRL 0xe004
54 #define PLA_GPHY_INTR_IMR 0xe022
55 #define PLA_EEE_CR 0xe040
56 #define PLA_EEEP_CR 0xe080
57 #define PLA_MAC_PWR_CTRL 0xe0c0
58 #define PLA_MAC_PWR_CTRL2 0xe0ca
59 #define PLA_MAC_PWR_CTRL3 0xe0cc
60 #define PLA_MAC_PWR_CTRL4 0xe0ce
61 #define PLA_WDT6_CTRL 0xe428
62 #define PLA_TCR0 0xe610
63 #define PLA_TCR1 0xe612
64 #define PLA_MTPS 0xe615
65 #define PLA_TXFIFO_CTRL 0xe618
66 #define PLA_RSTTALLY 0xe800
68 #define PLA_CRWECR 0xe81c
69 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
70 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
71 #define PLA_CONFIG5 0xe822
72 #define PLA_PHY_PWR 0xe84c
73 #define PLA_OOB_CTRL 0xe84f
74 #define PLA_CPCR 0xe854
75 #define PLA_MISC_0 0xe858
76 #define PLA_MISC_1 0xe85a
77 #define PLA_OCP_GPHY_BASE 0xe86c
78 #define PLA_TALLYCNT 0xe890
79 #define PLA_SFF_STS_7 0xe8de
80 #define PLA_PHYSTATUS 0xe908
81 #define PLA_BP_BA 0xfc26
82 #define PLA_BP_0 0xfc28
83 #define PLA_BP_1 0xfc2a
84 #define PLA_BP_2 0xfc2c
85 #define PLA_BP_3 0xfc2e
86 #define PLA_BP_4 0xfc30
87 #define PLA_BP_5 0xfc32
88 #define PLA_BP_6 0xfc34
89 #define PLA_BP_7 0xfc36
90 #define PLA_BP_EN 0xfc38
92 #define USB_U2P3_CTRL 0xb460
93 #define USB_DEV_STAT 0xb808
94 #define USB_USB_CTRL 0xd406
95 #define USB_PHY_CTRL 0xd408
96 #define USB_TX_AGG 0xd40a
97 #define USB_RX_BUF_TH 0xd40c
98 #define USB_USB_TIMER 0xd428
99 #define USB_RX_EARLY_AGG 0xd42c
100 #define USB_PM_CTRL_STATUS 0xd432
101 #define USB_TX_DMA 0xd434
102 #define USB_TOLERANCE 0xd490
103 #define USB_LPM_CTRL 0xd41a
104 #define USB_UPS_CTRL 0xd800
105 #define USB_MISC_0 0xd81a
106 #define USB_POWER_CUT 0xd80a
107 #define USB_AFE_CTRL2 0xd824
108 #define USB_WDT11_CTRL 0xe43c
109 #define USB_BP_BA 0xfc26
110 #define USB_BP_0 0xfc28
111 #define USB_BP_1 0xfc2a
112 #define USB_BP_2 0xfc2c
113 #define USB_BP_3 0xfc2e
114 #define USB_BP_4 0xfc30
115 #define USB_BP_5 0xfc32
116 #define USB_BP_6 0xfc34
117 #define USB_BP_7 0xfc36
118 #define USB_BP_EN 0xfc38
121 #define OCP_ALDPS_CONFIG 0x2010
122 #define OCP_EEE_CONFIG1 0x2080
123 #define OCP_EEE_CONFIG2 0x2092
124 #define OCP_EEE_CONFIG3 0x2094
125 #define OCP_BASE_MII 0xa400
126 #define OCP_EEE_AR 0xa41a
127 #define OCP_EEE_DATA 0xa41c
128 #define OCP_PHY_STATUS 0xa420
129 #define OCP_POWER_CFG 0xa430
130 #define OCP_EEE_CFG 0xa432
131 #define OCP_SRAM_ADDR 0xa436
132 #define OCP_SRAM_DATA 0xa438
133 #define OCP_DOWN_SPEED 0xa442
134 #define OCP_EEE_ABLE 0xa5c4
135 #define OCP_EEE_ADV 0xa5d0
136 #define OCP_EEE_LPABLE 0xa5d2
137 #define OCP_ADC_CFG 0xbc06
140 #define SRAM_LPF_CFG 0x8012
141 #define SRAM_10M_AMP1 0x8080
142 #define SRAM_10M_AMP2 0x8082
143 #define SRAM_IMPEDANCE 0x8084
146 #define RCR_AAP 0x00000001
147 #define RCR_APM 0x00000002
148 #define RCR_AM 0x00000004
149 #define RCR_AB 0x00000008
150 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
152 /* PLA_RXFIFO_CTRL0 */
153 #define RXFIFO_THR1_NORMAL 0x00080002
154 #define RXFIFO_THR1_OOB 0x01800003
156 /* PLA_RXFIFO_CTRL1 */
157 #define RXFIFO_THR2_FULL 0x00000060
158 #define RXFIFO_THR2_HIGH 0x00000038
159 #define RXFIFO_THR2_OOB 0x0000004a
160 #define RXFIFO_THR2_NORMAL 0x00a0
162 /* PLA_RXFIFO_CTRL2 */
163 #define RXFIFO_THR3_FULL 0x00000078
164 #define RXFIFO_THR3_HIGH 0x00000048
165 #define RXFIFO_THR3_OOB 0x0000005a
166 #define RXFIFO_THR3_NORMAL 0x0110
168 /* PLA_TXFIFO_CTRL */
169 #define TXFIFO_THR_NORMAL 0x00400008
170 #define TXFIFO_THR_NORMAL2 0x01000008
173 #define FMC_FCR_MCU_EN 0x0001
176 #define EEEP_CR_EEEP_TX 0x0002
179 #define WDT6_SET_MODE 0x0010
182 #define TCR0_TX_EMPTY 0x0800
183 #define TCR0_AUTO_FIFO 0x0080
186 #define VERSION_MASK 0x7cf0
189 #define MTPS_JUMBO (12 * 1024 / 64)
190 #define MTPS_DEFAULT (6 * 1024 / 64)
193 #define TALLY_RESET 0x0001
201 #define CRWECR_NORAML 0x00
202 #define CRWECR_CONFIG 0xc0
205 #define NOW_IS_OOB 0x80
206 #define TXFIFO_EMPTY 0x20
207 #define RXFIFO_EMPTY 0x10
208 #define LINK_LIST_READY 0x02
209 #define DIS_MCU_CLROOB 0x01
210 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
213 #define RXDY_GATED_EN 0x0008
216 #define RE_INIT_LL 0x8000
217 #define MCU_BORW_EN 0x4000
220 #define CPCR_RX_VLAN 0x0040
223 #define MAGIC_EN 0x0001
226 #define TEREDO_SEL 0x8000
227 #define TEREDO_WAKE_MASK 0x7f00
228 #define TEREDO_RS_EVENT_MASK 0x00fe
229 #define OOB_TEREDO_EN 0x0001
232 #define ALDPS_PROXY_MODE 0x0001
235 #define LINK_ON_WAKE_EN 0x0010
236 #define LINK_OFF_WAKE_EN 0x0008
239 #define BWF_EN 0x0040
240 #define MWF_EN 0x0020
241 #define UWF_EN 0x0010
242 #define LAN_WAKE_EN 0x0002
244 /* PLA_LED_FEATURE */
245 #define LED_MODE_MASK 0x0700
248 #define TX_10M_IDLE_EN 0x0080
249 #define PFM_PWM_SWITCH 0x0040
251 /* PLA_MAC_PWR_CTRL */
252 #define D3_CLK_GATED_EN 0x00004000
253 #define MCU_CLK_RATIO 0x07010f07
254 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
255 #define ALDPS_SPDWN_RATIO 0x0f87
257 /* PLA_MAC_PWR_CTRL2 */
258 #define EEE_SPDWN_RATIO 0x8007
260 /* PLA_MAC_PWR_CTRL3 */
261 #define PKT_AVAIL_SPDWN_EN 0x0100
262 #define SUSPEND_SPDWN_EN 0x0004
263 #define U1U2_SPDWN_EN 0x0002
264 #define L1_SPDWN_EN 0x0001
266 /* PLA_MAC_PWR_CTRL4 */
267 #define PWRSAVE_SPDWN_EN 0x1000
268 #define RXDV_SPDWN_EN 0x0800
269 #define TX10MIDLE_EN 0x0100
270 #define TP100_SPDWN_EN 0x0020
271 #define TP500_SPDWN_EN 0x0010
272 #define TP1000_SPDWN_EN 0x0008
273 #define EEE_SPDWN_EN 0x0001
275 /* PLA_GPHY_INTR_IMR */
276 #define GPHY_STS_MSK 0x0001
277 #define SPEED_DOWN_MSK 0x0002
278 #define SPDWN_RXDV_MSK 0x0004
279 #define SPDWN_LINKCHG_MSK 0x0008
282 #define PHYAR_FLAG 0x80000000
285 #define EEE_RX_EN 0x0001
286 #define EEE_TX_EN 0x0002
289 #define AUTOLOAD_DONE 0x0002
292 #define STAT_SPEED_MASK 0x0006
293 #define STAT_SPEED_HIGH 0x0000
294 #define STAT_SPEED_FULL 0x0002
297 #define TX_AGG_MAX_THRESHOLD 0x03
300 #define RX_THR_SUPPER 0x0c350180
301 #define RX_THR_HIGH 0x7a120180
302 #define RX_THR_SLOW 0xffff0180
305 #define TEST_MODE_DISABLE 0x00000001
306 #define TX_SIZE_ADJUST1 0x00000100
309 #define POWER_CUT 0x0100
311 /* USB_PM_CTRL_STATUS */
312 #define RESUME_INDICATE 0x0001
315 #define RX_AGG_DISABLE 0x0010
318 #define U2P3_ENABLE 0x0001
321 #define PWR_EN 0x0001
322 #define PHASE2_EN 0x0008
325 #define PCUT_STATUS 0x0001
327 /* USB_RX_EARLY_AGG */
328 #define EARLY_AGG_SUPPER 0x0e832981
329 #define EARLY_AGG_HIGH 0x0e837a12
330 #define EARLY_AGG_SLOW 0x0e83ffff
333 #define TIMER11_EN 0x0001
336 #define LPM_TIMER_MASK 0x0c
337 #define LPM_TIMER_500MS 0x04 /* 500 ms */
338 #define LPM_TIMER_500US 0x0c /* 500 us */
341 #define SEN_VAL_MASK 0xf800
342 #define SEN_VAL_NORMAL 0xa000
343 #define SEL_RXIDLE 0x0100
345 /* OCP_ALDPS_CONFIG */
346 #define ENPWRSAVE 0x8000
347 #define ENPDNPS 0x0200
348 #define LINKENA 0x0100
349 #define DIS_SDSAVE 0x0010
352 #define PHY_STAT_MASK 0x0007
353 #define PHY_STAT_LAN_ON 3
354 #define PHY_STAT_PWRDN 5
357 #define EEE_CLKDIV_EN 0x8000
358 #define EN_ALDPS 0x0004
359 #define EN_10M_PLLOFF 0x0001
361 /* OCP_EEE_CONFIG1 */
362 #define RG_TXLPI_MSK_HFDUP 0x8000
363 #define RG_MATCLR_EN 0x4000
364 #define EEE_10_CAP 0x2000
365 #define EEE_NWAY_EN 0x1000
366 #define TX_QUIET_EN 0x0200
367 #define RX_QUIET_EN 0x0100
368 #define sd_rise_time_mask 0x0070
369 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
370 #define RG_RXLPI_MSK_HFDUP 0x0008
371 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
373 /* OCP_EEE_CONFIG2 */
374 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
375 #define RG_DACQUIET_EN 0x0400
376 #define RG_LDVQUIET_EN 0x0200
377 #define RG_CKRSEL 0x0020
378 #define RG_EEEPRG_EN 0x0010
380 /* OCP_EEE_CONFIG3 */
381 #define fast_snr_mask 0xff80
382 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
383 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
384 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
387 /* bit[15:14] function */
388 #define FUN_ADDR 0x0000
389 #define FUN_DATA 0x4000
390 /* bit[4:0] device addr */
393 #define CTAP_SHORT_EN 0x0040
394 #define EEE10_EN 0x0010
397 #define EN_10M_BGOFF 0x0080
400 #define CKADSEL_L 0x0100
401 #define ADC_EN 0x0080
402 #define EN_EMI_L 0x0040
405 #define LPF_AUTO_TUNE 0x8000
408 #define GDAC_IB_UPALL 0x0008
411 #define AMP_DN 0x0200
414 #define RX_DRIVING_MASK 0x6000
416 enum rtl_register_content
{
424 #define RTL8152_MAX_TX 4
425 #define RTL8152_MAX_RX 10
431 #define INTR_LINK 0x0004
433 #define RTL8152_REQT_READ 0xc0
434 #define RTL8152_REQT_WRITE 0x40
435 #define RTL8152_REQ_GET_REGS 0x05
436 #define RTL8152_REQ_SET_REGS 0x05
438 #define BYTE_EN_DWORD 0xff
439 #define BYTE_EN_WORD 0x33
440 #define BYTE_EN_BYTE 0x11
441 #define BYTE_EN_SIX_BYTES 0x3f
442 #define BYTE_EN_START_MASK 0x0f
443 #define BYTE_EN_END_MASK 0xf0
445 #define RTL8153_MAX_PACKET 9216 /* 9K */
446 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
447 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
448 #define RTL8153_RMS RTL8153_MAX_PACKET
449 #define RTL8152_TX_TIMEOUT (5 * HZ)
462 /* Define these values to match your device */
463 #define VENDOR_ID_REALTEK 0x0bda
464 #define PRODUCT_ID_RTL8152 0x8152
465 #define PRODUCT_ID_RTL8153 0x8153
467 #define VENDOR_ID_SAMSUNG 0x04e8
468 #define PRODUCT_ID_SAMSUNG 0xa101
470 #define MCU_TYPE_PLA 0x0100
471 #define MCU_TYPE_USB 0x0000
473 #define REALTEK_USB_DEVICE(vend, prod) \
474 USB_DEVICE_INTERFACE_CLASS(vend, prod, USB_CLASS_VENDOR_SPEC)
476 struct tally_counter
{
483 __le32 tx_one_collision
;
484 __le32 tx_multi_collision
;
494 #define RX_LEN_MASK 0x7fff
497 #define RD_UDP_CS (1 << 23)
498 #define RD_TCP_CS (1 << 22)
499 #define RD_IPV6_CS (1 << 20)
500 #define RD_IPV4_CS (1 << 19)
503 #define IPF (1 << 23) /* IP checksum fail */
504 #define UDPF (1 << 22) /* UDP checksum fail */
505 #define TCPF (1 << 21) /* TCP checksum fail */
506 #define RX_VLAN_TAG (1 << 16)
515 #define TX_FS (1 << 31) /* First segment of a packet */
516 #define TX_LS (1 << 30) /* Final segment of a packet */
517 #define GTSENDV4 (1 << 28)
518 #define GTSENDV6 (1 << 27)
519 #define GTTCPHO_SHIFT 18
520 #define GTTCPHO_MAX 0x7fU
521 #define TX_LEN_MAX 0x3ffffU
524 #define UDP_CS (1 << 31) /* Calculate UDP/IP checksum */
525 #define TCP_CS (1 << 30) /* Calculate TCP/IP checksum */
526 #define IPV4_CS (1 << 29) /* Calculate IPv4 checksum */
527 #define IPV6_CS (1 << 28) /* Calculate IPv6 checksum */
529 #define MSS_MAX 0x7ffU
530 #define TCPHO_SHIFT 17
531 #define TCPHO_MAX 0x7ffU
532 #define TX_VLAN_TAG (1 << 16)
538 struct list_head list
;
540 struct r8152
*context
;
546 struct list_head list
;
548 struct r8152
*context
;
557 struct usb_device
*udev
;
558 struct tasklet_struct tl
;
559 struct usb_interface
*intf
;
560 struct net_device
*netdev
;
561 struct urb
*intr_urb
;
562 struct tx_agg tx_info
[RTL8152_MAX_TX
];
563 struct rx_agg rx_info
[RTL8152_MAX_RX
];
564 struct list_head rx_done
, tx_free
;
565 struct sk_buff_head tx_queue
;
566 spinlock_t rx_lock
, tx_lock
;
567 struct delayed_work schedule
;
568 struct mii_if_info mii
;
569 struct mutex control
; /* use for hw setting */
572 void (*init
)(struct r8152
*);
573 int (*enable
)(struct r8152
*);
574 void (*disable
)(struct r8152
*);
575 void (*up
)(struct r8152
*);
576 void (*down
)(struct r8152
*);
577 void (*unload
)(struct r8152
*);
578 int (*eee_get
)(struct r8152
*, struct ethtool_eee
*);
579 int (*eee_set
)(struct r8152
*, struct ethtool_eee
*);
608 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
609 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
611 static const int multicast_filter_limit
= 32;
612 static unsigned int agg_buf_sz
= 16384;
614 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
615 VLAN_ETH_HLEN - VLAN_HLEN)
618 int get_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
623 tmp
= kmalloc(size
, GFP_KERNEL
);
627 ret
= usb_control_msg(tp
->udev
, usb_rcvctrlpipe(tp
->udev
, 0),
628 RTL8152_REQ_GET_REGS
, RTL8152_REQT_READ
,
629 value
, index
, tmp
, size
, 500);
631 memcpy(data
, tmp
, size
);
638 int set_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
643 tmp
= kmemdup(data
, size
, GFP_KERNEL
);
647 ret
= usb_control_msg(tp
->udev
, usb_sndctrlpipe(tp
->udev
, 0),
648 RTL8152_REQ_SET_REGS
, RTL8152_REQT_WRITE
,
649 value
, index
, tmp
, size
, 500);
656 static int generic_ocp_read(struct r8152
*tp
, u16 index
, u16 size
,
657 void *data
, u16 type
)
662 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
665 /* both size and indix must be 4 bytes align */
666 if ((size
& 3) || !size
|| (index
& 3) || !data
)
669 if ((u32
)index
+ (u32
)size
> 0xffff)
674 ret
= get_registers(tp
, index
, type
, limit
, data
);
682 ret
= get_registers(tp
, index
, type
, size
, data
);
696 static int generic_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
,
697 u16 size
, void *data
, u16 type
)
700 u16 byteen_start
, byteen_end
, byen
;
703 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
706 /* both size and indix must be 4 bytes align */
707 if ((size
& 3) || !size
|| (index
& 3) || !data
)
710 if ((u32
)index
+ (u32
)size
> 0xffff)
713 byteen_start
= byteen
& BYTE_EN_START_MASK
;
714 byteen_end
= byteen
& BYTE_EN_END_MASK
;
716 byen
= byteen_start
| (byteen_start
<< 4);
717 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
730 ret
= set_registers(tp
, index
,
731 type
| BYTE_EN_DWORD
,
740 ret
= set_registers(tp
, index
,
741 type
| BYTE_EN_DWORD
,
753 byen
= byteen_end
| (byteen_end
>> 4);
754 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
764 int pla_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
766 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_PLA
);
770 int pla_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
772 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_PLA
);
776 int usb_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
778 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_USB
);
782 int usb_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
784 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_USB
);
787 static u32
ocp_read_dword(struct r8152
*tp
, u16 type
, u16 index
)
791 generic_ocp_read(tp
, index
, sizeof(data
), &data
, type
);
793 return __le32_to_cpu(data
);
796 static void ocp_write_dword(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
798 __le32 tmp
= __cpu_to_le32(data
);
800 generic_ocp_write(tp
, index
, BYTE_EN_DWORD
, sizeof(tmp
), &tmp
, type
);
803 static u16
ocp_read_word(struct r8152
*tp
, u16 type
, u16 index
)
807 u8 shift
= index
& 2;
811 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
813 data
= __le32_to_cpu(tmp
);
814 data
>>= (shift
* 8);
820 static void ocp_write_word(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
824 u16 byen
= BYTE_EN_WORD
;
825 u8 shift
= index
& 2;
831 mask
<<= (shift
* 8);
832 data
<<= (shift
* 8);
836 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
838 data
|= __le32_to_cpu(tmp
) & ~mask
;
839 tmp
= __cpu_to_le32(data
);
841 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
844 static u8
ocp_read_byte(struct r8152
*tp
, u16 type
, u16 index
)
848 u8 shift
= index
& 3;
852 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
854 data
= __le32_to_cpu(tmp
);
855 data
>>= (shift
* 8);
861 static void ocp_write_byte(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
865 u16 byen
= BYTE_EN_BYTE
;
866 u8 shift
= index
& 3;
872 mask
<<= (shift
* 8);
873 data
<<= (shift
* 8);
877 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
879 data
|= __le32_to_cpu(tmp
) & ~mask
;
880 tmp
= __cpu_to_le32(data
);
882 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
885 static u16
ocp_reg_read(struct r8152
*tp
, u16 addr
)
887 u16 ocp_base
, ocp_index
;
889 ocp_base
= addr
& 0xf000;
890 if (ocp_base
!= tp
->ocp_base
) {
891 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
892 tp
->ocp_base
= ocp_base
;
895 ocp_index
= (addr
& 0x0fff) | 0xb000;
896 return ocp_read_word(tp
, MCU_TYPE_PLA
, ocp_index
);
899 static void ocp_reg_write(struct r8152
*tp
, u16 addr
, u16 data
)
901 u16 ocp_base
, ocp_index
;
903 ocp_base
= addr
& 0xf000;
904 if (ocp_base
!= tp
->ocp_base
) {
905 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
906 tp
->ocp_base
= ocp_base
;
909 ocp_index
= (addr
& 0x0fff) | 0xb000;
910 ocp_write_word(tp
, MCU_TYPE_PLA
, ocp_index
, data
);
913 static inline void r8152_mdio_write(struct r8152
*tp
, u32 reg_addr
, u32 value
)
915 ocp_reg_write(tp
, OCP_BASE_MII
+ reg_addr
* 2, value
);
918 static inline int r8152_mdio_read(struct r8152
*tp
, u32 reg_addr
)
920 return ocp_reg_read(tp
, OCP_BASE_MII
+ reg_addr
* 2);
923 static void sram_write(struct r8152
*tp
, u16 addr
, u16 data
)
925 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
926 ocp_reg_write(tp
, OCP_SRAM_DATA
, data
);
929 static u16
sram_read(struct r8152
*tp
, u16 addr
)
931 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
932 return ocp_reg_read(tp
, OCP_SRAM_DATA
);
935 static int read_mii_word(struct net_device
*netdev
, int phy_id
, int reg
)
937 struct r8152
*tp
= netdev_priv(netdev
);
940 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
943 if (phy_id
!= R8152_PHY_ID
)
946 ret
= r8152_mdio_read(tp
, reg
);
952 void write_mii_word(struct net_device
*netdev
, int phy_id
, int reg
, int val
)
954 struct r8152
*tp
= netdev_priv(netdev
);
956 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
959 if (phy_id
!= R8152_PHY_ID
)
962 r8152_mdio_write(tp
, reg
, val
);
966 r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
);
968 static int rtl8152_set_mac_address(struct net_device
*netdev
, void *p
)
970 struct r8152
*tp
= netdev_priv(netdev
);
971 struct sockaddr
*addr
= p
;
972 int ret
= -EADDRNOTAVAIL
;
974 if (!is_valid_ether_addr(addr
->sa_data
))
977 ret
= usb_autopm_get_interface(tp
->intf
);
981 mutex_lock(&tp
->control
);
983 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
985 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
986 pla_ocp_write(tp
, PLA_IDR
, BYTE_EN_SIX_BYTES
, 8, addr
->sa_data
);
987 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
989 mutex_unlock(&tp
->control
);
991 usb_autopm_put_interface(tp
->intf
);
996 static int set_ethernet_addr(struct r8152
*tp
)
998 struct net_device
*dev
= tp
->netdev
;
1002 if (tp
->version
== RTL_VER_01
)
1003 ret
= pla_ocp_read(tp
, PLA_IDR
, 8, sa
.sa_data
);
1005 ret
= pla_ocp_read(tp
, PLA_BACKUP
, 8, sa
.sa_data
);
1008 netif_err(tp
, probe
, dev
, "Get ether addr fail\n");
1009 } else if (!is_valid_ether_addr(sa
.sa_data
)) {
1010 netif_err(tp
, probe
, dev
, "Invalid ether addr %pM\n",
1012 eth_hw_addr_random(dev
);
1013 ether_addr_copy(sa
.sa_data
, dev
->dev_addr
);
1014 ret
= rtl8152_set_mac_address(dev
, &sa
);
1015 netif_info(tp
, probe
, dev
, "Random ether addr %pM\n",
1018 if (tp
->version
== RTL_VER_01
)
1019 ether_addr_copy(dev
->dev_addr
, sa
.sa_data
);
1021 ret
= rtl8152_set_mac_address(dev
, &sa
);
1027 static void read_bulk_callback(struct urb
*urb
)
1029 struct net_device
*netdev
;
1030 int status
= urb
->status
;
1043 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1046 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1049 netdev
= tp
->netdev
;
1051 /* When link down, the driver would cancel all bulks. */
1052 /* This avoid the re-submitting bulk */
1053 if (!netif_carrier_ok(netdev
))
1056 usb_mark_last_busy(tp
->udev
);
1060 if (urb
->actual_length
< ETH_ZLEN
)
1063 spin_lock(&tp
->rx_lock
);
1064 list_add_tail(&agg
->list
, &tp
->rx_done
);
1065 spin_unlock(&tp
->rx_lock
);
1066 tasklet_schedule(&tp
->tl
);
1069 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1070 netif_device_detach(tp
->netdev
);
1073 return; /* the urb is in unlink state */
1075 if (net_ratelimit())
1076 netdev_warn(netdev
, "maybe reset is needed?\n");
1079 if (net_ratelimit())
1080 netdev_warn(netdev
, "Rx status %d\n", status
);
1084 result
= r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1085 if (result
== -ENODEV
) {
1086 netif_device_detach(tp
->netdev
);
1087 } else if (result
) {
1088 spin_lock(&tp
->rx_lock
);
1089 list_add_tail(&agg
->list
, &tp
->rx_done
);
1090 spin_unlock(&tp
->rx_lock
);
1091 tasklet_schedule(&tp
->tl
);
1095 static void write_bulk_callback(struct urb
*urb
)
1097 struct net_device_stats
*stats
;
1098 struct net_device
*netdev
;
1101 int status
= urb
->status
;
1111 netdev
= tp
->netdev
;
1112 stats
= &netdev
->stats
;
1114 if (net_ratelimit())
1115 netdev_warn(netdev
, "Tx status %d\n", status
);
1116 stats
->tx_errors
+= agg
->skb_num
;
1118 stats
->tx_packets
+= agg
->skb_num
;
1119 stats
->tx_bytes
+= agg
->skb_len
;
1122 spin_lock(&tp
->tx_lock
);
1123 list_add_tail(&agg
->list
, &tp
->tx_free
);
1124 spin_unlock(&tp
->tx_lock
);
1126 usb_autopm_put_interface_async(tp
->intf
);
1128 if (!netif_carrier_ok(netdev
))
1131 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1134 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1137 if (!skb_queue_empty(&tp
->tx_queue
))
1138 tasklet_schedule(&tp
->tl
);
1141 static void intr_callback(struct urb
*urb
)
1145 int status
= urb
->status
;
1152 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1155 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1159 case 0: /* success */
1161 case -ECONNRESET
: /* unlink */
1163 netif_device_detach(tp
->netdev
);
1166 netif_info(tp
, intr
, tp
->netdev
,
1167 "Stop submitting intr, status %d\n", status
);
1170 netif_info(tp
, intr
, tp
->netdev
, "intr status -EOVERFLOW\n");
1172 /* -EPIPE: should clear the halt */
1174 netif_info(tp
, intr
, tp
->netdev
, "intr status %d\n", status
);
1178 d
= urb
->transfer_buffer
;
1179 if (INTR_LINK
& __le16_to_cpu(d
[0])) {
1180 if (!(tp
->speed
& LINK_STATUS
)) {
1181 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1182 schedule_delayed_work(&tp
->schedule
, 0);
1185 if (tp
->speed
& LINK_STATUS
) {
1186 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1187 schedule_delayed_work(&tp
->schedule
, 0);
1192 res
= usb_submit_urb(urb
, GFP_ATOMIC
);
1194 netif_device_detach(tp
->netdev
);
1196 netif_err(tp
, intr
, tp
->netdev
,
1197 "can't resubmit intr, status %d\n", res
);
1200 static inline void *rx_agg_align(void *data
)
1202 return (void *)ALIGN((uintptr_t)data
, RX_ALIGN
);
1205 static inline void *tx_agg_align(void *data
)
1207 return (void *)ALIGN((uintptr_t)data
, TX_ALIGN
);
1210 static void free_all_mem(struct r8152
*tp
)
1214 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1215 usb_free_urb(tp
->rx_info
[i
].urb
);
1216 tp
->rx_info
[i
].urb
= NULL
;
1218 kfree(tp
->rx_info
[i
].buffer
);
1219 tp
->rx_info
[i
].buffer
= NULL
;
1220 tp
->rx_info
[i
].head
= NULL
;
1223 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1224 usb_free_urb(tp
->tx_info
[i
].urb
);
1225 tp
->tx_info
[i
].urb
= NULL
;
1227 kfree(tp
->tx_info
[i
].buffer
);
1228 tp
->tx_info
[i
].buffer
= NULL
;
1229 tp
->tx_info
[i
].head
= NULL
;
1232 usb_free_urb(tp
->intr_urb
);
1233 tp
->intr_urb
= NULL
;
1235 kfree(tp
->intr_buff
);
1236 tp
->intr_buff
= NULL
;
1239 static int alloc_all_mem(struct r8152
*tp
)
1241 struct net_device
*netdev
= tp
->netdev
;
1242 struct usb_interface
*intf
= tp
->intf
;
1243 struct usb_host_interface
*alt
= intf
->cur_altsetting
;
1244 struct usb_host_endpoint
*ep_intr
= alt
->endpoint
+ 2;
1249 node
= netdev
->dev
.parent
? dev_to_node(netdev
->dev
.parent
) : -1;
1251 spin_lock_init(&tp
->rx_lock
);
1252 spin_lock_init(&tp
->tx_lock
);
1253 INIT_LIST_HEAD(&tp
->rx_done
);
1254 INIT_LIST_HEAD(&tp
->tx_free
);
1255 skb_queue_head_init(&tp
->tx_queue
);
1257 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1258 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1262 if (buf
!= rx_agg_align(buf
)) {
1264 buf
= kmalloc_node(agg_buf_sz
+ RX_ALIGN
, GFP_KERNEL
,
1270 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1276 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
1277 tp
->rx_info
[i
].context
= tp
;
1278 tp
->rx_info
[i
].urb
= urb
;
1279 tp
->rx_info
[i
].buffer
= buf
;
1280 tp
->rx_info
[i
].head
= rx_agg_align(buf
);
1283 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1284 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1288 if (buf
!= tx_agg_align(buf
)) {
1290 buf
= kmalloc_node(agg_buf_sz
+ TX_ALIGN
, GFP_KERNEL
,
1296 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1302 INIT_LIST_HEAD(&tp
->tx_info
[i
].list
);
1303 tp
->tx_info
[i
].context
= tp
;
1304 tp
->tx_info
[i
].urb
= urb
;
1305 tp
->tx_info
[i
].buffer
= buf
;
1306 tp
->tx_info
[i
].head
= tx_agg_align(buf
);
1308 list_add_tail(&tp
->tx_info
[i
].list
, &tp
->tx_free
);
1311 tp
->intr_urb
= usb_alloc_urb(0, GFP_KERNEL
);
1315 tp
->intr_buff
= kmalloc(INTBUFSIZE
, GFP_KERNEL
);
1319 tp
->intr_interval
= (int)ep_intr
->desc
.bInterval
;
1320 usb_fill_int_urb(tp
->intr_urb
, tp
->udev
, usb_rcvintpipe(tp
->udev
, 3),
1321 tp
->intr_buff
, INTBUFSIZE
, intr_callback
,
1322 tp
, tp
->intr_interval
);
1331 static struct tx_agg
*r8152_get_tx_agg(struct r8152
*tp
)
1333 struct tx_agg
*agg
= NULL
;
1334 unsigned long flags
;
1336 if (list_empty(&tp
->tx_free
))
1339 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1340 if (!list_empty(&tp
->tx_free
)) {
1341 struct list_head
*cursor
;
1343 cursor
= tp
->tx_free
.next
;
1344 list_del_init(cursor
);
1345 agg
= list_entry(cursor
, struct tx_agg
, list
);
1347 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1352 static inline __be16
get_protocol(struct sk_buff
*skb
)
1356 if (skb
->protocol
== htons(ETH_P_8021Q
))
1357 protocol
= vlan_eth_hdr(skb
)->h_vlan_encapsulated_proto
;
1359 protocol
= skb
->protocol
;
1364 /* r8152_csum_workaround()
1365 * The hw limites the value the transport offset. When the offset is out of the
1366 * range, calculate the checksum by sw.
1368 static void r8152_csum_workaround(struct r8152
*tp
, struct sk_buff
*skb
,
1369 struct sk_buff_head
*list
)
1371 if (skb_shinfo(skb
)->gso_size
) {
1372 netdev_features_t features
= tp
->netdev
->features
;
1373 struct sk_buff_head seg_list
;
1374 struct sk_buff
*segs
, *nskb
;
1376 features
&= ~(NETIF_F_SG
| NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
);
1377 segs
= skb_gso_segment(skb
, features
);
1378 if (IS_ERR(segs
) || !segs
)
1381 __skb_queue_head_init(&seg_list
);
1387 __skb_queue_tail(&seg_list
, nskb
);
1390 skb_queue_splice(&seg_list
, list
);
1392 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1393 if (skb_checksum_help(skb
) < 0)
1396 __skb_queue_head(list
, skb
);
1398 struct net_device_stats
*stats
;
1401 stats
= &tp
->netdev
->stats
;
1402 stats
->tx_dropped
++;
1407 /* msdn_giant_send_check()
1408 * According to the document of microsoft, the TCP Pseudo Header excludes the
1409 * packet length for IPv6 TCP large packets.
1411 static int msdn_giant_send_check(struct sk_buff
*skb
)
1413 const struct ipv6hdr
*ipv6h
;
1417 ret
= skb_cow_head(skb
, 0);
1421 ipv6h
= ipv6_hdr(skb
);
1425 th
->check
= ~tcp_v6_check(0, &ipv6h
->saddr
, &ipv6h
->daddr
, 0);
1430 static inline void rtl_tx_vlan_tag(struct tx_desc
*desc
, struct sk_buff
*skb
)
1432 if (vlan_tx_tag_present(skb
)) {
1435 opts2
= TX_VLAN_TAG
| swab16(vlan_tx_tag_get(skb
));
1436 desc
->opts2
|= cpu_to_le32(opts2
);
1440 static inline void rtl_rx_vlan_tag(struct rx_desc
*desc
, struct sk_buff
*skb
)
1442 u32 opts2
= le32_to_cpu(desc
->opts2
);
1444 if (opts2
& RX_VLAN_TAG
)
1445 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
),
1446 swab16(opts2
& 0xffff));
1449 static int r8152_tx_csum(struct r8152
*tp
, struct tx_desc
*desc
,
1450 struct sk_buff
*skb
, u32 len
, u32 transport_offset
)
1452 u32 mss
= skb_shinfo(skb
)->gso_size
;
1453 u32 opts1
, opts2
= 0;
1454 int ret
= TX_CSUM_SUCCESS
;
1456 WARN_ON_ONCE(len
> TX_LEN_MAX
);
1458 opts1
= len
| TX_FS
| TX_LS
;
1461 if (transport_offset
> GTTCPHO_MAX
) {
1462 netif_warn(tp
, tx_err
, tp
->netdev
,
1463 "Invalid transport offset 0x%x for TSO\n",
1469 switch (get_protocol(skb
)) {
1470 case htons(ETH_P_IP
):
1474 case htons(ETH_P_IPV6
):
1475 if (msdn_giant_send_check(skb
)) {
1487 opts1
|= transport_offset
<< GTTCPHO_SHIFT
;
1488 opts2
|= min(mss
, MSS_MAX
) << MSS_SHIFT
;
1489 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1492 if (transport_offset
> TCPHO_MAX
) {
1493 netif_warn(tp
, tx_err
, tp
->netdev
,
1494 "Invalid transport offset 0x%x\n",
1500 switch (get_protocol(skb
)) {
1501 case htons(ETH_P_IP
):
1503 ip_protocol
= ip_hdr(skb
)->protocol
;
1506 case htons(ETH_P_IPV6
):
1508 ip_protocol
= ipv6_hdr(skb
)->nexthdr
;
1512 ip_protocol
= IPPROTO_RAW
;
1516 if (ip_protocol
== IPPROTO_TCP
)
1518 else if (ip_protocol
== IPPROTO_UDP
)
1523 opts2
|= transport_offset
<< TCPHO_SHIFT
;
1526 desc
->opts2
= cpu_to_le32(opts2
);
1527 desc
->opts1
= cpu_to_le32(opts1
);
1533 static int r8152_tx_agg_fill(struct r8152
*tp
, struct tx_agg
*agg
)
1535 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1539 __skb_queue_head_init(&skb_head
);
1540 spin_lock(&tx_queue
->lock
);
1541 skb_queue_splice_init(tx_queue
, &skb_head
);
1542 spin_unlock(&tx_queue
->lock
);
1544 tx_data
= agg
->head
;
1547 remain
= agg_buf_sz
;
1549 while (remain
>= ETH_ZLEN
+ sizeof(struct tx_desc
)) {
1550 struct tx_desc
*tx_desc
;
1551 struct sk_buff
*skb
;
1555 skb
= __skb_dequeue(&skb_head
);
1559 len
= skb
->len
+ sizeof(*tx_desc
);
1562 __skb_queue_head(&skb_head
, skb
);
1566 tx_data
= tx_agg_align(tx_data
);
1567 tx_desc
= (struct tx_desc
*)tx_data
;
1569 offset
= (u32
)skb_transport_offset(skb
);
1571 if (r8152_tx_csum(tp
, tx_desc
, skb
, skb
->len
, offset
)) {
1572 r8152_csum_workaround(tp
, skb
, &skb_head
);
1576 rtl_tx_vlan_tag(tx_desc
, skb
);
1578 tx_data
+= sizeof(*tx_desc
);
1581 if (skb_copy_bits(skb
, 0, tx_data
, len
) < 0) {
1582 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1584 stats
->tx_dropped
++;
1585 dev_kfree_skb_any(skb
);
1586 tx_data
-= sizeof(*tx_desc
);
1591 agg
->skb_len
+= len
;
1594 dev_kfree_skb_any(skb
);
1596 remain
= agg_buf_sz
- (int)(tx_agg_align(tx_data
) - agg
->head
);
1599 if (!skb_queue_empty(&skb_head
)) {
1600 spin_lock(&tx_queue
->lock
);
1601 skb_queue_splice(&skb_head
, tx_queue
);
1602 spin_unlock(&tx_queue
->lock
);
1605 netif_tx_lock(tp
->netdev
);
1607 if (netif_queue_stopped(tp
->netdev
) &&
1608 skb_queue_len(&tp
->tx_queue
) < tp
->tx_qlen
)
1609 netif_wake_queue(tp
->netdev
);
1611 netif_tx_unlock(tp
->netdev
);
1613 ret
= usb_autopm_get_interface_async(tp
->intf
);
1617 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_sndbulkpipe(tp
->udev
, 2),
1618 agg
->head
, (int)(tx_data
- (u8
*)agg
->head
),
1619 (usb_complete_t
)write_bulk_callback
, agg
);
1621 ret
= usb_submit_urb(agg
->urb
, GFP_ATOMIC
);
1623 usb_autopm_put_interface_async(tp
->intf
);
1629 static u8
r8152_rx_csum(struct r8152
*tp
, struct rx_desc
*rx_desc
)
1631 u8 checksum
= CHECKSUM_NONE
;
1634 if (tp
->version
== RTL_VER_01
)
1637 opts2
= le32_to_cpu(rx_desc
->opts2
);
1638 opts3
= le32_to_cpu(rx_desc
->opts3
);
1640 if (opts2
& RD_IPV4_CS
) {
1642 checksum
= CHECKSUM_NONE
;
1643 else if ((opts2
& RD_UDP_CS
) && (opts3
& UDPF
))
1644 checksum
= CHECKSUM_NONE
;
1645 else if ((opts2
& RD_TCP_CS
) && (opts3
& TCPF
))
1646 checksum
= CHECKSUM_NONE
;
1648 checksum
= CHECKSUM_UNNECESSARY
;
1649 } else if (RD_IPV6_CS
) {
1650 if ((opts2
& RD_UDP_CS
) && !(opts3
& UDPF
))
1651 checksum
= CHECKSUM_UNNECESSARY
;
1652 else if ((opts2
& RD_TCP_CS
) && !(opts3
& TCPF
))
1653 checksum
= CHECKSUM_UNNECESSARY
;
1660 static void rx_bottom(struct r8152
*tp
)
1662 unsigned long flags
;
1663 struct list_head
*cursor
, *next
, rx_queue
;
1665 if (list_empty(&tp
->rx_done
))
1668 INIT_LIST_HEAD(&rx_queue
);
1669 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1670 list_splice_init(&tp
->rx_done
, &rx_queue
);
1671 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1673 list_for_each_safe(cursor
, next
, &rx_queue
) {
1674 struct rx_desc
*rx_desc
;
1681 list_del_init(cursor
);
1683 agg
= list_entry(cursor
, struct rx_agg
, list
);
1685 if (urb
->actual_length
< ETH_ZLEN
)
1688 rx_desc
= agg
->head
;
1689 rx_data
= agg
->head
;
1690 len_used
+= sizeof(struct rx_desc
);
1692 while (urb
->actual_length
> len_used
) {
1693 struct net_device
*netdev
= tp
->netdev
;
1694 struct net_device_stats
*stats
= &netdev
->stats
;
1695 unsigned int pkt_len
;
1696 struct sk_buff
*skb
;
1698 pkt_len
= le32_to_cpu(rx_desc
->opts1
) & RX_LEN_MASK
;
1699 if (pkt_len
< ETH_ZLEN
)
1702 len_used
+= pkt_len
;
1703 if (urb
->actual_length
< len_used
)
1706 pkt_len
-= CRC_SIZE
;
1707 rx_data
+= sizeof(struct rx_desc
);
1709 skb
= netdev_alloc_skb_ip_align(netdev
, pkt_len
);
1711 stats
->rx_dropped
++;
1715 skb
->ip_summed
= r8152_rx_csum(tp
, rx_desc
);
1716 memcpy(skb
->data
, rx_data
, pkt_len
);
1717 skb_put(skb
, pkt_len
);
1718 skb
->protocol
= eth_type_trans(skb
, netdev
);
1719 rtl_rx_vlan_tag(rx_desc
, skb
);
1720 netif_receive_skb(skb
);
1721 stats
->rx_packets
++;
1722 stats
->rx_bytes
+= pkt_len
;
1725 rx_data
= rx_agg_align(rx_data
+ pkt_len
+ CRC_SIZE
);
1726 rx_desc
= (struct rx_desc
*)rx_data
;
1727 len_used
= (int)(rx_data
- (u8
*)agg
->head
);
1728 len_used
+= sizeof(struct rx_desc
);
1732 ret
= r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1733 if (ret
&& ret
!= -ENODEV
) {
1734 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1735 list_add_tail(&agg
->list
, &tp
->rx_done
);
1736 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1737 tasklet_schedule(&tp
->tl
);
1742 static void tx_bottom(struct r8152
*tp
)
1749 if (skb_queue_empty(&tp
->tx_queue
))
1752 agg
= r8152_get_tx_agg(tp
);
1756 res
= r8152_tx_agg_fill(tp
, agg
);
1758 struct net_device
*netdev
= tp
->netdev
;
1760 if (res
== -ENODEV
) {
1761 netif_device_detach(netdev
);
1763 struct net_device_stats
*stats
= &netdev
->stats
;
1764 unsigned long flags
;
1766 netif_warn(tp
, tx_err
, netdev
,
1767 "failed tx_urb %d\n", res
);
1768 stats
->tx_dropped
+= agg
->skb_num
;
1770 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1771 list_add_tail(&agg
->list
, &tp
->tx_free
);
1772 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1778 static void bottom_half(unsigned long data
)
1782 tp
= (struct r8152
*)data
;
1784 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1787 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1790 /* When link down, the driver would cancel all bulks. */
1791 /* This avoid the re-submitting bulk */
1792 if (!netif_carrier_ok(tp
->netdev
))
1800 int r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
)
1802 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_rcvbulkpipe(tp
->udev
, 1),
1803 agg
->head
, agg_buf_sz
,
1804 (usb_complete_t
)read_bulk_callback
, agg
);
1806 return usb_submit_urb(agg
->urb
, mem_flags
);
1809 static void rtl_drop_queued_tx(struct r8152
*tp
)
1811 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1812 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1813 struct sk_buff
*skb
;
1815 if (skb_queue_empty(tx_queue
))
1818 __skb_queue_head_init(&skb_head
);
1819 spin_lock_bh(&tx_queue
->lock
);
1820 skb_queue_splice_init(tx_queue
, &skb_head
);
1821 spin_unlock_bh(&tx_queue
->lock
);
1823 while ((skb
= __skb_dequeue(&skb_head
))) {
1825 stats
->tx_dropped
++;
1829 static void rtl8152_tx_timeout(struct net_device
*netdev
)
1831 struct r8152
*tp
= netdev_priv(netdev
);
1834 netif_warn(tp
, tx_err
, netdev
, "Tx timeout\n");
1835 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
1836 usb_unlink_urb(tp
->tx_info
[i
].urb
);
1839 static void rtl8152_set_rx_mode(struct net_device
*netdev
)
1841 struct r8152
*tp
= netdev_priv(netdev
);
1843 if (tp
->speed
& LINK_STATUS
) {
1844 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
1845 schedule_delayed_work(&tp
->schedule
, 0);
1849 static void _rtl8152_set_rx_mode(struct net_device
*netdev
)
1851 struct r8152
*tp
= netdev_priv(netdev
);
1852 u32 mc_filter
[2]; /* Multicast hash filter */
1856 clear_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
1857 netif_stop_queue(netdev
);
1858 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
1859 ocp_data
&= ~RCR_ACPT_ALL
;
1860 ocp_data
|= RCR_AB
| RCR_APM
;
1862 if (netdev
->flags
& IFF_PROMISC
) {
1863 /* Unconditionally log net taps. */
1864 netif_notice(tp
, link
, netdev
, "Promiscuous mode enabled\n");
1865 ocp_data
|= RCR_AM
| RCR_AAP
;
1866 mc_filter
[1] = 0xffffffff;
1867 mc_filter
[0] = 0xffffffff;
1868 } else if ((netdev_mc_count(netdev
) > multicast_filter_limit
) ||
1869 (netdev
->flags
& IFF_ALLMULTI
)) {
1870 /* Too many to filter perfectly -- accept all multicasts. */
1872 mc_filter
[1] = 0xffffffff;
1873 mc_filter
[0] = 0xffffffff;
1875 struct netdev_hw_addr
*ha
;
1879 netdev_for_each_mc_addr(ha
, netdev
) {
1880 int bit_nr
= ether_crc(ETH_ALEN
, ha
->addr
) >> 26;
1882 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
1887 tmp
[0] = __cpu_to_le32(swab32(mc_filter
[1]));
1888 tmp
[1] = __cpu_to_le32(swab32(mc_filter
[0]));
1890 pla_ocp_write(tp
, PLA_MAR
, BYTE_EN_DWORD
, sizeof(tmp
), tmp
);
1891 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
1892 netif_wake_queue(netdev
);
1895 static netdev_tx_t
rtl8152_start_xmit(struct sk_buff
*skb
,
1896 struct net_device
*netdev
)
1898 struct r8152
*tp
= netdev_priv(netdev
);
1900 skb_tx_timestamp(skb
);
1902 skb_queue_tail(&tp
->tx_queue
, skb
);
1904 if (!list_empty(&tp
->tx_free
)) {
1905 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
1906 set_bit(SCHEDULE_TASKLET
, &tp
->flags
);
1907 schedule_delayed_work(&tp
->schedule
, 0);
1909 usb_mark_last_busy(tp
->udev
);
1910 tasklet_schedule(&tp
->tl
);
1912 } else if (skb_queue_len(&tp
->tx_queue
) > tp
->tx_qlen
) {
1913 netif_stop_queue(netdev
);
1916 return NETDEV_TX_OK
;
1919 static void r8152b_reset_packet_filter(struct r8152
*tp
)
1923 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_FMC
);
1924 ocp_data
&= ~FMC_FCR_MCU_EN
;
1925 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
1926 ocp_data
|= FMC_FCR_MCU_EN
;
1927 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
1930 static void rtl8152_nic_reset(struct r8152
*tp
)
1934 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, CR_RST
);
1936 for (i
= 0; i
< 1000; i
++) {
1937 if (!(ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
) & CR_RST
))
1939 usleep_range(100, 400);
1943 static void set_tx_qlen(struct r8152
*tp
)
1945 struct net_device
*netdev
= tp
->netdev
;
1947 tp
->tx_qlen
= agg_buf_sz
/ (netdev
->mtu
+ VLAN_ETH_HLEN
+ VLAN_HLEN
+
1948 sizeof(struct tx_desc
));
1951 static inline u8
rtl8152_get_speed(struct r8152
*tp
)
1953 return ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_PHYSTATUS
);
1956 static void rtl_set_eee_plus(struct r8152
*tp
)
1961 speed
= rtl8152_get_speed(tp
);
1962 if (speed
& _10bps
) {
1963 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
1964 ocp_data
|= EEEP_CR_EEEP_TX
;
1965 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
1967 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
1968 ocp_data
&= ~EEEP_CR_EEEP_TX
;
1969 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
1973 static void rxdy_gated_en(struct r8152
*tp
, bool enable
)
1977 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
);
1979 ocp_data
|= RXDY_GATED_EN
;
1981 ocp_data
&= ~RXDY_GATED_EN
;
1982 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
, ocp_data
);
1985 static int rtl_start_rx(struct r8152
*tp
)
1989 INIT_LIST_HEAD(&tp
->rx_done
);
1990 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1991 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
1992 ret
= r8152_submit_rx(tp
, &tp
->rx_info
[i
], GFP_KERNEL
);
2000 static int rtl_stop_rx(struct r8152
*tp
)
2004 for (i
= 0; i
< RTL8152_MAX_RX
; i
++)
2005 usb_kill_urb(tp
->rx_info
[i
].urb
);
2010 static int rtl_enable(struct r8152
*tp
)
2014 r8152b_reset_packet_filter(tp
);
2016 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
);
2017 ocp_data
|= CR_RE
| CR_TE
;
2018 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, ocp_data
);
2020 rxdy_gated_en(tp
, false);
2022 return rtl_start_rx(tp
);
2025 static int rtl8152_enable(struct r8152
*tp
)
2027 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2031 rtl_set_eee_plus(tp
);
2033 return rtl_enable(tp
);
2036 static void r8153_set_rx_agg(struct r8152
*tp
)
2040 speed
= rtl8152_get_speed(tp
);
2041 if (speed
& _1000bps
) {
2042 if (tp
->udev
->speed
== USB_SPEED_SUPER
) {
2043 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
,
2045 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_EARLY_AGG
,
2048 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
,
2050 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_EARLY_AGG
,
2054 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_SLOW
);
2055 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_EARLY_AGG
,
2060 static int rtl8153_enable(struct r8152
*tp
)
2062 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2066 rtl_set_eee_plus(tp
);
2067 r8153_set_rx_agg(tp
);
2069 return rtl_enable(tp
);
2072 static void rtl_disable(struct r8152
*tp
)
2077 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2078 rtl_drop_queued_tx(tp
);
2082 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2083 ocp_data
&= ~RCR_ACPT_ALL
;
2084 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2086 rtl_drop_queued_tx(tp
);
2088 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
2089 usb_kill_urb(tp
->tx_info
[i
].urb
);
2091 rxdy_gated_en(tp
, true);
2093 for (i
= 0; i
< 1000; i
++) {
2094 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2095 if ((ocp_data
& FIFO_EMPTY
) == FIFO_EMPTY
)
2097 usleep_range(1000, 2000);
2100 for (i
= 0; i
< 1000; i
++) {
2101 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
) & TCR0_TX_EMPTY
)
2103 usleep_range(1000, 2000);
2108 rtl8152_nic_reset(tp
);
2111 static void r8152_power_cut_en(struct r8152
*tp
, bool enable
)
2115 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
);
2117 ocp_data
|= POWER_CUT
;
2119 ocp_data
&= ~POWER_CUT
;
2120 ocp_write_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
, ocp_data
);
2122 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
);
2123 ocp_data
&= ~RESUME_INDICATE
;
2124 ocp_write_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
, ocp_data
);
2127 static void rtl_rx_vlan_en(struct r8152
*tp
, bool enable
)
2131 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
2133 ocp_data
|= CPCR_RX_VLAN
;
2135 ocp_data
&= ~CPCR_RX_VLAN
;
2136 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
2139 static int rtl8152_set_features(struct net_device
*dev
,
2140 netdev_features_t features
)
2142 netdev_features_t changed
= features
^ dev
->features
;
2143 struct r8152
*tp
= netdev_priv(dev
);
2146 ret
= usb_autopm_get_interface(tp
->intf
);
2150 mutex_lock(&tp
->control
);
2152 if (changed
& NETIF_F_HW_VLAN_CTAG_RX
) {
2153 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
2154 rtl_rx_vlan_en(tp
, true);
2156 rtl_rx_vlan_en(tp
, false);
2159 mutex_unlock(&tp
->control
);
2161 usb_autopm_put_interface(tp
->intf
);
2167 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2169 static u32
__rtl_get_wol(struct r8152
*tp
)
2174 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2175 if (!(ocp_data
& LAN_WAKE_EN
))
2178 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2179 if (ocp_data
& LINK_ON_WAKE_EN
)
2180 wolopts
|= WAKE_PHY
;
2182 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2183 if (ocp_data
& UWF_EN
)
2184 wolopts
|= WAKE_UCAST
;
2185 if (ocp_data
& BWF_EN
)
2186 wolopts
|= WAKE_BCAST
;
2187 if (ocp_data
& MWF_EN
)
2188 wolopts
|= WAKE_MCAST
;
2190 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2191 if (ocp_data
& MAGIC_EN
)
2192 wolopts
|= WAKE_MAGIC
;
2197 static void __rtl_set_wol(struct r8152
*tp
, u32 wolopts
)
2201 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2203 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2204 ocp_data
&= ~LINK_ON_WAKE_EN
;
2205 if (wolopts
& WAKE_PHY
)
2206 ocp_data
|= LINK_ON_WAKE_EN
;
2207 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2209 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2210 ocp_data
&= ~(UWF_EN
| BWF_EN
| MWF_EN
| LAN_WAKE_EN
);
2211 if (wolopts
& WAKE_UCAST
)
2213 if (wolopts
& WAKE_BCAST
)
2215 if (wolopts
& WAKE_MCAST
)
2217 if (wolopts
& WAKE_ANY
)
2218 ocp_data
|= LAN_WAKE_EN
;
2219 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
, ocp_data
);
2221 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2223 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2224 ocp_data
&= ~MAGIC_EN
;
2225 if (wolopts
& WAKE_MAGIC
)
2226 ocp_data
|= MAGIC_EN
;
2227 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
, ocp_data
);
2229 if (wolopts
& WAKE_ANY
)
2230 device_set_wakeup_enable(&tp
->udev
->dev
, true);
2232 device_set_wakeup_enable(&tp
->udev
->dev
, false);
2235 static void rtl_runtime_suspend_enable(struct r8152
*tp
, bool enable
)
2240 __rtl_set_wol(tp
, WAKE_ANY
);
2242 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2244 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2245 ocp_data
|= LINK_OFF_WAKE_EN
;
2246 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2248 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2250 __rtl_set_wol(tp
, tp
->saved_wolopts
);
2254 static void rtl_phy_reset(struct r8152
*tp
)
2259 clear_bit(PHY_RESET
, &tp
->flags
);
2261 data
= r8152_mdio_read(tp
, MII_BMCR
);
2263 /* don't reset again before the previous one complete */
2264 if (data
& BMCR_RESET
)
2268 r8152_mdio_write(tp
, MII_BMCR
, data
);
2270 for (i
= 0; i
< 50; i
++) {
2272 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
2277 static void r8153_teredo_off(struct r8152
*tp
)
2281 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2282 ocp_data
&= ~(TEREDO_SEL
| TEREDO_RS_EVENT_MASK
| OOB_TEREDO_EN
);
2283 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2285 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_WDT6_CTRL
, WDT6_SET_MODE
);
2286 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_REALWOW_TIMER
, 0);
2287 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TEREDO_TIMER
, 0);
2290 static void r8152b_disable_aldps(struct r8152
*tp
)
2292 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPDNPS
| LINKENA
| DIS_SDSAVE
);
2296 static inline void r8152b_enable_aldps(struct r8152
*tp
)
2298 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPWRSAVE
| ENPDNPS
|
2299 LINKENA
| DIS_SDSAVE
);
2302 static void rtl8152_disable(struct r8152
*tp
)
2304 r8152b_disable_aldps(tp
);
2306 r8152b_enable_aldps(tp
);
2309 static void r8152b_hw_phy_cfg(struct r8152
*tp
)
2313 data
= r8152_mdio_read(tp
, MII_BMCR
);
2314 if (data
& BMCR_PDOWN
) {
2315 data
&= ~BMCR_PDOWN
;
2316 r8152_mdio_write(tp
, MII_BMCR
, data
);
2319 set_bit(PHY_RESET
, &tp
->flags
);
2322 static void r8152b_exit_oob(struct r8152
*tp
)
2327 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2328 ocp_data
&= ~RCR_ACPT_ALL
;
2329 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2331 rxdy_gated_en(tp
, true);
2332 r8153_teredo_off(tp
);
2333 r8152b_hw_phy_cfg(tp
);
2335 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2336 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, 0x00);
2338 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2339 ocp_data
&= ~NOW_IS_OOB
;
2340 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2342 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2343 ocp_data
&= ~MCU_BORW_EN
;
2344 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2346 for (i
= 0; i
< 1000; i
++) {
2347 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2348 if (ocp_data
& LINK_LIST_READY
)
2350 usleep_range(1000, 2000);
2353 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2354 ocp_data
|= RE_INIT_LL
;
2355 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2357 for (i
= 0; i
< 1000; i
++) {
2358 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2359 if (ocp_data
& LINK_LIST_READY
)
2361 usleep_range(1000, 2000);
2364 rtl8152_nic_reset(tp
);
2366 /* rx share fifo credit full threshold */
2367 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2369 if (tp
->udev
->speed
== USB_SPEED_FULL
||
2370 tp
->udev
->speed
== USB_SPEED_LOW
) {
2371 /* rx share fifo credit near full threshold */
2372 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2374 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2377 /* rx share fifo credit near full threshold */
2378 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2380 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2384 /* TX share fifo free credit full threshold */
2385 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL
);
2387 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_TX_AGG
, TX_AGG_MAX_THRESHOLD
);
2388 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_HIGH
);
2389 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_TX_DMA
,
2390 TEST_MODE_DISABLE
| TX_SIZE_ADJUST1
);
2392 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
2394 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2396 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2397 ocp_data
|= TCR0_AUTO_FIFO
;
2398 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2401 static void r8152b_enter_oob(struct r8152
*tp
)
2406 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2407 ocp_data
&= ~NOW_IS_OOB
;
2408 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2410 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_OOB
);
2411 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_OOB
);
2412 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_OOB
);
2416 for (i
= 0; i
< 1000; i
++) {
2417 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2418 if (ocp_data
& LINK_LIST_READY
)
2420 usleep_range(1000, 2000);
2423 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2424 ocp_data
|= RE_INIT_LL
;
2425 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2427 for (i
= 0; i
< 1000; i
++) {
2428 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2429 if (ocp_data
& LINK_LIST_READY
)
2431 usleep_range(1000, 2000);
2434 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2436 rtl_rx_vlan_en(tp
, true);
2438 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2439 ocp_data
|= ALDPS_PROXY_MODE
;
2440 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2442 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2443 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2444 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2446 rxdy_gated_en(tp
, false);
2448 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2449 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2450 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2453 static void r8153_hw_phy_cfg(struct r8152
*tp
)
2458 ocp_reg_write(tp
, OCP_ADC_CFG
, CKADSEL_L
| ADC_EN
| EN_EMI_L
);
2459 data
= r8152_mdio_read(tp
, MII_BMCR
);
2460 if (data
& BMCR_PDOWN
) {
2461 data
&= ~BMCR_PDOWN
;
2462 r8152_mdio_write(tp
, MII_BMCR
, data
);
2465 if (tp
->version
== RTL_VER_03
) {
2466 data
= ocp_reg_read(tp
, OCP_EEE_CFG
);
2467 data
&= ~CTAP_SHORT_EN
;
2468 ocp_reg_write(tp
, OCP_EEE_CFG
, data
);
2471 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2472 data
|= EEE_CLKDIV_EN
;
2473 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2475 data
= ocp_reg_read(tp
, OCP_DOWN_SPEED
);
2476 data
|= EN_10M_BGOFF
;
2477 ocp_reg_write(tp
, OCP_DOWN_SPEED
, data
);
2478 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2479 data
|= EN_10M_PLLOFF
;
2480 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2481 data
= sram_read(tp
, SRAM_IMPEDANCE
);
2482 data
&= ~RX_DRIVING_MASK
;
2483 sram_write(tp
, SRAM_IMPEDANCE
, data
);
2485 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
2486 ocp_data
|= PFM_PWM_SWITCH
;
2487 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
2489 data
= sram_read(tp
, SRAM_LPF_CFG
);
2490 data
|= LPF_AUTO_TUNE
;
2491 sram_write(tp
, SRAM_LPF_CFG
, data
);
2493 data
= sram_read(tp
, SRAM_10M_AMP1
);
2494 data
|= GDAC_IB_UPALL
;
2495 sram_write(tp
, SRAM_10M_AMP1
, data
);
2496 data
= sram_read(tp
, SRAM_10M_AMP2
);
2498 sram_write(tp
, SRAM_10M_AMP2
, data
);
2500 set_bit(PHY_RESET
, &tp
->flags
);
2503 static void r8153_u1u2en(struct r8152
*tp
, bool enable
)
2508 memset(u1u2
, 0xff, sizeof(u1u2
));
2510 memset(u1u2
, 0x00, sizeof(u1u2
));
2512 usb_ocp_write(tp
, USB_TOLERANCE
, BYTE_EN_SIX_BYTES
, sizeof(u1u2
), u1u2
);
2515 static void r8153_u2p3en(struct r8152
*tp
, bool enable
)
2519 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
);
2521 ocp_data
|= U2P3_ENABLE
;
2523 ocp_data
&= ~U2P3_ENABLE
;
2524 ocp_write_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
, ocp_data
);
2527 static void r8153_power_cut_en(struct r8152
*tp
, bool enable
)
2531 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
2533 ocp_data
|= PWR_EN
| PHASE2_EN
;
2535 ocp_data
&= ~(PWR_EN
| PHASE2_EN
);
2536 ocp_write_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
2538 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
2539 ocp_data
&= ~PCUT_STATUS
;
2540 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
2543 static void r8153_first_init(struct r8152
*tp
)
2548 rxdy_gated_en(tp
, true);
2549 r8153_teredo_off(tp
);
2551 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2552 ocp_data
&= ~RCR_ACPT_ALL
;
2553 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2555 r8153_hw_phy_cfg(tp
);
2557 rtl8152_nic_reset(tp
);
2559 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2560 ocp_data
&= ~NOW_IS_OOB
;
2561 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2563 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2564 ocp_data
&= ~MCU_BORW_EN
;
2565 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2567 for (i
= 0; i
< 1000; i
++) {
2568 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2569 if (ocp_data
& LINK_LIST_READY
)
2571 usleep_range(1000, 2000);
2574 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2575 ocp_data
|= RE_INIT_LL
;
2576 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2578 for (i
= 0; i
< 1000; i
++) {
2579 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2580 if (ocp_data
& LINK_LIST_READY
)
2582 usleep_range(1000, 2000);
2585 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
2587 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8153_RMS
);
2588 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_MTPS
, MTPS_JUMBO
);
2590 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2591 ocp_data
|= TCR0_AUTO_FIFO
;
2592 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2594 rtl8152_nic_reset(tp
);
2596 /* rx share fifo credit full threshold */
2597 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2598 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_NORMAL
);
2599 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_NORMAL
);
2600 /* TX share fifo free credit full threshold */
2601 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL2
);
2603 /* rx aggregation */
2604 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
2605 ocp_data
&= ~RX_AGG_DISABLE
;
2606 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
2609 static void r8153_enter_oob(struct r8152
*tp
)
2614 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2615 ocp_data
&= ~NOW_IS_OOB
;
2616 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2620 for (i
= 0; i
< 1000; i
++) {
2621 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2622 if (ocp_data
& LINK_LIST_READY
)
2624 usleep_range(1000, 2000);
2627 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2628 ocp_data
|= RE_INIT_LL
;
2629 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2631 for (i
= 0; i
< 1000; i
++) {
2632 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2633 if (ocp_data
& LINK_LIST_READY
)
2635 usleep_range(1000, 2000);
2638 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8153_RMS
);
2640 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2641 ocp_data
&= ~TEREDO_WAKE_MASK
;
2642 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2644 rtl_rx_vlan_en(tp
, true);
2646 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2647 ocp_data
|= ALDPS_PROXY_MODE
;
2648 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2650 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2651 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2652 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2654 rxdy_gated_en(tp
, false);
2656 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2657 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2658 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2661 static void r8153_disable_aldps(struct r8152
*tp
)
2665 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2667 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2671 static void r8153_enable_aldps(struct r8152
*tp
)
2675 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2677 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2680 static void rtl8153_disable(struct r8152
*tp
)
2682 r8153_disable_aldps(tp
);
2684 r8153_enable_aldps(tp
);
2687 static int rtl8152_set_speed(struct r8152
*tp
, u8 autoneg
, u16 speed
, u8 duplex
)
2689 u16 bmcr
, anar
, gbcr
;
2692 cancel_delayed_work_sync(&tp
->schedule
);
2693 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
2694 anar
&= ~(ADVERTISE_10HALF
| ADVERTISE_10FULL
|
2695 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
2696 if (tp
->mii
.supports_gmii
) {
2697 gbcr
= r8152_mdio_read(tp
, MII_CTRL1000
);
2698 gbcr
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
2703 if (autoneg
== AUTONEG_DISABLE
) {
2704 if (speed
== SPEED_10
) {
2706 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2707 } else if (speed
== SPEED_100
) {
2708 bmcr
= BMCR_SPEED100
;
2709 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2710 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2711 bmcr
= BMCR_SPEED1000
;
2712 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2718 if (duplex
== DUPLEX_FULL
)
2719 bmcr
|= BMCR_FULLDPLX
;
2721 if (speed
== SPEED_10
) {
2722 if (duplex
== DUPLEX_FULL
)
2723 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2725 anar
|= ADVERTISE_10HALF
;
2726 } else if (speed
== SPEED_100
) {
2727 if (duplex
== DUPLEX_FULL
) {
2728 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2729 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2731 anar
|= ADVERTISE_10HALF
;
2732 anar
|= ADVERTISE_100HALF
;
2734 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2735 if (duplex
== DUPLEX_FULL
) {
2736 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2737 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2738 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2740 anar
|= ADVERTISE_10HALF
;
2741 anar
|= ADVERTISE_100HALF
;
2742 gbcr
|= ADVERTISE_1000HALF
;
2749 bmcr
= BMCR_ANENABLE
| BMCR_ANRESTART
;
2752 if (test_bit(PHY_RESET
, &tp
->flags
))
2755 if (tp
->mii
.supports_gmii
)
2756 r8152_mdio_write(tp
, MII_CTRL1000
, gbcr
);
2758 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
2759 r8152_mdio_write(tp
, MII_BMCR
, bmcr
);
2761 if (test_bit(PHY_RESET
, &tp
->flags
)) {
2764 clear_bit(PHY_RESET
, &tp
->flags
);
2765 for (i
= 0; i
< 50; i
++) {
2767 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
2777 static void rtl8152_up(struct r8152
*tp
)
2779 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2782 r8152b_disable_aldps(tp
);
2783 r8152b_exit_oob(tp
);
2784 r8152b_enable_aldps(tp
);
2787 static void rtl8152_down(struct r8152
*tp
)
2789 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2790 rtl_drop_queued_tx(tp
);
2794 r8152_power_cut_en(tp
, false);
2795 r8152b_disable_aldps(tp
);
2796 r8152b_enter_oob(tp
);
2797 r8152b_enable_aldps(tp
);
2800 static void rtl8153_up(struct r8152
*tp
)
2802 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2805 r8153_disable_aldps(tp
);
2806 r8153_first_init(tp
);
2807 r8153_enable_aldps(tp
);
2810 static void rtl8153_down(struct r8152
*tp
)
2812 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2813 rtl_drop_queued_tx(tp
);
2817 r8153_u1u2en(tp
, false);
2818 r8153_power_cut_en(tp
, false);
2819 r8153_disable_aldps(tp
);
2820 r8153_enter_oob(tp
);
2821 r8153_enable_aldps(tp
);
2824 static void set_carrier(struct r8152
*tp
)
2826 struct net_device
*netdev
= tp
->netdev
;
2829 clear_bit(RTL8152_LINK_CHG
, &tp
->flags
);
2830 speed
= rtl8152_get_speed(tp
);
2832 if (speed
& LINK_STATUS
) {
2833 if (!(tp
->speed
& LINK_STATUS
)) {
2834 tp
->rtl_ops
.enable(tp
);
2835 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
2836 netif_carrier_on(netdev
);
2839 if (tp
->speed
& LINK_STATUS
) {
2840 netif_carrier_off(netdev
);
2841 tasklet_disable(&tp
->tl
);
2842 tp
->rtl_ops
.disable(tp
);
2843 tasklet_enable(&tp
->tl
);
2849 static void rtl_work_func_t(struct work_struct
*work
)
2851 struct r8152
*tp
= container_of(work
, struct r8152
, schedule
.work
);
2853 if (usb_autopm_get_interface(tp
->intf
) < 0)
2856 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
2859 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2862 if (!mutex_trylock(&tp
->control
)) {
2863 schedule_delayed_work(&tp
->schedule
, 0);
2867 if (test_bit(RTL8152_LINK_CHG
, &tp
->flags
))
2870 if (test_bit(RTL8152_SET_RX_MODE
, &tp
->flags
))
2871 _rtl8152_set_rx_mode(tp
->netdev
);
2873 if (test_bit(SCHEDULE_TASKLET
, &tp
->flags
) &&
2874 (tp
->speed
& LINK_STATUS
)) {
2875 clear_bit(SCHEDULE_TASKLET
, &tp
->flags
);
2876 tasklet_schedule(&tp
->tl
);
2879 if (test_bit(PHY_RESET
, &tp
->flags
))
2882 mutex_unlock(&tp
->control
);
2885 usb_autopm_put_interface(tp
->intf
);
2888 static int rtl8152_open(struct net_device
*netdev
)
2890 struct r8152
*tp
= netdev_priv(netdev
);
2893 res
= alloc_all_mem(tp
);
2897 /* set speed to 0 to avoid autoresume try to submit rx */
2900 res
= usb_autopm_get_interface(tp
->intf
);
2906 mutex_lock(&tp
->control
);
2908 /* The WORK_ENABLE may be set when autoresume occurs */
2909 if (test_bit(WORK_ENABLE
, &tp
->flags
)) {
2910 clear_bit(WORK_ENABLE
, &tp
->flags
);
2911 usb_kill_urb(tp
->intr_urb
);
2912 cancel_delayed_work_sync(&tp
->schedule
);
2914 /* disable the tx/rx, if the workqueue has enabled them. */
2915 if (tp
->speed
& LINK_STATUS
)
2916 tp
->rtl_ops
.disable(tp
);
2921 rtl8152_set_speed(tp
, AUTONEG_ENABLE
,
2922 tp
->mii
.supports_gmii
? SPEED_1000
: SPEED_100
,
2925 netif_carrier_off(netdev
);
2926 netif_start_queue(netdev
);
2927 set_bit(WORK_ENABLE
, &tp
->flags
);
2929 res
= usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
2932 netif_device_detach(tp
->netdev
);
2933 netif_warn(tp
, ifup
, netdev
, "intr_urb submit failed: %d\n",
2938 mutex_unlock(&tp
->control
);
2940 usb_autopm_put_interface(tp
->intf
);
2946 static int rtl8152_close(struct net_device
*netdev
)
2948 struct r8152
*tp
= netdev_priv(netdev
);
2951 clear_bit(WORK_ENABLE
, &tp
->flags
);
2952 usb_kill_urb(tp
->intr_urb
);
2953 cancel_delayed_work_sync(&tp
->schedule
);
2954 netif_stop_queue(netdev
);
2956 res
= usb_autopm_get_interface(tp
->intf
);
2958 rtl_drop_queued_tx(tp
);
2960 mutex_lock(&tp
->control
);
2962 /* The autosuspend may have been enabled and wouldn't
2963 * be disable when autoresume occurs, because the
2964 * netif_running() would be false.
2966 rtl_runtime_suspend_enable(tp
, false);
2968 tasklet_disable(&tp
->tl
);
2969 tp
->rtl_ops
.down(tp
);
2970 tasklet_enable(&tp
->tl
);
2972 mutex_unlock(&tp
->control
);
2974 usb_autopm_put_interface(tp
->intf
);
2982 static inline void r8152_mmd_indirect(struct r8152
*tp
, u16 dev
, u16 reg
)
2984 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_ADDR
| dev
);
2985 ocp_reg_write(tp
, OCP_EEE_DATA
, reg
);
2986 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_DATA
| dev
);
2989 static u16
r8152_mmd_read(struct r8152
*tp
, u16 dev
, u16 reg
)
2993 r8152_mmd_indirect(tp
, dev
, reg
);
2994 data
= ocp_reg_read(tp
, OCP_EEE_DATA
);
2995 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
3000 static void r8152_mmd_write(struct r8152
*tp
, u16 dev
, u16 reg
, u16 data
)
3002 r8152_mmd_indirect(tp
, dev
, reg
);
3003 ocp_reg_write(tp
, OCP_EEE_DATA
, data
);
3004 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
3007 static void r8152_eee_en(struct r8152
*tp
, bool enable
)
3009 u16 config1
, config2
, config3
;
3012 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3013 config1
= ocp_reg_read(tp
, OCP_EEE_CONFIG1
) & ~sd_rise_time_mask
;
3014 config2
= ocp_reg_read(tp
, OCP_EEE_CONFIG2
);
3015 config3
= ocp_reg_read(tp
, OCP_EEE_CONFIG3
) & ~fast_snr_mask
;
3018 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
3019 config1
|= EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
| RX_QUIET_EN
;
3020 config1
|= sd_rise_time(1);
3021 config2
|= RG_DACQUIET_EN
| RG_LDVQUIET_EN
;
3022 config3
|= fast_snr(42);
3024 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
3025 config1
&= ~(EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
|
3027 config1
|= sd_rise_time(7);
3028 config2
&= ~(RG_DACQUIET_EN
| RG_LDVQUIET_EN
);
3029 config3
|= fast_snr(511);
3032 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
3033 ocp_reg_write(tp
, OCP_EEE_CONFIG1
, config1
);
3034 ocp_reg_write(tp
, OCP_EEE_CONFIG2
, config2
);
3035 ocp_reg_write(tp
, OCP_EEE_CONFIG3
, config3
);
3038 static void r8152b_enable_eee(struct r8152
*tp
)
3040 r8152_eee_en(tp
, true);
3041 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, MDIO_EEE_100TX
);
3044 static void r8153_eee_en(struct r8152
*tp
, bool enable
)
3049 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3050 config
= ocp_reg_read(tp
, OCP_EEE_CFG
);
3053 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
3056 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
3057 config
&= ~EEE10_EN
;
3060 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
3061 ocp_reg_write(tp
, OCP_EEE_CFG
, config
);
3064 static void r8153_enable_eee(struct r8152
*tp
)
3066 r8153_eee_en(tp
, true);
3067 ocp_reg_write(tp
, OCP_EEE_ADV
, MDIO_EEE_1000T
| MDIO_EEE_100TX
);
3070 static void r8152b_enable_fc(struct r8152
*tp
)
3074 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
3075 anar
|= ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
;
3076 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
3079 static void rtl_tally_reset(struct r8152
*tp
)
3083 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
);
3084 ocp_data
|= TALLY_RESET
;
3085 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
, ocp_data
);
3088 static void r8152b_init(struct r8152
*tp
)
3092 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3095 r8152b_disable_aldps(tp
);
3097 if (tp
->version
== RTL_VER_01
) {
3098 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
3099 ocp_data
&= ~LED_MODE_MASK
;
3100 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
3103 r8152_power_cut_en(tp
, false);
3105 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
3106 ocp_data
|= TX_10M_IDLE_EN
| PFM_PWM_SWITCH
;
3107 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
3108 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
);
3109 ocp_data
&= ~MCU_CLK_RATIO_MASK
;
3110 ocp_data
|= MCU_CLK_RATIO
| D3_CLK_GATED_EN
;
3111 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ocp_data
);
3112 ocp_data
= GPHY_STS_MSK
| SPEED_DOWN_MSK
|
3113 SPDWN_RXDV_MSK
| SPDWN_LINKCHG_MSK
;
3114 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_GPHY_INTR_IMR
, ocp_data
);
3116 r8152b_enable_eee(tp
);
3117 r8152b_enable_aldps(tp
);
3118 r8152b_enable_fc(tp
);
3119 rtl_tally_reset(tp
);
3121 /* enable rx aggregation */
3122 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
3123 ocp_data
&= ~RX_AGG_DISABLE
;
3124 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
3127 static void r8153_init(struct r8152
*tp
)
3132 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3135 r8153_disable_aldps(tp
);
3136 r8153_u1u2en(tp
, false);
3138 for (i
= 0; i
< 500; i
++) {
3139 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BOOT_CTRL
) &
3145 for (i
= 0; i
< 500; i
++) {
3146 ocp_data
= ocp_reg_read(tp
, OCP_PHY_STATUS
) & PHY_STAT_MASK
;
3147 if (ocp_data
== PHY_STAT_LAN_ON
|| ocp_data
== PHY_STAT_PWRDN
)
3152 r8153_u2p3en(tp
, false);
3154 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
);
3155 ocp_data
&= ~TIMER11_EN
;
3156 ocp_write_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
, ocp_data
);
3158 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
3159 ocp_data
&= ~LED_MODE_MASK
;
3160 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
3162 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_LPM_CTRL
);
3163 ocp_data
&= ~LPM_TIMER_MASK
;
3164 if (tp
->udev
->speed
== USB_SPEED_SUPER
)
3165 ocp_data
|= LPM_TIMER_500US
;
3167 ocp_data
|= LPM_TIMER_500MS
;
3168 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_LPM_CTRL
, ocp_data
);
3170 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
);
3171 ocp_data
&= ~SEN_VAL_MASK
;
3172 ocp_data
|= SEN_VAL_NORMAL
| SEL_RXIDLE
;
3173 ocp_write_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
, ocp_data
);
3175 r8153_power_cut_en(tp
, false);
3176 r8153_u1u2en(tp
, true);
3178 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ALDPS_SPDWN_RATIO
);
3179 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
, EEE_SPDWN_RATIO
);
3180 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
,
3181 PKT_AVAIL_SPDWN_EN
| SUSPEND_SPDWN_EN
|
3182 U1U2_SPDWN_EN
| L1_SPDWN_EN
);
3183 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL4
,
3184 PWRSAVE_SPDWN_EN
| RXDV_SPDWN_EN
| TX10MIDLE_EN
|
3185 TP100_SPDWN_EN
| TP500_SPDWN_EN
| TP1000_SPDWN_EN
|
3188 r8153_enable_eee(tp
);
3189 r8153_enable_aldps(tp
);
3190 r8152b_enable_fc(tp
);
3191 rtl_tally_reset(tp
);
3194 static int rtl8152_suspend(struct usb_interface
*intf
, pm_message_t message
)
3196 struct r8152
*tp
= usb_get_intfdata(intf
);
3197 struct net_device
*netdev
= tp
->netdev
;
3200 mutex_lock(&tp
->control
);
3202 if (PMSG_IS_AUTO(message
)) {
3203 if (netif_running(netdev
) && work_busy(&tp
->schedule
.work
)) {
3208 set_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3210 netif_device_detach(netdev
);
3213 if (netif_running(netdev
) && test_bit(WORK_ENABLE
, &tp
->flags
)) {
3214 clear_bit(WORK_ENABLE
, &tp
->flags
);
3215 usb_kill_urb(tp
->intr_urb
);
3216 tasklet_disable(&tp
->tl
);
3217 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3219 rtl_runtime_suspend_enable(tp
, true);
3221 cancel_delayed_work_sync(&tp
->schedule
);
3222 tp
->rtl_ops
.down(tp
);
3224 tasklet_enable(&tp
->tl
);
3227 mutex_unlock(&tp
->control
);
3232 static int rtl8152_resume(struct usb_interface
*intf
)
3234 struct r8152
*tp
= usb_get_intfdata(intf
);
3236 mutex_lock(&tp
->control
);
3238 if (!test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3239 tp
->rtl_ops
.init(tp
);
3240 netif_device_attach(tp
->netdev
);
3243 if (netif_running(tp
->netdev
)) {
3244 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3245 rtl_runtime_suspend_enable(tp
, false);
3246 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3247 set_bit(WORK_ENABLE
, &tp
->flags
);
3248 if (tp
->speed
& LINK_STATUS
)
3252 rtl8152_set_speed(tp
, AUTONEG_ENABLE
,
3253 tp
->mii
.supports_gmii
?
3254 SPEED_1000
: SPEED_100
,
3257 netif_carrier_off(tp
->netdev
);
3258 set_bit(WORK_ENABLE
, &tp
->flags
);
3260 usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
3261 } else if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3262 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3265 mutex_unlock(&tp
->control
);
3270 static void rtl8152_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
3272 struct r8152
*tp
= netdev_priv(dev
);
3274 if (usb_autopm_get_interface(tp
->intf
) < 0)
3277 mutex_lock(&tp
->control
);
3279 wol
->supported
= WAKE_ANY
;
3280 wol
->wolopts
= __rtl_get_wol(tp
);
3282 mutex_unlock(&tp
->control
);
3284 usb_autopm_put_interface(tp
->intf
);
3287 static int rtl8152_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
3289 struct r8152
*tp
= netdev_priv(dev
);
3292 ret
= usb_autopm_get_interface(tp
->intf
);
3296 mutex_lock(&tp
->control
);
3298 __rtl_set_wol(tp
, wol
->wolopts
);
3299 tp
->saved_wolopts
= wol
->wolopts
& WAKE_ANY
;
3301 mutex_unlock(&tp
->control
);
3303 usb_autopm_put_interface(tp
->intf
);
3309 static u32
rtl8152_get_msglevel(struct net_device
*dev
)
3311 struct r8152
*tp
= netdev_priv(dev
);
3313 return tp
->msg_enable
;
3316 static void rtl8152_set_msglevel(struct net_device
*dev
, u32 value
)
3318 struct r8152
*tp
= netdev_priv(dev
);
3320 tp
->msg_enable
= value
;
3323 static void rtl8152_get_drvinfo(struct net_device
*netdev
,
3324 struct ethtool_drvinfo
*info
)
3326 struct r8152
*tp
= netdev_priv(netdev
);
3328 strlcpy(info
->driver
, MODULENAME
, sizeof(info
->driver
));
3329 strlcpy(info
->version
, DRIVER_VERSION
, sizeof(info
->version
));
3330 usb_make_path(tp
->udev
, info
->bus_info
, sizeof(info
->bus_info
));
3334 int rtl8152_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
3336 struct r8152
*tp
= netdev_priv(netdev
);
3339 if (!tp
->mii
.mdio_read
)
3342 ret
= usb_autopm_get_interface(tp
->intf
);
3346 mutex_lock(&tp
->control
);
3348 ret
= mii_ethtool_gset(&tp
->mii
, cmd
);
3350 mutex_unlock(&tp
->control
);
3352 usb_autopm_put_interface(tp
->intf
);
3358 static int rtl8152_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
3360 struct r8152
*tp
= netdev_priv(dev
);
3363 ret
= usb_autopm_get_interface(tp
->intf
);
3367 mutex_lock(&tp
->control
);
3369 ret
= rtl8152_set_speed(tp
, cmd
->autoneg
, cmd
->speed
, cmd
->duplex
);
3371 mutex_unlock(&tp
->control
);
3373 usb_autopm_put_interface(tp
->intf
);
3379 static const char rtl8152_gstrings
[][ETH_GSTRING_LEN
] = {
3386 "tx_single_collisions",
3387 "tx_multi_collisions",
3395 static int rtl8152_get_sset_count(struct net_device
*dev
, int sset
)
3399 return ARRAY_SIZE(rtl8152_gstrings
);
3405 static void rtl8152_get_ethtool_stats(struct net_device
*dev
,
3406 struct ethtool_stats
*stats
, u64
*data
)
3408 struct r8152
*tp
= netdev_priv(dev
);
3409 struct tally_counter tally
;
3411 if (usb_autopm_get_interface(tp
->intf
) < 0)
3414 generic_ocp_read(tp
, PLA_TALLYCNT
, sizeof(tally
), &tally
, MCU_TYPE_PLA
);
3416 usb_autopm_put_interface(tp
->intf
);
3418 data
[0] = le64_to_cpu(tally
.tx_packets
);
3419 data
[1] = le64_to_cpu(tally
.rx_packets
);
3420 data
[2] = le64_to_cpu(tally
.tx_errors
);
3421 data
[3] = le32_to_cpu(tally
.rx_errors
);
3422 data
[4] = le16_to_cpu(tally
.rx_missed
);
3423 data
[5] = le16_to_cpu(tally
.align_errors
);
3424 data
[6] = le32_to_cpu(tally
.tx_one_collision
);
3425 data
[7] = le32_to_cpu(tally
.tx_multi_collision
);
3426 data
[8] = le64_to_cpu(tally
.rx_unicast
);
3427 data
[9] = le64_to_cpu(tally
.rx_broadcast
);
3428 data
[10] = le32_to_cpu(tally
.rx_multicast
);
3429 data
[11] = le16_to_cpu(tally
.tx_aborted
);
3430 data
[12] = le16_to_cpu(tally
.tx_underun
);
3433 static void rtl8152_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
3435 switch (stringset
) {
3437 memcpy(data
, *rtl8152_gstrings
, sizeof(rtl8152_gstrings
));
3442 static int r8152_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3444 u32 ocp_data
, lp
, adv
, supported
= 0;
3447 val
= r8152_mmd_read(tp
, MDIO_MMD_PCS
, MDIO_PCS_EEE_ABLE
);
3448 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
3450 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
);
3451 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
3453 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_LPABLE
);
3454 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
3456 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3457 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
3459 eee
->eee_enabled
= !!ocp_data
;
3460 eee
->eee_active
= !!(supported
& adv
& lp
);
3461 eee
->supported
= supported
;
3462 eee
->advertised
= adv
;
3463 eee
->lp_advertised
= lp
;
3468 static int r8152_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3470 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
3472 r8152_eee_en(tp
, eee
->eee_enabled
);
3474 if (!eee
->eee_enabled
)
3477 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, val
);
3482 static int r8153_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3484 u32 ocp_data
, lp
, adv
, supported
= 0;
3487 val
= ocp_reg_read(tp
, OCP_EEE_ABLE
);
3488 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
3490 val
= ocp_reg_read(tp
, OCP_EEE_ADV
);
3491 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
3493 val
= ocp_reg_read(tp
, OCP_EEE_LPABLE
);
3494 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
3496 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3497 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
3499 eee
->eee_enabled
= !!ocp_data
;
3500 eee
->eee_active
= !!(supported
& adv
& lp
);
3501 eee
->supported
= supported
;
3502 eee
->advertised
= adv
;
3503 eee
->lp_advertised
= lp
;
3508 static int r8153_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3510 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
3512 r8153_eee_en(tp
, eee
->eee_enabled
);
3514 if (!eee
->eee_enabled
)
3517 ocp_reg_write(tp
, OCP_EEE_ADV
, val
);
3523 rtl_ethtool_get_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
3525 struct r8152
*tp
= netdev_priv(net
);
3528 ret
= usb_autopm_get_interface(tp
->intf
);
3532 mutex_lock(&tp
->control
);
3534 ret
= tp
->rtl_ops
.eee_get(tp
, edata
);
3536 mutex_unlock(&tp
->control
);
3538 usb_autopm_put_interface(tp
->intf
);
3545 rtl_ethtool_set_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
3547 struct r8152
*tp
= netdev_priv(net
);
3550 ret
= usb_autopm_get_interface(tp
->intf
);
3554 mutex_lock(&tp
->control
);
3556 ret
= tp
->rtl_ops
.eee_set(tp
, edata
);
3558 ret
= mii_nway_restart(&tp
->mii
);
3560 mutex_unlock(&tp
->control
);
3562 usb_autopm_put_interface(tp
->intf
);
3568 static struct ethtool_ops ops
= {
3569 .get_drvinfo
= rtl8152_get_drvinfo
,
3570 .get_settings
= rtl8152_get_settings
,
3571 .set_settings
= rtl8152_set_settings
,
3572 .get_link
= ethtool_op_get_link
,
3573 .get_msglevel
= rtl8152_get_msglevel
,
3574 .set_msglevel
= rtl8152_set_msglevel
,
3575 .get_wol
= rtl8152_get_wol
,
3576 .set_wol
= rtl8152_set_wol
,
3577 .get_strings
= rtl8152_get_strings
,
3578 .get_sset_count
= rtl8152_get_sset_count
,
3579 .get_ethtool_stats
= rtl8152_get_ethtool_stats
,
3580 .get_eee
= rtl_ethtool_get_eee
,
3581 .set_eee
= rtl_ethtool_set_eee
,
3584 static int rtl8152_ioctl(struct net_device
*netdev
, struct ifreq
*rq
, int cmd
)
3586 struct r8152
*tp
= netdev_priv(netdev
);
3587 struct mii_ioctl_data
*data
= if_mii(rq
);
3590 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3593 res
= usb_autopm_get_interface(tp
->intf
);
3599 data
->phy_id
= R8152_PHY_ID
; /* Internal PHY */
3603 mutex_lock(&tp
->control
);
3604 data
->val_out
= r8152_mdio_read(tp
, data
->reg_num
);
3605 mutex_unlock(&tp
->control
);
3609 if (!capable(CAP_NET_ADMIN
)) {
3613 mutex_lock(&tp
->control
);
3614 r8152_mdio_write(tp
, data
->reg_num
, data
->val_in
);
3615 mutex_unlock(&tp
->control
);
3622 usb_autopm_put_interface(tp
->intf
);
3628 static int rtl8152_change_mtu(struct net_device
*dev
, int new_mtu
)
3630 struct r8152
*tp
= netdev_priv(dev
);
3632 switch (tp
->version
) {
3635 return eth_change_mtu(dev
, new_mtu
);
3640 if (new_mtu
< 68 || new_mtu
> RTL8153_MAX_MTU
)
3648 static const struct net_device_ops rtl8152_netdev_ops
= {
3649 .ndo_open
= rtl8152_open
,
3650 .ndo_stop
= rtl8152_close
,
3651 .ndo_do_ioctl
= rtl8152_ioctl
,
3652 .ndo_start_xmit
= rtl8152_start_xmit
,
3653 .ndo_tx_timeout
= rtl8152_tx_timeout
,
3654 .ndo_set_features
= rtl8152_set_features
,
3655 .ndo_set_rx_mode
= rtl8152_set_rx_mode
,
3656 .ndo_set_mac_address
= rtl8152_set_mac_address
,
3657 .ndo_change_mtu
= rtl8152_change_mtu
,
3658 .ndo_validate_addr
= eth_validate_addr
,
3661 static void r8152b_get_version(struct r8152
*tp
)
3666 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR1
);
3667 version
= (u16
)(ocp_data
& VERSION_MASK
);
3671 tp
->version
= RTL_VER_01
;
3674 tp
->version
= RTL_VER_02
;
3677 tp
->version
= RTL_VER_03
;
3678 tp
->mii
.supports_gmii
= 1;
3681 tp
->version
= RTL_VER_04
;
3682 tp
->mii
.supports_gmii
= 1;
3685 tp
->version
= RTL_VER_05
;
3686 tp
->mii
.supports_gmii
= 1;
3689 netif_info(tp
, probe
, tp
->netdev
,
3690 "Unknown version 0x%04x\n", version
);
3695 static void rtl8152_unload(struct r8152
*tp
)
3697 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3700 if (tp
->version
!= RTL_VER_01
)
3701 r8152_power_cut_en(tp
, true);
3704 static void rtl8153_unload(struct r8152
*tp
)
3706 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3709 r8153_power_cut_en(tp
, false);
3712 static int rtl_ops_init(struct r8152
*tp
, const struct usb_device_id
*id
)
3714 struct rtl_ops
*ops
= &tp
->rtl_ops
;
3717 switch (id
->idVendor
) {
3718 case VENDOR_ID_REALTEK
:
3719 switch (id
->idProduct
) {
3720 case PRODUCT_ID_RTL8152
:
3721 ops
->init
= r8152b_init
;
3722 ops
->enable
= rtl8152_enable
;
3723 ops
->disable
= rtl8152_disable
;
3724 ops
->up
= rtl8152_up
;
3725 ops
->down
= rtl8152_down
;
3726 ops
->unload
= rtl8152_unload
;
3727 ops
->eee_get
= r8152_get_eee
;
3728 ops
->eee_set
= r8152_set_eee
;
3731 case PRODUCT_ID_RTL8153
:
3732 ops
->init
= r8153_init
;
3733 ops
->enable
= rtl8153_enable
;
3734 ops
->disable
= rtl8153_disable
;
3735 ops
->up
= rtl8153_up
;
3736 ops
->down
= rtl8153_down
;
3737 ops
->unload
= rtl8153_unload
;
3738 ops
->eee_get
= r8153_get_eee
;
3739 ops
->eee_set
= r8153_set_eee
;
3747 case VENDOR_ID_SAMSUNG
:
3748 switch (id
->idProduct
) {
3749 case PRODUCT_ID_SAMSUNG
:
3750 ops
->init
= r8153_init
;
3751 ops
->enable
= rtl8153_enable
;
3752 ops
->disable
= rtl8153_disable
;
3753 ops
->up
= rtl8153_up
;
3754 ops
->down
= rtl8153_down
;
3755 ops
->unload
= rtl8153_unload
;
3756 ops
->eee_get
= r8153_get_eee
;
3757 ops
->eee_set
= r8153_set_eee
;
3770 netif_err(tp
, probe
, tp
->netdev
, "Unknown Device\n");
3775 static int rtl8152_probe(struct usb_interface
*intf
,
3776 const struct usb_device_id
*id
)
3778 struct usb_device
*udev
= interface_to_usbdev(intf
);
3780 struct net_device
*netdev
;
3783 if (udev
->actconfig
->desc
.bConfigurationValue
!= 1) {
3784 usb_driver_set_configuration(udev
, 1);
3788 usb_reset_device(udev
);
3789 netdev
= alloc_etherdev(sizeof(struct r8152
));
3791 dev_err(&intf
->dev
, "Out of memory\n");
3795 SET_NETDEV_DEV(netdev
, &intf
->dev
);
3796 tp
= netdev_priv(netdev
);
3797 tp
->msg_enable
= 0x7FFF;
3800 tp
->netdev
= netdev
;
3803 ret
= rtl_ops_init(tp
, id
);
3807 tasklet_init(&tp
->tl
, bottom_half
, (unsigned long)tp
);
3808 mutex_init(&tp
->control
);
3809 INIT_DELAYED_WORK(&tp
->schedule
, rtl_work_func_t
);
3811 netdev
->netdev_ops
= &rtl8152_netdev_ops
;
3812 netdev
->watchdog_timeo
= RTL8152_TX_TIMEOUT
;
3814 netdev
->features
|= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
3815 NETIF_F_TSO
| NETIF_F_FRAGLIST
| NETIF_F_IPV6_CSUM
|
3816 NETIF_F_TSO6
| NETIF_F_HW_VLAN_CTAG_RX
|
3817 NETIF_F_HW_VLAN_CTAG_TX
;
3818 netdev
->hw_features
= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
3819 NETIF_F_TSO
| NETIF_F_FRAGLIST
|
3820 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
|
3821 NETIF_F_HW_VLAN_CTAG_RX
|
3822 NETIF_F_HW_VLAN_CTAG_TX
;
3823 netdev
->vlan_features
= NETIF_F_SG
| NETIF_F_IP_CSUM
| NETIF_F_TSO
|
3824 NETIF_F_HIGHDMA
| NETIF_F_FRAGLIST
|
3825 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
;
3827 netdev
->ethtool_ops
= &ops
;
3828 netif_set_gso_max_size(netdev
, RTL_LIMITED_TSO_SIZE
);
3830 tp
->mii
.dev
= netdev
;
3831 tp
->mii
.mdio_read
= read_mii_word
;
3832 tp
->mii
.mdio_write
= write_mii_word
;
3833 tp
->mii
.phy_id_mask
= 0x3f;
3834 tp
->mii
.reg_num_mask
= 0x1f;
3835 tp
->mii
.phy_id
= R8152_PHY_ID
;
3836 tp
->mii
.supports_gmii
= 0;
3838 intf
->needs_remote_wakeup
= 1;
3840 r8152b_get_version(tp
);
3841 tp
->rtl_ops
.init(tp
);
3842 set_ethernet_addr(tp
);
3844 usb_set_intfdata(intf
, tp
);
3846 ret
= register_netdev(netdev
);
3848 netif_err(tp
, probe
, netdev
, "couldn't register the device\n");
3852 tp
->saved_wolopts
= __rtl_get_wol(tp
);
3853 if (tp
->saved_wolopts
)
3854 device_set_wakeup_enable(&udev
->dev
, true);
3856 device_set_wakeup_enable(&udev
->dev
, false);
3858 netif_info(tp
, probe
, netdev
, "%s\n", DRIVER_VERSION
);
3863 usb_set_intfdata(intf
, NULL
);
3865 free_netdev(netdev
);
3869 static void rtl8152_disconnect(struct usb_interface
*intf
)
3871 struct r8152
*tp
= usb_get_intfdata(intf
);
3873 usb_set_intfdata(intf
, NULL
);
3875 struct usb_device
*udev
= tp
->udev
;
3877 if (udev
->state
== USB_STATE_NOTATTACHED
)
3878 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
3880 tasklet_kill(&tp
->tl
);
3881 unregister_netdev(tp
->netdev
);
3882 tp
->rtl_ops
.unload(tp
);
3883 free_netdev(tp
->netdev
);
3887 /* table of devices that work with this driver */
3888 static struct usb_device_id rtl8152_table
[] = {
3889 {USB_DEVICE(VENDOR_ID_REALTEK
, PRODUCT_ID_RTL8152
)},
3890 {USB_DEVICE(VENDOR_ID_REALTEK
, PRODUCT_ID_RTL8153
)},
3891 {USB_DEVICE(VENDOR_ID_SAMSUNG
, PRODUCT_ID_SAMSUNG
)},
3895 MODULE_DEVICE_TABLE(usb
, rtl8152_table
);
3897 static struct usb_driver rtl8152_driver
= {
3899 .id_table
= rtl8152_table
,
3900 .probe
= rtl8152_probe
,
3901 .disconnect
= rtl8152_disconnect
,
3902 .suspend
= rtl8152_suspend
,
3903 .resume
= rtl8152_resume
,
3904 .reset_resume
= rtl8152_resume
,
3905 .supports_autosuspend
= 1,
3906 .disable_hub_initiated_lpm
= 1,
3909 module_usb_driver(rtl8152_driver
);
3911 MODULE_AUTHOR(DRIVER_AUTHOR
);
3912 MODULE_DESCRIPTION(DRIVER_DESC
);
3913 MODULE_LICENSE("GPL");