2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
28 /* Version Information */
29 #define DRIVER_VERSION "v1.07.0 (2014/10/09)"
30 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
31 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
32 #define MODULENAME "r8152"
34 #define R8152_PHY_ID 32
36 #define PLA_IDR 0xc000
37 #define PLA_RCR 0xc010
38 #define PLA_RMS 0xc016
39 #define PLA_RXFIFO_CTRL0 0xc0a0
40 #define PLA_RXFIFO_CTRL1 0xc0a4
41 #define PLA_RXFIFO_CTRL2 0xc0a8
42 #define PLA_FMC 0xc0b4
43 #define PLA_CFG_WOL 0xc0b6
44 #define PLA_TEREDO_CFG 0xc0bc
45 #define PLA_MAR 0xcd00
46 #define PLA_BACKUP 0xd000
47 #define PAL_BDC_CR 0xd1a0
48 #define PLA_TEREDO_TIMER 0xd2cc
49 #define PLA_REALWOW_TIMER 0xd2e8
50 #define PLA_LEDSEL 0xdd90
51 #define PLA_LED_FEATURE 0xdd92
52 #define PLA_PHYAR 0xde00
53 #define PLA_BOOT_CTRL 0xe004
54 #define PLA_GPHY_INTR_IMR 0xe022
55 #define PLA_EEE_CR 0xe040
56 #define PLA_EEEP_CR 0xe080
57 #define PLA_MAC_PWR_CTRL 0xe0c0
58 #define PLA_MAC_PWR_CTRL2 0xe0ca
59 #define PLA_MAC_PWR_CTRL3 0xe0cc
60 #define PLA_MAC_PWR_CTRL4 0xe0ce
61 #define PLA_WDT6_CTRL 0xe428
62 #define PLA_TCR0 0xe610
63 #define PLA_TCR1 0xe612
64 #define PLA_MTPS 0xe615
65 #define PLA_TXFIFO_CTRL 0xe618
66 #define PLA_RSTTALLY 0xe800
68 #define PLA_CRWECR 0xe81c
69 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
70 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
71 #define PLA_CONFIG5 0xe822
72 #define PLA_PHY_PWR 0xe84c
73 #define PLA_OOB_CTRL 0xe84f
74 #define PLA_CPCR 0xe854
75 #define PLA_MISC_0 0xe858
76 #define PLA_MISC_1 0xe85a
77 #define PLA_OCP_GPHY_BASE 0xe86c
78 #define PLA_TALLYCNT 0xe890
79 #define PLA_SFF_STS_7 0xe8de
80 #define PLA_PHYSTATUS 0xe908
81 #define PLA_BP_BA 0xfc26
82 #define PLA_BP_0 0xfc28
83 #define PLA_BP_1 0xfc2a
84 #define PLA_BP_2 0xfc2c
85 #define PLA_BP_3 0xfc2e
86 #define PLA_BP_4 0xfc30
87 #define PLA_BP_5 0xfc32
88 #define PLA_BP_6 0xfc34
89 #define PLA_BP_7 0xfc36
90 #define PLA_BP_EN 0xfc38
92 #define USB_U2P3_CTRL 0xb460
93 #define USB_DEV_STAT 0xb808
94 #define USB_USB_CTRL 0xd406
95 #define USB_PHY_CTRL 0xd408
96 #define USB_TX_AGG 0xd40a
97 #define USB_RX_BUF_TH 0xd40c
98 #define USB_USB_TIMER 0xd428
99 #define USB_RX_EARLY_AGG 0xd42c
100 #define USB_PM_CTRL_STATUS 0xd432
101 #define USB_TX_DMA 0xd434
102 #define USB_TOLERANCE 0xd490
103 #define USB_LPM_CTRL 0xd41a
104 #define USB_UPS_CTRL 0xd800
105 #define USB_MISC_0 0xd81a
106 #define USB_POWER_CUT 0xd80a
107 #define USB_AFE_CTRL2 0xd824
108 #define USB_WDT11_CTRL 0xe43c
109 #define USB_BP_BA 0xfc26
110 #define USB_BP_0 0xfc28
111 #define USB_BP_1 0xfc2a
112 #define USB_BP_2 0xfc2c
113 #define USB_BP_3 0xfc2e
114 #define USB_BP_4 0xfc30
115 #define USB_BP_5 0xfc32
116 #define USB_BP_6 0xfc34
117 #define USB_BP_7 0xfc36
118 #define USB_BP_EN 0xfc38
121 #define OCP_ALDPS_CONFIG 0x2010
122 #define OCP_EEE_CONFIG1 0x2080
123 #define OCP_EEE_CONFIG2 0x2092
124 #define OCP_EEE_CONFIG3 0x2094
125 #define OCP_BASE_MII 0xa400
126 #define OCP_EEE_AR 0xa41a
127 #define OCP_EEE_DATA 0xa41c
128 #define OCP_PHY_STATUS 0xa420
129 #define OCP_POWER_CFG 0xa430
130 #define OCP_EEE_CFG 0xa432
131 #define OCP_SRAM_ADDR 0xa436
132 #define OCP_SRAM_DATA 0xa438
133 #define OCP_DOWN_SPEED 0xa442
134 #define OCP_EEE_ABLE 0xa5c4
135 #define OCP_EEE_ADV 0xa5d0
136 #define OCP_EEE_LPABLE 0xa5d2
137 #define OCP_ADC_CFG 0xbc06
140 #define SRAM_LPF_CFG 0x8012
141 #define SRAM_10M_AMP1 0x8080
142 #define SRAM_10M_AMP2 0x8082
143 #define SRAM_IMPEDANCE 0x8084
146 #define RCR_AAP 0x00000001
147 #define RCR_APM 0x00000002
148 #define RCR_AM 0x00000004
149 #define RCR_AB 0x00000008
150 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
152 /* PLA_RXFIFO_CTRL0 */
153 #define RXFIFO_THR1_NORMAL 0x00080002
154 #define RXFIFO_THR1_OOB 0x01800003
156 /* PLA_RXFIFO_CTRL1 */
157 #define RXFIFO_THR2_FULL 0x00000060
158 #define RXFIFO_THR2_HIGH 0x00000038
159 #define RXFIFO_THR2_OOB 0x0000004a
160 #define RXFIFO_THR2_NORMAL 0x00a0
162 /* PLA_RXFIFO_CTRL2 */
163 #define RXFIFO_THR3_FULL 0x00000078
164 #define RXFIFO_THR3_HIGH 0x00000048
165 #define RXFIFO_THR3_OOB 0x0000005a
166 #define RXFIFO_THR3_NORMAL 0x0110
168 /* PLA_TXFIFO_CTRL */
169 #define TXFIFO_THR_NORMAL 0x00400008
170 #define TXFIFO_THR_NORMAL2 0x01000008
173 #define FMC_FCR_MCU_EN 0x0001
176 #define EEEP_CR_EEEP_TX 0x0002
179 #define WDT6_SET_MODE 0x0010
182 #define TCR0_TX_EMPTY 0x0800
183 #define TCR0_AUTO_FIFO 0x0080
186 #define VERSION_MASK 0x7cf0
189 #define MTPS_JUMBO (12 * 1024 / 64)
190 #define MTPS_DEFAULT (6 * 1024 / 64)
193 #define TALLY_RESET 0x0001
201 #define CRWECR_NORAML 0x00
202 #define CRWECR_CONFIG 0xc0
205 #define NOW_IS_OOB 0x80
206 #define TXFIFO_EMPTY 0x20
207 #define RXFIFO_EMPTY 0x10
208 #define LINK_LIST_READY 0x02
209 #define DIS_MCU_CLROOB 0x01
210 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
213 #define RXDY_GATED_EN 0x0008
216 #define RE_INIT_LL 0x8000
217 #define MCU_BORW_EN 0x4000
220 #define CPCR_RX_VLAN 0x0040
223 #define MAGIC_EN 0x0001
226 #define TEREDO_SEL 0x8000
227 #define TEREDO_WAKE_MASK 0x7f00
228 #define TEREDO_RS_EVENT_MASK 0x00fe
229 #define OOB_TEREDO_EN 0x0001
232 #define ALDPS_PROXY_MODE 0x0001
235 #define LINK_ON_WAKE_EN 0x0010
236 #define LINK_OFF_WAKE_EN 0x0008
239 #define BWF_EN 0x0040
240 #define MWF_EN 0x0020
241 #define UWF_EN 0x0010
242 #define LAN_WAKE_EN 0x0002
244 /* PLA_LED_FEATURE */
245 #define LED_MODE_MASK 0x0700
248 #define TX_10M_IDLE_EN 0x0080
249 #define PFM_PWM_SWITCH 0x0040
251 /* PLA_MAC_PWR_CTRL */
252 #define D3_CLK_GATED_EN 0x00004000
253 #define MCU_CLK_RATIO 0x07010f07
254 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
255 #define ALDPS_SPDWN_RATIO 0x0f87
257 /* PLA_MAC_PWR_CTRL2 */
258 #define EEE_SPDWN_RATIO 0x8007
260 /* PLA_MAC_PWR_CTRL3 */
261 #define PKT_AVAIL_SPDWN_EN 0x0100
262 #define SUSPEND_SPDWN_EN 0x0004
263 #define U1U2_SPDWN_EN 0x0002
264 #define L1_SPDWN_EN 0x0001
266 /* PLA_MAC_PWR_CTRL4 */
267 #define PWRSAVE_SPDWN_EN 0x1000
268 #define RXDV_SPDWN_EN 0x0800
269 #define TX10MIDLE_EN 0x0100
270 #define TP100_SPDWN_EN 0x0020
271 #define TP500_SPDWN_EN 0x0010
272 #define TP1000_SPDWN_EN 0x0008
273 #define EEE_SPDWN_EN 0x0001
275 /* PLA_GPHY_INTR_IMR */
276 #define GPHY_STS_MSK 0x0001
277 #define SPEED_DOWN_MSK 0x0002
278 #define SPDWN_RXDV_MSK 0x0004
279 #define SPDWN_LINKCHG_MSK 0x0008
282 #define PHYAR_FLAG 0x80000000
285 #define EEE_RX_EN 0x0001
286 #define EEE_TX_EN 0x0002
289 #define AUTOLOAD_DONE 0x0002
292 #define STAT_SPEED_MASK 0x0006
293 #define STAT_SPEED_HIGH 0x0000
294 #define STAT_SPEED_FULL 0x0002
297 #define TX_AGG_MAX_THRESHOLD 0x03
300 #define RX_THR_SUPPER 0x0c350180
301 #define RX_THR_HIGH 0x7a120180
302 #define RX_THR_SLOW 0xffff0180
305 #define TEST_MODE_DISABLE 0x00000001
306 #define TX_SIZE_ADJUST1 0x00000100
309 #define POWER_CUT 0x0100
311 /* USB_PM_CTRL_STATUS */
312 #define RESUME_INDICATE 0x0001
315 #define RX_AGG_DISABLE 0x0010
318 #define U2P3_ENABLE 0x0001
321 #define PWR_EN 0x0001
322 #define PHASE2_EN 0x0008
325 #define PCUT_STATUS 0x0001
327 /* USB_RX_EARLY_AGG */
328 #define EARLY_AGG_SUPPER 0x0e832981
329 #define EARLY_AGG_HIGH 0x0e837a12
330 #define EARLY_AGG_SLOW 0x0e83ffff
333 #define TIMER11_EN 0x0001
336 #define LPM_TIMER_MASK 0x0c
337 #define LPM_TIMER_500MS 0x04 /* 500 ms */
338 #define LPM_TIMER_500US 0x0c /* 500 us */
341 #define SEN_VAL_MASK 0xf800
342 #define SEN_VAL_NORMAL 0xa000
343 #define SEL_RXIDLE 0x0100
345 /* OCP_ALDPS_CONFIG */
346 #define ENPWRSAVE 0x8000
347 #define ENPDNPS 0x0200
348 #define LINKENA 0x0100
349 #define DIS_SDSAVE 0x0010
352 #define PHY_STAT_MASK 0x0007
353 #define PHY_STAT_LAN_ON 3
354 #define PHY_STAT_PWRDN 5
357 #define EEE_CLKDIV_EN 0x8000
358 #define EN_ALDPS 0x0004
359 #define EN_10M_PLLOFF 0x0001
361 /* OCP_EEE_CONFIG1 */
362 #define RG_TXLPI_MSK_HFDUP 0x8000
363 #define RG_MATCLR_EN 0x4000
364 #define EEE_10_CAP 0x2000
365 #define EEE_NWAY_EN 0x1000
366 #define TX_QUIET_EN 0x0200
367 #define RX_QUIET_EN 0x0100
368 #define sd_rise_time_mask 0x0070
369 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
370 #define RG_RXLPI_MSK_HFDUP 0x0008
371 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
373 /* OCP_EEE_CONFIG2 */
374 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
375 #define RG_DACQUIET_EN 0x0400
376 #define RG_LDVQUIET_EN 0x0200
377 #define RG_CKRSEL 0x0020
378 #define RG_EEEPRG_EN 0x0010
380 /* OCP_EEE_CONFIG3 */
381 #define fast_snr_mask 0xff80
382 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
383 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
384 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
387 /* bit[15:14] function */
388 #define FUN_ADDR 0x0000
389 #define FUN_DATA 0x4000
390 /* bit[4:0] device addr */
393 #define CTAP_SHORT_EN 0x0040
394 #define EEE10_EN 0x0010
397 #define EN_10M_BGOFF 0x0080
400 #define CKADSEL_L 0x0100
401 #define ADC_EN 0x0080
402 #define EN_EMI_L 0x0040
405 #define LPF_AUTO_TUNE 0x8000
408 #define GDAC_IB_UPALL 0x0008
411 #define AMP_DN 0x0200
414 #define RX_DRIVING_MASK 0x6000
416 enum rtl_register_content
{
424 #define RTL8152_MAX_TX 4
425 #define RTL8152_MAX_RX 10
431 #define INTR_LINK 0x0004
433 #define RTL8152_REQT_READ 0xc0
434 #define RTL8152_REQT_WRITE 0x40
435 #define RTL8152_REQ_GET_REGS 0x05
436 #define RTL8152_REQ_SET_REGS 0x05
438 #define BYTE_EN_DWORD 0xff
439 #define BYTE_EN_WORD 0x33
440 #define BYTE_EN_BYTE 0x11
441 #define BYTE_EN_SIX_BYTES 0x3f
442 #define BYTE_EN_START_MASK 0x0f
443 #define BYTE_EN_END_MASK 0xf0
445 #define RTL8153_MAX_PACKET 9216 /* 9K */
446 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
447 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
448 #define RTL8153_RMS RTL8153_MAX_PACKET
449 #define RTL8152_TX_TIMEOUT (5 * HZ)
462 /* Define these values to match your device */
463 #define VENDOR_ID_REALTEK 0x0bda
464 #define PRODUCT_ID_RTL8152 0x8152
465 #define PRODUCT_ID_RTL8153 0x8153
467 #define VENDOR_ID_SAMSUNG 0x04e8
468 #define PRODUCT_ID_SAMSUNG 0xa101
470 #define MCU_TYPE_PLA 0x0100
471 #define MCU_TYPE_USB 0x0000
473 #define REALTEK_USB_DEVICE(vend, prod) \
474 USB_DEVICE_INTERFACE_CLASS(vend, prod, USB_CLASS_VENDOR_SPEC)
476 struct tally_counter
{
483 __le32 tx_one_collision
;
484 __le32 tx_multi_collision
;
494 #define RX_LEN_MASK 0x7fff
497 #define RD_UDP_CS (1 << 23)
498 #define RD_TCP_CS (1 << 22)
499 #define RD_IPV6_CS (1 << 20)
500 #define RD_IPV4_CS (1 << 19)
503 #define IPF (1 << 23) /* IP checksum fail */
504 #define UDPF (1 << 22) /* UDP checksum fail */
505 #define TCPF (1 << 21) /* TCP checksum fail */
506 #define RX_VLAN_TAG (1 << 16)
515 #define TX_FS (1 << 31) /* First segment of a packet */
516 #define TX_LS (1 << 30) /* Final segment of a packet */
517 #define GTSENDV4 (1 << 28)
518 #define GTSENDV6 (1 << 27)
519 #define GTTCPHO_SHIFT 18
520 #define GTTCPHO_MAX 0x7fU
521 #define TX_LEN_MAX 0x3ffffU
524 #define UDP_CS (1 << 31) /* Calculate UDP/IP checksum */
525 #define TCP_CS (1 << 30) /* Calculate TCP/IP checksum */
526 #define IPV4_CS (1 << 29) /* Calculate IPv4 checksum */
527 #define IPV6_CS (1 << 28) /* Calculate IPv6 checksum */
529 #define MSS_MAX 0x7ffU
530 #define TCPHO_SHIFT 17
531 #define TCPHO_MAX 0x7ffU
532 #define TX_VLAN_TAG (1 << 16)
538 struct list_head list
;
540 struct r8152
*context
;
546 struct list_head list
;
548 struct r8152
*context
;
557 struct usb_device
*udev
;
558 struct tasklet_struct tl
;
559 struct usb_interface
*intf
;
560 struct net_device
*netdev
;
561 struct urb
*intr_urb
;
562 struct tx_agg tx_info
[RTL8152_MAX_TX
];
563 struct rx_agg rx_info
[RTL8152_MAX_RX
];
564 struct list_head rx_done
, tx_free
;
565 struct sk_buff_head tx_queue
;
566 spinlock_t rx_lock
, tx_lock
;
567 struct delayed_work schedule
;
568 struct mii_if_info mii
;
569 struct mutex control
; /* use for hw setting */
572 void (*init
)(struct r8152
*);
573 int (*enable
)(struct r8152
*);
574 void (*disable
)(struct r8152
*);
575 void (*up
)(struct r8152
*);
576 void (*down
)(struct r8152
*);
577 void (*unload
)(struct r8152
*);
578 int (*eee_get
)(struct r8152
*, struct ethtool_eee
*);
579 int (*eee_set
)(struct r8152
*, struct ethtool_eee
*);
608 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
609 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
611 static const int multicast_filter_limit
= 32;
612 static unsigned int agg_buf_sz
= 16384;
614 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
615 VLAN_ETH_HLEN - VLAN_HLEN)
618 int get_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
623 tmp
= kmalloc(size
, GFP_KERNEL
);
627 ret
= usb_control_msg(tp
->udev
, usb_rcvctrlpipe(tp
->udev
, 0),
628 RTL8152_REQ_GET_REGS
, RTL8152_REQT_READ
,
629 value
, index
, tmp
, size
, 500);
631 memcpy(data
, tmp
, size
);
638 int set_registers(struct r8152
*tp
, u16 value
, u16 index
, u16 size
, void *data
)
643 tmp
= kmemdup(data
, size
, GFP_KERNEL
);
647 ret
= usb_control_msg(tp
->udev
, usb_sndctrlpipe(tp
->udev
, 0),
648 RTL8152_REQ_SET_REGS
, RTL8152_REQT_WRITE
,
649 value
, index
, tmp
, size
, 500);
656 static int generic_ocp_read(struct r8152
*tp
, u16 index
, u16 size
,
657 void *data
, u16 type
)
662 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
665 /* both size and indix must be 4 bytes align */
666 if ((size
& 3) || !size
|| (index
& 3) || !data
)
669 if ((u32
)index
+ (u32
)size
> 0xffff)
674 ret
= get_registers(tp
, index
, type
, limit
, data
);
682 ret
= get_registers(tp
, index
, type
, size
, data
);
696 static int generic_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
,
697 u16 size
, void *data
, u16 type
)
700 u16 byteen_start
, byteen_end
, byen
;
703 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
706 /* both size and indix must be 4 bytes align */
707 if ((size
& 3) || !size
|| (index
& 3) || !data
)
710 if ((u32
)index
+ (u32
)size
> 0xffff)
713 byteen_start
= byteen
& BYTE_EN_START_MASK
;
714 byteen_end
= byteen
& BYTE_EN_END_MASK
;
716 byen
= byteen_start
| (byteen_start
<< 4);
717 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
730 ret
= set_registers(tp
, index
,
731 type
| BYTE_EN_DWORD
,
740 ret
= set_registers(tp
, index
,
741 type
| BYTE_EN_DWORD
,
753 byen
= byteen_end
| (byteen_end
>> 4);
754 ret
= set_registers(tp
, index
, type
| byen
, 4, data
);
764 int pla_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
766 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_PLA
);
770 int pla_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
772 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_PLA
);
776 int usb_ocp_read(struct r8152
*tp
, u16 index
, u16 size
, void *data
)
778 return generic_ocp_read(tp
, index
, size
, data
, MCU_TYPE_USB
);
782 int usb_ocp_write(struct r8152
*tp
, u16 index
, u16 byteen
, u16 size
, void *data
)
784 return generic_ocp_write(tp
, index
, byteen
, size
, data
, MCU_TYPE_USB
);
787 static u32
ocp_read_dword(struct r8152
*tp
, u16 type
, u16 index
)
791 generic_ocp_read(tp
, index
, sizeof(data
), &data
, type
);
793 return __le32_to_cpu(data
);
796 static void ocp_write_dword(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
798 __le32 tmp
= __cpu_to_le32(data
);
800 generic_ocp_write(tp
, index
, BYTE_EN_DWORD
, sizeof(tmp
), &tmp
, type
);
803 static u16
ocp_read_word(struct r8152
*tp
, u16 type
, u16 index
)
807 u8 shift
= index
& 2;
811 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
813 data
= __le32_to_cpu(tmp
);
814 data
>>= (shift
* 8);
820 static void ocp_write_word(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
824 u16 byen
= BYTE_EN_WORD
;
825 u8 shift
= index
& 2;
831 mask
<<= (shift
* 8);
832 data
<<= (shift
* 8);
836 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
838 data
|= __le32_to_cpu(tmp
) & ~mask
;
839 tmp
= __cpu_to_le32(data
);
841 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
844 static u8
ocp_read_byte(struct r8152
*tp
, u16 type
, u16 index
)
848 u8 shift
= index
& 3;
852 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
854 data
= __le32_to_cpu(tmp
);
855 data
>>= (shift
* 8);
861 static void ocp_write_byte(struct r8152
*tp
, u16 type
, u16 index
, u32 data
)
865 u16 byen
= BYTE_EN_BYTE
;
866 u8 shift
= index
& 3;
872 mask
<<= (shift
* 8);
873 data
<<= (shift
* 8);
877 generic_ocp_read(tp
, index
, sizeof(tmp
), &tmp
, type
);
879 data
|= __le32_to_cpu(tmp
) & ~mask
;
880 tmp
= __cpu_to_le32(data
);
882 generic_ocp_write(tp
, index
, byen
, sizeof(tmp
), &tmp
, type
);
885 static u16
ocp_reg_read(struct r8152
*tp
, u16 addr
)
887 u16 ocp_base
, ocp_index
;
889 ocp_base
= addr
& 0xf000;
890 if (ocp_base
!= tp
->ocp_base
) {
891 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
892 tp
->ocp_base
= ocp_base
;
895 ocp_index
= (addr
& 0x0fff) | 0xb000;
896 return ocp_read_word(tp
, MCU_TYPE_PLA
, ocp_index
);
899 static void ocp_reg_write(struct r8152
*tp
, u16 addr
, u16 data
)
901 u16 ocp_base
, ocp_index
;
903 ocp_base
= addr
& 0xf000;
904 if (ocp_base
!= tp
->ocp_base
) {
905 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_OCP_GPHY_BASE
, ocp_base
);
906 tp
->ocp_base
= ocp_base
;
909 ocp_index
= (addr
& 0x0fff) | 0xb000;
910 ocp_write_word(tp
, MCU_TYPE_PLA
, ocp_index
, data
);
913 static inline void r8152_mdio_write(struct r8152
*tp
, u32 reg_addr
, u32 value
)
915 ocp_reg_write(tp
, OCP_BASE_MII
+ reg_addr
* 2, value
);
918 static inline int r8152_mdio_read(struct r8152
*tp
, u32 reg_addr
)
920 return ocp_reg_read(tp
, OCP_BASE_MII
+ reg_addr
* 2);
923 static void sram_write(struct r8152
*tp
, u16 addr
, u16 data
)
925 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
926 ocp_reg_write(tp
, OCP_SRAM_DATA
, data
);
929 static u16
sram_read(struct r8152
*tp
, u16 addr
)
931 ocp_reg_write(tp
, OCP_SRAM_ADDR
, addr
);
932 return ocp_reg_read(tp
, OCP_SRAM_DATA
);
935 static int read_mii_word(struct net_device
*netdev
, int phy_id
, int reg
)
937 struct r8152
*tp
= netdev_priv(netdev
);
940 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
943 if (phy_id
!= R8152_PHY_ID
)
946 ret
= r8152_mdio_read(tp
, reg
);
952 void write_mii_word(struct net_device
*netdev
, int phy_id
, int reg
, int val
)
954 struct r8152
*tp
= netdev_priv(netdev
);
956 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
959 if (phy_id
!= R8152_PHY_ID
)
962 r8152_mdio_write(tp
, reg
, val
);
966 r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
);
968 static int rtl8152_set_mac_address(struct net_device
*netdev
, void *p
)
970 struct r8152
*tp
= netdev_priv(netdev
);
971 struct sockaddr
*addr
= p
;
972 int ret
= -EADDRNOTAVAIL
;
974 if (!is_valid_ether_addr(addr
->sa_data
))
977 ret
= usb_autopm_get_interface(tp
->intf
);
981 mutex_lock(&tp
->control
);
983 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
985 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
986 pla_ocp_write(tp
, PLA_IDR
, BYTE_EN_SIX_BYTES
, 8, addr
->sa_data
);
987 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
989 mutex_unlock(&tp
->control
);
991 usb_autopm_put_interface(tp
->intf
);
996 static int set_ethernet_addr(struct r8152
*tp
)
998 struct net_device
*dev
= tp
->netdev
;
1002 if (tp
->version
== RTL_VER_01
)
1003 ret
= pla_ocp_read(tp
, PLA_IDR
, 8, sa
.sa_data
);
1005 ret
= pla_ocp_read(tp
, PLA_BACKUP
, 8, sa
.sa_data
);
1008 netif_err(tp
, probe
, dev
, "Get ether addr fail\n");
1009 } else if (!is_valid_ether_addr(sa
.sa_data
)) {
1010 netif_err(tp
, probe
, dev
, "Invalid ether addr %pM\n",
1012 eth_hw_addr_random(dev
);
1013 ether_addr_copy(sa
.sa_data
, dev
->dev_addr
);
1014 ret
= rtl8152_set_mac_address(dev
, &sa
);
1015 netif_info(tp
, probe
, dev
, "Random ether addr %pM\n",
1018 if (tp
->version
== RTL_VER_01
)
1019 ether_addr_copy(dev
->dev_addr
, sa
.sa_data
);
1021 ret
= rtl8152_set_mac_address(dev
, &sa
);
1027 static void read_bulk_callback(struct urb
*urb
)
1029 struct net_device
*netdev
;
1030 int status
= urb
->status
;
1043 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1046 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1049 netdev
= tp
->netdev
;
1051 /* When link down, the driver would cancel all bulks. */
1052 /* This avoid the re-submitting bulk */
1053 if (!netif_carrier_ok(netdev
))
1056 usb_mark_last_busy(tp
->udev
);
1060 if (urb
->actual_length
< ETH_ZLEN
)
1063 spin_lock(&tp
->rx_lock
);
1064 list_add_tail(&agg
->list
, &tp
->rx_done
);
1065 spin_unlock(&tp
->rx_lock
);
1066 tasklet_schedule(&tp
->tl
);
1069 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
1070 netif_device_detach(tp
->netdev
);
1073 return; /* the urb is in unlink state */
1075 if (net_ratelimit())
1076 netdev_warn(netdev
, "maybe reset is needed?\n");
1079 if (net_ratelimit())
1080 netdev_warn(netdev
, "Rx status %d\n", status
);
1084 result
= r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1085 if (result
== -ENODEV
) {
1086 netif_device_detach(tp
->netdev
);
1087 } else if (result
) {
1088 spin_lock(&tp
->rx_lock
);
1089 list_add_tail(&agg
->list
, &tp
->rx_done
);
1090 spin_unlock(&tp
->rx_lock
);
1091 tasklet_schedule(&tp
->tl
);
1095 static void write_bulk_callback(struct urb
*urb
)
1097 struct net_device_stats
*stats
;
1098 struct net_device
*netdev
;
1101 int status
= urb
->status
;
1111 netdev
= tp
->netdev
;
1112 stats
= &netdev
->stats
;
1114 if (net_ratelimit())
1115 netdev_warn(netdev
, "Tx status %d\n", status
);
1116 stats
->tx_errors
+= agg
->skb_num
;
1118 stats
->tx_packets
+= agg
->skb_num
;
1119 stats
->tx_bytes
+= agg
->skb_len
;
1122 spin_lock(&tp
->tx_lock
);
1123 list_add_tail(&agg
->list
, &tp
->tx_free
);
1124 spin_unlock(&tp
->tx_lock
);
1126 usb_autopm_put_interface_async(tp
->intf
);
1128 if (!netif_carrier_ok(netdev
))
1131 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1134 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1137 if (!skb_queue_empty(&tp
->tx_queue
))
1138 tasklet_schedule(&tp
->tl
);
1141 static void intr_callback(struct urb
*urb
)
1145 int status
= urb
->status
;
1152 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1155 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1159 case 0: /* success */
1161 case -ECONNRESET
: /* unlink */
1163 netif_device_detach(tp
->netdev
);
1167 netif_info(tp
, intr
, tp
->netdev
, "intr status -EOVERFLOW\n");
1169 /* -EPIPE: should clear the halt */
1171 netif_info(tp
, intr
, tp
->netdev
, "intr status %d\n", status
);
1175 d
= urb
->transfer_buffer
;
1176 if (INTR_LINK
& __le16_to_cpu(d
[0])) {
1177 if (!(tp
->speed
& LINK_STATUS
)) {
1178 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1179 schedule_delayed_work(&tp
->schedule
, 0);
1182 if (tp
->speed
& LINK_STATUS
) {
1183 set_bit(RTL8152_LINK_CHG
, &tp
->flags
);
1184 schedule_delayed_work(&tp
->schedule
, 0);
1189 res
= usb_submit_urb(urb
, GFP_ATOMIC
);
1191 netif_device_detach(tp
->netdev
);
1193 netif_err(tp
, intr
, tp
->netdev
,
1194 "can't resubmit intr, status %d\n", res
);
1197 static inline void *rx_agg_align(void *data
)
1199 return (void *)ALIGN((uintptr_t)data
, RX_ALIGN
);
1202 static inline void *tx_agg_align(void *data
)
1204 return (void *)ALIGN((uintptr_t)data
, TX_ALIGN
);
1207 static void free_all_mem(struct r8152
*tp
)
1211 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1212 usb_free_urb(tp
->rx_info
[i
].urb
);
1213 tp
->rx_info
[i
].urb
= NULL
;
1215 kfree(tp
->rx_info
[i
].buffer
);
1216 tp
->rx_info
[i
].buffer
= NULL
;
1217 tp
->rx_info
[i
].head
= NULL
;
1220 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1221 usb_free_urb(tp
->tx_info
[i
].urb
);
1222 tp
->tx_info
[i
].urb
= NULL
;
1224 kfree(tp
->tx_info
[i
].buffer
);
1225 tp
->tx_info
[i
].buffer
= NULL
;
1226 tp
->tx_info
[i
].head
= NULL
;
1229 usb_free_urb(tp
->intr_urb
);
1230 tp
->intr_urb
= NULL
;
1232 kfree(tp
->intr_buff
);
1233 tp
->intr_buff
= NULL
;
1236 static int alloc_all_mem(struct r8152
*tp
)
1238 struct net_device
*netdev
= tp
->netdev
;
1239 struct usb_interface
*intf
= tp
->intf
;
1240 struct usb_host_interface
*alt
= intf
->cur_altsetting
;
1241 struct usb_host_endpoint
*ep_intr
= alt
->endpoint
+ 2;
1246 node
= netdev
->dev
.parent
? dev_to_node(netdev
->dev
.parent
) : -1;
1248 spin_lock_init(&tp
->rx_lock
);
1249 spin_lock_init(&tp
->tx_lock
);
1250 INIT_LIST_HEAD(&tp
->rx_done
);
1251 INIT_LIST_HEAD(&tp
->tx_free
);
1252 skb_queue_head_init(&tp
->tx_queue
);
1254 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1255 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1259 if (buf
!= rx_agg_align(buf
)) {
1261 buf
= kmalloc_node(agg_buf_sz
+ RX_ALIGN
, GFP_KERNEL
,
1267 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1273 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
1274 tp
->rx_info
[i
].context
= tp
;
1275 tp
->rx_info
[i
].urb
= urb
;
1276 tp
->rx_info
[i
].buffer
= buf
;
1277 tp
->rx_info
[i
].head
= rx_agg_align(buf
);
1280 for (i
= 0; i
< RTL8152_MAX_TX
; i
++) {
1281 buf
= kmalloc_node(agg_buf_sz
, GFP_KERNEL
, node
);
1285 if (buf
!= tx_agg_align(buf
)) {
1287 buf
= kmalloc_node(agg_buf_sz
+ TX_ALIGN
, GFP_KERNEL
,
1293 urb
= usb_alloc_urb(0, GFP_KERNEL
);
1299 INIT_LIST_HEAD(&tp
->tx_info
[i
].list
);
1300 tp
->tx_info
[i
].context
= tp
;
1301 tp
->tx_info
[i
].urb
= urb
;
1302 tp
->tx_info
[i
].buffer
= buf
;
1303 tp
->tx_info
[i
].head
= tx_agg_align(buf
);
1305 list_add_tail(&tp
->tx_info
[i
].list
, &tp
->tx_free
);
1308 tp
->intr_urb
= usb_alloc_urb(0, GFP_KERNEL
);
1312 tp
->intr_buff
= kmalloc(INTBUFSIZE
, GFP_KERNEL
);
1316 tp
->intr_interval
= (int)ep_intr
->desc
.bInterval
;
1317 usb_fill_int_urb(tp
->intr_urb
, tp
->udev
, usb_rcvintpipe(tp
->udev
, 3),
1318 tp
->intr_buff
, INTBUFSIZE
, intr_callback
,
1319 tp
, tp
->intr_interval
);
1328 static struct tx_agg
*r8152_get_tx_agg(struct r8152
*tp
)
1330 struct tx_agg
*agg
= NULL
;
1331 unsigned long flags
;
1333 if (list_empty(&tp
->tx_free
))
1336 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1337 if (!list_empty(&tp
->tx_free
)) {
1338 struct list_head
*cursor
;
1340 cursor
= tp
->tx_free
.next
;
1341 list_del_init(cursor
);
1342 agg
= list_entry(cursor
, struct tx_agg
, list
);
1344 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1349 static inline __be16
get_protocol(struct sk_buff
*skb
)
1353 if (skb
->protocol
== htons(ETH_P_8021Q
))
1354 protocol
= vlan_eth_hdr(skb
)->h_vlan_encapsulated_proto
;
1356 protocol
= skb
->protocol
;
1361 /* r8152_csum_workaround()
1362 * The hw limites the value the transport offset. When the offset is out of the
1363 * range, calculate the checksum by sw.
1365 static void r8152_csum_workaround(struct r8152
*tp
, struct sk_buff
*skb
,
1366 struct sk_buff_head
*list
)
1368 if (skb_shinfo(skb
)->gso_size
) {
1369 netdev_features_t features
= tp
->netdev
->features
;
1370 struct sk_buff_head seg_list
;
1371 struct sk_buff
*segs
, *nskb
;
1373 features
&= ~(NETIF_F_SG
| NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
);
1374 segs
= skb_gso_segment(skb
, features
);
1375 if (IS_ERR(segs
) || !segs
)
1378 __skb_queue_head_init(&seg_list
);
1384 __skb_queue_tail(&seg_list
, nskb
);
1387 skb_queue_splice(&seg_list
, list
);
1389 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1390 if (skb_checksum_help(skb
) < 0)
1393 __skb_queue_head(list
, skb
);
1395 struct net_device_stats
*stats
;
1398 stats
= &tp
->netdev
->stats
;
1399 stats
->tx_dropped
++;
1404 /* msdn_giant_send_check()
1405 * According to the document of microsoft, the TCP Pseudo Header excludes the
1406 * packet length for IPv6 TCP large packets.
1408 static int msdn_giant_send_check(struct sk_buff
*skb
)
1410 const struct ipv6hdr
*ipv6h
;
1414 ret
= skb_cow_head(skb
, 0);
1418 ipv6h
= ipv6_hdr(skb
);
1422 th
->check
= ~tcp_v6_check(0, &ipv6h
->saddr
, &ipv6h
->daddr
, 0);
1427 static inline void rtl_tx_vlan_tag(struct tx_desc
*desc
, struct sk_buff
*skb
)
1429 if (vlan_tx_tag_present(skb
)) {
1432 opts2
= TX_VLAN_TAG
| swab16(vlan_tx_tag_get(skb
));
1433 desc
->opts2
|= cpu_to_le32(opts2
);
1437 static inline void rtl_rx_vlan_tag(struct rx_desc
*desc
, struct sk_buff
*skb
)
1439 u32 opts2
= le32_to_cpu(desc
->opts2
);
1441 if (opts2
& RX_VLAN_TAG
)
1442 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
),
1443 swab16(opts2
& 0xffff));
1446 static int r8152_tx_csum(struct r8152
*tp
, struct tx_desc
*desc
,
1447 struct sk_buff
*skb
, u32 len
, u32 transport_offset
)
1449 u32 mss
= skb_shinfo(skb
)->gso_size
;
1450 u32 opts1
, opts2
= 0;
1451 int ret
= TX_CSUM_SUCCESS
;
1453 WARN_ON_ONCE(len
> TX_LEN_MAX
);
1455 opts1
= len
| TX_FS
| TX_LS
;
1458 if (transport_offset
> GTTCPHO_MAX
) {
1459 netif_warn(tp
, tx_err
, tp
->netdev
,
1460 "Invalid transport offset 0x%x for TSO\n",
1466 switch (get_protocol(skb
)) {
1467 case htons(ETH_P_IP
):
1471 case htons(ETH_P_IPV6
):
1472 if (msdn_giant_send_check(skb
)) {
1484 opts1
|= transport_offset
<< GTTCPHO_SHIFT
;
1485 opts2
|= min(mss
, MSS_MAX
) << MSS_SHIFT
;
1486 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1489 if (transport_offset
> TCPHO_MAX
) {
1490 netif_warn(tp
, tx_err
, tp
->netdev
,
1491 "Invalid transport offset 0x%x\n",
1497 switch (get_protocol(skb
)) {
1498 case htons(ETH_P_IP
):
1500 ip_protocol
= ip_hdr(skb
)->protocol
;
1503 case htons(ETH_P_IPV6
):
1505 ip_protocol
= ipv6_hdr(skb
)->nexthdr
;
1509 ip_protocol
= IPPROTO_RAW
;
1513 if (ip_protocol
== IPPROTO_TCP
)
1515 else if (ip_protocol
== IPPROTO_UDP
)
1520 opts2
|= transport_offset
<< TCPHO_SHIFT
;
1523 desc
->opts2
= cpu_to_le32(opts2
);
1524 desc
->opts1
= cpu_to_le32(opts1
);
1530 static int r8152_tx_agg_fill(struct r8152
*tp
, struct tx_agg
*agg
)
1532 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1536 __skb_queue_head_init(&skb_head
);
1537 spin_lock(&tx_queue
->lock
);
1538 skb_queue_splice_init(tx_queue
, &skb_head
);
1539 spin_unlock(&tx_queue
->lock
);
1541 tx_data
= agg
->head
;
1544 remain
= agg_buf_sz
;
1546 while (remain
>= ETH_ZLEN
+ sizeof(struct tx_desc
)) {
1547 struct tx_desc
*tx_desc
;
1548 struct sk_buff
*skb
;
1552 skb
= __skb_dequeue(&skb_head
);
1556 len
= skb
->len
+ sizeof(*tx_desc
);
1559 __skb_queue_head(&skb_head
, skb
);
1563 tx_data
= tx_agg_align(tx_data
);
1564 tx_desc
= (struct tx_desc
*)tx_data
;
1566 offset
= (u32
)skb_transport_offset(skb
);
1568 if (r8152_tx_csum(tp
, tx_desc
, skb
, skb
->len
, offset
)) {
1569 r8152_csum_workaround(tp
, skb
, &skb_head
);
1573 rtl_tx_vlan_tag(tx_desc
, skb
);
1575 tx_data
+= sizeof(*tx_desc
);
1578 if (skb_copy_bits(skb
, 0, tx_data
, len
) < 0) {
1579 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1581 stats
->tx_dropped
++;
1582 dev_kfree_skb_any(skb
);
1583 tx_data
-= sizeof(*tx_desc
);
1588 agg
->skb_len
+= len
;
1591 dev_kfree_skb_any(skb
);
1593 remain
= agg_buf_sz
- (int)(tx_agg_align(tx_data
) - agg
->head
);
1596 if (!skb_queue_empty(&skb_head
)) {
1597 spin_lock(&tx_queue
->lock
);
1598 skb_queue_splice(&skb_head
, tx_queue
);
1599 spin_unlock(&tx_queue
->lock
);
1602 netif_tx_lock(tp
->netdev
);
1604 if (netif_queue_stopped(tp
->netdev
) &&
1605 skb_queue_len(&tp
->tx_queue
) < tp
->tx_qlen
)
1606 netif_wake_queue(tp
->netdev
);
1608 netif_tx_unlock(tp
->netdev
);
1610 ret
= usb_autopm_get_interface_async(tp
->intf
);
1614 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_sndbulkpipe(tp
->udev
, 2),
1615 agg
->head
, (int)(tx_data
- (u8
*)agg
->head
),
1616 (usb_complete_t
)write_bulk_callback
, agg
);
1618 ret
= usb_submit_urb(agg
->urb
, GFP_ATOMIC
);
1620 usb_autopm_put_interface_async(tp
->intf
);
1626 static u8
r8152_rx_csum(struct r8152
*tp
, struct rx_desc
*rx_desc
)
1628 u8 checksum
= CHECKSUM_NONE
;
1631 if (tp
->version
== RTL_VER_01
)
1634 opts2
= le32_to_cpu(rx_desc
->opts2
);
1635 opts3
= le32_to_cpu(rx_desc
->opts3
);
1637 if (opts2
& RD_IPV4_CS
) {
1639 checksum
= CHECKSUM_NONE
;
1640 else if ((opts2
& RD_UDP_CS
) && (opts3
& UDPF
))
1641 checksum
= CHECKSUM_NONE
;
1642 else if ((opts2
& RD_TCP_CS
) && (opts3
& TCPF
))
1643 checksum
= CHECKSUM_NONE
;
1645 checksum
= CHECKSUM_UNNECESSARY
;
1646 } else if (RD_IPV6_CS
) {
1647 if ((opts2
& RD_UDP_CS
) && !(opts3
& UDPF
))
1648 checksum
= CHECKSUM_UNNECESSARY
;
1649 else if ((opts2
& RD_TCP_CS
) && !(opts3
& TCPF
))
1650 checksum
= CHECKSUM_UNNECESSARY
;
1657 static void rx_bottom(struct r8152
*tp
)
1659 unsigned long flags
;
1660 struct list_head
*cursor
, *next
, rx_queue
;
1662 if (list_empty(&tp
->rx_done
))
1665 INIT_LIST_HEAD(&rx_queue
);
1666 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1667 list_splice_init(&tp
->rx_done
, &rx_queue
);
1668 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1670 list_for_each_safe(cursor
, next
, &rx_queue
) {
1671 struct rx_desc
*rx_desc
;
1678 list_del_init(cursor
);
1680 agg
= list_entry(cursor
, struct rx_agg
, list
);
1682 if (urb
->actual_length
< ETH_ZLEN
)
1685 rx_desc
= agg
->head
;
1686 rx_data
= agg
->head
;
1687 len_used
+= sizeof(struct rx_desc
);
1689 while (urb
->actual_length
> len_used
) {
1690 struct net_device
*netdev
= tp
->netdev
;
1691 struct net_device_stats
*stats
= &netdev
->stats
;
1692 unsigned int pkt_len
;
1693 struct sk_buff
*skb
;
1695 pkt_len
= le32_to_cpu(rx_desc
->opts1
) & RX_LEN_MASK
;
1696 if (pkt_len
< ETH_ZLEN
)
1699 len_used
+= pkt_len
;
1700 if (urb
->actual_length
< len_used
)
1703 pkt_len
-= CRC_SIZE
;
1704 rx_data
+= sizeof(struct rx_desc
);
1706 skb
= netdev_alloc_skb_ip_align(netdev
, pkt_len
);
1708 stats
->rx_dropped
++;
1712 skb
->ip_summed
= r8152_rx_csum(tp
, rx_desc
);
1713 memcpy(skb
->data
, rx_data
, pkt_len
);
1714 skb_put(skb
, pkt_len
);
1715 skb
->protocol
= eth_type_trans(skb
, netdev
);
1716 rtl_rx_vlan_tag(rx_desc
, skb
);
1717 netif_receive_skb(skb
);
1718 stats
->rx_packets
++;
1719 stats
->rx_bytes
+= pkt_len
;
1722 rx_data
= rx_agg_align(rx_data
+ pkt_len
+ CRC_SIZE
);
1723 rx_desc
= (struct rx_desc
*)rx_data
;
1724 len_used
= (int)(rx_data
- (u8
*)agg
->head
);
1725 len_used
+= sizeof(struct rx_desc
);
1729 ret
= r8152_submit_rx(tp
, agg
, GFP_ATOMIC
);
1730 if (ret
&& ret
!= -ENODEV
) {
1731 spin_lock_irqsave(&tp
->rx_lock
, flags
);
1732 list_add_tail(&agg
->list
, &tp
->rx_done
);
1733 spin_unlock_irqrestore(&tp
->rx_lock
, flags
);
1734 tasklet_schedule(&tp
->tl
);
1739 static void tx_bottom(struct r8152
*tp
)
1746 if (skb_queue_empty(&tp
->tx_queue
))
1749 agg
= r8152_get_tx_agg(tp
);
1753 res
= r8152_tx_agg_fill(tp
, agg
);
1755 struct net_device
*netdev
= tp
->netdev
;
1757 if (res
== -ENODEV
) {
1758 netif_device_detach(netdev
);
1760 struct net_device_stats
*stats
= &netdev
->stats
;
1761 unsigned long flags
;
1763 netif_warn(tp
, tx_err
, netdev
,
1764 "failed tx_urb %d\n", res
);
1765 stats
->tx_dropped
+= agg
->skb_num
;
1767 spin_lock_irqsave(&tp
->tx_lock
, flags
);
1768 list_add_tail(&agg
->list
, &tp
->tx_free
);
1769 spin_unlock_irqrestore(&tp
->tx_lock
, flags
);
1775 static void bottom_half(unsigned long data
)
1779 tp
= (struct r8152
*)data
;
1781 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
1784 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
1787 /* When link down, the driver would cancel all bulks. */
1788 /* This avoid the re-submitting bulk */
1789 if (!netif_carrier_ok(tp
->netdev
))
1797 int r8152_submit_rx(struct r8152
*tp
, struct rx_agg
*agg
, gfp_t mem_flags
)
1799 usb_fill_bulk_urb(agg
->urb
, tp
->udev
, usb_rcvbulkpipe(tp
->udev
, 1),
1800 agg
->head
, agg_buf_sz
,
1801 (usb_complete_t
)read_bulk_callback
, agg
);
1803 return usb_submit_urb(agg
->urb
, mem_flags
);
1806 static void rtl_drop_queued_tx(struct r8152
*tp
)
1808 struct net_device_stats
*stats
= &tp
->netdev
->stats
;
1809 struct sk_buff_head skb_head
, *tx_queue
= &tp
->tx_queue
;
1810 struct sk_buff
*skb
;
1812 if (skb_queue_empty(tx_queue
))
1815 __skb_queue_head_init(&skb_head
);
1816 spin_lock_bh(&tx_queue
->lock
);
1817 skb_queue_splice_init(tx_queue
, &skb_head
);
1818 spin_unlock_bh(&tx_queue
->lock
);
1820 while ((skb
= __skb_dequeue(&skb_head
))) {
1822 stats
->tx_dropped
++;
1826 static void rtl8152_tx_timeout(struct net_device
*netdev
)
1828 struct r8152
*tp
= netdev_priv(netdev
);
1831 netif_warn(tp
, tx_err
, netdev
, "Tx timeout\n");
1832 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
1833 usb_unlink_urb(tp
->tx_info
[i
].urb
);
1836 static void rtl8152_set_rx_mode(struct net_device
*netdev
)
1838 struct r8152
*tp
= netdev_priv(netdev
);
1840 if (tp
->speed
& LINK_STATUS
) {
1841 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
1842 schedule_delayed_work(&tp
->schedule
, 0);
1846 static void _rtl8152_set_rx_mode(struct net_device
*netdev
)
1848 struct r8152
*tp
= netdev_priv(netdev
);
1849 u32 mc_filter
[2]; /* Multicast hash filter */
1853 clear_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
1854 netif_stop_queue(netdev
);
1855 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
1856 ocp_data
&= ~RCR_ACPT_ALL
;
1857 ocp_data
|= RCR_AB
| RCR_APM
;
1859 if (netdev
->flags
& IFF_PROMISC
) {
1860 /* Unconditionally log net taps. */
1861 netif_notice(tp
, link
, netdev
, "Promiscuous mode enabled\n");
1862 ocp_data
|= RCR_AM
| RCR_AAP
;
1863 mc_filter
[1] = 0xffffffff;
1864 mc_filter
[0] = 0xffffffff;
1865 } else if ((netdev_mc_count(netdev
) > multicast_filter_limit
) ||
1866 (netdev
->flags
& IFF_ALLMULTI
)) {
1867 /* Too many to filter perfectly -- accept all multicasts. */
1869 mc_filter
[1] = 0xffffffff;
1870 mc_filter
[0] = 0xffffffff;
1872 struct netdev_hw_addr
*ha
;
1876 netdev_for_each_mc_addr(ha
, netdev
) {
1877 int bit_nr
= ether_crc(ETH_ALEN
, ha
->addr
) >> 26;
1879 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
1884 tmp
[0] = __cpu_to_le32(swab32(mc_filter
[1]));
1885 tmp
[1] = __cpu_to_le32(swab32(mc_filter
[0]));
1887 pla_ocp_write(tp
, PLA_MAR
, BYTE_EN_DWORD
, sizeof(tmp
), tmp
);
1888 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
1889 netif_wake_queue(netdev
);
1892 static netdev_tx_t
rtl8152_start_xmit(struct sk_buff
*skb
,
1893 struct net_device
*netdev
)
1895 struct r8152
*tp
= netdev_priv(netdev
);
1897 skb_tx_timestamp(skb
);
1899 skb_queue_tail(&tp
->tx_queue
, skb
);
1901 if (!list_empty(&tp
->tx_free
)) {
1902 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
1903 set_bit(SCHEDULE_TASKLET
, &tp
->flags
);
1904 schedule_delayed_work(&tp
->schedule
, 0);
1906 usb_mark_last_busy(tp
->udev
);
1907 tasklet_schedule(&tp
->tl
);
1909 } else if (skb_queue_len(&tp
->tx_queue
) > tp
->tx_qlen
) {
1910 netif_stop_queue(netdev
);
1913 return NETDEV_TX_OK
;
1916 static void r8152b_reset_packet_filter(struct r8152
*tp
)
1920 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_FMC
);
1921 ocp_data
&= ~FMC_FCR_MCU_EN
;
1922 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
1923 ocp_data
|= FMC_FCR_MCU_EN
;
1924 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_FMC
, ocp_data
);
1927 static void rtl8152_nic_reset(struct r8152
*tp
)
1931 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, CR_RST
);
1933 for (i
= 0; i
< 1000; i
++) {
1934 if (!(ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
) & CR_RST
))
1936 usleep_range(100, 400);
1940 static void set_tx_qlen(struct r8152
*tp
)
1942 struct net_device
*netdev
= tp
->netdev
;
1944 tp
->tx_qlen
= agg_buf_sz
/ (netdev
->mtu
+ VLAN_ETH_HLEN
+ VLAN_HLEN
+
1945 sizeof(struct tx_desc
));
1948 static inline u8
rtl8152_get_speed(struct r8152
*tp
)
1950 return ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_PHYSTATUS
);
1953 static void rtl_set_eee_plus(struct r8152
*tp
)
1958 speed
= rtl8152_get_speed(tp
);
1959 if (speed
& _10bps
) {
1960 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
1961 ocp_data
|= EEEP_CR_EEEP_TX
;
1962 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
1964 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
);
1965 ocp_data
&= ~EEEP_CR_EEEP_TX
;
1966 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEEP_CR
, ocp_data
);
1970 static void rxdy_gated_en(struct r8152
*tp
, bool enable
)
1974 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
);
1976 ocp_data
|= RXDY_GATED_EN
;
1978 ocp_data
&= ~RXDY_GATED_EN
;
1979 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MISC_1
, ocp_data
);
1982 static int rtl_start_rx(struct r8152
*tp
)
1986 INIT_LIST_HEAD(&tp
->rx_done
);
1987 for (i
= 0; i
< RTL8152_MAX_RX
; i
++) {
1988 INIT_LIST_HEAD(&tp
->rx_info
[i
].list
);
1989 ret
= r8152_submit_rx(tp
, &tp
->rx_info
[i
], GFP_KERNEL
);
1997 static int rtl_stop_rx(struct r8152
*tp
)
2001 for (i
= 0; i
< RTL8152_MAX_RX
; i
++)
2002 usb_kill_urb(tp
->rx_info
[i
].urb
);
2007 static int rtl_enable(struct r8152
*tp
)
2011 r8152b_reset_packet_filter(tp
);
2013 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CR
);
2014 ocp_data
|= CR_RE
| CR_TE
;
2015 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, ocp_data
);
2017 rxdy_gated_en(tp
, false);
2019 return rtl_start_rx(tp
);
2022 static int rtl8152_enable(struct r8152
*tp
)
2024 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2028 rtl_set_eee_plus(tp
);
2030 return rtl_enable(tp
);
2033 static void r8153_set_rx_agg(struct r8152
*tp
)
2037 speed
= rtl8152_get_speed(tp
);
2038 if (speed
& _1000bps
) {
2039 if (tp
->udev
->speed
== USB_SPEED_SUPER
) {
2040 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
,
2042 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_EARLY_AGG
,
2045 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
,
2047 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_EARLY_AGG
,
2051 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_SLOW
);
2052 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_EARLY_AGG
,
2057 static int rtl8153_enable(struct r8152
*tp
)
2059 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2063 rtl_set_eee_plus(tp
);
2064 r8153_set_rx_agg(tp
);
2066 return rtl_enable(tp
);
2069 static void rtl_disable(struct r8152
*tp
)
2074 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2075 rtl_drop_queued_tx(tp
);
2079 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2080 ocp_data
&= ~RCR_ACPT_ALL
;
2081 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2083 rtl_drop_queued_tx(tp
);
2085 for (i
= 0; i
< RTL8152_MAX_TX
; i
++)
2086 usb_kill_urb(tp
->tx_info
[i
].urb
);
2088 rxdy_gated_en(tp
, true);
2090 for (i
= 0; i
< 1000; i
++) {
2091 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2092 if ((ocp_data
& FIFO_EMPTY
) == FIFO_EMPTY
)
2094 usleep_range(1000, 2000);
2097 for (i
= 0; i
< 1000; i
++) {
2098 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
) & TCR0_TX_EMPTY
)
2100 usleep_range(1000, 2000);
2105 rtl8152_nic_reset(tp
);
2108 static void r8152_power_cut_en(struct r8152
*tp
, bool enable
)
2112 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
);
2114 ocp_data
|= POWER_CUT
;
2116 ocp_data
&= ~POWER_CUT
;
2117 ocp_write_word(tp
, MCU_TYPE_USB
, USB_UPS_CTRL
, ocp_data
);
2119 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
);
2120 ocp_data
&= ~RESUME_INDICATE
;
2121 ocp_write_word(tp
, MCU_TYPE_USB
, USB_PM_CTRL_STATUS
, ocp_data
);
2124 static void rtl_rx_vlan_en(struct r8152
*tp
, bool enable
)
2128 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
);
2130 ocp_data
|= CPCR_RX_VLAN
;
2132 ocp_data
&= ~CPCR_RX_VLAN
;
2133 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CPCR
, ocp_data
);
2136 static int rtl8152_set_features(struct net_device
*dev
,
2137 netdev_features_t features
)
2139 netdev_features_t changed
= features
^ dev
->features
;
2140 struct r8152
*tp
= netdev_priv(dev
);
2143 ret
= usb_autopm_get_interface(tp
->intf
);
2147 mutex_lock(&tp
->control
);
2149 if (changed
& NETIF_F_HW_VLAN_CTAG_RX
) {
2150 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
2151 rtl_rx_vlan_en(tp
, true);
2153 rtl_rx_vlan_en(tp
, false);
2156 mutex_unlock(&tp
->control
);
2158 usb_autopm_put_interface(tp
->intf
);
2164 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2166 static u32
__rtl_get_wol(struct r8152
*tp
)
2171 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2172 if (!(ocp_data
& LAN_WAKE_EN
))
2175 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2176 if (ocp_data
& LINK_ON_WAKE_EN
)
2177 wolopts
|= WAKE_PHY
;
2179 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2180 if (ocp_data
& UWF_EN
)
2181 wolopts
|= WAKE_UCAST
;
2182 if (ocp_data
& BWF_EN
)
2183 wolopts
|= WAKE_BCAST
;
2184 if (ocp_data
& MWF_EN
)
2185 wolopts
|= WAKE_MCAST
;
2187 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2188 if (ocp_data
& MAGIC_EN
)
2189 wolopts
|= WAKE_MAGIC
;
2194 static void __rtl_set_wol(struct r8152
*tp
, u32 wolopts
)
2198 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2200 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2201 ocp_data
&= ~LINK_ON_WAKE_EN
;
2202 if (wolopts
& WAKE_PHY
)
2203 ocp_data
|= LINK_ON_WAKE_EN
;
2204 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2206 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
);
2207 ocp_data
&= ~(UWF_EN
| BWF_EN
| MWF_EN
| LAN_WAKE_EN
);
2208 if (wolopts
& WAKE_UCAST
)
2210 if (wolopts
& WAKE_BCAST
)
2212 if (wolopts
& WAKE_MCAST
)
2214 if (wolopts
& WAKE_ANY
)
2215 ocp_data
|= LAN_WAKE_EN
;
2216 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG5
, ocp_data
);
2218 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2220 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
);
2221 ocp_data
&= ~MAGIC_EN
;
2222 if (wolopts
& WAKE_MAGIC
)
2223 ocp_data
|= MAGIC_EN
;
2224 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CFG_WOL
, ocp_data
);
2226 if (wolopts
& WAKE_ANY
)
2227 device_set_wakeup_enable(&tp
->udev
->dev
, true);
2229 device_set_wakeup_enable(&tp
->udev
->dev
, false);
2232 static void rtl_runtime_suspend_enable(struct r8152
*tp
, bool enable
)
2237 __rtl_set_wol(tp
, WAKE_ANY
);
2239 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_CONFIG
);
2241 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
);
2242 ocp_data
|= LINK_OFF_WAKE_EN
;
2243 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_CONFIG34
, ocp_data
);
2245 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2247 __rtl_set_wol(tp
, tp
->saved_wolopts
);
2251 static void rtl_phy_reset(struct r8152
*tp
)
2256 clear_bit(PHY_RESET
, &tp
->flags
);
2258 data
= r8152_mdio_read(tp
, MII_BMCR
);
2260 /* don't reset again before the previous one complete */
2261 if (data
& BMCR_RESET
)
2265 r8152_mdio_write(tp
, MII_BMCR
, data
);
2267 for (i
= 0; i
< 50; i
++) {
2269 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
2274 static void r8153_teredo_off(struct r8152
*tp
)
2278 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2279 ocp_data
&= ~(TEREDO_SEL
| TEREDO_RS_EVENT_MASK
| OOB_TEREDO_EN
);
2280 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2282 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_WDT6_CTRL
, WDT6_SET_MODE
);
2283 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_REALWOW_TIMER
, 0);
2284 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TEREDO_TIMER
, 0);
2287 static void r8152b_disable_aldps(struct r8152
*tp
)
2289 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPDNPS
| LINKENA
| DIS_SDSAVE
);
2293 static inline void r8152b_enable_aldps(struct r8152
*tp
)
2295 ocp_reg_write(tp
, OCP_ALDPS_CONFIG
, ENPWRSAVE
| ENPDNPS
|
2296 LINKENA
| DIS_SDSAVE
);
2299 static void rtl8152_disable(struct r8152
*tp
)
2301 r8152b_disable_aldps(tp
);
2303 r8152b_enable_aldps(tp
);
2306 static void r8152b_hw_phy_cfg(struct r8152
*tp
)
2310 data
= r8152_mdio_read(tp
, MII_BMCR
);
2311 if (data
& BMCR_PDOWN
) {
2312 data
&= ~BMCR_PDOWN
;
2313 r8152_mdio_write(tp
, MII_BMCR
, data
);
2316 set_bit(PHY_RESET
, &tp
->flags
);
2319 static void r8152b_exit_oob(struct r8152
*tp
)
2324 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2325 ocp_data
&= ~RCR_ACPT_ALL
;
2326 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2328 rxdy_gated_en(tp
, true);
2329 r8153_teredo_off(tp
);
2330 r8152b_hw_phy_cfg(tp
);
2332 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CRWECR
, CRWECR_NORAML
);
2333 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_CR
, 0x00);
2335 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2336 ocp_data
&= ~NOW_IS_OOB
;
2337 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2339 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2340 ocp_data
&= ~MCU_BORW_EN
;
2341 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2343 for (i
= 0; i
< 1000; i
++) {
2344 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2345 if (ocp_data
& LINK_LIST_READY
)
2347 usleep_range(1000, 2000);
2350 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2351 ocp_data
|= RE_INIT_LL
;
2352 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2354 for (i
= 0; i
< 1000; i
++) {
2355 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2356 if (ocp_data
& LINK_LIST_READY
)
2358 usleep_range(1000, 2000);
2361 rtl8152_nic_reset(tp
);
2363 /* rx share fifo credit full threshold */
2364 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2366 if (tp
->udev
->speed
== USB_SPEED_FULL
||
2367 tp
->udev
->speed
== USB_SPEED_LOW
) {
2368 /* rx share fifo credit near full threshold */
2369 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2371 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2374 /* rx share fifo credit near full threshold */
2375 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
,
2377 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
,
2381 /* TX share fifo free credit full threshold */
2382 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL
);
2384 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_TX_AGG
, TX_AGG_MAX_THRESHOLD
);
2385 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_RX_BUF_TH
, RX_THR_HIGH
);
2386 ocp_write_dword(tp
, MCU_TYPE_USB
, USB_TX_DMA
,
2387 TEST_MODE_DISABLE
| TX_SIZE_ADJUST1
);
2389 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
2391 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2393 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2394 ocp_data
|= TCR0_AUTO_FIFO
;
2395 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2398 static void r8152b_enter_oob(struct r8152
*tp
)
2403 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2404 ocp_data
&= ~NOW_IS_OOB
;
2405 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2407 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_OOB
);
2408 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_OOB
);
2409 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_OOB
);
2413 for (i
= 0; i
< 1000; i
++) {
2414 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2415 if (ocp_data
& LINK_LIST_READY
)
2417 usleep_range(1000, 2000);
2420 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2421 ocp_data
|= RE_INIT_LL
;
2422 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2424 for (i
= 0; i
< 1000; i
++) {
2425 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2426 if (ocp_data
& LINK_LIST_READY
)
2428 usleep_range(1000, 2000);
2431 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8152_RMS
);
2433 rtl_rx_vlan_en(tp
, true);
2435 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2436 ocp_data
|= ALDPS_PROXY_MODE
;
2437 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2439 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2440 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2441 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2443 rxdy_gated_en(tp
, false);
2445 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2446 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2447 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2450 static void r8153_hw_phy_cfg(struct r8152
*tp
)
2455 ocp_reg_write(tp
, OCP_ADC_CFG
, CKADSEL_L
| ADC_EN
| EN_EMI_L
);
2456 data
= r8152_mdio_read(tp
, MII_BMCR
);
2457 if (data
& BMCR_PDOWN
) {
2458 data
&= ~BMCR_PDOWN
;
2459 r8152_mdio_write(tp
, MII_BMCR
, data
);
2462 if (tp
->version
== RTL_VER_03
) {
2463 data
= ocp_reg_read(tp
, OCP_EEE_CFG
);
2464 data
&= ~CTAP_SHORT_EN
;
2465 ocp_reg_write(tp
, OCP_EEE_CFG
, data
);
2468 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2469 data
|= EEE_CLKDIV_EN
;
2470 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2472 data
= ocp_reg_read(tp
, OCP_DOWN_SPEED
);
2473 data
|= EN_10M_BGOFF
;
2474 ocp_reg_write(tp
, OCP_DOWN_SPEED
, data
);
2475 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2476 data
|= EN_10M_PLLOFF
;
2477 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2478 data
= sram_read(tp
, SRAM_IMPEDANCE
);
2479 data
&= ~RX_DRIVING_MASK
;
2480 sram_write(tp
, SRAM_IMPEDANCE
, data
);
2482 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
2483 ocp_data
|= PFM_PWM_SWITCH
;
2484 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
2486 data
= sram_read(tp
, SRAM_LPF_CFG
);
2487 data
|= LPF_AUTO_TUNE
;
2488 sram_write(tp
, SRAM_LPF_CFG
, data
);
2490 data
= sram_read(tp
, SRAM_10M_AMP1
);
2491 data
|= GDAC_IB_UPALL
;
2492 sram_write(tp
, SRAM_10M_AMP1
, data
);
2493 data
= sram_read(tp
, SRAM_10M_AMP2
);
2495 sram_write(tp
, SRAM_10M_AMP2
, data
);
2497 set_bit(PHY_RESET
, &tp
->flags
);
2500 static void r8153_u1u2en(struct r8152
*tp
, bool enable
)
2505 memset(u1u2
, 0xff, sizeof(u1u2
));
2507 memset(u1u2
, 0x00, sizeof(u1u2
));
2509 usb_ocp_write(tp
, USB_TOLERANCE
, BYTE_EN_SIX_BYTES
, sizeof(u1u2
), u1u2
);
2512 static void r8153_u2p3en(struct r8152
*tp
, bool enable
)
2516 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
);
2518 ocp_data
|= U2P3_ENABLE
;
2520 ocp_data
&= ~U2P3_ENABLE
;
2521 ocp_write_word(tp
, MCU_TYPE_USB
, USB_U2P3_CTRL
, ocp_data
);
2524 static void r8153_power_cut_en(struct r8152
*tp
, bool enable
)
2528 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
);
2530 ocp_data
|= PWR_EN
| PHASE2_EN
;
2532 ocp_data
&= ~(PWR_EN
| PHASE2_EN
);
2533 ocp_write_word(tp
, MCU_TYPE_USB
, USB_POWER_CUT
, ocp_data
);
2535 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_MISC_0
);
2536 ocp_data
&= ~PCUT_STATUS
;
2537 ocp_write_word(tp
, MCU_TYPE_USB
, USB_MISC_0
, ocp_data
);
2540 static void r8153_first_init(struct r8152
*tp
)
2545 rxdy_gated_en(tp
, true);
2546 r8153_teredo_off(tp
);
2548 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2549 ocp_data
&= ~RCR_ACPT_ALL
;
2550 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2552 r8153_hw_phy_cfg(tp
);
2554 rtl8152_nic_reset(tp
);
2556 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2557 ocp_data
&= ~NOW_IS_OOB
;
2558 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2560 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2561 ocp_data
&= ~MCU_BORW_EN
;
2562 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2564 for (i
= 0; i
< 1000; i
++) {
2565 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2566 if (ocp_data
& LINK_LIST_READY
)
2568 usleep_range(1000, 2000);
2571 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2572 ocp_data
|= RE_INIT_LL
;
2573 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2575 for (i
= 0; i
< 1000; i
++) {
2576 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2577 if (ocp_data
& LINK_LIST_READY
)
2579 usleep_range(1000, 2000);
2582 rtl_rx_vlan_en(tp
, tp
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
);
2584 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8153_RMS
);
2585 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_MTPS
, MTPS_JUMBO
);
2587 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
);
2588 ocp_data
|= TCR0_AUTO_FIFO
;
2589 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TCR0
, ocp_data
);
2591 rtl8152_nic_reset(tp
);
2593 /* rx share fifo credit full threshold */
2594 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL0
, RXFIFO_THR1_NORMAL
);
2595 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL1
, RXFIFO_THR2_NORMAL
);
2596 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RXFIFO_CTRL2
, RXFIFO_THR3_NORMAL
);
2597 /* TX share fifo free credit full threshold */
2598 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_TXFIFO_CTRL
, TXFIFO_THR_NORMAL2
);
2600 /* rx aggregation */
2601 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
2602 ocp_data
&= ~RX_AGG_DISABLE
;
2603 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
2606 static void r8153_enter_oob(struct r8152
*tp
)
2611 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2612 ocp_data
&= ~NOW_IS_OOB
;
2613 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2617 for (i
= 0; i
< 1000; i
++) {
2618 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2619 if (ocp_data
& LINK_LIST_READY
)
2621 usleep_range(1000, 2000);
2624 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
);
2625 ocp_data
|= RE_INIT_LL
;
2626 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_SFF_STS_7
, ocp_data
);
2628 for (i
= 0; i
< 1000; i
++) {
2629 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2630 if (ocp_data
& LINK_LIST_READY
)
2632 usleep_range(1000, 2000);
2635 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RMS
, RTL8153_RMS
);
2637 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
);
2638 ocp_data
&= ~TEREDO_WAKE_MASK
;
2639 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_TEREDO_CFG
, ocp_data
);
2641 rtl_rx_vlan_en(tp
, true);
2643 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
);
2644 ocp_data
|= ALDPS_PROXY_MODE
;
2645 ocp_write_word(tp
, MCU_TYPE_PLA
, PAL_BDC_CR
, ocp_data
);
2647 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
);
2648 ocp_data
|= NOW_IS_OOB
| DIS_MCU_CLROOB
;
2649 ocp_write_byte(tp
, MCU_TYPE_PLA
, PLA_OOB_CTRL
, ocp_data
);
2651 rxdy_gated_en(tp
, false);
2653 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
);
2654 ocp_data
|= RCR_APM
| RCR_AM
| RCR_AB
;
2655 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_RCR
, ocp_data
);
2658 static void r8153_disable_aldps(struct r8152
*tp
)
2662 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2664 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2668 static void r8153_enable_aldps(struct r8152
*tp
)
2672 data
= ocp_reg_read(tp
, OCP_POWER_CFG
);
2674 ocp_reg_write(tp
, OCP_POWER_CFG
, data
);
2677 static void rtl8153_disable(struct r8152
*tp
)
2679 r8153_disable_aldps(tp
);
2681 r8153_enable_aldps(tp
);
2684 static int rtl8152_set_speed(struct r8152
*tp
, u8 autoneg
, u16 speed
, u8 duplex
)
2686 u16 bmcr
, anar
, gbcr
;
2689 cancel_delayed_work_sync(&tp
->schedule
);
2690 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
2691 anar
&= ~(ADVERTISE_10HALF
| ADVERTISE_10FULL
|
2692 ADVERTISE_100HALF
| ADVERTISE_100FULL
);
2693 if (tp
->mii
.supports_gmii
) {
2694 gbcr
= r8152_mdio_read(tp
, MII_CTRL1000
);
2695 gbcr
&= ~(ADVERTISE_1000FULL
| ADVERTISE_1000HALF
);
2700 if (autoneg
== AUTONEG_DISABLE
) {
2701 if (speed
== SPEED_10
) {
2703 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2704 } else if (speed
== SPEED_100
) {
2705 bmcr
= BMCR_SPEED100
;
2706 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2707 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2708 bmcr
= BMCR_SPEED1000
;
2709 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2715 if (duplex
== DUPLEX_FULL
)
2716 bmcr
|= BMCR_FULLDPLX
;
2718 if (speed
== SPEED_10
) {
2719 if (duplex
== DUPLEX_FULL
)
2720 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2722 anar
|= ADVERTISE_10HALF
;
2723 } else if (speed
== SPEED_100
) {
2724 if (duplex
== DUPLEX_FULL
) {
2725 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2726 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2728 anar
|= ADVERTISE_10HALF
;
2729 anar
|= ADVERTISE_100HALF
;
2731 } else if (speed
== SPEED_1000
&& tp
->mii
.supports_gmii
) {
2732 if (duplex
== DUPLEX_FULL
) {
2733 anar
|= ADVERTISE_10HALF
| ADVERTISE_10FULL
;
2734 anar
|= ADVERTISE_100HALF
| ADVERTISE_100FULL
;
2735 gbcr
|= ADVERTISE_1000FULL
| ADVERTISE_1000HALF
;
2737 anar
|= ADVERTISE_10HALF
;
2738 anar
|= ADVERTISE_100HALF
;
2739 gbcr
|= ADVERTISE_1000HALF
;
2746 bmcr
= BMCR_ANENABLE
| BMCR_ANRESTART
;
2749 if (test_bit(PHY_RESET
, &tp
->flags
))
2752 if (tp
->mii
.supports_gmii
)
2753 r8152_mdio_write(tp
, MII_CTRL1000
, gbcr
);
2755 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
2756 r8152_mdio_write(tp
, MII_BMCR
, bmcr
);
2758 if (test_bit(PHY_RESET
, &tp
->flags
)) {
2761 clear_bit(PHY_RESET
, &tp
->flags
);
2762 for (i
= 0; i
< 50; i
++) {
2764 if ((r8152_mdio_read(tp
, MII_BMCR
) & BMCR_RESET
) == 0)
2774 static void rtl8152_up(struct r8152
*tp
)
2776 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2779 r8152b_disable_aldps(tp
);
2780 r8152b_exit_oob(tp
);
2781 r8152b_enable_aldps(tp
);
2784 static void rtl8152_down(struct r8152
*tp
)
2786 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2787 rtl_drop_queued_tx(tp
);
2791 r8152_power_cut_en(tp
, false);
2792 r8152b_disable_aldps(tp
);
2793 r8152b_enter_oob(tp
);
2794 r8152b_enable_aldps(tp
);
2797 static void rtl8153_up(struct r8152
*tp
)
2799 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2802 r8153_disable_aldps(tp
);
2803 r8153_first_init(tp
);
2804 r8153_enable_aldps(tp
);
2807 static void rtl8153_down(struct r8152
*tp
)
2809 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
)) {
2810 rtl_drop_queued_tx(tp
);
2814 r8153_u1u2en(tp
, false);
2815 r8153_power_cut_en(tp
, false);
2816 r8153_disable_aldps(tp
);
2817 r8153_enter_oob(tp
);
2818 r8153_enable_aldps(tp
);
2821 static void set_carrier(struct r8152
*tp
)
2823 struct net_device
*netdev
= tp
->netdev
;
2826 clear_bit(RTL8152_LINK_CHG
, &tp
->flags
);
2827 speed
= rtl8152_get_speed(tp
);
2829 if (speed
& LINK_STATUS
) {
2830 if (!(tp
->speed
& LINK_STATUS
)) {
2831 tp
->rtl_ops
.enable(tp
);
2832 set_bit(RTL8152_SET_RX_MODE
, &tp
->flags
);
2833 netif_carrier_on(netdev
);
2836 if (tp
->speed
& LINK_STATUS
) {
2837 netif_carrier_off(netdev
);
2838 tasklet_disable(&tp
->tl
);
2839 tp
->rtl_ops
.disable(tp
);
2840 tasklet_enable(&tp
->tl
);
2846 static void rtl_work_func_t(struct work_struct
*work
)
2848 struct r8152
*tp
= container_of(work
, struct r8152
, schedule
.work
);
2850 if (usb_autopm_get_interface(tp
->intf
) < 0)
2853 if (!test_bit(WORK_ENABLE
, &tp
->flags
))
2856 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
2859 if (!mutex_trylock(&tp
->control
)) {
2860 schedule_delayed_work(&tp
->schedule
, 0);
2864 if (test_bit(RTL8152_LINK_CHG
, &tp
->flags
))
2867 if (test_bit(RTL8152_SET_RX_MODE
, &tp
->flags
))
2868 _rtl8152_set_rx_mode(tp
->netdev
);
2870 if (test_bit(SCHEDULE_TASKLET
, &tp
->flags
) &&
2871 (tp
->speed
& LINK_STATUS
)) {
2872 clear_bit(SCHEDULE_TASKLET
, &tp
->flags
);
2873 tasklet_schedule(&tp
->tl
);
2876 if (test_bit(PHY_RESET
, &tp
->flags
))
2879 mutex_unlock(&tp
->control
);
2882 usb_autopm_put_interface(tp
->intf
);
2885 static int rtl8152_open(struct net_device
*netdev
)
2887 struct r8152
*tp
= netdev_priv(netdev
);
2890 res
= alloc_all_mem(tp
);
2894 res
= usb_autopm_get_interface(tp
->intf
);
2900 mutex_lock(&tp
->control
);
2902 /* The WORK_ENABLE may be set when autoresume occurs */
2903 if (test_bit(WORK_ENABLE
, &tp
->flags
)) {
2904 clear_bit(WORK_ENABLE
, &tp
->flags
);
2905 usb_kill_urb(tp
->intr_urb
);
2906 cancel_delayed_work_sync(&tp
->schedule
);
2907 if (tp
->speed
& LINK_STATUS
)
2908 tp
->rtl_ops
.disable(tp
);
2913 rtl8152_set_speed(tp
, AUTONEG_ENABLE
,
2914 tp
->mii
.supports_gmii
? SPEED_1000
: SPEED_100
,
2917 netif_carrier_off(netdev
);
2918 netif_start_queue(netdev
);
2919 set_bit(WORK_ENABLE
, &tp
->flags
);
2921 res
= usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
2924 netif_device_detach(tp
->netdev
);
2925 netif_warn(tp
, ifup
, netdev
, "intr_urb submit failed: %d\n",
2930 mutex_unlock(&tp
->control
);
2932 usb_autopm_put_interface(tp
->intf
);
2938 static int rtl8152_close(struct net_device
*netdev
)
2940 struct r8152
*tp
= netdev_priv(netdev
);
2943 clear_bit(WORK_ENABLE
, &tp
->flags
);
2944 usb_kill_urb(tp
->intr_urb
);
2945 cancel_delayed_work_sync(&tp
->schedule
);
2946 netif_stop_queue(netdev
);
2948 res
= usb_autopm_get_interface(tp
->intf
);
2950 rtl_drop_queued_tx(tp
);
2952 mutex_lock(&tp
->control
);
2954 /* The autosuspend may have been enabled and wouldn't
2955 * be disable when autoresume occurs, because the
2956 * netif_running() would be false.
2958 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
2959 rtl_runtime_suspend_enable(tp
, false);
2960 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
2963 tasklet_disable(&tp
->tl
);
2964 tp
->rtl_ops
.down(tp
);
2965 tasklet_enable(&tp
->tl
);
2967 mutex_unlock(&tp
->control
);
2969 usb_autopm_put_interface(tp
->intf
);
2977 static inline void r8152_mmd_indirect(struct r8152
*tp
, u16 dev
, u16 reg
)
2979 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_ADDR
| dev
);
2980 ocp_reg_write(tp
, OCP_EEE_DATA
, reg
);
2981 ocp_reg_write(tp
, OCP_EEE_AR
, FUN_DATA
| dev
);
2984 static u16
r8152_mmd_read(struct r8152
*tp
, u16 dev
, u16 reg
)
2988 r8152_mmd_indirect(tp
, dev
, reg
);
2989 data
= ocp_reg_read(tp
, OCP_EEE_DATA
);
2990 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
2995 static void r8152_mmd_write(struct r8152
*tp
, u16 dev
, u16 reg
, u16 data
)
2997 r8152_mmd_indirect(tp
, dev
, reg
);
2998 ocp_reg_write(tp
, OCP_EEE_DATA
, data
);
2999 ocp_reg_write(tp
, OCP_EEE_AR
, 0x0000);
3002 static void r8152_eee_en(struct r8152
*tp
, bool enable
)
3004 u16 config1
, config2
, config3
;
3007 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3008 config1
= ocp_reg_read(tp
, OCP_EEE_CONFIG1
) & ~sd_rise_time_mask
;
3009 config2
= ocp_reg_read(tp
, OCP_EEE_CONFIG2
);
3010 config3
= ocp_reg_read(tp
, OCP_EEE_CONFIG3
) & ~fast_snr_mask
;
3013 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
3014 config1
|= EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
| RX_QUIET_EN
;
3015 config1
|= sd_rise_time(1);
3016 config2
|= RG_DACQUIET_EN
| RG_LDVQUIET_EN
;
3017 config3
|= fast_snr(42);
3019 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
3020 config1
&= ~(EEE_10_CAP
| EEE_NWAY_EN
| TX_QUIET_EN
|
3022 config1
|= sd_rise_time(7);
3023 config2
&= ~(RG_DACQUIET_EN
| RG_LDVQUIET_EN
);
3024 config3
|= fast_snr(511);
3027 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
3028 ocp_reg_write(tp
, OCP_EEE_CONFIG1
, config1
);
3029 ocp_reg_write(tp
, OCP_EEE_CONFIG2
, config2
);
3030 ocp_reg_write(tp
, OCP_EEE_CONFIG3
, config3
);
3033 static void r8152b_enable_eee(struct r8152
*tp
)
3035 r8152_eee_en(tp
, true);
3036 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, MDIO_EEE_100TX
);
3039 static void r8153_eee_en(struct r8152
*tp
, bool enable
)
3044 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3045 config
= ocp_reg_read(tp
, OCP_EEE_CFG
);
3048 ocp_data
|= EEE_RX_EN
| EEE_TX_EN
;
3051 ocp_data
&= ~(EEE_RX_EN
| EEE_TX_EN
);
3052 config
&= ~EEE10_EN
;
3055 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
, ocp_data
);
3056 ocp_reg_write(tp
, OCP_EEE_CFG
, config
);
3059 static void r8153_enable_eee(struct r8152
*tp
)
3061 r8153_eee_en(tp
, true);
3062 ocp_reg_write(tp
, OCP_EEE_ADV
, MDIO_EEE_1000T
| MDIO_EEE_100TX
);
3065 static void r8152b_enable_fc(struct r8152
*tp
)
3069 anar
= r8152_mdio_read(tp
, MII_ADVERTISE
);
3070 anar
|= ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
;
3071 r8152_mdio_write(tp
, MII_ADVERTISE
, anar
);
3074 static void rtl_tally_reset(struct r8152
*tp
)
3078 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
);
3079 ocp_data
|= TALLY_RESET
;
3080 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_RSTTALLY
, ocp_data
);
3083 static void r8152b_init(struct r8152
*tp
)
3087 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3090 r8152b_disable_aldps(tp
);
3092 if (tp
->version
== RTL_VER_01
) {
3093 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
3094 ocp_data
&= ~LED_MODE_MASK
;
3095 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
3098 r8152_power_cut_en(tp
, false);
3100 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
);
3101 ocp_data
|= TX_10M_IDLE_EN
| PFM_PWM_SWITCH
;
3102 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_PHY_PWR
, ocp_data
);
3103 ocp_data
= ocp_read_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
);
3104 ocp_data
&= ~MCU_CLK_RATIO_MASK
;
3105 ocp_data
|= MCU_CLK_RATIO
| D3_CLK_GATED_EN
;
3106 ocp_write_dword(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ocp_data
);
3107 ocp_data
= GPHY_STS_MSK
| SPEED_DOWN_MSK
|
3108 SPDWN_RXDV_MSK
| SPDWN_LINKCHG_MSK
;
3109 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_GPHY_INTR_IMR
, ocp_data
);
3111 r8152b_enable_eee(tp
);
3112 r8152b_enable_aldps(tp
);
3113 r8152b_enable_fc(tp
);
3114 rtl_tally_reset(tp
);
3116 /* enable rx aggregation */
3117 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
);
3118 ocp_data
&= ~RX_AGG_DISABLE
;
3119 ocp_write_word(tp
, MCU_TYPE_USB
, USB_USB_CTRL
, ocp_data
);
3122 static void r8153_init(struct r8152
*tp
)
3127 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3130 r8153_disable_aldps(tp
);
3131 r8153_u1u2en(tp
, false);
3133 for (i
= 0; i
< 500; i
++) {
3134 if (ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_BOOT_CTRL
) &
3140 for (i
= 0; i
< 500; i
++) {
3141 ocp_data
= ocp_reg_read(tp
, OCP_PHY_STATUS
) & PHY_STAT_MASK
;
3142 if (ocp_data
== PHY_STAT_LAN_ON
|| ocp_data
== PHY_STAT_PWRDN
)
3147 r8153_u2p3en(tp
, false);
3149 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
);
3150 ocp_data
&= ~TIMER11_EN
;
3151 ocp_write_word(tp
, MCU_TYPE_USB
, USB_WDT11_CTRL
, ocp_data
);
3153 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
);
3154 ocp_data
&= ~LED_MODE_MASK
;
3155 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_LED_FEATURE
, ocp_data
);
3157 ocp_data
= ocp_read_byte(tp
, MCU_TYPE_USB
, USB_LPM_CTRL
);
3158 ocp_data
&= ~LPM_TIMER_MASK
;
3159 if (tp
->udev
->speed
== USB_SPEED_SUPER
)
3160 ocp_data
|= LPM_TIMER_500US
;
3162 ocp_data
|= LPM_TIMER_500MS
;
3163 ocp_write_byte(tp
, MCU_TYPE_USB
, USB_LPM_CTRL
, ocp_data
);
3165 ocp_data
= ocp_read_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
);
3166 ocp_data
&= ~SEN_VAL_MASK
;
3167 ocp_data
|= SEN_VAL_NORMAL
| SEL_RXIDLE
;
3168 ocp_write_word(tp
, MCU_TYPE_USB
, USB_AFE_CTRL2
, ocp_data
);
3170 r8153_power_cut_en(tp
, false);
3171 r8153_u1u2en(tp
, true);
3173 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL
, ALDPS_SPDWN_RATIO
);
3174 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL2
, EEE_SPDWN_RATIO
);
3175 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL3
,
3176 PKT_AVAIL_SPDWN_EN
| SUSPEND_SPDWN_EN
|
3177 U1U2_SPDWN_EN
| L1_SPDWN_EN
);
3178 ocp_write_word(tp
, MCU_TYPE_PLA
, PLA_MAC_PWR_CTRL4
,
3179 PWRSAVE_SPDWN_EN
| RXDV_SPDWN_EN
| TX10MIDLE_EN
|
3180 TP100_SPDWN_EN
| TP500_SPDWN_EN
| TP1000_SPDWN_EN
|
3183 r8153_enable_eee(tp
);
3184 r8153_enable_aldps(tp
);
3185 r8152b_enable_fc(tp
);
3186 rtl_tally_reset(tp
);
3189 static int rtl8152_suspend(struct usb_interface
*intf
, pm_message_t message
)
3191 struct r8152
*tp
= usb_get_intfdata(intf
);
3192 struct net_device
*netdev
= tp
->netdev
;
3195 mutex_lock(&tp
->control
);
3197 if (PMSG_IS_AUTO(message
)) {
3198 if (netif_running(netdev
) && work_busy(&tp
->schedule
.work
)) {
3203 set_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3205 netif_device_detach(netdev
);
3208 if (netif_running(netdev
)) {
3209 clear_bit(WORK_ENABLE
, &tp
->flags
);
3210 usb_kill_urb(tp
->intr_urb
);
3211 tasklet_disable(&tp
->tl
);
3212 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3214 rtl_runtime_suspend_enable(tp
, true);
3216 cancel_delayed_work_sync(&tp
->schedule
);
3217 tp
->rtl_ops
.down(tp
);
3219 tasklet_enable(&tp
->tl
);
3222 mutex_unlock(&tp
->control
);
3227 static int rtl8152_resume(struct usb_interface
*intf
)
3229 struct r8152
*tp
= usb_get_intfdata(intf
);
3231 mutex_lock(&tp
->control
);
3233 if (!test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3234 tp
->rtl_ops
.init(tp
);
3235 netif_device_attach(tp
->netdev
);
3238 if (netif_running(tp
->netdev
)) {
3239 if (test_bit(SELECTIVE_SUSPEND
, &tp
->flags
)) {
3240 rtl_runtime_suspend_enable(tp
, false);
3241 clear_bit(SELECTIVE_SUSPEND
, &tp
->flags
);
3242 set_bit(WORK_ENABLE
, &tp
->flags
);
3243 if (tp
->speed
& LINK_STATUS
)
3247 rtl8152_set_speed(tp
, AUTONEG_ENABLE
,
3248 tp
->mii
.supports_gmii
?
3249 SPEED_1000
: SPEED_100
,
3252 netif_carrier_off(tp
->netdev
);
3253 set_bit(WORK_ENABLE
, &tp
->flags
);
3255 usb_submit_urb(tp
->intr_urb
, GFP_KERNEL
);
3258 mutex_unlock(&tp
->control
);
3263 static void rtl8152_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
3265 struct r8152
*tp
= netdev_priv(dev
);
3267 if (usb_autopm_get_interface(tp
->intf
) < 0)
3270 mutex_lock(&tp
->control
);
3272 wol
->supported
= WAKE_ANY
;
3273 wol
->wolopts
= __rtl_get_wol(tp
);
3275 mutex_unlock(&tp
->control
);
3277 usb_autopm_put_interface(tp
->intf
);
3280 static int rtl8152_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
3282 struct r8152
*tp
= netdev_priv(dev
);
3285 ret
= usb_autopm_get_interface(tp
->intf
);
3289 mutex_lock(&tp
->control
);
3291 __rtl_set_wol(tp
, wol
->wolopts
);
3292 tp
->saved_wolopts
= wol
->wolopts
& WAKE_ANY
;
3294 mutex_unlock(&tp
->control
);
3296 usb_autopm_put_interface(tp
->intf
);
3302 static u32
rtl8152_get_msglevel(struct net_device
*dev
)
3304 struct r8152
*tp
= netdev_priv(dev
);
3306 return tp
->msg_enable
;
3309 static void rtl8152_set_msglevel(struct net_device
*dev
, u32 value
)
3311 struct r8152
*tp
= netdev_priv(dev
);
3313 tp
->msg_enable
= value
;
3316 static void rtl8152_get_drvinfo(struct net_device
*netdev
,
3317 struct ethtool_drvinfo
*info
)
3319 struct r8152
*tp
= netdev_priv(netdev
);
3321 strlcpy(info
->driver
, MODULENAME
, sizeof(info
->driver
));
3322 strlcpy(info
->version
, DRIVER_VERSION
, sizeof(info
->version
));
3323 usb_make_path(tp
->udev
, info
->bus_info
, sizeof(info
->bus_info
));
3327 int rtl8152_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*cmd
)
3329 struct r8152
*tp
= netdev_priv(netdev
);
3332 if (!tp
->mii
.mdio_read
)
3335 ret
= usb_autopm_get_interface(tp
->intf
);
3339 mutex_lock(&tp
->control
);
3341 ret
= mii_ethtool_gset(&tp
->mii
, cmd
);
3343 mutex_unlock(&tp
->control
);
3345 usb_autopm_put_interface(tp
->intf
);
3351 static int rtl8152_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
3353 struct r8152
*tp
= netdev_priv(dev
);
3356 ret
= usb_autopm_get_interface(tp
->intf
);
3360 mutex_lock(&tp
->control
);
3362 ret
= rtl8152_set_speed(tp
, cmd
->autoneg
, cmd
->speed
, cmd
->duplex
);
3364 mutex_unlock(&tp
->control
);
3366 usb_autopm_put_interface(tp
->intf
);
3372 static const char rtl8152_gstrings
[][ETH_GSTRING_LEN
] = {
3379 "tx_single_collisions",
3380 "tx_multi_collisions",
3388 static int rtl8152_get_sset_count(struct net_device
*dev
, int sset
)
3392 return ARRAY_SIZE(rtl8152_gstrings
);
3398 static void rtl8152_get_ethtool_stats(struct net_device
*dev
,
3399 struct ethtool_stats
*stats
, u64
*data
)
3401 struct r8152
*tp
= netdev_priv(dev
);
3402 struct tally_counter tally
;
3404 if (usb_autopm_get_interface(tp
->intf
) < 0)
3407 generic_ocp_read(tp
, PLA_TALLYCNT
, sizeof(tally
), &tally
, MCU_TYPE_PLA
);
3409 usb_autopm_put_interface(tp
->intf
);
3411 data
[0] = le64_to_cpu(tally
.tx_packets
);
3412 data
[1] = le64_to_cpu(tally
.rx_packets
);
3413 data
[2] = le64_to_cpu(tally
.tx_errors
);
3414 data
[3] = le32_to_cpu(tally
.rx_errors
);
3415 data
[4] = le16_to_cpu(tally
.rx_missed
);
3416 data
[5] = le16_to_cpu(tally
.align_errors
);
3417 data
[6] = le32_to_cpu(tally
.tx_one_collision
);
3418 data
[7] = le32_to_cpu(tally
.tx_multi_collision
);
3419 data
[8] = le64_to_cpu(tally
.rx_unicast
);
3420 data
[9] = le64_to_cpu(tally
.rx_broadcast
);
3421 data
[10] = le32_to_cpu(tally
.rx_multicast
);
3422 data
[11] = le16_to_cpu(tally
.tx_aborted
);
3423 data
[12] = le16_to_cpu(tally
.tx_underun
);
3426 static void rtl8152_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
3428 switch (stringset
) {
3430 memcpy(data
, *rtl8152_gstrings
, sizeof(rtl8152_gstrings
));
3435 static int r8152_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3437 u32 ocp_data
, lp
, adv
, supported
= 0;
3440 val
= r8152_mmd_read(tp
, MDIO_MMD_PCS
, MDIO_PCS_EEE_ABLE
);
3441 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
3443 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
);
3444 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
3446 val
= r8152_mmd_read(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_LPABLE
);
3447 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
3449 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3450 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
3452 eee
->eee_enabled
= !!ocp_data
;
3453 eee
->eee_active
= !!(supported
& adv
& lp
);
3454 eee
->supported
= supported
;
3455 eee
->advertised
= adv
;
3456 eee
->lp_advertised
= lp
;
3461 static int r8152_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3463 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
3465 r8152_eee_en(tp
, eee
->eee_enabled
);
3467 if (!eee
->eee_enabled
)
3470 r8152_mmd_write(tp
, MDIO_MMD_AN
, MDIO_AN_EEE_ADV
, val
);
3475 static int r8153_get_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3477 u32 ocp_data
, lp
, adv
, supported
= 0;
3480 val
= ocp_reg_read(tp
, OCP_EEE_ABLE
);
3481 supported
= mmd_eee_cap_to_ethtool_sup_t(val
);
3483 val
= ocp_reg_read(tp
, OCP_EEE_ADV
);
3484 adv
= mmd_eee_adv_to_ethtool_adv_t(val
);
3486 val
= ocp_reg_read(tp
, OCP_EEE_LPABLE
);
3487 lp
= mmd_eee_adv_to_ethtool_adv_t(val
);
3489 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_EEE_CR
);
3490 ocp_data
&= EEE_RX_EN
| EEE_TX_EN
;
3492 eee
->eee_enabled
= !!ocp_data
;
3493 eee
->eee_active
= !!(supported
& adv
& lp
);
3494 eee
->supported
= supported
;
3495 eee
->advertised
= adv
;
3496 eee
->lp_advertised
= lp
;
3501 static int r8153_set_eee(struct r8152
*tp
, struct ethtool_eee
*eee
)
3503 u16 val
= ethtool_adv_to_mmd_eee_adv_t(eee
->advertised
);
3505 r8153_eee_en(tp
, eee
->eee_enabled
);
3507 if (!eee
->eee_enabled
)
3510 ocp_reg_write(tp
, OCP_EEE_ADV
, val
);
3516 rtl_ethtool_get_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
3518 struct r8152
*tp
= netdev_priv(net
);
3521 ret
= usb_autopm_get_interface(tp
->intf
);
3525 mutex_lock(&tp
->control
);
3527 ret
= tp
->rtl_ops
.eee_get(tp
, edata
);
3529 mutex_unlock(&tp
->control
);
3531 usb_autopm_put_interface(tp
->intf
);
3538 rtl_ethtool_set_eee(struct net_device
*net
, struct ethtool_eee
*edata
)
3540 struct r8152
*tp
= netdev_priv(net
);
3543 ret
= usb_autopm_get_interface(tp
->intf
);
3547 mutex_lock(&tp
->control
);
3549 ret
= tp
->rtl_ops
.eee_set(tp
, edata
);
3551 ret
= mii_nway_restart(&tp
->mii
);
3553 mutex_unlock(&tp
->control
);
3555 usb_autopm_put_interface(tp
->intf
);
3561 static struct ethtool_ops ops
= {
3562 .get_drvinfo
= rtl8152_get_drvinfo
,
3563 .get_settings
= rtl8152_get_settings
,
3564 .set_settings
= rtl8152_set_settings
,
3565 .get_link
= ethtool_op_get_link
,
3566 .get_msglevel
= rtl8152_get_msglevel
,
3567 .set_msglevel
= rtl8152_set_msglevel
,
3568 .get_wol
= rtl8152_get_wol
,
3569 .set_wol
= rtl8152_set_wol
,
3570 .get_strings
= rtl8152_get_strings
,
3571 .get_sset_count
= rtl8152_get_sset_count
,
3572 .get_ethtool_stats
= rtl8152_get_ethtool_stats
,
3573 .get_eee
= rtl_ethtool_get_eee
,
3574 .set_eee
= rtl_ethtool_set_eee
,
3577 static int rtl8152_ioctl(struct net_device
*netdev
, struct ifreq
*rq
, int cmd
)
3579 struct r8152
*tp
= netdev_priv(netdev
);
3580 struct mii_ioctl_data
*data
= if_mii(rq
);
3583 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3586 res
= usb_autopm_get_interface(tp
->intf
);
3592 data
->phy_id
= R8152_PHY_ID
; /* Internal PHY */
3596 mutex_lock(&tp
->control
);
3597 data
->val_out
= r8152_mdio_read(tp
, data
->reg_num
);
3598 mutex_unlock(&tp
->control
);
3602 if (!capable(CAP_NET_ADMIN
)) {
3606 mutex_lock(&tp
->control
);
3607 r8152_mdio_write(tp
, data
->reg_num
, data
->val_in
);
3608 mutex_unlock(&tp
->control
);
3615 usb_autopm_put_interface(tp
->intf
);
3621 static int rtl8152_change_mtu(struct net_device
*dev
, int new_mtu
)
3623 struct r8152
*tp
= netdev_priv(dev
);
3625 switch (tp
->version
) {
3628 return eth_change_mtu(dev
, new_mtu
);
3633 if (new_mtu
< 68 || new_mtu
> RTL8153_MAX_MTU
)
3641 static const struct net_device_ops rtl8152_netdev_ops
= {
3642 .ndo_open
= rtl8152_open
,
3643 .ndo_stop
= rtl8152_close
,
3644 .ndo_do_ioctl
= rtl8152_ioctl
,
3645 .ndo_start_xmit
= rtl8152_start_xmit
,
3646 .ndo_tx_timeout
= rtl8152_tx_timeout
,
3647 .ndo_set_features
= rtl8152_set_features
,
3648 .ndo_set_rx_mode
= rtl8152_set_rx_mode
,
3649 .ndo_set_mac_address
= rtl8152_set_mac_address
,
3650 .ndo_change_mtu
= rtl8152_change_mtu
,
3651 .ndo_validate_addr
= eth_validate_addr
,
3654 static void r8152b_get_version(struct r8152
*tp
)
3659 ocp_data
= ocp_read_word(tp
, MCU_TYPE_PLA
, PLA_TCR1
);
3660 version
= (u16
)(ocp_data
& VERSION_MASK
);
3664 tp
->version
= RTL_VER_01
;
3667 tp
->version
= RTL_VER_02
;
3670 tp
->version
= RTL_VER_03
;
3671 tp
->mii
.supports_gmii
= 1;
3674 tp
->version
= RTL_VER_04
;
3675 tp
->mii
.supports_gmii
= 1;
3678 tp
->version
= RTL_VER_05
;
3679 tp
->mii
.supports_gmii
= 1;
3682 netif_info(tp
, probe
, tp
->netdev
,
3683 "Unknown version 0x%04x\n", version
);
3688 static void rtl8152_unload(struct r8152
*tp
)
3690 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3693 if (tp
->version
!= RTL_VER_01
)
3694 r8152_power_cut_en(tp
, true);
3697 static void rtl8153_unload(struct r8152
*tp
)
3699 if (test_bit(RTL8152_UNPLUG
, &tp
->flags
))
3702 r8153_power_cut_en(tp
, false);
3705 static int rtl_ops_init(struct r8152
*tp
, const struct usb_device_id
*id
)
3707 struct rtl_ops
*ops
= &tp
->rtl_ops
;
3710 switch (id
->idVendor
) {
3711 case VENDOR_ID_REALTEK
:
3712 switch (id
->idProduct
) {
3713 case PRODUCT_ID_RTL8152
:
3714 ops
->init
= r8152b_init
;
3715 ops
->enable
= rtl8152_enable
;
3716 ops
->disable
= rtl8152_disable
;
3717 ops
->up
= rtl8152_up
;
3718 ops
->down
= rtl8152_down
;
3719 ops
->unload
= rtl8152_unload
;
3720 ops
->eee_get
= r8152_get_eee
;
3721 ops
->eee_set
= r8152_set_eee
;
3724 case PRODUCT_ID_RTL8153
:
3725 ops
->init
= r8153_init
;
3726 ops
->enable
= rtl8153_enable
;
3727 ops
->disable
= rtl8153_disable
;
3728 ops
->up
= rtl8153_up
;
3729 ops
->down
= rtl8153_down
;
3730 ops
->unload
= rtl8153_unload
;
3731 ops
->eee_get
= r8153_get_eee
;
3732 ops
->eee_set
= r8153_set_eee
;
3740 case VENDOR_ID_SAMSUNG
:
3741 switch (id
->idProduct
) {
3742 case PRODUCT_ID_SAMSUNG
:
3743 ops
->init
= r8153_init
;
3744 ops
->enable
= rtl8153_enable
;
3745 ops
->disable
= rtl8153_disable
;
3746 ops
->up
= rtl8153_up
;
3747 ops
->down
= rtl8153_down
;
3748 ops
->unload
= rtl8153_unload
;
3749 ops
->eee_get
= r8153_get_eee
;
3750 ops
->eee_set
= r8153_set_eee
;
3763 netif_err(tp
, probe
, tp
->netdev
, "Unknown Device\n");
3768 static int rtl8152_probe(struct usb_interface
*intf
,
3769 const struct usb_device_id
*id
)
3771 struct usb_device
*udev
= interface_to_usbdev(intf
);
3773 struct net_device
*netdev
;
3776 if (udev
->actconfig
->desc
.bConfigurationValue
!= 1) {
3777 usb_driver_set_configuration(udev
, 1);
3781 usb_reset_device(udev
);
3782 netdev
= alloc_etherdev(sizeof(struct r8152
));
3784 dev_err(&intf
->dev
, "Out of memory\n");
3788 SET_NETDEV_DEV(netdev
, &intf
->dev
);
3789 tp
= netdev_priv(netdev
);
3790 tp
->msg_enable
= 0x7FFF;
3793 tp
->netdev
= netdev
;
3796 ret
= rtl_ops_init(tp
, id
);
3800 tasklet_init(&tp
->tl
, bottom_half
, (unsigned long)tp
);
3801 mutex_init(&tp
->control
);
3802 INIT_DELAYED_WORK(&tp
->schedule
, rtl_work_func_t
);
3804 netdev
->netdev_ops
= &rtl8152_netdev_ops
;
3805 netdev
->watchdog_timeo
= RTL8152_TX_TIMEOUT
;
3807 netdev
->features
|= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
3808 NETIF_F_TSO
| NETIF_F_FRAGLIST
| NETIF_F_IPV6_CSUM
|
3809 NETIF_F_TSO6
| NETIF_F_HW_VLAN_CTAG_RX
|
3810 NETIF_F_HW_VLAN_CTAG_TX
;
3811 netdev
->hw_features
= NETIF_F_RXCSUM
| NETIF_F_IP_CSUM
| NETIF_F_SG
|
3812 NETIF_F_TSO
| NETIF_F_FRAGLIST
|
3813 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
|
3814 NETIF_F_HW_VLAN_CTAG_RX
|
3815 NETIF_F_HW_VLAN_CTAG_TX
;
3816 netdev
->vlan_features
= NETIF_F_SG
| NETIF_F_IP_CSUM
| NETIF_F_TSO
|
3817 NETIF_F_HIGHDMA
| NETIF_F_FRAGLIST
|
3818 NETIF_F_IPV6_CSUM
| NETIF_F_TSO6
;
3820 netdev
->ethtool_ops
= &ops
;
3821 netif_set_gso_max_size(netdev
, RTL_LIMITED_TSO_SIZE
);
3823 tp
->mii
.dev
= netdev
;
3824 tp
->mii
.mdio_read
= read_mii_word
;
3825 tp
->mii
.mdio_write
= write_mii_word
;
3826 tp
->mii
.phy_id_mask
= 0x3f;
3827 tp
->mii
.reg_num_mask
= 0x1f;
3828 tp
->mii
.phy_id
= R8152_PHY_ID
;
3829 tp
->mii
.supports_gmii
= 0;
3831 intf
->needs_remote_wakeup
= 1;
3833 r8152b_get_version(tp
);
3834 tp
->rtl_ops
.init(tp
);
3835 set_ethernet_addr(tp
);
3837 usb_set_intfdata(intf
, tp
);
3839 ret
= register_netdev(netdev
);
3841 netif_err(tp
, probe
, netdev
, "couldn't register the device\n");
3845 tp
->saved_wolopts
= __rtl_get_wol(tp
);
3846 if (tp
->saved_wolopts
)
3847 device_set_wakeup_enable(&udev
->dev
, true);
3849 device_set_wakeup_enable(&udev
->dev
, false);
3851 netif_info(tp
, probe
, netdev
, "%s\n", DRIVER_VERSION
);
3856 usb_set_intfdata(intf
, NULL
);
3858 free_netdev(netdev
);
3862 static void rtl8152_disconnect(struct usb_interface
*intf
)
3864 struct r8152
*tp
= usb_get_intfdata(intf
);
3866 usb_set_intfdata(intf
, NULL
);
3868 struct usb_device
*udev
= tp
->udev
;
3870 if (udev
->state
== USB_STATE_NOTATTACHED
)
3871 set_bit(RTL8152_UNPLUG
, &tp
->flags
);
3873 tasklet_kill(&tp
->tl
);
3874 unregister_netdev(tp
->netdev
);
3875 tp
->rtl_ops
.unload(tp
);
3876 free_netdev(tp
->netdev
);
3880 /* table of devices that work with this driver */
3881 static struct usb_device_id rtl8152_table
[] = {
3882 {USB_DEVICE(VENDOR_ID_REALTEK
, PRODUCT_ID_RTL8152
)},
3883 {USB_DEVICE(VENDOR_ID_REALTEK
, PRODUCT_ID_RTL8153
)},
3884 {USB_DEVICE(VENDOR_ID_SAMSUNG
, PRODUCT_ID_SAMSUNG
)},
3888 MODULE_DEVICE_TABLE(usb
, rtl8152_table
);
3890 static struct usb_driver rtl8152_driver
= {
3892 .id_table
= rtl8152_table
,
3893 .probe
= rtl8152_probe
,
3894 .disconnect
= rtl8152_disconnect
,
3895 .suspend
= rtl8152_suspend
,
3896 .resume
= rtl8152_resume
,
3897 .reset_resume
= rtl8152_resume
,
3898 .supports_autosuspend
= 1,
3899 .disable_hub_initiated_lpm
= 1,
3902 module_usb_driver(rtl8152_driver
);
3904 MODULE_AUTHOR(DRIVER_AUTHOR
);
3905 MODULE_DESCRIPTION(DRIVER_DESC
);
3906 MODULE_LICENSE("GPL");