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usbnet: smsc75xx: apply introduced usb command APIs
[deliverable/linux.git] / drivers / net / usb / smsc75xx.c
1 /***************************************************************************
2 *
3 * Copyright (C) 2007-2010 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 *
19 *****************************************************************************/
20
21 #include <linux/module.h>
22 #include <linux/kmod.h>
23 #include <linux/init.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/ethtool.h>
27 #include <linux/mii.h>
28 #include <linux/usb.h>
29 #include <linux/crc32.h>
30 #include <linux/usb/usbnet.h>
31 #include <linux/slab.h>
32 #include "smsc75xx.h"
33
34 #define SMSC_CHIPNAME "smsc75xx"
35 #define SMSC_DRIVER_VERSION "1.0.0"
36 #define HS_USB_PKT_SIZE (512)
37 #define FS_USB_PKT_SIZE (64)
38 #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
39 #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
40 #define DEFAULT_BULK_IN_DELAY (0x00002000)
41 #define MAX_SINGLE_PACKET_SIZE (9000)
42 #define LAN75XX_EEPROM_MAGIC (0x7500)
43 #define EEPROM_MAC_OFFSET (0x01)
44 #define DEFAULT_TX_CSUM_ENABLE (true)
45 #define DEFAULT_RX_CSUM_ENABLE (true)
46 #define DEFAULT_TSO_ENABLE (true)
47 #define SMSC75XX_INTERNAL_PHY_ID (1)
48 #define SMSC75XX_TX_OVERHEAD (8)
49 #define MAX_RX_FIFO_SIZE (20 * 1024)
50 #define MAX_TX_FIFO_SIZE (12 * 1024)
51 #define USB_VENDOR_ID_SMSC (0x0424)
52 #define USB_PRODUCT_ID_LAN7500 (0x7500)
53 #define USB_PRODUCT_ID_LAN7505 (0x7505)
54 #define RXW_PADDING 2
55 #define SUPPORTED_WAKE (WAKE_MAGIC)
56
57 #define check_warn(ret, fmt, args...) \
58 ({ if (ret < 0) netdev_warn(dev->net, fmt, ##args); })
59
60 #define check_warn_return(ret, fmt, args...) \
61 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); return ret; } })
62
63 #define check_warn_goto_done(ret, fmt, args...) \
64 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); goto done; } })
65
66 struct smsc75xx_priv {
67 struct usbnet *dev;
68 u32 rfe_ctl;
69 u32 wolopts;
70 u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN];
71 struct mutex dataport_mutex;
72 spinlock_t rfe_ctl_lock;
73 struct work_struct set_multicast;
74 };
75
76 struct usb_context {
77 struct usb_ctrlrequest req;
78 struct usbnet *dev;
79 };
80
81 static bool turbo_mode = true;
82 module_param(turbo_mode, bool, 0644);
83 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
84
85 static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index,
86 u32 *data)
87 {
88 u32 buf;
89 int ret;
90
91 BUG_ON(!dev);
92
93 ret = usbnet_read_cmd(dev, USB_VENDOR_REQUEST_READ_REGISTER,
94 USB_DIR_IN | USB_TYPE_VENDOR |
95 USB_RECIP_DEVICE,
96 0, index, &buf, 4);
97 if (unlikely(ret < 0))
98 netdev_warn(dev->net,
99 "Failed to read reg index 0x%08x: %d", index, ret);
100
101 le32_to_cpus(&buf);
102 *data = buf;
103
104 return ret;
105 }
106
107 static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index,
108 u32 data)
109 {
110 u32 buf;
111 int ret;
112
113 BUG_ON(!dev);
114
115 buf = data;
116 cpu_to_le32s(&buf);
117
118 ret = usbnet_write_cmd(dev, USB_VENDOR_REQUEST_WRITE_REGISTER,
119 USB_DIR_OUT | USB_TYPE_VENDOR |
120 USB_RECIP_DEVICE,
121 0, index, &buf, 4);
122 if (unlikely(ret < 0))
123 netdev_warn(dev->net,
124 "Failed to write reg index 0x%08x: %d", index, ret);
125
126 return ret;
127 }
128
129 static int smsc75xx_set_feature(struct usbnet *dev, u32 feature)
130 {
131 if (WARN_ON_ONCE(!dev))
132 return -EINVAL;
133
134 cpu_to_le32s(&feature);
135
136 return usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
137 USB_REQ_SET_FEATURE, USB_RECIP_DEVICE, feature, 0, NULL, 0,
138 USB_CTRL_SET_TIMEOUT);
139 }
140
141 static int smsc75xx_clear_feature(struct usbnet *dev, u32 feature)
142 {
143 if (WARN_ON_ONCE(!dev))
144 return -EINVAL;
145
146 cpu_to_le32s(&feature);
147
148 return usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
149 USB_REQ_CLEAR_FEATURE, USB_RECIP_DEVICE, feature, 0, NULL, 0,
150 USB_CTRL_SET_TIMEOUT);
151 }
152
153 /* Loop until the read is completed with timeout
154 * called with phy_mutex held */
155 static int smsc75xx_phy_wait_not_busy(struct usbnet *dev)
156 {
157 unsigned long start_time = jiffies;
158 u32 val;
159 int ret;
160
161 do {
162 ret = smsc75xx_read_reg(dev, MII_ACCESS, &val);
163 check_warn_return(ret, "Error reading MII_ACCESS");
164
165 if (!(val & MII_ACCESS_BUSY))
166 return 0;
167 } while (!time_after(jiffies, start_time + HZ));
168
169 return -EIO;
170 }
171
172 static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
173 {
174 struct usbnet *dev = netdev_priv(netdev);
175 u32 val, addr;
176 int ret;
177
178 mutex_lock(&dev->phy_mutex);
179
180 /* confirm MII not busy */
181 ret = smsc75xx_phy_wait_not_busy(dev);
182 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_read");
183
184 /* set the address, index & direction (read from PHY) */
185 phy_id &= dev->mii.phy_id_mask;
186 idx &= dev->mii.reg_num_mask;
187 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
188 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
189 | MII_ACCESS_READ | MII_ACCESS_BUSY;
190 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr);
191 check_warn_goto_done(ret, "Error writing MII_ACCESS");
192
193 ret = smsc75xx_phy_wait_not_busy(dev);
194 check_warn_goto_done(ret, "Timed out reading MII reg %02X", idx);
195
196 ret = smsc75xx_read_reg(dev, MII_DATA, &val);
197 check_warn_goto_done(ret, "Error reading MII_DATA");
198
199 ret = (u16)(val & 0xFFFF);
200
201 done:
202 mutex_unlock(&dev->phy_mutex);
203 return ret;
204 }
205
206 static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
207 int regval)
208 {
209 struct usbnet *dev = netdev_priv(netdev);
210 u32 val, addr;
211 int ret;
212
213 mutex_lock(&dev->phy_mutex);
214
215 /* confirm MII not busy */
216 ret = smsc75xx_phy_wait_not_busy(dev);
217 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_write");
218
219 val = regval;
220 ret = smsc75xx_write_reg(dev, MII_DATA, val);
221 check_warn_goto_done(ret, "Error writing MII_DATA");
222
223 /* set the address, index & direction (write to PHY) */
224 phy_id &= dev->mii.phy_id_mask;
225 idx &= dev->mii.reg_num_mask;
226 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
227 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
228 | MII_ACCESS_WRITE | MII_ACCESS_BUSY;
229 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr);
230 check_warn_goto_done(ret, "Error writing MII_ACCESS");
231
232 ret = smsc75xx_phy_wait_not_busy(dev);
233 check_warn_goto_done(ret, "Timed out writing MII reg %02X", idx);
234
235 done:
236 mutex_unlock(&dev->phy_mutex);
237 }
238
239 static int smsc75xx_wait_eeprom(struct usbnet *dev)
240 {
241 unsigned long start_time = jiffies;
242 u32 val;
243 int ret;
244
245 do {
246 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
247 check_warn_return(ret, "Error reading E2P_CMD");
248
249 if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT))
250 break;
251 udelay(40);
252 } while (!time_after(jiffies, start_time + HZ));
253
254 if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) {
255 netdev_warn(dev->net, "EEPROM read operation timeout");
256 return -EIO;
257 }
258
259 return 0;
260 }
261
262 static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev)
263 {
264 unsigned long start_time = jiffies;
265 u32 val;
266 int ret;
267
268 do {
269 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
270 check_warn_return(ret, "Error reading E2P_CMD");
271
272 if (!(val & E2P_CMD_BUSY))
273 return 0;
274
275 udelay(40);
276 } while (!time_after(jiffies, start_time + HZ));
277
278 netdev_warn(dev->net, "EEPROM is busy");
279 return -EIO;
280 }
281
282 static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
283 u8 *data)
284 {
285 u32 val;
286 int i, ret;
287
288 BUG_ON(!dev);
289 BUG_ON(!data);
290
291 ret = smsc75xx_eeprom_confirm_not_busy(dev);
292 if (ret)
293 return ret;
294
295 for (i = 0; i < length; i++) {
296 val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR);
297 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
298 check_warn_return(ret, "Error writing E2P_CMD");
299
300 ret = smsc75xx_wait_eeprom(dev);
301 if (ret < 0)
302 return ret;
303
304 ret = smsc75xx_read_reg(dev, E2P_DATA, &val);
305 check_warn_return(ret, "Error reading E2P_DATA");
306
307 data[i] = val & 0xFF;
308 offset++;
309 }
310
311 return 0;
312 }
313
314 static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
315 u8 *data)
316 {
317 u32 val;
318 int i, ret;
319
320 BUG_ON(!dev);
321 BUG_ON(!data);
322
323 ret = smsc75xx_eeprom_confirm_not_busy(dev);
324 if (ret)
325 return ret;
326
327 /* Issue write/erase enable command */
328 val = E2P_CMD_BUSY | E2P_CMD_EWEN;
329 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
330 check_warn_return(ret, "Error writing E2P_CMD");
331
332 ret = smsc75xx_wait_eeprom(dev);
333 if (ret < 0)
334 return ret;
335
336 for (i = 0; i < length; i++) {
337
338 /* Fill data register */
339 val = data[i];
340 ret = smsc75xx_write_reg(dev, E2P_DATA, val);
341 check_warn_return(ret, "Error writing E2P_DATA");
342
343 /* Send "write" command */
344 val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR);
345 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
346 check_warn_return(ret, "Error writing E2P_CMD");
347
348 ret = smsc75xx_wait_eeprom(dev);
349 if (ret < 0)
350 return ret;
351
352 offset++;
353 }
354
355 return 0;
356 }
357
358 static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev)
359 {
360 int i, ret;
361
362 for (i = 0; i < 100; i++) {
363 u32 dp_sel;
364 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
365 check_warn_return(ret, "Error reading DP_SEL");
366
367 if (dp_sel & DP_SEL_DPRDY)
368 return 0;
369
370 udelay(40);
371 }
372
373 netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out");
374
375 return -EIO;
376 }
377
378 static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr,
379 u32 length, u32 *buf)
380 {
381 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
382 u32 dp_sel;
383 int i, ret;
384
385 mutex_lock(&pdata->dataport_mutex);
386
387 ret = smsc75xx_dataport_wait_not_busy(dev);
388 check_warn_goto_done(ret, "smsc75xx_dataport_write busy on entry");
389
390 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
391 check_warn_goto_done(ret, "Error reading DP_SEL");
392
393 dp_sel &= ~DP_SEL_RSEL;
394 dp_sel |= ram_select;
395 ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel);
396 check_warn_goto_done(ret, "Error writing DP_SEL");
397
398 for (i = 0; i < length; i++) {
399 ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i);
400 check_warn_goto_done(ret, "Error writing DP_ADDR");
401
402 ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]);
403 check_warn_goto_done(ret, "Error writing DP_DATA");
404
405 ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE);
406 check_warn_goto_done(ret, "Error writing DP_CMD");
407
408 ret = smsc75xx_dataport_wait_not_busy(dev);
409 check_warn_goto_done(ret, "smsc75xx_dataport_write timeout");
410 }
411
412 done:
413 mutex_unlock(&pdata->dataport_mutex);
414 return ret;
415 }
416
417 /* returns hash bit number for given MAC address */
418 static u32 smsc75xx_hash(char addr[ETH_ALEN])
419 {
420 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
421 }
422
423 static void smsc75xx_deferred_multicast_write(struct work_struct *param)
424 {
425 struct smsc75xx_priv *pdata =
426 container_of(param, struct smsc75xx_priv, set_multicast);
427 struct usbnet *dev = pdata->dev;
428 int ret;
429
430 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x",
431 pdata->rfe_ctl);
432
433 smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN,
434 DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table);
435
436 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
437 check_warn(ret, "Error writing RFE_CRL");
438 }
439
440 static void smsc75xx_set_multicast(struct net_device *netdev)
441 {
442 struct usbnet *dev = netdev_priv(netdev);
443 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
444 unsigned long flags;
445 int i;
446
447 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
448
449 pdata->rfe_ctl &=
450 ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF);
451 pdata->rfe_ctl |= RFE_CTL_AB;
452
453 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
454 pdata->multicast_hash_table[i] = 0;
455
456 if (dev->net->flags & IFF_PROMISC) {
457 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled");
458 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU;
459 } else if (dev->net->flags & IFF_ALLMULTI) {
460 netif_dbg(dev, drv, dev->net, "receive all multicast enabled");
461 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF;
462 } else if (!netdev_mc_empty(dev->net)) {
463 struct netdev_hw_addr *ha;
464
465 netif_dbg(dev, drv, dev->net, "receive multicast hash filter");
466
467 pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF;
468
469 netdev_for_each_mc_addr(ha, netdev) {
470 u32 bitnum = smsc75xx_hash(ha->addr);
471 pdata->multicast_hash_table[bitnum / 32] |=
472 (1 << (bitnum % 32));
473 }
474 } else {
475 netif_dbg(dev, drv, dev->net, "receive own packets only");
476 pdata->rfe_ctl |= RFE_CTL_DPF;
477 }
478
479 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
480
481 /* defer register writes to a sleepable context */
482 schedule_work(&pdata->set_multicast);
483 }
484
485 static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex,
486 u16 lcladv, u16 rmtadv)
487 {
488 u32 flow = 0, fct_flow = 0;
489 int ret;
490
491 if (duplex == DUPLEX_FULL) {
492 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
493
494 if (cap & FLOW_CTRL_TX) {
495 flow = (FLOW_TX_FCEN | 0xFFFF);
496 /* set fct_flow thresholds to 20% and 80% */
497 fct_flow = (8 << 8) | 32;
498 }
499
500 if (cap & FLOW_CTRL_RX)
501 flow |= FLOW_RX_FCEN;
502
503 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s",
504 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
505 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
506 } else {
507 netif_dbg(dev, link, dev->net, "half duplex");
508 }
509
510 ret = smsc75xx_write_reg(dev, FLOW, flow);
511 check_warn_return(ret, "Error writing FLOW");
512
513 ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow);
514 check_warn_return(ret, "Error writing FCT_FLOW");
515
516 return 0;
517 }
518
519 static int smsc75xx_link_reset(struct usbnet *dev)
520 {
521 struct mii_if_info *mii = &dev->mii;
522 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
523 u16 lcladv, rmtadv;
524 int ret;
525
526 /* write to clear phy interrupt status */
527 smsc75xx_mdio_write(dev->net, mii->phy_id, PHY_INT_SRC,
528 PHY_INT_SRC_CLEAR_ALL);
529
530 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
531 check_warn_return(ret, "Error writing INT_STS");
532
533 mii_check_media(mii, 1, 1);
534 mii_ethtool_gset(&dev->mii, &ecmd);
535 lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
536 rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
537
538 netif_dbg(dev, link, dev->net, "speed: %u duplex: %d lcladv: %04x"
539 " rmtadv: %04x", ethtool_cmd_speed(&ecmd),
540 ecmd.duplex, lcladv, rmtadv);
541
542 return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
543 }
544
545 static void smsc75xx_status(struct usbnet *dev, struct urb *urb)
546 {
547 u32 intdata;
548
549 if (urb->actual_length != 4) {
550 netdev_warn(dev->net,
551 "unexpected urb length %d", urb->actual_length);
552 return;
553 }
554
555 memcpy(&intdata, urb->transfer_buffer, 4);
556 le32_to_cpus(&intdata);
557
558 netif_dbg(dev, link, dev->net, "intdata: 0x%08X", intdata);
559
560 if (intdata & INT_ENP_PHY_INT)
561 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
562 else
563 netdev_warn(dev->net,
564 "unexpected interrupt, intdata=0x%08X", intdata);
565 }
566
567 static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net)
568 {
569 return MAX_EEPROM_SIZE;
570 }
571
572 static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev,
573 struct ethtool_eeprom *ee, u8 *data)
574 {
575 struct usbnet *dev = netdev_priv(netdev);
576
577 ee->magic = LAN75XX_EEPROM_MAGIC;
578
579 return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data);
580 }
581
582 static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev,
583 struct ethtool_eeprom *ee, u8 *data)
584 {
585 struct usbnet *dev = netdev_priv(netdev);
586
587 if (ee->magic != LAN75XX_EEPROM_MAGIC) {
588 netdev_warn(dev->net,
589 "EEPROM: magic value mismatch: 0x%x", ee->magic);
590 return -EINVAL;
591 }
592
593 return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data);
594 }
595
596 static void smsc75xx_ethtool_get_wol(struct net_device *net,
597 struct ethtool_wolinfo *wolinfo)
598 {
599 struct usbnet *dev = netdev_priv(net);
600 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
601
602 wolinfo->supported = SUPPORTED_WAKE;
603 wolinfo->wolopts = pdata->wolopts;
604 }
605
606 static int smsc75xx_ethtool_set_wol(struct net_device *net,
607 struct ethtool_wolinfo *wolinfo)
608 {
609 struct usbnet *dev = netdev_priv(net);
610 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
611
612 pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
613 return 0;
614 }
615
616 static const struct ethtool_ops smsc75xx_ethtool_ops = {
617 .get_link = usbnet_get_link,
618 .nway_reset = usbnet_nway_reset,
619 .get_drvinfo = usbnet_get_drvinfo,
620 .get_msglevel = usbnet_get_msglevel,
621 .set_msglevel = usbnet_set_msglevel,
622 .get_settings = usbnet_get_settings,
623 .set_settings = usbnet_set_settings,
624 .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len,
625 .get_eeprom = smsc75xx_ethtool_get_eeprom,
626 .set_eeprom = smsc75xx_ethtool_set_eeprom,
627 .get_wol = smsc75xx_ethtool_get_wol,
628 .set_wol = smsc75xx_ethtool_set_wol,
629 };
630
631 static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
632 {
633 struct usbnet *dev = netdev_priv(netdev);
634
635 if (!netif_running(netdev))
636 return -EINVAL;
637
638 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
639 }
640
641 static void smsc75xx_init_mac_address(struct usbnet *dev)
642 {
643 /* try reading mac address from EEPROM */
644 if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
645 dev->net->dev_addr) == 0) {
646 if (is_valid_ether_addr(dev->net->dev_addr)) {
647 /* eeprom values are valid so use them */
648 netif_dbg(dev, ifup, dev->net,
649 "MAC address read from EEPROM");
650 return;
651 }
652 }
653
654 /* no eeprom, or eeprom values are invalid. generate random MAC */
655 eth_hw_addr_random(dev->net);
656 netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr");
657 }
658
659 static int smsc75xx_set_mac_address(struct usbnet *dev)
660 {
661 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
662 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
663 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
664
665 int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi);
666 check_warn_return(ret, "Failed to write RX_ADDRH: %d", ret);
667
668 ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo);
669 check_warn_return(ret, "Failed to write RX_ADDRL: %d", ret);
670
671 addr_hi |= ADDR_FILTX_FB_VALID;
672 ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi);
673 check_warn_return(ret, "Failed to write ADDR_FILTX: %d", ret);
674
675 ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo);
676 check_warn_return(ret, "Failed to write ADDR_FILTX+4: %d", ret);
677
678 return 0;
679 }
680
681 static int smsc75xx_phy_initialize(struct usbnet *dev)
682 {
683 int bmcr, ret, timeout = 0;
684
685 /* Initialize MII structure */
686 dev->mii.dev = dev->net;
687 dev->mii.mdio_read = smsc75xx_mdio_read;
688 dev->mii.mdio_write = smsc75xx_mdio_write;
689 dev->mii.phy_id_mask = 0x1f;
690 dev->mii.reg_num_mask = 0x1f;
691 dev->mii.supports_gmii = 1;
692 dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID;
693
694 /* reset phy and wait for reset to complete */
695 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
696
697 do {
698 msleep(10);
699 bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
700 check_warn_return(bmcr, "Error reading MII_BMCR");
701 timeout++;
702 } while ((bmcr & BMCR_RESET) && (timeout < 100));
703
704 if (timeout >= 100) {
705 netdev_warn(dev->net, "timeout on PHY Reset");
706 return -EIO;
707 }
708
709 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
710 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
711 ADVERTISE_PAUSE_ASYM);
712 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
713 ADVERTISE_1000FULL);
714
715 /* read and write to clear phy interrupt status */
716 ret = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
717 check_warn_return(ret, "Error reading PHY_INT_SRC");
718 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_SRC, 0xffff);
719
720 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
721 PHY_INT_MASK_DEFAULT);
722 mii_nway_restart(&dev->mii);
723
724 netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
725 return 0;
726 }
727
728 static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size)
729 {
730 int ret = 0;
731 u32 buf;
732 bool rxenabled;
733
734 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
735 check_warn_return(ret, "Failed to read MAC_RX: %d", ret);
736
737 rxenabled = ((buf & MAC_RX_RXEN) != 0);
738
739 if (rxenabled) {
740 buf &= ~MAC_RX_RXEN;
741 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
742 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
743 }
744
745 /* add 4 to size for FCS */
746 buf &= ~MAC_RX_MAX_SIZE;
747 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE);
748
749 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
750 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
751
752 if (rxenabled) {
753 buf |= MAC_RX_RXEN;
754 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
755 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
756 }
757
758 return 0;
759 }
760
761 static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu)
762 {
763 struct usbnet *dev = netdev_priv(netdev);
764
765 int ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu);
766 check_warn_return(ret, "Failed to set mac rx frame length");
767
768 return usbnet_change_mtu(netdev, new_mtu);
769 }
770
771 /* Enable or disable Rx checksum offload engine */
772 static int smsc75xx_set_features(struct net_device *netdev,
773 netdev_features_t features)
774 {
775 struct usbnet *dev = netdev_priv(netdev);
776 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
777 unsigned long flags;
778 int ret;
779
780 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
781
782 if (features & NETIF_F_RXCSUM)
783 pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM;
784 else
785 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM);
786
787 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
788 /* it's racing here! */
789
790 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
791 check_warn_return(ret, "Error writing RFE_CTL");
792
793 return 0;
794 }
795
796 static int smsc75xx_wait_ready(struct usbnet *dev)
797 {
798 int timeout = 0;
799
800 do {
801 u32 buf;
802 int ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
803 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret);
804
805 if (buf & PMT_CTL_DEV_RDY)
806 return 0;
807
808 msleep(10);
809 timeout++;
810 } while (timeout < 100);
811
812 netdev_warn(dev->net, "timeout waiting for device ready");
813 return -EIO;
814 }
815
816 static int smsc75xx_reset(struct usbnet *dev)
817 {
818 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
819 u32 buf;
820 int ret = 0, timeout;
821
822 netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset");
823
824 ret = smsc75xx_wait_ready(dev);
825 check_warn_return(ret, "device not ready in smsc75xx_reset");
826
827 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
828 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
829
830 buf |= HW_CFG_LRST;
831
832 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
833 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
834
835 timeout = 0;
836 do {
837 msleep(10);
838 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
839 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
840 timeout++;
841 } while ((buf & HW_CFG_LRST) && (timeout < 100));
842
843 if (timeout >= 100) {
844 netdev_warn(dev->net, "timeout on completion of Lite Reset");
845 return -EIO;
846 }
847
848 netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY");
849
850 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
851 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret);
852
853 buf |= PMT_CTL_PHY_RST;
854
855 ret = smsc75xx_write_reg(dev, PMT_CTL, buf);
856 check_warn_return(ret, "Failed to write PMT_CTL: %d", ret);
857
858 timeout = 0;
859 do {
860 msleep(10);
861 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
862 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret);
863 timeout++;
864 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100));
865
866 if (timeout >= 100) {
867 netdev_warn(dev->net, "timeout waiting for PHY Reset");
868 return -EIO;
869 }
870
871 netif_dbg(dev, ifup, dev->net, "PHY reset complete");
872
873 smsc75xx_init_mac_address(dev);
874
875 ret = smsc75xx_set_mac_address(dev);
876 check_warn_return(ret, "Failed to set mac address");
877
878 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM", dev->net->dev_addr);
879
880 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
881 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
882
883 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x", buf);
884
885 buf |= HW_CFG_BIR;
886
887 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
888 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
889
890 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
891 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
892
893 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after "
894 "writing HW_CFG_BIR: 0x%08x", buf);
895
896 if (!turbo_mode) {
897 buf = 0;
898 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
899 } else if (dev->udev->speed == USB_SPEED_HIGH) {
900 buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
901 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
902 } else {
903 buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
904 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
905 }
906
907 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld",
908 (ulong)dev->rx_urb_size);
909
910 ret = smsc75xx_write_reg(dev, BURST_CAP, buf);
911 check_warn_return(ret, "Failed to write BURST_CAP: %d", ret);
912
913 ret = smsc75xx_read_reg(dev, BURST_CAP, &buf);
914 check_warn_return(ret, "Failed to read BURST_CAP: %d", ret);
915
916 netif_dbg(dev, ifup, dev->net,
917 "Read Value from BURST_CAP after writing: 0x%08x", buf);
918
919 ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
920 check_warn_return(ret, "Failed to write BULK_IN_DLY: %d", ret);
921
922 ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf);
923 check_warn_return(ret, "Failed to read BULK_IN_DLY: %d", ret);
924
925 netif_dbg(dev, ifup, dev->net,
926 "Read Value from BULK_IN_DLY after writing: 0x%08x", buf);
927
928 if (turbo_mode) {
929 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
930 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
931
932 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf);
933
934 buf |= (HW_CFG_MEF | HW_CFG_BCE);
935
936 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
937 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
938
939 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
940 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
941
942 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf);
943 }
944
945 /* set FIFO sizes */
946 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
947 ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf);
948 check_warn_return(ret, "Failed to write FCT_RX_FIFO_END: %d", ret);
949
950 netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x", buf);
951
952 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
953 ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf);
954 check_warn_return(ret, "Failed to write FCT_TX_FIFO_END: %d", ret);
955
956 netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x", buf);
957
958 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
959 check_warn_return(ret, "Failed to write INT_STS: %d", ret);
960
961 ret = smsc75xx_read_reg(dev, ID_REV, &buf);
962 check_warn_return(ret, "Failed to read ID_REV: %d", ret);
963
964 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x", buf);
965
966 ret = smsc75xx_read_reg(dev, E2P_CMD, &buf);
967 check_warn_return(ret, "Failed to read E2P_CMD: %d", ret);
968
969 /* only set default GPIO/LED settings if no EEPROM is detected */
970 if (!(buf & E2P_CMD_LOADED)) {
971 ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf);
972 check_warn_return(ret, "Failed to read LED_GPIO_CFG: %d", ret);
973
974 buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL);
975 buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL;
976
977 ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf);
978 check_warn_return(ret, "Failed to write LED_GPIO_CFG: %d", ret);
979 }
980
981 ret = smsc75xx_write_reg(dev, FLOW, 0);
982 check_warn_return(ret, "Failed to write FLOW: %d", ret);
983
984 ret = smsc75xx_write_reg(dev, FCT_FLOW, 0);
985 check_warn_return(ret, "Failed to write FCT_FLOW: %d", ret);
986
987 /* Don't need rfe_ctl_lock during initialisation */
988 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
989 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret);
990
991 pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF;
992
993 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
994 check_warn_return(ret, "Failed to write RFE_CTL: %d", ret);
995
996 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
997 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret);
998
999 netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x", pdata->rfe_ctl);
1000
1001 /* Enable or disable checksum offload engines */
1002 smsc75xx_set_features(dev->net, dev->net->features);
1003
1004 smsc75xx_set_multicast(dev->net);
1005
1006 ret = smsc75xx_phy_initialize(dev);
1007 check_warn_return(ret, "Failed to initialize PHY: %d", ret);
1008
1009 ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf);
1010 check_warn_return(ret, "Failed to read INT_EP_CTL: %d", ret);
1011
1012 /* enable PHY interrupts */
1013 buf |= INT_ENP_PHY_INT;
1014
1015 ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf);
1016 check_warn_return(ret, "Failed to write INT_EP_CTL: %d", ret);
1017
1018 /* allow mac to detect speed and duplex from phy */
1019 ret = smsc75xx_read_reg(dev, MAC_CR, &buf);
1020 check_warn_return(ret, "Failed to read MAC_CR: %d", ret);
1021
1022 buf |= (MAC_CR_ADD | MAC_CR_ASD);
1023 ret = smsc75xx_write_reg(dev, MAC_CR, buf);
1024 check_warn_return(ret, "Failed to write MAC_CR: %d", ret);
1025
1026 ret = smsc75xx_read_reg(dev, MAC_TX, &buf);
1027 check_warn_return(ret, "Failed to read MAC_TX: %d", ret);
1028
1029 buf |= MAC_TX_TXEN;
1030
1031 ret = smsc75xx_write_reg(dev, MAC_TX, buf);
1032 check_warn_return(ret, "Failed to write MAC_TX: %d", ret);
1033
1034 netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x", buf);
1035
1036 ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf);
1037 check_warn_return(ret, "Failed to read FCT_TX_CTL: %d", ret);
1038
1039 buf |= FCT_TX_CTL_EN;
1040
1041 ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf);
1042 check_warn_return(ret, "Failed to write FCT_TX_CTL: %d", ret);
1043
1044 netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x", buf);
1045
1046 ret = smsc75xx_set_rx_max_frame_length(dev, 1514);
1047 check_warn_return(ret, "Failed to set max rx frame length");
1048
1049 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
1050 check_warn_return(ret, "Failed to read MAC_RX: %d", ret);
1051
1052 buf |= MAC_RX_RXEN;
1053
1054 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
1055 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
1056
1057 netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x", buf);
1058
1059 ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf);
1060 check_warn_return(ret, "Failed to read FCT_RX_CTL: %d", ret);
1061
1062 buf |= FCT_RX_CTL_EN;
1063
1064 ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf);
1065 check_warn_return(ret, "Failed to write FCT_RX_CTL: %d", ret);
1066
1067 netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x", buf);
1068
1069 netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0");
1070 return 0;
1071 }
1072
1073 static const struct net_device_ops smsc75xx_netdev_ops = {
1074 .ndo_open = usbnet_open,
1075 .ndo_stop = usbnet_stop,
1076 .ndo_start_xmit = usbnet_start_xmit,
1077 .ndo_tx_timeout = usbnet_tx_timeout,
1078 .ndo_change_mtu = smsc75xx_change_mtu,
1079 .ndo_set_mac_address = eth_mac_addr,
1080 .ndo_validate_addr = eth_validate_addr,
1081 .ndo_do_ioctl = smsc75xx_ioctl,
1082 .ndo_set_rx_mode = smsc75xx_set_multicast,
1083 .ndo_set_features = smsc75xx_set_features,
1084 };
1085
1086 static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf)
1087 {
1088 struct smsc75xx_priv *pdata = NULL;
1089 int ret;
1090
1091 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1092
1093 ret = usbnet_get_endpoints(dev, intf);
1094 check_warn_return(ret, "usbnet_get_endpoints failed: %d", ret);
1095
1096 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv),
1097 GFP_KERNEL);
1098
1099 pdata = (struct smsc75xx_priv *)(dev->data[0]);
1100 if (!pdata) {
1101 netdev_warn(dev->net, "Unable to allocate smsc75xx_priv");
1102 return -ENOMEM;
1103 }
1104
1105 pdata->dev = dev;
1106
1107 spin_lock_init(&pdata->rfe_ctl_lock);
1108 mutex_init(&pdata->dataport_mutex);
1109
1110 INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write);
1111
1112 if (DEFAULT_TX_CSUM_ENABLE) {
1113 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1114 if (DEFAULT_TSO_ENABLE)
1115 dev->net->features |= NETIF_F_SG |
1116 NETIF_F_TSO | NETIF_F_TSO6;
1117 }
1118 if (DEFAULT_RX_CSUM_ENABLE)
1119 dev->net->features |= NETIF_F_RXCSUM;
1120
1121 dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1122 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_RXCSUM;
1123
1124 /* Init all registers */
1125 ret = smsc75xx_reset(dev);
1126
1127 dev->net->netdev_ops = &smsc75xx_netdev_ops;
1128 dev->net->ethtool_ops = &smsc75xx_ethtool_ops;
1129 dev->net->flags |= IFF_MULTICAST;
1130 dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD;
1131 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
1132 return 0;
1133 }
1134
1135 static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1136 {
1137 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1138 if (pdata) {
1139 netif_dbg(dev, ifdown, dev->net, "free pdata");
1140 kfree(pdata);
1141 pdata = NULL;
1142 dev->data[0] = 0;
1143 }
1144 }
1145
1146 static int smsc75xx_suspend(struct usb_interface *intf, pm_message_t message)
1147 {
1148 struct usbnet *dev = usb_get_intfdata(intf);
1149 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1150 int ret;
1151 u32 val;
1152
1153 ret = usbnet_suspend(intf, message);
1154 check_warn_return(ret, "usbnet_suspend error");
1155
1156 /* if no wol options set, enter lowest power SUSPEND2 mode */
1157 if (!(pdata->wolopts & SUPPORTED_WAKE)) {
1158 netdev_info(dev->net, "entering SUSPEND2 mode");
1159
1160 /* disable energy detect (link up) & wake up events */
1161 ret = smsc75xx_read_reg(dev, WUCSR, &val);
1162 check_warn_return(ret, "Error reading WUCSR");
1163
1164 val &= ~(WUCSR_MPEN | WUCSR_WUEN);
1165
1166 ret = smsc75xx_write_reg(dev, WUCSR, val);
1167 check_warn_return(ret, "Error writing WUCSR");
1168
1169 ret = smsc75xx_read_reg(dev, PMT_CTL, &val);
1170 check_warn_return(ret, "Error reading PMT_CTL");
1171
1172 val &= ~(PMT_CTL_ED_EN | PMT_CTL_WOL_EN);
1173
1174 ret = smsc75xx_write_reg(dev, PMT_CTL, val);
1175 check_warn_return(ret, "Error writing PMT_CTL");
1176
1177 /* enter suspend2 mode */
1178 ret = smsc75xx_read_reg(dev, PMT_CTL, &val);
1179 check_warn_return(ret, "Error reading PMT_CTL");
1180
1181 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1182 val |= PMT_CTL_SUS_MODE_2;
1183
1184 ret = smsc75xx_write_reg(dev, PMT_CTL, val);
1185 check_warn_return(ret, "Error writing PMT_CTL");
1186
1187 return 0;
1188 }
1189
1190 if (pdata->wolopts & WAKE_MAGIC) {
1191 /* clear any pending magic packet status */
1192 ret = smsc75xx_read_reg(dev, WUCSR, &val);
1193 check_warn_return(ret, "Error reading WUCSR");
1194
1195 val |= WUCSR_MPR;
1196
1197 ret = smsc75xx_write_reg(dev, WUCSR, val);
1198 check_warn_return(ret, "Error writing WUCSR");
1199 }
1200
1201 /* enable/disable magic packup wake */
1202 ret = smsc75xx_read_reg(dev, WUCSR, &val);
1203 check_warn_return(ret, "Error reading WUCSR");
1204
1205 if (pdata->wolopts & WAKE_MAGIC) {
1206 netdev_info(dev->net, "enabling magic packet wakeup");
1207 val |= WUCSR_MPEN;
1208 } else {
1209 netdev_info(dev->net, "disabling magic packet wakeup");
1210 val &= ~WUCSR_MPEN;
1211 }
1212
1213 ret = smsc75xx_write_reg(dev, WUCSR, val);
1214 check_warn_return(ret, "Error writing WUCSR");
1215
1216 /* enable wol wakeup source */
1217 ret = smsc75xx_read_reg(dev, PMT_CTL, &val);
1218 check_warn_return(ret, "Error reading PMT_CTL");
1219
1220 val |= PMT_CTL_WOL_EN;
1221
1222 ret = smsc75xx_write_reg(dev, PMT_CTL, val);
1223 check_warn_return(ret, "Error writing PMT_CTL");
1224
1225 /* enable receiver */
1226 ret = smsc75xx_read_reg(dev, MAC_RX, &val);
1227 check_warn_return(ret, "Failed to read MAC_RX: %d", ret);
1228
1229 val |= MAC_RX_RXEN;
1230
1231 ret = smsc75xx_write_reg(dev, MAC_RX, val);
1232 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
1233
1234 /* some wol options are enabled, so enter SUSPEND0 */
1235 netdev_info(dev->net, "entering SUSPEND0 mode");
1236
1237 ret = smsc75xx_read_reg(dev, PMT_CTL, &val);
1238 check_warn_return(ret, "Error reading PMT_CTL");
1239
1240 val &= (~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST));
1241 val |= PMT_CTL_SUS_MODE_0;
1242
1243 ret = smsc75xx_write_reg(dev, PMT_CTL, val);
1244 check_warn_return(ret, "Error writing PMT_CTL");
1245
1246 /* clear wol status */
1247 val &= ~PMT_CTL_WUPS;
1248 val |= PMT_CTL_WUPS_WOL;
1249 ret = smsc75xx_write_reg(dev, PMT_CTL, val);
1250 check_warn_return(ret, "Error writing PMT_CTL");
1251
1252 /* read back PMT_CTL */
1253 ret = smsc75xx_read_reg(dev, PMT_CTL, &val);
1254 check_warn_return(ret, "Error reading PMT_CTL");
1255
1256 smsc75xx_set_feature(dev, USB_DEVICE_REMOTE_WAKEUP);
1257
1258 return 0;
1259 }
1260
1261 static int smsc75xx_resume(struct usb_interface *intf)
1262 {
1263 struct usbnet *dev = usb_get_intfdata(intf);
1264 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1265 int ret;
1266 u32 val;
1267
1268 if (pdata->wolopts & WAKE_MAGIC) {
1269 netdev_info(dev->net, "resuming from SUSPEND0");
1270
1271 smsc75xx_clear_feature(dev, USB_DEVICE_REMOTE_WAKEUP);
1272
1273 /* Disable magic packup wake */
1274 ret = smsc75xx_read_reg(dev, WUCSR, &val);
1275 check_warn_return(ret, "Error reading WUCSR");
1276
1277 val &= ~WUCSR_MPEN;
1278
1279 ret = smsc75xx_write_reg(dev, WUCSR, val);
1280 check_warn_return(ret, "Error writing WUCSR");
1281
1282 /* clear wake-up status */
1283 ret = smsc75xx_read_reg(dev, PMT_CTL, &val);
1284 check_warn_return(ret, "Error reading PMT_CTL");
1285
1286 val &= ~PMT_CTL_WOL_EN;
1287 val |= PMT_CTL_WUPS;
1288
1289 ret = smsc75xx_write_reg(dev, PMT_CTL, val);
1290 check_warn_return(ret, "Error writing PMT_CTL");
1291 } else {
1292 netdev_info(dev->net, "resuming from SUSPEND2");
1293
1294 ret = smsc75xx_read_reg(dev, PMT_CTL, &val);
1295 check_warn_return(ret, "Error reading PMT_CTL");
1296
1297 val |= PMT_CTL_PHY_PWRUP;
1298
1299 ret = smsc75xx_write_reg(dev, PMT_CTL, val);
1300 check_warn_return(ret, "Error writing PMT_CTL");
1301 }
1302
1303 ret = smsc75xx_wait_ready(dev);
1304 check_warn_return(ret, "device not ready in smsc75xx_resume");
1305
1306 return usbnet_resume(intf);
1307 }
1308
1309 static void smsc75xx_rx_csum_offload(struct usbnet *dev, struct sk_buff *skb,
1310 u32 rx_cmd_a, u32 rx_cmd_b)
1311 {
1312 if (!(dev->net->features & NETIF_F_RXCSUM) ||
1313 unlikely(rx_cmd_a & RX_CMD_A_LCSM)) {
1314 skb->ip_summed = CHECKSUM_NONE;
1315 } else {
1316 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT));
1317 skb->ip_summed = CHECKSUM_COMPLETE;
1318 }
1319 }
1320
1321 static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1322 {
1323 while (skb->len > 0) {
1324 u32 rx_cmd_a, rx_cmd_b, align_count, size;
1325 struct sk_buff *ax_skb;
1326 unsigned char *packet;
1327
1328 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
1329 le32_to_cpus(&rx_cmd_a);
1330 skb_pull(skb, 4);
1331
1332 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
1333 le32_to_cpus(&rx_cmd_b);
1334 skb_pull(skb, 4 + RXW_PADDING);
1335
1336 packet = skb->data;
1337
1338 /* get the packet length */
1339 size = (rx_cmd_a & RX_CMD_A_LEN) - RXW_PADDING;
1340 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
1341
1342 if (unlikely(rx_cmd_a & RX_CMD_A_RED)) {
1343 netif_dbg(dev, rx_err, dev->net,
1344 "Error rx_cmd_a=0x%08x", rx_cmd_a);
1345 dev->net->stats.rx_errors++;
1346 dev->net->stats.rx_dropped++;
1347
1348 if (rx_cmd_a & RX_CMD_A_FCS)
1349 dev->net->stats.rx_crc_errors++;
1350 else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT))
1351 dev->net->stats.rx_frame_errors++;
1352 } else {
1353 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1354 if (unlikely(size > (ETH_FRAME_LEN + 12))) {
1355 netif_dbg(dev, rx_err, dev->net,
1356 "size err rx_cmd_a=0x%08x", rx_cmd_a);
1357 return 0;
1358 }
1359
1360 /* last frame in this batch */
1361 if (skb->len == size) {
1362 smsc75xx_rx_csum_offload(dev, skb, rx_cmd_a,
1363 rx_cmd_b);
1364
1365 skb_trim(skb, skb->len - 4); /* remove fcs */
1366 skb->truesize = size + sizeof(struct sk_buff);
1367
1368 return 1;
1369 }
1370
1371 ax_skb = skb_clone(skb, GFP_ATOMIC);
1372 if (unlikely(!ax_skb)) {
1373 netdev_warn(dev->net, "Error allocating skb");
1374 return 0;
1375 }
1376
1377 ax_skb->len = size;
1378 ax_skb->data = packet;
1379 skb_set_tail_pointer(ax_skb, size);
1380
1381 smsc75xx_rx_csum_offload(dev, ax_skb, rx_cmd_a,
1382 rx_cmd_b);
1383
1384 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
1385 ax_skb->truesize = size + sizeof(struct sk_buff);
1386
1387 usbnet_skb_return(dev, ax_skb);
1388 }
1389
1390 skb_pull(skb, size);
1391
1392 /* padding bytes before the next frame starts */
1393 if (skb->len)
1394 skb_pull(skb, align_count);
1395 }
1396
1397 if (unlikely(skb->len < 0)) {
1398 netdev_warn(dev->net, "invalid rx length<0 %d", skb->len);
1399 return 0;
1400 }
1401
1402 return 1;
1403 }
1404
1405 static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev,
1406 struct sk_buff *skb, gfp_t flags)
1407 {
1408 u32 tx_cmd_a, tx_cmd_b;
1409
1410 skb_linearize(skb);
1411
1412 if (skb_headroom(skb) < SMSC75XX_TX_OVERHEAD) {
1413 struct sk_buff *skb2 =
1414 skb_copy_expand(skb, SMSC75XX_TX_OVERHEAD, 0, flags);
1415 dev_kfree_skb_any(skb);
1416 skb = skb2;
1417 if (!skb)
1418 return NULL;
1419 }
1420
1421 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS;
1422
1423 if (skb->ip_summed == CHECKSUM_PARTIAL)
1424 tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE;
1425
1426 if (skb_is_gso(skb)) {
1427 u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN);
1428 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS;
1429
1430 tx_cmd_a |= TX_CMD_A_LSO;
1431 } else {
1432 tx_cmd_b = 0;
1433 }
1434
1435 skb_push(skb, 4);
1436 cpu_to_le32s(&tx_cmd_b);
1437 memcpy(skb->data, &tx_cmd_b, 4);
1438
1439 skb_push(skb, 4);
1440 cpu_to_le32s(&tx_cmd_a);
1441 memcpy(skb->data, &tx_cmd_a, 4);
1442
1443 return skb;
1444 }
1445
1446 static const struct driver_info smsc75xx_info = {
1447 .description = "smsc75xx USB 2.0 Gigabit Ethernet",
1448 .bind = smsc75xx_bind,
1449 .unbind = smsc75xx_unbind,
1450 .link_reset = smsc75xx_link_reset,
1451 .reset = smsc75xx_reset,
1452 .rx_fixup = smsc75xx_rx_fixup,
1453 .tx_fixup = smsc75xx_tx_fixup,
1454 .status = smsc75xx_status,
1455 .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
1456 };
1457
1458 static const struct usb_device_id products[] = {
1459 {
1460 /* SMSC7500 USB Gigabit Ethernet Device */
1461 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500),
1462 .driver_info = (unsigned long) &smsc75xx_info,
1463 },
1464 {
1465 /* SMSC7500 USB Gigabit Ethernet Device */
1466 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505),
1467 .driver_info = (unsigned long) &smsc75xx_info,
1468 },
1469 { }, /* END */
1470 };
1471 MODULE_DEVICE_TABLE(usb, products);
1472
1473 static struct usb_driver smsc75xx_driver = {
1474 .name = SMSC_CHIPNAME,
1475 .id_table = products,
1476 .probe = usbnet_probe,
1477 .suspend = smsc75xx_suspend,
1478 .resume = smsc75xx_resume,
1479 .reset_resume = smsc75xx_resume,
1480 .disconnect = usbnet_disconnect,
1481 .disable_hub_initiated_lpm = 1,
1482 };
1483
1484 module_usb_driver(smsc75xx_driver);
1485
1486 MODULE_AUTHOR("Nancy Lin");
1487 MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>");
1488 MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices");
1489 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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