2 * Linux driver for VMware's vmxnet3 ethernet NIC.
4 * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License and no later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 * The full GNU General Public License is included in this distribution in
21 * the file called "COPYING".
23 * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
27 #include <linux/module.h>
28 #include <net/ip6_checksum.h>
30 #include "vmxnet3_int.h"
32 char vmxnet3_driver_name
[] = "vmxnet3";
33 #define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver"
37 * Last entry must be all 0s
39 static const struct pci_device_id vmxnet3_pciid_table
[] = {
40 {PCI_VDEVICE(VMWARE
, PCI_DEVICE_ID_VMWARE_VMXNET3
)},
44 MODULE_DEVICE_TABLE(pci
, vmxnet3_pciid_table
);
46 static int enable_mq
= 1;
49 vmxnet3_write_mac_addr(struct vmxnet3_adapter
*adapter
, u8
*mac
);
52 * Enable/Disable the given intr
55 vmxnet3_enable_intr(struct vmxnet3_adapter
*adapter
, unsigned intr_idx
)
57 VMXNET3_WRITE_BAR0_REG(adapter
, VMXNET3_REG_IMR
+ intr_idx
* 8, 0);
62 vmxnet3_disable_intr(struct vmxnet3_adapter
*adapter
, unsigned intr_idx
)
64 VMXNET3_WRITE_BAR0_REG(adapter
, VMXNET3_REG_IMR
+ intr_idx
* 8, 1);
69 * Enable/Disable all intrs used by the device
72 vmxnet3_enable_all_intrs(struct vmxnet3_adapter
*adapter
)
76 for (i
= 0; i
< adapter
->intr
.num_intrs
; i
++)
77 vmxnet3_enable_intr(adapter
, i
);
78 adapter
->shared
->devRead
.intrConf
.intrCtrl
&=
79 cpu_to_le32(~VMXNET3_IC_DISABLE_ALL
);
84 vmxnet3_disable_all_intrs(struct vmxnet3_adapter
*adapter
)
88 adapter
->shared
->devRead
.intrConf
.intrCtrl
|=
89 cpu_to_le32(VMXNET3_IC_DISABLE_ALL
);
90 for (i
= 0; i
< adapter
->intr
.num_intrs
; i
++)
91 vmxnet3_disable_intr(adapter
, i
);
96 vmxnet3_ack_events(struct vmxnet3_adapter
*adapter
, u32 events
)
98 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_ECR
, events
);
103 vmxnet3_tq_stopped(struct vmxnet3_tx_queue
*tq
, struct vmxnet3_adapter
*adapter
)
110 vmxnet3_tq_start(struct vmxnet3_tx_queue
*tq
, struct vmxnet3_adapter
*adapter
)
113 netif_start_subqueue(adapter
->netdev
, tq
- adapter
->tx_queue
);
118 vmxnet3_tq_wake(struct vmxnet3_tx_queue
*tq
, struct vmxnet3_adapter
*adapter
)
121 netif_wake_subqueue(adapter
->netdev
, (tq
- adapter
->tx_queue
));
126 vmxnet3_tq_stop(struct vmxnet3_tx_queue
*tq
, struct vmxnet3_adapter
*adapter
)
130 netif_stop_subqueue(adapter
->netdev
, (tq
- adapter
->tx_queue
));
135 * Check the link state. This may start or stop the tx queue.
138 vmxnet3_check_link(struct vmxnet3_adapter
*adapter
, bool affectTxQueue
)
144 spin_lock_irqsave(&adapter
->cmd_lock
, flags
);
145 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_CMD
, VMXNET3_CMD_GET_LINK
);
146 ret
= VMXNET3_READ_BAR1_REG(adapter
, VMXNET3_REG_CMD
);
147 spin_unlock_irqrestore(&adapter
->cmd_lock
, flags
);
149 adapter
->link_speed
= ret
>> 16;
150 if (ret
& 1) { /* Link is up. */
151 netdev_info(adapter
->netdev
, "NIC Link is Up %d Mbps\n",
152 adapter
->link_speed
);
153 netif_carrier_on(adapter
->netdev
);
156 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
157 vmxnet3_tq_start(&adapter
->tx_queue
[i
],
161 netdev_info(adapter
->netdev
, "NIC Link is Down\n");
162 netif_carrier_off(adapter
->netdev
);
165 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
166 vmxnet3_tq_stop(&adapter
->tx_queue
[i
], adapter
);
172 vmxnet3_process_events(struct vmxnet3_adapter
*adapter
)
176 u32 events
= le32_to_cpu(adapter
->shared
->ecr
);
180 vmxnet3_ack_events(adapter
, events
);
182 /* Check if link state has changed */
183 if (events
& VMXNET3_ECR_LINK
)
184 vmxnet3_check_link(adapter
, true);
186 /* Check if there is an error on xmit/recv queues */
187 if (events
& (VMXNET3_ECR_TQERR
| VMXNET3_ECR_RQERR
)) {
188 spin_lock_irqsave(&adapter
->cmd_lock
, flags
);
189 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_CMD
,
190 VMXNET3_CMD_GET_QUEUE_STATUS
);
191 spin_unlock_irqrestore(&adapter
->cmd_lock
, flags
);
193 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
194 if (adapter
->tqd_start
[i
].status
.stopped
)
195 dev_err(&adapter
->netdev
->dev
,
196 "%s: tq[%d] error 0x%x\n",
197 adapter
->netdev
->name
, i
, le32_to_cpu(
198 adapter
->tqd_start
[i
].status
.error
));
199 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
200 if (adapter
->rqd_start
[i
].status
.stopped
)
201 dev_err(&adapter
->netdev
->dev
,
202 "%s: rq[%d] error 0x%x\n",
203 adapter
->netdev
->name
, i
,
204 adapter
->rqd_start
[i
].status
.error
);
206 schedule_work(&adapter
->work
);
210 #ifdef __BIG_ENDIAN_BITFIELD
212 * The device expects the bitfields in shared structures to be written in
213 * little endian. When CPU is big endian, the following routines are used to
214 * correctly read and write into ABI.
215 * The general technique used here is : double word bitfields are defined in
216 * opposite order for big endian architecture. Then before reading them in
217 * driver the complete double word is translated using le32_to_cpu. Similarly
218 * After the driver writes into bitfields, cpu_to_le32 is used to translate the
219 * double words into required format.
220 * In order to avoid touching bits in shared structure more than once, temporary
221 * descriptors are used. These are passed as srcDesc to following functions.
223 static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc
*srcDesc
,
224 struct Vmxnet3_RxDesc
*dstDesc
)
226 u32
*src
= (u32
*)srcDesc
+ 2;
227 u32
*dst
= (u32
*)dstDesc
+ 2;
228 dstDesc
->addr
= le64_to_cpu(srcDesc
->addr
);
229 *dst
= le32_to_cpu(*src
);
230 dstDesc
->ext1
= le32_to_cpu(srcDesc
->ext1
);
233 static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc
*srcDesc
,
234 struct Vmxnet3_TxDesc
*dstDesc
)
237 u32
*src
= (u32
*)(srcDesc
+ 1);
238 u32
*dst
= (u32
*)(dstDesc
+ 1);
240 /* Working backwards so that the gen bit is set at the end. */
241 for (i
= 2; i
> 0; i
--) {
244 *dst
= cpu_to_le32(*src
);
249 static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc
*srcDesc
,
250 struct Vmxnet3_RxCompDesc
*dstDesc
)
253 u32
*src
= (u32
*)srcDesc
;
254 u32
*dst
= (u32
*)dstDesc
;
255 for (i
= 0; i
< sizeof(struct Vmxnet3_RxCompDesc
) / sizeof(u32
); i
++) {
256 *dst
= le32_to_cpu(*src
);
263 /* Used to read bitfield values from double words. */
264 static u32
get_bitfield32(const __le32
*bitfield
, u32 pos
, u32 size
)
266 u32 temp
= le32_to_cpu(*bitfield
);
267 u32 mask
= ((1 << size
) - 1) << pos
;
275 #endif /* __BIG_ENDIAN_BITFIELD */
277 #ifdef __BIG_ENDIAN_BITFIELD
279 # define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \
280 txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \
281 VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE)
282 # define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \
283 txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \
284 VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE)
285 # define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \
286 VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \
287 VMXNET3_TCD_GEN_SIZE)
288 # define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \
289 VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE)
290 # define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \
292 vmxnet3_RxCompToCPU((rcd), (tmp)); \
294 # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \
296 vmxnet3_RxDescToCPU((rxd), (tmp)); \
301 # define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen)
302 # define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop)
303 # define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen)
304 # define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx)
305 # define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd)
306 # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd)
308 #endif /* __BIG_ENDIAN_BITFIELD */
312 vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info
*tbi
,
313 struct pci_dev
*pdev
)
315 if (tbi
->map_type
== VMXNET3_MAP_SINGLE
)
316 dma_unmap_single(&pdev
->dev
, tbi
->dma_addr
, tbi
->len
,
318 else if (tbi
->map_type
== VMXNET3_MAP_PAGE
)
319 dma_unmap_page(&pdev
->dev
, tbi
->dma_addr
, tbi
->len
,
322 BUG_ON(tbi
->map_type
!= VMXNET3_MAP_NONE
);
324 tbi
->map_type
= VMXNET3_MAP_NONE
; /* to help debugging */
329 vmxnet3_unmap_pkt(u32 eop_idx
, struct vmxnet3_tx_queue
*tq
,
330 struct pci_dev
*pdev
, struct vmxnet3_adapter
*adapter
)
335 /* no out of order completion */
336 BUG_ON(tq
->buf_info
[eop_idx
].sop_idx
!= tq
->tx_ring
.next2comp
);
337 BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq
->tx_ring
.base
[eop_idx
].txd
)) != 1);
339 skb
= tq
->buf_info
[eop_idx
].skb
;
341 tq
->buf_info
[eop_idx
].skb
= NULL
;
343 VMXNET3_INC_RING_IDX_ONLY(eop_idx
, tq
->tx_ring
.size
);
345 while (tq
->tx_ring
.next2comp
!= eop_idx
) {
346 vmxnet3_unmap_tx_buf(tq
->buf_info
+ tq
->tx_ring
.next2comp
,
349 /* update next2comp w/o tx_lock. Since we are marking more,
350 * instead of less, tx ring entries avail, the worst case is
351 * that the tx routine incorrectly re-queues a pkt due to
352 * insufficient tx ring entries.
354 vmxnet3_cmd_ring_adv_next2comp(&tq
->tx_ring
);
358 dev_kfree_skb_any(skb
);
364 vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue
*tq
,
365 struct vmxnet3_adapter
*adapter
)
368 union Vmxnet3_GenericDesc
*gdesc
;
370 gdesc
= tq
->comp_ring
.base
+ tq
->comp_ring
.next2proc
;
371 while (VMXNET3_TCD_GET_GEN(&gdesc
->tcd
) == tq
->comp_ring
.gen
) {
372 completed
+= vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX(
373 &gdesc
->tcd
), tq
, adapter
->pdev
,
376 vmxnet3_comp_ring_adv_next2proc(&tq
->comp_ring
);
377 gdesc
= tq
->comp_ring
.base
+ tq
->comp_ring
.next2proc
;
381 spin_lock(&tq
->tx_lock
);
382 if (unlikely(vmxnet3_tq_stopped(tq
, adapter
) &&
383 vmxnet3_cmd_ring_desc_avail(&tq
->tx_ring
) >
384 VMXNET3_WAKE_QUEUE_THRESHOLD(tq
) &&
385 netif_carrier_ok(adapter
->netdev
))) {
386 vmxnet3_tq_wake(tq
, adapter
);
388 spin_unlock(&tq
->tx_lock
);
395 vmxnet3_tq_cleanup(struct vmxnet3_tx_queue
*tq
,
396 struct vmxnet3_adapter
*adapter
)
400 while (tq
->tx_ring
.next2comp
!= tq
->tx_ring
.next2fill
) {
401 struct vmxnet3_tx_buf_info
*tbi
;
403 tbi
= tq
->buf_info
+ tq
->tx_ring
.next2comp
;
405 vmxnet3_unmap_tx_buf(tbi
, adapter
->pdev
);
407 dev_kfree_skb_any(tbi
->skb
);
410 vmxnet3_cmd_ring_adv_next2comp(&tq
->tx_ring
);
413 /* sanity check, verify all buffers are indeed unmapped and freed */
414 for (i
= 0; i
< tq
->tx_ring
.size
; i
++) {
415 BUG_ON(tq
->buf_info
[i
].skb
!= NULL
||
416 tq
->buf_info
[i
].map_type
!= VMXNET3_MAP_NONE
);
419 tq
->tx_ring
.gen
= VMXNET3_INIT_GEN
;
420 tq
->tx_ring
.next2fill
= tq
->tx_ring
.next2comp
= 0;
422 tq
->comp_ring
.gen
= VMXNET3_INIT_GEN
;
423 tq
->comp_ring
.next2proc
= 0;
428 vmxnet3_tq_destroy(struct vmxnet3_tx_queue
*tq
,
429 struct vmxnet3_adapter
*adapter
)
431 if (tq
->tx_ring
.base
) {
432 dma_free_coherent(&adapter
->pdev
->dev
, tq
->tx_ring
.size
*
433 sizeof(struct Vmxnet3_TxDesc
),
434 tq
->tx_ring
.base
, tq
->tx_ring
.basePA
);
435 tq
->tx_ring
.base
= NULL
;
437 if (tq
->data_ring
.base
) {
438 dma_free_coherent(&adapter
->pdev
->dev
, tq
->data_ring
.size
*
439 sizeof(struct Vmxnet3_TxDataDesc
),
440 tq
->data_ring
.base
, tq
->data_ring
.basePA
);
441 tq
->data_ring
.base
= NULL
;
443 if (tq
->comp_ring
.base
) {
444 dma_free_coherent(&adapter
->pdev
->dev
, tq
->comp_ring
.size
*
445 sizeof(struct Vmxnet3_TxCompDesc
),
446 tq
->comp_ring
.base
, tq
->comp_ring
.basePA
);
447 tq
->comp_ring
.base
= NULL
;
450 dma_free_coherent(&adapter
->pdev
->dev
,
451 tq
->tx_ring
.size
* sizeof(tq
->buf_info
[0]),
452 tq
->buf_info
, tq
->buf_info_pa
);
458 /* Destroy all tx queues */
460 vmxnet3_tq_destroy_all(struct vmxnet3_adapter
*adapter
)
464 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
465 vmxnet3_tq_destroy(&adapter
->tx_queue
[i
], adapter
);
470 vmxnet3_tq_init(struct vmxnet3_tx_queue
*tq
,
471 struct vmxnet3_adapter
*adapter
)
475 /* reset the tx ring contents to 0 and reset the tx ring states */
476 memset(tq
->tx_ring
.base
, 0, tq
->tx_ring
.size
*
477 sizeof(struct Vmxnet3_TxDesc
));
478 tq
->tx_ring
.next2fill
= tq
->tx_ring
.next2comp
= 0;
479 tq
->tx_ring
.gen
= VMXNET3_INIT_GEN
;
481 memset(tq
->data_ring
.base
, 0, tq
->data_ring
.size
*
482 sizeof(struct Vmxnet3_TxDataDesc
));
484 /* reset the tx comp ring contents to 0 and reset comp ring states */
485 memset(tq
->comp_ring
.base
, 0, tq
->comp_ring
.size
*
486 sizeof(struct Vmxnet3_TxCompDesc
));
487 tq
->comp_ring
.next2proc
= 0;
488 tq
->comp_ring
.gen
= VMXNET3_INIT_GEN
;
490 /* reset the bookkeeping data */
491 memset(tq
->buf_info
, 0, sizeof(tq
->buf_info
[0]) * tq
->tx_ring
.size
);
492 for (i
= 0; i
< tq
->tx_ring
.size
; i
++)
493 tq
->buf_info
[i
].map_type
= VMXNET3_MAP_NONE
;
495 /* stats are not reset */
500 vmxnet3_tq_create(struct vmxnet3_tx_queue
*tq
,
501 struct vmxnet3_adapter
*adapter
)
505 BUG_ON(tq
->tx_ring
.base
|| tq
->data_ring
.base
||
506 tq
->comp_ring
.base
|| tq
->buf_info
);
508 tq
->tx_ring
.base
= dma_alloc_coherent(&adapter
->pdev
->dev
,
509 tq
->tx_ring
.size
* sizeof(struct Vmxnet3_TxDesc
),
510 &tq
->tx_ring
.basePA
, GFP_KERNEL
);
511 if (!tq
->tx_ring
.base
) {
512 netdev_err(adapter
->netdev
, "failed to allocate tx ring\n");
516 tq
->data_ring
.base
= dma_alloc_coherent(&adapter
->pdev
->dev
,
517 tq
->data_ring
.size
* sizeof(struct Vmxnet3_TxDataDesc
),
518 &tq
->data_ring
.basePA
, GFP_KERNEL
);
519 if (!tq
->data_ring
.base
) {
520 netdev_err(adapter
->netdev
, "failed to allocate data ring\n");
524 tq
->comp_ring
.base
= dma_alloc_coherent(&adapter
->pdev
->dev
,
525 tq
->comp_ring
.size
* sizeof(struct Vmxnet3_TxCompDesc
),
526 &tq
->comp_ring
.basePA
, GFP_KERNEL
);
527 if (!tq
->comp_ring
.base
) {
528 netdev_err(adapter
->netdev
, "failed to allocate tx comp ring\n");
532 sz
= tq
->tx_ring
.size
* sizeof(tq
->buf_info
[0]);
533 tq
->buf_info
= dma_zalloc_coherent(&adapter
->pdev
->dev
, sz
,
534 &tq
->buf_info_pa
, GFP_KERNEL
);
541 vmxnet3_tq_destroy(tq
, adapter
);
546 vmxnet3_tq_cleanup_all(struct vmxnet3_adapter
*adapter
)
550 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
551 vmxnet3_tq_cleanup(&adapter
->tx_queue
[i
], adapter
);
555 * starting from ring->next2fill, allocate rx buffers for the given ring
556 * of the rx queue and update the rx desc. stop after @num_to_alloc buffers
557 * are allocated or allocation fails
561 vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue
*rq
, u32 ring_idx
,
562 int num_to_alloc
, struct vmxnet3_adapter
*adapter
)
564 int num_allocated
= 0;
565 struct vmxnet3_rx_buf_info
*rbi_base
= rq
->buf_info
[ring_idx
];
566 struct vmxnet3_cmd_ring
*ring
= &rq
->rx_ring
[ring_idx
];
569 while (num_allocated
<= num_to_alloc
) {
570 struct vmxnet3_rx_buf_info
*rbi
;
571 union Vmxnet3_GenericDesc
*gd
;
573 rbi
= rbi_base
+ ring
->next2fill
;
574 gd
= ring
->base
+ ring
->next2fill
;
576 if (rbi
->buf_type
== VMXNET3_RX_BUF_SKB
) {
577 if (rbi
->skb
== NULL
) {
578 rbi
->skb
= __netdev_alloc_skb_ip_align(adapter
->netdev
,
581 if (unlikely(rbi
->skb
== NULL
)) {
582 rq
->stats
.rx_buf_alloc_failure
++;
586 rbi
->dma_addr
= dma_map_single(
588 rbi
->skb
->data
, rbi
->len
,
590 if (dma_mapping_error(&adapter
->pdev
->dev
,
592 dev_kfree_skb_any(rbi
->skb
);
593 rq
->stats
.rx_buf_alloc_failure
++;
597 /* rx buffer skipped by the device */
599 val
= VMXNET3_RXD_BTYPE_HEAD
<< VMXNET3_RXD_BTYPE_SHIFT
;
601 BUG_ON(rbi
->buf_type
!= VMXNET3_RX_BUF_PAGE
||
602 rbi
->len
!= PAGE_SIZE
);
604 if (rbi
->page
== NULL
) {
605 rbi
->page
= alloc_page(GFP_ATOMIC
);
606 if (unlikely(rbi
->page
== NULL
)) {
607 rq
->stats
.rx_buf_alloc_failure
++;
610 rbi
->dma_addr
= dma_map_page(
612 rbi
->page
, 0, PAGE_SIZE
,
614 if (dma_mapping_error(&adapter
->pdev
->dev
,
617 rq
->stats
.rx_buf_alloc_failure
++;
621 /* rx buffers skipped by the device */
623 val
= VMXNET3_RXD_BTYPE_BODY
<< VMXNET3_RXD_BTYPE_SHIFT
;
626 gd
->rxd
.addr
= cpu_to_le64(rbi
->dma_addr
);
627 gd
->dword
[2] = cpu_to_le32((!ring
->gen
<< VMXNET3_RXD_GEN_SHIFT
)
630 /* Fill the last buffer but dont mark it ready, or else the
631 * device will think that the queue is full */
632 if (num_allocated
== num_to_alloc
)
635 gd
->dword
[2] |= cpu_to_le32(ring
->gen
<< VMXNET3_RXD_GEN_SHIFT
);
637 vmxnet3_cmd_ring_adv_next2fill(ring
);
640 netdev_dbg(adapter
->netdev
,
641 "alloc_rx_buf: %d allocated, next2fill %u, next2comp %u\n",
642 num_allocated
, ring
->next2fill
, ring
->next2comp
);
644 /* so that the device can distinguish a full ring and an empty ring */
645 BUG_ON(num_allocated
!= 0 && ring
->next2fill
== ring
->next2comp
);
647 return num_allocated
;
652 vmxnet3_append_frag(struct sk_buff
*skb
, struct Vmxnet3_RxCompDesc
*rcd
,
653 struct vmxnet3_rx_buf_info
*rbi
)
655 struct skb_frag_struct
*frag
= skb_shinfo(skb
)->frags
+
656 skb_shinfo(skb
)->nr_frags
;
658 BUG_ON(skb_shinfo(skb
)->nr_frags
>= MAX_SKB_FRAGS
);
660 __skb_frag_set_page(frag
, rbi
->page
);
661 frag
->page_offset
= 0;
662 skb_frag_size_set(frag
, rcd
->len
);
663 skb
->data_len
+= rcd
->len
;
664 skb
->truesize
+= PAGE_SIZE
;
665 skb_shinfo(skb
)->nr_frags
++;
670 vmxnet3_map_pkt(struct sk_buff
*skb
, struct vmxnet3_tx_ctx
*ctx
,
671 struct vmxnet3_tx_queue
*tq
, struct pci_dev
*pdev
,
672 struct vmxnet3_adapter
*adapter
)
675 unsigned long buf_offset
;
677 union Vmxnet3_GenericDesc
*gdesc
;
678 struct vmxnet3_tx_buf_info
*tbi
= NULL
;
680 BUG_ON(ctx
->copy_size
> skb_headlen(skb
));
682 /* use the previous gen bit for the SOP desc */
683 dw2
= (tq
->tx_ring
.gen
^ 0x1) << VMXNET3_TXD_GEN_SHIFT
;
685 ctx
->sop_txd
= tq
->tx_ring
.base
+ tq
->tx_ring
.next2fill
;
686 gdesc
= ctx
->sop_txd
; /* both loops below can be skipped */
688 /* no need to map the buffer if headers are copied */
689 if (ctx
->copy_size
) {
690 ctx
->sop_txd
->txd
.addr
= cpu_to_le64(tq
->data_ring
.basePA
+
691 tq
->tx_ring
.next2fill
*
692 sizeof(struct Vmxnet3_TxDataDesc
));
693 ctx
->sop_txd
->dword
[2] = cpu_to_le32(dw2
| ctx
->copy_size
);
694 ctx
->sop_txd
->dword
[3] = 0;
696 tbi
= tq
->buf_info
+ tq
->tx_ring
.next2fill
;
697 tbi
->map_type
= VMXNET3_MAP_NONE
;
699 netdev_dbg(adapter
->netdev
,
700 "txd[%u]: 0x%Lx 0x%x 0x%x\n",
701 tq
->tx_ring
.next2fill
,
702 le64_to_cpu(ctx
->sop_txd
->txd
.addr
),
703 ctx
->sop_txd
->dword
[2], ctx
->sop_txd
->dword
[3]);
704 vmxnet3_cmd_ring_adv_next2fill(&tq
->tx_ring
);
706 /* use the right gen for non-SOP desc */
707 dw2
= tq
->tx_ring
.gen
<< VMXNET3_TXD_GEN_SHIFT
;
710 /* linear part can use multiple tx desc if it's big */
711 len
= skb_headlen(skb
) - ctx
->copy_size
;
712 buf_offset
= ctx
->copy_size
;
716 if (len
< VMXNET3_MAX_TX_BUF_SIZE
) {
720 buf_size
= VMXNET3_MAX_TX_BUF_SIZE
;
721 /* spec says that for TxDesc.len, 0 == 2^14 */
724 tbi
= tq
->buf_info
+ tq
->tx_ring
.next2fill
;
725 tbi
->map_type
= VMXNET3_MAP_SINGLE
;
726 tbi
->dma_addr
= dma_map_single(&adapter
->pdev
->dev
,
727 skb
->data
+ buf_offset
, buf_size
,
729 if (dma_mapping_error(&adapter
->pdev
->dev
, tbi
->dma_addr
))
734 gdesc
= tq
->tx_ring
.base
+ tq
->tx_ring
.next2fill
;
735 BUG_ON(gdesc
->txd
.gen
== tq
->tx_ring
.gen
);
737 gdesc
->txd
.addr
= cpu_to_le64(tbi
->dma_addr
);
738 gdesc
->dword
[2] = cpu_to_le32(dw2
);
741 netdev_dbg(adapter
->netdev
,
742 "txd[%u]: 0x%Lx 0x%x 0x%x\n",
743 tq
->tx_ring
.next2fill
, le64_to_cpu(gdesc
->txd
.addr
),
744 le32_to_cpu(gdesc
->dword
[2]), gdesc
->dword
[3]);
745 vmxnet3_cmd_ring_adv_next2fill(&tq
->tx_ring
);
746 dw2
= tq
->tx_ring
.gen
<< VMXNET3_TXD_GEN_SHIFT
;
749 buf_offset
+= buf_size
;
752 for (i
= 0; i
< skb_shinfo(skb
)->nr_frags
; i
++) {
753 const struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[i
];
757 len
= skb_frag_size(frag
);
759 tbi
= tq
->buf_info
+ tq
->tx_ring
.next2fill
;
760 if (len
< VMXNET3_MAX_TX_BUF_SIZE
) {
764 buf_size
= VMXNET3_MAX_TX_BUF_SIZE
;
765 /* spec says that for TxDesc.len, 0 == 2^14 */
767 tbi
->map_type
= VMXNET3_MAP_PAGE
;
768 tbi
->dma_addr
= skb_frag_dma_map(&adapter
->pdev
->dev
, frag
,
769 buf_offset
, buf_size
,
771 if (dma_mapping_error(&adapter
->pdev
->dev
, tbi
->dma_addr
))
776 gdesc
= tq
->tx_ring
.base
+ tq
->tx_ring
.next2fill
;
777 BUG_ON(gdesc
->txd
.gen
== tq
->tx_ring
.gen
);
779 gdesc
->txd
.addr
= cpu_to_le64(tbi
->dma_addr
);
780 gdesc
->dword
[2] = cpu_to_le32(dw2
);
783 netdev_dbg(adapter
->netdev
,
784 "txd[%u]: 0x%llx %u %u\n",
785 tq
->tx_ring
.next2fill
, le64_to_cpu(gdesc
->txd
.addr
),
786 le32_to_cpu(gdesc
->dword
[2]), gdesc
->dword
[3]);
787 vmxnet3_cmd_ring_adv_next2fill(&tq
->tx_ring
);
788 dw2
= tq
->tx_ring
.gen
<< VMXNET3_TXD_GEN_SHIFT
;
791 buf_offset
+= buf_size
;
795 ctx
->eop_txd
= gdesc
;
797 /* set the last buf_info for the pkt */
799 tbi
->sop_idx
= ctx
->sop_txd
- tq
->tx_ring
.base
;
805 /* Init all tx queues */
807 vmxnet3_tq_init_all(struct vmxnet3_adapter
*adapter
)
811 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
812 vmxnet3_tq_init(&adapter
->tx_queue
[i
], adapter
);
817 * parse relevant protocol headers:
818 * For a tso pkt, relevant headers are L2/3/4 including options
819 * For a pkt requesting csum offloading, they are L2/3 and may include L4
820 * if it's a TCP/UDP pkt
823 * -1: error happens during parsing
824 * 0: protocol headers parsed, but too big to be copied
825 * 1: protocol headers parsed and copied
828 * 1. related *ctx fields are updated.
829 * 2. ctx->copy_size is # of bytes copied
830 * 3. the portion to be copied is guaranteed to be in the linear part
834 vmxnet3_parse_hdr(struct sk_buff
*skb
, struct vmxnet3_tx_queue
*tq
,
835 struct vmxnet3_tx_ctx
*ctx
,
836 struct vmxnet3_adapter
*adapter
)
840 if (ctx
->mss
) { /* TSO */
841 ctx
->eth_ip_hdr_size
= skb_transport_offset(skb
);
842 ctx
->l4_hdr_size
= tcp_hdrlen(skb
);
843 ctx
->copy_size
= ctx
->eth_ip_hdr_size
+ ctx
->l4_hdr_size
;
845 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
846 ctx
->eth_ip_hdr_size
= skb_checksum_start_offset(skb
);
849 const struct iphdr
*iph
= ip_hdr(skb
);
851 protocol
= iph
->protocol
;
852 } else if (ctx
->ipv6
) {
853 const struct ipv6hdr
*ipv6h
= ipv6_hdr(skb
);
855 protocol
= ipv6h
->nexthdr
;
860 ctx
->l4_hdr_size
= tcp_hdrlen(skb
);
863 ctx
->l4_hdr_size
= sizeof(struct udphdr
);
866 ctx
->l4_hdr_size
= 0;
870 ctx
->copy_size
= min(ctx
->eth_ip_hdr_size
+
871 ctx
->l4_hdr_size
, skb
->len
);
873 ctx
->eth_ip_hdr_size
= 0;
874 ctx
->l4_hdr_size
= 0;
875 /* copy as much as allowed */
876 ctx
->copy_size
= min((unsigned int)VMXNET3_HDR_COPY_SIZE
880 if (skb
->len
<= VMXNET3_HDR_COPY_SIZE
)
881 ctx
->copy_size
= skb
->len
;
883 /* make sure headers are accessible directly */
884 if (unlikely(!pskb_may_pull(skb
, ctx
->copy_size
)))
888 if (unlikely(ctx
->copy_size
> VMXNET3_HDR_COPY_SIZE
)) {
889 tq
->stats
.oversized_hdr
++;
900 * copy relevant protocol headers to the transmit ring:
901 * For a tso pkt, relevant headers are L2/3/4 including options
902 * For a pkt requesting csum offloading, they are L2/3 and may include L4
903 * if it's a TCP/UDP pkt
906 * Note that this requires that vmxnet3_parse_hdr be called first to set the
907 * appropriate bits in ctx first
910 vmxnet3_copy_hdr(struct sk_buff
*skb
, struct vmxnet3_tx_queue
*tq
,
911 struct vmxnet3_tx_ctx
*ctx
,
912 struct vmxnet3_adapter
*adapter
)
914 struct Vmxnet3_TxDataDesc
*tdd
;
916 tdd
= tq
->data_ring
.base
+ tq
->tx_ring
.next2fill
;
918 memcpy(tdd
->data
, skb
->data
, ctx
->copy_size
);
919 netdev_dbg(adapter
->netdev
,
920 "copy %u bytes to dataRing[%u]\n",
921 ctx
->copy_size
, tq
->tx_ring
.next2fill
);
926 vmxnet3_prepare_tso(struct sk_buff
*skb
,
927 struct vmxnet3_tx_ctx
*ctx
)
929 struct tcphdr
*tcph
= tcp_hdr(skb
);
932 struct iphdr
*iph
= ip_hdr(skb
);
935 tcph
->check
= ~csum_tcpudp_magic(iph
->saddr
, iph
->daddr
, 0,
937 } else if (ctx
->ipv6
) {
938 struct ipv6hdr
*iph
= ipv6_hdr(skb
);
940 tcph
->check
= ~csum_ipv6_magic(&iph
->saddr
, &iph
->daddr
, 0,
945 static int txd_estimate(const struct sk_buff
*skb
)
947 int count
= VMXNET3_TXD_NEEDED(skb_headlen(skb
)) + 1;
950 for (i
= 0; i
< skb_shinfo(skb
)->nr_frags
; i
++) {
951 const struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[i
];
953 count
+= VMXNET3_TXD_NEEDED(skb_frag_size(frag
));
959 * Transmits a pkt thru a given tq
961 * NETDEV_TX_OK: descriptors are setup successfully
962 * NETDEV_TX_OK: error occurred, the pkt is dropped
963 * NETDEV_TX_BUSY: tx ring is full, queue is stopped
966 * 1. tx ring may be changed
967 * 2. tq stats may be updated accordingly
968 * 3. shared->txNumDeferred may be updated
972 vmxnet3_tq_xmit(struct sk_buff
*skb
, struct vmxnet3_tx_queue
*tq
,
973 struct vmxnet3_adapter
*adapter
, struct net_device
*netdev
)
978 struct vmxnet3_tx_ctx ctx
;
979 union Vmxnet3_GenericDesc
*gdesc
;
980 #ifdef __BIG_ENDIAN_BITFIELD
981 /* Use temporary descriptor to avoid touching bits multiple times */
982 union Vmxnet3_GenericDesc tempTxDesc
;
985 count
= txd_estimate(skb
);
987 ctx
.ipv4
= (vlan_get_protocol(skb
) == cpu_to_be16(ETH_P_IP
));
988 ctx
.ipv6
= (vlan_get_protocol(skb
) == cpu_to_be16(ETH_P_IPV6
));
990 ctx
.mss
= skb_shinfo(skb
)->gso_size
;
992 if (skb_header_cloned(skb
)) {
993 if (unlikely(pskb_expand_head(skb
, 0, 0,
995 tq
->stats
.drop_tso
++;
998 tq
->stats
.copy_skb_header
++;
1000 vmxnet3_prepare_tso(skb
, &ctx
);
1002 if (unlikely(count
> VMXNET3_MAX_TXD_PER_PKT
)) {
1004 /* non-tso pkts must not use more than
1005 * VMXNET3_MAX_TXD_PER_PKT entries
1007 if (skb_linearize(skb
) != 0) {
1008 tq
->stats
.drop_too_many_frags
++;
1011 tq
->stats
.linearized
++;
1013 /* recalculate the # of descriptors to use */
1014 count
= VMXNET3_TXD_NEEDED(skb_headlen(skb
)) + 1;
1018 ret
= vmxnet3_parse_hdr(skb
, tq
, &ctx
, adapter
);
1020 BUG_ON(ret
<= 0 && ctx
.copy_size
!= 0);
1021 /* hdrs parsed, check against other limits */
1023 if (unlikely(ctx
.eth_ip_hdr_size
+ ctx
.l4_hdr_size
>
1024 VMXNET3_MAX_TX_BUF_SIZE
)) {
1025 tq
->stats
.drop_oversized_hdr
++;
1029 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1030 if (unlikely(ctx
.eth_ip_hdr_size
+
1032 VMXNET3_MAX_CSUM_OFFSET
)) {
1033 tq
->stats
.drop_oversized_hdr
++;
1039 tq
->stats
.drop_hdr_inspect_err
++;
1043 spin_lock_irqsave(&tq
->tx_lock
, flags
);
1045 if (count
> vmxnet3_cmd_ring_desc_avail(&tq
->tx_ring
)) {
1046 tq
->stats
.tx_ring_full
++;
1047 netdev_dbg(adapter
->netdev
,
1048 "tx queue stopped on %s, next2comp %u"
1049 " next2fill %u\n", adapter
->netdev
->name
,
1050 tq
->tx_ring
.next2comp
, tq
->tx_ring
.next2fill
);
1052 vmxnet3_tq_stop(tq
, adapter
);
1053 spin_unlock_irqrestore(&tq
->tx_lock
, flags
);
1054 return NETDEV_TX_BUSY
;
1058 vmxnet3_copy_hdr(skb
, tq
, &ctx
, adapter
);
1060 /* fill tx descs related to addr & len */
1061 if (vmxnet3_map_pkt(skb
, &ctx
, tq
, adapter
->pdev
, adapter
))
1062 goto unlock_drop_pkt
;
1064 /* setup the EOP desc */
1065 ctx
.eop_txd
->dword
[3] = cpu_to_le32(VMXNET3_TXD_CQ
| VMXNET3_TXD_EOP
);
1067 /* setup the SOP desc */
1068 #ifdef __BIG_ENDIAN_BITFIELD
1069 gdesc
= &tempTxDesc
;
1070 gdesc
->dword
[2] = ctx
.sop_txd
->dword
[2];
1071 gdesc
->dword
[3] = ctx
.sop_txd
->dword
[3];
1073 gdesc
= ctx
.sop_txd
;
1076 gdesc
->txd
.hlen
= ctx
.eth_ip_hdr_size
+ ctx
.l4_hdr_size
;
1077 gdesc
->txd
.om
= VMXNET3_OM_TSO
;
1078 gdesc
->txd
.msscof
= ctx
.mss
;
1079 le32_add_cpu(&tq
->shared
->txNumDeferred
, (skb
->len
-
1080 gdesc
->txd
.hlen
+ ctx
.mss
- 1) / ctx
.mss
);
1082 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1083 gdesc
->txd
.hlen
= ctx
.eth_ip_hdr_size
;
1084 gdesc
->txd
.om
= VMXNET3_OM_CSUM
;
1085 gdesc
->txd
.msscof
= ctx
.eth_ip_hdr_size
+
1089 gdesc
->txd
.msscof
= 0;
1091 le32_add_cpu(&tq
->shared
->txNumDeferred
, 1);
1094 if (skb_vlan_tag_present(skb
)) {
1096 gdesc
->txd
.tci
= skb_vlan_tag_get(skb
);
1099 /* finally flips the GEN bit of the SOP desc. */
1100 gdesc
->dword
[2] = cpu_to_le32(le32_to_cpu(gdesc
->dword
[2]) ^
1102 #ifdef __BIG_ENDIAN_BITFIELD
1103 /* Finished updating in bitfields of Tx Desc, so write them in original
1106 vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc
*)gdesc
,
1107 (struct Vmxnet3_TxDesc
*)ctx
.sop_txd
);
1108 gdesc
= ctx
.sop_txd
;
1110 netdev_dbg(adapter
->netdev
,
1111 "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n",
1113 tq
->tx_ring
.base
), le64_to_cpu(gdesc
->txd
.addr
),
1114 le32_to_cpu(gdesc
->dword
[2]), le32_to_cpu(gdesc
->dword
[3]));
1116 spin_unlock_irqrestore(&tq
->tx_lock
, flags
);
1118 if (le32_to_cpu(tq
->shared
->txNumDeferred
) >=
1119 le32_to_cpu(tq
->shared
->txThreshold
)) {
1120 tq
->shared
->txNumDeferred
= 0;
1121 VMXNET3_WRITE_BAR0_REG(adapter
,
1122 VMXNET3_REG_TXPROD
+ tq
->qid
* 8,
1123 tq
->tx_ring
.next2fill
);
1126 return NETDEV_TX_OK
;
1129 spin_unlock_irqrestore(&tq
->tx_lock
, flags
);
1131 tq
->stats
.drop_total
++;
1132 dev_kfree_skb_any(skb
);
1133 return NETDEV_TX_OK
;
1138 vmxnet3_xmit_frame(struct sk_buff
*skb
, struct net_device
*netdev
)
1140 struct vmxnet3_adapter
*adapter
= netdev_priv(netdev
);
1142 BUG_ON(skb
->queue_mapping
> adapter
->num_tx_queues
);
1143 return vmxnet3_tq_xmit(skb
,
1144 &adapter
->tx_queue
[skb
->queue_mapping
],
1150 vmxnet3_rx_csum(struct vmxnet3_adapter
*adapter
,
1151 struct sk_buff
*skb
,
1152 union Vmxnet3_GenericDesc
*gdesc
)
1154 if (!gdesc
->rcd
.cnc
&& adapter
->netdev
->features
& NETIF_F_RXCSUM
) {
1155 /* typical case: TCP/UDP over IP and both csums are correct */
1156 if ((le32_to_cpu(gdesc
->dword
[3]) & VMXNET3_RCD_CSUM_OK
) ==
1157 VMXNET3_RCD_CSUM_OK
) {
1158 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1159 BUG_ON(!(gdesc
->rcd
.tcp
|| gdesc
->rcd
.udp
));
1160 BUG_ON(!(gdesc
->rcd
.v4
|| gdesc
->rcd
.v6
));
1161 BUG_ON(gdesc
->rcd
.frg
);
1163 if (gdesc
->rcd
.csum
) {
1164 skb
->csum
= htons(gdesc
->rcd
.csum
);
1165 skb
->ip_summed
= CHECKSUM_PARTIAL
;
1167 skb_checksum_none_assert(skb
);
1171 skb_checksum_none_assert(skb
);
1177 vmxnet3_rx_error(struct vmxnet3_rx_queue
*rq
, struct Vmxnet3_RxCompDesc
*rcd
,
1178 struct vmxnet3_rx_ctx
*ctx
, struct vmxnet3_adapter
*adapter
)
1180 rq
->stats
.drop_err
++;
1182 rq
->stats
.drop_fcs
++;
1184 rq
->stats
.drop_total
++;
1187 * We do not unmap and chain the rx buffer to the skb.
1188 * We basically pretend this buffer is not used and will be recycled
1189 * by vmxnet3_rq_alloc_rx_buf()
1193 * ctx->skb may be NULL if this is the first and the only one
1197 dev_kfree_skb_irq(ctx
->skb
);
1204 vmxnet3_get_hdr_len(struct vmxnet3_adapter
*adapter
, struct sk_buff
*skb
,
1205 union Vmxnet3_GenericDesc
*gdesc
)
1212 struct ipv6hdr
*ipv6
;
1215 BUG_ON(gdesc
->rcd
.tcp
== 0);
1217 maplen
= skb_headlen(skb
);
1218 if (unlikely(sizeof(struct iphdr
) + sizeof(struct tcphdr
) > maplen
))
1221 hdr
.eth
= eth_hdr(skb
);
1222 if (gdesc
->rcd
.v4
) {
1223 BUG_ON(hdr
.eth
->h_proto
!= htons(ETH_P_IP
));
1224 hdr
.ptr
+= sizeof(struct ethhdr
);
1225 BUG_ON(hdr
.ipv4
->protocol
!= IPPROTO_TCP
);
1226 hlen
= hdr
.ipv4
->ihl
<< 2;
1227 hdr
.ptr
+= hdr
.ipv4
->ihl
<< 2;
1228 } else if (gdesc
->rcd
.v6
) {
1229 BUG_ON(hdr
.eth
->h_proto
!= htons(ETH_P_IPV6
));
1230 hdr
.ptr
+= sizeof(struct ethhdr
);
1231 /* Use an estimated value, since we also need to handle
1234 if (hdr
.ipv6
->nexthdr
!= IPPROTO_TCP
)
1235 return sizeof(struct ipv6hdr
) + sizeof(struct tcphdr
);
1236 hlen
= sizeof(struct ipv6hdr
);
1237 hdr
.ptr
+= sizeof(struct ipv6hdr
);
1239 /* Non-IP pkt, dont estimate header length */
1243 if (hlen
+ sizeof(struct tcphdr
) > maplen
)
1246 return (hlen
+ (hdr
.tcp
->doff
<< 2));
1250 vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue
*rq
,
1251 struct vmxnet3_adapter
*adapter
, int quota
)
1253 static const u32 rxprod_reg
[2] = {
1254 VMXNET3_REG_RXPROD
, VMXNET3_REG_RXPROD2
1257 bool skip_page_frags
= false;
1258 struct Vmxnet3_RxCompDesc
*rcd
;
1259 struct vmxnet3_rx_ctx
*ctx
= &rq
->rx_ctx
;
1260 u16 segCnt
= 0, mss
= 0;
1261 #ifdef __BIG_ENDIAN_BITFIELD
1262 struct Vmxnet3_RxDesc rxCmdDesc
;
1263 struct Vmxnet3_RxCompDesc rxComp
;
1265 vmxnet3_getRxComp(rcd
, &rq
->comp_ring
.base
[rq
->comp_ring
.next2proc
].rcd
,
1267 while (rcd
->gen
== rq
->comp_ring
.gen
) {
1268 struct vmxnet3_rx_buf_info
*rbi
;
1269 struct sk_buff
*skb
, *new_skb
= NULL
;
1270 struct page
*new_page
= NULL
;
1271 dma_addr_t new_dma_addr
;
1273 struct Vmxnet3_RxDesc
*rxd
;
1275 struct vmxnet3_cmd_ring
*ring
= NULL
;
1276 if (num_pkts
>= quota
) {
1277 /* we may stop even before we see the EOP desc of
1282 BUG_ON(rcd
->rqID
!= rq
->qid
&& rcd
->rqID
!= rq
->qid2
);
1284 ring_idx
= rcd
->rqID
< adapter
->num_rx_queues
? 0 : 1;
1285 ring
= rq
->rx_ring
+ ring_idx
;
1286 vmxnet3_getRxDesc(rxd
, &rq
->rx_ring
[ring_idx
].base
[idx
].rxd
,
1288 rbi
= rq
->buf_info
[ring_idx
] + idx
;
1290 BUG_ON(rxd
->addr
!= rbi
->dma_addr
||
1291 rxd
->len
!= rbi
->len
);
1293 if (unlikely(rcd
->eop
&& rcd
->err
)) {
1294 vmxnet3_rx_error(rq
, rcd
, ctx
, adapter
);
1298 if (rcd
->sop
) { /* first buf of the pkt */
1299 BUG_ON(rxd
->btype
!= VMXNET3_RXD_BTYPE_HEAD
||
1300 rcd
->rqID
!= rq
->qid
);
1302 BUG_ON(rbi
->buf_type
!= VMXNET3_RX_BUF_SKB
);
1303 BUG_ON(ctx
->skb
!= NULL
|| rbi
->skb
== NULL
);
1305 if (unlikely(rcd
->len
== 0)) {
1306 /* Pretend the rx buffer is skipped. */
1307 BUG_ON(!(rcd
->sop
&& rcd
->eop
));
1308 netdev_dbg(adapter
->netdev
,
1309 "rxRing[%u][%u] 0 length\n",
1314 skip_page_frags
= false;
1315 ctx
->skb
= rbi
->skb
;
1316 new_skb
= netdev_alloc_skb_ip_align(adapter
->netdev
,
1318 if (new_skb
== NULL
) {
1319 /* Skb allocation failed, do not handover this
1320 * skb to stack. Reuse it. Drop the existing pkt
1322 rq
->stats
.rx_buf_alloc_failure
++;
1324 rq
->stats
.drop_total
++;
1325 skip_page_frags
= true;
1328 new_dma_addr
= dma_map_single(&adapter
->pdev
->dev
,
1329 new_skb
->data
, rbi
->len
,
1330 PCI_DMA_FROMDEVICE
);
1331 if (dma_mapping_error(&adapter
->pdev
->dev
,
1333 dev_kfree_skb(new_skb
);
1334 /* Skb allocation failed, do not handover this
1335 * skb to stack. Reuse it. Drop the existing pkt
1337 rq
->stats
.rx_buf_alloc_failure
++;
1339 rq
->stats
.drop_total
++;
1340 skip_page_frags
= true;
1344 dma_unmap_single(&adapter
->pdev
->dev
, rbi
->dma_addr
,
1346 PCI_DMA_FROMDEVICE
);
1349 if (rcd
->rssType
!= VMXNET3_RCD_RSS_TYPE_NONE
&&
1350 (adapter
->netdev
->features
& NETIF_F_RXHASH
))
1351 skb_set_hash(ctx
->skb
,
1352 le32_to_cpu(rcd
->rssHash
),
1355 skb_put(ctx
->skb
, rcd
->len
);
1357 /* Immediate refill */
1359 rbi
->dma_addr
= new_dma_addr
;
1360 rxd
->addr
= cpu_to_le64(rbi
->dma_addr
);
1361 rxd
->len
= rbi
->len
;
1362 if (adapter
->version
== 2 &&
1363 rcd
->type
== VMXNET3_CDTYPE_RXCOMP_LRO
) {
1364 struct Vmxnet3_RxCompDescExt
*rcdlro
;
1365 rcdlro
= (struct Vmxnet3_RxCompDescExt
*)rcd
;
1367 segCnt
= rcdlro
->segCnt
;
1368 BUG_ON(segCnt
<= 1);
1370 if (unlikely(segCnt
<= 1))
1376 BUG_ON(ctx
->skb
== NULL
&& !skip_page_frags
);
1378 /* non SOP buffer must be type 1 in most cases */
1379 BUG_ON(rbi
->buf_type
!= VMXNET3_RX_BUF_PAGE
);
1380 BUG_ON(rxd
->btype
!= VMXNET3_RXD_BTYPE_BODY
);
1382 /* If an sop buffer was dropped, skip all
1383 * following non-sop fragments. They will be reused.
1385 if (skip_page_frags
)
1389 new_page
= alloc_page(GFP_ATOMIC
);
1390 /* Replacement page frag could not be allocated.
1391 * Reuse this page. Drop the pkt and free the
1392 * skb which contained this page as a frag. Skip
1393 * processing all the following non-sop frags.
1395 if (unlikely(!new_page
)) {
1396 rq
->stats
.rx_buf_alloc_failure
++;
1397 dev_kfree_skb(ctx
->skb
);
1399 skip_page_frags
= true;
1402 new_dma_addr
= dma_map_page(&adapter
->pdev
->dev
,
1405 PCI_DMA_FROMDEVICE
);
1406 if (dma_mapping_error(&adapter
->pdev
->dev
,
1409 rq
->stats
.rx_buf_alloc_failure
++;
1410 dev_kfree_skb(ctx
->skb
);
1412 skip_page_frags
= true;
1416 dma_unmap_page(&adapter
->pdev
->dev
,
1417 rbi
->dma_addr
, rbi
->len
,
1418 PCI_DMA_FROMDEVICE
);
1420 vmxnet3_append_frag(ctx
->skb
, rcd
, rbi
);
1422 /* Immediate refill */
1423 rbi
->page
= new_page
;
1424 rbi
->dma_addr
= new_dma_addr
;
1425 rxd
->addr
= cpu_to_le64(rbi
->dma_addr
);
1426 rxd
->len
= rbi
->len
;
1433 u32 mtu
= adapter
->netdev
->mtu
;
1434 skb
->len
+= skb
->data_len
;
1436 vmxnet3_rx_csum(adapter
, skb
,
1437 (union Vmxnet3_GenericDesc
*)rcd
);
1438 skb
->protocol
= eth_type_trans(skb
, adapter
->netdev
);
1439 if (!rcd
->tcp
|| !adapter
->lro
)
1442 if (segCnt
!= 0 && mss
!= 0) {
1443 skb_shinfo(skb
)->gso_type
= rcd
->v4
?
1444 SKB_GSO_TCPV4
: SKB_GSO_TCPV6
;
1445 skb_shinfo(skb
)->gso_size
= mss
;
1446 skb_shinfo(skb
)->gso_segs
= segCnt
;
1447 } else if (segCnt
!= 0 || skb
->len
> mtu
) {
1450 hlen
= vmxnet3_get_hdr_len(adapter
, skb
,
1451 (union Vmxnet3_GenericDesc
*)rcd
);
1455 skb_shinfo(skb
)->gso_type
=
1456 rcd
->v4
? SKB_GSO_TCPV4
: SKB_GSO_TCPV6
;
1458 skb_shinfo(skb
)->gso_segs
= segCnt
;
1459 skb_shinfo(skb
)->gso_size
=
1460 DIV_ROUND_UP(skb
->len
-
1463 skb_shinfo(skb
)->gso_size
= mtu
- hlen
;
1467 if (unlikely(rcd
->ts
))
1468 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
), rcd
->tci
);
1470 if (adapter
->netdev
->features
& NETIF_F_LRO
)
1471 netif_receive_skb(skb
);
1473 napi_gro_receive(&rq
->napi
, skb
);
1480 /* device may have skipped some rx descs */
1481 ring
->next2comp
= idx
;
1482 num_to_alloc
= vmxnet3_cmd_ring_desc_avail(ring
);
1483 ring
= rq
->rx_ring
+ ring_idx
;
1484 while (num_to_alloc
) {
1485 vmxnet3_getRxDesc(rxd
, &ring
->base
[ring
->next2fill
].rxd
,
1489 /* Recv desc is ready to be used by the device */
1490 rxd
->gen
= ring
->gen
;
1491 vmxnet3_cmd_ring_adv_next2fill(ring
);
1495 /* if needed, update the register */
1496 if (unlikely(rq
->shared
->updateRxProd
)) {
1497 VMXNET3_WRITE_BAR0_REG(adapter
,
1498 rxprod_reg
[ring_idx
] + rq
->qid
* 8,
1502 vmxnet3_comp_ring_adv_next2proc(&rq
->comp_ring
);
1503 vmxnet3_getRxComp(rcd
,
1504 &rq
->comp_ring
.base
[rq
->comp_ring
.next2proc
].rcd
, &rxComp
);
1512 vmxnet3_rq_cleanup(struct vmxnet3_rx_queue
*rq
,
1513 struct vmxnet3_adapter
*adapter
)
1516 struct Vmxnet3_RxDesc
*rxd
;
1518 for (ring_idx
= 0; ring_idx
< 2; ring_idx
++) {
1519 for (i
= 0; i
< rq
->rx_ring
[ring_idx
].size
; i
++) {
1520 #ifdef __BIG_ENDIAN_BITFIELD
1521 struct Vmxnet3_RxDesc rxDesc
;
1523 vmxnet3_getRxDesc(rxd
,
1524 &rq
->rx_ring
[ring_idx
].base
[i
].rxd
, &rxDesc
);
1526 if (rxd
->btype
== VMXNET3_RXD_BTYPE_HEAD
&&
1527 rq
->buf_info
[ring_idx
][i
].skb
) {
1528 dma_unmap_single(&adapter
->pdev
->dev
, rxd
->addr
,
1529 rxd
->len
, PCI_DMA_FROMDEVICE
);
1530 dev_kfree_skb(rq
->buf_info
[ring_idx
][i
].skb
);
1531 rq
->buf_info
[ring_idx
][i
].skb
= NULL
;
1532 } else if (rxd
->btype
== VMXNET3_RXD_BTYPE_BODY
&&
1533 rq
->buf_info
[ring_idx
][i
].page
) {
1534 dma_unmap_page(&adapter
->pdev
->dev
, rxd
->addr
,
1535 rxd
->len
, PCI_DMA_FROMDEVICE
);
1536 put_page(rq
->buf_info
[ring_idx
][i
].page
);
1537 rq
->buf_info
[ring_idx
][i
].page
= NULL
;
1541 rq
->rx_ring
[ring_idx
].gen
= VMXNET3_INIT_GEN
;
1542 rq
->rx_ring
[ring_idx
].next2fill
=
1543 rq
->rx_ring
[ring_idx
].next2comp
= 0;
1546 rq
->comp_ring
.gen
= VMXNET3_INIT_GEN
;
1547 rq
->comp_ring
.next2proc
= 0;
1552 vmxnet3_rq_cleanup_all(struct vmxnet3_adapter
*adapter
)
1556 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1557 vmxnet3_rq_cleanup(&adapter
->rx_queue
[i
], adapter
);
1561 static void vmxnet3_rq_destroy(struct vmxnet3_rx_queue
*rq
,
1562 struct vmxnet3_adapter
*adapter
)
1567 /* all rx buffers must have already been freed */
1568 for (i
= 0; i
< 2; i
++) {
1569 if (rq
->buf_info
[i
]) {
1570 for (j
= 0; j
< rq
->rx_ring
[i
].size
; j
++)
1571 BUG_ON(rq
->buf_info
[i
][j
].page
!= NULL
);
1576 for (i
= 0; i
< 2; i
++) {
1577 if (rq
->rx_ring
[i
].base
) {
1578 dma_free_coherent(&adapter
->pdev
->dev
,
1580 * sizeof(struct Vmxnet3_RxDesc
),
1581 rq
->rx_ring
[i
].base
,
1582 rq
->rx_ring
[i
].basePA
);
1583 rq
->rx_ring
[i
].base
= NULL
;
1585 rq
->buf_info
[i
] = NULL
;
1588 if (rq
->comp_ring
.base
) {
1589 dma_free_coherent(&adapter
->pdev
->dev
, rq
->comp_ring
.size
1590 * sizeof(struct Vmxnet3_RxCompDesc
),
1591 rq
->comp_ring
.base
, rq
->comp_ring
.basePA
);
1592 rq
->comp_ring
.base
= NULL
;
1595 if (rq
->buf_info
[0]) {
1596 size_t sz
= sizeof(struct vmxnet3_rx_buf_info
) *
1597 (rq
->rx_ring
[0].size
+ rq
->rx_ring
[1].size
);
1598 dma_free_coherent(&adapter
->pdev
->dev
, sz
, rq
->buf_info
[0],
1605 vmxnet3_rq_init(struct vmxnet3_rx_queue
*rq
,
1606 struct vmxnet3_adapter
*adapter
)
1610 /* initialize buf_info */
1611 for (i
= 0; i
< rq
->rx_ring
[0].size
; i
++) {
1613 /* 1st buf for a pkt is skbuff */
1614 if (i
% adapter
->rx_buf_per_pkt
== 0) {
1615 rq
->buf_info
[0][i
].buf_type
= VMXNET3_RX_BUF_SKB
;
1616 rq
->buf_info
[0][i
].len
= adapter
->skb_buf_size
;
1617 } else { /* subsequent bufs for a pkt is frag */
1618 rq
->buf_info
[0][i
].buf_type
= VMXNET3_RX_BUF_PAGE
;
1619 rq
->buf_info
[0][i
].len
= PAGE_SIZE
;
1622 for (i
= 0; i
< rq
->rx_ring
[1].size
; i
++) {
1623 rq
->buf_info
[1][i
].buf_type
= VMXNET3_RX_BUF_PAGE
;
1624 rq
->buf_info
[1][i
].len
= PAGE_SIZE
;
1627 /* reset internal state and allocate buffers for both rings */
1628 for (i
= 0; i
< 2; i
++) {
1629 rq
->rx_ring
[i
].next2fill
= rq
->rx_ring
[i
].next2comp
= 0;
1631 memset(rq
->rx_ring
[i
].base
, 0, rq
->rx_ring
[i
].size
*
1632 sizeof(struct Vmxnet3_RxDesc
));
1633 rq
->rx_ring
[i
].gen
= VMXNET3_INIT_GEN
;
1635 if (vmxnet3_rq_alloc_rx_buf(rq
, 0, rq
->rx_ring
[0].size
- 1,
1637 /* at least has 1 rx buffer for the 1st ring */
1640 vmxnet3_rq_alloc_rx_buf(rq
, 1, rq
->rx_ring
[1].size
- 1, adapter
);
1642 /* reset the comp ring */
1643 rq
->comp_ring
.next2proc
= 0;
1644 memset(rq
->comp_ring
.base
, 0, rq
->comp_ring
.size
*
1645 sizeof(struct Vmxnet3_RxCompDesc
));
1646 rq
->comp_ring
.gen
= VMXNET3_INIT_GEN
;
1649 rq
->rx_ctx
.skb
= NULL
;
1651 /* stats are not reset */
1657 vmxnet3_rq_init_all(struct vmxnet3_adapter
*adapter
)
1661 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1662 err
= vmxnet3_rq_init(&adapter
->rx_queue
[i
], adapter
);
1663 if (unlikely(err
)) {
1664 dev_err(&adapter
->netdev
->dev
, "%s: failed to "
1665 "initialize rx queue%i\n",
1666 adapter
->netdev
->name
, i
);
1676 vmxnet3_rq_create(struct vmxnet3_rx_queue
*rq
, struct vmxnet3_adapter
*adapter
)
1680 struct vmxnet3_rx_buf_info
*bi
;
1682 for (i
= 0; i
< 2; i
++) {
1684 sz
= rq
->rx_ring
[i
].size
* sizeof(struct Vmxnet3_RxDesc
);
1685 rq
->rx_ring
[i
].base
= dma_alloc_coherent(
1686 &adapter
->pdev
->dev
, sz
,
1687 &rq
->rx_ring
[i
].basePA
,
1689 if (!rq
->rx_ring
[i
].base
) {
1690 netdev_err(adapter
->netdev
,
1691 "failed to allocate rx ring %d\n", i
);
1696 sz
= rq
->comp_ring
.size
* sizeof(struct Vmxnet3_RxCompDesc
);
1697 rq
->comp_ring
.base
= dma_alloc_coherent(&adapter
->pdev
->dev
, sz
,
1698 &rq
->comp_ring
.basePA
,
1700 if (!rq
->comp_ring
.base
) {
1701 netdev_err(adapter
->netdev
, "failed to allocate rx comp ring\n");
1705 sz
= sizeof(struct vmxnet3_rx_buf_info
) * (rq
->rx_ring
[0].size
+
1706 rq
->rx_ring
[1].size
);
1707 bi
= dma_zalloc_coherent(&adapter
->pdev
->dev
, sz
, &rq
->buf_info_pa
,
1712 rq
->buf_info
[0] = bi
;
1713 rq
->buf_info
[1] = bi
+ rq
->rx_ring
[0].size
;
1718 vmxnet3_rq_destroy(rq
, adapter
);
1724 vmxnet3_rq_create_all(struct vmxnet3_adapter
*adapter
)
1728 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1729 err
= vmxnet3_rq_create(&adapter
->rx_queue
[i
], adapter
);
1730 if (unlikely(err
)) {
1731 dev_err(&adapter
->netdev
->dev
,
1732 "%s: failed to create rx queue%i\n",
1733 adapter
->netdev
->name
, i
);
1739 vmxnet3_rq_destroy_all(adapter
);
1744 /* Multiple queue aware polling function for tx and rx */
1747 vmxnet3_do_poll(struct vmxnet3_adapter
*adapter
, int budget
)
1749 int rcd_done
= 0, i
;
1750 if (unlikely(adapter
->shared
->ecr
))
1751 vmxnet3_process_events(adapter
);
1752 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
1753 vmxnet3_tq_tx_complete(&adapter
->tx_queue
[i
], adapter
);
1755 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1756 rcd_done
+= vmxnet3_rq_rx_complete(&adapter
->rx_queue
[i
],
1763 vmxnet3_poll(struct napi_struct
*napi
, int budget
)
1765 struct vmxnet3_rx_queue
*rx_queue
= container_of(napi
,
1766 struct vmxnet3_rx_queue
, napi
);
1769 rxd_done
= vmxnet3_do_poll(rx_queue
->adapter
, budget
);
1771 if (rxd_done
< budget
) {
1772 napi_complete(napi
);
1773 vmxnet3_enable_all_intrs(rx_queue
->adapter
);
1779 * NAPI polling function for MSI-X mode with multiple Rx queues
1780 * Returns the # of the NAPI credit consumed (# of rx descriptors processed)
1784 vmxnet3_poll_rx_only(struct napi_struct
*napi
, int budget
)
1786 struct vmxnet3_rx_queue
*rq
= container_of(napi
,
1787 struct vmxnet3_rx_queue
, napi
);
1788 struct vmxnet3_adapter
*adapter
= rq
->adapter
;
1791 /* When sharing interrupt with corresponding tx queue, process
1792 * tx completions in that queue as well
1794 if (adapter
->share_intr
== VMXNET3_INTR_BUDDYSHARE
) {
1795 struct vmxnet3_tx_queue
*tq
=
1796 &adapter
->tx_queue
[rq
- adapter
->rx_queue
];
1797 vmxnet3_tq_tx_complete(tq
, adapter
);
1800 rxd_done
= vmxnet3_rq_rx_complete(rq
, adapter
, budget
);
1802 if (rxd_done
< budget
) {
1803 napi_complete(napi
);
1804 vmxnet3_enable_intr(adapter
, rq
->comp_ring
.intr_idx
);
1810 #ifdef CONFIG_PCI_MSI
1813 * Handle completion interrupts on tx queues
1814 * Returns whether or not the intr is handled
1818 vmxnet3_msix_tx(int irq
, void *data
)
1820 struct vmxnet3_tx_queue
*tq
= data
;
1821 struct vmxnet3_adapter
*adapter
= tq
->adapter
;
1823 if (adapter
->intr
.mask_mode
== VMXNET3_IMM_ACTIVE
)
1824 vmxnet3_disable_intr(adapter
, tq
->comp_ring
.intr_idx
);
1826 /* Handle the case where only one irq is allocate for all tx queues */
1827 if (adapter
->share_intr
== VMXNET3_INTR_TXSHARE
) {
1829 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1830 struct vmxnet3_tx_queue
*txq
= &adapter
->tx_queue
[i
];
1831 vmxnet3_tq_tx_complete(txq
, adapter
);
1834 vmxnet3_tq_tx_complete(tq
, adapter
);
1836 vmxnet3_enable_intr(adapter
, tq
->comp_ring
.intr_idx
);
1843 * Handle completion interrupts on rx queues. Returns whether or not the
1848 vmxnet3_msix_rx(int irq
, void *data
)
1850 struct vmxnet3_rx_queue
*rq
= data
;
1851 struct vmxnet3_adapter
*adapter
= rq
->adapter
;
1853 /* disable intr if needed */
1854 if (adapter
->intr
.mask_mode
== VMXNET3_IMM_ACTIVE
)
1855 vmxnet3_disable_intr(adapter
, rq
->comp_ring
.intr_idx
);
1856 napi_schedule(&rq
->napi
);
1862 *----------------------------------------------------------------------------
1864 * vmxnet3_msix_event --
1866 * vmxnet3 msix event intr handler
1869 * whether or not the intr is handled
1871 *----------------------------------------------------------------------------
1875 vmxnet3_msix_event(int irq
, void *data
)
1877 struct net_device
*dev
= data
;
1878 struct vmxnet3_adapter
*adapter
= netdev_priv(dev
);
1880 /* disable intr if needed */
1881 if (adapter
->intr
.mask_mode
== VMXNET3_IMM_ACTIVE
)
1882 vmxnet3_disable_intr(adapter
, adapter
->intr
.event_intr_idx
);
1884 if (adapter
->shared
->ecr
)
1885 vmxnet3_process_events(adapter
);
1887 vmxnet3_enable_intr(adapter
, adapter
->intr
.event_intr_idx
);
1892 #endif /* CONFIG_PCI_MSI */
1895 /* Interrupt handler for vmxnet3 */
1897 vmxnet3_intr(int irq
, void *dev_id
)
1899 struct net_device
*dev
= dev_id
;
1900 struct vmxnet3_adapter
*adapter
= netdev_priv(dev
);
1902 if (adapter
->intr
.type
== VMXNET3_IT_INTX
) {
1903 u32 icr
= VMXNET3_READ_BAR1_REG(adapter
, VMXNET3_REG_ICR
);
1904 if (unlikely(icr
== 0))
1910 /* disable intr if needed */
1911 if (adapter
->intr
.mask_mode
== VMXNET3_IMM_ACTIVE
)
1912 vmxnet3_disable_all_intrs(adapter
);
1914 napi_schedule(&adapter
->rx_queue
[0].napi
);
1919 #ifdef CONFIG_NET_POLL_CONTROLLER
1921 /* netpoll callback. */
1923 vmxnet3_netpoll(struct net_device
*netdev
)
1925 struct vmxnet3_adapter
*adapter
= netdev_priv(netdev
);
1927 switch (adapter
->intr
.type
) {
1928 #ifdef CONFIG_PCI_MSI
1929 case VMXNET3_IT_MSIX
: {
1931 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1932 vmxnet3_msix_rx(0, &adapter
->rx_queue
[i
]);
1936 case VMXNET3_IT_MSI
:
1938 vmxnet3_intr(0, adapter
->netdev
);
1943 #endif /* CONFIG_NET_POLL_CONTROLLER */
1946 vmxnet3_request_irqs(struct vmxnet3_adapter
*adapter
)
1948 struct vmxnet3_intr
*intr
= &adapter
->intr
;
1952 #ifdef CONFIG_PCI_MSI
1953 if (adapter
->intr
.type
== VMXNET3_IT_MSIX
) {
1954 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1955 if (adapter
->share_intr
!= VMXNET3_INTR_BUDDYSHARE
) {
1956 sprintf(adapter
->tx_queue
[i
].name
, "%s-tx-%d",
1957 adapter
->netdev
->name
, vector
);
1959 intr
->msix_entries
[vector
].vector
,
1961 adapter
->tx_queue
[i
].name
,
1962 &adapter
->tx_queue
[i
]);
1964 sprintf(adapter
->tx_queue
[i
].name
, "%s-rxtx-%d",
1965 adapter
->netdev
->name
, vector
);
1968 dev_err(&adapter
->netdev
->dev
,
1969 "Failed to request irq for MSIX, %s, "
1971 adapter
->tx_queue
[i
].name
, err
);
1975 /* Handle the case where only 1 MSIx was allocated for
1977 if (adapter
->share_intr
== VMXNET3_INTR_TXSHARE
) {
1978 for (; i
< adapter
->num_tx_queues
; i
++)
1979 adapter
->tx_queue
[i
].comp_ring
.intr_idx
1984 adapter
->tx_queue
[i
].comp_ring
.intr_idx
1988 if (adapter
->share_intr
== VMXNET3_INTR_BUDDYSHARE
)
1991 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1992 if (adapter
->share_intr
!= VMXNET3_INTR_BUDDYSHARE
)
1993 sprintf(adapter
->rx_queue
[i
].name
, "%s-rx-%d",
1994 adapter
->netdev
->name
, vector
);
1996 sprintf(adapter
->rx_queue
[i
].name
, "%s-rxtx-%d",
1997 adapter
->netdev
->name
, vector
);
1998 err
= request_irq(intr
->msix_entries
[vector
].vector
,
2000 adapter
->rx_queue
[i
].name
,
2001 &(adapter
->rx_queue
[i
]));
2003 netdev_err(adapter
->netdev
,
2004 "Failed to request irq for MSIX, "
2006 adapter
->rx_queue
[i
].name
, err
);
2010 adapter
->rx_queue
[i
].comp_ring
.intr_idx
= vector
++;
2013 sprintf(intr
->event_msi_vector_name
, "%s-event-%d",
2014 adapter
->netdev
->name
, vector
);
2015 err
= request_irq(intr
->msix_entries
[vector
].vector
,
2016 vmxnet3_msix_event
, 0,
2017 intr
->event_msi_vector_name
, adapter
->netdev
);
2018 intr
->event_intr_idx
= vector
;
2020 } else if (intr
->type
== VMXNET3_IT_MSI
) {
2021 adapter
->num_rx_queues
= 1;
2022 err
= request_irq(adapter
->pdev
->irq
, vmxnet3_intr
, 0,
2023 adapter
->netdev
->name
, adapter
->netdev
);
2026 adapter
->num_rx_queues
= 1;
2027 err
= request_irq(adapter
->pdev
->irq
, vmxnet3_intr
,
2028 IRQF_SHARED
, adapter
->netdev
->name
,
2030 #ifdef CONFIG_PCI_MSI
2033 intr
->num_intrs
= vector
+ 1;
2035 netdev_err(adapter
->netdev
,
2036 "Failed to request irq (intr type:%d), error %d\n",
2039 /* Number of rx queues will not change after this */
2040 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2041 struct vmxnet3_rx_queue
*rq
= &adapter
->rx_queue
[i
];
2043 rq
->qid2
= i
+ adapter
->num_rx_queues
;
2048 /* init our intr settings */
2049 for (i
= 0; i
< intr
->num_intrs
; i
++)
2050 intr
->mod_levels
[i
] = UPT1_IML_ADAPTIVE
;
2051 if (adapter
->intr
.type
!= VMXNET3_IT_MSIX
) {
2052 adapter
->intr
.event_intr_idx
= 0;
2053 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2054 adapter
->tx_queue
[i
].comp_ring
.intr_idx
= 0;
2055 adapter
->rx_queue
[0].comp_ring
.intr_idx
= 0;
2058 netdev_info(adapter
->netdev
,
2059 "intr type %u, mode %u, %u vectors allocated\n",
2060 intr
->type
, intr
->mask_mode
, intr
->num_intrs
);
2068 vmxnet3_free_irqs(struct vmxnet3_adapter
*adapter
)
2070 struct vmxnet3_intr
*intr
= &adapter
->intr
;
2071 BUG_ON(intr
->type
== VMXNET3_IT_AUTO
|| intr
->num_intrs
<= 0);
2073 switch (intr
->type
) {
2074 #ifdef CONFIG_PCI_MSI
2075 case VMXNET3_IT_MSIX
:
2079 if (adapter
->share_intr
!= VMXNET3_INTR_BUDDYSHARE
) {
2080 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2081 free_irq(intr
->msix_entries
[vector
++].vector
,
2082 &(adapter
->tx_queue
[i
]));
2083 if (adapter
->share_intr
== VMXNET3_INTR_TXSHARE
)
2088 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2089 free_irq(intr
->msix_entries
[vector
++].vector
,
2090 &(adapter
->rx_queue
[i
]));
2093 free_irq(intr
->msix_entries
[vector
].vector
,
2095 BUG_ON(vector
>= intr
->num_intrs
);
2099 case VMXNET3_IT_MSI
:
2100 free_irq(adapter
->pdev
->irq
, adapter
->netdev
);
2102 case VMXNET3_IT_INTX
:
2103 free_irq(adapter
->pdev
->irq
, adapter
->netdev
);
2112 vmxnet3_restore_vlan(struct vmxnet3_adapter
*adapter
)
2114 u32
*vfTable
= adapter
->shared
->devRead
.rxFilterConf
.vfTable
;
2117 /* allow untagged pkts */
2118 VMXNET3_SET_VFTABLE_ENTRY(vfTable
, 0);
2120 for_each_set_bit(vid
, adapter
->active_vlans
, VLAN_N_VID
)
2121 VMXNET3_SET_VFTABLE_ENTRY(vfTable
, vid
);
2126 vmxnet3_vlan_rx_add_vid(struct net_device
*netdev
, __be16 proto
, u16 vid
)
2128 struct vmxnet3_adapter
*adapter
= netdev_priv(netdev
);
2130 if (!(netdev
->flags
& IFF_PROMISC
)) {
2131 u32
*vfTable
= adapter
->shared
->devRead
.rxFilterConf
.vfTable
;
2132 unsigned long flags
;
2134 VMXNET3_SET_VFTABLE_ENTRY(vfTable
, vid
);
2135 spin_lock_irqsave(&adapter
->cmd_lock
, flags
);
2136 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_CMD
,
2137 VMXNET3_CMD_UPDATE_VLAN_FILTERS
);
2138 spin_unlock_irqrestore(&adapter
->cmd_lock
, flags
);
2141 set_bit(vid
, adapter
->active_vlans
);
2148 vmxnet3_vlan_rx_kill_vid(struct net_device
*netdev
, __be16 proto
, u16 vid
)
2150 struct vmxnet3_adapter
*adapter
= netdev_priv(netdev
);
2152 if (!(netdev
->flags
& IFF_PROMISC
)) {
2153 u32
*vfTable
= adapter
->shared
->devRead
.rxFilterConf
.vfTable
;
2154 unsigned long flags
;
2156 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable
, vid
);
2157 spin_lock_irqsave(&adapter
->cmd_lock
, flags
);
2158 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_CMD
,
2159 VMXNET3_CMD_UPDATE_VLAN_FILTERS
);
2160 spin_unlock_irqrestore(&adapter
->cmd_lock
, flags
);
2163 clear_bit(vid
, adapter
->active_vlans
);
2170 vmxnet3_copy_mc(struct net_device
*netdev
)
2173 u32 sz
= netdev_mc_count(netdev
) * ETH_ALEN
;
2175 /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */
2177 /* We may be called with BH disabled */
2178 buf
= kmalloc(sz
, GFP_ATOMIC
);
2180 struct netdev_hw_addr
*ha
;
2183 netdev_for_each_mc_addr(ha
, netdev
)
2184 memcpy(buf
+ i
++ * ETH_ALEN
, ha
->addr
,
2193 vmxnet3_set_mc(struct net_device
*netdev
)
2195 struct vmxnet3_adapter
*adapter
= netdev_priv(netdev
);
2196 unsigned long flags
;
2197 struct Vmxnet3_RxFilterConf
*rxConf
=
2198 &adapter
->shared
->devRead
.rxFilterConf
;
2199 u8
*new_table
= NULL
;
2200 dma_addr_t new_table_pa
= 0;
2201 u32 new_mode
= VMXNET3_RXM_UCAST
;
2203 if (netdev
->flags
& IFF_PROMISC
) {
2204 u32
*vfTable
= adapter
->shared
->devRead
.rxFilterConf
.vfTable
;
2205 memset(vfTable
, 0, VMXNET3_VFT_SIZE
* sizeof(*vfTable
));
2207 new_mode
|= VMXNET3_RXM_PROMISC
;
2209 vmxnet3_restore_vlan(adapter
);
2212 if (netdev
->flags
& IFF_BROADCAST
)
2213 new_mode
|= VMXNET3_RXM_BCAST
;
2215 if (netdev
->flags
& IFF_ALLMULTI
)
2216 new_mode
|= VMXNET3_RXM_ALL_MULTI
;
2218 if (!netdev_mc_empty(netdev
)) {
2219 new_table
= vmxnet3_copy_mc(netdev
);
2221 size_t sz
= netdev_mc_count(netdev
) * ETH_ALEN
;
2223 rxConf
->mfTableLen
= cpu_to_le16(sz
);
2224 new_table_pa
= dma_map_single(
2225 &adapter
->pdev
->dev
,
2231 if (!dma_mapping_error(&adapter
->pdev
->dev
,
2233 new_mode
|= VMXNET3_RXM_MCAST
;
2234 rxConf
->mfTablePA
= cpu_to_le64(new_table_pa
);
2237 "failed to copy mcast list, setting ALL_MULTI\n");
2238 new_mode
|= VMXNET3_RXM_ALL_MULTI
;
2242 if (!(new_mode
& VMXNET3_RXM_MCAST
)) {
2243 rxConf
->mfTableLen
= 0;
2244 rxConf
->mfTablePA
= 0;
2247 spin_lock_irqsave(&adapter
->cmd_lock
, flags
);
2248 if (new_mode
!= rxConf
->rxMode
) {
2249 rxConf
->rxMode
= cpu_to_le32(new_mode
);
2250 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_CMD
,
2251 VMXNET3_CMD_UPDATE_RX_MODE
);
2252 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_CMD
,
2253 VMXNET3_CMD_UPDATE_VLAN_FILTERS
);
2256 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_CMD
,
2257 VMXNET3_CMD_UPDATE_MAC_FILTERS
);
2258 spin_unlock_irqrestore(&adapter
->cmd_lock
, flags
);
2261 dma_unmap_single(&adapter
->pdev
->dev
, new_table_pa
,
2262 rxConf
->mfTableLen
, PCI_DMA_TODEVICE
);
2267 vmxnet3_rq_destroy_all(struct vmxnet3_adapter
*adapter
)
2271 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2272 vmxnet3_rq_destroy(&adapter
->rx_queue
[i
], adapter
);
2277 * Set up driver_shared based on settings in adapter.
2281 vmxnet3_setup_driver_shared(struct vmxnet3_adapter
*adapter
)
2283 struct Vmxnet3_DriverShared
*shared
= adapter
->shared
;
2284 struct Vmxnet3_DSDevRead
*devRead
= &shared
->devRead
;
2285 struct Vmxnet3_TxQueueConf
*tqc
;
2286 struct Vmxnet3_RxQueueConf
*rqc
;
2289 memset(shared
, 0, sizeof(*shared
));
2291 /* driver settings */
2292 shared
->magic
= cpu_to_le32(VMXNET3_REV1_MAGIC
);
2293 devRead
->misc
.driverInfo
.version
= cpu_to_le32(
2294 VMXNET3_DRIVER_VERSION_NUM
);
2295 devRead
->misc
.driverInfo
.gos
.gosBits
= (sizeof(void *) == 4 ?
2296 VMXNET3_GOS_BITS_32
: VMXNET3_GOS_BITS_64
);
2297 devRead
->misc
.driverInfo
.gos
.gosType
= VMXNET3_GOS_TYPE_LINUX
;
2298 *((u32
*)&devRead
->misc
.driverInfo
.gos
) = cpu_to_le32(
2299 *((u32
*)&devRead
->misc
.driverInfo
.gos
));
2300 devRead
->misc
.driverInfo
.vmxnet3RevSpt
= cpu_to_le32(1);
2301 devRead
->misc
.driverInfo
.uptVerSpt
= cpu_to_le32(1);
2303 devRead
->misc
.ddPA
= cpu_to_le64(adapter
->adapter_pa
);
2304 devRead
->misc
.ddLen
= cpu_to_le32(sizeof(struct vmxnet3_adapter
));
2306 /* set up feature flags */
2307 if (adapter
->netdev
->features
& NETIF_F_RXCSUM
)
2308 devRead
->misc
.uptFeatures
|= UPT1_F_RXCSUM
;
2310 if (adapter
->netdev
->features
& NETIF_F_LRO
) {
2311 devRead
->misc
.uptFeatures
|= UPT1_F_LRO
;
2312 devRead
->misc
.maxNumRxSG
= cpu_to_le16(1 + MAX_SKB_FRAGS
);
2314 if (adapter
->netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
)
2315 devRead
->misc
.uptFeatures
|= UPT1_F_RXVLAN
;
2317 devRead
->misc
.mtu
= cpu_to_le32(adapter
->netdev
->mtu
);
2318 devRead
->misc
.queueDescPA
= cpu_to_le64(adapter
->queue_desc_pa
);
2319 devRead
->misc
.queueDescLen
= cpu_to_le32(
2320 adapter
->num_tx_queues
* sizeof(struct Vmxnet3_TxQueueDesc
) +
2321 adapter
->num_rx_queues
* sizeof(struct Vmxnet3_RxQueueDesc
));
2323 /* tx queue settings */
2324 devRead
->misc
.numTxQueues
= adapter
->num_tx_queues
;
2325 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2326 struct vmxnet3_tx_queue
*tq
= &adapter
->tx_queue
[i
];
2327 BUG_ON(adapter
->tx_queue
[i
].tx_ring
.base
== NULL
);
2328 tqc
= &adapter
->tqd_start
[i
].conf
;
2329 tqc
->txRingBasePA
= cpu_to_le64(tq
->tx_ring
.basePA
);
2330 tqc
->dataRingBasePA
= cpu_to_le64(tq
->data_ring
.basePA
);
2331 tqc
->compRingBasePA
= cpu_to_le64(tq
->comp_ring
.basePA
);
2332 tqc
->ddPA
= cpu_to_le64(tq
->buf_info_pa
);
2333 tqc
->txRingSize
= cpu_to_le32(tq
->tx_ring
.size
);
2334 tqc
->dataRingSize
= cpu_to_le32(tq
->data_ring
.size
);
2335 tqc
->compRingSize
= cpu_to_le32(tq
->comp_ring
.size
);
2336 tqc
->ddLen
= cpu_to_le32(
2337 sizeof(struct vmxnet3_tx_buf_info
) *
2339 tqc
->intrIdx
= tq
->comp_ring
.intr_idx
;
2342 /* rx queue settings */
2343 devRead
->misc
.numRxQueues
= adapter
->num_rx_queues
;
2344 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2345 struct vmxnet3_rx_queue
*rq
= &adapter
->rx_queue
[i
];
2346 rqc
= &adapter
->rqd_start
[i
].conf
;
2347 rqc
->rxRingBasePA
[0] = cpu_to_le64(rq
->rx_ring
[0].basePA
);
2348 rqc
->rxRingBasePA
[1] = cpu_to_le64(rq
->rx_ring
[1].basePA
);
2349 rqc
->compRingBasePA
= cpu_to_le64(rq
->comp_ring
.basePA
);
2350 rqc
->ddPA
= cpu_to_le64(rq
->buf_info_pa
);
2351 rqc
->rxRingSize
[0] = cpu_to_le32(rq
->rx_ring
[0].size
);
2352 rqc
->rxRingSize
[1] = cpu_to_le32(rq
->rx_ring
[1].size
);
2353 rqc
->compRingSize
= cpu_to_le32(rq
->comp_ring
.size
);
2354 rqc
->ddLen
= cpu_to_le32(
2355 sizeof(struct vmxnet3_rx_buf_info
) *
2356 (rqc
->rxRingSize
[0] +
2357 rqc
->rxRingSize
[1]));
2358 rqc
->intrIdx
= rq
->comp_ring
.intr_idx
;
2362 memset(adapter
->rss_conf
, 0, sizeof(*adapter
->rss_conf
));
2365 struct UPT1_RSSConf
*rssConf
= adapter
->rss_conf
;
2367 devRead
->misc
.uptFeatures
|= UPT1_F_RSS
;
2368 devRead
->misc
.numRxQueues
= adapter
->num_rx_queues
;
2369 rssConf
->hashType
= UPT1_RSS_HASH_TYPE_TCP_IPV4
|
2370 UPT1_RSS_HASH_TYPE_IPV4
|
2371 UPT1_RSS_HASH_TYPE_TCP_IPV6
|
2372 UPT1_RSS_HASH_TYPE_IPV6
;
2373 rssConf
->hashFunc
= UPT1_RSS_HASH_FUNC_TOEPLITZ
;
2374 rssConf
->hashKeySize
= UPT1_RSS_MAX_KEY_SIZE
;
2375 rssConf
->indTableSize
= VMXNET3_RSS_IND_TABLE_SIZE
;
2376 netdev_rss_key_fill(rssConf
->hashKey
, sizeof(rssConf
->hashKey
));
2378 for (i
= 0; i
< rssConf
->indTableSize
; i
++)
2379 rssConf
->indTable
[i
] = ethtool_rxfh_indir_default(
2380 i
, adapter
->num_rx_queues
);
2382 devRead
->rssConfDesc
.confVer
= 1;
2383 devRead
->rssConfDesc
.confLen
= cpu_to_le32(sizeof(*rssConf
));
2384 devRead
->rssConfDesc
.confPA
=
2385 cpu_to_le64(adapter
->rss_conf_pa
);
2388 #endif /* VMXNET3_RSS */
2391 devRead
->intrConf
.autoMask
= adapter
->intr
.mask_mode
==
2393 devRead
->intrConf
.numIntrs
= adapter
->intr
.num_intrs
;
2394 for (i
= 0; i
< adapter
->intr
.num_intrs
; i
++)
2395 devRead
->intrConf
.modLevels
[i
] = adapter
->intr
.mod_levels
[i
];
2397 devRead
->intrConf
.eventIntrIdx
= adapter
->intr
.event_intr_idx
;
2398 devRead
->intrConf
.intrCtrl
|= cpu_to_le32(VMXNET3_IC_DISABLE_ALL
);
2400 /* rx filter settings */
2401 devRead
->rxFilterConf
.rxMode
= 0;
2402 vmxnet3_restore_vlan(adapter
);
2403 vmxnet3_write_mac_addr(adapter
, adapter
->netdev
->dev_addr
);
2405 /* the rest are already zeroed */
2410 vmxnet3_activate_dev(struct vmxnet3_adapter
*adapter
)
2414 unsigned long flags
;
2416 netdev_dbg(adapter
->netdev
, "%s: skb_buf_size %d, rx_buf_per_pkt %d,"
2417 " ring sizes %u %u %u\n", adapter
->netdev
->name
,
2418 adapter
->skb_buf_size
, adapter
->rx_buf_per_pkt
,
2419 adapter
->tx_queue
[0].tx_ring
.size
,
2420 adapter
->rx_queue
[0].rx_ring
[0].size
,
2421 adapter
->rx_queue
[0].rx_ring
[1].size
);
2423 vmxnet3_tq_init_all(adapter
);
2424 err
= vmxnet3_rq_init_all(adapter
);
2426 netdev_err(adapter
->netdev
,
2427 "Failed to init rx queue error %d\n", err
);
2431 err
= vmxnet3_request_irqs(adapter
);
2433 netdev_err(adapter
->netdev
,
2434 "Failed to setup irq for error %d\n", err
);
2438 vmxnet3_setup_driver_shared(adapter
);
2440 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_DSAL
, VMXNET3_GET_ADDR_LO(
2441 adapter
->shared_pa
));
2442 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_DSAH
, VMXNET3_GET_ADDR_HI(
2443 adapter
->shared_pa
));
2444 spin_lock_irqsave(&adapter
->cmd_lock
, flags
);
2445 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_CMD
,
2446 VMXNET3_CMD_ACTIVATE_DEV
);
2447 ret
= VMXNET3_READ_BAR1_REG(adapter
, VMXNET3_REG_CMD
);
2448 spin_unlock_irqrestore(&adapter
->cmd_lock
, flags
);
2451 netdev_err(adapter
->netdev
,
2452 "Failed to activate dev: error %u\n", ret
);
2457 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2458 VMXNET3_WRITE_BAR0_REG(adapter
,
2459 VMXNET3_REG_RXPROD
+ i
* VMXNET3_REG_ALIGN
,
2460 adapter
->rx_queue
[i
].rx_ring
[0].next2fill
);
2461 VMXNET3_WRITE_BAR0_REG(adapter
, (VMXNET3_REG_RXPROD2
+
2462 (i
* VMXNET3_REG_ALIGN
)),
2463 adapter
->rx_queue
[i
].rx_ring
[1].next2fill
);
2466 /* Apply the rx filter settins last. */
2467 vmxnet3_set_mc(adapter
->netdev
);
2470 * Check link state when first activating device. It will start the
2471 * tx queue if the link is up.
2473 vmxnet3_check_link(adapter
, true);
2474 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2475 napi_enable(&adapter
->rx_queue
[i
].napi
);
2476 vmxnet3_enable_all_intrs(adapter
);
2477 clear_bit(VMXNET3_STATE_BIT_QUIESCED
, &adapter
->state
);
2481 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_DSAL
, 0);
2482 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_DSAH
, 0);
2483 vmxnet3_free_irqs(adapter
);
2486 /* free up buffers we allocated */
2487 vmxnet3_rq_cleanup_all(adapter
);
2493 vmxnet3_reset_dev(struct vmxnet3_adapter
*adapter
)
2495 unsigned long flags
;
2496 spin_lock_irqsave(&adapter
->cmd_lock
, flags
);
2497 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_CMD
, VMXNET3_CMD_RESET_DEV
);
2498 spin_unlock_irqrestore(&adapter
->cmd_lock
, flags
);
2503 vmxnet3_quiesce_dev(struct vmxnet3_adapter
*adapter
)
2506 unsigned long flags
;
2507 if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED
, &adapter
->state
))
2511 spin_lock_irqsave(&adapter
->cmd_lock
, flags
);
2512 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_CMD
,
2513 VMXNET3_CMD_QUIESCE_DEV
);
2514 spin_unlock_irqrestore(&adapter
->cmd_lock
, flags
);
2515 vmxnet3_disable_all_intrs(adapter
);
2517 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2518 napi_disable(&adapter
->rx_queue
[i
].napi
);
2519 netif_tx_disable(adapter
->netdev
);
2520 adapter
->link_speed
= 0;
2521 netif_carrier_off(adapter
->netdev
);
2523 vmxnet3_tq_cleanup_all(adapter
);
2524 vmxnet3_rq_cleanup_all(adapter
);
2525 vmxnet3_free_irqs(adapter
);
2531 vmxnet3_write_mac_addr(struct vmxnet3_adapter
*adapter
, u8
*mac
)
2536 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_MACL
, tmp
);
2538 tmp
= (mac
[5] << 8) | mac
[4];
2539 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_MACH
, tmp
);
2544 vmxnet3_set_mac_addr(struct net_device
*netdev
, void *p
)
2546 struct sockaddr
*addr
= p
;
2547 struct vmxnet3_adapter
*adapter
= netdev_priv(netdev
);
2549 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
2550 vmxnet3_write_mac_addr(adapter
, addr
->sa_data
);
2556 /* ==================== initialization and cleanup routines ============ */
2559 vmxnet3_alloc_pci_resources(struct vmxnet3_adapter
*adapter
, bool *dma64
)
2562 unsigned long mmio_start
, mmio_len
;
2563 struct pci_dev
*pdev
= adapter
->pdev
;
2565 err
= pci_enable_device(pdev
);
2567 dev_err(&pdev
->dev
, "Failed to enable adapter: error %d\n", err
);
2571 if (pci_set_dma_mask(pdev
, DMA_BIT_MASK(64)) == 0) {
2572 if (pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(64)) != 0) {
2574 "pci_set_consistent_dma_mask failed\n");
2580 if (pci_set_dma_mask(pdev
, DMA_BIT_MASK(32)) != 0) {
2582 "pci_set_dma_mask failed\n");
2589 err
= pci_request_selected_regions(pdev
, (1 << 2) - 1,
2590 vmxnet3_driver_name
);
2593 "Failed to request region for adapter: error %d\n", err
);
2597 pci_set_master(pdev
);
2599 mmio_start
= pci_resource_start(pdev
, 0);
2600 mmio_len
= pci_resource_len(pdev
, 0);
2601 adapter
->hw_addr0
= ioremap(mmio_start
, mmio_len
);
2602 if (!adapter
->hw_addr0
) {
2603 dev_err(&pdev
->dev
, "Failed to map bar0\n");
2608 mmio_start
= pci_resource_start(pdev
, 1);
2609 mmio_len
= pci_resource_len(pdev
, 1);
2610 adapter
->hw_addr1
= ioremap(mmio_start
, mmio_len
);
2611 if (!adapter
->hw_addr1
) {
2612 dev_err(&pdev
->dev
, "Failed to map bar1\n");
2619 iounmap(adapter
->hw_addr0
);
2621 pci_release_selected_regions(pdev
, (1 << 2) - 1);
2623 pci_disable_device(pdev
);
2629 vmxnet3_free_pci_resources(struct vmxnet3_adapter
*adapter
)
2631 BUG_ON(!adapter
->pdev
);
2633 iounmap(adapter
->hw_addr0
);
2634 iounmap(adapter
->hw_addr1
);
2635 pci_release_selected_regions(adapter
->pdev
, (1 << 2) - 1);
2636 pci_disable_device(adapter
->pdev
);
2641 vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter
*adapter
)
2643 size_t sz
, i
, ring0_size
, ring1_size
, comp_size
;
2644 struct vmxnet3_rx_queue
*rq
= &adapter
->rx_queue
[0];
2647 if (adapter
->netdev
->mtu
<= VMXNET3_MAX_SKB_BUF_SIZE
-
2648 VMXNET3_MAX_ETH_HDR_SIZE
) {
2649 adapter
->skb_buf_size
= adapter
->netdev
->mtu
+
2650 VMXNET3_MAX_ETH_HDR_SIZE
;
2651 if (adapter
->skb_buf_size
< VMXNET3_MIN_T0_BUF_SIZE
)
2652 adapter
->skb_buf_size
= VMXNET3_MIN_T0_BUF_SIZE
;
2654 adapter
->rx_buf_per_pkt
= 1;
2656 adapter
->skb_buf_size
= VMXNET3_MAX_SKB_BUF_SIZE
;
2657 sz
= adapter
->netdev
->mtu
- VMXNET3_MAX_SKB_BUF_SIZE
+
2658 VMXNET3_MAX_ETH_HDR_SIZE
;
2659 adapter
->rx_buf_per_pkt
= 1 + (sz
+ PAGE_SIZE
- 1) / PAGE_SIZE
;
2663 * for simplicity, force the ring0 size to be a multiple of
2664 * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN
2666 sz
= adapter
->rx_buf_per_pkt
* VMXNET3_RING_SIZE_ALIGN
;
2667 ring0_size
= adapter
->rx_queue
[0].rx_ring
[0].size
;
2668 ring0_size
= (ring0_size
+ sz
- 1) / sz
* sz
;
2669 ring0_size
= min_t(u32
, ring0_size
, VMXNET3_RX_RING_MAX_SIZE
/
2671 ring1_size
= adapter
->rx_queue
[0].rx_ring
[1].size
;
2672 ring1_size
= (ring1_size
+ sz
- 1) / sz
* sz
;
2673 ring1_size
= min_t(u32
, ring1_size
, VMXNET3_RX_RING2_MAX_SIZE
/
2675 comp_size
= ring0_size
+ ring1_size
;
2677 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2678 rq
= &adapter
->rx_queue
[i
];
2679 rq
->rx_ring
[0].size
= ring0_size
;
2680 rq
->rx_ring
[1].size
= ring1_size
;
2681 rq
->comp_ring
.size
= comp_size
;
2687 vmxnet3_create_queues(struct vmxnet3_adapter
*adapter
, u32 tx_ring_size
,
2688 u32 rx_ring_size
, u32 rx_ring2_size
)
2692 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2693 struct vmxnet3_tx_queue
*tq
= &adapter
->tx_queue
[i
];
2694 tq
->tx_ring
.size
= tx_ring_size
;
2695 tq
->data_ring
.size
= tx_ring_size
;
2696 tq
->comp_ring
.size
= tx_ring_size
;
2697 tq
->shared
= &adapter
->tqd_start
[i
].ctrl
;
2699 tq
->adapter
= adapter
;
2701 err
= vmxnet3_tq_create(tq
, adapter
);
2703 * Too late to change num_tx_queues. We cannot do away with
2704 * lesser number of queues than what we asked for
2710 adapter
->rx_queue
[0].rx_ring
[0].size
= rx_ring_size
;
2711 adapter
->rx_queue
[0].rx_ring
[1].size
= rx_ring2_size
;
2712 vmxnet3_adjust_rx_ring_size(adapter
);
2713 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2714 struct vmxnet3_rx_queue
*rq
= &adapter
->rx_queue
[i
];
2715 /* qid and qid2 for rx queues will be assigned later when num
2716 * of rx queues is finalized after allocating intrs */
2717 rq
->shared
= &adapter
->rqd_start
[i
].ctrl
;
2718 rq
->adapter
= adapter
;
2719 err
= vmxnet3_rq_create(rq
, adapter
);
2722 netdev_err(adapter
->netdev
,
2723 "Could not allocate any rx queues. "
2727 netdev_info(adapter
->netdev
,
2728 "Number of rx queues changed "
2730 adapter
->num_rx_queues
= i
;
2738 vmxnet3_tq_destroy_all(adapter
);
2743 vmxnet3_open(struct net_device
*netdev
)
2745 struct vmxnet3_adapter
*adapter
;
2748 adapter
= netdev_priv(netdev
);
2750 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2751 spin_lock_init(&adapter
->tx_queue
[i
].tx_lock
);
2753 err
= vmxnet3_create_queues(adapter
, adapter
->tx_ring_size
,
2754 adapter
->rx_ring_size
,
2755 adapter
->rx_ring2_size
);
2759 err
= vmxnet3_activate_dev(adapter
);
2766 vmxnet3_rq_destroy_all(adapter
);
2767 vmxnet3_tq_destroy_all(adapter
);
2774 vmxnet3_close(struct net_device
*netdev
)
2776 struct vmxnet3_adapter
*adapter
= netdev_priv(netdev
);
2779 * Reset_work may be in the middle of resetting the device, wait for its
2782 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING
, &adapter
->state
))
2785 vmxnet3_quiesce_dev(adapter
);
2787 vmxnet3_rq_destroy_all(adapter
);
2788 vmxnet3_tq_destroy_all(adapter
);
2790 clear_bit(VMXNET3_STATE_BIT_RESETTING
, &adapter
->state
);
2798 vmxnet3_force_close(struct vmxnet3_adapter
*adapter
)
2803 * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise
2804 * vmxnet3_close() will deadlock.
2806 BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING
, &adapter
->state
));
2808 /* we need to enable NAPI, otherwise dev_close will deadlock */
2809 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2810 napi_enable(&adapter
->rx_queue
[i
].napi
);
2811 dev_close(adapter
->netdev
);
2816 vmxnet3_change_mtu(struct net_device
*netdev
, int new_mtu
)
2818 struct vmxnet3_adapter
*adapter
= netdev_priv(netdev
);
2821 if (new_mtu
< VMXNET3_MIN_MTU
|| new_mtu
> VMXNET3_MAX_MTU
)
2824 netdev
->mtu
= new_mtu
;
2827 * Reset_work may be in the middle of resetting the device, wait for its
2830 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING
, &adapter
->state
))
2833 if (netif_running(netdev
)) {
2834 vmxnet3_quiesce_dev(adapter
);
2835 vmxnet3_reset_dev(adapter
);
2837 /* we need to re-create the rx queue based on the new mtu */
2838 vmxnet3_rq_destroy_all(adapter
);
2839 vmxnet3_adjust_rx_ring_size(adapter
);
2840 err
= vmxnet3_rq_create_all(adapter
);
2843 "failed to re-create rx queues, "
2844 " error %d. Closing it.\n", err
);
2848 err
= vmxnet3_activate_dev(adapter
);
2851 "failed to re-activate, error %d. "
2852 "Closing it\n", err
);
2858 clear_bit(VMXNET3_STATE_BIT_RESETTING
, &adapter
->state
);
2860 vmxnet3_force_close(adapter
);
2867 vmxnet3_declare_features(struct vmxnet3_adapter
*adapter
, bool dma64
)
2869 struct net_device
*netdev
= adapter
->netdev
;
2871 netdev
->hw_features
= NETIF_F_SG
| NETIF_F_RXCSUM
|
2872 NETIF_F_HW_CSUM
| NETIF_F_HW_VLAN_CTAG_TX
|
2873 NETIF_F_HW_VLAN_CTAG_RX
| NETIF_F_TSO
| NETIF_F_TSO6
|
2876 netdev
->hw_features
|= NETIF_F_HIGHDMA
;
2877 netdev
->vlan_features
= netdev
->hw_features
&
2878 ~(NETIF_F_HW_VLAN_CTAG_TX
|
2879 NETIF_F_HW_VLAN_CTAG_RX
);
2880 netdev
->features
= netdev
->hw_features
| NETIF_F_HW_VLAN_CTAG_FILTER
;
2885 vmxnet3_read_mac_addr(struct vmxnet3_adapter
*adapter
, u8
*mac
)
2889 tmp
= VMXNET3_READ_BAR1_REG(adapter
, VMXNET3_REG_MACL
);
2892 tmp
= VMXNET3_READ_BAR1_REG(adapter
, VMXNET3_REG_MACH
);
2893 mac
[4] = tmp
& 0xff;
2894 mac
[5] = (tmp
>> 8) & 0xff;
2897 #ifdef CONFIG_PCI_MSI
2900 * Enable MSIx vectors.
2902 * VMXNET3_LINUX_MIN_MSIX_VECT when only minimum number of vectors required
2904 * number of vectors which were enabled otherwise (this number is greater
2905 * than VMXNET3_LINUX_MIN_MSIX_VECT)
2909 vmxnet3_acquire_msix_vectors(struct vmxnet3_adapter
*adapter
, int nvec
)
2911 int ret
= pci_enable_msix_range(adapter
->pdev
,
2912 adapter
->intr
.msix_entries
, nvec
, nvec
);
2914 if (ret
== -ENOSPC
&& nvec
> VMXNET3_LINUX_MIN_MSIX_VECT
) {
2915 dev_err(&adapter
->netdev
->dev
,
2916 "Failed to enable %d MSI-X, trying %d\n",
2917 nvec
, VMXNET3_LINUX_MIN_MSIX_VECT
);
2919 ret
= pci_enable_msix_range(adapter
->pdev
,
2920 adapter
->intr
.msix_entries
,
2921 VMXNET3_LINUX_MIN_MSIX_VECT
,
2922 VMXNET3_LINUX_MIN_MSIX_VECT
);
2926 dev_err(&adapter
->netdev
->dev
,
2927 "Failed to enable MSI-X, error: %d\n", ret
);
2934 #endif /* CONFIG_PCI_MSI */
2937 vmxnet3_alloc_intr_resources(struct vmxnet3_adapter
*adapter
)
2940 unsigned long flags
;
2943 spin_lock_irqsave(&adapter
->cmd_lock
, flags
);
2944 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_CMD
,
2945 VMXNET3_CMD_GET_CONF_INTR
);
2946 cfg
= VMXNET3_READ_BAR1_REG(adapter
, VMXNET3_REG_CMD
);
2947 spin_unlock_irqrestore(&adapter
->cmd_lock
, flags
);
2948 adapter
->intr
.type
= cfg
& 0x3;
2949 adapter
->intr
.mask_mode
= (cfg
>> 2) & 0x3;
2951 if (adapter
->intr
.type
== VMXNET3_IT_AUTO
) {
2952 adapter
->intr
.type
= VMXNET3_IT_MSIX
;
2955 #ifdef CONFIG_PCI_MSI
2956 if (adapter
->intr
.type
== VMXNET3_IT_MSIX
) {
2959 nvec
= adapter
->share_intr
== VMXNET3_INTR_TXSHARE
?
2960 1 : adapter
->num_tx_queues
;
2961 nvec
+= adapter
->share_intr
== VMXNET3_INTR_BUDDYSHARE
?
2962 0 : adapter
->num_rx_queues
;
2963 nvec
+= 1; /* for link event */
2964 nvec
= nvec
> VMXNET3_LINUX_MIN_MSIX_VECT
?
2965 nvec
: VMXNET3_LINUX_MIN_MSIX_VECT
;
2967 for (i
= 0; i
< nvec
; i
++)
2968 adapter
->intr
.msix_entries
[i
].entry
= i
;
2970 nvec
= vmxnet3_acquire_msix_vectors(adapter
, nvec
);
2974 /* If we cannot allocate one MSIx vector per queue
2975 * then limit the number of rx queues to 1
2977 if (nvec
== VMXNET3_LINUX_MIN_MSIX_VECT
) {
2978 if (adapter
->share_intr
!= VMXNET3_INTR_BUDDYSHARE
2979 || adapter
->num_rx_queues
!= 1) {
2980 adapter
->share_intr
= VMXNET3_INTR_TXSHARE
;
2981 netdev_err(adapter
->netdev
,
2982 "Number of rx queues : 1\n");
2983 adapter
->num_rx_queues
= 1;
2987 adapter
->intr
.num_intrs
= nvec
;
2991 /* If we cannot allocate MSIx vectors use only one rx queue */
2992 dev_info(&adapter
->pdev
->dev
,
2993 "Failed to enable MSI-X, error %d. "
2994 "Limiting #rx queues to 1, try MSI.\n", nvec
);
2996 adapter
->intr
.type
= VMXNET3_IT_MSI
;
2999 if (adapter
->intr
.type
== VMXNET3_IT_MSI
) {
3000 if (!pci_enable_msi(adapter
->pdev
)) {
3001 adapter
->num_rx_queues
= 1;
3002 adapter
->intr
.num_intrs
= 1;
3006 #endif /* CONFIG_PCI_MSI */
3008 adapter
->num_rx_queues
= 1;
3009 dev_info(&adapter
->netdev
->dev
,
3010 "Using INTx interrupt, #Rx queues: 1.\n");
3011 adapter
->intr
.type
= VMXNET3_IT_INTX
;
3013 /* INT-X related setting */
3014 adapter
->intr
.num_intrs
= 1;
3019 vmxnet3_free_intr_resources(struct vmxnet3_adapter
*adapter
)
3021 if (adapter
->intr
.type
== VMXNET3_IT_MSIX
)
3022 pci_disable_msix(adapter
->pdev
);
3023 else if (adapter
->intr
.type
== VMXNET3_IT_MSI
)
3024 pci_disable_msi(adapter
->pdev
);
3026 BUG_ON(adapter
->intr
.type
!= VMXNET3_IT_INTX
);
3031 vmxnet3_tx_timeout(struct net_device
*netdev
)
3033 struct vmxnet3_adapter
*adapter
= netdev_priv(netdev
);
3034 adapter
->tx_timeout_count
++;
3036 netdev_err(adapter
->netdev
, "tx hang\n");
3037 schedule_work(&adapter
->work
);
3038 netif_wake_queue(adapter
->netdev
);
3043 vmxnet3_reset_work(struct work_struct
*data
)
3045 struct vmxnet3_adapter
*adapter
;
3047 adapter
= container_of(data
, struct vmxnet3_adapter
, work
);
3049 /* if another thread is resetting the device, no need to proceed */
3050 if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING
, &adapter
->state
))
3053 /* if the device is closed, we must leave it alone */
3055 if (netif_running(adapter
->netdev
)) {
3056 netdev_notice(adapter
->netdev
, "resetting\n");
3057 vmxnet3_quiesce_dev(adapter
);
3058 vmxnet3_reset_dev(adapter
);
3059 vmxnet3_activate_dev(adapter
);
3061 netdev_info(adapter
->netdev
, "already closed\n");
3065 clear_bit(VMXNET3_STATE_BIT_RESETTING
, &adapter
->state
);
3070 vmxnet3_probe_device(struct pci_dev
*pdev
,
3071 const struct pci_device_id
*id
)
3073 static const struct net_device_ops vmxnet3_netdev_ops
= {
3074 .ndo_open
= vmxnet3_open
,
3075 .ndo_stop
= vmxnet3_close
,
3076 .ndo_start_xmit
= vmxnet3_xmit_frame
,
3077 .ndo_set_mac_address
= vmxnet3_set_mac_addr
,
3078 .ndo_change_mtu
= vmxnet3_change_mtu
,
3079 .ndo_set_features
= vmxnet3_set_features
,
3080 .ndo_get_stats64
= vmxnet3_get_stats64
,
3081 .ndo_tx_timeout
= vmxnet3_tx_timeout
,
3082 .ndo_set_rx_mode
= vmxnet3_set_mc
,
3083 .ndo_vlan_rx_add_vid
= vmxnet3_vlan_rx_add_vid
,
3084 .ndo_vlan_rx_kill_vid
= vmxnet3_vlan_rx_kill_vid
,
3085 #ifdef CONFIG_NET_POLL_CONTROLLER
3086 .ndo_poll_controller
= vmxnet3_netpoll
,
3090 bool dma64
= false; /* stupid gcc */
3092 struct net_device
*netdev
;
3093 struct vmxnet3_adapter
*adapter
;
3099 if (!pci_msi_enabled())
3104 num_rx_queues
= min(VMXNET3_DEVICE_MAX_RX_QUEUES
,
3105 (int)num_online_cpus());
3109 num_rx_queues
= rounddown_pow_of_two(num_rx_queues
);
3112 num_tx_queues
= min(VMXNET3_DEVICE_MAX_TX_QUEUES
,
3113 (int)num_online_cpus());
3117 num_tx_queues
= rounddown_pow_of_two(num_tx_queues
);
3118 netdev
= alloc_etherdev_mq(sizeof(struct vmxnet3_adapter
),
3119 max(num_tx_queues
, num_rx_queues
));
3120 dev_info(&pdev
->dev
,
3121 "# of Tx queues : %d, # of Rx queues : %d\n",
3122 num_tx_queues
, num_rx_queues
);
3127 pci_set_drvdata(pdev
, netdev
);
3128 adapter
= netdev_priv(netdev
);
3129 adapter
->netdev
= netdev
;
3130 adapter
->pdev
= pdev
;
3132 adapter
->tx_ring_size
= VMXNET3_DEF_TX_RING_SIZE
;
3133 adapter
->rx_ring_size
= VMXNET3_DEF_RX_RING_SIZE
;
3134 adapter
->rx_ring2_size
= VMXNET3_DEF_RX_RING2_SIZE
;
3136 spin_lock_init(&adapter
->cmd_lock
);
3137 adapter
->adapter_pa
= dma_map_single(&adapter
->pdev
->dev
, adapter
,
3138 sizeof(struct vmxnet3_adapter
),
3140 if (dma_mapping_error(&adapter
->pdev
->dev
, adapter
->adapter_pa
)) {
3141 dev_err(&pdev
->dev
, "Failed to map dma\n");
3145 adapter
->shared
= dma_alloc_coherent(
3146 &adapter
->pdev
->dev
,
3147 sizeof(struct Vmxnet3_DriverShared
),
3148 &adapter
->shared_pa
, GFP_KERNEL
);
3149 if (!adapter
->shared
) {
3150 dev_err(&pdev
->dev
, "Failed to allocate memory\n");
3152 goto err_alloc_shared
;
3155 adapter
->num_rx_queues
= num_rx_queues
;
3156 adapter
->num_tx_queues
= num_tx_queues
;
3157 adapter
->rx_buf_per_pkt
= 1;
3159 size
= sizeof(struct Vmxnet3_TxQueueDesc
) * adapter
->num_tx_queues
;
3160 size
+= sizeof(struct Vmxnet3_RxQueueDesc
) * adapter
->num_rx_queues
;
3161 adapter
->tqd_start
= dma_alloc_coherent(&adapter
->pdev
->dev
, size
,
3162 &adapter
->queue_desc_pa
,
3165 if (!adapter
->tqd_start
) {
3166 dev_err(&pdev
->dev
, "Failed to allocate memory\n");
3168 goto err_alloc_queue_desc
;
3170 adapter
->rqd_start
= (struct Vmxnet3_RxQueueDesc
*)(adapter
->tqd_start
+
3171 adapter
->num_tx_queues
);
3173 adapter
->pm_conf
= dma_alloc_coherent(&adapter
->pdev
->dev
,
3174 sizeof(struct Vmxnet3_PMConf
),
3175 &adapter
->pm_conf_pa
,
3177 if (adapter
->pm_conf
== NULL
) {
3184 adapter
->rss_conf
= dma_alloc_coherent(&adapter
->pdev
->dev
,
3185 sizeof(struct UPT1_RSSConf
),
3186 &adapter
->rss_conf_pa
,
3188 if (adapter
->rss_conf
== NULL
) {
3192 #endif /* VMXNET3_RSS */
3194 err
= vmxnet3_alloc_pci_resources(adapter
, &dma64
);
3198 ver
= VMXNET3_READ_BAR1_REG(adapter
, VMXNET3_REG_VRRS
);
3200 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_VRRS
, 2);
3201 adapter
->version
= 2;
3202 } else if (ver
& 1) {
3203 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_VRRS
, 1);
3204 adapter
->version
= 1;
3207 "Incompatible h/w version (0x%x) for adapter\n", ver
);
3211 dev_dbg(&pdev
->dev
, "Using device version %d\n", adapter
->version
);
3213 ver
= VMXNET3_READ_BAR1_REG(adapter
, VMXNET3_REG_UVRS
);
3215 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_UVRS
, 1);
3218 "Incompatible upt version (0x%x) for adapter\n", ver
);
3223 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
3224 vmxnet3_declare_features(adapter
, dma64
);
3226 if (adapter
->num_tx_queues
== adapter
->num_rx_queues
)
3227 adapter
->share_intr
= VMXNET3_INTR_BUDDYSHARE
;
3229 adapter
->share_intr
= VMXNET3_INTR_DONTSHARE
;
3231 vmxnet3_alloc_intr_resources(adapter
);
3234 if (adapter
->num_rx_queues
> 1 &&
3235 adapter
->intr
.type
== VMXNET3_IT_MSIX
) {
3236 adapter
->rss
= true;
3237 netdev
->hw_features
|= NETIF_F_RXHASH
;
3238 netdev
->features
|= NETIF_F_RXHASH
;
3239 dev_dbg(&pdev
->dev
, "RSS is enabled.\n");
3241 adapter
->rss
= false;
3245 vmxnet3_read_mac_addr(adapter
, mac
);
3246 memcpy(netdev
->dev_addr
, mac
, netdev
->addr_len
);
3248 netdev
->netdev_ops
= &vmxnet3_netdev_ops
;
3249 vmxnet3_set_ethtool_ops(netdev
);
3250 netdev
->watchdog_timeo
= 5 * HZ
;
3252 INIT_WORK(&adapter
->work
, vmxnet3_reset_work
);
3253 set_bit(VMXNET3_STATE_BIT_QUIESCED
, &adapter
->state
);
3255 if (adapter
->intr
.type
== VMXNET3_IT_MSIX
) {
3257 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3258 netif_napi_add(adapter
->netdev
,
3259 &adapter
->rx_queue
[i
].napi
,
3260 vmxnet3_poll_rx_only
, 64);
3263 netif_napi_add(adapter
->netdev
, &adapter
->rx_queue
[0].napi
,
3267 netif_set_real_num_tx_queues(adapter
->netdev
, adapter
->num_tx_queues
);
3268 netif_set_real_num_rx_queues(adapter
->netdev
, adapter
->num_rx_queues
);
3270 netif_carrier_off(netdev
);
3271 err
= register_netdev(netdev
);
3274 dev_err(&pdev
->dev
, "Failed to register adapter\n");
3278 vmxnet3_check_link(adapter
, false);
3282 vmxnet3_free_intr_resources(adapter
);
3284 vmxnet3_free_pci_resources(adapter
);
3287 dma_free_coherent(&adapter
->pdev
->dev
, sizeof(struct UPT1_RSSConf
),
3288 adapter
->rss_conf
, adapter
->rss_conf_pa
);
3291 dma_free_coherent(&adapter
->pdev
->dev
, sizeof(struct Vmxnet3_PMConf
),
3292 adapter
->pm_conf
, adapter
->pm_conf_pa
);
3294 dma_free_coherent(&adapter
->pdev
->dev
, size
, adapter
->tqd_start
,
3295 adapter
->queue_desc_pa
);
3296 err_alloc_queue_desc
:
3297 dma_free_coherent(&adapter
->pdev
->dev
,
3298 sizeof(struct Vmxnet3_DriverShared
),
3299 adapter
->shared
, adapter
->shared_pa
);
3301 dma_unmap_single(&adapter
->pdev
->dev
, adapter
->adapter_pa
,
3302 sizeof(struct vmxnet3_adapter
), PCI_DMA_TODEVICE
);
3304 free_netdev(netdev
);
3310 vmxnet3_remove_device(struct pci_dev
*pdev
)
3312 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3313 struct vmxnet3_adapter
*adapter
= netdev_priv(netdev
);
3319 num_rx_queues
= min(VMXNET3_DEVICE_MAX_RX_QUEUES
,
3320 (int)num_online_cpus());
3324 num_rx_queues
= rounddown_pow_of_two(num_rx_queues
);
3326 cancel_work_sync(&adapter
->work
);
3328 unregister_netdev(netdev
);
3330 vmxnet3_free_intr_resources(adapter
);
3331 vmxnet3_free_pci_resources(adapter
);
3333 dma_free_coherent(&adapter
->pdev
->dev
, sizeof(struct UPT1_RSSConf
),
3334 adapter
->rss_conf
, adapter
->rss_conf_pa
);
3336 dma_free_coherent(&adapter
->pdev
->dev
, sizeof(struct Vmxnet3_PMConf
),
3337 adapter
->pm_conf
, adapter
->pm_conf_pa
);
3339 size
= sizeof(struct Vmxnet3_TxQueueDesc
) * adapter
->num_tx_queues
;
3340 size
+= sizeof(struct Vmxnet3_RxQueueDesc
) * num_rx_queues
;
3341 dma_free_coherent(&adapter
->pdev
->dev
, size
, adapter
->tqd_start
,
3342 adapter
->queue_desc_pa
);
3343 dma_free_coherent(&adapter
->pdev
->dev
,
3344 sizeof(struct Vmxnet3_DriverShared
),
3345 adapter
->shared
, adapter
->shared_pa
);
3346 dma_unmap_single(&adapter
->pdev
->dev
, adapter
->adapter_pa
,
3347 sizeof(struct vmxnet3_adapter
), PCI_DMA_TODEVICE
);
3348 free_netdev(netdev
);
3351 static void vmxnet3_shutdown_device(struct pci_dev
*pdev
)
3353 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3354 struct vmxnet3_adapter
*adapter
= netdev_priv(netdev
);
3355 unsigned long flags
;
3357 /* Reset_work may be in the middle of resetting the device, wait for its
3360 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING
, &adapter
->state
))
3363 if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED
,
3365 clear_bit(VMXNET3_STATE_BIT_RESETTING
, &adapter
->state
);
3368 spin_lock_irqsave(&adapter
->cmd_lock
, flags
);
3369 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_CMD
,
3370 VMXNET3_CMD_QUIESCE_DEV
);
3371 spin_unlock_irqrestore(&adapter
->cmd_lock
, flags
);
3372 vmxnet3_disable_all_intrs(adapter
);
3374 clear_bit(VMXNET3_STATE_BIT_RESETTING
, &adapter
->state
);
3381 vmxnet3_suspend(struct device
*device
)
3383 struct pci_dev
*pdev
= to_pci_dev(device
);
3384 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3385 struct vmxnet3_adapter
*adapter
= netdev_priv(netdev
);
3386 struct Vmxnet3_PMConf
*pmConf
;
3387 struct ethhdr
*ehdr
;
3388 struct arphdr
*ahdr
;
3390 struct in_device
*in_dev
;
3391 struct in_ifaddr
*ifa
;
3392 unsigned long flags
;
3395 if (!netif_running(netdev
))
3398 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3399 napi_disable(&adapter
->rx_queue
[i
].napi
);
3401 vmxnet3_disable_all_intrs(adapter
);
3402 vmxnet3_free_irqs(adapter
);
3403 vmxnet3_free_intr_resources(adapter
);
3405 netif_device_detach(netdev
);
3406 netif_tx_stop_all_queues(netdev
);
3408 /* Create wake-up filters. */
3409 pmConf
= adapter
->pm_conf
;
3410 memset(pmConf
, 0, sizeof(*pmConf
));
3412 if (adapter
->wol
& WAKE_UCAST
) {
3413 pmConf
->filters
[i
].patternSize
= ETH_ALEN
;
3414 pmConf
->filters
[i
].maskSize
= 1;
3415 memcpy(pmConf
->filters
[i
].pattern
, netdev
->dev_addr
, ETH_ALEN
);
3416 pmConf
->filters
[i
].mask
[0] = 0x3F; /* LSB ETH_ALEN bits */
3418 pmConf
->wakeUpEvents
|= VMXNET3_PM_WAKEUP_FILTER
;
3422 if (adapter
->wol
& WAKE_ARP
) {
3423 in_dev
= in_dev_get(netdev
);
3427 ifa
= (struct in_ifaddr
*)in_dev
->ifa_list
;
3431 pmConf
->filters
[i
].patternSize
= ETH_HLEN
+ /* Ethernet header*/
3432 sizeof(struct arphdr
) + /* ARP header */
3433 2 * ETH_ALEN
+ /* 2 Ethernet addresses*/
3434 2 * sizeof(u32
); /*2 IPv4 addresses */
3435 pmConf
->filters
[i
].maskSize
=
3436 (pmConf
->filters
[i
].patternSize
- 1) / 8 + 1;
3438 /* ETH_P_ARP in Ethernet header. */
3439 ehdr
= (struct ethhdr
*)pmConf
->filters
[i
].pattern
;
3440 ehdr
->h_proto
= htons(ETH_P_ARP
);
3442 /* ARPOP_REQUEST in ARP header. */
3443 ahdr
= (struct arphdr
*)&pmConf
->filters
[i
].pattern
[ETH_HLEN
];
3444 ahdr
->ar_op
= htons(ARPOP_REQUEST
);
3445 arpreq
= (u8
*)(ahdr
+ 1);
3447 /* The Unicast IPv4 address in 'tip' field. */
3448 arpreq
+= 2 * ETH_ALEN
+ sizeof(u32
);
3449 *(u32
*)arpreq
= ifa
->ifa_address
;
3451 /* The mask for the relevant bits. */
3452 pmConf
->filters
[i
].mask
[0] = 0x00;
3453 pmConf
->filters
[i
].mask
[1] = 0x30; /* ETH_P_ARP */
3454 pmConf
->filters
[i
].mask
[2] = 0x30; /* ARPOP_REQUEST */
3455 pmConf
->filters
[i
].mask
[3] = 0x00;
3456 pmConf
->filters
[i
].mask
[4] = 0xC0; /* IPv4 TIP */
3457 pmConf
->filters
[i
].mask
[5] = 0x03; /* IPv4 TIP */
3460 pmConf
->wakeUpEvents
|= VMXNET3_PM_WAKEUP_FILTER
;
3465 if (adapter
->wol
& WAKE_MAGIC
)
3466 pmConf
->wakeUpEvents
|= VMXNET3_PM_WAKEUP_MAGIC
;
3468 pmConf
->numFilters
= i
;
3470 adapter
->shared
->devRead
.pmConfDesc
.confVer
= cpu_to_le32(1);
3471 adapter
->shared
->devRead
.pmConfDesc
.confLen
= cpu_to_le32(sizeof(
3473 adapter
->shared
->devRead
.pmConfDesc
.confPA
=
3474 cpu_to_le64(adapter
->pm_conf_pa
);
3476 spin_lock_irqsave(&adapter
->cmd_lock
, flags
);
3477 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_CMD
,
3478 VMXNET3_CMD_UPDATE_PMCFG
);
3479 spin_unlock_irqrestore(&adapter
->cmd_lock
, flags
);
3481 pci_save_state(pdev
);
3482 pci_enable_wake(pdev
, pci_choose_state(pdev
, PMSG_SUSPEND
),
3484 pci_disable_device(pdev
);
3485 pci_set_power_state(pdev
, pci_choose_state(pdev
, PMSG_SUSPEND
));
3492 vmxnet3_resume(struct device
*device
)
3495 unsigned long flags
;
3496 struct pci_dev
*pdev
= to_pci_dev(device
);
3497 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3498 struct vmxnet3_adapter
*adapter
= netdev_priv(netdev
);
3500 if (!netif_running(netdev
))
3503 pci_set_power_state(pdev
, PCI_D0
);
3504 pci_restore_state(pdev
);
3505 err
= pci_enable_device_mem(pdev
);
3509 pci_enable_wake(pdev
, PCI_D0
, 0);
3511 vmxnet3_alloc_intr_resources(adapter
);
3513 /* During hibernate and suspend, device has to be reinitialized as the
3514 * device state need not be preserved.
3517 /* Need not check adapter state as other reset tasks cannot run during
3520 spin_lock_irqsave(&adapter
->cmd_lock
, flags
);
3521 VMXNET3_WRITE_BAR1_REG(adapter
, VMXNET3_REG_CMD
,
3522 VMXNET3_CMD_QUIESCE_DEV
);
3523 spin_unlock_irqrestore(&adapter
->cmd_lock
, flags
);
3524 vmxnet3_tq_cleanup_all(adapter
);
3525 vmxnet3_rq_cleanup_all(adapter
);
3527 vmxnet3_reset_dev(adapter
);
3528 err
= vmxnet3_activate_dev(adapter
);
3531 "failed to re-activate on resume, error: %d", err
);
3532 vmxnet3_force_close(adapter
);
3535 netif_device_attach(netdev
);
3540 static const struct dev_pm_ops vmxnet3_pm_ops
= {
3541 .suspend
= vmxnet3_suspend
,
3542 .resume
= vmxnet3_resume
,
3543 .freeze
= vmxnet3_suspend
,
3544 .restore
= vmxnet3_resume
,
3548 static struct pci_driver vmxnet3_driver
= {
3549 .name
= vmxnet3_driver_name
,
3550 .id_table
= vmxnet3_pciid_table
,
3551 .probe
= vmxnet3_probe_device
,
3552 .remove
= vmxnet3_remove_device
,
3553 .shutdown
= vmxnet3_shutdown_device
,
3555 .driver
.pm
= &vmxnet3_pm_ops
,
3561 vmxnet3_init_module(void)
3563 pr_info("%s - version %s\n", VMXNET3_DRIVER_DESC
,
3564 VMXNET3_DRIVER_VERSION_REPORT
);
3565 return pci_register_driver(&vmxnet3_driver
);
3568 module_init(vmxnet3_init_module
);
3572 vmxnet3_exit_module(void)
3574 pci_unregister_driver(&vmxnet3_driver
);
3577 module_exit(vmxnet3_exit_module
);
3579 MODULE_AUTHOR("VMware, Inc.");
3580 MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC
);
3581 MODULE_LICENSE("GPL v2");
3582 MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING
);