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ath10k: fix checkpatch warning about logical continuations
[deliverable/linux.git] / drivers / net / wireless / ath / ath10k / core.c
1 /*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18 #include <linux/module.h>
19 #include <linux/firmware.h>
20 #include <linux/of.h>
21
22 #include "core.h"
23 #include "mac.h"
24 #include "htc.h"
25 #include "hif.h"
26 #include "wmi.h"
27 #include "bmi.h"
28 #include "debug.h"
29 #include "htt.h"
30 #include "testmode.h"
31 #include "wmi-ops.h"
32
33 unsigned int ath10k_debug_mask;
34 static unsigned int ath10k_cryptmode_param;
35 static bool uart_print;
36 static bool skip_otp;
37 static bool rawmode;
38
39 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
40 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
41 module_param(uart_print, bool, 0644);
42 module_param(skip_otp, bool, 0644);
43 module_param(rawmode, bool, 0644);
44
45 MODULE_PARM_DESC(debug_mask, "Debugging mask");
46 MODULE_PARM_DESC(uart_print, "Uart target debugging");
47 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
48 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
49 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
50
51 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
52 {
53 .id = QCA988X_HW_2_0_VERSION,
54 .name = "qca988x hw2.0",
55 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
56 .uart_pin = 7,
57 .has_shifted_cc_wraparound = true,
58 .otp_exe_param = 0,
59 .channel_counters_freq_hz = 88000,
60 .max_probe_resp_desc_thres = 0,
61 .fw = {
62 .dir = QCA988X_HW_2_0_FW_DIR,
63 .fw = QCA988X_HW_2_0_FW_FILE,
64 .otp = QCA988X_HW_2_0_OTP_FILE,
65 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
66 .board_size = QCA988X_BOARD_DATA_SZ,
67 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
68 },
69 },
70 {
71 .id = QCA6174_HW_2_1_VERSION,
72 .name = "qca6174 hw2.1",
73 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
74 .uart_pin = 6,
75 .otp_exe_param = 0,
76 .channel_counters_freq_hz = 88000,
77 .max_probe_resp_desc_thres = 0,
78 .fw = {
79 .dir = QCA6174_HW_2_1_FW_DIR,
80 .fw = QCA6174_HW_2_1_FW_FILE,
81 .otp = QCA6174_HW_2_1_OTP_FILE,
82 .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
83 .board_size = QCA6174_BOARD_DATA_SZ,
84 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
85 },
86 },
87 {
88 .id = QCA6174_HW_3_0_VERSION,
89 .name = "qca6174 hw3.0",
90 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
91 .uart_pin = 6,
92 .otp_exe_param = 0,
93 .channel_counters_freq_hz = 88000,
94 .max_probe_resp_desc_thres = 0,
95 .fw = {
96 .dir = QCA6174_HW_3_0_FW_DIR,
97 .fw = QCA6174_HW_3_0_FW_FILE,
98 .otp = QCA6174_HW_3_0_OTP_FILE,
99 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
100 .board_size = QCA6174_BOARD_DATA_SZ,
101 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
102 },
103 },
104 {
105 .id = QCA6174_HW_3_2_VERSION,
106 .name = "qca6174 hw3.2",
107 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
108 .uart_pin = 6,
109 .otp_exe_param = 0,
110 .channel_counters_freq_hz = 88000,
111 .max_probe_resp_desc_thres = 0,
112 .fw = {
113 /* uses same binaries as hw3.0 */
114 .dir = QCA6174_HW_3_0_FW_DIR,
115 .fw = QCA6174_HW_3_0_FW_FILE,
116 .otp = QCA6174_HW_3_0_OTP_FILE,
117 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
118 .board_size = QCA6174_BOARD_DATA_SZ,
119 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
120 },
121 },
122 {
123 .id = QCA99X0_HW_2_0_DEV_VERSION,
124 .name = "qca99x0 hw2.0",
125 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
126 .uart_pin = 7,
127 .otp_exe_param = 0x00000700,
128 .continuous_frag_desc = true,
129 .channel_counters_freq_hz = 150000,
130 .max_probe_resp_desc_thres = 24,
131 .fw = {
132 .dir = QCA99X0_HW_2_0_FW_DIR,
133 .fw = QCA99X0_HW_2_0_FW_FILE,
134 .otp = QCA99X0_HW_2_0_OTP_FILE,
135 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
136 .board_size = QCA99X0_BOARD_DATA_SZ,
137 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
138 },
139 },
140 };
141
142 static const char *const ath10k_core_fw_feature_str[] = {
143 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
144 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
145 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
146 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
147 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
148 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
149 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
150 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
151 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
152 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
153 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
154 };
155
156 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
157 size_t buf_len,
158 enum ath10k_fw_features feat)
159 {
160 /* make sure that ath10k_core_fw_feature_str[] gets updated */
161 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
162 ATH10K_FW_FEATURE_COUNT);
163
164 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
165 WARN_ON(!ath10k_core_fw_feature_str[feat])) {
166 return scnprintf(buf, buf_len, "bit%d", feat);
167 }
168
169 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
170 }
171
172 void ath10k_core_get_fw_features_str(struct ath10k *ar,
173 char *buf,
174 size_t buf_len)
175 {
176 unsigned int len = 0;
177 int i;
178
179 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
180 if (test_bit(i, ar->fw_features)) {
181 if (len > 0)
182 len += scnprintf(buf + len, buf_len - len, ",");
183
184 len += ath10k_core_get_fw_feature_str(buf + len,
185 buf_len - len,
186 i);
187 }
188 }
189 }
190
191 static void ath10k_send_suspend_complete(struct ath10k *ar)
192 {
193 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
194
195 complete(&ar->target_suspend);
196 }
197
198 static int ath10k_init_configure_target(struct ath10k *ar)
199 {
200 u32 param_host;
201 int ret;
202
203 /* tell target which HTC version it is used*/
204 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
205 HTC_PROTOCOL_VERSION);
206 if (ret) {
207 ath10k_err(ar, "settings HTC version failed\n");
208 return ret;
209 }
210
211 /* set the firmware mode to STA/IBSS/AP */
212 ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
213 if (ret) {
214 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
215 return ret;
216 }
217
218 /* TODO following parameters need to be re-visited. */
219 /* num_device */
220 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
221 /* Firmware mode */
222 /* FIXME: Why FW_MODE_AP ??.*/
223 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
224 /* mac_addr_method */
225 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
226 /* firmware_bridge */
227 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
228 /* fwsubmode */
229 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
230
231 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
232 if (ret) {
233 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
234 return ret;
235 }
236
237 /* We do all byte-swapping on the host */
238 ret = ath10k_bmi_write32(ar, hi_be, 0);
239 if (ret) {
240 ath10k_err(ar, "setting host CPU BE mode failed\n");
241 return ret;
242 }
243
244 /* FW descriptor/Data swap flags */
245 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
246
247 if (ret) {
248 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
249 return ret;
250 }
251
252 /* Some devices have a special sanity check that verifies the PCI
253 * Device ID is written to this host interest var. It is known to be
254 * required to boot QCA6164.
255 */
256 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
257 ar->dev_id);
258 if (ret) {
259 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
260 return ret;
261 }
262
263 return 0;
264 }
265
266 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
267 const char *dir,
268 const char *file)
269 {
270 char filename[100];
271 const struct firmware *fw;
272 int ret;
273
274 if (file == NULL)
275 return ERR_PTR(-ENOENT);
276
277 if (dir == NULL)
278 dir = ".";
279
280 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
281 ret = request_firmware(&fw, filename, ar->dev);
282 if (ret)
283 return ERR_PTR(ret);
284
285 return fw;
286 }
287
288 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
289 size_t data_len)
290 {
291 u32 board_data_size = ar->hw_params.fw.board_size;
292 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
293 u32 board_ext_data_addr;
294 int ret;
295
296 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
297 if (ret) {
298 ath10k_err(ar, "could not read board ext data addr (%d)\n",
299 ret);
300 return ret;
301 }
302
303 ath10k_dbg(ar, ATH10K_DBG_BOOT,
304 "boot push board extended data addr 0x%x\n",
305 board_ext_data_addr);
306
307 if (board_ext_data_addr == 0)
308 return 0;
309
310 if (data_len != (board_data_size + board_ext_data_size)) {
311 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
312 data_len, board_data_size, board_ext_data_size);
313 return -EINVAL;
314 }
315
316 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
317 data + board_data_size,
318 board_ext_data_size);
319 if (ret) {
320 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
321 return ret;
322 }
323
324 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
325 (board_ext_data_size << 16) | 1);
326 if (ret) {
327 ath10k_err(ar, "could not write board ext data bit (%d)\n",
328 ret);
329 return ret;
330 }
331
332 return 0;
333 }
334
335 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
336 size_t data_len)
337 {
338 u32 board_data_size = ar->hw_params.fw.board_size;
339 u32 address;
340 int ret;
341
342 ret = ath10k_push_board_ext_data(ar, data, data_len);
343 if (ret) {
344 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
345 goto exit;
346 }
347
348 ret = ath10k_bmi_read32(ar, hi_board_data, &address);
349 if (ret) {
350 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
351 goto exit;
352 }
353
354 ret = ath10k_bmi_write_memory(ar, address, data,
355 min_t(u32, board_data_size,
356 data_len));
357 if (ret) {
358 ath10k_err(ar, "could not write board data (%d)\n", ret);
359 goto exit;
360 }
361
362 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
363 if (ret) {
364 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
365 goto exit;
366 }
367
368 exit:
369 return ret;
370 }
371
372 static int ath10k_download_cal_file(struct ath10k *ar)
373 {
374 int ret;
375
376 if (!ar->cal_file)
377 return -ENOENT;
378
379 if (IS_ERR(ar->cal_file))
380 return PTR_ERR(ar->cal_file);
381
382 ret = ath10k_download_board_data(ar, ar->cal_file->data,
383 ar->cal_file->size);
384 if (ret) {
385 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
386 return ret;
387 }
388
389 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
390
391 return 0;
392 }
393
394 static int ath10k_download_cal_dt(struct ath10k *ar)
395 {
396 struct device_node *node;
397 int data_len;
398 void *data;
399 int ret;
400
401 node = ar->dev->of_node;
402 if (!node)
403 /* Device Tree is optional, don't print any warnings if
404 * there's no node for ath10k.
405 */
406 return -ENOENT;
407
408 if (!of_get_property(node, "qcom,ath10k-calibration-data",
409 &data_len)) {
410 /* The calibration data node is optional */
411 return -ENOENT;
412 }
413
414 if (data_len != QCA988X_CAL_DATA_LEN) {
415 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
416 data_len);
417 ret = -EMSGSIZE;
418 goto out;
419 }
420
421 data = kmalloc(data_len, GFP_KERNEL);
422 if (!data) {
423 ret = -ENOMEM;
424 goto out;
425 }
426
427 ret = of_property_read_u8_array(node, "qcom,ath10k-calibration-data",
428 data, data_len);
429 if (ret) {
430 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
431 ret);
432 goto out_free;
433 }
434
435 ret = ath10k_download_board_data(ar, data, data_len);
436 if (ret) {
437 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
438 ret);
439 goto out_free;
440 }
441
442 ret = 0;
443
444 out_free:
445 kfree(data);
446
447 out:
448 return ret;
449 }
450
451 static int ath10k_download_and_run_otp(struct ath10k *ar)
452 {
453 u32 result, address = ar->hw_params.patch_load_addr;
454 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
455 int ret;
456
457 ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len);
458 if (ret) {
459 ath10k_err(ar, "failed to download board data: %d\n", ret);
460 return ret;
461 }
462
463 /* OTP is optional */
464
465 if (!ar->otp_data || !ar->otp_len) {
466 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
467 ar->otp_data, ar->otp_len);
468 return 0;
469 }
470
471 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
472 address, ar->otp_len);
473
474 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
475 if (ret) {
476 ath10k_err(ar, "could not write otp (%d)\n", ret);
477 return ret;
478 }
479
480 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
481 if (ret) {
482 ath10k_err(ar, "could not execute otp (%d)\n", ret);
483 return ret;
484 }
485
486 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
487
488 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
489 ar->fw_features)) &&
490 result != 0) {
491 ath10k_err(ar, "otp calibration failed: %d", result);
492 return -EINVAL;
493 }
494
495 return 0;
496 }
497
498 static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode)
499 {
500 u32 address, data_len;
501 const char *mode_name;
502 const void *data;
503 int ret;
504
505 address = ar->hw_params.patch_load_addr;
506
507 switch (mode) {
508 case ATH10K_FIRMWARE_MODE_NORMAL:
509 data = ar->firmware_data;
510 data_len = ar->firmware_len;
511 mode_name = "normal";
512 ret = ath10k_swap_code_seg_configure(ar,
513 ATH10K_SWAP_CODE_SEG_BIN_TYPE_FW);
514 if (ret) {
515 ath10k_err(ar, "failed to configure fw code swap: %d\n",
516 ret);
517 return ret;
518 }
519 break;
520 case ATH10K_FIRMWARE_MODE_UTF:
521 data = ar->testmode.utf->data;
522 data_len = ar->testmode.utf->size;
523 mode_name = "utf";
524 break;
525 default:
526 ath10k_err(ar, "unknown firmware mode: %d\n", mode);
527 return -EINVAL;
528 }
529
530 ath10k_dbg(ar, ATH10K_DBG_BOOT,
531 "boot uploading firmware image %p len %d mode %s\n",
532 data, data_len, mode_name);
533
534 ret = ath10k_bmi_fast_download(ar, address, data, data_len);
535 if (ret) {
536 ath10k_err(ar, "failed to download %s firmware: %d\n",
537 mode_name, ret);
538 return ret;
539 }
540
541 return ret;
542 }
543
544 static void ath10k_core_free_firmware_files(struct ath10k *ar)
545 {
546 if (!IS_ERR(ar->board))
547 release_firmware(ar->board);
548
549 if (!IS_ERR(ar->otp))
550 release_firmware(ar->otp);
551
552 if (!IS_ERR(ar->firmware))
553 release_firmware(ar->firmware);
554
555 if (!IS_ERR(ar->cal_file))
556 release_firmware(ar->cal_file);
557
558 ath10k_swap_code_seg_release(ar);
559
560 ar->board = NULL;
561 ar->board_data = NULL;
562 ar->board_len = 0;
563
564 ar->otp = NULL;
565 ar->otp_data = NULL;
566 ar->otp_len = 0;
567
568 ar->firmware = NULL;
569 ar->firmware_data = NULL;
570 ar->firmware_len = 0;
571
572 ar->cal_file = NULL;
573
574 }
575
576 static int ath10k_fetch_cal_file(struct ath10k *ar)
577 {
578 char filename[100];
579
580 /* cal-<bus>-<id>.bin */
581 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
582 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
583
584 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
585 if (IS_ERR(ar->cal_file))
586 /* calibration file is optional, don't print any warnings */
587 return PTR_ERR(ar->cal_file);
588
589 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
590 ATH10K_FW_DIR, filename);
591
592 return 0;
593 }
594
595 static int ath10k_core_fetch_spec_board_file(struct ath10k *ar)
596 {
597 char filename[100];
598
599 scnprintf(filename, sizeof(filename), "board-%s-%s.bin",
600 ath10k_bus_str(ar->hif.bus), ar->spec_board_id);
601
602 ar->board = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, filename);
603 if (IS_ERR(ar->board))
604 return PTR_ERR(ar->board);
605
606 ar->board_data = ar->board->data;
607 ar->board_len = ar->board->size;
608 ar->spec_board_loaded = true;
609
610 return 0;
611 }
612
613 static int ath10k_core_fetch_generic_board_file(struct ath10k *ar)
614 {
615 if (!ar->hw_params.fw.board) {
616 ath10k_err(ar, "failed to find board file fw entry\n");
617 return -EINVAL;
618 }
619
620 ar->board = ath10k_fetch_fw_file(ar,
621 ar->hw_params.fw.dir,
622 ar->hw_params.fw.board);
623 if (IS_ERR(ar->board))
624 return PTR_ERR(ar->board);
625
626 ar->board_data = ar->board->data;
627 ar->board_len = ar->board->size;
628 ar->spec_board_loaded = false;
629
630 return 0;
631 }
632
633 static int ath10k_core_fetch_board_file(struct ath10k *ar)
634 {
635 int ret;
636
637 if (strlen(ar->spec_board_id) > 0) {
638 ret = ath10k_core_fetch_spec_board_file(ar);
639 if (ret) {
640 ath10k_info(ar, "failed to load spec board file, falling back to generic: %d\n",
641 ret);
642 goto generic;
643 }
644
645 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found specific board file for %s\n",
646 ar->spec_board_id);
647 return 0;
648 }
649
650 generic:
651 ret = ath10k_core_fetch_generic_board_file(ar);
652 if (ret) {
653 ath10k_err(ar, "failed to fetch generic board data: %d\n", ret);
654 return ret;
655 }
656
657 return 0;
658 }
659
660 static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
661 {
662 int ret = 0;
663
664 if (ar->hw_params.fw.fw == NULL) {
665 ath10k_err(ar, "firmware file not defined\n");
666 return -EINVAL;
667 }
668
669 ar->firmware = ath10k_fetch_fw_file(ar,
670 ar->hw_params.fw.dir,
671 ar->hw_params.fw.fw);
672 if (IS_ERR(ar->firmware)) {
673 ret = PTR_ERR(ar->firmware);
674 ath10k_err(ar, "could not fetch firmware (%d)\n", ret);
675 goto err;
676 }
677
678 ar->firmware_data = ar->firmware->data;
679 ar->firmware_len = ar->firmware->size;
680
681 /* OTP may be undefined. If so, don't fetch it at all */
682 if (ar->hw_params.fw.otp == NULL)
683 return 0;
684
685 ar->otp = ath10k_fetch_fw_file(ar,
686 ar->hw_params.fw.dir,
687 ar->hw_params.fw.otp);
688 if (IS_ERR(ar->otp)) {
689 ret = PTR_ERR(ar->otp);
690 ath10k_err(ar, "could not fetch otp (%d)\n", ret);
691 goto err;
692 }
693
694 ar->otp_data = ar->otp->data;
695 ar->otp_len = ar->otp->size;
696
697 return 0;
698
699 err:
700 ath10k_core_free_firmware_files(ar);
701 return ret;
702 }
703
704 static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
705 {
706 size_t magic_len, len, ie_len;
707 int ie_id, i, index, bit, ret;
708 struct ath10k_fw_ie *hdr;
709 const u8 *data;
710 __le32 *timestamp, *version;
711
712 /* first fetch the firmware file (firmware-*.bin) */
713 ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
714 if (IS_ERR(ar->firmware)) {
715 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
716 ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
717 return PTR_ERR(ar->firmware);
718 }
719
720 data = ar->firmware->data;
721 len = ar->firmware->size;
722
723 /* magic also includes the null byte, check that as well */
724 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
725
726 if (len < magic_len) {
727 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
728 ar->hw_params.fw.dir, name, len);
729 ret = -EINVAL;
730 goto err;
731 }
732
733 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
734 ath10k_err(ar, "invalid firmware magic\n");
735 ret = -EINVAL;
736 goto err;
737 }
738
739 /* jump over the padding */
740 magic_len = ALIGN(magic_len, 4);
741
742 len -= magic_len;
743 data += magic_len;
744
745 /* loop elements */
746 while (len > sizeof(struct ath10k_fw_ie)) {
747 hdr = (struct ath10k_fw_ie *)data;
748
749 ie_id = le32_to_cpu(hdr->id);
750 ie_len = le32_to_cpu(hdr->len);
751
752 len -= sizeof(*hdr);
753 data += sizeof(*hdr);
754
755 if (len < ie_len) {
756 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
757 ie_id, len, ie_len);
758 ret = -EINVAL;
759 goto err;
760 }
761
762 switch (ie_id) {
763 case ATH10K_FW_IE_FW_VERSION:
764 if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
765 break;
766
767 memcpy(ar->hw->wiphy->fw_version, data, ie_len);
768 ar->hw->wiphy->fw_version[ie_len] = '\0';
769
770 ath10k_dbg(ar, ATH10K_DBG_BOOT,
771 "found fw version %s\n",
772 ar->hw->wiphy->fw_version);
773 break;
774 case ATH10K_FW_IE_TIMESTAMP:
775 if (ie_len != sizeof(u32))
776 break;
777
778 timestamp = (__le32 *)data;
779
780 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
781 le32_to_cpup(timestamp));
782 break;
783 case ATH10K_FW_IE_FEATURES:
784 ath10k_dbg(ar, ATH10K_DBG_BOOT,
785 "found firmware features ie (%zd B)\n",
786 ie_len);
787
788 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
789 index = i / 8;
790 bit = i % 8;
791
792 if (index == ie_len)
793 break;
794
795 if (data[index] & (1 << bit)) {
796 ath10k_dbg(ar, ATH10K_DBG_BOOT,
797 "Enabling feature bit: %i\n",
798 i);
799 __set_bit(i, ar->fw_features);
800 }
801 }
802
803 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
804 ar->fw_features,
805 sizeof(ar->fw_features));
806 break;
807 case ATH10K_FW_IE_FW_IMAGE:
808 ath10k_dbg(ar, ATH10K_DBG_BOOT,
809 "found fw image ie (%zd B)\n",
810 ie_len);
811
812 ar->firmware_data = data;
813 ar->firmware_len = ie_len;
814
815 break;
816 case ATH10K_FW_IE_OTP_IMAGE:
817 ath10k_dbg(ar, ATH10K_DBG_BOOT,
818 "found otp image ie (%zd B)\n",
819 ie_len);
820
821 ar->otp_data = data;
822 ar->otp_len = ie_len;
823
824 break;
825 case ATH10K_FW_IE_WMI_OP_VERSION:
826 if (ie_len != sizeof(u32))
827 break;
828
829 version = (__le32 *)data;
830
831 ar->wmi.op_version = le32_to_cpup(version);
832
833 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
834 ar->wmi.op_version);
835 break;
836 case ATH10K_FW_IE_HTT_OP_VERSION:
837 if (ie_len != sizeof(u32))
838 break;
839
840 version = (__le32 *)data;
841
842 ar->htt.op_version = le32_to_cpup(version);
843
844 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
845 ar->htt.op_version);
846 break;
847 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
848 ath10k_dbg(ar, ATH10K_DBG_BOOT,
849 "found fw code swap image ie (%zd B)\n",
850 ie_len);
851 ar->swap.firmware_codeswap_data = data;
852 ar->swap.firmware_codeswap_len = ie_len;
853 break;
854 default:
855 ath10k_warn(ar, "Unknown FW IE: %u\n",
856 le32_to_cpu(hdr->id));
857 break;
858 }
859
860 /* jump over the padding */
861 ie_len = ALIGN(ie_len, 4);
862
863 len -= ie_len;
864 data += ie_len;
865 }
866
867 if (!ar->firmware_data || !ar->firmware_len) {
868 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
869 ar->hw_params.fw.dir, name);
870 ret = -ENOMEDIUM;
871 goto err;
872 }
873
874 return 0;
875
876 err:
877 ath10k_core_free_firmware_files(ar);
878 return ret;
879 }
880
881 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
882 {
883 int ret;
884
885 /* calibration file is optional, don't check for any errors */
886 ath10k_fetch_cal_file(ar);
887
888 ret = ath10k_core_fetch_board_file(ar);
889 if (ret) {
890 ath10k_err(ar, "failed to fetch board file: %d\n", ret);
891 return ret;
892 }
893
894 ar->fw_api = 5;
895 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
896
897 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API5_FILE);
898 if (ret == 0)
899 goto success;
900
901 ar->fw_api = 4;
902 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
903
904 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE);
905 if (ret == 0)
906 goto success;
907
908 ar->fw_api = 3;
909 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
910
911 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE);
912 if (ret == 0)
913 goto success;
914
915 ar->fw_api = 2;
916 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
917
918 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
919 if (ret == 0)
920 goto success;
921
922 ar->fw_api = 1;
923 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
924
925 ret = ath10k_core_fetch_firmware_api_1(ar);
926 if (ret)
927 return ret;
928
929 success:
930 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
931
932 return 0;
933 }
934
935 static int ath10k_download_cal_data(struct ath10k *ar)
936 {
937 int ret;
938
939 ret = ath10k_download_cal_file(ar);
940 if (ret == 0) {
941 ar->cal_mode = ATH10K_CAL_MODE_FILE;
942 goto done;
943 }
944
945 ath10k_dbg(ar, ATH10K_DBG_BOOT,
946 "boot did not find a calibration file, try DT next: %d\n",
947 ret);
948
949 ret = ath10k_download_cal_dt(ar);
950 if (ret == 0) {
951 ar->cal_mode = ATH10K_CAL_MODE_DT;
952 goto done;
953 }
954
955 ath10k_dbg(ar, ATH10K_DBG_BOOT,
956 "boot did not find DT entry, try OTP next: %d\n",
957 ret);
958
959 ret = ath10k_download_and_run_otp(ar);
960 if (ret) {
961 ath10k_err(ar, "failed to run otp: %d\n", ret);
962 return ret;
963 }
964
965 ar->cal_mode = ATH10K_CAL_MODE_OTP;
966
967 done:
968 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
969 ath10k_cal_mode_str(ar->cal_mode));
970 return 0;
971 }
972
973 static int ath10k_init_uart(struct ath10k *ar)
974 {
975 int ret;
976
977 /*
978 * Explicitly setting UART prints to zero as target turns it on
979 * based on scratch registers.
980 */
981 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
982 if (ret) {
983 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
984 return ret;
985 }
986
987 if (!uart_print)
988 return 0;
989
990 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
991 if (ret) {
992 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
993 return ret;
994 }
995
996 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
997 if (ret) {
998 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
999 return ret;
1000 }
1001
1002 /* Set the UART baud rate to 19200. */
1003 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
1004 if (ret) {
1005 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
1006 return ret;
1007 }
1008
1009 ath10k_info(ar, "UART prints enabled\n");
1010 return 0;
1011 }
1012
1013 static int ath10k_init_hw_params(struct ath10k *ar)
1014 {
1015 const struct ath10k_hw_params *uninitialized_var(hw_params);
1016 int i;
1017
1018 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
1019 hw_params = &ath10k_hw_params_list[i];
1020
1021 if (hw_params->id == ar->target_version)
1022 break;
1023 }
1024
1025 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
1026 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
1027 ar->target_version);
1028 return -EINVAL;
1029 }
1030
1031 ar->hw_params = *hw_params;
1032
1033 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
1034 ar->hw_params.name, ar->target_version);
1035
1036 return 0;
1037 }
1038
1039 static void ath10k_core_restart(struct work_struct *work)
1040 {
1041 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
1042
1043 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1044
1045 /* Place a barrier to make sure the compiler doesn't reorder
1046 * CRASH_FLUSH and calling other functions.
1047 */
1048 barrier();
1049
1050 ieee80211_stop_queues(ar->hw);
1051 ath10k_drain_tx(ar);
1052 complete_all(&ar->scan.started);
1053 complete_all(&ar->scan.completed);
1054 complete_all(&ar->scan.on_channel);
1055 complete_all(&ar->offchan_tx_completed);
1056 complete_all(&ar->install_key_done);
1057 complete_all(&ar->vdev_setup_done);
1058 complete_all(&ar->thermal.wmi_sync);
1059 wake_up(&ar->htt.empty_tx_wq);
1060 wake_up(&ar->wmi.tx_credits_wq);
1061 wake_up(&ar->peer_mapping_wq);
1062
1063 mutex_lock(&ar->conf_mutex);
1064
1065 switch (ar->state) {
1066 case ATH10K_STATE_ON:
1067 ar->state = ATH10K_STATE_RESTARTING;
1068 ath10k_hif_stop(ar);
1069 ath10k_scan_finish(ar);
1070 ieee80211_restart_hw(ar->hw);
1071 break;
1072 case ATH10K_STATE_OFF:
1073 /* this can happen if driver is being unloaded
1074 * or if the crash happens during FW probing */
1075 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
1076 break;
1077 case ATH10K_STATE_RESTARTING:
1078 /* hw restart might be requested from multiple places */
1079 break;
1080 case ATH10K_STATE_RESTARTED:
1081 ar->state = ATH10K_STATE_WEDGED;
1082 /* fall through */
1083 case ATH10K_STATE_WEDGED:
1084 ath10k_warn(ar, "device is wedged, will not restart\n");
1085 break;
1086 case ATH10K_STATE_UTF:
1087 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
1088 break;
1089 }
1090
1091 mutex_unlock(&ar->conf_mutex);
1092 }
1093
1094 static int ath10k_core_init_firmware_features(struct ath10k *ar)
1095 {
1096 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
1097 !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
1098 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
1099 return -EINVAL;
1100 }
1101
1102 if (ar->wmi.op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
1103 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
1104 ATH10K_FW_WMI_OP_VERSION_MAX, ar->wmi.op_version);
1105 return -EINVAL;
1106 }
1107
1108 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
1109 switch (ath10k_cryptmode_param) {
1110 case ATH10K_CRYPT_MODE_HW:
1111 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1112 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1113 break;
1114 case ATH10K_CRYPT_MODE_SW:
1115 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1116 ar->fw_features)) {
1117 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
1118 return -EINVAL;
1119 }
1120
1121 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1122 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1123 break;
1124 default:
1125 ath10k_info(ar, "invalid cryptmode: %d\n",
1126 ath10k_cryptmode_param);
1127 return -EINVAL;
1128 }
1129
1130 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
1131 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
1132
1133 if (rawmode) {
1134 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1135 ar->fw_features)) {
1136 ath10k_err(ar, "rawmode = 1 requires support from firmware");
1137 return -EINVAL;
1138 }
1139 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1140 }
1141
1142 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
1143 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
1144
1145 /* Workaround:
1146 *
1147 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
1148 * and causes enormous performance issues (malformed frames,
1149 * etc).
1150 *
1151 * Disabling A-MSDU makes RAW mode stable with heavy traffic
1152 * albeit a bit slower compared to regular operation.
1153 */
1154 ar->htt.max_num_amsdu = 1;
1155 }
1156
1157 /* Backwards compatibility for firmwares without
1158 * ATH10K_FW_IE_WMI_OP_VERSION.
1159 */
1160 if (ar->wmi.op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
1161 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
1162 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
1163 ar->fw_features))
1164 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
1165 else
1166 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
1167 } else {
1168 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
1169 }
1170 }
1171
1172 switch (ar->wmi.op_version) {
1173 case ATH10K_FW_WMI_OP_VERSION_MAIN:
1174 ar->max_num_peers = TARGET_NUM_PEERS;
1175 ar->max_num_stations = TARGET_NUM_STATIONS;
1176 ar->max_num_vdevs = TARGET_NUM_VDEVS;
1177 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
1178 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1179 WMI_STAT_PEER;
1180 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1181 break;
1182 case ATH10K_FW_WMI_OP_VERSION_10_1:
1183 case ATH10K_FW_WMI_OP_VERSION_10_2:
1184 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1185 ar->max_num_peers = TARGET_10X_NUM_PEERS;
1186 ar->max_num_stations = TARGET_10X_NUM_STATIONS;
1187 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
1188 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
1189 ar->fw_stats_req_mask = WMI_STAT_PEER;
1190 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1191 break;
1192 case ATH10K_FW_WMI_OP_VERSION_TLV:
1193 ar->max_num_peers = TARGET_TLV_NUM_PEERS;
1194 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
1195 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
1196 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
1197 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
1198 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
1199 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1200 WMI_STAT_PEER;
1201 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1202 break;
1203 case ATH10K_FW_WMI_OP_VERSION_10_4:
1204 ar->max_num_peers = TARGET_10_4_NUM_PEERS;
1205 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
1206 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
1207 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
1208 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
1209 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
1210 ar->fw_stats_req_mask = WMI_STAT_PEER;
1211 ar->max_spatial_stream = WMI_10_4_MAX_SPATIAL_STREAM;
1212 break;
1213 case ATH10K_FW_WMI_OP_VERSION_UNSET:
1214 case ATH10K_FW_WMI_OP_VERSION_MAX:
1215 WARN_ON(1);
1216 return -EINVAL;
1217 }
1218
1219 /* Backwards compatibility for firmwares without
1220 * ATH10K_FW_IE_HTT_OP_VERSION.
1221 */
1222 if (ar->htt.op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
1223 switch (ar->wmi.op_version) {
1224 case ATH10K_FW_WMI_OP_VERSION_MAIN:
1225 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
1226 break;
1227 case ATH10K_FW_WMI_OP_VERSION_10_1:
1228 case ATH10K_FW_WMI_OP_VERSION_10_2:
1229 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1230 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
1231 break;
1232 case ATH10K_FW_WMI_OP_VERSION_TLV:
1233 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
1234 break;
1235 case ATH10K_FW_WMI_OP_VERSION_10_4:
1236 case ATH10K_FW_WMI_OP_VERSION_UNSET:
1237 case ATH10K_FW_WMI_OP_VERSION_MAX:
1238 WARN_ON(1);
1239 return -EINVAL;
1240 }
1241 }
1242
1243 return 0;
1244 }
1245
1246 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
1247 {
1248 int status;
1249
1250 lockdep_assert_held(&ar->conf_mutex);
1251
1252 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1253
1254 ath10k_bmi_start(ar);
1255
1256 if (ath10k_init_configure_target(ar)) {
1257 status = -EINVAL;
1258 goto err;
1259 }
1260
1261 status = ath10k_download_cal_data(ar);
1262 if (status)
1263 goto err;
1264
1265 /* Some of of qca988x solutions are having global reset issue
1266 * during target initialization. Bypassing PLL setting before
1267 * downloading firmware and letting the SoC run on REF_CLK is
1268 * fixing the problem. Corresponding firmware change is also needed
1269 * to set the clock source once the target is initialized.
1270 */
1271 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
1272 ar->fw_features)) {
1273 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
1274 if (status) {
1275 ath10k_err(ar, "could not write to skip_clock_init: %d\n",
1276 status);
1277 goto err;
1278 }
1279 }
1280
1281 status = ath10k_download_fw(ar, mode);
1282 if (status)
1283 goto err;
1284
1285 status = ath10k_init_uart(ar);
1286 if (status)
1287 goto err;
1288
1289 ar->htc.htc_ops.target_send_suspend_complete =
1290 ath10k_send_suspend_complete;
1291
1292 status = ath10k_htc_init(ar);
1293 if (status) {
1294 ath10k_err(ar, "could not init HTC (%d)\n", status);
1295 goto err;
1296 }
1297
1298 status = ath10k_bmi_done(ar);
1299 if (status)
1300 goto err;
1301
1302 status = ath10k_wmi_attach(ar);
1303 if (status) {
1304 ath10k_err(ar, "WMI attach failed: %d\n", status);
1305 goto err;
1306 }
1307
1308 status = ath10k_htt_init(ar);
1309 if (status) {
1310 ath10k_err(ar, "failed to init htt: %d\n", status);
1311 goto err_wmi_detach;
1312 }
1313
1314 status = ath10k_htt_tx_alloc(&ar->htt);
1315 if (status) {
1316 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
1317 goto err_wmi_detach;
1318 }
1319
1320 status = ath10k_htt_rx_alloc(&ar->htt);
1321 if (status) {
1322 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
1323 goto err_htt_tx_detach;
1324 }
1325
1326 status = ath10k_hif_start(ar);
1327 if (status) {
1328 ath10k_err(ar, "could not start HIF: %d\n", status);
1329 goto err_htt_rx_detach;
1330 }
1331
1332 status = ath10k_htc_wait_target(&ar->htc);
1333 if (status) {
1334 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
1335 goto err_hif_stop;
1336 }
1337
1338 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1339 status = ath10k_htt_connect(&ar->htt);
1340 if (status) {
1341 ath10k_err(ar, "failed to connect htt (%d)\n", status);
1342 goto err_hif_stop;
1343 }
1344 }
1345
1346 status = ath10k_wmi_connect(ar);
1347 if (status) {
1348 ath10k_err(ar, "could not connect wmi: %d\n", status);
1349 goto err_hif_stop;
1350 }
1351
1352 status = ath10k_htc_start(&ar->htc);
1353 if (status) {
1354 ath10k_err(ar, "failed to start htc: %d\n", status);
1355 goto err_hif_stop;
1356 }
1357
1358 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1359 status = ath10k_wmi_wait_for_service_ready(ar);
1360 if (status) {
1361 ath10k_warn(ar, "wmi service ready event not received");
1362 goto err_hif_stop;
1363 }
1364 }
1365
1366 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
1367 ar->hw->wiphy->fw_version);
1368
1369 status = ath10k_wmi_cmd_init(ar);
1370 if (status) {
1371 ath10k_err(ar, "could not send WMI init command (%d)\n",
1372 status);
1373 goto err_hif_stop;
1374 }
1375
1376 status = ath10k_wmi_wait_for_unified_ready(ar);
1377 if (status) {
1378 ath10k_err(ar, "wmi unified ready event not received\n");
1379 goto err_hif_stop;
1380 }
1381
1382 /* If firmware indicates Full Rx Reorder support it must be used in a
1383 * slightly different manner. Let HTT code know.
1384 */
1385 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
1386 ar->wmi.svc_map));
1387
1388 status = ath10k_htt_rx_ring_refill(ar);
1389 if (status) {
1390 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
1391 goto err_hif_stop;
1392 }
1393
1394 /* we don't care about HTT in UTF mode */
1395 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1396 status = ath10k_htt_setup(&ar->htt);
1397 if (status) {
1398 ath10k_err(ar, "failed to setup htt: %d\n", status);
1399 goto err_hif_stop;
1400 }
1401 }
1402
1403 status = ath10k_debug_start(ar);
1404 if (status)
1405 goto err_hif_stop;
1406
1407 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
1408
1409 INIT_LIST_HEAD(&ar->arvifs);
1410
1411 return 0;
1412
1413 err_hif_stop:
1414 ath10k_hif_stop(ar);
1415 err_htt_rx_detach:
1416 ath10k_htt_rx_free(&ar->htt);
1417 err_htt_tx_detach:
1418 ath10k_htt_tx_free(&ar->htt);
1419 err_wmi_detach:
1420 ath10k_wmi_detach(ar);
1421 err:
1422 return status;
1423 }
1424 EXPORT_SYMBOL(ath10k_core_start);
1425
1426 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
1427 {
1428 int ret;
1429 unsigned long time_left;
1430
1431 reinit_completion(&ar->target_suspend);
1432
1433 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
1434 if (ret) {
1435 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
1436 return ret;
1437 }
1438
1439 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
1440
1441 if (!time_left) {
1442 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
1443 return -ETIMEDOUT;
1444 }
1445
1446 return 0;
1447 }
1448
1449 void ath10k_core_stop(struct ath10k *ar)
1450 {
1451 lockdep_assert_held(&ar->conf_mutex);
1452 ath10k_debug_stop(ar);
1453
1454 /* try to suspend target */
1455 if (ar->state != ATH10K_STATE_RESTARTING &&
1456 ar->state != ATH10K_STATE_UTF)
1457 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
1458
1459 ath10k_hif_stop(ar);
1460 ath10k_htt_tx_free(&ar->htt);
1461 ath10k_htt_rx_free(&ar->htt);
1462 ath10k_wmi_detach(ar);
1463 }
1464 EXPORT_SYMBOL(ath10k_core_stop);
1465
1466 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
1467 * order to know what hw capabilities should be advertised to mac80211 it is
1468 * necessary to load the firmware (and tear it down immediately since start
1469 * hook will try to init it again) before registering */
1470 static int ath10k_core_probe_fw(struct ath10k *ar)
1471 {
1472 struct bmi_target_info target_info;
1473 int ret = 0;
1474
1475 ret = ath10k_hif_power_up(ar);
1476 if (ret) {
1477 ath10k_err(ar, "could not start pci hif (%d)\n", ret);
1478 return ret;
1479 }
1480
1481 memset(&target_info, 0, sizeof(target_info));
1482 ret = ath10k_bmi_get_target_info(ar, &target_info);
1483 if (ret) {
1484 ath10k_err(ar, "could not get target info (%d)\n", ret);
1485 goto err_power_down;
1486 }
1487
1488 ar->target_version = target_info.version;
1489 ar->hw->wiphy->hw_version = target_info.version;
1490
1491 ret = ath10k_init_hw_params(ar);
1492 if (ret) {
1493 ath10k_err(ar, "could not get hw params (%d)\n", ret);
1494 goto err_power_down;
1495 }
1496
1497 ret = ath10k_core_fetch_firmware_files(ar);
1498 if (ret) {
1499 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
1500 goto err_power_down;
1501 }
1502
1503 ret = ath10k_core_init_firmware_features(ar);
1504 if (ret) {
1505 ath10k_err(ar, "fatal problem with firmware features: %d\n",
1506 ret);
1507 goto err_free_firmware_files;
1508 }
1509
1510 ret = ath10k_swap_code_seg_init(ar);
1511 if (ret) {
1512 ath10k_err(ar, "failed to initialize code swap segment: %d\n",
1513 ret);
1514 goto err_free_firmware_files;
1515 }
1516
1517 mutex_lock(&ar->conf_mutex);
1518
1519 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL);
1520 if (ret) {
1521 ath10k_err(ar, "could not init core (%d)\n", ret);
1522 goto err_unlock;
1523 }
1524
1525 ath10k_print_driver_info(ar);
1526 ath10k_core_stop(ar);
1527
1528 mutex_unlock(&ar->conf_mutex);
1529
1530 ath10k_hif_power_down(ar);
1531 return 0;
1532
1533 err_unlock:
1534 mutex_unlock(&ar->conf_mutex);
1535
1536 err_free_firmware_files:
1537 ath10k_core_free_firmware_files(ar);
1538
1539 err_power_down:
1540 ath10k_hif_power_down(ar);
1541
1542 return ret;
1543 }
1544
1545 static void ath10k_core_register_work(struct work_struct *work)
1546 {
1547 struct ath10k *ar = container_of(work, struct ath10k, register_work);
1548 int status;
1549
1550 status = ath10k_core_probe_fw(ar);
1551 if (status) {
1552 ath10k_err(ar, "could not probe fw (%d)\n", status);
1553 goto err;
1554 }
1555
1556 status = ath10k_mac_register(ar);
1557 if (status) {
1558 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
1559 goto err_release_fw;
1560 }
1561
1562 status = ath10k_debug_register(ar);
1563 if (status) {
1564 ath10k_err(ar, "unable to initialize debugfs\n");
1565 goto err_unregister_mac;
1566 }
1567
1568 status = ath10k_spectral_create(ar);
1569 if (status) {
1570 ath10k_err(ar, "failed to initialize spectral\n");
1571 goto err_debug_destroy;
1572 }
1573
1574 status = ath10k_thermal_register(ar);
1575 if (status) {
1576 ath10k_err(ar, "could not register thermal device: %d\n",
1577 status);
1578 goto err_spectral_destroy;
1579 }
1580
1581 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
1582 return;
1583
1584 err_spectral_destroy:
1585 ath10k_spectral_destroy(ar);
1586 err_debug_destroy:
1587 ath10k_debug_destroy(ar);
1588 err_unregister_mac:
1589 ath10k_mac_unregister(ar);
1590 err_release_fw:
1591 ath10k_core_free_firmware_files(ar);
1592 err:
1593 /* TODO: It's probably a good idea to release device from the driver
1594 * but calling device_release_driver() here will cause a deadlock.
1595 */
1596 return;
1597 }
1598
1599 int ath10k_core_register(struct ath10k *ar, u32 chip_id)
1600 {
1601 ar->chip_id = chip_id;
1602 queue_work(ar->workqueue, &ar->register_work);
1603
1604 return 0;
1605 }
1606 EXPORT_SYMBOL(ath10k_core_register);
1607
1608 void ath10k_core_unregister(struct ath10k *ar)
1609 {
1610 cancel_work_sync(&ar->register_work);
1611
1612 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
1613 return;
1614
1615 ath10k_thermal_unregister(ar);
1616 /* Stop spectral before unregistering from mac80211 to remove the
1617 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
1618 * would be already be free'd recursively, leading to a double free.
1619 */
1620 ath10k_spectral_destroy(ar);
1621
1622 /* We must unregister from mac80211 before we stop HTC and HIF.
1623 * Otherwise we will fail to submit commands to FW and mac80211 will be
1624 * unhappy about callback failures. */
1625 ath10k_mac_unregister(ar);
1626
1627 ath10k_testmode_destroy(ar);
1628
1629 ath10k_core_free_firmware_files(ar);
1630
1631 ath10k_debug_unregister(ar);
1632 }
1633 EXPORT_SYMBOL(ath10k_core_unregister);
1634
1635 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
1636 enum ath10k_bus bus,
1637 enum ath10k_hw_rev hw_rev,
1638 const struct ath10k_hif_ops *hif_ops)
1639 {
1640 struct ath10k *ar;
1641 int ret;
1642
1643 ar = ath10k_mac_create(priv_size);
1644 if (!ar)
1645 return NULL;
1646
1647 ar->ath_common.priv = ar;
1648 ar->ath_common.hw = ar->hw;
1649 ar->dev = dev;
1650 ar->hw_rev = hw_rev;
1651 ar->hif.ops = hif_ops;
1652 ar->hif.bus = bus;
1653
1654 switch (hw_rev) {
1655 case ATH10K_HW_QCA988X:
1656 ar->regs = &qca988x_regs;
1657 ar->hw_values = &qca988x_values;
1658 break;
1659 case ATH10K_HW_QCA6174:
1660 ar->regs = &qca6174_regs;
1661 ar->hw_values = &qca6174_values;
1662 break;
1663 case ATH10K_HW_QCA99X0:
1664 ar->regs = &qca99x0_regs;
1665 ar->hw_values = &qca99x0_values;
1666 break;
1667 default:
1668 ath10k_err(ar, "unsupported core hardware revision %d\n",
1669 hw_rev);
1670 ret = -ENOTSUPP;
1671 goto err_free_mac;
1672 }
1673
1674 init_completion(&ar->scan.started);
1675 init_completion(&ar->scan.completed);
1676 init_completion(&ar->scan.on_channel);
1677 init_completion(&ar->target_suspend);
1678 init_completion(&ar->wow.wakeup_completed);
1679
1680 init_completion(&ar->install_key_done);
1681 init_completion(&ar->vdev_setup_done);
1682 init_completion(&ar->thermal.wmi_sync);
1683
1684 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
1685
1686 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
1687 if (!ar->workqueue)
1688 goto err_free_mac;
1689
1690 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
1691 if (!ar->workqueue_aux)
1692 goto err_free_wq;
1693
1694 mutex_init(&ar->conf_mutex);
1695 spin_lock_init(&ar->data_lock);
1696
1697 INIT_LIST_HEAD(&ar->peers);
1698 init_waitqueue_head(&ar->peer_mapping_wq);
1699 init_waitqueue_head(&ar->htt.empty_tx_wq);
1700 init_waitqueue_head(&ar->wmi.tx_credits_wq);
1701
1702 init_completion(&ar->offchan_tx_completed);
1703 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
1704 skb_queue_head_init(&ar->offchan_tx_queue);
1705
1706 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
1707 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
1708
1709 INIT_WORK(&ar->register_work, ath10k_core_register_work);
1710 INIT_WORK(&ar->restart_work, ath10k_core_restart);
1711
1712 ret = ath10k_debug_create(ar);
1713 if (ret)
1714 goto err_free_aux_wq;
1715
1716 return ar;
1717
1718 err_free_aux_wq:
1719 destroy_workqueue(ar->workqueue_aux);
1720 err_free_wq:
1721 destroy_workqueue(ar->workqueue);
1722
1723 err_free_mac:
1724 ath10k_mac_destroy(ar);
1725
1726 return NULL;
1727 }
1728 EXPORT_SYMBOL(ath10k_core_create);
1729
1730 void ath10k_core_destroy(struct ath10k *ar)
1731 {
1732 flush_workqueue(ar->workqueue);
1733 destroy_workqueue(ar->workqueue);
1734
1735 flush_workqueue(ar->workqueue_aux);
1736 destroy_workqueue(ar->workqueue_aux);
1737
1738 ath10k_debug_destroy(ar);
1739 ath10k_wmi_free_host_mem(ar);
1740 ath10k_mac_destroy(ar);
1741 }
1742 EXPORT_SYMBOL(ath10k_core_destroy);
1743
1744 MODULE_AUTHOR("Qualcomm Atheros");
1745 MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
1746 MODULE_LICENSE("Dual BSD/GPL");
Linux kernel - Deliverables
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