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6b9f38b8b82781eabea2b839768b176f9edfa2df
[deliverable/linux.git] / drivers / net / wireless / ath / ath10k / wmi.c
1 /*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18 #include <linux/skbuff.h>
19 #include <linux/ctype.h>
20
21 #include "core.h"
22 #include "htc.h"
23 #include "debug.h"
24 #include "wmi.h"
25 #include "mac.h"
26 #include "testmode.h"
27
28 /* MAIN WMI cmd track */
29 static struct wmi_cmd_map wmi_cmd_map = {
30 .init_cmdid = WMI_INIT_CMDID,
31 .start_scan_cmdid = WMI_START_SCAN_CMDID,
32 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
33 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
34 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
35 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
36 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
37 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
38 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
39 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
40 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
41 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
42 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
43 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
44 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
45 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
46 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
47 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
48 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
49 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
50 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
51 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
52 .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
53 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
54 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
55 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
56 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
57 .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
58 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
59 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
60 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
61 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
62 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
63 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
64 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
65 .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
66 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
67 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
68 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
69 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
70 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
71 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
72 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
73 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
74 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
75 .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
76 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
77 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
78 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
79 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
80 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
81 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
82 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
83 .roam_scan_mode = WMI_ROAM_SCAN_MODE,
84 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
85 .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
86 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
87 .roam_ap_profile = WMI_ROAM_AP_PROFILE,
88 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
89 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
90 .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
91 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
92 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
93 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
94 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
95 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
96 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
97 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
98 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
99 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
100 .wlan_profile_set_hist_intvl_cmdid =
101 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
102 .wlan_profile_get_profile_data_cmdid =
103 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
104 .wlan_profile_enable_profile_id_cmdid =
105 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
106 .wlan_profile_list_profile_id_cmdid =
107 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
108 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
109 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
110 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
111 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
112 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
113 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
114 .wow_enable_disable_wake_event_cmdid =
115 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
116 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
117 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
118 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
119 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
120 .vdev_spectral_scan_configure_cmdid =
121 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
122 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
123 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
124 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
125 .network_list_offload_config_cmdid =
126 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
127 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
128 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
129 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
130 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
131 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
132 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
133 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
134 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
135 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
136 .echo_cmdid = WMI_ECHO_CMDID,
137 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
138 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
139 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
140 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
141 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
142 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
143 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
144 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
145 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
146 };
147
148 /* 10.X WMI cmd track */
149 static struct wmi_cmd_map wmi_10x_cmd_map = {
150 .init_cmdid = WMI_10X_INIT_CMDID,
151 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
152 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
153 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
154 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
155 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
156 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
157 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
158 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
159 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
160 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
161 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
162 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
163 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
164 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
165 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
166 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
167 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
168 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
169 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
170 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
171 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
172 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
173 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
174 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
175 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
176 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
177 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
178 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
179 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
180 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
181 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
182 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
183 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
184 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
185 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
186 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
187 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
188 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
189 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
190 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
191 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
192 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
193 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
194 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
195 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
196 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
197 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
198 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
199 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
200 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
201 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
202 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
203 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
204 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
205 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
206 .roam_scan_rssi_change_threshold =
207 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
208 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
209 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
210 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
211 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
212 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
213 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
214 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
215 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
216 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
217 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
218 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
219 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
220 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
221 .wlan_profile_set_hist_intvl_cmdid =
222 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
223 .wlan_profile_get_profile_data_cmdid =
224 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
225 .wlan_profile_enable_profile_id_cmdid =
226 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
227 .wlan_profile_list_profile_id_cmdid =
228 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
229 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
230 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
231 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
232 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
233 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
234 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
235 .wow_enable_disable_wake_event_cmdid =
236 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
237 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
238 .wow_hostwakeup_from_sleep_cmdid =
239 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
240 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
241 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
242 .vdev_spectral_scan_configure_cmdid =
243 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
244 .vdev_spectral_scan_enable_cmdid =
245 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
246 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
247 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
248 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
249 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
250 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
251 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
252 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
253 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
254 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
255 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
256 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
257 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
258 .echo_cmdid = WMI_10X_ECHO_CMDID,
259 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
260 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
261 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
262 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
263 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
264 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
265 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
266 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
267 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
268 };
269
270 /* MAIN WMI VDEV param map */
271 static struct wmi_vdev_param_map wmi_vdev_param_map = {
272 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
273 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
274 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
275 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
276 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
277 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
278 .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
279 .preamble = WMI_VDEV_PARAM_PREAMBLE,
280 .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
281 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
282 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
283 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
284 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
285 .wmi_vdev_oc_scheduler_air_time_limit =
286 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
287 .wds = WMI_VDEV_PARAM_WDS,
288 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
289 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
290 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
291 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
292 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
293 .chwidth = WMI_VDEV_PARAM_CHWIDTH,
294 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
295 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
296 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
297 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
298 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
299 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
300 .sgi = WMI_VDEV_PARAM_SGI,
301 .ldpc = WMI_VDEV_PARAM_LDPC,
302 .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
303 .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
304 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
305 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
306 .nss = WMI_VDEV_PARAM_NSS,
307 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
308 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
309 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
310 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
311 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
312 .ap_keepalive_min_idle_inactive_time_secs =
313 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
314 .ap_keepalive_max_idle_inactive_time_secs =
315 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
316 .ap_keepalive_max_unresponsive_time_secs =
317 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
318 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
319 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
320 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
321 .txbf = WMI_VDEV_PARAM_TXBF,
322 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
323 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
324 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
325 .ap_detect_out_of_sync_sleeping_sta_time_secs =
326 WMI_VDEV_PARAM_UNSUPPORTED,
327 };
328
329 /* 10.X WMI VDEV param map */
330 static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
331 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
332 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
333 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
334 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
335 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
336 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
337 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
338 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
339 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
340 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
341 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
342 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
343 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
344 .wmi_vdev_oc_scheduler_air_time_limit =
345 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
346 .wds = WMI_10X_VDEV_PARAM_WDS,
347 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
348 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
349 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
350 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
351 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
352 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
353 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
354 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
355 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
356 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
357 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
358 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
359 .sgi = WMI_10X_VDEV_PARAM_SGI,
360 .ldpc = WMI_10X_VDEV_PARAM_LDPC,
361 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
362 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
363 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
364 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
365 .nss = WMI_10X_VDEV_PARAM_NSS,
366 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
367 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
368 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
369 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
370 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
371 .ap_keepalive_min_idle_inactive_time_secs =
372 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
373 .ap_keepalive_max_idle_inactive_time_secs =
374 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
375 .ap_keepalive_max_unresponsive_time_secs =
376 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
377 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
378 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
379 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
380 .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
381 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
382 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
383 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
384 .ap_detect_out_of_sync_sleeping_sta_time_secs =
385 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
386 };
387
388 static struct wmi_pdev_param_map wmi_pdev_param_map = {
389 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
390 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
391 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
392 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
393 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
394 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
395 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
396 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
397 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
398 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
399 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
400 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
401 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
402 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
403 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
404 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
405 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
406 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
407 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
408 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
409 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
410 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
411 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
412 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
413 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
414 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
415 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
416 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
417 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
418 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
419 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
420 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
421 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
422 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
423 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
424 .dcs = WMI_PDEV_PARAM_DCS,
425 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
426 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
427 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
428 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
429 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
430 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
431 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
432 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
433 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
434 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
435 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
436 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
437 };
438
439 static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
440 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
441 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
442 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
443 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
444 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
445 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
446 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
447 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
448 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
449 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
450 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
451 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
452 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
453 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
454 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
455 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
456 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
457 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
458 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
459 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
460 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
461 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
462 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
463 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
464 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
465 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
466 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
467 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
468 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
469 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
470 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
471 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
472 .bcnflt_stats_update_period =
473 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
474 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
475 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
476 .dcs = WMI_10X_PDEV_PARAM_DCS,
477 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
478 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
479 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
480 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
481 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
482 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
483 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
484 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
485 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
486 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
487 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
488 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
489 };
490
491 /* firmware 10.2 specific mappings */
492 static struct wmi_cmd_map wmi_10_2_cmd_map = {
493 .init_cmdid = WMI_10_2_INIT_CMDID,
494 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
495 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
496 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
497 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
498 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
499 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
500 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
501 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
502 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
503 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
504 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
505 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
506 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
507 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
508 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
509 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
510 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
511 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
512 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
513 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
514 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
515 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
516 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
517 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
518 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
519 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
520 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
521 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
522 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
523 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
524 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
525 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
526 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
527 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
528 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
529 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
530 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
531 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
532 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
533 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
534 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
535 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
536 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
537 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
538 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
539 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
540 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
541 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
542 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
543 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
544 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
545 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
546 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
547 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
548 .roam_scan_rssi_change_threshold =
549 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
550 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
551 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
552 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
553 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
554 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
555 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
556 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
557 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
558 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
559 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
560 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
561 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
562 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
563 .wlan_profile_set_hist_intvl_cmdid =
564 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
565 .wlan_profile_get_profile_data_cmdid =
566 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
567 .wlan_profile_enable_profile_id_cmdid =
568 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
569 .wlan_profile_list_profile_id_cmdid =
570 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
571 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
572 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
573 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
574 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
575 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
576 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
577 .wow_enable_disable_wake_event_cmdid =
578 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
579 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
580 .wow_hostwakeup_from_sleep_cmdid =
581 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
582 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
583 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
584 .vdev_spectral_scan_configure_cmdid =
585 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
586 .vdev_spectral_scan_enable_cmdid =
587 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
588 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
589 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
590 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
591 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
592 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
593 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
594 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
595 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
596 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
597 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
598 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
599 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
600 .echo_cmdid = WMI_10_2_ECHO_CMDID,
601 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
602 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
603 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
604 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
605 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
606 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
607 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
608 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
609 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
610 };
611
612 int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
613 {
614 int ret;
615
616 ret = wait_for_completion_timeout(&ar->wmi.service_ready,
617 WMI_SERVICE_READY_TIMEOUT_HZ);
618 return ret;
619 }
620
621 int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
622 {
623 int ret;
624
625 ret = wait_for_completion_timeout(&ar->wmi.unified_ready,
626 WMI_UNIFIED_READY_TIMEOUT_HZ);
627 return ret;
628 }
629
630 struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
631 {
632 struct sk_buff *skb;
633 u32 round_len = roundup(len, 4);
634
635 skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
636 if (!skb)
637 return NULL;
638
639 skb_reserve(skb, WMI_SKB_HEADROOM);
640 if (!IS_ALIGNED((unsigned long)skb->data, 4))
641 ath10k_warn(ar, "Unaligned WMI skb\n");
642
643 skb_put(skb, round_len);
644 memset(skb->data, 0, round_len);
645
646 return skb;
647 }
648
649 static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
650 {
651 dev_kfree_skb(skb);
652 }
653
654 static int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
655 u32 cmd_id)
656 {
657 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
658 struct wmi_cmd_hdr *cmd_hdr;
659 int ret;
660 u32 cmd = 0;
661
662 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
663 return -ENOMEM;
664
665 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
666
667 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
668 cmd_hdr->cmd_id = __cpu_to_le32(cmd);
669
670 memset(skb_cb, 0, sizeof(*skb_cb));
671 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
672 trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret);
673
674 if (ret)
675 goto err_pull;
676
677 return 0;
678
679 err_pull:
680 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
681 return ret;
682 }
683
684 static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
685 {
686 int ret;
687
688 lockdep_assert_held(&arvif->ar->data_lock);
689
690 if (arvif->beacon == NULL)
691 return;
692
693 if (arvif->beacon_sent)
694 return;
695
696 ret = ath10k_wmi_beacon_send_ref_nowait(arvif);
697 if (ret)
698 return;
699
700 /* We need to retain the arvif->beacon reference for DMA unmapping and
701 * freeing the skbuff later. */
702 arvif->beacon_sent = true;
703 }
704
705 static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
706 struct ieee80211_vif *vif)
707 {
708 struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
709
710 ath10k_wmi_tx_beacon_nowait(arvif);
711 }
712
713 static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
714 {
715 spin_lock_bh(&ar->data_lock);
716 ieee80211_iterate_active_interfaces_atomic(ar->hw,
717 IEEE80211_IFACE_ITER_NORMAL,
718 ath10k_wmi_tx_beacons_iter,
719 NULL);
720 spin_unlock_bh(&ar->data_lock);
721 }
722
723 static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
724 {
725 /* try to send pending beacons first. they take priority */
726 ath10k_wmi_tx_beacons_nowait(ar);
727
728 wake_up(&ar->wmi.tx_credits_wq);
729 }
730
731 int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
732 {
733 int ret = -EOPNOTSUPP;
734
735 might_sleep();
736
737 if (cmd_id == WMI_CMD_UNSUPPORTED) {
738 ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
739 cmd_id);
740 return ret;
741 }
742
743 wait_event_timeout(ar->wmi.tx_credits_wq, ({
744 /* try to send pending beacons first. they take priority */
745 ath10k_wmi_tx_beacons_nowait(ar);
746
747 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
748 (ret != -EAGAIN);
749 }), 3*HZ);
750
751 if (ret)
752 dev_kfree_skb_any(skb);
753
754 return ret;
755 }
756
757 int ath10k_wmi_mgmt_tx(struct ath10k *ar, struct sk_buff *skb)
758 {
759 int ret = 0;
760 struct wmi_mgmt_tx_cmd *cmd;
761 struct ieee80211_hdr *hdr;
762 struct sk_buff *wmi_skb;
763 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
764 int len;
765 u32 buf_len = skb->len;
766 u16 fc;
767
768 hdr = (struct ieee80211_hdr *)skb->data;
769 fc = le16_to_cpu(hdr->frame_control);
770
771 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
772 return -EINVAL;
773
774 len = sizeof(cmd->hdr) + skb->len;
775
776 if ((ieee80211_is_action(hdr->frame_control) ||
777 ieee80211_is_deauth(hdr->frame_control) ||
778 ieee80211_is_disassoc(hdr->frame_control)) &&
779 ieee80211_has_protected(hdr->frame_control)) {
780 len += IEEE80211_CCMP_MIC_LEN;
781 buf_len += IEEE80211_CCMP_MIC_LEN;
782 }
783
784 len = round_up(len, 4);
785
786 wmi_skb = ath10k_wmi_alloc_skb(ar, len);
787 if (!wmi_skb)
788 return -ENOMEM;
789
790 cmd = (struct wmi_mgmt_tx_cmd *)wmi_skb->data;
791
792 cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(skb)->vdev_id);
793 cmd->hdr.tx_rate = 0;
794 cmd->hdr.tx_power = 0;
795 cmd->hdr.buf_len = __cpu_to_le32(buf_len);
796
797 memcpy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr), ETH_ALEN);
798 memcpy(cmd->buf, skb->data, skb->len);
799
800 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
801 wmi_skb, wmi_skb->len, fc & IEEE80211_FCTL_FTYPE,
802 fc & IEEE80211_FCTL_STYPE);
803
804 /* Send the management frame buffer to the target */
805 ret = ath10k_wmi_cmd_send(ar, wmi_skb, ar->wmi.cmd->mgmt_tx_cmdid);
806 if (ret)
807 return ret;
808
809 /* TODO: report tx status to mac80211 - temporary just ACK */
810 info->flags |= IEEE80211_TX_STAT_ACK;
811 ieee80211_tx_status_irqsafe(ar->hw, skb);
812
813 return ret;
814 }
815
816 static void ath10k_wmi_event_scan_started(struct ath10k *ar)
817 {
818 lockdep_assert_held(&ar->data_lock);
819
820 switch (ar->scan.state) {
821 case ATH10K_SCAN_IDLE:
822 case ATH10K_SCAN_RUNNING:
823 case ATH10K_SCAN_ABORTING:
824 ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
825 ath10k_scan_state_str(ar->scan.state),
826 ar->scan.state);
827 break;
828 case ATH10K_SCAN_STARTING:
829 ar->scan.state = ATH10K_SCAN_RUNNING;
830
831 if (ar->scan.is_roc)
832 ieee80211_ready_on_channel(ar->hw);
833
834 complete(&ar->scan.started);
835 break;
836 }
837 }
838
839 static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
840 {
841 lockdep_assert_held(&ar->data_lock);
842
843 switch (ar->scan.state) {
844 case ATH10K_SCAN_IDLE:
845 case ATH10K_SCAN_STARTING:
846 /* One suspected reason scan can be completed while starting is
847 * if firmware fails to deliver all scan events to the host,
848 * e.g. when transport pipe is full. This has been observed
849 * with spectral scan phyerr events starving wmi transport
850 * pipe. In such case the "scan completed" event should be (and
851 * is) ignored by the host as it may be just firmware's scan
852 * state machine recovering.
853 */
854 ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
855 ath10k_scan_state_str(ar->scan.state),
856 ar->scan.state);
857 break;
858 case ATH10K_SCAN_RUNNING:
859 case ATH10K_SCAN_ABORTING:
860 __ath10k_scan_finish(ar);
861 break;
862 }
863 }
864
865 static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
866 {
867 lockdep_assert_held(&ar->data_lock);
868
869 switch (ar->scan.state) {
870 case ATH10K_SCAN_IDLE:
871 case ATH10K_SCAN_STARTING:
872 ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
873 ath10k_scan_state_str(ar->scan.state),
874 ar->scan.state);
875 break;
876 case ATH10K_SCAN_RUNNING:
877 case ATH10K_SCAN_ABORTING:
878 ar->scan_channel = NULL;
879 break;
880 }
881 }
882
883 static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
884 {
885 lockdep_assert_held(&ar->data_lock);
886
887 switch (ar->scan.state) {
888 case ATH10K_SCAN_IDLE:
889 case ATH10K_SCAN_STARTING:
890 ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
891 ath10k_scan_state_str(ar->scan.state),
892 ar->scan.state);
893 break;
894 case ATH10K_SCAN_RUNNING:
895 case ATH10K_SCAN_ABORTING:
896 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
897
898 if (ar->scan.is_roc && ar->scan.roc_freq == freq)
899 complete(&ar->scan.on_channel);
900 break;
901 }
902 }
903
904 static const char *
905 ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
906 enum wmi_scan_completion_reason reason)
907 {
908 switch (type) {
909 case WMI_SCAN_EVENT_STARTED:
910 return "started";
911 case WMI_SCAN_EVENT_COMPLETED:
912 switch (reason) {
913 case WMI_SCAN_REASON_COMPLETED:
914 return "completed";
915 case WMI_SCAN_REASON_CANCELLED:
916 return "completed [cancelled]";
917 case WMI_SCAN_REASON_PREEMPTED:
918 return "completed [preempted]";
919 case WMI_SCAN_REASON_TIMEDOUT:
920 return "completed [timedout]";
921 case WMI_SCAN_REASON_MAX:
922 break;
923 }
924 return "completed [unknown]";
925 case WMI_SCAN_EVENT_BSS_CHANNEL:
926 return "bss channel";
927 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
928 return "foreign channel";
929 case WMI_SCAN_EVENT_DEQUEUED:
930 return "dequeued";
931 case WMI_SCAN_EVENT_PREEMPTED:
932 return "preempted";
933 case WMI_SCAN_EVENT_START_FAILED:
934 return "start failed";
935 default:
936 return "unknown";
937 }
938 }
939
940 static int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
941 {
942 struct wmi_scan_event *event = (struct wmi_scan_event *)skb->data;
943 enum wmi_scan_event_type event_type;
944 enum wmi_scan_completion_reason reason;
945 u32 freq;
946 u32 req_id;
947 u32 scan_id;
948 u32 vdev_id;
949
950 event_type = __le32_to_cpu(event->event_type);
951 reason = __le32_to_cpu(event->reason);
952 freq = __le32_to_cpu(event->channel_freq);
953 req_id = __le32_to_cpu(event->scan_req_id);
954 scan_id = __le32_to_cpu(event->scan_id);
955 vdev_id = __le32_to_cpu(event->vdev_id);
956
957 spin_lock_bh(&ar->data_lock);
958
959 ath10k_dbg(ar, ATH10K_DBG_WMI,
960 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
961 ath10k_wmi_event_scan_type_str(event_type, reason),
962 event_type, reason, freq, req_id, scan_id, vdev_id,
963 ath10k_scan_state_str(ar->scan.state), ar->scan.state);
964
965 switch (event_type) {
966 case WMI_SCAN_EVENT_STARTED:
967 ath10k_wmi_event_scan_started(ar);
968 break;
969 case WMI_SCAN_EVENT_COMPLETED:
970 ath10k_wmi_event_scan_completed(ar);
971 break;
972 case WMI_SCAN_EVENT_BSS_CHANNEL:
973 ath10k_wmi_event_scan_bss_chan(ar);
974 break;
975 case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
976 ath10k_wmi_event_scan_foreign_chan(ar, freq);
977 break;
978 case WMI_SCAN_EVENT_START_FAILED:
979 ath10k_warn(ar, "received scan start failure event\n");
980 break;
981 case WMI_SCAN_EVENT_DEQUEUED:
982 case WMI_SCAN_EVENT_PREEMPTED:
983 default:
984 break;
985 }
986
987 spin_unlock_bh(&ar->data_lock);
988 return 0;
989 }
990
991 static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
992 {
993 enum ieee80211_band band;
994
995 switch (phy_mode) {
996 case MODE_11A:
997 case MODE_11NA_HT20:
998 case MODE_11NA_HT40:
999 case MODE_11AC_VHT20:
1000 case MODE_11AC_VHT40:
1001 case MODE_11AC_VHT80:
1002 band = IEEE80211_BAND_5GHZ;
1003 break;
1004 case MODE_11G:
1005 case MODE_11B:
1006 case MODE_11GONLY:
1007 case MODE_11NG_HT20:
1008 case MODE_11NG_HT40:
1009 case MODE_11AC_VHT20_2G:
1010 case MODE_11AC_VHT40_2G:
1011 case MODE_11AC_VHT80_2G:
1012 default:
1013 band = IEEE80211_BAND_2GHZ;
1014 }
1015
1016 return band;
1017 }
1018
1019 static inline u8 get_rate_idx(u32 rate, enum ieee80211_band band)
1020 {
1021 u8 rate_idx = 0;
1022
1023 /* rate in Kbps */
1024 switch (rate) {
1025 case 1000:
1026 rate_idx = 0;
1027 break;
1028 case 2000:
1029 rate_idx = 1;
1030 break;
1031 case 5500:
1032 rate_idx = 2;
1033 break;
1034 case 11000:
1035 rate_idx = 3;
1036 break;
1037 case 6000:
1038 rate_idx = 4;
1039 break;
1040 case 9000:
1041 rate_idx = 5;
1042 break;
1043 case 12000:
1044 rate_idx = 6;
1045 break;
1046 case 18000:
1047 rate_idx = 7;
1048 break;
1049 case 24000:
1050 rate_idx = 8;
1051 break;
1052 case 36000:
1053 rate_idx = 9;
1054 break;
1055 case 48000:
1056 rate_idx = 10;
1057 break;
1058 case 54000:
1059 rate_idx = 11;
1060 break;
1061 default:
1062 break;
1063 }
1064
1065 if (band == IEEE80211_BAND_5GHZ) {
1066 if (rate_idx > 3)
1067 /* Omit CCK rates */
1068 rate_idx -= 4;
1069 else
1070 rate_idx = 0;
1071 }
1072
1073 return rate_idx;
1074 }
1075
1076 static int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
1077 {
1078 struct wmi_mgmt_rx_event_v1 *ev_v1;
1079 struct wmi_mgmt_rx_event_v2 *ev_v2;
1080 struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
1081 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
1082 struct ieee80211_channel *ch;
1083 struct ieee80211_hdr *hdr;
1084 u32 rx_status;
1085 u32 channel;
1086 u32 phy_mode;
1087 u32 snr;
1088 u32 rate;
1089 u32 buf_len;
1090 u16 fc;
1091 int pull_len;
1092
1093 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) {
1094 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
1095 ev_hdr = &ev_v2->hdr.v1;
1096 pull_len = sizeof(*ev_v2);
1097 } else {
1098 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
1099 ev_hdr = &ev_v1->hdr;
1100 pull_len = sizeof(*ev_v1);
1101 }
1102
1103 channel = __le32_to_cpu(ev_hdr->channel);
1104 buf_len = __le32_to_cpu(ev_hdr->buf_len);
1105 rx_status = __le32_to_cpu(ev_hdr->status);
1106 snr = __le32_to_cpu(ev_hdr->snr);
1107 phy_mode = __le32_to_cpu(ev_hdr->phy_mode);
1108 rate = __le32_to_cpu(ev_hdr->rate);
1109
1110 memset(status, 0, sizeof(*status));
1111
1112 ath10k_dbg(ar, ATH10K_DBG_MGMT,
1113 "event mgmt rx status %08x\n", rx_status);
1114
1115 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
1116 dev_kfree_skb(skb);
1117 return 0;
1118 }
1119
1120 if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) {
1121 dev_kfree_skb(skb);
1122 return 0;
1123 }
1124
1125 if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) {
1126 dev_kfree_skb(skb);
1127 return 0;
1128 }
1129
1130 if (rx_status & WMI_RX_STATUS_ERR_CRC)
1131 status->flag |= RX_FLAG_FAILED_FCS_CRC;
1132 if (rx_status & WMI_RX_STATUS_ERR_MIC)
1133 status->flag |= RX_FLAG_MMIC_ERROR;
1134
1135 /* HW can Rx CCK rates on 5GHz. In that case phy_mode is set to
1136 * MODE_11B. This means phy_mode is not a reliable source for the band
1137 * of mgmt rx. */
1138
1139 ch = ar->scan_channel;
1140 if (!ch)
1141 ch = ar->rx_channel;
1142
1143 if (ch) {
1144 status->band = ch->band;
1145
1146 if (phy_mode == MODE_11B &&
1147 status->band == IEEE80211_BAND_5GHZ)
1148 ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
1149 } else {
1150 ath10k_warn(ar, "using (unreliable) phy_mode to extract band for mgmt rx\n");
1151 status->band = phy_mode_to_band(phy_mode);
1152 }
1153
1154 status->freq = ieee80211_channel_to_frequency(channel, status->band);
1155 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
1156 status->rate_idx = get_rate_idx(rate, status->band);
1157
1158 skb_pull(skb, pull_len);
1159
1160 hdr = (struct ieee80211_hdr *)skb->data;
1161 fc = le16_to_cpu(hdr->frame_control);
1162
1163 /* FW delivers WEP Shared Auth frame with Protected Bit set and
1164 * encrypted payload. However in case of PMF it delivers decrypted
1165 * frames with Protected Bit set. */
1166 if (ieee80211_has_protected(hdr->frame_control) &&
1167 !ieee80211_is_auth(hdr->frame_control)) {
1168 status->flag |= RX_FLAG_DECRYPTED;
1169
1170 if (!ieee80211_is_action(hdr->frame_control) &&
1171 !ieee80211_is_deauth(hdr->frame_control) &&
1172 !ieee80211_is_disassoc(hdr->frame_control)) {
1173 status->flag |= RX_FLAG_IV_STRIPPED |
1174 RX_FLAG_MMIC_STRIPPED;
1175 hdr->frame_control = __cpu_to_le16(fc &
1176 ~IEEE80211_FCTL_PROTECTED);
1177 }
1178 }
1179
1180 ath10k_dbg(ar, ATH10K_DBG_MGMT,
1181 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
1182 skb, skb->len,
1183 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
1184
1185 ath10k_dbg(ar, ATH10K_DBG_MGMT,
1186 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
1187 status->freq, status->band, status->signal,
1188 status->rate_idx);
1189
1190 /*
1191 * packets from HTC come aligned to 4byte boundaries
1192 * because they can originally come in along with a trailer
1193 */
1194 skb_trim(skb, buf_len);
1195
1196 ieee80211_rx(ar->hw, skb);
1197 return 0;
1198 }
1199
1200 static int freq_to_idx(struct ath10k *ar, int freq)
1201 {
1202 struct ieee80211_supported_band *sband;
1203 int band, ch, idx = 0;
1204
1205 for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) {
1206 sband = ar->hw->wiphy->bands[band];
1207 if (!sband)
1208 continue;
1209
1210 for (ch = 0; ch < sband->n_channels; ch++, idx++)
1211 if (sband->channels[ch].center_freq == freq)
1212 goto exit;
1213 }
1214
1215 exit:
1216 return idx;
1217 }
1218
1219 static void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
1220 {
1221 struct wmi_chan_info_event *ev;
1222 struct survey_info *survey;
1223 u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
1224 int idx;
1225
1226 ev = (struct wmi_chan_info_event *)skb->data;
1227
1228 err_code = __le32_to_cpu(ev->err_code);
1229 freq = __le32_to_cpu(ev->freq);
1230 cmd_flags = __le32_to_cpu(ev->cmd_flags);
1231 noise_floor = __le32_to_cpu(ev->noise_floor);
1232 rx_clear_count = __le32_to_cpu(ev->rx_clear_count);
1233 cycle_count = __le32_to_cpu(ev->cycle_count);
1234
1235 ath10k_dbg(ar, ATH10K_DBG_WMI,
1236 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
1237 err_code, freq, cmd_flags, noise_floor, rx_clear_count,
1238 cycle_count);
1239
1240 spin_lock_bh(&ar->data_lock);
1241
1242 switch (ar->scan.state) {
1243 case ATH10K_SCAN_IDLE:
1244 case ATH10K_SCAN_STARTING:
1245 ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
1246 goto exit;
1247 case ATH10K_SCAN_RUNNING:
1248 case ATH10K_SCAN_ABORTING:
1249 break;
1250 }
1251
1252 idx = freq_to_idx(ar, freq);
1253 if (idx >= ARRAY_SIZE(ar->survey)) {
1254 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
1255 freq, idx);
1256 goto exit;
1257 }
1258
1259 if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
1260 /* During scanning chan info is reported twice for each
1261 * visited channel. The reported cycle count is global
1262 * and per-channel cycle count must be calculated */
1263
1264 cycle_count -= ar->survey_last_cycle_count;
1265 rx_clear_count -= ar->survey_last_rx_clear_count;
1266
1267 survey = &ar->survey[idx];
1268 survey->channel_time = WMI_CHAN_INFO_MSEC(cycle_count);
1269 survey->channel_time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count);
1270 survey->noise = noise_floor;
1271 survey->filled = SURVEY_INFO_CHANNEL_TIME |
1272 SURVEY_INFO_CHANNEL_TIME_RX |
1273 SURVEY_INFO_NOISE_DBM;
1274 }
1275
1276 ar->survey_last_rx_clear_count = rx_clear_count;
1277 ar->survey_last_cycle_count = cycle_count;
1278
1279 exit:
1280 spin_unlock_bh(&ar->data_lock);
1281 }
1282
1283 static void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
1284 {
1285 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
1286 }
1287
1288 static int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
1289 {
1290 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
1291 skb->len);
1292
1293 trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
1294
1295 return 0;
1296 }
1297
1298 static void ath10k_wmi_event_update_stats(struct ath10k *ar,
1299 struct sk_buff *skb)
1300 {
1301 struct wmi_stats_event *ev = (struct wmi_stats_event *)skb->data;
1302
1303 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
1304
1305 ath10k_debug_read_target_stats(ar, ev);
1306 }
1307
1308 static void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar,
1309 struct sk_buff *skb)
1310 {
1311 struct wmi_vdev_start_response_event *ev;
1312
1313 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
1314
1315 ev = (struct wmi_vdev_start_response_event *)skb->data;
1316
1317 if (WARN_ON(__le32_to_cpu(ev->status)))
1318 return;
1319
1320 complete(&ar->vdev_setup_done);
1321 }
1322
1323 static void ath10k_wmi_event_vdev_stopped(struct ath10k *ar,
1324 struct sk_buff *skb)
1325 {
1326 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
1327 complete(&ar->vdev_setup_done);
1328 }
1329
1330 static void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar,
1331 struct sk_buff *skb)
1332 {
1333 struct wmi_peer_sta_kickout_event *ev;
1334 struct ieee80211_sta *sta;
1335
1336 ev = (struct wmi_peer_sta_kickout_event *)skb->data;
1337
1338 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
1339 ev->peer_macaddr.addr);
1340
1341 rcu_read_lock();
1342
1343 sta = ieee80211_find_sta_by_ifaddr(ar->hw, ev->peer_macaddr.addr, NULL);
1344 if (!sta) {
1345 ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
1346 ev->peer_macaddr.addr);
1347 goto exit;
1348 }
1349
1350 ieee80211_report_low_ack(sta, 10);
1351
1352 exit:
1353 rcu_read_unlock();
1354 }
1355
1356 /*
1357 * FIXME
1358 *
1359 * We don't report to mac80211 sleep state of connected
1360 * stations. Due to this mac80211 can't fill in TIM IE
1361 * correctly.
1362 *
1363 * I know of no way of getting nullfunc frames that contain
1364 * sleep transition from connected stations - these do not
1365 * seem to be sent from the target to the host. There also
1366 * doesn't seem to be a dedicated event for that. So the
1367 * only way left to do this would be to read tim_bitmap
1368 * during SWBA.
1369 *
1370 * We could probably try using tim_bitmap from SWBA to tell
1371 * mac80211 which stations are asleep and which are not. The
1372 * problem here is calling mac80211 functions so many times
1373 * could take too long and make us miss the time to submit
1374 * the beacon to the target.
1375 *
1376 * So as a workaround we try to extend the TIM IE if there
1377 * is unicast buffered for stations with aid > 7 and fill it
1378 * in ourselves.
1379 */
1380 static void ath10k_wmi_update_tim(struct ath10k *ar,
1381 struct ath10k_vif *arvif,
1382 struct sk_buff *bcn,
1383 struct wmi_bcn_info *bcn_info)
1384 {
1385 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
1386 struct ieee80211_tim_ie *tim;
1387 u8 *ies, *ie;
1388 u8 ie_len, pvm_len;
1389 __le32 t;
1390 u32 v;
1391
1392 /* if next SWBA has no tim_changed the tim_bitmap is garbage.
1393 * we must copy the bitmap upon change and reuse it later */
1394 if (__le32_to_cpu(bcn_info->tim_info.tim_changed)) {
1395 int i;
1396
1397 BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) !=
1398 sizeof(bcn_info->tim_info.tim_bitmap));
1399
1400 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) {
1401 t = bcn_info->tim_info.tim_bitmap[i / 4];
1402 v = __le32_to_cpu(t);
1403 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
1404 }
1405
1406 /* FW reports either length 0 or 16
1407 * so we calculate this on our own */
1408 arvif->u.ap.tim_len = 0;
1409 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++)
1410 if (arvif->u.ap.tim_bitmap[i])
1411 arvif->u.ap.tim_len = i;
1412
1413 arvif->u.ap.tim_len++;
1414 }
1415
1416 ies = bcn->data;
1417 ies += ieee80211_hdrlen(hdr->frame_control);
1418 ies += 12; /* fixed parameters */
1419
1420 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
1421 (u8 *)skb_tail_pointer(bcn) - ies);
1422 if (!ie) {
1423 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
1424 ath10k_warn(ar, "no tim ie found;\n");
1425 return;
1426 }
1427
1428 tim = (void *)ie + 2;
1429 ie_len = ie[1];
1430 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
1431
1432 if (pvm_len < arvif->u.ap.tim_len) {
1433 int expand_size = sizeof(arvif->u.ap.tim_bitmap) - pvm_len;
1434 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
1435 void *next_ie = ie + 2 + ie_len;
1436
1437 if (skb_put(bcn, expand_size)) {
1438 memmove(next_ie + expand_size, next_ie, move_size);
1439
1440 ie[1] += expand_size;
1441 ie_len += expand_size;
1442 pvm_len += expand_size;
1443 } else {
1444 ath10k_warn(ar, "tim expansion failed\n");
1445 }
1446 }
1447
1448 if (pvm_len > sizeof(arvif->u.ap.tim_bitmap)) {
1449 ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
1450 return;
1451 }
1452
1453 tim->bitmap_ctrl = !!__le32_to_cpu(bcn_info->tim_info.tim_mcast);
1454 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
1455
1456 if (tim->dtim_count == 0) {
1457 ATH10K_SKB_CB(bcn)->bcn.dtim_zero = true;
1458
1459 if (__le32_to_cpu(bcn_info->tim_info.tim_mcast) == 1)
1460 ATH10K_SKB_CB(bcn)->bcn.deliver_cab = true;
1461 }
1462
1463 ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
1464 tim->dtim_count, tim->dtim_period,
1465 tim->bitmap_ctrl, pvm_len);
1466 }
1467
1468 static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len,
1469 struct wmi_p2p_noa_info *noa)
1470 {
1471 struct ieee80211_p2p_noa_attr *noa_attr;
1472 u8 ctwindow_oppps = noa->ctwindow_oppps;
1473 u8 ctwindow = ctwindow_oppps >> WMI_P2P_OPPPS_CTWINDOW_OFFSET;
1474 bool oppps = !!(ctwindow_oppps & WMI_P2P_OPPPS_ENABLE_BIT);
1475 __le16 *noa_attr_len;
1476 u16 attr_len;
1477 u8 noa_descriptors = noa->num_descriptors;
1478 int i;
1479
1480 /* P2P IE */
1481 data[0] = WLAN_EID_VENDOR_SPECIFIC;
1482 data[1] = len - 2;
1483 data[2] = (WLAN_OUI_WFA >> 16) & 0xff;
1484 data[3] = (WLAN_OUI_WFA >> 8) & 0xff;
1485 data[4] = (WLAN_OUI_WFA >> 0) & 0xff;
1486 data[5] = WLAN_OUI_TYPE_WFA_P2P;
1487
1488 /* NOA ATTR */
1489 data[6] = IEEE80211_P2P_ATTR_ABSENCE_NOTICE;
1490 noa_attr_len = (__le16 *)&data[7]; /* 2 bytes */
1491 noa_attr = (struct ieee80211_p2p_noa_attr *)&data[9];
1492
1493 noa_attr->index = noa->index;
1494 noa_attr->oppps_ctwindow = ctwindow;
1495 if (oppps)
1496 noa_attr->oppps_ctwindow |= IEEE80211_P2P_OPPPS_ENABLE_BIT;
1497
1498 for (i = 0; i < noa_descriptors; i++) {
1499 noa_attr->desc[i].count =
1500 __le32_to_cpu(noa->descriptors[i].type_count);
1501 noa_attr->desc[i].duration = noa->descriptors[i].duration;
1502 noa_attr->desc[i].interval = noa->descriptors[i].interval;
1503 noa_attr->desc[i].start_time = noa->descriptors[i].start_time;
1504 }
1505
1506 attr_len = 2; /* index + oppps_ctwindow */
1507 attr_len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
1508 *noa_attr_len = __cpu_to_le16(attr_len);
1509 }
1510
1511 static u32 ath10k_p2p_calc_noa_ie_len(struct wmi_p2p_noa_info *noa)
1512 {
1513 u32 len = 0;
1514 u8 noa_descriptors = noa->num_descriptors;
1515 u8 opp_ps_info = noa->ctwindow_oppps;
1516 bool opps_enabled = !!(opp_ps_info & WMI_P2P_OPPPS_ENABLE_BIT);
1517
1518 if (!noa_descriptors && !opps_enabled)
1519 return len;
1520
1521 len += 1 + 1 + 4; /* EID + len + OUI */
1522 len += 1 + 2; /* noa attr + attr len */
1523 len += 1 + 1; /* index + oppps_ctwindow */
1524 len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
1525
1526 return len;
1527 }
1528
1529 static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
1530 struct sk_buff *bcn,
1531 struct wmi_bcn_info *bcn_info)
1532 {
1533 struct wmi_p2p_noa_info *noa = &bcn_info->p2p_noa_info;
1534 u8 *new_data, *old_data = arvif->u.ap.noa_data;
1535 u32 new_len;
1536
1537 if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO)
1538 return;
1539
1540 ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
1541 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) {
1542 new_len = ath10k_p2p_calc_noa_ie_len(noa);
1543 if (!new_len)
1544 goto cleanup;
1545
1546 new_data = kmalloc(new_len, GFP_ATOMIC);
1547 if (!new_data)
1548 goto cleanup;
1549
1550 ath10k_p2p_fill_noa_ie(new_data, new_len, noa);
1551
1552 spin_lock_bh(&ar->data_lock);
1553 arvif->u.ap.noa_data = new_data;
1554 arvif->u.ap.noa_len = new_len;
1555 spin_unlock_bh(&ar->data_lock);
1556 kfree(old_data);
1557 }
1558
1559 if (arvif->u.ap.noa_data)
1560 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
1561 memcpy(skb_put(bcn, arvif->u.ap.noa_len),
1562 arvif->u.ap.noa_data,
1563 arvif->u.ap.noa_len);
1564 return;
1565
1566 cleanup:
1567 spin_lock_bh(&ar->data_lock);
1568 arvif->u.ap.noa_data = NULL;
1569 arvif->u.ap.noa_len = 0;
1570 spin_unlock_bh(&ar->data_lock);
1571 kfree(old_data);
1572 }
1573
1574 static void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
1575 {
1576 struct wmi_host_swba_event *ev;
1577 u32 map;
1578 int i = -1;
1579 struct wmi_bcn_info *bcn_info;
1580 struct ath10k_vif *arvif;
1581 struct sk_buff *bcn;
1582 int ret, vdev_id = 0;
1583
1584 ev = (struct wmi_host_swba_event *)skb->data;
1585 map = __le32_to_cpu(ev->vdev_map);
1586
1587 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
1588 ev->vdev_map);
1589
1590 for (; map; map >>= 1, vdev_id++) {
1591 if (!(map & 0x1))
1592 continue;
1593
1594 i++;
1595
1596 if (i >= WMI_MAX_AP_VDEV) {
1597 ath10k_warn(ar, "swba has corrupted vdev map\n");
1598 break;
1599 }
1600
1601 bcn_info = &ev->bcn_info[i];
1602
1603 ath10k_dbg(ar, ATH10K_DBG_MGMT,
1604 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
1605 i,
1606 __le32_to_cpu(bcn_info->tim_info.tim_len),
1607 __le32_to_cpu(bcn_info->tim_info.tim_mcast),
1608 __le32_to_cpu(bcn_info->tim_info.tim_changed),
1609 __le32_to_cpu(bcn_info->tim_info.tim_num_ps_pending),
1610 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[3]),
1611 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[2]),
1612 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[1]),
1613 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[0]));
1614
1615 arvif = ath10k_get_arvif(ar, vdev_id);
1616 if (arvif == NULL) {
1617 ath10k_warn(ar, "no vif for vdev_id %d found\n",
1618 vdev_id);
1619 continue;
1620 }
1621
1622 /* There are no completions for beacons so wait for next SWBA
1623 * before telling mac80211 to decrement CSA counter
1624 *
1625 * Once CSA counter is completed stop sending beacons until
1626 * actual channel switch is done */
1627 if (arvif->vif->csa_active &&
1628 ieee80211_csa_is_complete(arvif->vif)) {
1629 ieee80211_csa_finish(arvif->vif);
1630 continue;
1631 }
1632
1633 bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
1634 if (!bcn) {
1635 ath10k_warn(ar, "could not get mac80211 beacon\n");
1636 continue;
1637 }
1638
1639 ath10k_tx_h_seq_no(arvif->vif, bcn);
1640 ath10k_wmi_update_tim(ar, arvif, bcn, bcn_info);
1641 ath10k_wmi_update_noa(ar, arvif, bcn, bcn_info);
1642
1643 spin_lock_bh(&ar->data_lock);
1644
1645 if (arvif->beacon) {
1646 if (!arvif->beacon_sent)
1647 ath10k_warn(ar, "SWBA overrun on vdev %d\n",
1648 arvif->vdev_id);
1649
1650 dma_unmap_single(arvif->ar->dev,
1651 ATH10K_SKB_CB(arvif->beacon)->paddr,
1652 arvif->beacon->len, DMA_TO_DEVICE);
1653 dev_kfree_skb_any(arvif->beacon);
1654 arvif->beacon = NULL;
1655 }
1656
1657 ATH10K_SKB_CB(bcn)->paddr = dma_map_single(arvif->ar->dev,
1658 bcn->data, bcn->len,
1659 DMA_TO_DEVICE);
1660 ret = dma_mapping_error(arvif->ar->dev,
1661 ATH10K_SKB_CB(bcn)->paddr);
1662 if (ret) {
1663 ath10k_warn(ar, "failed to map beacon: %d\n", ret);
1664 dev_kfree_skb_any(bcn);
1665 goto skip;
1666 }
1667
1668 arvif->beacon = bcn;
1669 arvif->beacon_sent = false;
1670
1671 ath10k_wmi_tx_beacon_nowait(arvif);
1672 skip:
1673 spin_unlock_bh(&ar->data_lock);
1674 }
1675 }
1676
1677 static void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar,
1678 struct sk_buff *skb)
1679 {
1680 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
1681 }
1682
1683 static void ath10k_dfs_radar_report(struct ath10k *ar,
1684 struct wmi_single_phyerr_rx_event *event,
1685 struct phyerr_radar_report *rr,
1686 u64 tsf)
1687 {
1688 u32 reg0, reg1, tsf32l;
1689 struct pulse_event pe;
1690 u64 tsf64;
1691 u8 rssi, width;
1692
1693 reg0 = __le32_to_cpu(rr->reg0);
1694 reg1 = __le32_to_cpu(rr->reg1);
1695
1696 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
1697 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
1698 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
1699 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
1700 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
1701 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
1702 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
1703 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
1704 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
1705 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
1706 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
1707 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
1708 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
1709 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
1710 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
1711 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
1712 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
1713
1714 if (!ar->dfs_detector)
1715 return;
1716
1717 /* report event to DFS pattern detector */
1718 tsf32l = __le32_to_cpu(event->hdr.tsf_timestamp);
1719 tsf64 = tsf & (~0xFFFFFFFFULL);
1720 tsf64 |= tsf32l;
1721
1722 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
1723 rssi = event->hdr.rssi_combined;
1724
1725 /* hardware store this as 8 bit signed value,
1726 * set to zero if negative number
1727 */
1728 if (rssi & 0x80)
1729 rssi = 0;
1730
1731 pe.ts = tsf64;
1732 pe.freq = ar->hw->conf.chandef.chan->center_freq;
1733 pe.width = width;
1734 pe.rssi = rssi;
1735
1736 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
1737 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
1738 pe.freq, pe.width, pe.rssi, pe.ts);
1739
1740 ATH10K_DFS_STAT_INC(ar, pulses_detected);
1741
1742 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
1743 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
1744 "dfs no pulse pattern detected, yet\n");
1745 return;
1746 }
1747
1748 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
1749 ATH10K_DFS_STAT_INC(ar, radar_detected);
1750
1751 /* Control radar events reporting in debugfs file
1752 dfs_block_radar_events */
1753 if (ar->dfs_block_radar_events) {
1754 ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
1755 return;
1756 }
1757
1758 ieee80211_radar_detected(ar->hw);
1759 }
1760
1761 static int ath10k_dfs_fft_report(struct ath10k *ar,
1762 struct wmi_single_phyerr_rx_event *event,
1763 struct phyerr_fft_report *fftr,
1764 u64 tsf)
1765 {
1766 u32 reg0, reg1;
1767 u8 rssi, peak_mag;
1768
1769 reg0 = __le32_to_cpu(fftr->reg0);
1770 reg1 = __le32_to_cpu(fftr->reg1);
1771 rssi = event->hdr.rssi_combined;
1772
1773 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
1774 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
1775 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
1776 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
1777 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
1778 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
1779 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
1780 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
1781 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
1782 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
1783 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
1784 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
1785
1786 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
1787
1788 /* false event detection */
1789 if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
1790 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
1791 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
1792 ATH10K_DFS_STAT_INC(ar, pulses_discarded);
1793 return -EINVAL;
1794 }
1795
1796 return 0;
1797 }
1798
1799 static void ath10k_wmi_event_dfs(struct ath10k *ar,
1800 struct wmi_single_phyerr_rx_event *event,
1801 u64 tsf)
1802 {
1803 int buf_len, tlv_len, res, i = 0;
1804 struct phyerr_tlv *tlv;
1805 struct phyerr_radar_report *rr;
1806 struct phyerr_fft_report *fftr;
1807 u8 *tlv_buf;
1808
1809 buf_len = __le32_to_cpu(event->hdr.buf_len);
1810 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
1811 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
1812 event->hdr.phy_err_code, event->hdr.rssi_combined,
1813 __le32_to_cpu(event->hdr.tsf_timestamp), tsf, buf_len);
1814
1815 /* Skip event if DFS disabled */
1816 if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
1817 return;
1818
1819 ATH10K_DFS_STAT_INC(ar, pulses_total);
1820
1821 while (i < buf_len) {
1822 if (i + sizeof(*tlv) > buf_len) {
1823 ath10k_warn(ar, "too short buf for tlv header (%d)\n",
1824 i);
1825 return;
1826 }
1827
1828 tlv = (struct phyerr_tlv *)&event->bufp[i];
1829 tlv_len = __le16_to_cpu(tlv->len);
1830 tlv_buf = &event->bufp[i + sizeof(*tlv)];
1831 ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
1832 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
1833 tlv_len, tlv->tag, tlv->sig);
1834
1835 switch (tlv->tag) {
1836 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
1837 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
1838 ath10k_warn(ar, "too short radar pulse summary (%d)\n",
1839 i);
1840 return;
1841 }
1842
1843 rr = (struct phyerr_radar_report *)tlv_buf;
1844 ath10k_dfs_radar_report(ar, event, rr, tsf);
1845 break;
1846 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
1847 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
1848 ath10k_warn(ar, "too short fft report (%d)\n",
1849 i);
1850 return;
1851 }
1852
1853 fftr = (struct phyerr_fft_report *)tlv_buf;
1854 res = ath10k_dfs_fft_report(ar, event, fftr, tsf);
1855 if (res)
1856 return;
1857 break;
1858 }
1859
1860 i += sizeof(*tlv) + tlv_len;
1861 }
1862 }
1863
1864 static void
1865 ath10k_wmi_event_spectral_scan(struct ath10k *ar,
1866 struct wmi_single_phyerr_rx_event *event,
1867 u64 tsf)
1868 {
1869 int buf_len, tlv_len, res, i = 0;
1870 struct phyerr_tlv *tlv;
1871 u8 *tlv_buf;
1872 struct phyerr_fft_report *fftr;
1873 size_t fftr_len;
1874
1875 buf_len = __le32_to_cpu(event->hdr.buf_len);
1876
1877 while (i < buf_len) {
1878 if (i + sizeof(*tlv) > buf_len) {
1879 ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
1880 i);
1881 return;
1882 }
1883
1884 tlv = (struct phyerr_tlv *)&event->bufp[i];
1885 tlv_len = __le16_to_cpu(tlv->len);
1886 tlv_buf = &event->bufp[i + sizeof(*tlv)];
1887
1888 if (i + sizeof(*tlv) + tlv_len > buf_len) {
1889 ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
1890 i);
1891 return;
1892 }
1893
1894 switch (tlv->tag) {
1895 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
1896 if (sizeof(*fftr) > tlv_len) {
1897 ath10k_warn(ar, "failed to parse fft report at byte %d\n",
1898 i);
1899 return;
1900 }
1901
1902 fftr_len = tlv_len - sizeof(*fftr);
1903 fftr = (struct phyerr_fft_report *)tlv_buf;
1904 res = ath10k_spectral_process_fft(ar, event,
1905 fftr, fftr_len,
1906 tsf);
1907 if (res < 0) {
1908 ath10k_warn(ar, "failed to process fft report: %d\n",
1909 res);
1910 return;
1911 }
1912 break;
1913 }
1914
1915 i += sizeof(*tlv) + tlv_len;
1916 }
1917 }
1918
1919 static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
1920 {
1921 struct wmi_comb_phyerr_rx_event *comb_event;
1922 struct wmi_single_phyerr_rx_event *event;
1923 u32 count, i, buf_len, phy_err_code;
1924 u64 tsf;
1925 int left_len = skb->len;
1926
1927 ATH10K_DFS_STAT_INC(ar, phy_errors);
1928
1929 /* Check if combined event available */
1930 if (left_len < sizeof(*comb_event)) {
1931 ath10k_warn(ar, "wmi phyerr combined event wrong len\n");
1932 return;
1933 }
1934
1935 left_len -= sizeof(*comb_event);
1936
1937 /* Check number of included events */
1938 comb_event = (struct wmi_comb_phyerr_rx_event *)skb->data;
1939 count = __le32_to_cpu(comb_event->hdr.num_phyerr_events);
1940
1941 tsf = __le32_to_cpu(comb_event->hdr.tsf_u32);
1942 tsf <<= 32;
1943 tsf |= __le32_to_cpu(comb_event->hdr.tsf_l32);
1944
1945 ath10k_dbg(ar, ATH10K_DBG_WMI,
1946 "wmi event phyerr count %d tsf64 0x%llX\n",
1947 count, tsf);
1948
1949 event = (struct wmi_single_phyerr_rx_event *)comb_event->bufp;
1950 for (i = 0; i < count; i++) {
1951 /* Check if we can read event header */
1952 if (left_len < sizeof(*event)) {
1953 ath10k_warn(ar, "single event (%d) wrong head len\n",
1954 i);
1955 return;
1956 }
1957
1958 left_len -= sizeof(*event);
1959
1960 buf_len = __le32_to_cpu(event->hdr.buf_len);
1961 phy_err_code = event->hdr.phy_err_code;
1962
1963 if (left_len < buf_len) {
1964 ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
1965 return;
1966 }
1967
1968 left_len -= buf_len;
1969
1970 switch (phy_err_code) {
1971 case PHY_ERROR_RADAR:
1972 ath10k_wmi_event_dfs(ar, event, tsf);
1973 break;
1974 case PHY_ERROR_SPECTRAL_SCAN:
1975 ath10k_wmi_event_spectral_scan(ar, event, tsf);
1976 break;
1977 case PHY_ERROR_FALSE_RADAR_EXT:
1978 ath10k_wmi_event_dfs(ar, event, tsf);
1979 ath10k_wmi_event_spectral_scan(ar, event, tsf);
1980 break;
1981 default:
1982 break;
1983 }
1984
1985 event += sizeof(*event) + buf_len;
1986 }
1987 }
1988
1989 static void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
1990 {
1991 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n");
1992 }
1993
1994 static void ath10k_wmi_event_profile_match(struct ath10k *ar,
1995 struct sk_buff *skb)
1996 {
1997 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
1998 }
1999
2000 static void ath10k_wmi_event_debug_print(struct ath10k *ar,
2001 struct sk_buff *skb)
2002 {
2003 char buf[101], c;
2004 int i;
2005
2006 for (i = 0; i < sizeof(buf) - 1; i++) {
2007 if (i >= skb->len)
2008 break;
2009
2010 c = skb->data[i];
2011
2012 if (c == '\0')
2013 break;
2014
2015 if (isascii(c) && isprint(c))
2016 buf[i] = c;
2017 else
2018 buf[i] = '.';
2019 }
2020
2021 if (i == sizeof(buf) - 1)
2022 ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
2023
2024 /* for some reason the debug prints end with \n, remove that */
2025 if (skb->data[i - 1] == '\n')
2026 i--;
2027
2028 /* the last byte is always reserved for the null character */
2029 buf[i] = '\0';
2030
2031 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug print '%s'\n", buf);
2032 }
2033
2034 static void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
2035 {
2036 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
2037 }
2038
2039 static void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar,
2040 struct sk_buff *skb)
2041 {
2042 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
2043 }
2044
2045 static void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
2046 struct sk_buff *skb)
2047 {
2048 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
2049 }
2050
2051 static void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
2052 struct sk_buff *skb)
2053 {
2054 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
2055 }
2056
2057 static void ath10k_wmi_event_rtt_error_report(struct ath10k *ar,
2058 struct sk_buff *skb)
2059 {
2060 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
2061 }
2062
2063 static void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar,
2064 struct sk_buff *skb)
2065 {
2066 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n");
2067 }
2068
2069 static void ath10k_wmi_event_dcs_interference(struct ath10k *ar,
2070 struct sk_buff *skb)
2071 {
2072 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
2073 }
2074
2075 static void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar,
2076 struct sk_buff *skb)
2077 {
2078 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n");
2079 }
2080
2081 static void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar,
2082 struct sk_buff *skb)
2083 {
2084 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
2085 }
2086
2087 static void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
2088 struct sk_buff *skb)
2089 {
2090 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
2091 }
2092
2093 static void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar,
2094 struct sk_buff *skb)
2095 {
2096 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
2097 }
2098
2099 static void ath10k_wmi_event_delba_complete(struct ath10k *ar,
2100 struct sk_buff *skb)
2101 {
2102 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
2103 }
2104
2105 static void ath10k_wmi_event_addba_complete(struct ath10k *ar,
2106 struct sk_buff *skb)
2107 {
2108 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
2109 }
2110
2111 static void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
2112 struct sk_buff *skb)
2113 {
2114 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
2115 }
2116
2117 static void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar,
2118 struct sk_buff *skb)
2119 {
2120 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
2121 }
2122
2123 static void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar,
2124 struct sk_buff *skb)
2125 {
2126 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
2127 }
2128
2129 static void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar,
2130 struct sk_buff *skb)
2131 {
2132 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
2133 }
2134
2135 static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
2136 u32 num_units, u32 unit_len)
2137 {
2138 dma_addr_t paddr;
2139 u32 pool_size;
2140 int idx = ar->wmi.num_mem_chunks;
2141
2142 pool_size = num_units * round_up(unit_len, 4);
2143
2144 if (!pool_size)
2145 return -EINVAL;
2146
2147 ar->wmi.mem_chunks[idx].vaddr = dma_alloc_coherent(ar->dev,
2148 pool_size,
2149 &paddr,
2150 GFP_ATOMIC);
2151 if (!ar->wmi.mem_chunks[idx].vaddr) {
2152 ath10k_warn(ar, "failed to allocate memory chunk\n");
2153 return -ENOMEM;
2154 }
2155
2156 memset(ar->wmi.mem_chunks[idx].vaddr, 0, pool_size);
2157
2158 ar->wmi.mem_chunks[idx].paddr = paddr;
2159 ar->wmi.mem_chunks[idx].len = pool_size;
2160 ar->wmi.mem_chunks[idx].req_id = req_id;
2161 ar->wmi.num_mem_chunks++;
2162
2163 return 0;
2164 }
2165
2166 static void ath10k_wmi_service_ready_event_rx(struct ath10k *ar,
2167 struct sk_buff *skb)
2168 {
2169 struct wmi_service_ready_event *ev = (void *)skb->data;
2170 DECLARE_BITMAP(svc_bmap, WMI_SERVICE_MAX) = {};
2171
2172 if (skb->len < sizeof(*ev)) {
2173 ath10k_warn(ar, "Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
2174 skb->len, sizeof(*ev));
2175 return;
2176 }
2177
2178 ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
2179 ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
2180 ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
2181 ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
2182 ar->fw_version_major =
2183 (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
2184 ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
2185 ar->fw_version_release =
2186 (__le32_to_cpu(ev->sw_version_1) & 0xffff0000) >> 16;
2187 ar->fw_version_build = (__le32_to_cpu(ev->sw_version_1) & 0x0000ffff);
2188 ar->phy_capability = __le32_to_cpu(ev->phy_capability);
2189 ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
2190
2191 /* only manually set fw features when not using FW IE format */
2192 if (ar->fw_api == 1 && ar->fw_version_build > 636)
2193 set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features);
2194
2195 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
2196 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
2197 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
2198 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
2199 }
2200
2201 ar->ath_common.regulatory.current_rd =
2202 __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
2203
2204 wmi_main_svc_map(ev->wmi_service_bitmap, svc_bmap);
2205 ath10k_debug_read_service_map(ar, svc_bmap, sizeof(svc_bmap));
2206 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
2207 ev->wmi_service_bitmap, sizeof(ev->wmi_service_bitmap));
2208
2209 if (strlen(ar->hw->wiphy->fw_version) == 0) {
2210 snprintf(ar->hw->wiphy->fw_version,
2211 sizeof(ar->hw->wiphy->fw_version),
2212 "%u.%u.%u.%u",
2213 ar->fw_version_major,
2214 ar->fw_version_minor,
2215 ar->fw_version_release,
2216 ar->fw_version_build);
2217 }
2218
2219 /* FIXME: it probably should be better to support this */
2220 if (__le32_to_cpu(ev->num_mem_reqs) > 0) {
2221 ath10k_warn(ar, "target requested %d memory chunks; ignoring\n",
2222 __le32_to_cpu(ev->num_mem_reqs));
2223 }
2224
2225 ath10k_dbg(ar, ATH10K_DBG_WMI,
2226 "wmi event service ready sw_ver 0x%08x sw_ver1 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
2227 __le32_to_cpu(ev->sw_version),
2228 __le32_to_cpu(ev->sw_version_1),
2229 __le32_to_cpu(ev->abi_version),
2230 __le32_to_cpu(ev->phy_capability),
2231 __le32_to_cpu(ev->ht_cap_info),
2232 __le32_to_cpu(ev->vht_cap_info),
2233 __le32_to_cpu(ev->vht_supp_mcs),
2234 __le32_to_cpu(ev->sys_cap_info),
2235 __le32_to_cpu(ev->num_mem_reqs),
2236 __le32_to_cpu(ev->num_rf_chains));
2237
2238 complete(&ar->wmi.service_ready);
2239 }
2240
2241 static void ath10k_wmi_10x_service_ready_event_rx(struct ath10k *ar,
2242 struct sk_buff *skb)
2243 {
2244 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
2245 int ret;
2246 struct wmi_service_ready_event_10x *ev = (void *)skb->data;
2247 DECLARE_BITMAP(svc_bmap, WMI_SERVICE_MAX) = {};
2248
2249 if (skb->len < sizeof(*ev)) {
2250 ath10k_warn(ar, "Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
2251 skb->len, sizeof(*ev));
2252 return;
2253 }
2254
2255 ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
2256 ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
2257 ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
2258 ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
2259 ar->fw_version_major =
2260 (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
2261 ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
2262 ar->phy_capability = __le32_to_cpu(ev->phy_capability);
2263 ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
2264
2265 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
2266 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
2267 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
2268 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
2269 }
2270
2271 ar->ath_common.regulatory.current_rd =
2272 __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
2273
2274 wmi_10x_svc_map(ev->wmi_service_bitmap, svc_bmap);
2275 ath10k_debug_read_service_map(ar, svc_bmap, sizeof(svc_bmap));
2276 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
2277 ev->wmi_service_bitmap, sizeof(ev->wmi_service_bitmap));
2278
2279 if (strlen(ar->hw->wiphy->fw_version) == 0) {
2280 snprintf(ar->hw->wiphy->fw_version,
2281 sizeof(ar->hw->wiphy->fw_version),
2282 "%u.%u",
2283 ar->fw_version_major,
2284 ar->fw_version_minor);
2285 }
2286
2287 num_mem_reqs = __le32_to_cpu(ev->num_mem_reqs);
2288
2289 if (num_mem_reqs > ATH10K_MAX_MEM_REQS) {
2290 ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
2291 num_mem_reqs);
2292 return;
2293 }
2294
2295 if (!num_mem_reqs)
2296 goto exit;
2297
2298 ath10k_dbg(ar, ATH10K_DBG_WMI, "firmware has requested %d memory chunks\n",
2299 num_mem_reqs);
2300
2301 for (i = 0; i < num_mem_reqs; ++i) {
2302 req_id = __le32_to_cpu(ev->mem_reqs[i].req_id);
2303 num_units = __le32_to_cpu(ev->mem_reqs[i].num_units);
2304 unit_size = __le32_to_cpu(ev->mem_reqs[i].unit_size);
2305 num_unit_info = __le32_to_cpu(ev->mem_reqs[i].num_unit_info);
2306
2307 if (num_unit_info & NUM_UNITS_IS_NUM_PEERS)
2308 /* number of units to allocate is number of
2309 * peers, 1 extra for self peer on target */
2310 /* this needs to be tied, host and target
2311 * can get out of sync */
2312 num_units = TARGET_10X_NUM_PEERS + 1;
2313 else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS)
2314 num_units = TARGET_10X_NUM_VDEVS + 1;
2315
2316 ath10k_dbg(ar, ATH10K_DBG_WMI,
2317 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
2318 req_id,
2319 __le32_to_cpu(ev->mem_reqs[i].num_units),
2320 num_unit_info,
2321 unit_size,
2322 num_units);
2323
2324 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
2325 unit_size);
2326 if (ret)
2327 return;
2328 }
2329
2330 exit:
2331 ath10k_dbg(ar, ATH10K_DBG_WMI,
2332 "wmi event service ready sw_ver 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
2333 __le32_to_cpu(ev->sw_version),
2334 __le32_to_cpu(ev->abi_version),
2335 __le32_to_cpu(ev->phy_capability),
2336 __le32_to_cpu(ev->ht_cap_info),
2337 __le32_to_cpu(ev->vht_cap_info),
2338 __le32_to_cpu(ev->vht_supp_mcs),
2339 __le32_to_cpu(ev->sys_cap_info),
2340 __le32_to_cpu(ev->num_mem_reqs),
2341 __le32_to_cpu(ev->num_rf_chains));
2342
2343 complete(&ar->wmi.service_ready);
2344 }
2345
2346 static int ath10k_wmi_ready_event_rx(struct ath10k *ar, struct sk_buff *skb)
2347 {
2348 struct wmi_ready_event *ev = (struct wmi_ready_event *)skb->data;
2349
2350 if (WARN_ON(skb->len < sizeof(*ev)))
2351 return -EINVAL;
2352
2353 memcpy(ar->mac_addr, ev->mac_addr.addr, ETH_ALEN);
2354
2355 ath10k_dbg(ar, ATH10K_DBG_WMI,
2356 "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d skb->len %i ev-sz %zu\n",
2357 __le32_to_cpu(ev->sw_version),
2358 __le32_to_cpu(ev->abi_version),
2359 ev->mac_addr.addr,
2360 __le32_to_cpu(ev->status), skb->len, sizeof(*ev));
2361
2362 complete(&ar->wmi.unified_ready);
2363 return 0;
2364 }
2365
2366 static void ath10k_wmi_main_process_rx(struct ath10k *ar, struct sk_buff *skb)
2367 {
2368 struct wmi_cmd_hdr *cmd_hdr;
2369 enum wmi_event_id id;
2370
2371 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2372 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2373
2374 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2375 return;
2376
2377 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
2378
2379 switch (id) {
2380 case WMI_MGMT_RX_EVENTID:
2381 ath10k_wmi_event_mgmt_rx(ar, skb);
2382 /* mgmt_rx() owns the skb now! */
2383 return;
2384 case WMI_SCAN_EVENTID:
2385 ath10k_wmi_event_scan(ar, skb);
2386 break;
2387 case WMI_CHAN_INFO_EVENTID:
2388 ath10k_wmi_event_chan_info(ar, skb);
2389 break;
2390 case WMI_ECHO_EVENTID:
2391 ath10k_wmi_event_echo(ar, skb);
2392 break;
2393 case WMI_DEBUG_MESG_EVENTID:
2394 ath10k_wmi_event_debug_mesg(ar, skb);
2395 break;
2396 case WMI_UPDATE_STATS_EVENTID:
2397 ath10k_wmi_event_update_stats(ar, skb);
2398 break;
2399 case WMI_VDEV_START_RESP_EVENTID:
2400 ath10k_wmi_event_vdev_start_resp(ar, skb);
2401 break;
2402 case WMI_VDEV_STOPPED_EVENTID:
2403 ath10k_wmi_event_vdev_stopped(ar, skb);
2404 break;
2405 case WMI_PEER_STA_KICKOUT_EVENTID:
2406 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2407 break;
2408 case WMI_HOST_SWBA_EVENTID:
2409 ath10k_wmi_event_host_swba(ar, skb);
2410 break;
2411 case WMI_TBTTOFFSET_UPDATE_EVENTID:
2412 ath10k_wmi_event_tbttoffset_update(ar, skb);
2413 break;
2414 case WMI_PHYERR_EVENTID:
2415 ath10k_wmi_event_phyerr(ar, skb);
2416 break;
2417 case WMI_ROAM_EVENTID:
2418 ath10k_wmi_event_roam(ar, skb);
2419 break;
2420 case WMI_PROFILE_MATCH:
2421 ath10k_wmi_event_profile_match(ar, skb);
2422 break;
2423 case WMI_DEBUG_PRINT_EVENTID:
2424 ath10k_wmi_event_debug_print(ar, skb);
2425 break;
2426 case WMI_PDEV_QVIT_EVENTID:
2427 ath10k_wmi_event_pdev_qvit(ar, skb);
2428 break;
2429 case WMI_WLAN_PROFILE_DATA_EVENTID:
2430 ath10k_wmi_event_wlan_profile_data(ar, skb);
2431 break;
2432 case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
2433 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2434 break;
2435 case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
2436 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2437 break;
2438 case WMI_RTT_ERROR_REPORT_EVENTID:
2439 ath10k_wmi_event_rtt_error_report(ar, skb);
2440 break;
2441 case WMI_WOW_WAKEUP_HOST_EVENTID:
2442 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2443 break;
2444 case WMI_DCS_INTERFERENCE_EVENTID:
2445 ath10k_wmi_event_dcs_interference(ar, skb);
2446 break;
2447 case WMI_PDEV_TPC_CONFIG_EVENTID:
2448 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2449 break;
2450 case WMI_PDEV_FTM_INTG_EVENTID:
2451 ath10k_wmi_event_pdev_ftm_intg(ar, skb);
2452 break;
2453 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
2454 ath10k_wmi_event_gtk_offload_status(ar, skb);
2455 break;
2456 case WMI_GTK_REKEY_FAIL_EVENTID:
2457 ath10k_wmi_event_gtk_rekey_fail(ar, skb);
2458 break;
2459 case WMI_TX_DELBA_COMPLETE_EVENTID:
2460 ath10k_wmi_event_delba_complete(ar, skb);
2461 break;
2462 case WMI_TX_ADDBA_COMPLETE_EVENTID:
2463 ath10k_wmi_event_addba_complete(ar, skb);
2464 break;
2465 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
2466 ath10k_wmi_event_vdev_install_key_complete(ar, skb);
2467 break;
2468 case WMI_SERVICE_READY_EVENTID:
2469 ath10k_wmi_service_ready_event_rx(ar, skb);
2470 break;
2471 case WMI_READY_EVENTID:
2472 ath10k_wmi_ready_event_rx(ar, skb);
2473 break;
2474 default:
2475 ath10k_warn(ar, "Unknown eventid: %d\n", id);
2476 break;
2477 }
2478
2479 dev_kfree_skb(skb);
2480 }
2481
2482 static void ath10k_wmi_10x_process_rx(struct ath10k *ar, struct sk_buff *skb)
2483 {
2484 struct wmi_cmd_hdr *cmd_hdr;
2485 enum wmi_10x_event_id id;
2486 bool consumed;
2487
2488 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2489 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2490
2491 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2492 return;
2493
2494 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
2495
2496 consumed = ath10k_tm_event_wmi(ar, id, skb);
2497
2498 /* Ready event must be handled normally also in UTF mode so that we
2499 * know the UTF firmware has booted, others we are just bypass WMI
2500 * events to testmode.
2501 */
2502 if (consumed && id != WMI_10X_READY_EVENTID) {
2503 ath10k_dbg(ar, ATH10K_DBG_WMI,
2504 "wmi testmode consumed 0x%x\n", id);
2505 goto out;
2506 }
2507
2508 switch (id) {
2509 case WMI_10X_MGMT_RX_EVENTID:
2510 ath10k_wmi_event_mgmt_rx(ar, skb);
2511 /* mgmt_rx() owns the skb now! */
2512 return;
2513 case WMI_10X_SCAN_EVENTID:
2514 ath10k_wmi_event_scan(ar, skb);
2515 break;
2516 case WMI_10X_CHAN_INFO_EVENTID:
2517 ath10k_wmi_event_chan_info(ar, skb);
2518 break;
2519 case WMI_10X_ECHO_EVENTID:
2520 ath10k_wmi_event_echo(ar, skb);
2521 break;
2522 case WMI_10X_DEBUG_MESG_EVENTID:
2523 ath10k_wmi_event_debug_mesg(ar, skb);
2524 break;
2525 case WMI_10X_UPDATE_STATS_EVENTID:
2526 ath10k_wmi_event_update_stats(ar, skb);
2527 break;
2528 case WMI_10X_VDEV_START_RESP_EVENTID:
2529 ath10k_wmi_event_vdev_start_resp(ar, skb);
2530 break;
2531 case WMI_10X_VDEV_STOPPED_EVENTID:
2532 ath10k_wmi_event_vdev_stopped(ar, skb);
2533 break;
2534 case WMI_10X_PEER_STA_KICKOUT_EVENTID:
2535 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2536 break;
2537 case WMI_10X_HOST_SWBA_EVENTID:
2538 ath10k_wmi_event_host_swba(ar, skb);
2539 break;
2540 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
2541 ath10k_wmi_event_tbttoffset_update(ar, skb);
2542 break;
2543 case WMI_10X_PHYERR_EVENTID:
2544 ath10k_wmi_event_phyerr(ar, skb);
2545 break;
2546 case WMI_10X_ROAM_EVENTID:
2547 ath10k_wmi_event_roam(ar, skb);
2548 break;
2549 case WMI_10X_PROFILE_MATCH:
2550 ath10k_wmi_event_profile_match(ar, skb);
2551 break;
2552 case WMI_10X_DEBUG_PRINT_EVENTID:
2553 ath10k_wmi_event_debug_print(ar, skb);
2554 break;
2555 case WMI_10X_PDEV_QVIT_EVENTID:
2556 ath10k_wmi_event_pdev_qvit(ar, skb);
2557 break;
2558 case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
2559 ath10k_wmi_event_wlan_profile_data(ar, skb);
2560 break;
2561 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
2562 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2563 break;
2564 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
2565 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2566 break;
2567 case WMI_10X_RTT_ERROR_REPORT_EVENTID:
2568 ath10k_wmi_event_rtt_error_report(ar, skb);
2569 break;
2570 case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
2571 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2572 break;
2573 case WMI_10X_DCS_INTERFERENCE_EVENTID:
2574 ath10k_wmi_event_dcs_interference(ar, skb);
2575 break;
2576 case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
2577 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2578 break;
2579 case WMI_10X_INST_RSSI_STATS_EVENTID:
2580 ath10k_wmi_event_inst_rssi_stats(ar, skb);
2581 break;
2582 case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
2583 ath10k_wmi_event_vdev_standby_req(ar, skb);
2584 break;
2585 case WMI_10X_VDEV_RESUME_REQ_EVENTID:
2586 ath10k_wmi_event_vdev_resume_req(ar, skb);
2587 break;
2588 case WMI_10X_SERVICE_READY_EVENTID:
2589 ath10k_wmi_10x_service_ready_event_rx(ar, skb);
2590 break;
2591 case WMI_10X_READY_EVENTID:
2592 ath10k_wmi_ready_event_rx(ar, skb);
2593 break;
2594 case WMI_10X_PDEV_UTF_EVENTID:
2595 /* ignore utf events */
2596 break;
2597 default:
2598 ath10k_warn(ar, "Unknown eventid: %d\n", id);
2599 break;
2600 }
2601
2602 out:
2603 dev_kfree_skb(skb);
2604 }
2605
2606 static void ath10k_wmi_10_2_process_rx(struct ath10k *ar, struct sk_buff *skb)
2607 {
2608 struct wmi_cmd_hdr *cmd_hdr;
2609 enum wmi_10_2_event_id id;
2610
2611 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
2612 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
2613
2614 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
2615 return;
2616
2617 trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
2618
2619 switch (id) {
2620 case WMI_10_2_MGMT_RX_EVENTID:
2621 ath10k_wmi_event_mgmt_rx(ar, skb);
2622 /* mgmt_rx() owns the skb now! */
2623 return;
2624 case WMI_10_2_SCAN_EVENTID:
2625 ath10k_wmi_event_scan(ar, skb);
2626 break;
2627 case WMI_10_2_CHAN_INFO_EVENTID:
2628 ath10k_wmi_event_chan_info(ar, skb);
2629 break;
2630 case WMI_10_2_ECHO_EVENTID:
2631 ath10k_wmi_event_echo(ar, skb);
2632 break;
2633 case WMI_10_2_DEBUG_MESG_EVENTID:
2634 ath10k_wmi_event_debug_mesg(ar, skb);
2635 break;
2636 case WMI_10_2_UPDATE_STATS_EVENTID:
2637 ath10k_wmi_event_update_stats(ar, skb);
2638 break;
2639 case WMI_10_2_VDEV_START_RESP_EVENTID:
2640 ath10k_wmi_event_vdev_start_resp(ar, skb);
2641 break;
2642 case WMI_10_2_VDEV_STOPPED_EVENTID:
2643 ath10k_wmi_event_vdev_stopped(ar, skb);
2644 break;
2645 case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
2646 ath10k_wmi_event_peer_sta_kickout(ar, skb);
2647 break;
2648 case WMI_10_2_HOST_SWBA_EVENTID:
2649 ath10k_wmi_event_host_swba(ar, skb);
2650 break;
2651 case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
2652 ath10k_wmi_event_tbttoffset_update(ar, skb);
2653 break;
2654 case WMI_10_2_PHYERR_EVENTID:
2655 ath10k_wmi_event_phyerr(ar, skb);
2656 break;
2657 case WMI_10_2_ROAM_EVENTID:
2658 ath10k_wmi_event_roam(ar, skb);
2659 break;
2660 case WMI_10_2_PROFILE_MATCH:
2661 ath10k_wmi_event_profile_match(ar, skb);
2662 break;
2663 case WMI_10_2_DEBUG_PRINT_EVENTID:
2664 ath10k_wmi_event_debug_print(ar, skb);
2665 break;
2666 case WMI_10_2_PDEV_QVIT_EVENTID:
2667 ath10k_wmi_event_pdev_qvit(ar, skb);
2668 break;
2669 case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
2670 ath10k_wmi_event_wlan_profile_data(ar, skb);
2671 break;
2672 case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
2673 ath10k_wmi_event_rtt_measurement_report(ar, skb);
2674 break;
2675 case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
2676 ath10k_wmi_event_tsf_measurement_report(ar, skb);
2677 break;
2678 case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
2679 ath10k_wmi_event_rtt_error_report(ar, skb);
2680 break;
2681 case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
2682 ath10k_wmi_event_wow_wakeup_host(ar, skb);
2683 break;
2684 case WMI_10_2_DCS_INTERFERENCE_EVENTID:
2685 ath10k_wmi_event_dcs_interference(ar, skb);
2686 break;
2687 case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
2688 ath10k_wmi_event_pdev_tpc_config(ar, skb);
2689 break;
2690 case WMI_10_2_INST_RSSI_STATS_EVENTID:
2691 ath10k_wmi_event_inst_rssi_stats(ar, skb);
2692 break;
2693 case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
2694 ath10k_wmi_event_vdev_standby_req(ar, skb);
2695 break;
2696 case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
2697 ath10k_wmi_event_vdev_resume_req(ar, skb);
2698 break;
2699 case WMI_10_2_SERVICE_READY_EVENTID:
2700 ath10k_wmi_10x_service_ready_event_rx(ar, skb);
2701 break;
2702 case WMI_10_2_READY_EVENTID:
2703 ath10k_wmi_ready_event_rx(ar, skb);
2704 break;
2705 case WMI_10_2_RTT_KEEPALIVE_EVENTID:
2706 case WMI_10_2_GPIO_INPUT_EVENTID:
2707 case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
2708 case WMI_10_2_GENERIC_BUFFER_EVENTID:
2709 case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
2710 case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
2711 case WMI_10_2_WDS_PEER_EVENTID:
2712 ath10k_dbg(ar, ATH10K_DBG_WMI,
2713 "received event id %d not implemented\n", id);
2714 break;
2715 default:
2716 ath10k_warn(ar, "Unknown eventid: %d\n", id);
2717 break;
2718 }
2719
2720 dev_kfree_skb(skb);
2721 }
2722
2723 static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
2724 {
2725 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
2726 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
2727 ath10k_wmi_10_2_process_rx(ar, skb);
2728 else
2729 ath10k_wmi_10x_process_rx(ar, skb);
2730 } else {
2731 ath10k_wmi_main_process_rx(ar, skb);
2732 }
2733 }
2734
2735 /* WMI Initialization functions */
2736 int ath10k_wmi_attach(struct ath10k *ar)
2737 {
2738 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
2739 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
2740 ar->wmi.cmd = &wmi_10_2_cmd_map;
2741 else
2742 ar->wmi.cmd = &wmi_10x_cmd_map;
2743
2744 ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
2745 ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
2746 } else {
2747 ar->wmi.cmd = &wmi_cmd_map;
2748 ar->wmi.vdev_param = &wmi_vdev_param_map;
2749 ar->wmi.pdev_param = &wmi_pdev_param_map;
2750 }
2751
2752 init_completion(&ar->wmi.service_ready);
2753 init_completion(&ar->wmi.unified_ready);
2754 init_waitqueue_head(&ar->wmi.tx_credits_wq);
2755
2756 return 0;
2757 }
2758
2759 void ath10k_wmi_detach(struct ath10k *ar)
2760 {
2761 int i;
2762
2763 /* free the host memory chunks requested by firmware */
2764 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
2765 dma_free_coherent(ar->dev,
2766 ar->wmi.mem_chunks[i].len,
2767 ar->wmi.mem_chunks[i].vaddr,
2768 ar->wmi.mem_chunks[i].paddr);
2769 }
2770
2771 ar->wmi.num_mem_chunks = 0;
2772 }
2773
2774 int ath10k_wmi_connect(struct ath10k *ar)
2775 {
2776 int status;
2777 struct ath10k_htc_svc_conn_req conn_req;
2778 struct ath10k_htc_svc_conn_resp conn_resp;
2779
2780 memset(&conn_req, 0, sizeof(conn_req));
2781 memset(&conn_resp, 0, sizeof(conn_resp));
2782
2783 /* these fields are the same for all service endpoints */
2784 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
2785 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
2786 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
2787
2788 /* connect to control service */
2789 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
2790
2791 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
2792 if (status) {
2793 ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
2794 status);
2795 return status;
2796 }
2797
2798 ar->wmi.eid = conn_resp.eid;
2799 return 0;
2800 }
2801
2802 static int ath10k_wmi_main_pdev_set_regdomain(struct ath10k *ar, u16 rd,
2803 u16 rd2g, u16 rd5g, u16 ctl2g,
2804 u16 ctl5g)
2805 {
2806 struct wmi_pdev_set_regdomain_cmd *cmd;
2807 struct sk_buff *skb;
2808
2809 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
2810 if (!skb)
2811 return -ENOMEM;
2812
2813 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
2814 cmd->reg_domain = __cpu_to_le32(rd);
2815 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
2816 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
2817 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
2818 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
2819
2820 ath10k_dbg(ar, ATH10K_DBG_WMI,
2821 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
2822 rd, rd2g, rd5g, ctl2g, ctl5g);
2823
2824 return ath10k_wmi_cmd_send(ar, skb,
2825 ar->wmi.cmd->pdev_set_regdomain_cmdid);
2826 }
2827
2828 static int ath10k_wmi_10x_pdev_set_regdomain(struct ath10k *ar, u16 rd,
2829 u16 rd2g, u16 rd5g,
2830 u16 ctl2g, u16 ctl5g,
2831 enum wmi_dfs_region dfs_reg)
2832 {
2833 struct wmi_pdev_set_regdomain_cmd_10x *cmd;
2834 struct sk_buff *skb;
2835
2836 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
2837 if (!skb)
2838 return -ENOMEM;
2839
2840 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
2841 cmd->reg_domain = __cpu_to_le32(rd);
2842 cmd->reg_domain_2G = __cpu_to_le32(rd2g);
2843 cmd->reg_domain_5G = __cpu_to_le32(rd5g);
2844 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
2845 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
2846 cmd->dfs_domain = __cpu_to_le32(dfs_reg);
2847
2848 ath10k_dbg(ar, ATH10K_DBG_WMI,
2849 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
2850 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
2851
2852 return ath10k_wmi_cmd_send(ar, skb,
2853 ar->wmi.cmd->pdev_set_regdomain_cmdid);
2854 }
2855
2856 int ath10k_wmi_pdev_set_regdomain(struct ath10k *ar, u16 rd, u16 rd2g,
2857 u16 rd5g, u16 ctl2g, u16 ctl5g,
2858 enum wmi_dfs_region dfs_reg)
2859 {
2860 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
2861 return ath10k_wmi_10x_pdev_set_regdomain(ar, rd, rd2g, rd5g,
2862 ctl2g, ctl5g, dfs_reg);
2863 else
2864 return ath10k_wmi_main_pdev_set_regdomain(ar, rd, rd2g, rd5g,
2865 ctl2g, ctl5g);
2866 }
2867
2868 int ath10k_wmi_pdev_set_channel(struct ath10k *ar,
2869 const struct wmi_channel_arg *arg)
2870 {
2871 struct wmi_set_channel_cmd *cmd;
2872 struct sk_buff *skb;
2873 u32 ch_flags = 0;
2874
2875 if (arg->passive)
2876 return -EINVAL;
2877
2878 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
2879 if (!skb)
2880 return -ENOMEM;
2881
2882 if (arg->chan_radar)
2883 ch_flags |= WMI_CHAN_FLAG_DFS;
2884
2885 cmd = (struct wmi_set_channel_cmd *)skb->data;
2886 cmd->chan.mhz = __cpu_to_le32(arg->freq);
2887 cmd->chan.band_center_freq1 = __cpu_to_le32(arg->freq);
2888 cmd->chan.mode = arg->mode;
2889 cmd->chan.flags |= __cpu_to_le32(ch_flags);
2890 cmd->chan.min_power = arg->min_power;
2891 cmd->chan.max_power = arg->max_power;
2892 cmd->chan.reg_power = arg->max_reg_power;
2893 cmd->chan.reg_classid = arg->reg_class_id;
2894 cmd->chan.antenna_max = arg->max_antenna_gain;
2895
2896 ath10k_dbg(ar, ATH10K_DBG_WMI,
2897 "wmi set channel mode %d freq %d\n",
2898 arg->mode, arg->freq);
2899
2900 return ath10k_wmi_cmd_send(ar, skb,
2901 ar->wmi.cmd->pdev_set_channel_cmdid);
2902 }
2903
2904 int ath10k_wmi_pdev_suspend_target(struct ath10k *ar, u32 suspend_opt)
2905 {
2906 struct wmi_pdev_suspend_cmd *cmd;
2907 struct sk_buff *skb;
2908
2909 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
2910 if (!skb)
2911 return -ENOMEM;
2912
2913 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
2914 cmd->suspend_opt = __cpu_to_le32(suspend_opt);
2915
2916 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_suspend_cmdid);
2917 }
2918
2919 int ath10k_wmi_pdev_resume_target(struct ath10k *ar)
2920 {
2921 struct sk_buff *skb;
2922
2923 skb = ath10k_wmi_alloc_skb(ar, 0);
2924 if (skb == NULL)
2925 return -ENOMEM;
2926
2927 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_resume_cmdid);
2928 }
2929
2930 int ath10k_wmi_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
2931 {
2932 struct wmi_pdev_set_param_cmd *cmd;
2933 struct sk_buff *skb;
2934
2935 if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
2936 ath10k_warn(ar, "pdev param %d not supported by firmware\n",
2937 id);
2938 return -EOPNOTSUPP;
2939 }
2940
2941 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
2942 if (!skb)
2943 return -ENOMEM;
2944
2945 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
2946 cmd->param_id = __cpu_to_le32(id);
2947 cmd->param_value = __cpu_to_le32(value);
2948
2949 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
2950 id, value);
2951 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_set_param_cmdid);
2952 }
2953
2954 static int ath10k_wmi_main_cmd_init(struct ath10k *ar)
2955 {
2956 struct wmi_init_cmd *cmd;
2957 struct sk_buff *buf;
2958 struct wmi_resource_config config = {};
2959 u32 len, val;
2960 int i;
2961
2962 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
2963 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS + TARGET_NUM_VDEVS);
2964 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
2965
2966 config.num_offload_reorder_bufs =
2967 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
2968
2969 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
2970 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
2971 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
2972 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
2973 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
2974 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2975 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2976 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
2977 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
2978 config.rx_decap_mode = __cpu_to_le32(TARGET_RX_DECAP_MODE);
2979
2980 config.scan_max_pending_reqs =
2981 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
2982
2983 config.bmiss_offload_max_vdev =
2984 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
2985
2986 config.roam_offload_max_vdev =
2987 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
2988
2989 config.roam_offload_max_ap_profiles =
2990 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
2991
2992 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
2993 config.num_mcast_table_elems =
2994 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
2995
2996 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
2997 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
2998 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
2999 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
3000 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
3001
3002 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
3003 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3004
3005 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
3006
3007 config.gtk_offload_max_vdev =
3008 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
3009
3010 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
3011 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
3012
3013 len = sizeof(*cmd) +
3014 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3015
3016 buf = ath10k_wmi_alloc_skb(ar, len);
3017 if (!buf)
3018 return -ENOMEM;
3019
3020 cmd = (struct wmi_init_cmd *)buf->data;
3021
3022 if (ar->wmi.num_mem_chunks == 0) {
3023 cmd->num_host_mem_chunks = 0;
3024 goto out;
3025 }
3026
3027 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
3028 ar->wmi.num_mem_chunks);
3029
3030 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
3031
3032 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
3033 cmd->host_mem_chunks[i].ptr =
3034 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
3035 cmd->host_mem_chunks[i].size =
3036 __cpu_to_le32(ar->wmi.mem_chunks[i].len);
3037 cmd->host_mem_chunks[i].req_id =
3038 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
3039
3040 ath10k_dbg(ar, ATH10K_DBG_WMI,
3041 "wmi chunk %d len %d requested, addr 0x%llx\n",
3042 i,
3043 ar->wmi.mem_chunks[i].len,
3044 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
3045 }
3046 out:
3047 memcpy(&cmd->resource_config, &config, sizeof(config));
3048
3049 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
3050 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
3051 }
3052
3053 static int ath10k_wmi_10x_cmd_init(struct ath10k *ar)
3054 {
3055 struct wmi_init_cmd_10x *cmd;
3056 struct sk_buff *buf;
3057 struct wmi_resource_config_10x config = {};
3058 u32 len, val;
3059 int i;
3060
3061 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
3062 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
3063 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
3064 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
3065 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
3066 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
3067 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
3068 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3069 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3070 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3071 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
3072 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
3073
3074 config.scan_max_pending_reqs =
3075 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
3076
3077 config.bmiss_offload_max_vdev =
3078 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
3079
3080 config.roam_offload_max_vdev =
3081 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
3082
3083 config.roam_offload_max_ap_profiles =
3084 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
3085
3086 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
3087 config.num_mcast_table_elems =
3088 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
3089
3090 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
3091 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
3092 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
3093 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
3094 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
3095
3096 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
3097 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3098
3099 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
3100
3101 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
3102 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
3103
3104 len = sizeof(*cmd) +
3105 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3106
3107 buf = ath10k_wmi_alloc_skb(ar, len);
3108 if (!buf)
3109 return -ENOMEM;
3110
3111 cmd = (struct wmi_init_cmd_10x *)buf->data;
3112
3113 if (ar->wmi.num_mem_chunks == 0) {
3114 cmd->num_host_mem_chunks = 0;
3115 goto out;
3116 }
3117
3118 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
3119 ar->wmi.num_mem_chunks);
3120
3121 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
3122
3123 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
3124 cmd->host_mem_chunks[i].ptr =
3125 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
3126 cmd->host_mem_chunks[i].size =
3127 __cpu_to_le32(ar->wmi.mem_chunks[i].len);
3128 cmd->host_mem_chunks[i].req_id =
3129 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
3130
3131 ath10k_dbg(ar, ATH10K_DBG_WMI,
3132 "wmi chunk %d len %d requested, addr 0x%llx\n",
3133 i,
3134 ar->wmi.mem_chunks[i].len,
3135 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
3136 }
3137 out:
3138 memcpy(&cmd->resource_config, &config, sizeof(config));
3139
3140 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
3141 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
3142 }
3143
3144 static int ath10k_wmi_10_2_cmd_init(struct ath10k *ar)
3145 {
3146 struct wmi_init_cmd_10_2 *cmd;
3147 struct sk_buff *buf;
3148 struct wmi_resource_config_10x config = {};
3149 u32 len, val;
3150 int i;
3151
3152 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
3153 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
3154 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
3155 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
3156 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
3157 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
3158 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
3159 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3160 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3161 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
3162 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
3163 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
3164
3165 config.scan_max_pending_reqs =
3166 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
3167
3168 config.bmiss_offload_max_vdev =
3169 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
3170
3171 config.roam_offload_max_vdev =
3172 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
3173
3174 config.roam_offload_max_ap_profiles =
3175 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
3176
3177 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
3178 config.num_mcast_table_elems =
3179 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
3180
3181 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
3182 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
3183 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
3184 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
3185 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
3186
3187 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
3188 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
3189
3190 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
3191
3192 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
3193 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
3194
3195 len = sizeof(*cmd) +
3196 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
3197
3198 buf = ath10k_wmi_alloc_skb(ar, len);
3199 if (!buf)
3200 return -ENOMEM;
3201
3202 cmd = (struct wmi_init_cmd_10_2 *)buf->data;
3203
3204 if (ar->wmi.num_mem_chunks == 0) {
3205 cmd->num_host_mem_chunks = 0;
3206 goto out;
3207 }
3208
3209 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
3210 ar->wmi.num_mem_chunks);
3211
3212 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
3213
3214 for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
3215 cmd->host_mem_chunks[i].ptr =
3216 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
3217 cmd->host_mem_chunks[i].size =
3218 __cpu_to_le32(ar->wmi.mem_chunks[i].len);
3219 cmd->host_mem_chunks[i].req_id =
3220 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
3221
3222 ath10k_dbg(ar, ATH10K_DBG_WMI,
3223 "wmi chunk %d len %d requested, addr 0x%llx\n",
3224 i,
3225 ar->wmi.mem_chunks[i].len,
3226 (unsigned long long)ar->wmi.mem_chunks[i].paddr);
3227 }
3228 out:
3229 memcpy(&cmd->resource_config.common, &config, sizeof(config));
3230
3231 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
3232 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
3233 }
3234
3235 int ath10k_wmi_cmd_init(struct ath10k *ar)
3236 {
3237 int ret;
3238
3239 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
3240 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
3241 ret = ath10k_wmi_10_2_cmd_init(ar);
3242 else
3243 ret = ath10k_wmi_10x_cmd_init(ar);
3244 } else {
3245 ret = ath10k_wmi_main_cmd_init(ar);
3246 }
3247
3248 return ret;
3249 }
3250
3251 static int ath10k_wmi_start_scan_calc_len(struct ath10k *ar,
3252 const struct wmi_start_scan_arg *arg)
3253 {
3254 int len;
3255
3256 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
3257 len = sizeof(struct wmi_start_scan_cmd_10x);
3258 else
3259 len = sizeof(struct wmi_start_scan_cmd);
3260
3261 if (arg->ie_len) {
3262 if (!arg->ie)
3263 return -EINVAL;
3264 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
3265 return -EINVAL;
3266
3267 len += sizeof(struct wmi_ie_data);
3268 len += roundup(arg->ie_len, 4);
3269 }
3270
3271 if (arg->n_channels) {
3272 if (!arg->channels)
3273 return -EINVAL;
3274 if (arg->n_channels > ARRAY_SIZE(arg->channels))
3275 return -EINVAL;
3276
3277 len += sizeof(struct wmi_chan_list);
3278 len += sizeof(__le32) * arg->n_channels;
3279 }
3280
3281 if (arg->n_ssids) {
3282 if (!arg->ssids)
3283 return -EINVAL;
3284 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
3285 return -EINVAL;
3286
3287 len += sizeof(struct wmi_ssid_list);
3288 len += sizeof(struct wmi_ssid) * arg->n_ssids;
3289 }
3290
3291 if (arg->n_bssids) {
3292 if (!arg->bssids)
3293 return -EINVAL;
3294 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
3295 return -EINVAL;
3296
3297 len += sizeof(struct wmi_bssid_list);
3298 len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
3299 }
3300
3301 return len;
3302 }
3303
3304 int ath10k_wmi_start_scan(struct ath10k *ar,
3305 const struct wmi_start_scan_arg *arg)
3306 {
3307 struct wmi_start_scan_cmd *cmd;
3308 struct sk_buff *skb;
3309 struct wmi_ie_data *ie;
3310 struct wmi_chan_list *channels;
3311 struct wmi_ssid_list *ssids;
3312 struct wmi_bssid_list *bssids;
3313 u32 scan_id;
3314 u32 scan_req_id;
3315 int off;
3316 int len = 0;
3317 int i;
3318
3319 len = ath10k_wmi_start_scan_calc_len(ar, arg);
3320 if (len < 0)
3321 return len; /* len contains error code here */
3322
3323 skb = ath10k_wmi_alloc_skb(ar, len);
3324 if (!skb)
3325 return -ENOMEM;
3326
3327 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
3328 scan_id |= arg->scan_id;
3329
3330 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
3331 scan_req_id |= arg->scan_req_id;
3332
3333 cmd = (struct wmi_start_scan_cmd *)skb->data;
3334 cmd->scan_id = __cpu_to_le32(scan_id);
3335 cmd->scan_req_id = __cpu_to_le32(scan_req_id);
3336 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3337 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
3338 cmd->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
3339 cmd->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
3340 cmd->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
3341 cmd->min_rest_time = __cpu_to_le32(arg->min_rest_time);
3342 cmd->max_rest_time = __cpu_to_le32(arg->max_rest_time);
3343 cmd->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
3344 cmd->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
3345 cmd->idle_time = __cpu_to_le32(arg->idle_time);
3346 cmd->max_scan_time = __cpu_to_le32(arg->max_scan_time);
3347 cmd->probe_delay = __cpu_to_le32(arg->probe_delay);
3348 cmd->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
3349
3350 /* TLV list starts after fields included in the struct */
3351 /* There's just one filed that differes the two start_scan
3352 * structures - burst_duration, which we are not using btw,
3353 no point to make the split here, just shift the buffer to fit with
3354 given FW */
3355 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
3356 off = sizeof(struct wmi_start_scan_cmd_10x);
3357 else
3358 off = sizeof(struct wmi_start_scan_cmd);
3359
3360 if (arg->n_channels) {
3361 channels = (void *)skb->data + off;
3362 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
3363 channels->num_chan = __cpu_to_le32(arg->n_channels);
3364
3365 for (i = 0; i < arg->n_channels; i++)
3366 channels->channel_list[i].freq =
3367 __cpu_to_le16(arg->channels[i]);
3368
3369 off += sizeof(*channels);
3370 off += sizeof(__le32) * arg->n_channels;
3371 }
3372
3373 if (arg->n_ssids) {
3374 ssids = (void *)skb->data + off;
3375 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
3376 ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
3377
3378 for (i = 0; i < arg->n_ssids; i++) {
3379 ssids->ssids[i].ssid_len =
3380 __cpu_to_le32(arg->ssids[i].len);
3381 memcpy(&ssids->ssids[i].ssid,
3382 arg->ssids[i].ssid,
3383 arg->ssids[i].len);
3384 }
3385
3386 off += sizeof(*ssids);
3387 off += sizeof(struct wmi_ssid) * arg->n_ssids;
3388 }
3389
3390 if (arg->n_bssids) {
3391 bssids = (void *)skb->data + off;
3392 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
3393 bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
3394
3395 for (i = 0; i < arg->n_bssids; i++)
3396 memcpy(&bssids->bssid_list[i],
3397 arg->bssids[i].bssid,
3398 ETH_ALEN);
3399
3400 off += sizeof(*bssids);
3401 off += sizeof(struct wmi_mac_addr) * arg->n_bssids;
3402 }
3403
3404 if (arg->ie_len) {
3405 ie = (void *)skb->data + off;
3406 ie->tag = __cpu_to_le32(WMI_IE_TAG);
3407 ie->ie_len = __cpu_to_le32(arg->ie_len);
3408 memcpy(ie->ie_data, arg->ie, arg->ie_len);
3409
3410 off += sizeof(*ie);
3411 off += roundup(arg->ie_len, 4);
3412 }
3413
3414 if (off != skb->len) {
3415 dev_kfree_skb(skb);
3416 return -EINVAL;
3417 }
3418
3419 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
3420 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->start_scan_cmdid);
3421 }
3422
3423 void ath10k_wmi_start_scan_init(struct ath10k *ar,
3424 struct wmi_start_scan_arg *arg)
3425 {
3426 /* setup commonly used values */
3427 arg->scan_req_id = 1;
3428 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
3429 arg->dwell_time_active = 50;
3430 arg->dwell_time_passive = 150;
3431 arg->min_rest_time = 50;
3432 arg->max_rest_time = 500;
3433 arg->repeat_probe_time = 0;
3434 arg->probe_spacing_time = 0;
3435 arg->idle_time = 0;
3436 arg->max_scan_time = 20000;
3437 arg->probe_delay = 5;
3438 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
3439 | WMI_SCAN_EVENT_COMPLETED
3440 | WMI_SCAN_EVENT_BSS_CHANNEL
3441 | WMI_SCAN_EVENT_FOREIGN_CHANNEL
3442 | WMI_SCAN_EVENT_DEQUEUED;
3443 arg->scan_ctrl_flags |= WMI_SCAN_ADD_OFDM_RATES;
3444 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
3445 arg->n_bssids = 1;
3446 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
3447 }
3448
3449 int ath10k_wmi_stop_scan(struct ath10k *ar, const struct wmi_stop_scan_arg *arg)
3450 {
3451 struct wmi_stop_scan_cmd *cmd;
3452 struct sk_buff *skb;
3453 u32 scan_id;
3454 u32 req_id;
3455
3456 if (arg->req_id > 0xFFF)
3457 return -EINVAL;
3458 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
3459 return -EINVAL;
3460
3461 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3462 if (!skb)
3463 return -ENOMEM;
3464
3465 scan_id = arg->u.scan_id;
3466 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
3467
3468 req_id = arg->req_id;
3469 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
3470
3471 cmd = (struct wmi_stop_scan_cmd *)skb->data;
3472 cmd->req_type = __cpu_to_le32(arg->req_type);
3473 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
3474 cmd->scan_id = __cpu_to_le32(scan_id);
3475 cmd->scan_req_id = __cpu_to_le32(req_id);
3476
3477 ath10k_dbg(ar, ATH10K_DBG_WMI,
3478 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
3479 arg->req_id, arg->req_type, arg->u.scan_id);
3480 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->stop_scan_cmdid);
3481 }
3482
3483 int ath10k_wmi_vdev_create(struct ath10k *ar, u32 vdev_id,
3484 enum wmi_vdev_type type,
3485 enum wmi_vdev_subtype subtype,
3486 const u8 macaddr[ETH_ALEN])
3487 {
3488 struct wmi_vdev_create_cmd *cmd;
3489 struct sk_buff *skb;
3490
3491 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3492 if (!skb)
3493 return -ENOMEM;
3494
3495 cmd = (struct wmi_vdev_create_cmd *)skb->data;
3496 cmd->vdev_id = __cpu_to_le32(vdev_id);
3497 cmd->vdev_type = __cpu_to_le32(type);
3498 cmd->vdev_subtype = __cpu_to_le32(subtype);
3499 memcpy(cmd->vdev_macaddr.addr, macaddr, ETH_ALEN);
3500
3501 ath10k_dbg(ar, ATH10K_DBG_WMI,
3502 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
3503 vdev_id, type, subtype, macaddr);
3504
3505 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_create_cmdid);
3506 }
3507
3508 int ath10k_wmi_vdev_delete(struct ath10k *ar, u32 vdev_id)
3509 {
3510 struct wmi_vdev_delete_cmd *cmd;
3511 struct sk_buff *skb;
3512
3513 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3514 if (!skb)
3515 return -ENOMEM;
3516
3517 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
3518 cmd->vdev_id = __cpu_to_le32(vdev_id);
3519
3520 ath10k_dbg(ar, ATH10K_DBG_WMI,
3521 "WMI vdev delete id %d\n", vdev_id);
3522
3523 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_delete_cmdid);
3524 }
3525
3526 static int
3527 ath10k_wmi_vdev_start_restart(struct ath10k *ar,
3528 const struct wmi_vdev_start_request_arg *arg,
3529 u32 cmd_id)
3530 {
3531 struct wmi_vdev_start_request_cmd *cmd;
3532 struct sk_buff *skb;
3533 const char *cmdname;
3534 u32 flags = 0;
3535 u32 ch_flags = 0;
3536
3537 if (cmd_id != ar->wmi.cmd->vdev_start_request_cmdid &&
3538 cmd_id != ar->wmi.cmd->vdev_restart_request_cmdid)
3539 return -EINVAL;
3540 if (WARN_ON(arg->ssid && arg->ssid_len == 0))
3541 return -EINVAL;
3542 if (WARN_ON(arg->hidden_ssid && !arg->ssid))
3543 return -EINVAL;
3544 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
3545 return -EINVAL;
3546
3547 if (cmd_id == ar->wmi.cmd->vdev_start_request_cmdid)
3548 cmdname = "start";
3549 else if (cmd_id == ar->wmi.cmd->vdev_restart_request_cmdid)
3550 cmdname = "restart";
3551 else
3552 return -EINVAL; /* should not happen, we already check cmd_id */
3553
3554 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3555 if (!skb)
3556 return -ENOMEM;
3557
3558 if (arg->hidden_ssid)
3559 flags |= WMI_VDEV_START_HIDDEN_SSID;
3560 if (arg->pmf_enabled)
3561 flags |= WMI_VDEV_START_PMF_ENABLED;
3562 if (arg->channel.chan_radar)
3563 ch_flags |= WMI_CHAN_FLAG_DFS;
3564
3565 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
3566 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3567 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
3568 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
3569 cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
3570 cmd->flags = __cpu_to_le32(flags);
3571 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
3572 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
3573
3574 if (arg->ssid) {
3575 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
3576 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
3577 }
3578
3579 cmd->chan.mhz = __cpu_to_le32(arg->channel.freq);
3580
3581 cmd->chan.band_center_freq1 =
3582 __cpu_to_le32(arg->channel.band_center_freq1);
3583
3584 cmd->chan.mode = arg->channel.mode;
3585 cmd->chan.flags |= __cpu_to_le32(ch_flags);
3586 cmd->chan.min_power = arg->channel.min_power;
3587 cmd->chan.max_power = arg->channel.max_power;
3588 cmd->chan.reg_power = arg->channel.max_reg_power;
3589 cmd->chan.reg_classid = arg->channel.reg_class_id;
3590 cmd->chan.antenna_max = arg->channel.max_antenna_gain;
3591
3592 ath10k_dbg(ar, ATH10K_DBG_WMI,
3593 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, "
3594 "ch_flags: 0x%0X, max_power: %d\n", cmdname, arg->vdev_id,
3595 flags, arg->channel.freq, arg->channel.mode,
3596 cmd->chan.flags, arg->channel.max_power);
3597
3598 return ath10k_wmi_cmd_send(ar, skb, cmd_id);
3599 }
3600
3601 int ath10k_wmi_vdev_start(struct ath10k *ar,
3602 const struct wmi_vdev_start_request_arg *arg)
3603 {
3604 u32 cmd_id = ar->wmi.cmd->vdev_start_request_cmdid;
3605
3606 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
3607 }
3608
3609 int ath10k_wmi_vdev_restart(struct ath10k *ar,
3610 const struct wmi_vdev_start_request_arg *arg)
3611 {
3612 u32 cmd_id = ar->wmi.cmd->vdev_restart_request_cmdid;
3613
3614 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
3615 }
3616
3617 int ath10k_wmi_vdev_stop(struct ath10k *ar, u32 vdev_id)
3618 {
3619 struct wmi_vdev_stop_cmd *cmd;
3620 struct sk_buff *skb;
3621
3622 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3623 if (!skb)
3624 return -ENOMEM;
3625
3626 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
3627 cmd->vdev_id = __cpu_to_le32(vdev_id);
3628
3629 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
3630
3631 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_stop_cmdid);
3632 }
3633
3634 int ath10k_wmi_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, const u8 *bssid)
3635 {
3636 struct wmi_vdev_up_cmd *cmd;
3637 struct sk_buff *skb;
3638
3639 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3640 if (!skb)
3641 return -ENOMEM;
3642
3643 cmd = (struct wmi_vdev_up_cmd *)skb->data;
3644 cmd->vdev_id = __cpu_to_le32(vdev_id);
3645 cmd->vdev_assoc_id = __cpu_to_le32(aid);
3646 memcpy(&cmd->vdev_bssid.addr, bssid, ETH_ALEN);
3647
3648 ath10k_dbg(ar, ATH10K_DBG_WMI,
3649 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
3650 vdev_id, aid, bssid);
3651
3652 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_up_cmdid);
3653 }
3654
3655 int ath10k_wmi_vdev_down(struct ath10k *ar, u32 vdev_id)
3656 {
3657 struct wmi_vdev_down_cmd *cmd;
3658 struct sk_buff *skb;
3659
3660 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3661 if (!skb)
3662 return -ENOMEM;
3663
3664 cmd = (struct wmi_vdev_down_cmd *)skb->data;
3665 cmd->vdev_id = __cpu_to_le32(vdev_id);
3666
3667 ath10k_dbg(ar, ATH10K_DBG_WMI,
3668 "wmi mgmt vdev down id 0x%x\n", vdev_id);
3669
3670 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_down_cmdid);
3671 }
3672
3673 int ath10k_wmi_vdev_set_param(struct ath10k *ar, u32 vdev_id,
3674 u32 param_id, u32 param_value)
3675 {
3676 struct wmi_vdev_set_param_cmd *cmd;
3677 struct sk_buff *skb;
3678
3679 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
3680 ath10k_dbg(ar, ATH10K_DBG_WMI,
3681 "vdev param %d not supported by firmware\n",
3682 param_id);
3683 return -EOPNOTSUPP;
3684 }
3685
3686 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3687 if (!skb)
3688 return -ENOMEM;
3689
3690 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
3691 cmd->vdev_id = __cpu_to_le32(vdev_id);
3692 cmd->param_id = __cpu_to_le32(param_id);
3693 cmd->param_value = __cpu_to_le32(param_value);
3694
3695 ath10k_dbg(ar, ATH10K_DBG_WMI,
3696 "wmi vdev id 0x%x set param %d value %d\n",
3697 vdev_id, param_id, param_value);
3698
3699 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_set_param_cmdid);
3700 }
3701
3702 int ath10k_wmi_vdev_install_key(struct ath10k *ar,
3703 const struct wmi_vdev_install_key_arg *arg)
3704 {
3705 struct wmi_vdev_install_key_cmd *cmd;
3706 struct sk_buff *skb;
3707
3708 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
3709 return -EINVAL;
3710 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
3711 return -EINVAL;
3712
3713 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
3714 if (!skb)
3715 return -ENOMEM;
3716
3717 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
3718 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3719 cmd->key_idx = __cpu_to_le32(arg->key_idx);
3720 cmd->key_flags = __cpu_to_le32(arg->key_flags);
3721 cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
3722 cmd->key_len = __cpu_to_le32(arg->key_len);
3723 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
3724 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
3725
3726 if (arg->macaddr)
3727 memcpy(cmd->peer_macaddr.addr, arg->macaddr, ETH_ALEN);
3728 if (arg->key_data)
3729 memcpy(cmd->key_data, arg->key_data, arg->key_len);
3730
3731 ath10k_dbg(ar, ATH10K_DBG_WMI,
3732 "wmi vdev install key idx %d cipher %d len %d\n",
3733 arg->key_idx, arg->key_cipher, arg->key_len);
3734 return ath10k_wmi_cmd_send(ar, skb,
3735 ar->wmi.cmd->vdev_install_key_cmdid);
3736 }
3737
3738 int ath10k_wmi_vdev_spectral_conf(struct ath10k *ar,
3739 const struct wmi_vdev_spectral_conf_arg *arg)
3740 {
3741 struct wmi_vdev_spectral_conf_cmd *cmd;
3742 struct sk_buff *skb;
3743 u32 cmdid;
3744
3745 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3746 if (!skb)
3747 return -ENOMEM;
3748
3749 cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
3750 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
3751 cmd->scan_count = __cpu_to_le32(arg->scan_count);
3752 cmd->scan_period = __cpu_to_le32(arg->scan_period);
3753 cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
3754 cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
3755 cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
3756 cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
3757 cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
3758 cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
3759 cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
3760 cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
3761 cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
3762 cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
3763 cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
3764 cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
3765 cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
3766 cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
3767 cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
3768 cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
3769
3770 cmdid = ar->wmi.cmd->vdev_spectral_scan_configure_cmdid;
3771 return ath10k_wmi_cmd_send(ar, skb, cmdid);
3772 }
3773
3774 int ath10k_wmi_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id, u32 trigger,
3775 u32 enable)
3776 {
3777 struct wmi_vdev_spectral_enable_cmd *cmd;
3778 struct sk_buff *skb;
3779 u32 cmdid;
3780
3781 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3782 if (!skb)
3783 return -ENOMEM;
3784
3785 cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
3786 cmd->vdev_id = __cpu_to_le32(vdev_id);
3787 cmd->trigger_cmd = __cpu_to_le32(trigger);
3788 cmd->enable_cmd = __cpu_to_le32(enable);
3789
3790 cmdid = ar->wmi.cmd->vdev_spectral_scan_enable_cmdid;
3791 return ath10k_wmi_cmd_send(ar, skb, cmdid);
3792 }
3793
3794 int ath10k_wmi_peer_create(struct ath10k *ar, u32 vdev_id,
3795 const u8 peer_addr[ETH_ALEN])
3796 {
3797 struct wmi_peer_create_cmd *cmd;
3798 struct sk_buff *skb;
3799
3800 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3801 if (!skb)
3802 return -ENOMEM;
3803
3804 cmd = (struct wmi_peer_create_cmd *)skb->data;
3805 cmd->vdev_id = __cpu_to_le32(vdev_id);
3806 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3807
3808 ath10k_dbg(ar, ATH10K_DBG_WMI,
3809 "wmi peer create vdev_id %d peer_addr %pM\n",
3810 vdev_id, peer_addr);
3811 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_create_cmdid);
3812 }
3813
3814 int ath10k_wmi_peer_delete(struct ath10k *ar, u32 vdev_id,
3815 const u8 peer_addr[ETH_ALEN])
3816 {
3817 struct wmi_peer_delete_cmd *cmd;
3818 struct sk_buff *skb;
3819
3820 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3821 if (!skb)
3822 return -ENOMEM;
3823
3824 cmd = (struct wmi_peer_delete_cmd *)skb->data;
3825 cmd->vdev_id = __cpu_to_le32(vdev_id);
3826 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3827
3828 ath10k_dbg(ar, ATH10K_DBG_WMI,
3829 "wmi peer delete vdev_id %d peer_addr %pM\n",
3830 vdev_id, peer_addr);
3831 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_delete_cmdid);
3832 }
3833
3834 int ath10k_wmi_peer_flush(struct ath10k *ar, u32 vdev_id,
3835 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
3836 {
3837 struct wmi_peer_flush_tids_cmd *cmd;
3838 struct sk_buff *skb;
3839
3840 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3841 if (!skb)
3842 return -ENOMEM;
3843
3844 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
3845 cmd->vdev_id = __cpu_to_le32(vdev_id);
3846 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
3847 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3848
3849 ath10k_dbg(ar, ATH10K_DBG_WMI,
3850 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
3851 vdev_id, peer_addr, tid_bitmap);
3852 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_flush_tids_cmdid);
3853 }
3854
3855 int ath10k_wmi_peer_set_param(struct ath10k *ar, u32 vdev_id,
3856 const u8 *peer_addr, enum wmi_peer_param param_id,
3857 u32 param_value)
3858 {
3859 struct wmi_peer_set_param_cmd *cmd;
3860 struct sk_buff *skb;
3861
3862 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3863 if (!skb)
3864 return -ENOMEM;
3865
3866 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
3867 cmd->vdev_id = __cpu_to_le32(vdev_id);
3868 cmd->param_id = __cpu_to_le32(param_id);
3869 cmd->param_value = __cpu_to_le32(param_value);
3870 memcpy(&cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
3871
3872 ath10k_dbg(ar, ATH10K_DBG_WMI,
3873 "wmi vdev %d peer 0x%pM set param %d value %d\n",
3874 vdev_id, peer_addr, param_id, param_value);
3875
3876 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_set_param_cmdid);
3877 }
3878
3879 int ath10k_wmi_set_psmode(struct ath10k *ar, u32 vdev_id,
3880 enum wmi_sta_ps_mode psmode)
3881 {
3882 struct wmi_sta_powersave_mode_cmd *cmd;
3883 struct sk_buff *skb;
3884
3885 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3886 if (!skb)
3887 return -ENOMEM;
3888
3889 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
3890 cmd->vdev_id = __cpu_to_le32(vdev_id);
3891 cmd->sta_ps_mode = __cpu_to_le32(psmode);
3892
3893 ath10k_dbg(ar, ATH10K_DBG_WMI,
3894 "wmi set powersave id 0x%x mode %d\n",
3895 vdev_id, psmode);
3896
3897 return ath10k_wmi_cmd_send(ar, skb,
3898 ar->wmi.cmd->sta_powersave_mode_cmdid);
3899 }
3900
3901 int ath10k_wmi_set_sta_ps_param(struct ath10k *ar, u32 vdev_id,
3902 enum wmi_sta_powersave_param param_id,
3903 u32 value)
3904 {
3905 struct wmi_sta_powersave_param_cmd *cmd;
3906 struct sk_buff *skb;
3907
3908 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3909 if (!skb)
3910 return -ENOMEM;
3911
3912 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
3913 cmd->vdev_id = __cpu_to_le32(vdev_id);
3914 cmd->param_id = __cpu_to_le32(param_id);
3915 cmd->param_value = __cpu_to_le32(value);
3916
3917 ath10k_dbg(ar, ATH10K_DBG_WMI,
3918 "wmi sta ps param vdev_id 0x%x param %d value %d\n",
3919 vdev_id, param_id, value);
3920 return ath10k_wmi_cmd_send(ar, skb,
3921 ar->wmi.cmd->sta_powersave_param_cmdid);
3922 }
3923
3924 int ath10k_wmi_set_ap_ps_param(struct ath10k *ar, u32 vdev_id, const u8 *mac,
3925 enum wmi_ap_ps_peer_param param_id, u32 value)
3926 {
3927 struct wmi_ap_ps_peer_cmd *cmd;
3928 struct sk_buff *skb;
3929
3930 if (!mac)
3931 return -EINVAL;
3932
3933 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
3934 if (!skb)
3935 return -ENOMEM;
3936
3937 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
3938 cmd->vdev_id = __cpu_to_le32(vdev_id);
3939 cmd->param_id = __cpu_to_le32(param_id);
3940 cmd->param_value = __cpu_to_le32(value);
3941 memcpy(&cmd->peer_macaddr, mac, ETH_ALEN);
3942
3943 ath10k_dbg(ar, ATH10K_DBG_WMI,
3944 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
3945 vdev_id, param_id, value, mac);
3946
3947 return ath10k_wmi_cmd_send(ar, skb,
3948 ar->wmi.cmd->ap_ps_peer_param_cmdid);
3949 }
3950
3951 int ath10k_wmi_scan_chan_list(struct ath10k *ar,
3952 const struct wmi_scan_chan_list_arg *arg)
3953 {
3954 struct wmi_scan_chan_list_cmd *cmd;
3955 struct sk_buff *skb;
3956 struct wmi_channel_arg *ch;
3957 struct wmi_channel *ci;
3958 int len;
3959 int i;
3960
3961 len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
3962
3963 skb = ath10k_wmi_alloc_skb(ar, len);
3964 if (!skb)
3965 return -EINVAL;
3966
3967 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
3968 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
3969
3970 for (i = 0; i < arg->n_channels; i++) {
3971 u32 flags = 0;
3972
3973 ch = &arg->channels[i];
3974 ci = &cmd->chan_info[i];
3975
3976 if (ch->passive)
3977 flags |= WMI_CHAN_FLAG_PASSIVE;
3978 if (ch->allow_ibss)
3979 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
3980 if (ch->allow_ht)
3981 flags |= WMI_CHAN_FLAG_ALLOW_HT;
3982 if (ch->allow_vht)
3983 flags |= WMI_CHAN_FLAG_ALLOW_VHT;
3984 if (ch->ht40plus)
3985 flags |= WMI_CHAN_FLAG_HT40_PLUS;
3986 if (ch->chan_radar)
3987 flags |= WMI_CHAN_FLAG_DFS;
3988
3989 ci->mhz = __cpu_to_le32(ch->freq);
3990 ci->band_center_freq1 = __cpu_to_le32(ch->freq);
3991 ci->band_center_freq2 = 0;
3992 ci->min_power = ch->min_power;
3993 ci->max_power = ch->max_power;
3994 ci->reg_power = ch->max_reg_power;
3995 ci->antenna_max = ch->max_antenna_gain;
3996
3997 /* mode & flags share storage */
3998 ci->mode = ch->mode;
3999 ci->flags |= __cpu_to_le32(flags);
4000 }
4001
4002 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->scan_chan_list_cmdid);
4003 }
4004
4005 static void
4006 ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
4007 const struct wmi_peer_assoc_complete_arg *arg)
4008 {
4009 struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
4010
4011 cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
4012 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
4013 cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
4014 cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
4015 cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
4016 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
4017 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
4018 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
4019 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
4020 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
4021 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
4022 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
4023 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
4024
4025 memcpy(cmd->peer_macaddr.addr, arg->addr, ETH_ALEN);
4026
4027 cmd->peer_legacy_rates.num_rates =
4028 __cpu_to_le32(arg->peer_legacy_rates.num_rates);
4029 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
4030 arg->peer_legacy_rates.num_rates);
4031
4032 cmd->peer_ht_rates.num_rates =
4033 __cpu_to_le32(arg->peer_ht_rates.num_rates);
4034 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
4035 arg->peer_ht_rates.num_rates);
4036
4037 cmd->peer_vht_rates.rx_max_rate =
4038 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
4039 cmd->peer_vht_rates.rx_mcs_set =
4040 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
4041 cmd->peer_vht_rates.tx_max_rate =
4042 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
4043 cmd->peer_vht_rates.tx_mcs_set =
4044 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
4045 }
4046
4047 static void
4048 ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
4049 const struct wmi_peer_assoc_complete_arg *arg)
4050 {
4051 struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
4052
4053 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4054 memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
4055 }
4056
4057 static void
4058 ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
4059 const struct wmi_peer_assoc_complete_arg *arg)
4060 {
4061 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4062 }
4063
4064 static void
4065 ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
4066 const struct wmi_peer_assoc_complete_arg *arg)
4067 {
4068 struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
4069 int max_mcs, max_nss;
4070 u32 info0;
4071
4072 /* TODO: Is using max values okay with firmware? */
4073 max_mcs = 0xf;
4074 max_nss = 0xf;
4075
4076 info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
4077 SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
4078
4079 ath10k_wmi_peer_assoc_fill(ar, buf, arg);
4080 cmd->info0 = __cpu_to_le32(info0);
4081 }
4082
4083 int ath10k_wmi_peer_assoc(struct ath10k *ar,
4084 const struct wmi_peer_assoc_complete_arg *arg)
4085 {
4086 struct sk_buff *skb;
4087 int len;
4088
4089 if (arg->peer_mpdu_density > 16)
4090 return -EINVAL;
4091 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
4092 return -EINVAL;
4093 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
4094 return -EINVAL;
4095
4096 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
4097 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
4098 len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
4099 else
4100 len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
4101 } else {
4102 len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
4103 }
4104
4105 skb = ath10k_wmi_alloc_skb(ar, len);
4106 if (!skb)
4107 return -ENOMEM;
4108
4109 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
4110 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features))
4111 ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
4112 else
4113 ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
4114 } else {
4115 ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
4116 }
4117
4118 ath10k_dbg(ar, ATH10K_DBG_WMI,
4119 "wmi peer assoc vdev %d addr %pM (%s)\n",
4120 arg->vdev_id, arg->addr,
4121 arg->peer_reassoc ? "reassociate" : "new");
4122 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_assoc_cmdid);
4123 }
4124
4125 /* This function assumes the beacon is already DMA mapped */
4126 int ath10k_wmi_beacon_send_ref_nowait(struct ath10k_vif *arvif)
4127 {
4128 struct wmi_bcn_tx_ref_cmd *cmd;
4129 struct sk_buff *skb;
4130 struct sk_buff *beacon = arvif->beacon;
4131 struct ath10k *ar = arvif->ar;
4132 struct ieee80211_hdr *hdr;
4133 int ret;
4134 u16 fc;
4135
4136 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4137 if (!skb)
4138 return -ENOMEM;
4139
4140 hdr = (struct ieee80211_hdr *)beacon->data;
4141 fc = le16_to_cpu(hdr->frame_control);
4142
4143 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
4144 cmd->vdev_id = __cpu_to_le32(arvif->vdev_id);
4145 cmd->data_len = __cpu_to_le32(beacon->len);
4146 cmd->data_ptr = __cpu_to_le32(ATH10K_SKB_CB(beacon)->paddr);
4147 cmd->msdu_id = 0;
4148 cmd->frame_control = __cpu_to_le32(fc);
4149 cmd->flags = 0;
4150 cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
4151
4152 if (ATH10K_SKB_CB(beacon)->bcn.dtim_zero)
4153 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
4154
4155 if (ATH10K_SKB_CB(beacon)->bcn.deliver_cab)
4156 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
4157
4158 ret = ath10k_wmi_cmd_send_nowait(ar, skb,
4159 ar->wmi.cmd->pdev_send_bcn_cmdid);
4160
4161 if (ret)
4162 dev_kfree_skb(skb);
4163
4164 return ret;
4165 }
4166
4167 static void ath10k_wmi_pdev_set_wmm_param(struct wmi_wmm_params *params,
4168 const struct wmi_wmm_params_arg *arg)
4169 {
4170 params->cwmin = __cpu_to_le32(arg->cwmin);
4171 params->cwmax = __cpu_to_le32(arg->cwmax);
4172 params->aifs = __cpu_to_le32(arg->aifs);
4173 params->txop = __cpu_to_le32(arg->txop);
4174 params->acm = __cpu_to_le32(arg->acm);
4175 params->no_ack = __cpu_to_le32(arg->no_ack);
4176 }
4177
4178 int ath10k_wmi_pdev_set_wmm_params(struct ath10k *ar,
4179 const struct wmi_pdev_set_wmm_params_arg *arg)
4180 {
4181 struct wmi_pdev_set_wmm_params *cmd;
4182 struct sk_buff *skb;
4183
4184 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4185 if (!skb)
4186 return -ENOMEM;
4187
4188 cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
4189 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_be, &arg->ac_be);
4190 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
4191 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
4192 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
4193
4194 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
4195 return ath10k_wmi_cmd_send(ar, skb,
4196 ar->wmi.cmd->pdev_set_wmm_params_cmdid);
4197 }
4198
4199 int ath10k_wmi_request_stats(struct ath10k *ar, enum wmi_stats_id stats_id)
4200 {
4201 struct wmi_request_stats_cmd *cmd;
4202 struct sk_buff *skb;
4203
4204 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4205 if (!skb)
4206 return -ENOMEM;
4207
4208 cmd = (struct wmi_request_stats_cmd *)skb->data;
4209 cmd->stats_id = __cpu_to_le32(stats_id);
4210
4211 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats %d\n", (int)stats_id);
4212 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->request_stats_cmdid);
4213 }
4214
4215 int ath10k_wmi_force_fw_hang(struct ath10k *ar,
4216 enum wmi_force_fw_hang_type type, u32 delay_ms)
4217 {
4218 struct wmi_force_fw_hang_cmd *cmd;
4219 struct sk_buff *skb;
4220
4221 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4222 if (!skb)
4223 return -ENOMEM;
4224
4225 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
4226 cmd->type = __cpu_to_le32(type);
4227 cmd->delay_ms = __cpu_to_le32(delay_ms);
4228
4229 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
4230 type, delay_ms);
4231 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->force_fw_hang_cmdid);
4232 }
4233
4234 int ath10k_wmi_dbglog_cfg(struct ath10k *ar, u32 module_enable)
4235 {
4236 struct wmi_dbglog_cfg_cmd *cmd;
4237 struct sk_buff *skb;
4238 u32 cfg;
4239
4240 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
4241 if (!skb)
4242 return -ENOMEM;
4243
4244 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
4245
4246 if (module_enable) {
4247 cfg = SM(ATH10K_DBGLOG_LEVEL_VERBOSE,
4248 ATH10K_DBGLOG_CFG_LOG_LVL);
4249 } else {
4250 /* set back defaults, all modules with WARN level */
4251 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
4252 ATH10K_DBGLOG_CFG_LOG_LVL);
4253 module_enable = ~0;
4254 }
4255
4256 cmd->module_enable = __cpu_to_le32(module_enable);
4257 cmd->module_valid = __cpu_to_le32(~0);
4258 cmd->config_enable = __cpu_to_le32(cfg);
4259 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
4260
4261 ath10k_dbg(ar, ATH10K_DBG_WMI,
4262 "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
4263 __le32_to_cpu(cmd->module_enable),
4264 __le32_to_cpu(cmd->module_valid),
4265 __le32_to_cpu(cmd->config_enable),
4266 __le32_to_cpu(cmd->config_valid));
4267
4268 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->dbglog_cfg_cmdid);
4269 }
Linux kernel - Deliverables
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