2 * Copyright (c) 2010-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
21 #include <linux/etherdevice.h>
22 #include <linux/rtnetlink.h>
23 #include <linux/firmware.h>
24 #include <linux/sched.h>
25 #include <linux/circ_buf.h>
26 #include <net/cfg80211.h>
33 #define ATH6KL_MAX_RX_BUFFERS 16
34 #define ATH6KL_BUFFER_SIZE 1664
35 #define ATH6KL_MAX_AMSDU_RX_BUFFERS 4
36 #define ATH6KL_AMSDU_REFILL_THRESHOLD 3
37 #define ATH6KL_AMSDU_BUFFER_SIZE (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128)
38 #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN 1508
39 #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN 46
41 #define USER_SAVEDKEYS_STAT_INIT 0
42 #define USER_SAVEDKEYS_STAT_RUN 1
44 #define ATH6KL_TX_TIMEOUT 10
45 #define ATH6KL_MAX_ENDPOINTS 4
46 #define MAX_NODE_NUM 15
48 #define ATH6KL_APSD_ALL_FRAME 0xFFFF
49 #define ATH6KL_APSD_NUM_OF_AC 0x4
50 #define ATH6KL_APSD_FRAME_MASK 0xF
52 /* Extra bytes for htc header alignment */
53 #define ATH6KL_HTC_ALIGN_BYTES 3
55 /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */
56 #define MAX_DEF_COOKIE_NUM 180
57 #define MAX_HI_COOKIE_NUM 18 /* 10% of MAX_COOKIE_NUM */
58 #define MAX_COOKIE_NUM (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM)
60 #define MAX_DEFAULT_SEND_QUEUE_DEPTH (MAX_DEF_COOKIE_NUM / WMM_NUM_AC)
62 #define DISCON_TIMER_INTVAL 10000 /* in msec */
63 #define A_DEFAULT_LISTEN_INTERVAL 1 /* beacon intervals */
64 #define A_MAX_WOW_LISTEN_INTERVAL 1000
66 /* includes also the null byte */
67 #define ATH6KL_FIRMWARE_MAGIC "QCA-ATH6KL"
69 enum ath6kl_fw_ie_type
{
70 ATH6KL_FW_IE_FW_VERSION
= 0,
71 ATH6KL_FW_IE_TIMESTAMP
= 1,
72 ATH6KL_FW_IE_OTP_IMAGE
= 2,
73 ATH6KL_FW_IE_FW_IMAGE
= 3,
74 ATH6KL_FW_IE_PATCH_IMAGE
= 4,
75 ATH6KL_FW_IE_RESERVED_RAM_SIZE
= 5,
76 ATH6KL_FW_IE_CAPABILITIES
= 6,
77 ATH6KL_FW_IE_PATCH_ADDR
= 7,
78 ATH6KL_FW_IE_BOARD_ADDR
= 8,
79 ATH6KL_FW_IE_VIF_MAX
= 9,
82 enum ath6kl_fw_capability
{
83 ATH6KL_FW_CAPABILITY_HOST_P2P
= 0,
84 ATH6KL_FW_CAPABILITY_SCHED_SCAN
= 1,
87 * Firmware is capable of supporting P2P mgmt operations on a
88 * station interface. After group formation, the station
89 * interface will become a P2P client/GO interface as the case may be
91 ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX
,
93 /* this needs to be last */
94 ATH6KL_FW_CAPABILITY_MAX
,
97 #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32)
105 #define ATH6KL_FW_API2_FILE "fw-2.bin"
106 #define ATH6KL_FW_API3_FILE "fw-3.bin"
108 /* AR6003 1.0 definitions */
109 #define AR6003_HW_1_0_VERSION 0x300002ba
111 /* AR6003 2.0 definitions */
112 #define AR6003_HW_2_0_VERSION 0x30000384
113 #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS 0x57e910
114 #define AR6003_HW_2_0_FW_DIR "ath6k/AR6003/hw2.0"
115 #define AR6003_HW_2_0_OTP_FILE "otp.bin.z77"
116 #define AR6003_HW_2_0_FIRMWARE_FILE "athwlan.bin.z77"
117 #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE "athtcmd_ram.bin"
118 #define AR6003_HW_2_0_PATCH_FILE "data.patch.bin"
119 #define AR6003_HW_2_0_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.bin"
120 #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \
121 "ath6k/AR6003/hw2.0/bdata.SD31.bin"
123 /* AR6003 3.0 definitions */
124 #define AR6003_HW_2_1_1_VERSION 0x30000582
125 #define AR6003_HW_2_1_1_FW_DIR "ath6k/AR6003/hw2.1.1"
126 #define AR6003_HW_2_1_1_OTP_FILE "otp.bin"
127 #define AR6003_HW_2_1_1_FIRMWARE_FILE "athwlan.bin"
128 #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE "athtcmd_ram.bin"
129 #define AR6003_HW_2_1_1_UTF_FIRMWARE_FILE "utf.bin"
130 #define AR6003_HW_2_1_1_TESTSCRIPT_FILE "nullTestFlow.bin"
131 #define AR6003_HW_2_1_1_PATCH_FILE "data.patch.bin"
132 #define AR6003_HW_2_1_1_BOARD_DATA_FILE "ath6k/AR6003/hw2.1.1/bdata.bin"
133 #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE \
134 "ath6k/AR6003/hw2.1.1/bdata.SD31.bin"
136 /* AR6004 1.0 definitions */
137 #define AR6004_HW_1_0_VERSION 0x30000623
138 #define AR6004_HW_1_0_FW_DIR "ath6k/AR6004/hw1.0"
139 #define AR6004_HW_1_0_FIRMWARE_FILE "fw.ram.bin"
140 #define AR6004_HW_1_0_BOARD_DATA_FILE "ath6k/AR6004/hw1.0/bdata.bin"
141 #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \
142 "ath6k/AR6004/hw1.0/bdata.DB132.bin"
144 /* AR6004 1.1 definitions */
145 #define AR6004_HW_1_1_VERSION 0x30000001
146 #define AR6004_HW_1_1_FW_DIR "ath6k/AR6004/hw1.1"
147 #define AR6004_HW_1_1_FIRMWARE_FILE "fw.ram.bin"
148 #define AR6004_HW_1_1_BOARD_DATA_FILE "ath6k/AR6004/hw1.1/bdata.bin"
149 #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \
150 "ath6k/AR6004/hw1.1/bdata.DB132.bin"
152 /* Per STA data, used in AP mode */
153 #define STA_PS_AWAKE BIT(0)
154 #define STA_PS_SLEEP BIT(1)
155 #define STA_PS_POLLED BIT(2)
156 #define STA_PS_APSD_TRIGGER BIT(3)
157 #define STA_PS_APSD_EOSP BIT(4)
159 /* HTC TX packet tagging definitions */
160 #define ATH6KL_CONTROL_PKT_TAG HTC_TX_PACKET_TAG_USER_DEFINED
161 #define ATH6KL_DATA_PKT_TAG (ATH6KL_CONTROL_PKT_TAG + 1)
163 #define AR6003_CUST_DATA_SIZE 16
165 #define AGGR_WIN_IDX(x, y) ((x) % (y))
166 #define AGGR_INCR_IDX(x, y) AGGR_WIN_IDX(((x) + 1), (y))
167 #define AGGR_DCRM_IDX(x, y) AGGR_WIN_IDX(((x) - 1), (y))
168 #define ATH6KL_MAX_SEQ_NO 0xFFF
169 #define ATH6KL_NEXT_SEQ_NO(x) (((x) + 1) & ATH6KL_MAX_SEQ_NO)
171 #define NUM_OF_TIDS 8
172 #define AGGR_SZ_DEFAULT 8
174 #define AGGR_WIN_SZ_MIN 2
175 #define AGGR_WIN_SZ_MAX 8
177 #define TID_WINDOW_SZ(_x) ((_x) << 1)
179 #define AGGR_NUM_OF_FREE_NETBUFS 16
181 #define AGGR_RX_TIMEOUT 400 /* in ms */
183 #define WMI_TIMEOUT (2 * HZ)
185 #define MBOX_YIELD_LIMIT 99
187 /* configuration lags */
189 * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in
190 * ERP IE of beacon to determine the short premable support when
191 * sending (Re)Assoc req.
192 * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power
193 * module state transition failure events which happen during
196 #define ATH6KL_CONF_IGNORE_ERP_BARKER BIT(0)
197 #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN BIT(1)
198 #define ATH6KL_CONF_ENABLE_11N BIT(2)
199 #define ATH6KL_CONF_ENABLE_TX_BURST BIT(3)
200 #define ATH6KL_CONF_UART_DEBUG BIT(4)
202 enum wlan_low_pwr_state
{
204 WLAN_POWER_STATE_CUT_PWR
,
205 WLAN_POWER_STATE_DEEP_SLEEP
,
228 struct skb_hold_q
*hold_q
;
229 struct sk_buff_head q
;
245 struct aggr_info_conn
{
248 struct timer_list timer
;
249 struct net_device
*dev
;
250 struct rxtid rx_tid
[NUM_OF_TIDS
];
251 struct rxtid_stats stat
[NUM_OF_TIDS
];
252 struct aggr_info
*aggr_info
;
256 struct aggr_info_conn
*aggr_conn
;
257 struct sk_buff_head rx_amsdu_freeq
;
260 struct ath6kl_wep_key
{
266 #define ATH6KL_KEY_SEQ_LEN 8
269 u8 key
[WLAN_MAX_KEY_LEN
];
271 u8 seq
[ATH6KL_KEY_SEQ_LEN
];
276 struct ath6kl_node_mapping
{
277 u8 mac_addr
[ETH_ALEN
];
282 struct ath6kl_cookie
{
285 struct htc_packet htc_pkt
;
286 struct ath6kl_cookie
*arc_list_next
;
296 u8 wpa_ie
[ATH6KL_MAX_IE
];
297 struct sk_buff_head psq
;
300 struct sk_buff_head apsdq
;
301 struct aggr_info_conn
*aggr_conn
;
304 struct ath6kl_version
{
318 struct target_stats
{
327 u64 tx_rts_success_cnt
;
328 u64 tx_pkt_per_ac
[4];
333 u64 tx_mult_retry_cnt
;
348 u64 rx_key_cache_miss
;
352 u64 tkip_local_mic_fail
;
353 u64 tkip_cnter_measures_invoked
;
359 u64 pwr_save_fail_cnt
;
372 u16 wow_evt_discarded
;
374 s16 noise_floor_calib
;
376 s16 cs_ave_beacon_rssi
;
377 u8 cs_ave_beacon_snr
;
378 u8 cs_last_roam_msec
;
381 u8 wow_host_pkt_wakeups
;
382 u8 wow_host_evt_wakeups
;
389 struct ath6kl_mbox_info
{
402 * 802.11i defines an extended IV for use with non-WEP ciphers.
403 * When the EXTIV bit is set in the key id byte an additional
404 * 4 bytes immediately follow the IV for TKIP. For CCMP the
405 * EXTIV bit is likewise set but the 8 bytes represent the
406 * CCMP header rather than IV+extended-IV.
409 #define ATH6KL_KEYBUF_SIZE 16
410 #define ATH6KL_MICBUF_SIZE (8+8) /* space for both tx and rx */
412 #define ATH6KL_KEY_XMIT 0x01
413 #define ATH6KL_KEY_RECV 0x02
414 #define ATH6KL_KEY_DEFAULT 0x80 /* default xmit key */
416 /* Initial group key for AP mode */
417 struct ath6kl_req_key
{
421 u8 key
[WLAN_MAX_KEY_LEN
];
425 enum ath6kl_hif_type
{
426 ATH6KL_HIF_TYPE_SDIO
,
430 /* Max number of filters that hw supports */
431 #define ATH6K_MAX_MC_FILTERS_PER_LIST 7
432 struct ath6kl_mc_filter
{
433 struct list_head list
;
434 char hw_addr
[ATH6KL_MCAST_FILTER_MAC_ADDR_SIZE
];
438 * Driver's maximum limit, note that some firmwares support only one vif
439 * and the runtime (current) limit must be checked from ar->vif_max.
441 #define ATH6KL_VIF_MAX 3
444 enum ath6kl_vif_state
{
451 CLEAR_BSSFILTER_ON_BEACON
,
455 HOST_SLEEP_MODE_CMD_PROCESSED
,
459 struct list_head list
;
460 struct wireless_dev wdev
;
461 struct net_device
*ndev
;
463 /* Lock to protect vif specific net_stats and flags */
468 u8 ssid
[IEEE80211_MAX_SSID_LEN
];
472 u8 prwise_crypto_len
;
479 u8 req_bssid
[ETH_ALEN
];
482 struct ath6kl_wep_key wep_key_list
[WMI_MAX_KEY_INDEX
+ 1];
483 struct ath6kl_key keys
[WMI_MAX_KEY_INDEX
+ 1];
484 struct aggr_info
*aggr_cntxt
;
486 struct timer_list disconnect_timer
;
487 struct timer_list sched_scan_timer
;
489 struct cfg80211_scan_request
*scan_req
;
490 enum sme_state sme_state
;
493 u32 last_cancel_roc_id
;
495 bool probe_req_report
;
497 u16 assoc_bss_beacon_int
;
498 u8 assoc_bss_dtim_period
;
499 struct net_device_stats net_stats
;
500 struct target_stats target_stats
;
502 struct list_head mc_filter
;
505 #define WOW_LIST_ID 0
506 #define WOW_HOST_REQ_DELAY 500 /* ms */
508 #define ATH6KL_SCHED_SCAN_RESULT_DELAY 5000 /* ms */
511 enum ath6kl_dev_state
{
525 ATH6KL_STATE_DEEPSLEEP
,
526 ATH6KL_STATE_CUTPOWER
,
528 ATH6KL_STATE_SCHED_SCAN
,
535 enum ath6kl_state state
;
536 unsigned int testmode
;
538 struct ath6kl_bmi bmi
;
539 const struct ath6kl_hif_ops
*hif_ops
;
541 int tx_pending
[ENDPOINT_MAX
];
542 int total_tx_data_pend
;
543 struct htc_target
*htc_target
;
544 enum ath6kl_hif_type hif_type
;
546 struct list_head vif_list
;
547 /* Lock to avoid race in vif_list entries among add/del/traverse */
548 spinlock_t list_lock
;
550 unsigned int vif_max
;
554 struct semaphore sem
;
556 u8 lrssi_roam_threshold
;
557 struct ath6kl_version version
;
560 struct ath6kl_node_mapping node_map
[MAX_NODE_NUM
];
565 struct ath6kl_cookie
*cookie_list
;
567 enum htc_endpoint_id ac2ep_map
[WMM_NUM_AC
];
568 bool ac_stream_active
[WMM_NUM_AC
];
569 u8 ac_stream_pri_map
[WMM_NUM_AC
];
570 u8 hiac_stream_active_pri
;
571 u8 ep2ac_map
[ENDPOINT_MAX
];
572 enum htc_endpoint_id ctrl_ep
;
573 struct ath6kl_htc_credit_info credit_state_info
;
574 u32 connect_ctrl_flags
;
577 struct ath6kl_sta sta_list
[AP_MAX_NUM_STA
];
579 struct ath6kl_req_key ap_mode_bkey
;
580 struct sk_buff_head mcastpsq
;
581 spinlock_t mcastpsq_lock
;
583 struct wmi_ap_mode_stat ap_stats
;
584 u8 ap_country_code
[3];
585 struct list_head amsdu_rx_buffer_queue
;
587 enum wlan_low_pwr_state wlan_pwr_state
;
588 u8 mac_addr
[ETH_ALEN
];
589 #define AR_MCAST_FILTER_MAC_ADDR_SIZE 4
592 size_t rx_report_len
;
598 u32 dataset_patch_addr
;
600 u32 app_start_override_addr
;
601 u32 board_ext_data_addr
;
602 u32 reserved_ram_size
;
608 struct ath6kl_hw_fw
{
615 const char *testscript
;
618 const char *fw_board
;
619 const char *fw_default_board
;
624 wait_queue_head_t event_wq
;
625 struct ath6kl_mbox_info mbox_info
;
627 struct ath6kl_cookie cookie_mem
[MAX_COOKIE_NUM
];
643 size_t fw_testscript_len
;
646 unsigned long fw_capabilities
[ATH6KL_CAPABILITY_LEN
];
648 struct workqueue_struct
*ath6kl_wq
;
650 struct dentry
*debugfs_phy
;
654 #ifdef CONFIG_ATH6KL_DEBUG
656 struct sk_buff_head fwlog_queue
;
657 struct completion fwlog_completion
;
662 unsigned int dbgfs_diag_reg
;
663 u32 diag_reg_addr_wr
;
667 unsigned int invalid_rate
;
671 unsigned int roam_tbl_len
;
676 #endif /* CONFIG_ATH6KL_DEBUG */
679 static inline struct ath6kl
*ath6kl_priv(struct net_device
*dev
)
681 return ((struct ath6kl_vif
*) netdev_priv(dev
))->ar
;
684 static inline u32
ath6kl_get_hi_item_addr(struct ath6kl
*ar
,
689 if (ar
->target_type
== TARGET_TYPE_AR6003
)
690 addr
= ATH6KL_AR6003_HI_START_ADDR
+ item_offset
;
691 else if (ar
->target_type
== TARGET_TYPE_AR6004
)
692 addr
= ATH6KL_AR6004_HI_START_ADDR
+ item_offset
;
697 int ath6kl_configure_target(struct ath6kl
*ar
);
698 void ath6kl_detect_error(unsigned long ptr
);
699 void disconnect_timer_handler(unsigned long ptr
);
700 void init_netdev(struct net_device
*dev
);
701 void ath6kl_cookie_init(struct ath6kl
*ar
);
702 void ath6kl_cookie_cleanup(struct ath6kl
*ar
);
703 void ath6kl_rx(struct htc_target
*target
, struct htc_packet
*packet
);
704 void ath6kl_tx_complete(void *context
, struct list_head
*packet_queue
);
705 enum htc_send_full_action
ath6kl_tx_queue_full(struct htc_target
*target
,
706 struct htc_packet
*packet
);
707 void ath6kl_stop_txrx(struct ath6kl
*ar
);
708 void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl
*ar
);
709 int ath6kl_diag_write32(struct ath6kl
*ar
, u32 address
, __le32 value
);
710 int ath6kl_diag_write(struct ath6kl
*ar
, u32 address
, void *data
, u32 length
);
711 int ath6kl_diag_read32(struct ath6kl
*ar
, u32 address
, u32
*value
);
712 int ath6kl_diag_read(struct ath6kl
*ar
, u32 address
, void *data
, u32 length
);
713 int ath6kl_read_fwlogs(struct ath6kl
*ar
);
714 void ath6kl_init_profile_info(struct ath6kl_vif
*vif
);
715 void ath6kl_tx_data_cleanup(struct ath6kl
*ar
);
717 struct ath6kl_cookie
*ath6kl_alloc_cookie(struct ath6kl
*ar
);
718 void ath6kl_free_cookie(struct ath6kl
*ar
, struct ath6kl_cookie
*cookie
);
719 int ath6kl_data_tx(struct sk_buff
*skb
, struct net_device
*dev
);
721 struct aggr_info
*aggr_init(struct ath6kl_vif
*vif
);
722 void aggr_conn_init(struct ath6kl_vif
*vif
, struct aggr_info
*aggr_info
,
723 struct aggr_info_conn
*aggr_conn
);
724 void ath6kl_rx_refill(struct htc_target
*target
,
725 enum htc_endpoint_id endpoint
);
726 void ath6kl_refill_amsdu_rxbufs(struct ath6kl
*ar
, int count
);
727 struct htc_packet
*ath6kl_alloc_amsdu_rxbuf(struct htc_target
*target
,
728 enum htc_endpoint_id endpoint
,
730 void aggr_module_destroy(struct aggr_info
*aggr_info
);
731 void aggr_reset_state(struct aggr_info_conn
*aggr_conn
);
733 struct ath6kl_sta
*ath6kl_find_sta(struct ath6kl_vif
*vif
, u8
* node_addr
);
734 struct ath6kl_sta
*ath6kl_find_sta_by_aid(struct ath6kl
*ar
, u8 aid
);
736 void ath6kl_ready_event(void *devt
, u8
* datap
, u32 sw_ver
, u32 abi_ver
);
737 int ath6kl_control_tx(void *devt
, struct sk_buff
*skb
,
738 enum htc_endpoint_id eid
);
739 void ath6kl_connect_event(struct ath6kl_vif
*vif
, u16 channel
,
740 u8
*bssid
, u16 listen_int
,
741 u16 beacon_int
, enum network_type net_type
,
742 u8 beacon_ie_len
, u8 assoc_req_len
,
743 u8 assoc_resp_len
, u8
*assoc_info
);
744 void ath6kl_connect_ap_mode_bss(struct ath6kl_vif
*vif
, u16 channel
);
745 void ath6kl_connect_ap_mode_sta(struct ath6kl_vif
*vif
, u16 aid
, u8
*mac_addr
,
746 u8 keymgmt
, u8 ucipher
, u8 auth
,
747 u8 assoc_req_len
, u8
*assoc_info
, u8 apsd_info
);
748 void ath6kl_disconnect_event(struct ath6kl_vif
*vif
, u8 reason
,
749 u8
*bssid
, u8 assoc_resp_len
,
750 u8
*assoc_info
, u16 prot_reason_status
);
751 void ath6kl_tkip_micerr_event(struct ath6kl_vif
*vif
, u8 keyid
, bool ismcast
);
752 void ath6kl_txpwr_rx_evt(void *devt
, u8 tx_pwr
);
753 void ath6kl_scan_complete_evt(struct ath6kl_vif
*vif
, int status
);
754 void ath6kl_tgt_stats_event(struct ath6kl_vif
*vif
, u8
*ptr
, u32 len
);
755 void ath6kl_indicate_tx_activity(void *devt
, u8 traffic_class
, bool active
);
756 enum htc_endpoint_id
ath6kl_ac2_endpoint_id(void *devt
, u8 ac
);
758 void ath6kl_pspoll_event(struct ath6kl_vif
*vif
, u8 aid
);
760 void ath6kl_dtimexpiry_event(struct ath6kl_vif
*vif
);
761 void ath6kl_disconnect(struct ath6kl_vif
*vif
);
762 void aggr_recv_delba_req_evt(struct ath6kl_vif
*vif
, u8 tid
);
763 void aggr_recv_addba_req_evt(struct ath6kl_vif
*vif
, u8 tid
, u16 seq_no
,
765 void ath6kl_wakeup_event(void *dev
);
767 void ath6kl_reset_device(struct ath6kl
*ar
, u32 target_type
,
768 bool wait_fot_compltn
, bool cold_reset
);
769 void ath6kl_init_control_info(struct ath6kl_vif
*vif
);
770 struct ath6kl_vif
*ath6kl_vif_first(struct ath6kl
*ar
);
771 void ath6kl_cleanup_vif(struct ath6kl_vif
*vif
, bool wmi_ready
);
772 int ath6kl_init_hw_start(struct ath6kl
*ar
);
773 int ath6kl_init_hw_stop(struct ath6kl
*ar
);
774 int ath6kl_init_fetch_firmwares(struct ath6kl
*ar
);
775 int ath6kl_init_hw_params(struct ath6kl
*ar
);
777 void ath6kl_check_wow_status(struct ath6kl
*ar
);
779 struct ath6kl
*ath6kl_core_create(struct device
*dev
);
780 int ath6kl_core_init(struct ath6kl
*ar
);
781 void ath6kl_core_cleanup(struct ath6kl
*ar
);
782 void ath6kl_core_destroy(struct ath6kl
*ar
);