drivers/net/wireless/ath/ath6kl/core.h

   1 /*
   2  * Copyright (c) 2010-2011 Atheros Communications Inc.
   3  * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
   4  *
   5  * Permission to use, copy, modify, and/or distribute this software for any
   6  * purpose with or without fee is hereby granted, provided that the above
   7  * copyright notice and this permission notice appear in all copies.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16  */
  17
  18 #ifndef CORE_H
  19 #define CORE_H
  20
  21 #include <linux/etherdevice.h>
  22 #include <linux/rtnetlink.h>
  23 #include <linux/firmware.h>
  24 #include <linux/sched.h>
  25 #include <linux/circ_buf.h>
  26 #include <net/cfg80211.h>
  27 #include "htc.h"
  28 #include "wmi.h"
  29 #include "bmi.h"
  30 #include "target.h"
  31
  32 #define MAX_ATH6KL                        1
  33 #define ATH6KL_MAX_RX_BUFFERS             16
  34 #define ATH6KL_BUFFER_SIZE                1664
  35 #define ATH6KL_MAX_AMSDU_RX_BUFFERS       4
  36 #define ATH6KL_AMSDU_REFILL_THRESHOLD     3
  37 #define ATH6KL_AMSDU_BUFFER_SIZE     (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128)
  38 #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN   1508
  39 #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN   46
  40
  41 #define USER_SAVEDKEYS_STAT_INIT     0
  42 #define USER_SAVEDKEYS_STAT_RUN      1
  43
  44 #define ATH6KL_TX_TIMEOUT      10
  45 #define ATH6KL_MAX_ENDPOINTS   4
  46 #define MAX_NODE_NUM           15
  47
  48 #define ATH6KL_APSD_ALL_FRAME           0xFFFF
  49 #define ATH6KL_APSD_NUM_OF_AC           0x4
  50 #define ATH6KL_APSD_FRAME_MASK          0xF
  51
  52 /* Extra bytes for htc header alignment */
  53 #define ATH6KL_HTC_ALIGN_BYTES 3
  54
  55 /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */
  56 #define MAX_DEF_COOKIE_NUM                180
  57 #define MAX_HI_COOKIE_NUM                 18    /* 10% of MAX_COOKIE_NUM */
  58 #define MAX_COOKIE_NUM                 (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM)
  59
  60 #define MAX_DEFAULT_SEND_QUEUE_DEPTH      (MAX_DEF_COOKIE_NUM / WMM_NUM_AC)
  61
  62 #define DISCON_TIMER_INTVAL               10000  /* in msec */
  63
  64 /* Channel dwell time in fg scan */
  65 #define ATH6KL_FG_SCAN_INTERVAL         50 /* in ms */
  66
  67 /* includes also the null byte */
  68 #define ATH6KL_FIRMWARE_MAGIC               "QCA-ATH6KL"
  69
  70 enum ath6kl_fw_ie_type {
  71         ATH6KL_FW_IE_FW_VERSION = 0,
  72         ATH6KL_FW_IE_TIMESTAMP = 1,
  73         ATH6KL_FW_IE_OTP_IMAGE = 2,
  74         ATH6KL_FW_IE_FW_IMAGE = 3,
  75         ATH6KL_FW_IE_PATCH_IMAGE = 4,
  76         ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5,
  77         ATH6KL_FW_IE_CAPABILITIES = 6,
  78         ATH6KL_FW_IE_PATCH_ADDR = 7,
  79         ATH6KL_FW_IE_BOARD_ADDR = 8,
  80         ATH6KL_FW_IE_VIF_MAX = 9,
  81 };
  82
  83 enum ath6kl_fw_capability {
  84         ATH6KL_FW_CAPABILITY_HOST_P2P = 0,
  85         ATH6KL_FW_CAPABILITY_SCHED_SCAN = 1,
  86
  87         /*
  88          * Firmware is capable of supporting P2P mgmt operations on a
  89          * station interface. After group formation, the station
  90          * interface will become a P2P client/GO interface as the case may be
  91          */
  92         ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
  93
  94         /* this needs to be last */
  95         ATH6KL_FW_CAPABILITY_MAX,
  96 };
  97
  98 #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32)
  99
 100 struct ath6kl_fw_ie {
 101         __le32 id;
 102         __le32 len;
 103         u8 data[0];
 104 };
 105
 106 #define ATH6KL_FW_API2_FILE "fw-2.bin"
 107 #define ATH6KL_FW_API3_FILE "fw-3.bin"
 108
 109 /* AR6003 1.0 definitions */
 110 #define AR6003_HW_1_0_VERSION                 0x300002ba
 111
 112 /* AR6003 2.0 definitions */
 113 #define AR6003_HW_2_0_VERSION                 0x30000384
 114 #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS  0x57e910
 115 #define AR6003_HW_2_0_FW_DIR                    "ath6k/AR6003/hw2.0"
 116 #define AR6003_HW_2_0_OTP_FILE                  "otp.bin.z77"
 117 #define AR6003_HW_2_0_FIRMWARE_FILE             "athwlan.bin.z77"
 118 #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE        "athtcmd_ram.bin"
 119 #define AR6003_HW_2_0_PATCH_FILE                "data.patch.bin"
 120 #define AR6003_HW_2_0_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.bin"
 121 #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \
 122                         "ath6k/AR6003/hw2.0/bdata.SD31.bin"
 123
 124 /* AR6003 3.0 definitions */
 125 #define AR6003_HW_2_1_1_VERSION                 0x30000582
 126 #define AR6003_HW_2_1_1_FW_DIR                  "ath6k/AR6003/hw2.1.1"
 127 #define AR6003_HW_2_1_1_OTP_FILE                "otp.bin"
 128 #define AR6003_HW_2_1_1_FIRMWARE_FILE           "athwlan.bin"
 129 #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE      "athtcmd_ram.bin"
 130 #define AR6003_HW_2_1_1_UTF_FIRMWARE_FILE       "utf.bin"
 131 #define AR6003_HW_2_1_1_TESTSCRIPT_FILE "nullTestFlow.bin"
 132 #define AR6003_HW_2_1_1_PATCH_FILE              "data.patch.bin"
 133 #define AR6003_HW_2_1_1_BOARD_DATA_FILE "ath6k/AR6003/hw2.1.1/bdata.bin"
 134 #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE \
 135                         "ath6k/AR6003/hw2.1.1/bdata.SD31.bin"
 136
 137 /* AR6004 1.0 definitions */
 138 #define AR6004_HW_1_0_VERSION                 0x30000623
 139 #define AR6004_HW_1_0_FW_DIR                    "ath6k/AR6004/hw1.0"
 140 #define AR6004_HW_1_0_FIRMWARE_FILE             "fw.ram.bin"
 141 #define AR6004_HW_1_0_BOARD_DATA_FILE         "ath6k/AR6004/hw1.0/bdata.bin"
 142 #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \
 143         "ath6k/AR6004/hw1.0/bdata.DB132.bin"
 144
 145 /* AR6004 1.1 definitions */
 146 #define AR6004_HW_1_1_VERSION                 0x30000001
 147 #define AR6004_HW_1_1_FW_DIR                    "ath6k/AR6004/hw1.1"
 148 #define AR6004_HW_1_1_FIRMWARE_FILE             "fw.ram.bin"
 149 #define AR6004_HW_1_1_BOARD_DATA_FILE         "ath6k/AR6004/hw1.1/bdata.bin"
 150 #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \
 151         "ath6k/AR6004/hw1.1/bdata.DB132.bin"
 152
 153 /* Per STA data, used in AP mode */
 154 #define STA_PS_AWAKE            BIT(0)
 155 #define STA_PS_SLEEP            BIT(1)
 156 #define STA_PS_POLLED           BIT(2)
 157 #define STA_PS_APSD_TRIGGER     BIT(3)
 158 #define STA_PS_APSD_EOSP        BIT(4)
 159
 160 /* HTC TX packet tagging definitions */
 161 #define ATH6KL_CONTROL_PKT_TAG    HTC_TX_PACKET_TAG_USER_DEFINED
 162 #define ATH6KL_DATA_PKT_TAG       (ATH6KL_CONTROL_PKT_TAG + 1)
 163
 164 #define AR6003_CUST_DATA_SIZE 16
 165
 166 #define AGGR_WIN_IDX(x, y)          ((x) % (y))
 167 #define AGGR_INCR_IDX(x, y)         AGGR_WIN_IDX(((x) + 1), (y))
 168 #define AGGR_DCRM_IDX(x, y)         AGGR_WIN_IDX(((x) - 1), (y))
 169 #define ATH6KL_MAX_SEQ_NO               0xFFF
 170 #define ATH6KL_NEXT_SEQ_NO(x)           (((x) + 1) & ATH6KL_MAX_SEQ_NO)
 171
 172 #define NUM_OF_TIDS         8
 173 #define AGGR_SZ_DEFAULT     8
 174
 175 #define AGGR_WIN_SZ_MIN     2
 176 #define AGGR_WIN_SZ_MAX     8
 177
 178 #define TID_WINDOW_SZ(_x)   ((_x) << 1)
 179
 180 #define AGGR_NUM_OF_FREE_NETBUFS    16
 181
 182 #define AGGR_RX_TIMEOUT     400 /* in ms */
 183
 184 #define WMI_TIMEOUT (2 * HZ)
 185
 186 #define MBOX_YIELD_LIMIT 99
 187
 188 #define ATH6KL_DEFAULT_LISTEN_INTVAL    100 /* in TUs */
 189 #define ATH6KL_DEFAULT_BMISS_TIME       1500
 190 #define ATH6KL_MAX_WOW_LISTEN_INTL      300 /* in TUs */
 191 #define ATH6KL_MAX_BMISS_TIME           5000
 192
 193 /* configuration lags */
 194 /*
 195  * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in
 196  * ERP IE of beacon to determine the short premable support when
 197  * sending (Re)Assoc req.
 198  * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power
 199  * module state transition failure events which happen during
 200  * scan, to the host.
 201  */
 202 #define ATH6KL_CONF_IGNORE_ERP_BARKER           BIT(0)
 203 #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN  BIT(1)
 204 #define ATH6KL_CONF_ENABLE_11N                  BIT(2)
 205 #define ATH6KL_CONF_ENABLE_TX_BURST             BIT(3)
 206 #define ATH6KL_CONF_UART_DEBUG                  BIT(4)
 207
 208 enum wlan_low_pwr_state {
 209         WLAN_POWER_STATE_ON,
 210         WLAN_POWER_STATE_CUT_PWR,
 211         WLAN_POWER_STATE_DEEP_SLEEP,
 212         WLAN_POWER_STATE_WOW
 213 };
 214
 215 enum sme_state {
 216         SME_DISCONNECTED,
 217         SME_CONNECTING,
 218         SME_CONNECTED
 219 };
 220
 221 struct skb_hold_q {
 222         struct sk_buff *skb;
 223         bool is_amsdu;
 224         u16 seq_no;
 225 };
 226
 227 struct rxtid {
 228         bool aggr;
 229         bool progress;
 230         bool timer_mon;
 231         u16 win_sz;
 232         u16 seq_next;
 233         u32 hold_q_sz;
 234         struct skb_hold_q *hold_q;
 235         struct sk_buff_head q;
 236
 237         /*
 238          * FIXME: No clue what this should protect. Apparently it should
 239          * protect some of the fields above but they are also accessed
 240          * without taking the lock.
 241          */
 242         spinlock_t lock;
 243 };
 244
 245 struct rxtid_stats {
 246         u32 num_into_aggr;
 247         u32 num_dups;
 248         u32 num_oow;
 249         u32 num_mpdu;
 250         u32 num_amsdu;
 251         u32 num_delivered;
 252         u32 num_timeouts;
 253         u32 num_hole;
 254         u32 num_bar;
 255 };
 256
 257 struct aggr_info_conn {
 258         u8 aggr_sz;
 259         u8 timer_scheduled;
 260         struct timer_list timer;
 261         struct net_device *dev;
 262         struct rxtid rx_tid[NUM_OF_TIDS];
 263         struct rxtid_stats stat[NUM_OF_TIDS];
 264         struct aggr_info *aggr_info;
 265 };
 266
 267 struct aggr_info {
 268         struct aggr_info_conn *aggr_conn;
 269         struct sk_buff_head rx_amsdu_freeq;
 270 };
 271
 272 struct ath6kl_wep_key {
 273         u8 key_index;
 274         u8 key_len;
 275         u8 key[64];
 276 };
 277
 278 #define ATH6KL_KEY_SEQ_LEN 8
 279
 280 struct ath6kl_key {
 281         u8 key[WLAN_MAX_KEY_LEN];
 282         u8 key_len;
 283         u8 seq[ATH6KL_KEY_SEQ_LEN];
 284         u8 seq_len;
 285         u32 cipher;
 286 };
 287
 288 struct ath6kl_node_mapping {
 289         u8 mac_addr[ETH_ALEN];
 290         u8 ep_id;
 291         u8 tx_pend;
 292 };
 293
 294 struct ath6kl_cookie {
 295         struct sk_buff *skb;
 296         u32 map_no;
 297         struct htc_packet htc_pkt;
 298         struct ath6kl_cookie *arc_list_next;
 299 };
 300
 301 struct ath6kl_mgmt_buff {
 302         struct list_head list;
 303         u32 freq;
 304         u32 wait;
 305         u32 id;
 306         bool no_cck;
 307         size_t len;
 308         u8 buf[0];
 309 };
 310
 311 struct ath6kl_sta {
 312         u16 sta_flags;
 313         u8 mac[ETH_ALEN];
 314         u8 aid;
 315         u8 keymgmt;
 316         u8 ucipher;
 317         u8 auth;
 318         u8 wpa_ie[ATH6KL_MAX_IE];
 319         struct sk_buff_head psq;
 320
 321         /* protects psq, mgmt_psq, apsdq, and mgmt_psq_len fields */
 322         spinlock_t psq_lock;
 323
 324         struct list_head mgmt_psq;
 325         size_t mgmt_psq_len;
 326         u8 apsd_info;
 327         struct sk_buff_head apsdq;
 328         struct aggr_info_conn *aggr_conn;
 329 };
 330
 331 struct ath6kl_version {
 332         u32 target_ver;
 333         u32 wlan_ver;
 334         u32 abi_ver;
 335 };
 336
 337 struct ath6kl_bmi {
 338         u32 cmd_credits;
 339         bool done_sent;
 340         u8 *cmd_buf;
 341         u32 max_data_size;
 342         u32 max_cmd_size;
 343 };
 344
 345 struct target_stats {
 346         u64 tx_pkt;
 347         u64 tx_byte;
 348         u64 tx_ucast_pkt;
 349         u64 tx_ucast_byte;
 350         u64 tx_mcast_pkt;
 351         u64 tx_mcast_byte;
 352         u64 tx_bcast_pkt;
 353         u64 tx_bcast_byte;
 354         u64 tx_rts_success_cnt;
 355         u64 tx_pkt_per_ac[4];
 356
 357         u64 tx_err;
 358         u64 tx_fail_cnt;
 359         u64 tx_retry_cnt;
 360         u64 tx_mult_retry_cnt;
 361         u64 tx_rts_fail_cnt;
 362
 363         u64 rx_pkt;
 364         u64 rx_byte;
 365         u64 rx_ucast_pkt;
 366         u64 rx_ucast_byte;
 367         u64 rx_mcast_pkt;
 368         u64 rx_mcast_byte;
 369         u64 rx_bcast_pkt;
 370         u64 rx_bcast_byte;
 371         u64 rx_frgment_pkt;
 372
 373         u64 rx_err;
 374         u64 rx_crc_err;
 375         u64 rx_key_cache_miss;
 376         u64 rx_decrypt_err;
 377         u64 rx_dupl_frame;
 378
 379         u64 tkip_local_mic_fail;
 380         u64 tkip_cnter_measures_invoked;
 381         u64 tkip_replays;
 382         u64 tkip_fmt_err;
 383         u64 ccmp_fmt_err;
 384         u64 ccmp_replays;
 385
 386         u64 pwr_save_fail_cnt;
 387
 388         u64 cs_bmiss_cnt;
 389         u64 cs_low_rssi_cnt;
 390         u64 cs_connect_cnt;
 391         u64 cs_discon_cnt;
 392
 393         s32 tx_ucast_rate;
 394         s32 rx_ucast_rate;
 395
 396         u32 lq_val;
 397
 398         u32 wow_pkt_dropped;
 399         u16 wow_evt_discarded;
 400
 401         s16 noise_floor_calib;
 402         s16 cs_rssi;
 403         s16 cs_ave_beacon_rssi;
 404         u8 cs_ave_beacon_snr;
 405         u8 cs_last_roam_msec;
 406         u8 cs_snr;
 407
 408         u8 wow_host_pkt_wakeups;
 409         u8 wow_host_evt_wakeups;
 410
 411         u32 arp_received;
 412         u32 arp_matched;
 413         u32 arp_replied;
 414 };
 415
 416 struct ath6kl_mbox_info {
 417         u32 htc_addr;
 418         u32 htc_ext_addr;
 419         u32 htc_ext_sz;
 420
 421         u32 block_size;
 422
 423         u32 gmbox_addr;
 424
 425         u32 gmbox_sz;
 426 };
 427
 428 /*
 429  * 802.11i defines an extended IV for use with non-WEP ciphers.
 430  * When the EXTIV bit is set in the key id byte an additional
 431  * 4 bytes immediately follow the IV for TKIP.  For CCMP the
 432  * EXTIV bit is likewise set but the 8 bytes represent the
 433  * CCMP header rather than IV+extended-IV.
 434  */
 435
 436 #define ATH6KL_KEYBUF_SIZE 16
 437 #define ATH6KL_MICBUF_SIZE (8+8)        /* space for both tx and rx */
 438
 439 #define ATH6KL_KEY_XMIT  0x01
 440 #define ATH6KL_KEY_RECV  0x02
 441 #define ATH6KL_KEY_DEFAULT   0x80       /* default xmit key */
 442
 443 /* Initial group key for AP mode */
 444 struct ath6kl_req_key {
 445         bool valid;
 446         u8 key_index;
 447         int key_type;
 448         u8 key[WLAN_MAX_KEY_LEN];
 449         u8 key_len;
 450 };
 451
 452 enum ath6kl_hif_type {
 453         ATH6KL_HIF_TYPE_SDIO,
 454         ATH6KL_HIF_TYPE_USB,
 455 };
 456
 457 /* Max number of filters that hw supports */
 458 #define ATH6K_MAX_MC_FILTERS_PER_LIST 7
 459 struct ath6kl_mc_filter {
 460         struct list_head list;
 461         char hw_addr[ATH6KL_MCAST_FILTER_MAC_ADDR_SIZE];
 462 };
 463
 464 /*
 465  * Driver's maximum limit, note that some firmwares support only one vif
 466  * and the runtime (current) limit must be checked from ar->vif_max.
 467  */
 468 #define ATH6KL_VIF_MAX  3
 469
 470 /* vif flags info */
 471 enum ath6kl_vif_state {
 472         CONNECTED,
 473         CONNECT_PEND,
 474         WMM_ENABLED,
 475         NETQ_STOPPED,
 476         DTIM_EXPIRED,
 477         NETDEV_REGISTERED,
 478         CLEAR_BSSFILTER_ON_BEACON,
 479         DTIM_PERIOD_AVAIL,
 480         WLAN_ENABLED,
 481         STATS_UPDATE_PEND,
 482         HOST_SLEEP_MODE_CMD_PROCESSED,
 483 };
 484
 485 struct ath6kl_vif {
 486         struct list_head list;
 487         struct wireless_dev wdev;
 488         struct net_device *ndev;
 489         struct ath6kl *ar;
 490         /* Lock to protect vif specific net_stats and flags */
 491         spinlock_t if_lock;
 492         u8 fw_vif_idx;
 493         unsigned long flags;
 494         int ssid_len;
 495         u8 ssid[IEEE80211_MAX_SSID_LEN];
 496         u8 dot11_auth_mode;
 497         u8 auth_mode;
 498         u8 prwise_crypto;
 499         u8 prwise_crypto_len;
 500         u8 grp_crypto;
 501         u8 grp_crypto_len;
 502         u8 def_txkey_index;
 503         u8 next_mode;
 504         u8 nw_type;
 505         u8 bssid[ETH_ALEN];
 506         u8 req_bssid[ETH_ALEN];
 507         u16 ch_hint;
 508         u16 bss_ch;
 509         struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1];
 510         struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1];
 511         struct aggr_info *aggr_cntxt;
 512
 513         struct timer_list disconnect_timer;
 514         struct timer_list sched_scan_timer;
 515
 516         struct cfg80211_scan_request *scan_req;
 517         enum sme_state sme_state;
 518         int reconnect_flag;
 519         u32 last_roc_id;
 520         u32 last_cancel_roc_id;
 521         u32 send_action_id;
 522         bool probe_req_report;
 523         u16 next_chan;
 524         u16 assoc_bss_beacon_int;
 525         u16 listen_intvl_t;
 526         u16 bmiss_time_t;
 527         u8 assoc_bss_dtim_period;
 528         struct net_device_stats net_stats;
 529         struct target_stats target_stats;
 530
 531         struct list_head mc_filter;
 532 };
 533
 534 #define WOW_LIST_ID             0
 535 #define WOW_HOST_REQ_DELAY      500 /* ms */
 536
 537 #define ATH6KL_SCHED_SCAN_RESULT_DELAY 5000 /* ms */
 538
 539 /* Flag info */
 540 enum ath6kl_dev_state {
 541         WMI_ENABLED,
 542         WMI_READY,
 543         WMI_CTRL_EP_FULL,
 544         TESTMODE,
 545         DESTROY_IN_PROGRESS,
 546         SKIP_SCAN,
 547         ROAM_TBL_PEND,
 548         FIRST_BOOT,
 549 };
 550
 551 enum ath6kl_state {
 552         ATH6KL_STATE_OFF,
 553         ATH6KL_STATE_ON,
 554         ATH6KL_STATE_SUSPENDING,
 555         ATH6KL_STATE_RESUMING,
 556         ATH6KL_STATE_DEEPSLEEP,
 557         ATH6KL_STATE_CUTPOWER,
 558         ATH6KL_STATE_WOW,
 559         ATH6KL_STATE_SCHED_SCAN,
 560 };
 561
 562 struct ath6kl {
 563         struct device *dev;
 564         struct wiphy *wiphy;
 565
 566         enum ath6kl_state state;
 567         unsigned int testmode;
 568
 569         struct ath6kl_bmi bmi;
 570         const struct ath6kl_hif_ops *hif_ops;
 571         struct wmi *wmi;
 572         int tx_pending[ENDPOINT_MAX];
 573         int total_tx_data_pend;
 574         struct htc_target *htc_target;
 575         enum ath6kl_hif_type hif_type;
 576         void *hif_priv;
 577         struct list_head vif_list;
 578         /* Lock to avoid race in vif_list entries among add/del/traverse */
 579         spinlock_t list_lock;
 580         u8 num_vif;
 581         unsigned int vif_max;
 582         u8 max_norm_iface;
 583         u8 avail_idx_map;
 584
 585         /*
 586          * Protects at least amsdu_rx_buffer_queue, ath6kl_alloc_cookie()
 587          * calls, tx_pending and total_tx_data_pend.
 588          */
 589         spinlock_t lock;
 590
 591         struct semaphore sem;
 592         u8 lrssi_roam_threshold;
 593         struct ath6kl_version version;
 594         u32 target_type;
 595         u8 tx_pwr;
 596         struct ath6kl_node_mapping node_map[MAX_NODE_NUM];
 597         u8 ibss_ps_enable;
 598         bool ibss_if_active;
 599         u8 node_num;
 600         u8 next_ep_id;
 601         struct ath6kl_cookie *cookie_list;
 602         u32 cookie_count;
 603         enum htc_endpoint_id ac2ep_map[WMM_NUM_AC];
 604         bool ac_stream_active[WMM_NUM_AC];
 605         u8 ac_stream_pri_map[WMM_NUM_AC];
 606         u8 hiac_stream_active_pri;
 607         u8 ep2ac_map[ENDPOINT_MAX];
 608         enum htc_endpoint_id ctrl_ep;
 609         struct ath6kl_htc_credit_info credit_state_info;
 610         u32 connect_ctrl_flags;
 611         u32 user_key_ctrl;
 612         u8 usr_bss_filter;
 613         struct ath6kl_sta sta_list[AP_MAX_NUM_STA];
 614         u8 sta_list_index;
 615         struct ath6kl_req_key ap_mode_bkey;
 616         struct sk_buff_head mcastpsq;
 617
 618         /*
 619          * FIXME: protects access to mcastpsq but is actually useless as
 620          * all skbe_queue_*() functions provide serialisation themselves
 621          */
 622         spinlock_t mcastpsq_lock;
 623
 624         u8 intra_bss;
 625         struct wmi_ap_mode_stat ap_stats;
 626         u8 ap_country_code[3];
 627         struct list_head amsdu_rx_buffer_queue;
 628         u8 rx_meta_ver;
 629         enum wlan_low_pwr_state wlan_pwr_state;
 630         u8 mac_addr[ETH_ALEN];
 631 #define AR_MCAST_FILTER_MAC_ADDR_SIZE  4
 632         struct {
 633                 void *rx_report;
 634                 size_t rx_report_len;
 635         } tm;
 636
 637         struct ath6kl_hw {
 638                 u32 id;
 639                 const char *name;
 640                 u32 dataset_patch_addr;
 641                 u32 app_load_addr;
 642                 u32 app_start_override_addr;
 643                 u32 board_ext_data_addr;
 644                 u32 reserved_ram_size;
 645                 u32 board_addr;
 646                 u32 refclk_hz;
 647                 u32 uarttx_pin;
 648                 u32 testscript_addr;
 649
 650                 struct ath6kl_hw_fw {
 651                         const char *dir;
 652                         const char *otp;
 653                         const char *fw;
 654                         const char *tcmd;
 655                         const char *patch;
 656                         const char *utf;
 657                         const char *testscript;
 658                 } fw;
 659
 660                 const char *fw_board;
 661                 const char *fw_default_board;
 662         } hw;
 663
 664         u16 conf_flags;
 665         u16 suspend_mode;
 666         u16 wow_suspend_mode;
 667         wait_queue_head_t event_wq;
 668         struct ath6kl_mbox_info mbox_info;
 669
 670         struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM];
 671         unsigned long flag;
 672
 673         u8 *fw_board;
 674         size_t fw_board_len;
 675
 676         u8 *fw_otp;
 677         size_t fw_otp_len;
 678
 679         u8 *fw;
 680         size_t fw_len;
 681
 682         u8 *fw_patch;
 683         size_t fw_patch_len;
 684
 685         u8 *fw_testscript;
 686         size_t fw_testscript_len;
 687
 688         unsigned int fw_api;
 689         unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN];
 690
 691         struct workqueue_struct *ath6kl_wq;
 692
 693         struct dentry *debugfs_phy;
 694
 695         bool p2p;
 696
 697         bool wiphy_registered;
 698
 699 #ifdef CONFIG_ATH6KL_DEBUG
 700         struct {
 701                 struct sk_buff_head fwlog_queue;
 702                 struct completion fwlog_completion;
 703                 bool fwlog_open;
 704
 705                 u32 fwlog_mask;
 706
 707                 unsigned int dbgfs_diag_reg;
 708                 u32 diag_reg_addr_wr;
 709                 u32 diag_reg_val_wr;
 710
 711                 struct {
 712                         unsigned int invalid_rate;
 713                 } war_stats;
 714
 715                 u8 *roam_tbl;
 716                 unsigned int roam_tbl_len;
 717
 718                 u8 keepalive;
 719                 u8 disc_timeout;
 720         } debug;
 721 #endif /* CONFIG_ATH6KL_DEBUG */
 722 };
 723
 724 static inline struct ath6kl *ath6kl_priv(struct net_device *dev)
 725 {
 726         return ((struct ath6kl_vif *) netdev_priv(dev))->ar;
 727 }
 728
 729 static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar,
 730                                           u32 item_offset)
 731 {
 732         u32 addr = 0;
 733
 734         if (ar->target_type == TARGET_TYPE_AR6003)
 735                 addr = ATH6KL_AR6003_HI_START_ADDR + item_offset;
 736         else if (ar->target_type == TARGET_TYPE_AR6004)
 737                 addr = ATH6KL_AR6004_HI_START_ADDR + item_offset;
 738
 739         return addr;
 740 }
 741
 742 int ath6kl_configure_target(struct ath6kl *ar);
 743 void ath6kl_detect_error(unsigned long ptr);
 744 void disconnect_timer_handler(unsigned long ptr);
 745 void init_netdev(struct net_device *dev);
 746 void ath6kl_cookie_init(struct ath6kl *ar);
 747 void ath6kl_cookie_cleanup(struct ath6kl *ar);
 748 void ath6kl_rx(struct htc_target *target, struct htc_packet *packet);
 749 void ath6kl_tx_complete(void *context, struct list_head *packet_queue);
 750 enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
 751                                                struct htc_packet *packet);
 752 void ath6kl_stop_txrx(struct ath6kl *ar);
 753 void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar);
 754 int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value);
 755 int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length);
 756 int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value);
 757 int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length);
 758 int ath6kl_read_fwlogs(struct ath6kl *ar);
 759 void ath6kl_init_profile_info(struct ath6kl_vif *vif);
 760 void ath6kl_tx_data_cleanup(struct ath6kl *ar);
 761
 762 struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar);
 763 void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie);
 764 int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev);
 765
 766 struct aggr_info *aggr_init(struct ath6kl_vif *vif);
 767 void aggr_conn_init(struct ath6kl_vif *vif, struct aggr_info *aggr_info,
 768                     struct aggr_info_conn *aggr_conn);
 769 void ath6kl_rx_refill(struct htc_target *target,
 770                       enum htc_endpoint_id endpoint);
 771 void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count);
 772 struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target,
 773                                             enum htc_endpoint_id endpoint,
 774                                             int len);
 775 void aggr_module_destroy(struct aggr_info *aggr_info);
 776 void aggr_reset_state(struct aggr_info_conn *aggr_conn);
 777
 778 struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 *node_addr);
 779 struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid);
 780
 781 void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver);
 782 int ath6kl_control_tx(void *devt, struct sk_buff *skb,
 783                       enum htc_endpoint_id eid);
 784 void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel,
 785                           u8 *bssid, u16 listen_int,
 786                           u16 beacon_int, enum network_type net_type,
 787                           u8 beacon_ie_len, u8 assoc_req_len,
 788                           u8 assoc_resp_len, u8 *assoc_info);
 789 void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel);
 790 void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr,
 791                                 u8 keymgmt, u8 ucipher, u8 auth,
 792                                 u8 assoc_req_len, u8 *assoc_info, u8 apsd_info);
 793 void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason,
 794                              u8 *bssid, u8 assoc_resp_len,
 795                              u8 *assoc_info, u16 prot_reason_status);
 796 void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast);
 797 void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr);
 798 void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status);
 799 void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len);
 800 void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active);
 801 enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac);
 802
 803 void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid);
 804
 805 void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif);
 806 void ath6kl_disconnect(struct ath6kl_vif *vif);
 807 void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid);
 808 void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no,
 809                              u8 win_sz);
 810 void ath6kl_wakeup_event(void *dev);
 811
 812 void ath6kl_reset_device(struct ath6kl *ar, u32 target_type,
 813                          bool wait_fot_compltn, bool cold_reset);
 814 void ath6kl_init_control_info(struct ath6kl_vif *vif);
 815 struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar);
 816 void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready);
 817 int ath6kl_init_hw_start(struct ath6kl *ar);
 818 int ath6kl_init_hw_stop(struct ath6kl *ar);
 819 int ath6kl_init_fetch_firmwares(struct ath6kl *ar);
 820 int ath6kl_init_hw_params(struct ath6kl *ar);
 821
 822 void ath6kl_check_wow_status(struct ath6kl *ar);
 823
 824 struct ath6kl *ath6kl_core_create(struct device *dev);
 825 int ath6kl_core_init(struct ath6kl *ar);
 826 void ath6kl_core_cleanup(struct ath6kl *ar);
 827 void ath6kl_core_destroy(struct ath6kl *ar);
 828
 829 #endif /* CORE_H */