drivers/net/wireless/ath/ath9k/ani.h

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #ifndef ANI_H
  18 #define ANI_H
  19
  20 #define HAL_PROCESS_ANI           0x00000001
  21
  22 #define DO_ANI(ah) (((ah)->proc_phyerr & HAL_PROCESS_ANI) && ah->curchan)
  23
  24 #define BEACON_RSSI(ahp) (ahp->stats.avgbrssi)
  25
  26 /* units are errors per second */
  27 #define ATH9K_ANI_OFDM_TRIG_HIGH_OLD      500
  28 #define ATH9K_ANI_OFDM_TRIG_HIGH_NEW      3500
  29 #define ATH9K_ANI_OFDM_TRIG_HIGH_BELOW_INI 1000
  30
  31 /* units are errors per second */
  32 #define ATH9K_ANI_OFDM_TRIG_LOW_OLD       200
  33 #define ATH9K_ANI_OFDM_TRIG_LOW_NEW       400
  34 #define ATH9K_ANI_OFDM_TRIG_LOW_ABOVE_INI 900
  35
  36 /* units are errors per second */
  37 #define ATH9K_ANI_CCK_TRIG_HIGH_OLD       200
  38 #define ATH9K_ANI_CCK_TRIG_HIGH_NEW       600
  39
  40 /* units are errors per second */
  41 #define ATH9K_ANI_CCK_TRIG_LOW_OLD        100
  42 #define ATH9K_ANI_CCK_TRIG_LOW_NEW        300
  43
  44 #define ATH9K_ANI_NOISE_IMMUNE_LVL        4
  45 #define ATH9K_ANI_USE_OFDM_WEAK_SIG       true
  46 #define ATH9K_ANI_CCK_WEAK_SIG_THR        false
  47
  48 #define ATH9K_ANI_SPUR_IMMUNE_LVL_OLD     7
  49 #define ATH9K_ANI_SPUR_IMMUNE_LVL_NEW     3
  50
  51 #define ATH9K_ANI_FIRSTEP_LVL_OLD         0
  52 #define ATH9K_ANI_FIRSTEP_LVL_NEW         2
  53
  54 #define ATH9K_ANI_RSSI_THR_HIGH           40
  55 #define ATH9K_ANI_RSSI_THR_LOW            7
  56
  57 #define ATH9K_ANI_PERIOD_OLD              100
  58 #define ATH9K_ANI_PERIOD_NEW              300
  59
  60 /* in ms */
  61 #define ATH9K_ANI_POLLINTERVAL_OLD        100
  62 #define ATH9K_ANI_POLLINTERVAL_NEW        1000
  63
  64 #define HAL_NOISE_IMMUNE_MAX              4
  65 #define HAL_SPUR_IMMUNE_MAX               7
  66 #define HAL_FIRST_STEP_MAX                2
  67
  68 #define ATH9K_SIG_FIRSTEP_SETTING_MIN     0
  69 #define ATH9K_SIG_FIRSTEP_SETTING_MAX     20
  70 #define ATH9K_SIG_SPUR_IMM_SETTING_MIN    0
  71 #define ATH9K_SIG_SPUR_IMM_SETTING_MAX    22
  72
  73 #define ATH9K_ANI_ENABLE_MRC_CCK          true
  74
  75 /* values here are relative to the INI */
  76
  77 enum ath9k_ani_cmd {
  78         ATH9K_ANI_PRESENT = 0x1,
  79         ATH9K_ANI_NOISE_IMMUNITY_LEVEL = 0x2,
  80         ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION = 0x4,
  81         ATH9K_ANI_CCK_WEAK_SIGNAL_THR = 0x8,
  82         ATH9K_ANI_FIRSTEP_LEVEL = 0x10,
  83         ATH9K_ANI_SPUR_IMMUNITY_LEVEL = 0x20,
  84         ATH9K_ANI_MODE = 0x40,
  85         ATH9K_ANI_PHYERR_RESET = 0x80,
  86         ATH9K_ANI_MRC_CCK = 0x100,
  87         ATH9K_ANI_ALL = 0xfff
  88 };
  89
  90 struct ath9k_mib_stats {
  91         u32 ackrcv_bad;
  92         u32 rts_bad;
  93         u32 rts_good;
  94         u32 fcs_bad;
  95         u32 beacons;
  96 };
  97
  98 /* INI default values for ANI registers */
  99 struct ath9k_ani_default {
 100         u16 m1ThreshLow;
 101         u16 m2ThreshLow;
 102         u16 m1Thresh;
 103         u16 m2Thresh;
 104         u16 m2CountThr;
 105         u16 m2CountThrLow;
 106         u16 m1ThreshLowExt;
 107         u16 m2ThreshLowExt;
 108         u16 m1ThreshExt;
 109         u16 m2ThreshExt;
 110         u16 firstep;
 111         u16 firstepLow;
 112         u16 cycpwrThr1;
 113         u16 cycpwrThr1Ext;
 114 };
 115
 116 struct ar5416AniState {
 117         struct ath9k_channel *c;
 118         u8 noiseImmunityLevel;
 119         u8 ofdmNoiseImmunityLevel;
 120         u8 cckNoiseImmunityLevel;
 121         bool ofdmsTurn;
 122         u8 mrcCCKOff;
 123         u8 spurImmunityLevel;
 124         u8 firstepLevel;
 125         u8 ofdmWeakSigDetectOff;
 126         u8 cckWeakSigThreshold;
 127         bool update_ani;
 128         u32 listenTime;
 129         int32_t rssiThrLow;
 130         int32_t rssiThrHigh;
 131         u32 noiseFloor;
 132         u32 ofdmPhyErrCount;
 133         u32 cckPhyErrCount;
 134         int16_t pktRssi[2];
 135         int16_t ofdmErrRssi[2];
 136         int16_t cckErrRssi[2];
 137         struct ath9k_ani_default iniDef;
 138 };
 139
 140 struct ar5416Stats {
 141         u32 ast_ani_niup;
 142         u32 ast_ani_nidown;
 143         u32 ast_ani_spurup;
 144         u32 ast_ani_spurdown;
 145         u32 ast_ani_ofdmon;
 146         u32 ast_ani_ofdmoff;
 147         u32 ast_ani_cckhigh;
 148         u32 ast_ani_ccklow;
 149         u32 ast_ani_stepup;
 150         u32 ast_ani_stepdown;
 151         u32 ast_ani_ofdmerrs;
 152         u32 ast_ani_cckerrs;
 153         u32 ast_ani_reset;
 154         u32 ast_ani_lneg_or_lzero;
 155         u32 avgbrssi;
 156         struct ath9k_mib_stats ast_mibstats;
 157 };
 158 #define ah_mibStats stats.ast_mibstats
 159
 160 void ath9k_enable_mib_counters(struct ath_hw *ah);
 161 void ath9k_hw_disable_mib_counters(struct ath_hw *ah);
 162 void ath9k_hw_ani_setup(struct ath_hw *ah);
 163 void ath9k_hw_ani_init(struct ath_hw *ah);
 164
 165 #endif /* ANI_H */