drivers/net/wireless/ath/ath9k/ath9k.h

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #ifndef ATH9K_H
  18 #define ATH9K_H
  19
  20 #include <linux/etherdevice.h>
  21 #include <linux/device.h>
  22 #include <linux/leds.h>
  23
  24 #include "debug.h"
  25 #include "common.h"
  26
  27 /*
  28  * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
  29  * should rely on this file or its contents.
  30  */
  31
  32 struct ath_node;
  33
  34 /* Macro to expand scalars to 64-bit objects */
  35
  36 #define ito64(x) (sizeof(x) == 1) ?                     \
  37         (((unsigned long long int)(x)) & (0xff)) :      \
  38         (sizeof(x) == 2) ?                              \
  39         (((unsigned long long int)(x)) & 0xffff) :      \
  40         ((sizeof(x) == 4) ?                             \
  41          (((unsigned long long int)(x)) & 0xffffffff) : \
  42          (unsigned long long int)(x))
  43
  44 /* increment with wrap-around */
  45 #define INCR(_l, _sz)   do {                    \
  46                 (_l)++;                         \
  47                 (_l) &= ((_sz) - 1);            \
  48         } while (0)
  49
  50 /* decrement with wrap-around */
  51 #define DECR(_l,  _sz)  do {                    \
  52                 (_l)--;                         \
  53                 (_l) &= ((_sz) - 1);            \
  54         } while (0)
  55
  56 #define A_MAX(a, b) ((a) > (b) ? (a) : (b))
  57
  58 #define TSF_TO_TU(_h,_l) \
  59         ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
  60
  61 #define ATH_TXQ_SETUP(sc, i)        ((sc)->tx.txqsetup & (1<<i))
  62
  63 struct ath_config {
  64         u32 ath_aggr_prot;
  65         u16 txpowlimit;
  66         u8 cabqReadytime;
  67 };
  68
  69 /*************************/
  70 /* Descriptor Management */
  71 /*************************/
  72
  73 #define ATH_TXBUF_RESET(_bf) do {                               \
  74                 (_bf)->bf_stale = false;                        \
  75                 (_bf)->bf_lastbf = NULL;                        \
  76                 (_bf)->bf_next = NULL;                          \
  77                 memset(&((_bf)->bf_state), 0,                   \
  78                        sizeof(struct ath_buf_state));           \
  79         } while (0)
  80
  81 #define ATH_RXBUF_RESET(_bf) do {               \
  82                 (_bf)->bf_stale = false;        \
  83         } while (0)
  84
  85 /**
  86  * enum buffer_type - Buffer type flags
  87  *
  88  * @BUF_HT: Send this buffer using HT capabilities
  89  * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
  90  * @BUF_AGGR: Indicates whether the buffer can be aggregated
  91  *      (used in aggregation scheduling)
  92  * @BUF_RETRY: Indicates whether the buffer is retried
  93  * @BUF_XRETRY: To denote excessive retries of the buffer
  94  */
  95 enum buffer_type {
  96         BUF_HT                  = BIT(1),
  97         BUF_AMPDU               = BIT(2),
  98         BUF_AGGR                = BIT(3),
  99         BUF_RETRY               = BIT(4),
 100         BUF_XRETRY              = BIT(5),
 101 };
 102
 103 #define bf_nframes              bf_state.bfs_nframes
 104 #define bf_al                   bf_state.bfs_al
 105 #define bf_frmlen               bf_state.bfs_frmlen
 106 #define bf_retries              bf_state.bfs_retries
 107 #define bf_seqno                bf_state.bfs_seqno
 108 #define bf_tidno                bf_state.bfs_tidno
 109 #define bf_keyix                bf_state.bfs_keyix
 110 #define bf_keytype              bf_state.bfs_keytype
 111 #define bf_isht(bf)             (bf->bf_state.bf_type & BUF_HT)
 112 #define bf_isampdu(bf)          (bf->bf_state.bf_type & BUF_AMPDU)
 113 #define bf_isaggr(bf)           (bf->bf_state.bf_type & BUF_AGGR)
 114 #define bf_isretried(bf)        (bf->bf_state.bf_type & BUF_RETRY)
 115 #define bf_isxretried(bf)       (bf->bf_state.bf_type & BUF_XRETRY)
 116
 117 #define ATH_TXSTATUS_RING_SIZE 64
 118
 119 struct ath_descdma {
 120         void *dd_desc;
 121         dma_addr_t dd_desc_paddr;
 122         u32 dd_desc_len;
 123         struct ath_buf *dd_bufptr;
 124 };
 125
 126 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
 127                       struct list_head *head, const char *name,
 128                       int nbuf, int ndesc, bool is_tx);
 129 void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
 130                          struct list_head *head);
 131
 132 /***********/
 133 /* RX / TX */
 134 /***********/
 135
 136 #define ATH_MAX_ANTENNA         3
 137 #define ATH_RXBUF               512
 138 #define ATH_TXBUF               512
 139 #define ATH_TXBUF_RESERVE       5
 140 #define ATH_MAX_QDEPTH          (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
 141 #define ATH_TXMAXTRY            13
 142 #define ATH_MGT_TXMAXTRY        4
 143
 144 #define TID_TO_WME_AC(_tid)                             \
 145         ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
 146          (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \
 147          (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
 148          WME_AC_VO)
 149
 150 #define ADDBA_EXCHANGE_ATTEMPTS    10
 151 #define ATH_AGGR_DELIM_SZ          4
 152 #define ATH_AGGR_MINPLEN           256 /* in bytes, minimum packet length */
 153 /* number of delimiters for encryption padding */
 154 #define ATH_AGGR_ENCRYPTDELIM      10
 155 /* minimum h/w qdepth to be sustained to maximize aggregation */
 156 #define ATH_AGGR_MIN_QDEPTH        2
 157 #define ATH_AMPDU_SUBFRAME_DEFAULT 32
 158
 159 #define IEEE80211_SEQ_SEQ_SHIFT    4
 160 #define IEEE80211_SEQ_MAX          4096
 161 #define IEEE80211_WEP_IVLEN        3
 162 #define IEEE80211_WEP_KIDLEN       1
 163 #define IEEE80211_WEP_CRCLEN       4
 164 #define IEEE80211_MAX_MPDU_LEN     (3840 + FCS_LEN +            \
 165                                     (IEEE80211_WEP_IVLEN +      \
 166                                      IEEE80211_WEP_KIDLEN +     \
 167                                      IEEE80211_WEP_CRCLEN))
 168
 169 /* return whether a bit at index _n in bitmap _bm is set
 170  * _sz is the size of the bitmap  */
 171 #define ATH_BA_ISSET(_bm, _n)  (((_n) < (WME_BA_BMP_SIZE)) &&           \
 172                                 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
 173
 174 /* return block-ack bitmap index given sequence and starting sequence */
 175 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
 176
 177 /* returns delimiter padding required given the packet length */
 178 #define ATH_AGGR_GET_NDELIM(_len)                                       \
 179         (((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ?           \
 180           (ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2)
 181
 182 #define BAW_WITHIN(_start, _bawsz, _seqno) \
 183         ((((_seqno) - (_start)) & 4095) < (_bawsz))
 184
 185 #define ATH_AN_2_TID(_an, _tidno)  (&(_an)->tid[(_tidno)])
 186
 187 #define ATH_TX_COMPLETE_POLL_INT        1000
 188
 189 enum ATH_AGGR_STATUS {
 190         ATH_AGGR_DONE,
 191         ATH_AGGR_BAW_CLOSED,
 192         ATH_AGGR_LIMITED,
 193 };
 194
 195 #define ATH_TXFIFO_DEPTH 8
 196 struct ath_txq {
 197         int axq_class;
 198         u32 axq_qnum;
 199         u32 *axq_link;
 200         struct list_head axq_q;
 201         spinlock_t axq_lock;
 202         u32 axq_depth;
 203         bool stopped;
 204         bool axq_tx_inprogress;
 205         struct list_head axq_acq;
 206         struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
 207         struct list_head txq_fifo_pending;
 208         u8 txq_headidx;
 209         u8 txq_tailidx;
 210         int pending_frames;
 211 };
 212
 213 struct ath_atx_ac {
 214         int sched;
 215         int qnum;
 216         struct list_head list;
 217         struct list_head tid_q;
 218 };
 219
 220 struct ath_buf_state {
 221         int bfs_nframes;
 222         u16 bfs_al;
 223         u16 bfs_frmlen;
 224         int bfs_seqno;
 225         int bfs_tidno;
 226         int bfs_retries;
 227         u8 bf_type;
 228         u32 bfs_keyix;
 229         enum ath9k_key_type bfs_keytype;
 230 };
 231
 232 struct ath_buf {
 233         struct list_head list;
 234         struct ath_buf *bf_lastbf;      /* last buf of this unit (a frame or
 235                                            an aggregate) */
 236         struct ath_buf *bf_next;        /* next subframe in the aggregate */
 237         struct sk_buff *bf_mpdu;        /* enclosing frame structure */
 238         void *bf_desc;                  /* virtual addr of desc */
 239         dma_addr_t bf_daddr;            /* physical addr of desc */
 240         dma_addr_t bf_buf_addr;         /* physical addr of data buffer */
 241         bool bf_stale;
 242         bool bf_isnullfunc;
 243         bool bf_tx_aborted;
 244         u16 bf_flags;
 245         struct ath_buf_state bf_state;
 246         dma_addr_t bf_dmacontext;
 247         struct ath_wiphy *aphy;
 248         struct ath_txq *txq;
 249 };
 250
 251 struct ath_atx_tid {
 252         struct list_head list;
 253         struct list_head buf_q;
 254         struct ath_node *an;
 255         struct ath_atx_ac *ac;
 256         struct ath_buf *tx_buf[ATH_TID_MAX_BUFS];
 257         u16 seq_start;
 258         u16 seq_next;
 259         u16 baw_size;
 260         int tidno;
 261         int baw_head;   /* first un-acked tx buffer */
 262         int baw_tail;   /* next unused tx buffer slot */
 263         int sched;
 264         int paused;
 265         u8 state;
 266 };
 267
 268 struct ath_node {
 269         struct ath_common *common;
 270         struct ath_atx_tid tid[WME_NUM_TID];
 271         struct ath_atx_ac ac[WME_NUM_AC];
 272         u16 maxampdu;
 273         u8 mpdudensity;
 274         int last_rssi;
 275 };
 276
 277 #define AGGR_CLEANUP         BIT(1)
 278 #define AGGR_ADDBA_COMPLETE  BIT(2)
 279 #define AGGR_ADDBA_PROGRESS  BIT(3)
 280
 281 struct ath_tx_control {
 282         struct ath_txq *txq;
 283         int if_id;
 284         enum ath9k_internal_frame_type frame_type;
 285 };
 286
 287 #define ATH_TX_ERROR        0x01
 288 #define ATH_TX_XRETRY       0x02
 289 #define ATH_TX_BAR          0x04
 290
 291 struct ath_tx {
 292         u16 seq_no;
 293         u32 txqsetup;
 294         int hwq_map[WME_NUM_AC];
 295         spinlock_t txbuflock;
 296         struct list_head txbuf;
 297         struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
 298         struct ath_descdma txdma;
 299 };
 300
 301 struct ath_rx_edma {
 302         struct sk_buff_head rx_fifo;
 303         struct sk_buff_head rx_buffers;
 304         u32 rx_fifo_hwsize;
 305 };
 306
 307 struct ath_rx {
 308         u8 defant;
 309         u8 rxotherant;
 310         u32 *rxlink;
 311         unsigned int rxfilter;
 312         spinlock_t rxflushlock;
 313         spinlock_t rxbuflock;
 314         struct list_head rxbuf;
 315         struct ath_descdma rxdma;
 316         struct ath_buf *rx_bufptr;
 317         struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
 318 };
 319
 320 int ath_startrecv(struct ath_softc *sc);
 321 bool ath_stoprecv(struct ath_softc *sc);
 322 void ath_flushrecv(struct ath_softc *sc);
 323 u32 ath_calcrxfilter(struct ath_softc *sc);
 324 int ath_rx_init(struct ath_softc *sc, int nbufs);
 325 void ath_rx_cleanup(struct ath_softc *sc);
 326 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
 327 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
 328 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
 329 int ath_tx_setup(struct ath_softc *sc, int haltype);
 330 void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx);
 331 void ath_draintxq(struct ath_softc *sc,
 332                      struct ath_txq *txq, bool retry_tx);
 333 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
 334 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
 335 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
 336 int ath_tx_init(struct ath_softc *sc, int nbufs);
 337 void ath_tx_cleanup(struct ath_softc *sc);
 338 int ath_txq_update(struct ath_softc *sc, int qnum,
 339                    struct ath9k_tx_queue_info *q);
 340 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
 341                  struct ath_tx_control *txctl);
 342 void ath_tx_tasklet(struct ath_softc *sc);
 343 void ath_tx_edma_tasklet(struct ath_softc *sc);
 344 void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb);
 345 bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, u8 tidno);
 346 void ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
 347                        u16 tid, u16 *ssn);
 348 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
 349 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
 350 void ath9k_enable_ps(struct ath_softc *sc);
 351
 352 /********/
 353 /* VIFs */
 354 /********/
 355
 356 struct ath_vif {
 357         int av_bslot;
 358         __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
 359         enum nl80211_iftype av_opmode;
 360         struct ath_buf *av_bcbuf;
 361         struct ath_tx_control av_btxctl;
 362         u8 bssid[ETH_ALEN]; /* current BSSID from config_interface */
 363 };
 364
 365 /*******************/
 366 /* Beacon Handling */
 367 /*******************/
 368
 369 /*
 370  * Regardless of the number of beacons we stagger, (i.e. regardless of the
 371  * number of BSSIDs) if a given beacon does not go out even after waiting this
 372  * number of beacon intervals, the game's up.
 373  */
 374 #define BSTUCK_THRESH                   (9 * ATH_BCBUF)
 375 #define ATH_BCBUF                       4
 376 #define ATH_DEFAULT_BINTVAL             100 /* TU */
 377 #define ATH_DEFAULT_BMISS_LIMIT         10
 378 #define IEEE80211_MS_TO_TU(x)           (((x) * 1000) / 1024)
 379
 380 struct ath_beacon_config {
 381         u16 beacon_interval;
 382         u16 listen_interval;
 383         u16 dtim_period;
 384         u16 bmiss_timeout;
 385         u8 dtim_count;
 386 };
 387
 388 struct ath_beacon {
 389         enum {
 390                 OK,             /* no change needed */
 391                 UPDATE,         /* update pending */
 392                 COMMIT          /* beacon sent, commit change */
 393         } updateslot;           /* slot time update fsm */
 394
 395         u32 beaconq;
 396         u32 bmisscnt;
 397         u32 ast_be_xmit;
 398         u64 bc_tstamp;
 399         struct ieee80211_vif *bslot[ATH_BCBUF];
 400         struct ath_wiphy *bslot_aphy[ATH_BCBUF];
 401         int slottime;
 402         int slotupdate;
 403         struct ath9k_tx_queue_info beacon_qi;
 404         struct ath_descdma bdma;
 405         struct ath_txq *cabq;
 406         struct list_head bbuf;
 407 };
 408
 409 void ath_beacon_tasklet(unsigned long data);
 410 void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
 411 int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif);
 412 void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
 413 int ath_beaconq_config(struct ath_softc *sc);
 414
 415 /*******/
 416 /* ANI */
 417 /*******/
 418
 419 #define ATH_STA_SHORT_CALINTERVAL 1000    /* 1 second */
 420 #define ATH_AP_SHORT_CALINTERVAL  100     /* 100 ms */
 421 #define ATH_ANI_POLLINTERVAL_OLD  100     /* 100 ms */
 422 #define ATH_ANI_POLLINTERVAL_NEW  1000    /* 1000 ms */
 423 #define ATH_LONG_CALINTERVAL      30000   /* 30 seconds */
 424 #define ATH_RESTART_CALINTERVAL   1200000 /* 20 minutes */
 425
 426 void ath_ani_calibrate(unsigned long data);
 427
 428 /**********/
 429 /* BTCOEX */
 430 /**********/
 431
 432 /* Defines the BT AR_BT_COEX_WGHT used */
 433 enum ath_stomp_type {
 434         ATH_BTCOEX_NO_STOMP,
 435         ATH_BTCOEX_STOMP_ALL,
 436         ATH_BTCOEX_STOMP_LOW,
 437         ATH_BTCOEX_STOMP_NONE
 438 };
 439
 440 struct ath_btcoex {
 441         bool hw_timer_enabled;
 442         spinlock_t btcoex_lock;
 443         struct timer_list period_timer; /* Timer for BT period */
 444         u32 bt_priority_cnt;
 445         unsigned long bt_priority_time;
 446         int bt_stomp_type; /* Types of BT stomping */
 447         u32 btcoex_no_stomp; /* in usec */
 448         u32 btcoex_period; /* in usec */
 449         u32 btscan_no_stomp; /* in usec */
 450         struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */
 451 };
 452
 453 int ath_init_btcoex_timer(struct ath_softc *sc);
 454 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
 455 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
 456
 457 /********************/
 458 /*   LED Control    */
 459 /********************/
 460
 461 #define ATH_LED_PIN_DEF                 1
 462 #define ATH_LED_PIN_9287                8
 463 #define ATH_LED_ON_DURATION_IDLE        350     /* in msecs */
 464 #define ATH_LED_OFF_DURATION_IDLE       250     /* in msecs */
 465
 466 enum ath_led_type {
 467         ATH_LED_RADIO,
 468         ATH_LED_ASSOC,
 469         ATH_LED_TX,
 470         ATH_LED_RX
 471 };
 472
 473 struct ath_led {
 474         struct ath_softc *sc;
 475         struct led_classdev led_cdev;
 476         enum ath_led_type led_type;
 477         char name[32];
 478         bool registered;
 479 };
 480
 481 void ath_init_leds(struct ath_softc *sc);
 482 void ath_deinit_leds(struct ath_softc *sc);
 483
 484 /********************/
 485 /* Main driver core */
 486 /********************/
 487
 488 /*
 489  * Default cache line size, in bytes.
 490  * Used when PCI device not fully initialized by bootrom/BIOS
 491 */
 492 #define DEFAULT_CACHELINE       32
 493 #define ATH_REGCLASSIDS_MAX     10
 494 #define ATH_CABQ_READY_TIME     80      /* % of beacon interval */
 495 #define ATH_MAX_SW_RETRIES      10
 496 #define ATH_CHAN_MAX            255
 497 #define IEEE80211_WEP_NKID      4       /* number of key ids */
 498
 499 #define ATH_TXPOWER_MAX         100     /* .5 dBm units */
 500 #define ATH_RATE_DUMMY_MARKER   0
 501
 502 #define SC_OP_INVALID                BIT(0)
 503 #define SC_OP_BEACONS                BIT(1)
 504 #define SC_OP_RXAGGR                 BIT(2)
 505 #define SC_OP_TXAGGR                 BIT(3)
 506 #define SC_OP_FULL_RESET             BIT(4)
 507 #define SC_OP_PREAMBLE_SHORT         BIT(5)
 508 #define SC_OP_PROTECT_ENABLE         BIT(6)
 509 #define SC_OP_RXFLUSH                BIT(7)
 510 #define SC_OP_LED_ASSOCIATED         BIT(8)
 511 #define SC_OP_LED_ON                 BIT(9)
 512 #define SC_OP_SCANNING               BIT(10)
 513 #define SC_OP_TSF_RESET              BIT(11)
 514 #define SC_OP_BT_PRIORITY_DETECTED   BIT(12)
 515 #define SC_OP_BT_SCAN                BIT(13)
 516
 517 /* Powersave flags */
 518 #define PS_WAIT_FOR_BEACON        BIT(0)
 519 #define PS_WAIT_FOR_CAB           BIT(1)
 520 #define PS_WAIT_FOR_PSPOLL_DATA   BIT(2)
 521 #define PS_WAIT_FOR_TX_ACK        BIT(3)
 522 #define PS_BEACON_SYNC            BIT(4)
 523 #define PS_NULLFUNC_COMPLETED     BIT(5)
 524 #define PS_ENABLED                BIT(6)
 525
 526 struct ath_wiphy;
 527 struct ath_rate_table;
 528
 529 struct ath_softc {
 530         struct ieee80211_hw *hw;
 531         struct device *dev;
 532
 533         spinlock_t wiphy_lock; /* spinlock to protect ath_wiphy data */
 534         struct ath_wiphy *pri_wiphy;
 535         struct ath_wiphy **sec_wiphy; /* secondary wiphys (virtual radios); may
 536                                        * have NULL entries */
 537         int num_sec_wiphy; /* number of sec_wiphy pointers in the array */
 538         int chan_idx;
 539         int chan_is_ht;
 540         struct ath_wiphy *next_wiphy;
 541         struct work_struct chan_work;
 542         int wiphy_select_failures;
 543         unsigned long wiphy_select_first_fail;
 544         struct delayed_work wiphy_work;
 545         unsigned long wiphy_scheduler_int;
 546         int wiphy_scheduler_index;
 547
 548         struct tasklet_struct intr_tq;
 549         struct tasklet_struct bcon_tasklet;
 550         struct ath_hw *sc_ah;
 551         void __iomem *mem;
 552         int irq;
 553         spinlock_t sc_resetlock;
 554         spinlock_t sc_serial_rw;
 555         spinlock_t sc_pm_lock;
 556         struct mutex mutex;
 557
 558         u32 intrstatus;
 559         u32 sc_flags; /* SC_OP_* */
 560         u16 ps_flags; /* PS_* */
 561         u16 curtxpow;
 562         u8 nbcnvifs;
 563         u16 nvifs;
 564         bool ps_enabled;
 565         bool ps_idle;
 566         unsigned long ps_usecount;
 567
 568         struct ath_config config;
 569         struct ath_rx rx;
 570         struct ath_tx tx;
 571         struct ath_beacon beacon;
 572         const struct ath_rate_table *cur_rate_table;
 573         enum wireless_mode cur_rate_mode;
 574         struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
 575
 576         struct ath_led radio_led;
 577         struct ath_led assoc_led;
 578         struct ath_led tx_led;
 579         struct ath_led rx_led;
 580         struct delayed_work ath_led_blink_work;
 581         int led_on_duration;
 582         int led_off_duration;
 583         int led_on_cnt;
 584         int led_off_cnt;
 585
 586         int beacon_interval;
 587
 588 #ifdef CONFIG_ATH9K_DEBUGFS
 589         struct ath9k_debug debug;
 590 #endif
 591         struct ath_beacon_config cur_beacon_conf;
 592         struct delayed_work tx_complete_work;
 593         struct ath_btcoex btcoex;
 594
 595         struct ath_descdma txsdma;
 596 };
 597
 598 struct ath_wiphy {
 599         struct ath_softc *sc; /* shared for all virtual wiphys */
 600         struct ieee80211_hw *hw;
 601         enum ath_wiphy_state {
 602                 ATH_WIPHY_INACTIVE,
 603                 ATH_WIPHY_ACTIVE,
 604                 ATH_WIPHY_PAUSING,
 605                 ATH_WIPHY_PAUSED,
 606                 ATH_WIPHY_SCAN,
 607         } state;
 608         bool idle;
 609         int chan_idx;
 610         int chan_is_ht;
 611 };
 612
 613 void ath9k_tasklet(unsigned long data);
 614 int ath_reset(struct ath_softc *sc, bool retry_tx);
 615 int ath_get_hal_qnum(u16 queue, struct ath_softc *sc);
 616 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc);
 617 int ath_cabq_update(struct ath_softc *);
 618
 619 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
 620 {
 621         common->bus_ops->read_cachesize(common, csz);
 622 }
 623
 624 extern struct ieee80211_ops ath9k_ops;
 625 extern int modparam_nohwcrypt;
 626
 627 irqreturn_t ath_isr(int irq, void *dev);
 628 int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
 629                     const struct ath_bus_ops *bus_ops);
 630 void ath9k_deinit_device(struct ath_softc *sc);
 631 const char *ath_mac_bb_name(u32 mac_bb_version);
 632 const char *ath_rf_name(u16 rf_version);
 633 void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
 634 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
 635                            struct ath9k_channel *ichan);
 636 void ath_update_chainmask(struct ath_softc *sc, int is_ht);
 637 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 638                     struct ath9k_channel *hchan);
 639
 640 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw);
 641 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw);
 642 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode);
 643
 644 #ifdef CONFIG_PCI
 645 int ath_pci_init(void);
 646 void ath_pci_exit(void);
 647 #else
 648 static inline int ath_pci_init(void) { return 0; };
 649 static inline void ath_pci_exit(void) {};
 650 #endif
 651
 652 #ifdef CONFIG_ATHEROS_AR71XX
 653 int ath_ahb_init(void);
 654 void ath_ahb_exit(void);
 655 #else
 656 static inline int ath_ahb_init(void) { return 0; };
 657 static inline void ath_ahb_exit(void) {};
 658 #endif
 659
 660 void ath9k_ps_wakeup(struct ath_softc *sc);
 661 void ath9k_ps_restore(struct ath_softc *sc);
 662
 663 void ath9k_set_bssid_mask(struct ieee80211_hw *hw);
 664 int ath9k_wiphy_add(struct ath_softc *sc);
 665 int ath9k_wiphy_del(struct ath_wiphy *aphy);
 666 void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb);
 667 int ath9k_wiphy_pause(struct ath_wiphy *aphy);
 668 int ath9k_wiphy_unpause(struct ath_wiphy *aphy);
 669 int ath9k_wiphy_select(struct ath_wiphy *aphy);
 670 void ath9k_wiphy_set_scheduler(struct ath_softc *sc, unsigned int msec_int);
 671 void ath9k_wiphy_chan_work(struct work_struct *work);
 672 bool ath9k_wiphy_started(struct ath_softc *sc);
 673 void ath9k_wiphy_pause_all_forced(struct ath_softc *sc,
 674                                   struct ath_wiphy *selected);
 675 bool ath9k_wiphy_scanning(struct ath_softc *sc);
 676 void ath9k_wiphy_work(struct work_struct *work);
 677 bool ath9k_all_wiphys_idle(struct ath_softc *sc);
 678 void ath9k_set_wiphy_idle(struct ath_wiphy *aphy, bool idle);
 679
 680 void ath_mac80211_stop_queue(struct ath_softc *sc, u16 skb_queue);
 681 void ath_mac80211_start_queue(struct ath_softc *sc, u16 skb_queue);
 682
 683 void ath_start_rfkill_poll(struct ath_softc *sc);
 684 extern void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
 685
 686 #endif /* ATH9K_H */