drivers/net/wireless/ath/ath9k/ath9k.h

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #ifndef ATH9K_H
  18 #define ATH9K_H
  19
  20 #include <linux/etherdevice.h>
  21 #include <linux/device.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/leds.h>
  24 #include <linux/completion.h>
  25
  26 #include "common.h"
  27 #include "debug.h"
  28 #include "mci.h"
  29 #include "dfs.h"
  30 #include "spectral.h"
  31
  32 struct ath_node;
  33
  34 extern struct ieee80211_ops ath9k_ops;
  35 extern int ath9k_modparam_nohwcrypt;
  36 extern int led_blink;
  37 extern bool is_ath9k_unloaded;
  38
  39 /*************************/
  40 /* Descriptor Management */
  41 /*************************/
  42
  43 #define ATH_TXSTATUS_RING_SIZE 512
  44
  45 /* Macro to expand scalars to 64-bit objects */
  46 #define ito64(x) (sizeof(x) == 1) ?                     \
  47         (((unsigned long long int)(x)) & (0xff)) :      \
  48         (sizeof(x) == 2) ?                              \
  49         (((unsigned long long int)(x)) & 0xffff) :      \
  50         ((sizeof(x) == 4) ?                             \
  51          (((unsigned long long int)(x)) & 0xffffffff) : \
  52          (unsigned long long int)(x))
  53
  54 #define ATH_TXBUF_RESET(_bf) do {                               \
  55                 (_bf)->bf_lastbf = NULL;                        \
  56                 (_bf)->bf_next = NULL;                          \
  57                 memset(&((_bf)->bf_state), 0,                   \
  58                        sizeof(struct ath_buf_state));           \
  59         } while (0)
  60
  61 #define DS2PHYS(_dd, _ds)                                               \
  62         ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
  63 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
  64 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
  65
  66 struct ath_descdma {
  67         void *dd_desc;
  68         dma_addr_t dd_desc_paddr;
  69         u32 dd_desc_len;
  70 };
  71
  72 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
  73                       struct list_head *head, const char *name,
  74                       int nbuf, int ndesc, bool is_tx);
  75
  76 /***********/
  77 /* RX / TX */
  78 /***********/
  79
  80 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
  81
  82 /* increment with wrap-around */
  83 #define INCR(_l, _sz)   do {                    \
  84                 (_l)++;                         \
  85                 (_l) &= ((_sz) - 1);            \
  86         } while (0)
  87
  88 #define ATH_RXBUF               512
  89 #define ATH_TXBUF               512
  90 #define ATH_TXBUF_RESERVE       5
  91 #define ATH_MAX_QDEPTH          (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
  92 #define ATH_TXMAXTRY            13
  93 #define ATH_MAX_SW_RETRIES      30
  94
  95 #define TID_TO_WME_AC(_tid)                             \
  96         ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE :   \
  97          (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK :   \
  98          (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI :   \
  99          IEEE80211_AC_VO)
 100
 101 #define ATH_AGGR_DELIM_SZ          4
 102 #define ATH_AGGR_MINPLEN           256 /* in bytes, minimum packet length */
 103 /* number of delimiters for encryption padding */
 104 #define ATH_AGGR_ENCRYPTDELIM      10
 105 /* minimum h/w qdepth to be sustained to maximize aggregation */
 106 #define ATH_AGGR_MIN_QDEPTH        2
 107 /* minimum h/w qdepth for non-aggregated traffic */
 108 #define ATH_NON_AGGR_MIN_QDEPTH    8
 109 #define ATH_TX_COMPLETE_POLL_INT   1000
 110 #define ATH_TXFIFO_DEPTH           8
 111 #define ATH_TX_ERROR               0x01
 112
 113 /* Stop tx traffic 1ms before the GO goes away */
 114 #define ATH_P2P_PS_STOP_TIME       1000
 115
 116 #define IEEE80211_SEQ_SEQ_SHIFT    4
 117 #define IEEE80211_SEQ_MAX          4096
 118 #define IEEE80211_WEP_IVLEN        3
 119 #define IEEE80211_WEP_KIDLEN       1
 120 #define IEEE80211_WEP_CRCLEN       4
 121 #define IEEE80211_MAX_MPDU_LEN     (3840 + FCS_LEN +            \
 122                                     (IEEE80211_WEP_IVLEN +      \
 123                                      IEEE80211_WEP_KIDLEN +     \
 124                                      IEEE80211_WEP_CRCLEN))
 125
 126 /* return whether a bit at index _n in bitmap _bm is set
 127  * _sz is the size of the bitmap  */
 128 #define ATH_BA_ISSET(_bm, _n)  (((_n) < (WME_BA_BMP_SIZE)) &&           \
 129                                 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
 130
 131 /* return block-ack bitmap index given sequence and starting sequence */
 132 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
 133
 134 /* return the seqno for _start + _offset */
 135 #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1))
 136
 137 /* returns delimiter padding required given the packet length */
 138 #define ATH_AGGR_GET_NDELIM(_len)                                       \
 139        (((_len) >= ATH_AGGR_MINPLEN) ? 0 :                             \
 140         DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
 141
 142 #define BAW_WITHIN(_start, _bawsz, _seqno) \
 143         ((((_seqno) - (_start)) & 4095) < (_bawsz))
 144
 145 #define ATH_AN_2_TID(_an, _tidno)  (&(_an)->tid[(_tidno)])
 146
 147 #define IS_HT_RATE(rate)   (rate & 0x80)
 148 #define IS_CCK_RATE(rate)  ((rate >= 0x18) && (rate <= 0x1e))
 149 #define IS_OFDM_RATE(rate) ((rate >= 0x8) && (rate <= 0xf))
 150
 151 enum {
 152        WLAN_RC_PHY_OFDM,
 153        WLAN_RC_PHY_CCK,
 154 };
 155
 156 struct ath_txq {
 157         int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
 158         u32 axq_qnum; /* ath9k hardware queue number */
 159         void *axq_link;
 160         struct list_head axq_q;
 161         spinlock_t axq_lock;
 162         u32 axq_depth;
 163         u32 axq_ampdu_depth;
 164         bool stopped;
 165         bool axq_tx_inprogress;
 166         struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
 167         u8 txq_headidx;
 168         u8 txq_tailidx;
 169         int pending_frames;
 170         struct sk_buff_head complete_q;
 171 };
 172
 173 struct ath_atx_ac {
 174         struct ath_txq *txq;
 175         struct list_head list;
 176         struct list_head tid_q;
 177         bool clear_ps_filter;
 178         bool sched;
 179 };
 180
 181 struct ath_frame_info {
 182         struct ath_buf *bf;
 183         int framelen;
 184         enum ath9k_key_type keytype;
 185         u8 keyix;
 186         u8 rtscts_rate;
 187         u8 retries : 7;
 188         u8 baw_tracked : 1;
 189 };
 190
 191 struct ath_rxbuf {
 192         struct list_head list;
 193         struct sk_buff *bf_mpdu;
 194         void *bf_desc;
 195         dma_addr_t bf_daddr;
 196         dma_addr_t bf_buf_addr;
 197 };
 198
 199 /**
 200  * enum buffer_type - Buffer type flags
 201  *
 202  * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
 203  * @BUF_AGGR: Indicates whether the buffer can be aggregated
 204  *      (used in aggregation scheduling)
 205  */
 206 enum buffer_type {
 207         BUF_AMPDU               = BIT(0),
 208         BUF_AGGR                = BIT(1),
 209 };
 210
 211 #define bf_isampdu(bf)          (bf->bf_state.bf_type & BUF_AMPDU)
 212 #define bf_isaggr(bf)           (bf->bf_state.bf_type & BUF_AGGR)
 213
 214 struct ath_buf_state {
 215         u8 bf_type;
 216         u8 bfs_paprd;
 217         u8 ndelim;
 218         bool stale;
 219         u16 seqno;
 220         unsigned long bfs_paprd_timestamp;
 221 };
 222
 223 struct ath_buf {
 224         struct list_head list;
 225         struct ath_buf *bf_lastbf;      /* last buf of this unit (a frame or
 226                                            an aggregate) */
 227         struct ath_buf *bf_next;        /* next subframe in the aggregate */
 228         struct sk_buff *bf_mpdu;        /* enclosing frame structure */
 229         void *bf_desc;                  /* virtual addr of desc */
 230         dma_addr_t bf_daddr;            /* physical addr of desc */
 231         dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
 232         struct ieee80211_tx_rate rates[4];
 233         struct ath_buf_state bf_state;
 234 };
 235
 236 struct ath_atx_tid {
 237         struct list_head list;
 238         struct sk_buff_head buf_q;
 239         struct sk_buff_head retry_q;
 240         struct ath_node *an;
 241         struct ath_atx_ac *ac;
 242         unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
 243         u16 seq_start;
 244         u16 seq_next;
 245         u16 baw_size;
 246         u8 tidno;
 247         int baw_head;   /* first un-acked tx buffer */
 248         int baw_tail;   /* next unused tx buffer slot */
 249
 250         s8 bar_index;
 251         bool sched;
 252         bool active;
 253 };
 254
 255 struct ath_node {
 256         struct ath_softc *sc;
 257         struct ieee80211_sta *sta; /* station struct we're part of */
 258         struct ieee80211_vif *vif; /* interface with which we're associated */
 259         struct ath_atx_tid tid[IEEE80211_NUM_TIDS];
 260         struct ath_atx_ac ac[IEEE80211_NUM_ACS];
 261
 262         u16 maxampdu;
 263         u8 mpdudensity;
 264         s8 ps_key;
 265
 266         bool sleeping;
 267         bool no_ps_filter;
 268
 269 #ifdef CONFIG_ATH9K_STATION_STATISTICS
 270         struct ath_rx_rate_stats rx_rate_stats;
 271 #endif
 272         u8 key_idx[4];
 273 };
 274
 275 struct ath_tx_control {
 276         struct ath_txq *txq;
 277         struct ath_node *an;
 278         struct ieee80211_sta *sta;
 279         u8 paprd;
 280         bool force_channel;
 281 };
 282
 283
 284 /**
 285  * @txq_map:  Index is mac80211 queue number.  This is
 286  *  not necessarily the same as the hardware queue number
 287  *  (axq_qnum).
 288  */
 289 struct ath_tx {
 290         u16 seq_no;
 291         u32 txqsetup;
 292         spinlock_t txbuflock;
 293         struct list_head txbuf;
 294         struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
 295         struct ath_descdma txdma;
 296         struct ath_txq *txq_map[IEEE80211_NUM_ACS];
 297         struct ath_txq *uapsdq;
 298         u32 txq_max_pending[IEEE80211_NUM_ACS];
 299         u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32];
 300 };
 301
 302 struct ath_rx_edma {
 303         struct sk_buff_head rx_fifo;
 304         u32 rx_fifo_hwsize;
 305 };
 306
 307 struct ath_rx {
 308         u8 defant;
 309         u8 rxotherant;
 310         bool discard_next;
 311         u32 *rxlink;
 312         u32 num_pkts;
 313         unsigned int rxfilter;
 314         struct list_head rxbuf;
 315         struct ath_descdma rxdma;
 316         struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
 317
 318         struct ath_rxbuf *buf_hold;
 319         struct sk_buff *frag;
 320
 321         u32 ampdu_ref;
 322 };
 323
 324 struct ath_chanctx {
 325         struct cfg80211_chan_def chandef;
 326         struct list_head vifs;
 327         struct list_head acq[IEEE80211_NUM_ACS];
 328
 329         u16 txpower;
 330         bool offchannel;
 331         bool stopped;
 332 };
 333
 334 void ath_chanctx_init(struct ath_softc *sc);
 335 void ath_chanctx_set_channel(struct ath_softc *sc, struct ath_chanctx *ctx,
 336                              struct cfg80211_chan_def *chandef);
 337 void ath_chanctx_switch(struct ath_softc *sc, struct ath_chanctx *ctx,
 338                         struct cfg80211_chan_def *chandef);
 339 int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan);
 340 int ath_startrecv(struct ath_softc *sc);
 341 bool ath_stoprecv(struct ath_softc *sc);
 342 u32 ath_calcrxfilter(struct ath_softc *sc);
 343 int ath_rx_init(struct ath_softc *sc, int nbufs);
 344 void ath_rx_cleanup(struct ath_softc *sc);
 345 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
 346 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
 347 void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq);
 348 void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq);
 349 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq);
 350 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
 351 bool ath_drain_all_txq(struct ath_softc *sc);
 352 void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq);
 353 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
 354 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
 355 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
 356 void ath_txq_schedule_all(struct ath_softc *sc);
 357 int ath_tx_init(struct ath_softc *sc, int nbufs);
 358 int ath_txq_update(struct ath_softc *sc, int qnum,
 359                    struct ath9k_tx_queue_info *q);
 360 void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
 361 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
 362                  struct ath_tx_control *txctl);
 363 void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
 364                  struct sk_buff *skb);
 365 void ath_tx_tasklet(struct ath_softc *sc);
 366 void ath_tx_edma_tasklet(struct ath_softc *sc);
 367 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
 368                       u16 tid, u16 *ssn);
 369 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
 370 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
 371
 372 void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an);
 373 void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc,
 374                        struct ath_node *an);
 375 void ath9k_release_buffered_frames(struct ieee80211_hw *hw,
 376                                    struct ieee80211_sta *sta,
 377                                    u16 tids, int nframes,
 378                                    enum ieee80211_frame_release_type reason,
 379                                    bool more_data);
 380
 381 /********/
 382 /* VIFs */
 383 /********/
 384
 385 struct ath_vif {
 386         struct list_head list;
 387
 388         struct ieee80211_vif *vif;
 389         struct ath_node mcast_node;
 390         int av_bslot;
 391         bool primary_sta_vif;
 392         __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
 393         struct ath_buf *av_bcbuf;
 394         struct ath_chanctx *chanctx;
 395
 396         /* P2P Client */
 397         struct ieee80211_noa_data noa;
 398 };
 399
 400 struct ath9k_vif_iter_data {
 401         u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */
 402         u8 mask[ETH_ALEN]; /* bssid mask */
 403         bool has_hw_macaddr;
 404
 405         int naps;      /* number of AP vifs */
 406         int nmeshes;   /* number of mesh vifs */
 407         int nstations; /* number of station vifs */
 408         int nwds;      /* number of WDS vifs */
 409         int nadhocs;   /* number of adhoc vifs */
 410 };
 411
 412 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
 413                                struct ieee80211_vif *vif,
 414                                struct ath9k_vif_iter_data *iter_data);
 415
 416 /*******************/
 417 /* Beacon Handling */
 418 /*******************/
 419
 420 /*
 421  * Regardless of the number of beacons we stagger, (i.e. regardless of the
 422  * number of BSSIDs) if a given beacon does not go out even after waiting this
 423  * number of beacon intervals, the game's up.
 424  */
 425 #define BSTUCK_THRESH                   9
 426 #define ATH_BCBUF                       8
 427 #define ATH_DEFAULT_BINTVAL             100 /* TU */
 428 #define ATH_DEFAULT_BMISS_LIMIT         10
 429
 430 #define TSF_TO_TU(_h,_l) \
 431         ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
 432
 433 struct ath_beacon {
 434         enum {
 435                 OK,             /* no change needed */
 436                 UPDATE,         /* update pending */
 437                 COMMIT          /* beacon sent, commit change */
 438         } updateslot;           /* slot time update fsm */
 439
 440         u32 beaconq;
 441         u32 bmisscnt;
 442         struct ieee80211_vif *bslot[ATH_BCBUF];
 443         int slottime;
 444         int slotupdate;
 445         struct ath_descdma bdma;
 446         struct ath_txq *cabq;
 447         struct list_head bbuf;
 448
 449         bool tx_processed;
 450         bool tx_last;
 451 };
 452
 453 void ath9k_beacon_tasklet(unsigned long data);
 454 void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif,
 455                          u32 changed);
 456 void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
 457 void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
 458 void ath9k_set_beacon(struct ath_softc *sc);
 459 bool ath9k_csa_is_finished(struct ath_softc *sc, struct ieee80211_vif *vif);
 460 void ath9k_csa_update(struct ath_softc *sc);
 461
 462 /*******************/
 463 /* Link Monitoring */
 464 /*******************/
 465
 466 #define ATH_STA_SHORT_CALINTERVAL 1000    /* 1 second */
 467 #define ATH_AP_SHORT_CALINTERVAL  100     /* 100 ms */
 468 #define ATH_ANI_POLLINTERVAL_OLD  100     /* 100 ms */
 469 #define ATH_ANI_POLLINTERVAL_NEW  1000    /* 1000 ms */
 470 #define ATH_LONG_CALINTERVAL_INT  1000    /* 1000 ms */
 471 #define ATH_LONG_CALINTERVAL      30000   /* 30 seconds */
 472 #define ATH_RESTART_CALINTERVAL   1200000 /* 20 minutes */
 473 #define ATH_ANI_MAX_SKIP_COUNT    10
 474 #define ATH_PAPRD_TIMEOUT         100 /* msecs */
 475 #define ATH_PLL_WORK_INTERVAL     100
 476
 477 void ath_chanctx_work(struct work_struct *work);
 478 void ath_tx_complete_poll_work(struct work_struct *work);
 479 void ath_reset_work(struct work_struct *work);
 480 bool ath_hw_check(struct ath_softc *sc);
 481 void ath_hw_pll_work(struct work_struct *work);
 482 void ath_paprd_calibrate(struct work_struct *work);
 483 void ath_ani_calibrate(unsigned long data);
 484 void ath_start_ani(struct ath_softc *sc);
 485 void ath_stop_ani(struct ath_softc *sc);
 486 void ath_check_ani(struct ath_softc *sc);
 487 int ath_update_survey_stats(struct ath_softc *sc);
 488 void ath_update_survey_nf(struct ath_softc *sc, int channel);
 489 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type);
 490 void ath_ps_full_sleep(unsigned long data);
 491 void ath9k_p2p_ps_timer(void *priv);
 492 void ath9k_update_p2p_ps(struct ath_softc *sc, struct ieee80211_vif *vif);
 493 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop);
 494
 495 /**********/
 496 /* BTCOEX */
 497 /**********/
 498
 499 #define ATH_DUMP_BTCOEX(_s, _val)                               \
 500         do {                                                    \
 501                 len += scnprintf(buf + len, size - len,         \
 502                                  "%20s : %10d\n", _s, (_val));  \
 503         } while (0)
 504
 505 enum bt_op_flags {
 506         BT_OP_PRIORITY_DETECTED,
 507         BT_OP_SCAN,
 508 };
 509
 510 struct ath_btcoex {
 511         spinlock_t btcoex_lock;
 512         struct timer_list period_timer; /* Timer for BT period */
 513         struct timer_list no_stomp_timer;
 514         u32 bt_priority_cnt;
 515         unsigned long bt_priority_time;
 516         unsigned long op_flags;
 517         int bt_stomp_type; /* Types of BT stomping */
 518         u32 btcoex_no_stomp; /* in msec */
 519         u32 btcoex_period; /* in msec */
 520         u32 btscan_no_stomp; /* in msec */
 521         u32 duty_cycle;
 522         u32 bt_wait_time;
 523         int rssi_count;
 524         struct ath_mci_profile mci;
 525         u8 stomp_audio;
 526 };
 527
 528 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 529 int ath9k_init_btcoex(struct ath_softc *sc);
 530 void ath9k_deinit_btcoex(struct ath_softc *sc);
 531 void ath9k_start_btcoex(struct ath_softc *sc);
 532 void ath9k_stop_btcoex(struct ath_softc *sc);
 533 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
 534 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
 535 void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status);
 536 u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen);
 537 void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc);
 538 int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size);
 539 #else
 540 static inline int ath9k_init_btcoex(struct ath_softc *sc)
 541 {
 542         return 0;
 543 }
 544 static inline void ath9k_deinit_btcoex(struct ath_softc *sc)
 545 {
 546 }
 547 static inline void ath9k_start_btcoex(struct ath_softc *sc)
 548 {
 549 }
 550 static inline void ath9k_stop_btcoex(struct ath_softc *sc)
 551 {
 552 }
 553 static inline void ath9k_btcoex_handle_interrupt(struct ath_softc *sc,
 554                                                  u32 status)
 555 {
 556 }
 557 static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc,
 558                                           u32 max_4ms_framelen)
 559 {
 560         return 0;
 561 }
 562 static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc)
 563 {
 564 }
 565 static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
 566 {
 567         return 0;
 568 }
 569 #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
 570
 571 /********************/
 572 /*   LED Control    */
 573 /********************/
 574
 575 #define ATH_LED_PIN_DEF                 1
 576 #define ATH_LED_PIN_9287                8
 577 #define ATH_LED_PIN_9300                10
 578 #define ATH_LED_PIN_9485                6
 579 #define ATH_LED_PIN_9462                4
 580
 581 #ifdef CONFIG_MAC80211_LEDS
 582 void ath_init_leds(struct ath_softc *sc);
 583 void ath_deinit_leds(struct ath_softc *sc);
 584 void ath_fill_led_pin(struct ath_softc *sc);
 585 #else
 586 static inline void ath_init_leds(struct ath_softc *sc)
 587 {
 588 }
 589
 590 static inline void ath_deinit_leds(struct ath_softc *sc)
 591 {
 592 }
 593 static inline void ath_fill_led_pin(struct ath_softc *sc)
 594 {
 595 }
 596 #endif
 597
 598 /************************/
 599 /* Wake on Wireless LAN */
 600 /************************/
 601
 602 struct ath9k_wow_pattern {
 603         u8 pattern_bytes[MAX_PATTERN_SIZE];
 604         u8 mask_bytes[MAX_PATTERN_SIZE];
 605         u32 pattern_len;
 606 };
 607
 608 #ifdef CONFIG_ATH9K_WOW
 609 void ath9k_init_wow(struct ieee80211_hw *hw);
 610 int ath9k_suspend(struct ieee80211_hw *hw,
 611                   struct cfg80211_wowlan *wowlan);
 612 int ath9k_resume(struct ieee80211_hw *hw);
 613 void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled);
 614 #else
 615 static inline void ath9k_init_wow(struct ieee80211_hw *hw)
 616 {
 617 }
 618 static inline int ath9k_suspend(struct ieee80211_hw *hw,
 619                                 struct cfg80211_wowlan *wowlan)
 620 {
 621         return 0;
 622 }
 623 static inline int ath9k_resume(struct ieee80211_hw *hw)
 624 {
 625         return 0;
 626 }
 627 static inline void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
 628 {
 629 }
 630 #endif /* CONFIG_ATH9K_WOW */
 631
 632 /*******************************/
 633 /* Antenna diversity/combining */
 634 /*******************************/
 635
 636 #define ATH_ANT_RX_CURRENT_SHIFT 4
 637 #define ATH_ANT_RX_MAIN_SHIFT 2
 638 #define ATH_ANT_RX_MASK 0x3
 639
 640 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
 641 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
 642 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
 643 #define ATH_ANT_DIV_COMB_INIT_COUNT 95
 644 #define ATH_ANT_DIV_COMB_MAX_COUNT 100
 645 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
 646 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
 647 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50
 648 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50
 649
 650 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
 651 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
 652 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
 653
 654 struct ath_ant_comb {
 655         u16 count;
 656         u16 total_pkt_count;
 657         bool scan;
 658         bool scan_not_start;
 659         int main_total_rssi;
 660         int alt_total_rssi;
 661         int alt_recv_cnt;
 662         int main_recv_cnt;
 663         int rssi_lna1;
 664         int rssi_lna2;
 665         int rssi_add;
 666         int rssi_sub;
 667         int rssi_first;
 668         int rssi_second;
 669         int rssi_third;
 670         int ant_ratio;
 671         int ant_ratio2;
 672         bool alt_good;
 673         int quick_scan_cnt;
 674         enum ath9k_ant_div_comb_lna_conf main_conf;
 675         enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;
 676         enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;
 677         bool first_ratio;
 678         bool second_ratio;
 679         unsigned long scan_start_time;
 680
 681         /*
 682          * Card-specific config values.
 683          */
 684         int low_rssi_thresh;
 685         int fast_div_bias;
 686 };
 687
 688 void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);
 689
 690 /********************/
 691 /* Main driver core */
 692 /********************/
 693
 694 #define ATH9K_PCI_CUS198          0x0001
 695 #define ATH9K_PCI_CUS230          0x0002
 696 #define ATH9K_PCI_CUS217          0x0004
 697 #define ATH9K_PCI_CUS252          0x0008
 698 #define ATH9K_PCI_WOW             0x0010
 699 #define ATH9K_PCI_BT_ANT_DIV      0x0020
 700 #define ATH9K_PCI_D3_L1_WAR       0x0040
 701 #define ATH9K_PCI_AR9565_1ANT     0x0080
 702 #define ATH9K_PCI_AR9565_2ANT     0x0100
 703 #define ATH9K_PCI_NO_PLL_PWRSAVE  0x0200
 704 #define ATH9K_PCI_KILLER          0x0400
 705
 706 /*
 707  * Default cache line size, in bytes.
 708  * Used when PCI device not fully initialized by bootrom/BIOS
 709 */
 710 #define DEFAULT_CACHELINE       32
 711 #define ATH_CABQ_READY_TIME     80      /* % of beacon interval */
 712 #define ATH_TXPOWER_MAX         100     /* .5 dBm units */
 713 #define MAX_GTT_CNT             5
 714
 715 /* Powersave flags */
 716 #define PS_WAIT_FOR_BEACON        BIT(0)
 717 #define PS_WAIT_FOR_CAB           BIT(1)
 718 #define PS_WAIT_FOR_PSPOLL_DATA   BIT(2)
 719 #define PS_WAIT_FOR_TX_ACK        BIT(3)
 720 #define PS_BEACON_SYNC            BIT(4)
 721 #define PS_WAIT_FOR_ANI           BIT(5)
 722
 723 #define ATH9K_NUM_CHANCTX  2 /* supports 2 operating channels */
 724
 725 struct ath_softc {
 726         struct ieee80211_hw *hw;
 727         struct device *dev;
 728
 729         struct survey_info *cur_survey;
 730         struct survey_info survey[ATH9K_NUM_CHANNELS];
 731
 732         struct tasklet_struct intr_tq;
 733         struct tasklet_struct bcon_tasklet;
 734         struct ath_hw *sc_ah;
 735         void __iomem *mem;
 736         int irq;
 737         spinlock_t sc_serial_rw;
 738         spinlock_t sc_pm_lock;
 739         spinlock_t sc_pcu_lock;
 740         struct mutex mutex;
 741         struct work_struct paprd_work;
 742         struct work_struct hw_reset_work;
 743         struct work_struct chanctx_work;
 744         struct completion paprd_complete;
 745         wait_queue_head_t tx_wait;
 746
 747         struct ath_gen_timer *p2p_ps_timer;
 748         struct ath_vif *p2p_ps_vif;
 749
 750         unsigned long driver_data;
 751
 752         u8 gtt_cnt;
 753         u32 intrstatus;
 754         u16 ps_flags; /* PS_* */
 755         u16 curtxpow;
 756         bool ps_enabled;
 757         bool ps_idle;
 758         short nbcnvifs;
 759         short nvifs;
 760         unsigned long ps_usecount;
 761
 762         struct ath_rx rx;
 763         struct ath_tx tx;
 764         struct ath_beacon beacon;
 765
 766         struct cfg80211_chan_def cur_chandef;
 767         struct ath_chanctx chanctx[ATH9K_NUM_CHANCTX];
 768         struct ath_chanctx *cur_chan;
 769         struct ath_chanctx *next_chan;
 770         spinlock_t chan_lock;
 771
 772 #ifdef CONFIG_MAC80211_LEDS
 773         bool led_registered;
 774         char led_name[32];
 775         struct led_classdev led_cdev;
 776 #endif
 777
 778         struct ath9k_hw_cal_data caldata;
 779
 780 #ifdef CONFIG_ATH9K_DEBUGFS
 781         struct ath9k_debug debug;
 782 #endif
 783         struct ath_beacon_config cur_beacon_conf;
 784         struct delayed_work tx_complete_work;
 785         struct delayed_work hw_pll_work;
 786         struct timer_list sleep_timer;
 787
 788 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 789         struct ath_btcoex btcoex;
 790         struct ath_mci_coex mci_coex;
 791         struct work_struct mci_work;
 792 #endif
 793
 794         struct ath_descdma txsdma;
 795
 796         struct ath_ant_comb ant_comb;
 797         u8 ant_tx, ant_rx;
 798         struct dfs_pattern_detector *dfs_detector;
 799         u64 dfs_prev_pulse_ts;
 800         u32 wow_enabled;
 801         /* relay(fs) channel for spectral scan */
 802         struct rchan *rfs_chan_spec_scan;
 803         enum spectral_mode spectral_mode;
 804         struct ath_spec_scan spec_config;
 805
 806         struct ieee80211_vif *tx99_vif;
 807         struct sk_buff *tx99_skb;
 808         bool tx99_state;
 809         s16 tx99_power;
 810
 811 #ifdef CONFIG_ATH9K_WOW
 812         atomic_t wow_got_bmiss_intr;
 813         atomic_t wow_sleep_proc_intr; /* in the middle of WoW sleep ? */
 814         u32 wow_intr_before_sleep;
 815 #endif
 816 };
 817
 818 /********/
 819 /* TX99 */
 820 /********/
 821
 822 #ifdef CONFIG_ATH9K_TX99
 823 void ath9k_tx99_init_debug(struct ath_softc *sc);
 824 int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,
 825                     struct ath_tx_control *txctl);
 826 #else
 827 static inline void ath9k_tx99_init_debug(struct ath_softc *sc)
 828 {
 829 }
 830 static inline int ath9k_tx99_send(struct ath_softc *sc,
 831                                   struct sk_buff *skb,
 832                                   struct ath_tx_control *txctl)
 833 {
 834         return 0;
 835 }
 836 #endif /* CONFIG_ATH9K_TX99 */
 837
 838 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
 839 {
 840         common->bus_ops->read_cachesize(common, csz);
 841 }
 842
 843 void ath9k_tasklet(unsigned long data);
 844 int ath_cabq_update(struct ath_softc *);
 845 u8 ath9k_parse_mpdudensity(u8 mpdudensity);
 846 irqreturn_t ath_isr(int irq, void *dev);
 847 int ath_reset(struct ath_softc *sc);
 848 void ath_cancel_work(struct ath_softc *sc);
 849 void ath_restart_work(struct ath_softc *sc);
 850 int ath9k_init_device(u16 devid, struct ath_softc *sc,
 851                     const struct ath_bus_ops *bus_ops);
 852 void ath9k_deinit_device(struct ath_softc *sc);
 853 void ath9k_reload_chainmask_settings(struct ath_softc *sc);
 854 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
 855 void ath_start_rfkill_poll(struct ath_softc *sc);
 856 void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
 857 void ath9k_ps_wakeup(struct ath_softc *sc);
 858 void ath9k_ps_restore(struct ath_softc *sc);
 859
 860 #ifdef CONFIG_ATH9K_PCI
 861 int ath_pci_init(void);
 862 void ath_pci_exit(void);
 863 #else
 864 static inline int ath_pci_init(void) { return 0; };
 865 static inline void ath_pci_exit(void) {};
 866 #endif
 867
 868 #ifdef CONFIG_ATH9K_AHB
 869 int ath_ahb_init(void);
 870 void ath_ahb_exit(void);
 871 #else
 872 static inline int ath_ahb_init(void) { return 0; };
 873 static inline void ath_ahb_exit(void) {};
 874 #endif
 875
 876 #endif /* ATH9K_H */