2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <linux/interrupt.h>
23 #include <linux/leds.h>
24 #include <linux/completion.h>
32 * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
33 * should rely on this file or its contents.
38 /* Macro to expand scalars to 64-bit objects */
40 #define ito64(x) (sizeof(x) == 1) ? \
41 (((unsigned long long int)(x)) & (0xff)) : \
43 (((unsigned long long int)(x)) & 0xffff) : \
45 (((unsigned long long int)(x)) & 0xffffffff) : \
46 (unsigned long long int)(x))
48 /* increment with wrap-around */
49 #define INCR(_l, _sz) do { \
51 (_l) &= ((_sz) - 1); \
54 /* decrement with wrap-around */
55 #define DECR(_l, _sz) do { \
57 (_l) &= ((_sz) - 1); \
60 #define TSF_TO_TU(_h,_l) \
61 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
63 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
69 /*************************/
70 /* Descriptor Management */
71 /*************************/
73 #define ATH_TXBUF_RESET(_bf) do { \
74 (_bf)->bf_lastbf = NULL; \
75 (_bf)->bf_next = NULL; \
76 memset(&((_bf)->bf_state), 0, \
77 sizeof(struct ath_buf_state)); \
81 * enum buffer_type - Buffer type flags
83 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
84 * @BUF_AGGR: Indicates whether the buffer can be aggregated
85 * (used in aggregation scheduling)
92 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
93 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
95 #define ATH_TXSTATUS_RING_SIZE 512
97 #define DS2PHYS(_dd, _ds) \
98 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
99 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
100 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
104 dma_addr_t dd_desc_paddr
;
108 int ath_descdma_setup(struct ath_softc
*sc
, struct ath_descdma
*dd
,
109 struct list_head
*head
, const char *name
,
110 int nbuf
, int ndesc
, bool is_tx
);
116 #define ATH_RXBUF 512
117 #define ATH_TXBUF 512
118 #define ATH_TXBUF_RESERVE 5
119 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
120 #define ATH_TXMAXTRY 13
122 #define TID_TO_WME_AC(_tid) \
123 ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \
124 (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK : \
125 (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI : \
128 #define ATH_AGGR_DELIM_SZ 4
129 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
130 /* number of delimiters for encryption padding */
131 #define ATH_AGGR_ENCRYPTDELIM 10
132 /* minimum h/w qdepth to be sustained to maximize aggregation */
133 #define ATH_AGGR_MIN_QDEPTH 2
134 /* minimum h/w qdepth for non-aggregated traffic */
135 #define ATH_NON_AGGR_MIN_QDEPTH 8
137 #define IEEE80211_SEQ_SEQ_SHIFT 4
138 #define IEEE80211_SEQ_MAX 4096
139 #define IEEE80211_WEP_IVLEN 3
140 #define IEEE80211_WEP_KIDLEN 1
141 #define IEEE80211_WEP_CRCLEN 4
142 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
143 (IEEE80211_WEP_IVLEN + \
144 IEEE80211_WEP_KIDLEN + \
145 IEEE80211_WEP_CRCLEN))
147 /* return whether a bit at index _n in bitmap _bm is set
148 * _sz is the size of the bitmap */
149 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
150 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
152 /* return block-ack bitmap index given sequence and starting sequence */
153 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
155 /* return the seqno for _start + _offset */
156 #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1))
158 /* returns delimiter padding required given the packet length */
159 #define ATH_AGGR_GET_NDELIM(_len) \
160 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
161 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
163 #define BAW_WITHIN(_start, _bawsz, _seqno) \
164 ((((_seqno) - (_start)) & 4095) < (_bawsz))
166 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
168 #define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e))
170 #define ATH_TX_COMPLETE_POLL_INT 1000
172 #define ATH_TXFIFO_DEPTH 8
174 int mac80211_qnum
; /* mac80211 queue number, -1 means not mac80211 Q */
175 u32 axq_qnum
; /* ath9k hardware queue number */
177 struct list_head axq_q
;
182 bool axq_tx_inprogress
;
183 struct list_head axq_acq
;
184 struct list_head txq_fifo
[ATH_TXFIFO_DEPTH
];
188 struct sk_buff_head complete_q
;
193 struct list_head list
;
194 struct list_head tid_q
;
195 bool clear_ps_filter
;
199 struct ath_frame_info
{
202 enum ath9k_key_type keytype
;
210 struct list_head list
;
211 struct sk_buff
*bf_mpdu
;
214 dma_addr_t bf_buf_addr
;
217 struct ath_buf_state
{
223 unsigned long bfs_paprd_timestamp
;
227 struct list_head list
;
228 struct ath_buf
*bf_lastbf
; /* last buf of this unit (a frame or
230 struct ath_buf
*bf_next
; /* next subframe in the aggregate */
231 struct sk_buff
*bf_mpdu
; /* enclosing frame structure */
232 void *bf_desc
; /* virtual addr of desc */
233 dma_addr_t bf_daddr
; /* physical addr of desc */
234 dma_addr_t bf_buf_addr
; /* physical addr of data buffer, for DMA */
235 struct ieee80211_tx_rate rates
[4];
236 struct ath_buf_state bf_state
;
240 struct list_head list
;
241 struct sk_buff_head buf_q
;
242 struct sk_buff_head retry_q
;
244 struct ath_atx_ac
*ac
;
245 unsigned long tx_buf
[BITS_TO_LONGS(ATH_TID_MAX_BUFS
)];
250 int baw_head
; /* first un-acked tx buffer */
251 int baw_tail
; /* next unused tx buffer slot */
260 struct ath_softc
*sc
;
261 struct ieee80211_sta
*sta
; /* station struct we're part of */
262 struct ieee80211_vif
*vif
; /* interface with which we're associated */
263 struct ath_atx_tid tid
[IEEE80211_NUM_TIDS
];
264 struct ath_atx_ac ac
[IEEE80211_NUM_ACS
];
274 struct ath_tx_control
{
278 struct ieee80211_sta
*sta
;
281 #define ATH_TX_ERROR 0x01
284 * @txq_map: Index is mac80211 queue number. This is
285 * not necessarily the same as the hardware queue number
291 spinlock_t txbuflock
;
292 struct list_head txbuf
;
293 struct ath_txq txq
[ATH9K_NUM_TX_QUEUES
];
294 struct ath_descdma txdma
;
295 struct ath_txq
*txq_map
[IEEE80211_NUM_ACS
];
296 struct ath_txq
*uapsdq
;
297 u32 txq_max_pending
[IEEE80211_NUM_ACS
];
298 u16 max_aggr_framelen
[IEEE80211_NUM_ACS
][4][32];
302 struct sk_buff_head rx_fifo
;
312 unsigned int rxfilter
;
313 struct list_head rxbuf
;
314 struct ath_descdma rxdma
;
315 struct ath_rx_edma rx_edma
[ATH9K_RX_QUEUE_MAX
];
317 struct ath_rxbuf
*buf_hold
;
318 struct sk_buff
*frag
;
323 int ath_startrecv(struct ath_softc
*sc
);
324 bool ath_stoprecv(struct ath_softc
*sc
);
325 u32
ath_calcrxfilter(struct ath_softc
*sc
);
326 int ath_rx_init(struct ath_softc
*sc
, int nbufs
);
327 void ath_rx_cleanup(struct ath_softc
*sc
);
328 int ath_rx_tasklet(struct ath_softc
*sc
, int flush
, bool hp
);
329 struct ath_txq
*ath_txq_setup(struct ath_softc
*sc
, int qtype
, int subtype
);
330 void ath_txq_lock(struct ath_softc
*sc
, struct ath_txq
*txq
);
331 void ath_txq_unlock(struct ath_softc
*sc
, struct ath_txq
*txq
);
332 void ath_txq_unlock_complete(struct ath_softc
*sc
, struct ath_txq
*txq
);
333 void ath_tx_cleanupq(struct ath_softc
*sc
, struct ath_txq
*txq
);
334 bool ath_drain_all_txq(struct ath_softc
*sc
);
335 void ath_draintxq(struct ath_softc
*sc
, struct ath_txq
*txq
);
336 void ath_tx_node_init(struct ath_softc
*sc
, struct ath_node
*an
);
337 void ath_tx_node_cleanup(struct ath_softc
*sc
, struct ath_node
*an
);
338 void ath_txq_schedule(struct ath_softc
*sc
, struct ath_txq
*txq
);
339 int ath_tx_init(struct ath_softc
*sc
, int nbufs
);
340 int ath_txq_update(struct ath_softc
*sc
, int qnum
,
341 struct ath9k_tx_queue_info
*q
);
342 void ath_update_max_aggr_framelen(struct ath_softc
*sc
, int queue
, int txop
);
343 int ath_tx_start(struct ieee80211_hw
*hw
, struct sk_buff
*skb
,
344 struct ath_tx_control
*txctl
);
345 void ath_tx_cabq(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
,
346 struct sk_buff
*skb
);
347 void ath_tx_tasklet(struct ath_softc
*sc
);
348 void ath_tx_edma_tasklet(struct ath_softc
*sc
);
349 int ath_tx_aggr_start(struct ath_softc
*sc
, struct ieee80211_sta
*sta
,
351 void ath_tx_aggr_stop(struct ath_softc
*sc
, struct ieee80211_sta
*sta
, u16 tid
);
352 void ath_tx_aggr_resume(struct ath_softc
*sc
, struct ieee80211_sta
*sta
, u16 tid
);
354 void ath_tx_aggr_wakeup(struct ath_softc
*sc
, struct ath_node
*an
);
355 void ath_tx_aggr_sleep(struct ieee80211_sta
*sta
, struct ath_softc
*sc
,
356 struct ath_node
*an
);
357 void ath9k_release_buffered_frames(struct ieee80211_hw
*hw
,
358 struct ieee80211_sta
*sta
,
359 u16 tids
, int nframes
,
360 enum ieee80211_frame_release_type reason
,
368 struct ath_node mcast_node
;
370 bool primary_sta_vif
;
371 __le64 tsf_adjust
; /* TSF adjustment for staggered beacons */
372 struct ath_buf
*av_bcbuf
;
375 /*******************/
376 /* Beacon Handling */
377 /*******************/
380 * Regardless of the number of beacons we stagger, (i.e. regardless of the
381 * number of BSSIDs) if a given beacon does not go out even after waiting this
382 * number of beacon intervals, the game's up.
384 #define BSTUCK_THRESH 9
386 #define ATH_DEFAULT_BINTVAL 100 /* TU */
387 #define ATH_DEFAULT_BMISS_LIMIT 10
388 #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024)
390 struct ath_beacon_config
{
402 OK
, /* no change needed */
403 UPDATE
, /* update pending */
404 COMMIT
/* beacon sent, commit change */
405 } updateslot
; /* slot time update fsm */
410 struct ieee80211_vif
*bslot
[ATH_BCBUF
];
413 struct ath9k_tx_queue_info beacon_qi
;
414 struct ath_descdma bdma
;
415 struct ath_txq
*cabq
;
416 struct list_head bbuf
;
422 void ath9k_beacon_tasklet(unsigned long data
);
423 bool ath9k_allow_beacon_config(struct ath_softc
*sc
, struct ieee80211_vif
*vif
);
424 void ath9k_beacon_config(struct ath_softc
*sc
, struct ieee80211_vif
*vif
,
426 void ath9k_beacon_assign_slot(struct ath_softc
*sc
, struct ieee80211_vif
*vif
);
427 void ath9k_beacon_remove_slot(struct ath_softc
*sc
, struct ieee80211_vif
*vif
);
428 void ath9k_set_tsfadjust(struct ath_softc
*sc
, struct ieee80211_vif
*vif
);
429 void ath9k_set_beacon(struct ath_softc
*sc
);
430 bool ath9k_csa_is_finished(struct ath_softc
*sc
);
432 /*******************/
433 /* Link Monitoring */
434 /*******************/
436 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
437 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
438 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */
439 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */
440 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */
441 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
442 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
443 #define ATH_ANI_MAX_SKIP_COUNT 10
445 #define ATH_PAPRD_TIMEOUT 100 /* msecs */
446 #define ATH_PLL_WORK_INTERVAL 100
448 void ath_tx_complete_poll_work(struct work_struct
*work
);
449 void ath_reset_work(struct work_struct
*work
);
450 void ath_hw_check(struct work_struct
*work
);
451 void ath_hw_pll_work(struct work_struct
*work
);
452 void ath_rx_poll(unsigned long data
);
453 void ath_start_rx_poll(struct ath_softc
*sc
, u8 nbeacon
);
454 void ath_paprd_calibrate(struct work_struct
*work
);
455 void ath_ani_calibrate(unsigned long data
);
456 void ath_start_ani(struct ath_softc
*sc
);
457 void ath_stop_ani(struct ath_softc
*sc
);
458 void ath_check_ani(struct ath_softc
*sc
);
459 int ath_update_survey_stats(struct ath_softc
*sc
);
460 void ath_update_survey_nf(struct ath_softc
*sc
, int channel
);
461 void ath9k_queue_reset(struct ath_softc
*sc
, enum ath_reset_type type
);
462 void ath_ps_full_sleep(unsigned long data
);
468 #define ATH_DUMP_BTCOEX(_s, _val) \
470 len += scnprintf(buf + len, size - len, \
471 "%20s : %10d\n", _s, (_val)); \
475 BT_OP_PRIORITY_DETECTED
,
480 spinlock_t btcoex_lock
;
481 struct timer_list period_timer
; /* Timer for BT period */
482 struct timer_list no_stomp_timer
;
484 unsigned long bt_priority_time
;
485 unsigned long op_flags
;
486 int bt_stomp_type
; /* Types of BT stomping */
487 u32 btcoex_no_stomp
; /* in msec */
488 u32 btcoex_period
; /* in msec */
489 u32 btscan_no_stomp
; /* in msec */
493 struct ath_mci_profile mci
;
497 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
498 int ath9k_init_btcoex(struct ath_softc
*sc
);
499 void ath9k_deinit_btcoex(struct ath_softc
*sc
);
500 void ath9k_start_btcoex(struct ath_softc
*sc
);
501 void ath9k_stop_btcoex(struct ath_softc
*sc
);
502 void ath9k_btcoex_timer_resume(struct ath_softc
*sc
);
503 void ath9k_btcoex_timer_pause(struct ath_softc
*sc
);
504 void ath9k_btcoex_handle_interrupt(struct ath_softc
*sc
, u32 status
);
505 u16
ath9k_btcoex_aggr_limit(struct ath_softc
*sc
, u32 max_4ms_framelen
);
506 void ath9k_btcoex_stop_gen_timer(struct ath_softc
*sc
);
507 int ath9k_dump_btcoex(struct ath_softc
*sc
, u8
*buf
, u32 size
);
509 static inline int ath9k_init_btcoex(struct ath_softc
*sc
)
513 static inline void ath9k_deinit_btcoex(struct ath_softc
*sc
)
516 static inline void ath9k_start_btcoex(struct ath_softc
*sc
)
519 static inline void ath9k_stop_btcoex(struct ath_softc
*sc
)
522 static inline void ath9k_btcoex_handle_interrupt(struct ath_softc
*sc
,
526 static inline u16
ath9k_btcoex_aggr_limit(struct ath_softc
*sc
,
527 u32 max_4ms_framelen
)
531 static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc
*sc
)
534 static inline int ath9k_dump_btcoex(struct ath_softc
*sc
, u8
*buf
, u32 size
)
538 #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
540 struct ath9k_wow_pattern
{
541 u8 pattern_bytes
[MAX_PATTERN_SIZE
];
542 u8 mask_bytes
[MAX_PATTERN_SIZE
];
546 /********************/
548 /********************/
550 #define ATH_LED_PIN_DEF 1
551 #define ATH_LED_PIN_9287 8
552 #define ATH_LED_PIN_9300 10
553 #define ATH_LED_PIN_9485 6
554 #define ATH_LED_PIN_9462 4
556 #ifdef CONFIG_MAC80211_LEDS
557 void ath_init_leds(struct ath_softc
*sc
);
558 void ath_deinit_leds(struct ath_softc
*sc
);
559 void ath_fill_led_pin(struct ath_softc
*sc
);
561 static inline void ath_init_leds(struct ath_softc
*sc
)
565 static inline void ath_deinit_leds(struct ath_softc
*sc
)
568 static inline void ath_fill_led_pin(struct ath_softc
*sc
)
573 /************************/
574 /* Wake on Wireless LAN */
575 /************************/
577 #ifdef CONFIG_ATH9K_WOW
578 void ath9k_init_wow(struct ieee80211_hw
*hw
);
579 int ath9k_suspend(struct ieee80211_hw
*hw
,
580 struct cfg80211_wowlan
*wowlan
);
581 int ath9k_resume(struct ieee80211_hw
*hw
);
582 void ath9k_set_wakeup(struct ieee80211_hw
*hw
, bool enabled
);
584 static inline void ath9k_init_wow(struct ieee80211_hw
*hw
)
587 static inline int ath9k_suspend(struct ieee80211_hw
*hw
,
588 struct cfg80211_wowlan
*wowlan
)
592 static inline int ath9k_resume(struct ieee80211_hw
*hw
)
596 static inline void ath9k_set_wakeup(struct ieee80211_hw
*hw
, bool enabled
)
599 #endif /* CONFIG_ATH9K_WOW */
601 /*******************************/
602 /* Antenna diversity/combining */
603 /*******************************/
605 #define ATH_ANT_RX_CURRENT_SHIFT 4
606 #define ATH_ANT_RX_MAIN_SHIFT 2
607 #define ATH_ANT_RX_MASK 0x3
609 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
610 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
611 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
612 #define ATH_ANT_DIV_COMB_INIT_COUNT 95
613 #define ATH_ANT_DIV_COMB_MAX_COUNT 100
614 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
615 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
616 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50
617 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50
619 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
620 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
621 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
623 struct ath_ant_comb
{
643 enum ath9k_ant_div_comb_lna_conf main_conf
;
644 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf
;
645 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf
;
648 unsigned long scan_start_time
;
651 * Card-specific config values.
657 void ath_ant_comb_scan(struct ath_softc
*sc
, struct ath_rx_status
*rs
);
659 /********************/
660 /* Main driver core */
661 /********************/
663 #define ATH9K_PCI_CUS198 0x0001
664 #define ATH9K_PCI_CUS230 0x0002
665 #define ATH9K_PCI_CUS217 0x0004
666 #define ATH9K_PCI_CUS252 0x0008
667 #define ATH9K_PCI_WOW 0x0010
668 #define ATH9K_PCI_BT_ANT_DIV 0x0020
669 #define ATH9K_PCI_D3_L1_WAR 0x0040
670 #define ATH9K_PCI_AR9565_1ANT 0x0080
671 #define ATH9K_PCI_AR9565_2ANT 0x0100
672 #define ATH9K_PCI_NO_PLL_PWRSAVE 0x0200
673 #define ATH9K_PCI_KILLER 0x0400
676 * Default cache line size, in bytes.
677 * Used when PCI device not fully initialized by bootrom/BIOS
679 #define DEFAULT_CACHELINE 32
680 #define ATH_REGCLASSIDS_MAX 10
681 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
682 #define ATH_MAX_SW_RETRIES 30
683 #define ATH_CHAN_MAX 255
685 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
686 #define ATH_RATE_DUMMY_MARKER 0
697 /* Powersave flags */
698 #define PS_WAIT_FOR_BEACON BIT(0)
699 #define PS_WAIT_FOR_CAB BIT(1)
700 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
701 #define PS_WAIT_FOR_TX_ACK BIT(3)
702 #define PS_BEACON_SYNC BIT(4)
703 #define PS_WAIT_FOR_ANI BIT(5)
705 struct ath_rate_table
;
707 struct ath9k_vif_iter_data
{
708 u8 hw_macaddr
[ETH_ALEN
]; /* address of the first vif */
709 u8 mask
[ETH_ALEN
]; /* bssid mask */
712 int naps
; /* number of AP vifs */
713 int nmeshes
; /* number of mesh vifs */
714 int nstations
; /* number of station vifs */
715 int nwds
; /* number of WDS vifs */
716 int nadhocs
; /* number of adhoc vifs */
719 /* enum spectral_mode:
721 * @SPECTRAL_DISABLED: spectral mode is disabled
722 * @SPECTRAL_BACKGROUND: hardware sends samples when it is not busy with
724 * @SPECTRAL_MANUAL: spectral scan is enabled, triggering for samples
725 * is performed manually.
726 * @SPECTRAL_CHANSCAN: Like manual, but also triggered when changing channels
727 * during a channel scan.
730 SPECTRAL_DISABLED
= 0,
737 struct ieee80211_hw
*hw
;
740 struct survey_info
*cur_survey
;
741 struct survey_info survey
[ATH9K_NUM_CHANNELS
];
743 struct tasklet_struct intr_tq
;
744 struct tasklet_struct bcon_tasklet
;
745 struct ath_hw
*sc_ah
;
748 spinlock_t sc_serial_rw
;
749 spinlock_t sc_pm_lock
;
750 spinlock_t sc_pcu_lock
;
752 struct work_struct paprd_work
;
753 struct work_struct hw_check_work
;
754 struct work_struct hw_reset_work
;
755 struct completion paprd_complete
;
756 wait_queue_head_t tx_wait
;
758 unsigned int hw_busy_count
;
759 unsigned long sc_flags
;
760 unsigned long driver_data
;
763 u16 ps_flags
; /* PS_* */
769 unsigned long ps_usecount
;
771 struct ath_config config
;
774 struct ath_beacon beacon
;
775 struct ieee80211_supported_band sbands
[IEEE80211_NUM_BANDS
];
777 #ifdef CONFIG_MAC80211_LEDS
780 struct led_classdev led_cdev
;
783 struct ath9k_hw_cal_data caldata
;
786 #ifdef CONFIG_ATH9K_DEBUGFS
787 struct ath9k_debug debug
;
789 struct ath_beacon_config cur_beacon_conf
;
790 struct delayed_work tx_complete_work
;
791 struct delayed_work hw_pll_work
;
792 struct timer_list rx_poll_timer
;
793 struct timer_list sleep_timer
;
795 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
796 struct ath_btcoex btcoex
;
797 struct ath_mci_coex mci_coex
;
798 struct work_struct mci_work
;
801 struct ath_descdma txsdma
;
802 struct ieee80211_vif
*csa_vif
;
804 struct ath_ant_comb ant_comb
;
806 struct dfs_pattern_detector
*dfs_detector
;
808 /* relay(fs) channel for spectral scan */
809 struct rchan
*rfs_chan_spec_scan
;
810 enum spectral_mode spectral_mode
;
811 struct ath_spec_scan spec_config
;
813 struct ieee80211_vif
*tx99_vif
;
814 struct sk_buff
*tx99_skb
;
818 #ifdef CONFIG_ATH9K_WOW
819 atomic_t wow_got_bmiss_intr
;
820 atomic_t wow_sleep_proc_intr
; /* in the middle of WoW sleep ? */
821 u32 wow_intr_before_sleep
;
825 #define SPECTRAL_SCAN_BITMASK 0x10
826 /* Radar info packet format, used for DFS and spectral formats. */
827 struct ath_radar_info
{
833 /* The HT20 spectral data has 4 bytes of additional information at it's end.
835 * [7:0]: all bins {max_magnitude[1:0], bitmap_weight[5:0]}
836 * [7:0]: all bins max_magnitude[9:2]
837 * [7:0]: all bins {max_index[5:0], max_magnitude[11:10]}
838 * [3:0]: max_exp (shift amount to size max bin to 8-bit unsigned)
840 struct ath_ht20_mag_info
{
845 #define SPECTRAL_HT20_NUM_BINS 56
847 /* WARNING: don't actually use this struct! MAC may vary the amount of
848 * data by -1/+2. This struct is for reference only.
850 struct ath_ht20_fft_packet
{
851 u8 data
[SPECTRAL_HT20_NUM_BINS
];
852 struct ath_ht20_mag_info mag_info
;
853 struct ath_radar_info radar_info
;
856 #define SPECTRAL_HT20_TOTAL_DATA_LEN (sizeof(struct ath_ht20_fft_packet))
858 /* Dynamic 20/40 mode:
860 * [7:0]: lower bins {max_magnitude[1:0], bitmap_weight[5:0]}
861 * [7:0]: lower bins max_magnitude[9:2]
862 * [7:0]: lower bins {max_index[5:0], max_magnitude[11:10]}
863 * [7:0]: upper bins {max_magnitude[1:0], bitmap_weight[5:0]}
864 * [7:0]: upper bins max_magnitude[9:2]
865 * [7:0]: upper bins {max_index[5:0], max_magnitude[11:10]}
866 * [3:0]: max_exp (shift amount to size max bin to 8-bit unsigned)
868 struct ath_ht20_40_mag_info
{
874 #define SPECTRAL_HT20_40_NUM_BINS 128
876 /* WARNING: don't actually use this struct! MAC may vary the amount of
877 * data. This struct is for reference only.
879 struct ath_ht20_40_fft_packet
{
880 u8 data
[SPECTRAL_HT20_40_NUM_BINS
];
881 struct ath_ht20_40_mag_info mag_info
;
882 struct ath_radar_info radar_info
;
886 #define SPECTRAL_HT20_40_TOTAL_DATA_LEN (sizeof(struct ath_ht20_40_fft_packet))
888 /* grabs the max magnitude from the all/upper/lower bins */
889 static inline u16
spectral_max_magnitude(u8
*bins
)
891 return (bins
[0] & 0xc0) >> 6 |
892 (bins
[1] & 0xff) << 2 |
893 (bins
[2] & 0x03) << 10;
896 /* return the max magnitude from the all/upper/lower bins */
897 static inline u8
spectral_max_index(u8
*bins
)
899 s8 m
= (bins
[2] & 0xfc) >> 2;
901 /* TODO: this still doesn't always report the right values ... */
910 /* return the bitmap weight from the all/upper/lower bins */
911 static inline u8
spectral_bitmap_weight(u8
*bins
)
913 return bins
[0] & 0x3f;
916 /* FFT sample format given to userspace via debugfs.
918 * Please keep the type/length at the front position and change
919 * other fields after adding another sample type
921 * TODO: this might need rework when switching to nl80211-based
924 enum ath_fft_sample_type
{
925 ATH_FFT_SAMPLE_HT20
= 1,
926 ATH_FFT_SAMPLE_HT20_40
,
929 struct fft_sample_tlv
{
930 u8 type
; /* see ath_fft_sample */
932 /* type dependent data follows */
935 struct fft_sample_ht20
{
936 struct fft_sample_tlv tlv
;
944 __be16 max_magnitude
;
950 u8 data
[SPECTRAL_HT20_NUM_BINS
];
953 struct fft_sample_ht20_40
{
954 struct fft_sample_tlv tlv
;
967 __be16 lower_max_magnitude
;
968 __be16 upper_max_magnitude
;
973 u8 lower_bitmap_weight
;
974 u8 upper_bitmap_weight
;
978 u8 data
[SPECTRAL_HT20_40_NUM_BINS
];
985 #ifdef CONFIG_ATH9K_TX99
986 void ath9k_tx99_init_debug(struct ath_softc
*sc
);
987 int ath9k_tx99_send(struct ath_softc
*sc
, struct sk_buff
*skb
,
988 struct ath_tx_control
*txctl
);
990 static inline void ath9k_tx99_init_debug(struct ath_softc
*sc
)
993 static inline int ath9k_tx99_send(struct ath_softc
*sc
,
995 struct ath_tx_control
*txctl
)
999 #endif /* CONFIG_ATH9K_TX99 */
1001 void ath9k_tasklet(unsigned long data
);
1002 int ath_cabq_update(struct ath_softc
*);
1004 static inline void ath_read_cachesize(struct ath_common
*common
, int *csz
)
1006 common
->bus_ops
->read_cachesize(common
, csz
);
1009 extern struct ieee80211_ops ath9k_ops
;
1010 extern int ath9k_modparam_nohwcrypt
;
1011 extern int led_blink
;
1012 extern bool is_ath9k_unloaded
;
1014 u8
ath9k_parse_mpdudensity(u8 mpdudensity
);
1015 irqreturn_t
ath_isr(int irq
, void *dev
);
1016 int ath_reset(struct ath_softc
*sc
);
1017 void ath_cancel_work(struct ath_softc
*sc
);
1018 void ath_restart_work(struct ath_softc
*sc
);
1019 int ath9k_init_device(u16 devid
, struct ath_softc
*sc
,
1020 const struct ath_bus_ops
*bus_ops
);
1021 void ath9k_deinit_device(struct ath_softc
*sc
);
1022 void ath9k_set_hw_capab(struct ath_softc
*sc
, struct ieee80211_hw
*hw
);
1023 void ath9k_reload_chainmask_settings(struct ath_softc
*sc
);
1025 void ath9k_spectral_scan_trigger(struct ieee80211_hw
*hw
);
1026 int ath9k_spectral_scan_config(struct ieee80211_hw
*hw
,
1027 enum spectral_mode spectral_mode
);
1030 #ifdef CONFIG_ATH9K_PCI
1031 int ath_pci_init(void);
1032 void ath_pci_exit(void);
1034 static inline int ath_pci_init(void) { return 0; };
1035 static inline void ath_pci_exit(void) {};
1038 #ifdef CONFIG_ATH9K_AHB
1039 int ath_ahb_init(void);
1040 void ath_ahb_exit(void);
1042 static inline int ath_ahb_init(void) { return 0; };
1043 static inline void ath_ahb_exit(void) {};
1046 void ath9k_ps_wakeup(struct ath_softc
*sc
);
1047 void ath9k_ps_restore(struct ath_softc
*sc
);
1049 u8
ath_txchainmask_reduction(struct ath_softc
*sc
, u8 chainmask
, u32 rate
);
1051 void ath_start_rfkill_poll(struct ath_softc
*sc
);
1052 void ath9k_rfkill_poll_state(struct ieee80211_hw
*hw
);
1053 void ath9k_calculate_iter_data(struct ieee80211_hw
*hw
,
1054 struct ieee80211_vif
*vif
,
1055 struct ath9k_vif_iter_data
*iter_data
);
1057 #endif /* ATH9K_H */