drivers/net/wireless/ath/ath9k/ath9k.h

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #ifndef ATH9K_H
  18 #define ATH9K_H
  19
  20 #include <linux/etherdevice.h>
  21 #include <linux/device.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/leds.h>
  24 #include <linux/completion.h>
  25
  26 #include "common.h"
  27 #include "debug.h"
  28 #include "mci.h"
  29 #include "dfs.h"
  30 #include "spectral.h"
  31
  32 struct ath_node;
  33
  34 extern struct ieee80211_ops ath9k_ops;
  35 extern int ath9k_modparam_nohwcrypt;
  36 extern int led_blink;
  37 extern bool is_ath9k_unloaded;
  38
  39 struct ath_config {
  40         u16 txpowlimit;
  41 };
  42
  43 /*************************/
  44 /* Descriptor Management */
  45 /*************************/
  46
  47 #define ATH_TXSTATUS_RING_SIZE 512
  48
  49 /* Macro to expand scalars to 64-bit objects */
  50 #define ito64(x) (sizeof(x) == 1) ?                     \
  51         (((unsigned long long int)(x)) & (0xff)) :      \
  52         (sizeof(x) == 2) ?                              \
  53         (((unsigned long long int)(x)) & 0xffff) :      \
  54         ((sizeof(x) == 4) ?                             \
  55          (((unsigned long long int)(x)) & 0xffffffff) : \
  56          (unsigned long long int)(x))
  57
  58 #define ATH_TXBUF_RESET(_bf) do {                               \
  59                 (_bf)->bf_lastbf = NULL;                        \
  60                 (_bf)->bf_next = NULL;                          \
  61                 memset(&((_bf)->bf_state), 0,                   \
  62                        sizeof(struct ath_buf_state));           \
  63         } while (0)
  64
  65 #define DS2PHYS(_dd, _ds)                                               \
  66         ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
  67 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
  68 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
  69
  70 struct ath_descdma {
  71         void *dd_desc;
  72         dma_addr_t dd_desc_paddr;
  73         u32 dd_desc_len;
  74 };
  75
  76 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
  77                       struct list_head *head, const char *name,
  78                       int nbuf, int ndesc, bool is_tx);
  79
  80 /***********/
  81 /* RX / TX */
  82 /***********/
  83
  84 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
  85
  86 /* increment with wrap-around */
  87 #define INCR(_l, _sz)   do {                    \
  88                 (_l)++;                         \
  89                 (_l) &= ((_sz) - 1);            \
  90         } while (0)
  91
  92 #define ATH_RXBUF               512
  93 #define ATH_TXBUF               512
  94 #define ATH_TXBUF_RESERVE       5
  95 #define ATH_MAX_QDEPTH          (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
  96 #define ATH_TXMAXTRY            13
  97 #define ATH_MAX_SW_RETRIES      30
  98
  99 #define TID_TO_WME_AC(_tid)                             \
 100         ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE :   \
 101          (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK :   \
 102          (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI :   \
 103          IEEE80211_AC_VO)
 104
 105 #define ATH_AGGR_DELIM_SZ          4
 106 #define ATH_AGGR_MINPLEN           256 /* in bytes, minimum packet length */
 107 /* number of delimiters for encryption padding */
 108 #define ATH_AGGR_ENCRYPTDELIM      10
 109 /* minimum h/w qdepth to be sustained to maximize aggregation */
 110 #define ATH_AGGR_MIN_QDEPTH        2
 111 /* minimum h/w qdepth for non-aggregated traffic */
 112 #define ATH_NON_AGGR_MIN_QDEPTH    8
 113 #define ATH_TX_COMPLETE_POLL_INT   1000
 114 #define ATH_TXFIFO_DEPTH           8
 115 #define ATH_TX_ERROR               0x01
 116
 117 /* Stop tx traffic 1ms before the GO goes away */
 118 #define ATH_P2P_PS_STOP_TIME       1000
 119
 120 #define IEEE80211_SEQ_SEQ_SHIFT    4
 121 #define IEEE80211_SEQ_MAX          4096
 122 #define IEEE80211_WEP_IVLEN        3
 123 #define IEEE80211_WEP_KIDLEN       1
 124 #define IEEE80211_WEP_CRCLEN       4
 125 #define IEEE80211_MAX_MPDU_LEN     (3840 + FCS_LEN +            \
 126                                     (IEEE80211_WEP_IVLEN +      \
 127                                      IEEE80211_WEP_KIDLEN +     \
 128                                      IEEE80211_WEP_CRCLEN))
 129
 130 /* return whether a bit at index _n in bitmap _bm is set
 131  * _sz is the size of the bitmap  */
 132 #define ATH_BA_ISSET(_bm, _n)  (((_n) < (WME_BA_BMP_SIZE)) &&           \
 133                                 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
 134
 135 /* return block-ack bitmap index given sequence and starting sequence */
 136 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
 137
 138 /* return the seqno for _start + _offset */
 139 #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1))
 140
 141 /* returns delimiter padding required given the packet length */
 142 #define ATH_AGGR_GET_NDELIM(_len)                                       \
 143        (((_len) >= ATH_AGGR_MINPLEN) ? 0 :                             \
 144         DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
 145
 146 #define BAW_WITHIN(_start, _bawsz, _seqno) \
 147         ((((_seqno) - (_start)) & 4095) < (_bawsz))
 148
 149 #define ATH_AN_2_TID(_an, _tidno)  (&(_an)->tid[(_tidno)])
 150
 151 #define IS_HT_RATE(rate)   (rate & 0x80)
 152 #define IS_CCK_RATE(rate)  ((rate >= 0x18) && (rate <= 0x1e))
 153 #define IS_OFDM_RATE(rate) ((rate >= 0x8) && (rate <= 0xf))
 154
 155 enum {
 156        WLAN_RC_PHY_OFDM,
 157        WLAN_RC_PHY_CCK,
 158 };
 159
 160 struct ath_txq {
 161         int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
 162         u32 axq_qnum; /* ath9k hardware queue number */
 163         void *axq_link;
 164         struct list_head axq_q;
 165         spinlock_t axq_lock;
 166         u32 axq_depth;
 167         u32 axq_ampdu_depth;
 168         bool stopped;
 169         bool axq_tx_inprogress;
 170         struct list_head axq_acq;
 171         struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
 172         u8 txq_headidx;
 173         u8 txq_tailidx;
 174         int pending_frames;
 175         struct sk_buff_head complete_q;
 176 };
 177
 178 struct ath_atx_ac {
 179         struct ath_txq *txq;
 180         struct list_head list;
 181         struct list_head tid_q;
 182         bool clear_ps_filter;
 183         bool sched;
 184 };
 185
 186 struct ath_frame_info {
 187         struct ath_buf *bf;
 188         int framelen;
 189         enum ath9k_key_type keytype;
 190         u8 keyix;
 191         u8 rtscts_rate;
 192         u8 retries : 7;
 193         u8 baw_tracked : 1;
 194 };
 195
 196 struct ath_rxbuf {
 197         struct list_head list;
 198         struct sk_buff *bf_mpdu;
 199         void *bf_desc;
 200         dma_addr_t bf_daddr;
 201         dma_addr_t bf_buf_addr;
 202 };
 203
 204 /**
 205  * enum buffer_type - Buffer type flags
 206  *
 207  * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
 208  * @BUF_AGGR: Indicates whether the buffer can be aggregated
 209  *      (used in aggregation scheduling)
 210  */
 211 enum buffer_type {
 212         BUF_AMPDU               = BIT(0),
 213         BUF_AGGR                = BIT(1),
 214 };
 215
 216 #define bf_isampdu(bf)          (bf->bf_state.bf_type & BUF_AMPDU)
 217 #define bf_isaggr(bf)           (bf->bf_state.bf_type & BUF_AGGR)
 218
 219 struct ath_buf_state {
 220         u8 bf_type;
 221         u8 bfs_paprd;
 222         u8 ndelim;
 223         bool stale;
 224         u16 seqno;
 225         unsigned long bfs_paprd_timestamp;
 226 };
 227
 228 struct ath_buf {
 229         struct list_head list;
 230         struct ath_buf *bf_lastbf;      /* last buf of this unit (a frame or
 231                                            an aggregate) */
 232         struct ath_buf *bf_next;        /* next subframe in the aggregate */
 233         struct sk_buff *bf_mpdu;        /* enclosing frame structure */
 234         void *bf_desc;                  /* virtual addr of desc */
 235         dma_addr_t bf_daddr;            /* physical addr of desc */
 236         dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
 237         struct ieee80211_tx_rate rates[4];
 238         struct ath_buf_state bf_state;
 239 };
 240
 241 struct ath_atx_tid {
 242         struct list_head list;
 243         struct sk_buff_head buf_q;
 244         struct sk_buff_head retry_q;
 245         struct ath_node *an;
 246         struct ath_atx_ac *ac;
 247         unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
 248         u16 seq_start;
 249         u16 seq_next;
 250         u16 baw_size;
 251         u8 tidno;
 252         int baw_head;   /* first un-acked tx buffer */
 253         int baw_tail;   /* next unused tx buffer slot */
 254
 255         s8 bar_index;
 256         bool sched;
 257         bool active;
 258 };
 259
 260 struct ath_node {
 261         struct ath_softc *sc;
 262         struct ieee80211_sta *sta; /* station struct we're part of */
 263         struct ieee80211_vif *vif; /* interface with which we're associated */
 264         struct ath_atx_tid tid[IEEE80211_NUM_TIDS];
 265         struct ath_atx_ac ac[IEEE80211_NUM_ACS];
 266
 267         u16 maxampdu;
 268         u8 mpdudensity;
 269         s8 ps_key;
 270
 271         bool sleeping;
 272         bool no_ps_filter;
 273
 274 #ifdef CONFIG_ATH9K_STATION_STATISTICS
 275         struct ath_rx_rate_stats rx_rate_stats;
 276 #endif
 277         u8 key_idx[4];
 278 };
 279
 280 struct ath_tx_control {
 281         struct ath_txq *txq;
 282         struct ath_node *an;
 283         u8 paprd;
 284         struct ieee80211_sta *sta;
 285 };
 286
 287
 288 /**
 289  * @txq_map:  Index is mac80211 queue number.  This is
 290  *  not necessarily the same as the hardware queue number
 291  *  (axq_qnum).
 292  */
 293 struct ath_tx {
 294         u16 seq_no;
 295         u32 txqsetup;
 296         spinlock_t txbuflock;
 297         struct list_head txbuf;
 298         struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
 299         struct ath_descdma txdma;
 300         struct ath_txq *txq_map[IEEE80211_NUM_ACS];
 301         struct ath_txq *uapsdq;
 302         u32 txq_max_pending[IEEE80211_NUM_ACS];
 303         u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32];
 304 };
 305
 306 struct ath_rx_edma {
 307         struct sk_buff_head rx_fifo;
 308         u32 rx_fifo_hwsize;
 309 };
 310
 311 struct ath_rx {
 312         u8 defant;
 313         u8 rxotherant;
 314         bool discard_next;
 315         u32 *rxlink;
 316         u32 num_pkts;
 317         unsigned int rxfilter;
 318         struct list_head rxbuf;
 319         struct ath_descdma rxdma;
 320         struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
 321
 322         struct ath_rxbuf *buf_hold;
 323         struct sk_buff *frag;
 324
 325         u32 ampdu_ref;
 326 };
 327
 328 int ath_startrecv(struct ath_softc *sc);
 329 bool ath_stoprecv(struct ath_softc *sc);
 330 u32 ath_calcrxfilter(struct ath_softc *sc);
 331 int ath_rx_init(struct ath_softc *sc, int nbufs);
 332 void ath_rx_cleanup(struct ath_softc *sc);
 333 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
 334 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
 335 void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq);
 336 void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq);
 337 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq);
 338 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
 339 bool ath_drain_all_txq(struct ath_softc *sc);
 340 void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq);
 341 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
 342 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
 343 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
 344 int ath_tx_init(struct ath_softc *sc, int nbufs);
 345 int ath_txq_update(struct ath_softc *sc, int qnum,
 346                    struct ath9k_tx_queue_info *q);
 347 void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
 348 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
 349                  struct ath_tx_control *txctl);
 350 void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
 351                  struct sk_buff *skb);
 352 void ath_tx_tasklet(struct ath_softc *sc);
 353 void ath_tx_edma_tasklet(struct ath_softc *sc);
 354 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
 355                       u16 tid, u16 *ssn);
 356 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
 357 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
 358
 359 void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an);
 360 void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc,
 361                        struct ath_node *an);
 362 void ath9k_release_buffered_frames(struct ieee80211_hw *hw,
 363                                    struct ieee80211_sta *sta,
 364                                    u16 tids, int nframes,
 365                                    enum ieee80211_frame_release_type reason,
 366                                    bool more_data);
 367
 368 /********/
 369 /* VIFs */
 370 /********/
 371
 372 struct ath_vif {
 373         struct ieee80211_vif *vif;
 374         struct ath_node mcast_node;
 375         int av_bslot;
 376         bool primary_sta_vif;
 377         __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
 378         struct ath_buf *av_bcbuf;
 379
 380         /* P2P Client */
 381         struct ieee80211_noa_data noa;
 382 };
 383
 384 struct ath9k_vif_iter_data {
 385         u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */
 386         u8 mask[ETH_ALEN]; /* bssid mask */
 387         bool has_hw_macaddr;
 388
 389         int naps;      /* number of AP vifs */
 390         int nmeshes;   /* number of mesh vifs */
 391         int nstations; /* number of station vifs */
 392         int nwds;      /* number of WDS vifs */
 393         int nadhocs;   /* number of adhoc vifs */
 394 };
 395
 396 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
 397                                struct ieee80211_vif *vif,
 398                                struct ath9k_vif_iter_data *iter_data);
 399
 400 /*******************/
 401 /* Beacon Handling */
 402 /*******************/
 403
 404 /*
 405  * Regardless of the number of beacons we stagger, (i.e. regardless of the
 406  * number of BSSIDs) if a given beacon does not go out even after waiting this
 407  * number of beacon intervals, the game's up.
 408  */
 409 #define BSTUCK_THRESH                   9
 410 #define ATH_BCBUF                       8
 411 #define ATH_DEFAULT_BINTVAL             100 /* TU */
 412 #define ATH_DEFAULT_BMISS_LIMIT         10
 413
 414 #define TSF_TO_TU(_h,_l) \
 415         ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
 416
 417 struct ath_beacon {
 418         enum {
 419                 OK,             /* no change needed */
 420                 UPDATE,         /* update pending */
 421                 COMMIT          /* beacon sent, commit change */
 422         } updateslot;           /* slot time update fsm */
 423
 424         u32 beaconq;
 425         u32 bmisscnt;
 426         struct ieee80211_vif *bslot[ATH_BCBUF];
 427         int slottime;
 428         int slotupdate;
 429         struct ath_descdma bdma;
 430         struct ath_txq *cabq;
 431         struct list_head bbuf;
 432
 433         bool tx_processed;
 434         bool tx_last;
 435 };
 436
 437 void ath9k_beacon_tasklet(unsigned long data);
 438 void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif,
 439                          u32 changed);
 440 void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
 441 void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
 442 void ath9k_set_beacon(struct ath_softc *sc);
 443 bool ath9k_csa_is_finished(struct ath_softc *sc, struct ieee80211_vif *vif);
 444 void ath9k_csa_update(struct ath_softc *sc);
 445
 446 /*******************/
 447 /* Link Monitoring */
 448 /*******************/
 449
 450 #define ATH_STA_SHORT_CALINTERVAL 1000    /* 1 second */
 451 #define ATH_AP_SHORT_CALINTERVAL  100     /* 100 ms */
 452 #define ATH_ANI_POLLINTERVAL_OLD  100     /* 100 ms */
 453 #define ATH_ANI_POLLINTERVAL_NEW  1000    /* 1000 ms */
 454 #define ATH_LONG_CALINTERVAL_INT  1000    /* 1000 ms */
 455 #define ATH_LONG_CALINTERVAL      30000   /* 30 seconds */
 456 #define ATH_RESTART_CALINTERVAL   1200000 /* 20 minutes */
 457 #define ATH_ANI_MAX_SKIP_COUNT    10
 458 #define ATH_PAPRD_TIMEOUT         100 /* msecs */
 459 #define ATH_PLL_WORK_INTERVAL     100
 460
 461 void ath_tx_complete_poll_work(struct work_struct *work);
 462 void ath_reset_work(struct work_struct *work);
 463 bool ath_hw_check(struct ath_softc *sc);
 464 void ath_hw_pll_work(struct work_struct *work);
 465 void ath_paprd_calibrate(struct work_struct *work);
 466 void ath_ani_calibrate(unsigned long data);
 467 void ath_start_ani(struct ath_softc *sc);
 468 void ath_stop_ani(struct ath_softc *sc);
 469 void ath_check_ani(struct ath_softc *sc);
 470 int ath_update_survey_stats(struct ath_softc *sc);
 471 void ath_update_survey_nf(struct ath_softc *sc, int channel);
 472 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type);
 473 void ath_ps_full_sleep(unsigned long data);
 474 void ath9k_p2p_ps_timer(void *priv);
 475 void ath9k_update_p2p_ps(struct ath_softc *sc, struct ieee80211_vif *vif);
 476
 477 /**********/
 478 /* BTCOEX */
 479 /**********/
 480
 481 #define ATH_DUMP_BTCOEX(_s, _val)                               \
 482         do {                                                    \
 483                 len += scnprintf(buf + len, size - len,         \
 484                                  "%20s : %10d\n", _s, (_val));  \
 485         } while (0)
 486
 487 enum bt_op_flags {
 488         BT_OP_PRIORITY_DETECTED,
 489         BT_OP_SCAN,
 490 };
 491
 492 struct ath_btcoex {
 493         spinlock_t btcoex_lock;
 494         struct timer_list period_timer; /* Timer for BT period */
 495         struct timer_list no_stomp_timer;
 496         u32 bt_priority_cnt;
 497         unsigned long bt_priority_time;
 498         unsigned long op_flags;
 499         int bt_stomp_type; /* Types of BT stomping */
 500         u32 btcoex_no_stomp; /* in msec */
 501         u32 btcoex_period; /* in msec */
 502         u32 btscan_no_stomp; /* in msec */
 503         u32 duty_cycle;
 504         u32 bt_wait_time;
 505         int rssi_count;
 506         struct ath_mci_profile mci;
 507         u8 stomp_audio;
 508 };
 509
 510 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 511 int ath9k_init_btcoex(struct ath_softc *sc);
 512 void ath9k_deinit_btcoex(struct ath_softc *sc);
 513 void ath9k_start_btcoex(struct ath_softc *sc);
 514 void ath9k_stop_btcoex(struct ath_softc *sc);
 515 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
 516 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
 517 void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status);
 518 u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen);
 519 void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc);
 520 int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size);
 521 #else
 522 static inline int ath9k_init_btcoex(struct ath_softc *sc)
 523 {
 524         return 0;
 525 }
 526 static inline void ath9k_deinit_btcoex(struct ath_softc *sc)
 527 {
 528 }
 529 static inline void ath9k_start_btcoex(struct ath_softc *sc)
 530 {
 531 }
 532 static inline void ath9k_stop_btcoex(struct ath_softc *sc)
 533 {
 534 }
 535 static inline void ath9k_btcoex_handle_interrupt(struct ath_softc *sc,
 536                                                  u32 status)
 537 {
 538 }
 539 static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc,
 540                                           u32 max_4ms_framelen)
 541 {
 542         return 0;
 543 }
 544 static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc)
 545 {
 546 }
 547 static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
 548 {
 549         return 0;
 550 }
 551 #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
 552
 553 /********************/
 554 /*   LED Control    */
 555 /********************/
 556
 557 #define ATH_LED_PIN_DEF                 1
 558 #define ATH_LED_PIN_9287                8
 559 #define ATH_LED_PIN_9300                10
 560 #define ATH_LED_PIN_9485                6
 561 #define ATH_LED_PIN_9462                4
 562
 563 #ifdef CONFIG_MAC80211_LEDS
 564 void ath_init_leds(struct ath_softc *sc);
 565 void ath_deinit_leds(struct ath_softc *sc);
 566 void ath_fill_led_pin(struct ath_softc *sc);
 567 #else
 568 static inline void ath_init_leds(struct ath_softc *sc)
 569 {
 570 }
 571
 572 static inline void ath_deinit_leds(struct ath_softc *sc)
 573 {
 574 }
 575 static inline void ath_fill_led_pin(struct ath_softc *sc)
 576 {
 577 }
 578 #endif
 579
 580 /************************/
 581 /* Wake on Wireless LAN */
 582 /************************/
 583
 584 struct ath9k_wow_pattern {
 585         u8 pattern_bytes[MAX_PATTERN_SIZE];
 586         u8 mask_bytes[MAX_PATTERN_SIZE];
 587         u32 pattern_len;
 588 };
 589
 590 #ifdef CONFIG_ATH9K_WOW
 591 void ath9k_init_wow(struct ieee80211_hw *hw);
 592 int ath9k_suspend(struct ieee80211_hw *hw,
 593                   struct cfg80211_wowlan *wowlan);
 594 int ath9k_resume(struct ieee80211_hw *hw);
 595 void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled);
 596 #else
 597 static inline void ath9k_init_wow(struct ieee80211_hw *hw)
 598 {
 599 }
 600 static inline int ath9k_suspend(struct ieee80211_hw *hw,
 601                                 struct cfg80211_wowlan *wowlan)
 602 {
 603         return 0;
 604 }
 605 static inline int ath9k_resume(struct ieee80211_hw *hw)
 606 {
 607         return 0;
 608 }
 609 static inline void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
 610 {
 611 }
 612 #endif /* CONFIG_ATH9K_WOW */
 613
 614 /*******************************/
 615 /* Antenna diversity/combining */
 616 /*******************************/
 617
 618 #define ATH_ANT_RX_CURRENT_SHIFT 4
 619 #define ATH_ANT_RX_MAIN_SHIFT 2
 620 #define ATH_ANT_RX_MASK 0x3
 621
 622 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
 623 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
 624 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
 625 #define ATH_ANT_DIV_COMB_INIT_COUNT 95
 626 #define ATH_ANT_DIV_COMB_MAX_COUNT 100
 627 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
 628 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
 629 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50
 630 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50
 631
 632 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
 633 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
 634 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
 635
 636 struct ath_ant_comb {
 637         u16 count;
 638         u16 total_pkt_count;
 639         bool scan;
 640         bool scan_not_start;
 641         int main_total_rssi;
 642         int alt_total_rssi;
 643         int alt_recv_cnt;
 644         int main_recv_cnt;
 645         int rssi_lna1;
 646         int rssi_lna2;
 647         int rssi_add;
 648         int rssi_sub;
 649         int rssi_first;
 650         int rssi_second;
 651         int rssi_third;
 652         int ant_ratio;
 653         int ant_ratio2;
 654         bool alt_good;
 655         int quick_scan_cnt;
 656         enum ath9k_ant_div_comb_lna_conf main_conf;
 657         enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;
 658         enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;
 659         bool first_ratio;
 660         bool second_ratio;
 661         unsigned long scan_start_time;
 662
 663         /*
 664          * Card-specific config values.
 665          */
 666         int low_rssi_thresh;
 667         int fast_div_bias;
 668 };
 669
 670 void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);
 671
 672 /********************/
 673 /* Main driver core */
 674 /********************/
 675
 676 #define ATH9K_PCI_CUS198          0x0001
 677 #define ATH9K_PCI_CUS230          0x0002
 678 #define ATH9K_PCI_CUS217          0x0004
 679 #define ATH9K_PCI_CUS252          0x0008
 680 #define ATH9K_PCI_WOW             0x0010
 681 #define ATH9K_PCI_BT_ANT_DIV      0x0020
 682 #define ATH9K_PCI_D3_L1_WAR       0x0040
 683 #define ATH9K_PCI_AR9565_1ANT     0x0080
 684 #define ATH9K_PCI_AR9565_2ANT     0x0100
 685 #define ATH9K_PCI_NO_PLL_PWRSAVE  0x0200
 686 #define ATH9K_PCI_KILLER          0x0400
 687
 688 /*
 689  * Default cache line size, in bytes.
 690  * Used when PCI device not fully initialized by bootrom/BIOS
 691 */
 692 #define DEFAULT_CACHELINE       32
 693 #define ATH_CABQ_READY_TIME     80      /* % of beacon interval */
 694 #define ATH_TXPOWER_MAX         100     /* .5 dBm units */
 695 #define MAX_GTT_CNT             5
 696
 697 /* Powersave flags */
 698 #define PS_WAIT_FOR_BEACON        BIT(0)
 699 #define PS_WAIT_FOR_CAB           BIT(1)
 700 #define PS_WAIT_FOR_PSPOLL_DATA   BIT(2)
 701 #define PS_WAIT_FOR_TX_ACK        BIT(3)
 702 #define PS_BEACON_SYNC            BIT(4)
 703 #define PS_WAIT_FOR_ANI           BIT(5)
 704
 705 struct ath_softc {
 706         struct ieee80211_hw *hw;
 707         struct device *dev;
 708
 709         struct survey_info *cur_survey;
 710         struct survey_info survey[ATH9K_NUM_CHANNELS];
 711
 712         struct tasklet_struct intr_tq;
 713         struct tasklet_struct bcon_tasklet;
 714         struct ath_hw *sc_ah;
 715         void __iomem *mem;
 716         int irq;
 717         spinlock_t sc_serial_rw;
 718         spinlock_t sc_pm_lock;
 719         spinlock_t sc_pcu_lock;
 720         struct mutex mutex;
 721         struct work_struct paprd_work;
 722         struct work_struct hw_reset_work;
 723         struct completion paprd_complete;
 724         wait_queue_head_t tx_wait;
 725
 726         struct ath_gen_timer *p2p_ps_timer;
 727         struct ath_vif *p2p_ps_vif;
 728
 729         unsigned long driver_data;
 730
 731         u8 gtt_cnt;
 732         u32 intrstatus;
 733         u16 ps_flags; /* PS_* */
 734         u16 curtxpow;
 735         bool ps_enabled;
 736         bool ps_idle;
 737         short nbcnvifs;
 738         short nvifs;
 739         unsigned long ps_usecount;
 740
 741         struct ath_config config;
 742         struct ath_rx rx;
 743         struct ath_tx tx;
 744         struct ath_beacon beacon;
 745
 746 #ifdef CONFIG_MAC80211_LEDS
 747         bool led_registered;
 748         char led_name[32];
 749         struct led_classdev led_cdev;
 750 #endif
 751
 752         struct ath9k_hw_cal_data caldata;
 753
 754 #ifdef CONFIG_ATH9K_DEBUGFS
 755         struct ath9k_debug debug;
 756 #endif
 757         struct ath_beacon_config cur_beacon_conf;
 758         struct delayed_work tx_complete_work;
 759         struct delayed_work hw_pll_work;
 760         struct timer_list sleep_timer;
 761
 762 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 763         struct ath_btcoex btcoex;
 764         struct ath_mci_coex mci_coex;
 765         struct work_struct mci_work;
 766 #endif
 767
 768         struct ath_descdma txsdma;
 769
 770         struct ath_ant_comb ant_comb;
 771         u8 ant_tx, ant_rx;
 772         struct dfs_pattern_detector *dfs_detector;
 773         u64 dfs_prev_pulse_ts;
 774         u32 wow_enabled;
 775         /* relay(fs) channel for spectral scan */
 776         struct rchan *rfs_chan_spec_scan;
 777         enum spectral_mode spectral_mode;
 778         struct ath_spec_scan spec_config;
 779
 780         struct ieee80211_vif *tx99_vif;
 781         struct sk_buff *tx99_skb;
 782         bool tx99_state;
 783         s16 tx99_power;
 784
 785 #ifdef CONFIG_ATH9K_WOW
 786         atomic_t wow_got_bmiss_intr;
 787         atomic_t wow_sleep_proc_intr; /* in the middle of WoW sleep ? */
 788         u32 wow_intr_before_sleep;
 789 #endif
 790 };
 791
 792 /********/
 793 /* TX99 */
 794 /********/
 795
 796 #ifdef CONFIG_ATH9K_TX99
 797 void ath9k_tx99_init_debug(struct ath_softc *sc);
 798 int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,
 799                     struct ath_tx_control *txctl);
 800 #else
 801 static inline void ath9k_tx99_init_debug(struct ath_softc *sc)
 802 {
 803 }
 804 static inline int ath9k_tx99_send(struct ath_softc *sc,
 805                                   struct sk_buff *skb,
 806                                   struct ath_tx_control *txctl)
 807 {
 808         return 0;
 809 }
 810 #endif /* CONFIG_ATH9K_TX99 */
 811
 812 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
 813 {
 814         common->bus_ops->read_cachesize(common, csz);
 815 }
 816
 817 void ath9k_tasklet(unsigned long data);
 818 int ath_cabq_update(struct ath_softc *);
 819 u8 ath9k_parse_mpdudensity(u8 mpdudensity);
 820 irqreturn_t ath_isr(int irq, void *dev);
 821 int ath_reset(struct ath_softc *sc);
 822 void ath_cancel_work(struct ath_softc *sc);
 823 void ath_restart_work(struct ath_softc *sc);
 824 int ath9k_init_device(u16 devid, struct ath_softc *sc,
 825                     const struct ath_bus_ops *bus_ops);
 826 void ath9k_deinit_device(struct ath_softc *sc);
 827 void ath9k_reload_chainmask_settings(struct ath_softc *sc);
 828 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
 829 void ath_start_rfkill_poll(struct ath_softc *sc);
 830 void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
 831 void ath9k_ps_wakeup(struct ath_softc *sc);
 832 void ath9k_ps_restore(struct ath_softc *sc);
 833
 834 #ifdef CONFIG_ATH9K_PCI
 835 int ath_pci_init(void);
 836 void ath_pci_exit(void);
 837 #else
 838 static inline int ath_pci_init(void) { return 0; };
 839 static inline void ath_pci_exit(void) {};
 840 #endif
 841
 842 #ifdef CONFIG_ATH9K_AHB
 843 int ath_ahb_init(void);
 844 void ath_ahb_exit(void);
 845 #else
 846 static inline int ath_ahb_init(void) { return 0; };
 847 static inline void ath_ahb_exit(void) {};
 848 #endif
 849
 850 #endif /* ATH9K_H */