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ath9k_hw: Cleanup ath9k_hw_set_tsfadjust
[deliverable/linux.git] / drivers / net / wireless / ath / ath9k / main.c
1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
19 #include "ath9k.h"
20 #include "btcoex.h"
21
22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
23 {
24 /*
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
27 * 1 for 1/4 us
28 * 2 for 1/2 us
29 * 3 for 1 us
30 * 4 for 2 us
31 * 5 for 4 us
32 * 6 for 8 us
33 * 7 for 16 us
34 */
35 switch (mpdudensity) {
36 case 0:
37 return 0;
38 case 1:
39 case 2:
40 case 3:
41 /* Our lower layer calculations limit our precision to
42 1 microsecond */
43 return 1;
44 case 4:
45 return 2;
46 case 5:
47 return 4;
48 case 6:
49 return 8;
50 case 7:
51 return 16;
52 default:
53 return 0;
54 }
55 }
56
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
58 {
59 bool pending = false;
60
61 spin_lock_bh(&txq->axq_lock);
62
63 if (txq->axq_depth || !list_empty(&txq->axq_acq))
64 pending = true;
65
66 spin_unlock_bh(&txq->axq_lock);
67 return pending;
68 }
69
70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
71 {
72 unsigned long flags;
73 bool ret;
74
75 spin_lock_irqsave(&sc->sc_pm_lock, flags);
76 ret = ath9k_hw_setpower(sc->sc_ah, mode);
77 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
78
79 return ret;
80 }
81
82 void ath9k_ps_wakeup(struct ath_softc *sc)
83 {
84 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
85 unsigned long flags;
86 enum ath9k_power_mode power_mode;
87
88 spin_lock_irqsave(&sc->sc_pm_lock, flags);
89 if (++sc->ps_usecount != 1)
90 goto unlock;
91
92 power_mode = sc->sc_ah->power_mode;
93 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
94
95 /*
96 * While the hardware is asleep, the cycle counters contain no
97 * useful data. Better clear them now so that they don't mess up
98 * survey data results.
99 */
100 if (power_mode != ATH9K_PM_AWAKE) {
101 spin_lock(&common->cc_lock);
102 ath_hw_cycle_counters_update(common);
103 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
104 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
105 spin_unlock(&common->cc_lock);
106 }
107
108 unlock:
109 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
110 }
111
112 void ath9k_ps_restore(struct ath_softc *sc)
113 {
114 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
115 enum ath9k_power_mode mode;
116 unsigned long flags;
117 bool reset;
118
119 spin_lock_irqsave(&sc->sc_pm_lock, flags);
120 if (--sc->ps_usecount != 0)
121 goto unlock;
122
123 if (sc->ps_idle) {
124 ath9k_hw_setrxabort(sc->sc_ah, 1);
125 ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
126 mode = ATH9K_PM_FULL_SLEEP;
127 } else if (sc->ps_enabled &&
128 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
129 PS_WAIT_FOR_CAB |
130 PS_WAIT_FOR_PSPOLL_DATA |
131 PS_WAIT_FOR_TX_ACK))) {
132 mode = ATH9K_PM_NETWORK_SLEEP;
133 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
134 ath9k_btcoex_stop_gen_timer(sc);
135 } else {
136 goto unlock;
137 }
138
139 spin_lock(&common->cc_lock);
140 ath_hw_cycle_counters_update(common);
141 spin_unlock(&common->cc_lock);
142
143 ath9k_hw_setpower(sc->sc_ah, mode);
144
145 unlock:
146 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
147 }
148
149 static void __ath_cancel_work(struct ath_softc *sc)
150 {
151 cancel_work_sync(&sc->paprd_work);
152 cancel_work_sync(&sc->hw_check_work);
153 cancel_delayed_work_sync(&sc->tx_complete_work);
154 cancel_delayed_work_sync(&sc->hw_pll_work);
155
156 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
157 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
158 cancel_work_sync(&sc->mci_work);
159 #endif
160 }
161
162 static void ath_cancel_work(struct ath_softc *sc)
163 {
164 __ath_cancel_work(sc);
165 cancel_work_sync(&sc->hw_reset_work);
166 }
167
168 static void ath_restart_work(struct ath_softc *sc)
169 {
170 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
171
172 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
173
174 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9485(sc->sc_ah) ||
175 AR_SREV_9550(sc->sc_ah))
176 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
177 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
178
179 ath_start_rx_poll(sc, 3);
180
181 if (!common->disable_ani)
182 ath_start_ani(common);
183 }
184
185 static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
186 {
187 struct ath_hw *ah = sc->sc_ah;
188 struct ath_common *common = ath9k_hw_common(ah);
189 bool ret = true;
190
191 ieee80211_stop_queues(sc->hw);
192
193 sc->hw_busy_count = 0;
194 del_timer_sync(&common->ani.timer);
195 del_timer_sync(&sc->rx_poll_timer);
196
197 ath9k_debug_samp_bb_mac(sc);
198 ath9k_hw_disable_interrupts(ah);
199
200 if (!ath_stoprecv(sc))
201 ret = false;
202
203 if (!ath_drain_all_txq(sc, retry_tx))
204 ret = false;
205
206 if (!flush) {
207 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
208 ath_rx_tasklet(sc, 1, true);
209 ath_rx_tasklet(sc, 1, false);
210 } else {
211 ath_flushrecv(sc);
212 }
213
214 return ret;
215 }
216
217 static bool ath_complete_reset(struct ath_softc *sc, bool start)
218 {
219 struct ath_hw *ah = sc->sc_ah;
220 struct ath_common *common = ath9k_hw_common(ah);
221 unsigned long flags;
222
223 if (ath_startrecv(sc) != 0) {
224 ath_err(common, "Unable to restart recv logic\n");
225 return false;
226 }
227
228 ath9k_cmn_update_txpow(ah, sc->curtxpow,
229 sc->config.txpowlimit, &sc->curtxpow);
230
231 clear_bit(SC_OP_HW_RESET, &sc->sc_flags);
232 ath9k_hw_set_interrupts(ah);
233 ath9k_hw_enable_interrupts(ah);
234
235 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && start) {
236 if (!test_bit(SC_OP_BEACONS, &sc->sc_flags))
237 goto work;
238
239 ath_set_beacon(sc);
240
241 if (ah->opmode == NL80211_IFTYPE_STATION &&
242 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
243 spin_lock_irqsave(&sc->sc_pm_lock, flags);
244 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
245 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
246 }
247 work:
248 ath_restart_work(sc);
249 }
250
251 if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3)
252 ath_ant_comb_update(sc);
253
254 ieee80211_wake_queues(sc->hw);
255
256 return true;
257 }
258
259 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
260 bool retry_tx)
261 {
262 struct ath_hw *ah = sc->sc_ah;
263 struct ath_common *common = ath9k_hw_common(ah);
264 struct ath9k_hw_cal_data *caldata = NULL;
265 bool fastcc = true;
266 bool flush = false;
267 int r;
268
269 __ath_cancel_work(sc);
270
271 spin_lock_bh(&sc->sc_pcu_lock);
272
273 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) {
274 fastcc = false;
275 caldata = &sc->caldata;
276 }
277
278 if (!hchan) {
279 fastcc = false;
280 flush = true;
281 hchan = ah->curchan;
282 }
283
284 if (!ath_prepare_reset(sc, retry_tx, flush))
285 fastcc = false;
286
287 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
288 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
289
290 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
291 if (r) {
292 ath_err(common,
293 "Unable to reset channel, reset status %d\n", r);
294 goto out;
295 }
296
297 if (!ath_complete_reset(sc, true))
298 r = -EIO;
299
300 out:
301 spin_unlock_bh(&sc->sc_pcu_lock);
302 return r;
303 }
304
305
306 /*
307 * Set/change channels. If the channel is really being changed, it's done
308 * by reseting the chip. To accomplish this we must first cleanup any pending
309 * DMA, then restart stuff.
310 */
311 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
312 struct ath9k_channel *hchan)
313 {
314 int r;
315
316 if (test_bit(SC_OP_INVALID, &sc->sc_flags))
317 return -EIO;
318
319 r = ath_reset_internal(sc, hchan, false);
320
321 return r;
322 }
323
324 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
325 struct ieee80211_vif *vif)
326 {
327 struct ath_node *an;
328 u8 density;
329 an = (struct ath_node *)sta->drv_priv;
330
331 #ifdef CONFIG_ATH9K_DEBUGFS
332 spin_lock(&sc->nodes_lock);
333 list_add(&an->list, &sc->nodes);
334 spin_unlock(&sc->nodes_lock);
335 #endif
336 an->sta = sta;
337 an->vif = vif;
338
339 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
340 ath_tx_node_init(sc, an);
341 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
342 sta->ht_cap.ampdu_factor);
343 density = ath9k_parse_mpdudensity(sta->ht_cap.ampdu_density);
344 an->mpdudensity = density;
345 }
346 }
347
348 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
349 {
350 struct ath_node *an = (struct ath_node *)sta->drv_priv;
351
352 #ifdef CONFIG_ATH9K_DEBUGFS
353 spin_lock(&sc->nodes_lock);
354 list_del(&an->list);
355 spin_unlock(&sc->nodes_lock);
356 an->sta = NULL;
357 #endif
358
359 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
360 ath_tx_node_cleanup(sc, an);
361 }
362
363 void ath9k_tasklet(unsigned long data)
364 {
365 struct ath_softc *sc = (struct ath_softc *)data;
366 struct ath_hw *ah = sc->sc_ah;
367 struct ath_common *common = ath9k_hw_common(ah);
368 unsigned long flags;
369 u32 status = sc->intrstatus;
370 u32 rxmask;
371
372 ath9k_ps_wakeup(sc);
373 spin_lock(&sc->sc_pcu_lock);
374
375 if ((status & ATH9K_INT_FATAL) ||
376 (status & ATH9K_INT_BB_WATCHDOG)) {
377 #ifdef CONFIG_ATH9K_DEBUGFS
378 enum ath_reset_type type;
379
380 if (status & ATH9K_INT_FATAL)
381 type = RESET_TYPE_FATAL_INT;
382 else
383 type = RESET_TYPE_BB_WATCHDOG;
384
385 RESET_STAT_INC(sc, type);
386 #endif
387 set_bit(SC_OP_HW_RESET, &sc->sc_flags);
388 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
389 goto out;
390 }
391
392 spin_lock_irqsave(&sc->sc_pm_lock, flags);
393 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
394 /*
395 * TSF sync does not look correct; remain awake to sync with
396 * the next Beacon.
397 */
398 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
399 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
400 }
401 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
402
403 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
404 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
405 ATH9K_INT_RXORN);
406 else
407 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
408
409 if (status & rxmask) {
410 /* Check for high priority Rx first */
411 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
412 (status & ATH9K_INT_RXHP))
413 ath_rx_tasklet(sc, 0, true);
414
415 ath_rx_tasklet(sc, 0, false);
416 }
417
418 if (status & ATH9K_INT_TX) {
419 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
420 ath_tx_edma_tasklet(sc);
421 else
422 ath_tx_tasklet(sc);
423 }
424
425 ath9k_btcoex_handle_interrupt(sc, status);
426
427 out:
428 /* re-enable hardware interrupt */
429 ath9k_hw_enable_interrupts(ah);
430
431 spin_unlock(&sc->sc_pcu_lock);
432 ath9k_ps_restore(sc);
433 }
434
435 irqreturn_t ath_isr(int irq, void *dev)
436 {
437 #define SCHED_INTR ( \
438 ATH9K_INT_FATAL | \
439 ATH9K_INT_BB_WATCHDOG | \
440 ATH9K_INT_RXORN | \
441 ATH9K_INT_RXEOL | \
442 ATH9K_INT_RX | \
443 ATH9K_INT_RXLP | \
444 ATH9K_INT_RXHP | \
445 ATH9K_INT_TX | \
446 ATH9K_INT_BMISS | \
447 ATH9K_INT_CST | \
448 ATH9K_INT_TSFOOR | \
449 ATH9K_INT_GENTIMER | \
450 ATH9K_INT_MCI)
451
452 struct ath_softc *sc = dev;
453 struct ath_hw *ah = sc->sc_ah;
454 struct ath_common *common = ath9k_hw_common(ah);
455 enum ath9k_int status;
456 bool sched = false;
457
458 /*
459 * The hardware is not ready/present, don't
460 * touch anything. Note this can happen early
461 * on if the IRQ is shared.
462 */
463 if (test_bit(SC_OP_INVALID, &sc->sc_flags))
464 return IRQ_NONE;
465
466 /* shared irq, not for us */
467
468 if (!ath9k_hw_intrpend(ah))
469 return IRQ_NONE;
470
471 if(test_bit(SC_OP_HW_RESET, &sc->sc_flags))
472 return IRQ_HANDLED;
473
474 /*
475 * Figure out the reason(s) for the interrupt. Note
476 * that the hal returns a pseudo-ISR that may include
477 * bits we haven't explicitly enabled so we mask the
478 * value to insure we only process bits we requested.
479 */
480 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
481 status &= ah->imask; /* discard unasked-for bits */
482
483 /*
484 * If there are no status bits set, then this interrupt was not
485 * for me (should have been caught above).
486 */
487 if (!status)
488 return IRQ_NONE;
489
490 /* Cache the status */
491 sc->intrstatus = status;
492
493 if (status & SCHED_INTR)
494 sched = true;
495
496 #ifdef CONFIG_PM_SLEEP
497 if (status & ATH9K_INT_BMISS) {
498 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
499 ath_dbg(common, ANY, "during WoW we got a BMISS\n");
500 atomic_inc(&sc->wow_got_bmiss_intr);
501 atomic_dec(&sc->wow_sleep_proc_intr);
502 }
503 ath_dbg(common, INTERRUPT, "beacon miss interrupt\n");
504 }
505 #endif
506
507 /*
508 * If a FATAL or RXORN interrupt is received, we have to reset the
509 * chip immediately.
510 */
511 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
512 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
513 goto chip_reset;
514
515 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
516 (status & ATH9K_INT_BB_WATCHDOG)) {
517
518 spin_lock(&common->cc_lock);
519 ath_hw_cycle_counters_update(common);
520 ar9003_hw_bb_watchdog_dbg_info(ah);
521 spin_unlock(&common->cc_lock);
522
523 goto chip_reset;
524 }
525
526 if (status & ATH9K_INT_SWBA)
527 tasklet_schedule(&sc->bcon_tasklet);
528
529 if (status & ATH9K_INT_TXURN)
530 ath9k_hw_updatetxtriglevel(ah, true);
531
532 if (status & ATH9K_INT_RXEOL) {
533 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
534 ath9k_hw_set_interrupts(ah);
535 }
536
537 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
538 if (status & ATH9K_INT_TIM_TIMER) {
539 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
540 goto chip_reset;
541 /* Clear RxAbort bit so that we can
542 * receive frames */
543 ath9k_setpower(sc, ATH9K_PM_AWAKE);
544 spin_lock(&sc->sc_pm_lock);
545 ath9k_hw_setrxabort(sc->sc_ah, 0);
546 sc->ps_flags |= PS_WAIT_FOR_BEACON;
547 spin_unlock(&sc->sc_pm_lock);
548 }
549
550 chip_reset:
551
552 ath_debug_stat_interrupt(sc, status);
553
554 if (sched) {
555 /* turn off every interrupt */
556 ath9k_hw_disable_interrupts(ah);
557 tasklet_schedule(&sc->intr_tq);
558 }
559
560 return IRQ_HANDLED;
561
562 #undef SCHED_INTR
563 }
564
565 static int ath_reset(struct ath_softc *sc, bool retry_tx)
566 {
567 int r;
568
569 ath9k_ps_wakeup(sc);
570
571 r = ath_reset_internal(sc, NULL, retry_tx);
572
573 if (retry_tx) {
574 int i;
575 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
576 if (ATH_TXQ_SETUP(sc, i)) {
577 spin_lock_bh(&sc->tx.txq[i].axq_lock);
578 ath_txq_schedule(sc, &sc->tx.txq[i]);
579 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
580 }
581 }
582 }
583
584 ath9k_ps_restore(sc);
585
586 return r;
587 }
588
589 void ath_reset_work(struct work_struct *work)
590 {
591 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
592
593 ath_reset(sc, true);
594 }
595
596 /**********************/
597 /* mac80211 callbacks */
598 /**********************/
599
600 static int ath9k_start(struct ieee80211_hw *hw)
601 {
602 struct ath_softc *sc = hw->priv;
603 struct ath_hw *ah = sc->sc_ah;
604 struct ath_common *common = ath9k_hw_common(ah);
605 struct ieee80211_channel *curchan = hw->conf.channel;
606 struct ath9k_channel *init_channel;
607 int r;
608
609 ath_dbg(common, CONFIG,
610 "Starting driver with initial channel: %d MHz\n",
611 curchan->center_freq);
612
613 ath9k_ps_wakeup(sc);
614 mutex_lock(&sc->mutex);
615
616 init_channel = ath9k_cmn_get_curchannel(hw, ah);
617
618 /* Reset SERDES registers */
619 ath9k_hw_configpcipowersave(ah, false);
620
621 /*
622 * The basic interface to setting the hardware in a good
623 * state is ``reset''. On return the hardware is known to
624 * be powered up and with interrupts disabled. This must
625 * be followed by initialization of the appropriate bits
626 * and then setup of the interrupt mask.
627 */
628 spin_lock_bh(&sc->sc_pcu_lock);
629
630 atomic_set(&ah->intr_ref_cnt, -1);
631
632 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
633 if (r) {
634 ath_err(common,
635 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
636 r, curchan->center_freq);
637 spin_unlock_bh(&sc->sc_pcu_lock);
638 goto mutex_unlock;
639 }
640
641 /* Setup our intr mask. */
642 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
643 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
644 ATH9K_INT_GLOBAL;
645
646 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
647 ah->imask |= ATH9K_INT_RXHP |
648 ATH9K_INT_RXLP |
649 ATH9K_INT_BB_WATCHDOG;
650 else
651 ah->imask |= ATH9K_INT_RX;
652
653 ah->imask |= ATH9K_INT_GTT;
654
655 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
656 ah->imask |= ATH9K_INT_CST;
657
658 ath_mci_enable(sc);
659
660 clear_bit(SC_OP_INVALID, &sc->sc_flags);
661 sc->sc_ah->is_monitoring = false;
662
663 if (!ath_complete_reset(sc, false)) {
664 r = -EIO;
665 spin_unlock_bh(&sc->sc_pcu_lock);
666 goto mutex_unlock;
667 }
668
669 if (ah->led_pin >= 0) {
670 ath9k_hw_cfg_output(ah, ah->led_pin,
671 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
672 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
673 }
674
675 /*
676 * Reset key cache to sane defaults (all entries cleared) instead of
677 * semi-random values after suspend/resume.
678 */
679 ath9k_cmn_init_crypto(sc->sc_ah);
680
681 spin_unlock_bh(&sc->sc_pcu_lock);
682
683 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
684 common->bus_ops->extn_synch_en(common);
685
686 mutex_unlock:
687 mutex_unlock(&sc->mutex);
688
689 ath9k_ps_restore(sc);
690
691 return r;
692 }
693
694 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
695 {
696 struct ath_softc *sc = hw->priv;
697 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
698 struct ath_tx_control txctl;
699 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
700 unsigned long flags;
701
702 if (sc->ps_enabled) {
703 /*
704 * mac80211 does not set PM field for normal data frames, so we
705 * need to update that based on the current PS mode.
706 */
707 if (ieee80211_is_data(hdr->frame_control) &&
708 !ieee80211_is_nullfunc(hdr->frame_control) &&
709 !ieee80211_has_pm(hdr->frame_control)) {
710 ath_dbg(common, PS,
711 "Add PM=1 for a TX frame while in PS mode\n");
712 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
713 }
714 }
715
716 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
717 /*
718 * We are using PS-Poll and mac80211 can request TX while in
719 * power save mode. Need to wake up hardware for the TX to be
720 * completed and if needed, also for RX of buffered frames.
721 */
722 ath9k_ps_wakeup(sc);
723 spin_lock_irqsave(&sc->sc_pm_lock, flags);
724 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
725 ath9k_hw_setrxabort(sc->sc_ah, 0);
726 if (ieee80211_is_pspoll(hdr->frame_control)) {
727 ath_dbg(common, PS,
728 "Sending PS-Poll to pick a buffered frame\n");
729 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
730 } else {
731 ath_dbg(common, PS, "Wake up to complete TX\n");
732 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
733 }
734 /*
735 * The actual restore operation will happen only after
736 * the ps_flags bit is cleared. We are just dropping
737 * the ps_usecount here.
738 */
739 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
740 ath9k_ps_restore(sc);
741 }
742
743 /*
744 * Cannot tx while the hardware is in full sleep, it first needs a full
745 * chip reset to recover from that
746 */
747 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
748 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
749 goto exit;
750 }
751
752 memset(&txctl, 0, sizeof(struct ath_tx_control));
753 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
754
755 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
756
757 if (ath_tx_start(hw, skb, &txctl) != 0) {
758 ath_dbg(common, XMIT, "TX failed\n");
759 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
760 goto exit;
761 }
762
763 return;
764 exit:
765 dev_kfree_skb_any(skb);
766 }
767
768 static void ath9k_stop(struct ieee80211_hw *hw)
769 {
770 struct ath_softc *sc = hw->priv;
771 struct ath_hw *ah = sc->sc_ah;
772 struct ath_common *common = ath9k_hw_common(ah);
773 bool prev_idle;
774
775 mutex_lock(&sc->mutex);
776
777 ath_cancel_work(sc);
778 del_timer_sync(&sc->rx_poll_timer);
779
780 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
781 ath_dbg(common, ANY, "Device not present\n");
782 mutex_unlock(&sc->mutex);
783 return;
784 }
785
786 /* Ensure HW is awake when we try to shut it down. */
787 ath9k_ps_wakeup(sc);
788
789 spin_lock_bh(&sc->sc_pcu_lock);
790
791 /* prevent tasklets to enable interrupts once we disable them */
792 ah->imask &= ~ATH9K_INT_GLOBAL;
793
794 /* make sure h/w will not generate any interrupt
795 * before setting the invalid flag. */
796 ath9k_hw_disable_interrupts(ah);
797
798 spin_unlock_bh(&sc->sc_pcu_lock);
799
800 /* we can now sync irq and kill any running tasklets, since we already
801 * disabled interrupts and not holding a spin lock */
802 synchronize_irq(sc->irq);
803 tasklet_kill(&sc->intr_tq);
804 tasklet_kill(&sc->bcon_tasklet);
805
806 prev_idle = sc->ps_idle;
807 sc->ps_idle = true;
808
809 spin_lock_bh(&sc->sc_pcu_lock);
810
811 if (ah->led_pin >= 0) {
812 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
813 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
814 }
815
816 ath_prepare_reset(sc, false, true);
817
818 if (sc->rx.frag) {
819 dev_kfree_skb_any(sc->rx.frag);
820 sc->rx.frag = NULL;
821 }
822
823 if (!ah->curchan)
824 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
825
826 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
827 ath9k_hw_phy_disable(ah);
828
829 ath9k_hw_configpcipowersave(ah, true);
830
831 spin_unlock_bh(&sc->sc_pcu_lock);
832
833 ath9k_ps_restore(sc);
834
835 set_bit(SC_OP_INVALID, &sc->sc_flags);
836 sc->ps_idle = prev_idle;
837
838 mutex_unlock(&sc->mutex);
839
840 ath_dbg(common, CONFIG, "Driver halt\n");
841 }
842
843 bool ath9k_uses_beacons(int type)
844 {
845 switch (type) {
846 case NL80211_IFTYPE_AP:
847 case NL80211_IFTYPE_ADHOC:
848 case NL80211_IFTYPE_MESH_POINT:
849 return true;
850 default:
851 return false;
852 }
853 }
854
855 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
856 {
857 struct ath9k_vif_iter_data *iter_data = data;
858 int i;
859
860 if (iter_data->hw_macaddr)
861 for (i = 0; i < ETH_ALEN; i++)
862 iter_data->mask[i] &=
863 ~(iter_data->hw_macaddr[i] ^ mac[i]);
864
865 switch (vif->type) {
866 case NL80211_IFTYPE_AP:
867 iter_data->naps++;
868 break;
869 case NL80211_IFTYPE_STATION:
870 iter_data->nstations++;
871 break;
872 case NL80211_IFTYPE_ADHOC:
873 iter_data->nadhocs++;
874 break;
875 case NL80211_IFTYPE_MESH_POINT:
876 iter_data->nmeshes++;
877 break;
878 case NL80211_IFTYPE_WDS:
879 iter_data->nwds++;
880 break;
881 default:
882 break;
883 }
884 }
885
886 /* Called with sc->mutex held. */
887 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
888 struct ieee80211_vif *vif,
889 struct ath9k_vif_iter_data *iter_data)
890 {
891 struct ath_softc *sc = hw->priv;
892 struct ath_hw *ah = sc->sc_ah;
893 struct ath_common *common = ath9k_hw_common(ah);
894
895 /*
896 * Use the hardware MAC address as reference, the hardware uses it
897 * together with the BSSID mask when matching addresses.
898 */
899 memset(iter_data, 0, sizeof(*iter_data));
900 iter_data->hw_macaddr = common->macaddr;
901 memset(&iter_data->mask, 0xff, ETH_ALEN);
902
903 if (vif)
904 ath9k_vif_iter(iter_data, vif->addr, vif);
905
906 /* Get list of all active MAC addresses */
907 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
908 iter_data);
909 }
910
911 /* Called with sc->mutex held. */
912 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
913 struct ieee80211_vif *vif)
914 {
915 struct ath_softc *sc = hw->priv;
916 struct ath_hw *ah = sc->sc_ah;
917 struct ath_common *common = ath9k_hw_common(ah);
918 struct ath9k_vif_iter_data iter_data;
919
920 ath9k_calculate_iter_data(hw, vif, &iter_data);
921
922 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
923 ath_hw_setbssidmask(common);
924
925 if (iter_data.naps > 0) {
926 ath9k_hw_set_tsfadjust(ah, true);
927 set_bit(SC_OP_TSF_RESET, &sc->sc_flags);
928 ah->opmode = NL80211_IFTYPE_AP;
929 } else {
930 ath9k_hw_set_tsfadjust(ah, false);
931 clear_bit(SC_OP_TSF_RESET, &sc->sc_flags);
932
933 if (iter_data.nmeshes)
934 ah->opmode = NL80211_IFTYPE_MESH_POINT;
935 else if (iter_data.nwds)
936 ah->opmode = NL80211_IFTYPE_AP;
937 else if (iter_data.nadhocs)
938 ah->opmode = NL80211_IFTYPE_ADHOC;
939 else
940 ah->opmode = NL80211_IFTYPE_STATION;
941 }
942
943 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
944 ah->imask |= ATH9K_INT_TSFOOR;
945 else
946 ah->imask &= ~ATH9K_INT_TSFOOR;
947
948 ath9k_hw_set_interrupts(ah);
949
950 if (iter_data.naps > 0) {
951 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
952
953 if (!common->disable_ani) {
954 set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
955 ath_start_ani(common);
956 }
957
958 } else {
959 clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
960 del_timer_sync(&common->ani.timer);
961 }
962 }
963
964 static int ath9k_add_interface(struct ieee80211_hw *hw,
965 struct ieee80211_vif *vif)
966 {
967 struct ath_softc *sc = hw->priv;
968 struct ath_hw *ah = sc->sc_ah;
969 struct ath_common *common = ath9k_hw_common(ah);
970 int ret = 0;
971
972 ath9k_ps_wakeup(sc);
973 mutex_lock(&sc->mutex);
974
975 switch (vif->type) {
976 case NL80211_IFTYPE_STATION:
977 case NL80211_IFTYPE_WDS:
978 case NL80211_IFTYPE_ADHOC:
979 case NL80211_IFTYPE_AP:
980 case NL80211_IFTYPE_MESH_POINT:
981 break;
982 default:
983 ath_err(common, "Interface type %d not yet supported\n",
984 vif->type);
985 ret = -EOPNOTSUPP;
986 goto out;
987 }
988
989 if (ath9k_uses_beacons(vif->type)) {
990 if (sc->nbcnvifs >= ATH_BCBUF) {
991 ath_err(common, "Not enough beacon buffers when adding"
992 " new interface of type: %i\n",
993 vif->type);
994 ret = -ENOBUFS;
995 goto out;
996 }
997 }
998
999 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1000
1001 sc->nvifs++;
1002
1003 ath9k_calculate_summary_state(hw, vif);
1004 if (ath9k_uses_beacons(vif->type))
1005 ath9k_beacon_assign_slot(sc, vif);
1006
1007 out:
1008 mutex_unlock(&sc->mutex);
1009 ath9k_ps_restore(sc);
1010 return ret;
1011 }
1012
1013 static int ath9k_change_interface(struct ieee80211_hw *hw,
1014 struct ieee80211_vif *vif,
1015 enum nl80211_iftype new_type,
1016 bool p2p)
1017 {
1018 struct ath_softc *sc = hw->priv;
1019 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1020 int ret = 0;
1021
1022 ath_dbg(common, CONFIG, "Change Interface\n");
1023
1024 mutex_lock(&sc->mutex);
1025 ath9k_ps_wakeup(sc);
1026
1027 if (ath9k_uses_beacons(new_type) &&
1028 !ath9k_uses_beacons(vif->type)) {
1029 if (sc->nbcnvifs >= ATH_BCBUF) {
1030 ath_err(common, "No beacon slot available\n");
1031 ret = -ENOBUFS;
1032 goto out;
1033 }
1034 }
1035
1036 if (ath9k_uses_beacons(vif->type))
1037 ath9k_beacon_remove_slot(sc, vif);
1038
1039 vif->type = new_type;
1040 vif->p2p = p2p;
1041
1042 ath9k_calculate_summary_state(hw, vif);
1043 if (ath9k_uses_beacons(vif->type))
1044 ath9k_beacon_assign_slot(sc, vif);
1045
1046 out:
1047 ath9k_ps_restore(sc);
1048 mutex_unlock(&sc->mutex);
1049 return ret;
1050 }
1051
1052 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1053 struct ieee80211_vif *vif)
1054 {
1055 struct ath_softc *sc = hw->priv;
1056 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1057
1058 ath_dbg(common, CONFIG, "Detach Interface\n");
1059
1060 ath9k_ps_wakeup(sc);
1061 mutex_lock(&sc->mutex);
1062
1063 sc->nvifs--;
1064
1065 if (ath9k_uses_beacons(vif->type))
1066 ath9k_beacon_remove_slot(sc, vif);
1067
1068 ath9k_calculate_summary_state(hw, NULL);
1069
1070 mutex_unlock(&sc->mutex);
1071 ath9k_ps_restore(sc);
1072 }
1073
1074 static void ath9k_enable_ps(struct ath_softc *sc)
1075 {
1076 struct ath_hw *ah = sc->sc_ah;
1077 struct ath_common *common = ath9k_hw_common(ah);
1078
1079 sc->ps_enabled = true;
1080 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1081 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1082 ah->imask |= ATH9K_INT_TIM_TIMER;
1083 ath9k_hw_set_interrupts(ah);
1084 }
1085 ath9k_hw_setrxabort(ah, 1);
1086 }
1087 ath_dbg(common, PS, "PowerSave enabled\n");
1088 }
1089
1090 static void ath9k_disable_ps(struct ath_softc *sc)
1091 {
1092 struct ath_hw *ah = sc->sc_ah;
1093 struct ath_common *common = ath9k_hw_common(ah);
1094
1095 sc->ps_enabled = false;
1096 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1097 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1098 ath9k_hw_setrxabort(ah, 0);
1099 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1100 PS_WAIT_FOR_CAB |
1101 PS_WAIT_FOR_PSPOLL_DATA |
1102 PS_WAIT_FOR_TX_ACK);
1103 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1104 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1105 ath9k_hw_set_interrupts(ah);
1106 }
1107 }
1108 ath_dbg(common, PS, "PowerSave disabled\n");
1109 }
1110
1111 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1112 {
1113 struct ath_softc *sc = hw->priv;
1114 struct ath_hw *ah = sc->sc_ah;
1115 struct ath_common *common = ath9k_hw_common(ah);
1116 struct ieee80211_conf *conf = &hw->conf;
1117 bool reset_channel = false;
1118
1119 ath9k_ps_wakeup(sc);
1120 mutex_lock(&sc->mutex);
1121
1122 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1123 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1124 if (sc->ps_idle) {
1125 ath_cancel_work(sc);
1126 ath9k_stop_btcoex(sc);
1127 } else {
1128 ath9k_start_btcoex(sc);
1129 /*
1130 * The chip needs a reset to properly wake up from
1131 * full sleep
1132 */
1133 reset_channel = ah->chip_fullsleep;
1134 }
1135 }
1136
1137 /*
1138 * We just prepare to enable PS. We have to wait until our AP has
1139 * ACK'd our null data frame to disable RX otherwise we'll ignore
1140 * those ACKs and end up retransmitting the same null data frames.
1141 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1142 */
1143 if (changed & IEEE80211_CONF_CHANGE_PS) {
1144 unsigned long flags;
1145 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1146 if (conf->flags & IEEE80211_CONF_PS)
1147 ath9k_enable_ps(sc);
1148 else
1149 ath9k_disable_ps(sc);
1150 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1151 }
1152
1153 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1154 if (conf->flags & IEEE80211_CONF_MONITOR) {
1155 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1156 sc->sc_ah->is_monitoring = true;
1157 } else {
1158 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1159 sc->sc_ah->is_monitoring = false;
1160 }
1161 }
1162
1163 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) {
1164 struct ieee80211_channel *curchan = hw->conf.channel;
1165 int pos = curchan->hw_value;
1166 int old_pos = -1;
1167 unsigned long flags;
1168
1169 if (ah->curchan)
1170 old_pos = ah->curchan - &ah->channels[0];
1171
1172 ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n",
1173 curchan->center_freq, conf->channel_type);
1174
1175 /* update survey stats for the old channel before switching */
1176 spin_lock_irqsave(&common->cc_lock, flags);
1177 ath_update_survey_stats(sc);
1178 spin_unlock_irqrestore(&common->cc_lock, flags);
1179
1180 /*
1181 * Preserve the current channel values, before updating
1182 * the same channel
1183 */
1184 if (ah->curchan && (old_pos == pos))
1185 ath9k_hw_getnf(ah, ah->curchan);
1186
1187 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1188 curchan, conf->channel_type);
1189
1190 /*
1191 * If the operating channel changes, change the survey in-use flags
1192 * along with it.
1193 * Reset the survey data for the new channel, unless we're switching
1194 * back to the operating channel from an off-channel operation.
1195 */
1196 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1197 sc->cur_survey != &sc->survey[pos]) {
1198
1199 if (sc->cur_survey)
1200 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1201
1202 sc->cur_survey = &sc->survey[pos];
1203
1204 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1205 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1206 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1207 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1208 }
1209
1210 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1211 ath_err(common, "Unable to set channel\n");
1212 mutex_unlock(&sc->mutex);
1213 ath9k_ps_restore(sc);
1214 return -EINVAL;
1215 }
1216
1217 /*
1218 * The most recent snapshot of channel->noisefloor for the old
1219 * channel is only available after the hardware reset. Copy it to
1220 * the survey stats now.
1221 */
1222 if (old_pos >= 0)
1223 ath_update_survey_nf(sc, old_pos);
1224 }
1225
1226 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1227 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1228 sc->config.txpowlimit = 2 * conf->power_level;
1229 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1230 sc->config.txpowlimit, &sc->curtxpow);
1231 }
1232
1233 mutex_unlock(&sc->mutex);
1234 ath9k_ps_restore(sc);
1235
1236 return 0;
1237 }
1238
1239 #define SUPPORTED_FILTERS \
1240 (FIF_PROMISC_IN_BSS | \
1241 FIF_ALLMULTI | \
1242 FIF_CONTROL | \
1243 FIF_PSPOLL | \
1244 FIF_OTHER_BSS | \
1245 FIF_BCN_PRBRESP_PROMISC | \
1246 FIF_PROBE_REQ | \
1247 FIF_FCSFAIL)
1248
1249 /* FIXME: sc->sc_full_reset ? */
1250 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1251 unsigned int changed_flags,
1252 unsigned int *total_flags,
1253 u64 multicast)
1254 {
1255 struct ath_softc *sc = hw->priv;
1256 u32 rfilt;
1257
1258 changed_flags &= SUPPORTED_FILTERS;
1259 *total_flags &= SUPPORTED_FILTERS;
1260
1261 sc->rx.rxfilter = *total_flags;
1262 ath9k_ps_wakeup(sc);
1263 rfilt = ath_calcrxfilter(sc);
1264 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1265 ath9k_ps_restore(sc);
1266
1267 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1268 rfilt);
1269 }
1270
1271 static int ath9k_sta_add(struct ieee80211_hw *hw,
1272 struct ieee80211_vif *vif,
1273 struct ieee80211_sta *sta)
1274 {
1275 struct ath_softc *sc = hw->priv;
1276 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1277 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1278 struct ieee80211_key_conf ps_key = { };
1279
1280 ath_node_attach(sc, sta, vif);
1281
1282 if (vif->type != NL80211_IFTYPE_AP &&
1283 vif->type != NL80211_IFTYPE_AP_VLAN)
1284 return 0;
1285
1286 an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1287
1288 return 0;
1289 }
1290
1291 static void ath9k_del_ps_key(struct ath_softc *sc,
1292 struct ieee80211_vif *vif,
1293 struct ieee80211_sta *sta)
1294 {
1295 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1296 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1297 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1298
1299 if (!an->ps_key)
1300 return;
1301
1302 ath_key_delete(common, &ps_key);
1303 }
1304
1305 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1306 struct ieee80211_vif *vif,
1307 struct ieee80211_sta *sta)
1308 {
1309 struct ath_softc *sc = hw->priv;
1310
1311 ath9k_del_ps_key(sc, vif, sta);
1312 ath_node_detach(sc, sta);
1313
1314 return 0;
1315 }
1316
1317 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1318 struct ieee80211_vif *vif,
1319 enum sta_notify_cmd cmd,
1320 struct ieee80211_sta *sta)
1321 {
1322 struct ath_softc *sc = hw->priv;
1323 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1324
1325 if (!sta->ht_cap.ht_supported)
1326 return;
1327
1328 switch (cmd) {
1329 case STA_NOTIFY_SLEEP:
1330 an->sleeping = true;
1331 ath_tx_aggr_sleep(sta, sc, an);
1332 break;
1333 case STA_NOTIFY_AWAKE:
1334 an->sleeping = false;
1335 ath_tx_aggr_wakeup(sc, an);
1336 break;
1337 }
1338 }
1339
1340 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1341 struct ieee80211_vif *vif, u16 queue,
1342 const struct ieee80211_tx_queue_params *params)
1343 {
1344 struct ath_softc *sc = hw->priv;
1345 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1346 struct ath_txq *txq;
1347 struct ath9k_tx_queue_info qi;
1348 int ret = 0;
1349
1350 if (queue >= WME_NUM_AC)
1351 return 0;
1352
1353 txq = sc->tx.txq_map[queue];
1354
1355 ath9k_ps_wakeup(sc);
1356 mutex_lock(&sc->mutex);
1357
1358 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1359
1360 qi.tqi_aifs = params->aifs;
1361 qi.tqi_cwmin = params->cw_min;
1362 qi.tqi_cwmax = params->cw_max;
1363 qi.tqi_burstTime = params->txop * 32;
1364
1365 ath_dbg(common, CONFIG,
1366 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1367 queue, txq->axq_qnum, params->aifs, params->cw_min,
1368 params->cw_max, params->txop);
1369
1370 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1371 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1372 if (ret)
1373 ath_err(common, "TXQ Update failed\n");
1374
1375 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1376 if (queue == WME_AC_BE && !ret)
1377 ath_beaconq_config(sc);
1378
1379 mutex_unlock(&sc->mutex);
1380 ath9k_ps_restore(sc);
1381
1382 return ret;
1383 }
1384
1385 static int ath9k_set_key(struct ieee80211_hw *hw,
1386 enum set_key_cmd cmd,
1387 struct ieee80211_vif *vif,
1388 struct ieee80211_sta *sta,
1389 struct ieee80211_key_conf *key)
1390 {
1391 struct ath_softc *sc = hw->priv;
1392 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1393 int ret = 0;
1394
1395 if (ath9k_modparam_nohwcrypt)
1396 return -ENOSPC;
1397
1398 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1399 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1400 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1401 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1402 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1403 /*
1404 * For now, disable hw crypto for the RSN IBSS group keys. This
1405 * could be optimized in the future to use a modified key cache
1406 * design to support per-STA RX GTK, but until that gets
1407 * implemented, use of software crypto for group addressed
1408 * frames is a acceptable to allow RSN IBSS to be used.
1409 */
1410 return -EOPNOTSUPP;
1411 }
1412
1413 mutex_lock(&sc->mutex);
1414 ath9k_ps_wakeup(sc);
1415 ath_dbg(common, CONFIG, "Set HW Key\n");
1416
1417 switch (cmd) {
1418 case SET_KEY:
1419 if (sta)
1420 ath9k_del_ps_key(sc, vif, sta);
1421
1422 ret = ath_key_config(common, vif, sta, key);
1423 if (ret >= 0) {
1424 key->hw_key_idx = ret;
1425 /* push IV and Michael MIC generation to stack */
1426 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1427 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1428 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1429 if (sc->sc_ah->sw_mgmt_crypto &&
1430 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1431 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1432 ret = 0;
1433 }
1434 break;
1435 case DISABLE_KEY:
1436 ath_key_delete(common, key);
1437 break;
1438 default:
1439 ret = -EINVAL;
1440 }
1441
1442 ath9k_ps_restore(sc);
1443 mutex_unlock(&sc->mutex);
1444
1445 return ret;
1446 }
1447 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1448 {
1449 struct ath_softc *sc = data;
1450 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1451 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1452 struct ath_vif *avp = (void *)vif->drv_priv;
1453 unsigned long flags;
1454 /*
1455 * Skip iteration if primary station vif's bss info
1456 * was not changed
1457 */
1458 if (test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
1459 return;
1460
1461 if (bss_conf->assoc) {
1462 set_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
1463 avp->primary_sta_vif = true;
1464 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1465 common->curaid = bss_conf->aid;
1466 ath9k_hw_write_associd(sc->sc_ah);
1467 ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
1468 bss_conf->aid, common->curbssid);
1469 ath_beacon_config(sc, vif);
1470 /*
1471 * Request a re-configuration of Beacon related timers
1472 * on the receipt of the first Beacon frame (i.e.,
1473 * after time sync with the AP).
1474 */
1475 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1476 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1477 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1478
1479 /* Reset rssi stats */
1480 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1481 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1482
1483 ath_start_rx_poll(sc, 3);
1484
1485 if (!common->disable_ani) {
1486 set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
1487 ath_start_ani(common);
1488 }
1489
1490 }
1491 }
1492
1493 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
1494 {
1495 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1496 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1497 struct ath_vif *avp = (void *)vif->drv_priv;
1498
1499 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1500 return;
1501
1502 /* Reconfigure bss info */
1503 if (avp->primary_sta_vif && !bss_conf->assoc) {
1504 ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n",
1505 common->curaid, common->curbssid);
1506 clear_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
1507 clear_bit(SC_OP_BEACONS, &sc->sc_flags);
1508 avp->primary_sta_vif = false;
1509 memset(common->curbssid, 0, ETH_ALEN);
1510 common->curaid = 0;
1511 }
1512
1513 ieee80211_iterate_active_interfaces_atomic(
1514 sc->hw, ath9k_bss_iter, sc);
1515
1516 /*
1517 * None of station vifs are associated.
1518 * Clear bssid & aid
1519 */
1520 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
1521 ath9k_hw_write_associd(sc->sc_ah);
1522 clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
1523 del_timer_sync(&common->ani.timer);
1524 del_timer_sync(&sc->rx_poll_timer);
1525 memset(&sc->caldata, 0, sizeof(sc->caldata));
1526 }
1527 }
1528
1529 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1530 struct ieee80211_vif *vif,
1531 struct ieee80211_bss_conf *bss_conf,
1532 u32 changed)
1533 {
1534 struct ath_softc *sc = hw->priv;
1535 struct ath_hw *ah = sc->sc_ah;
1536 struct ath_common *common = ath9k_hw_common(ah);
1537 struct ath_vif *avp = (void *)vif->drv_priv;
1538 int slottime;
1539
1540 ath9k_ps_wakeup(sc);
1541 mutex_lock(&sc->mutex);
1542
1543 if (changed & BSS_CHANGED_ASSOC) {
1544 ath9k_config_bss(sc, vif);
1545
1546 ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
1547 common->curbssid, common->curaid);
1548 }
1549
1550 if (changed & BSS_CHANGED_IBSS) {
1551 /* There can be only one vif available */
1552 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1553 common->curaid = bss_conf->aid;
1554 ath9k_hw_write_associd(sc->sc_ah);
1555
1556 if (bss_conf->ibss_joined) {
1557 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1558
1559 if (!common->disable_ani) {
1560 set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
1561 ath_start_ani(common);
1562 }
1563
1564 } else {
1565 clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
1566 del_timer_sync(&common->ani.timer);
1567 del_timer_sync(&sc->rx_poll_timer);
1568 }
1569 }
1570
1571 /*
1572 * In case of AP mode, the HW TSF has to be reset
1573 * when the beacon interval changes.
1574 */
1575 if ((changed & BSS_CHANGED_BEACON_INT) &&
1576 (vif->type == NL80211_IFTYPE_AP))
1577 set_bit(SC_OP_TSF_RESET, &sc->sc_flags);
1578
1579 /* Configure beaconing (AP, IBSS, MESH) */
1580 if (ath9k_uses_beacons(vif->type) &&
1581 ((changed & BSS_CHANGED_BEACON) ||
1582 (changed & BSS_CHANGED_BEACON_ENABLED) ||
1583 (changed & BSS_CHANGED_BEACON_INT))) {
1584 ath9k_set_beaconing_status(sc, false);
1585 if (!bss_conf->enable_beacon)
1586 avp->is_bslot_active = false;
1587 ath_beacon_config(sc, vif);
1588 ath9k_set_beaconing_status(sc, true);
1589 }
1590
1591 if (changed & BSS_CHANGED_ERP_SLOT) {
1592 if (bss_conf->use_short_slot)
1593 slottime = 9;
1594 else
1595 slottime = 20;
1596 if (vif->type == NL80211_IFTYPE_AP) {
1597 /*
1598 * Defer update, so that connected stations can adjust
1599 * their settings at the same time.
1600 * See beacon.c for more details
1601 */
1602 sc->beacon.slottime = slottime;
1603 sc->beacon.updateslot = UPDATE;
1604 } else {
1605 ah->slottime = slottime;
1606 ath9k_hw_init_global_settings(ah);
1607 }
1608 }
1609
1610 mutex_unlock(&sc->mutex);
1611 ath9k_ps_restore(sc);
1612 }
1613
1614 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1615 {
1616 struct ath_softc *sc = hw->priv;
1617 u64 tsf;
1618
1619 mutex_lock(&sc->mutex);
1620 ath9k_ps_wakeup(sc);
1621 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1622 ath9k_ps_restore(sc);
1623 mutex_unlock(&sc->mutex);
1624
1625 return tsf;
1626 }
1627
1628 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1629 struct ieee80211_vif *vif,
1630 u64 tsf)
1631 {
1632 struct ath_softc *sc = hw->priv;
1633
1634 mutex_lock(&sc->mutex);
1635 ath9k_ps_wakeup(sc);
1636 ath9k_hw_settsf64(sc->sc_ah, tsf);
1637 ath9k_ps_restore(sc);
1638 mutex_unlock(&sc->mutex);
1639 }
1640
1641 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1642 {
1643 struct ath_softc *sc = hw->priv;
1644
1645 mutex_lock(&sc->mutex);
1646
1647 ath9k_ps_wakeup(sc);
1648 ath9k_hw_reset_tsf(sc->sc_ah);
1649 ath9k_ps_restore(sc);
1650
1651 mutex_unlock(&sc->mutex);
1652 }
1653
1654 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1655 struct ieee80211_vif *vif,
1656 enum ieee80211_ampdu_mlme_action action,
1657 struct ieee80211_sta *sta,
1658 u16 tid, u16 *ssn, u8 buf_size)
1659 {
1660 struct ath_softc *sc = hw->priv;
1661 int ret = 0;
1662
1663 local_bh_disable();
1664
1665 switch (action) {
1666 case IEEE80211_AMPDU_RX_START:
1667 break;
1668 case IEEE80211_AMPDU_RX_STOP:
1669 break;
1670 case IEEE80211_AMPDU_TX_START:
1671 ath9k_ps_wakeup(sc);
1672 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1673 if (!ret)
1674 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1675 ath9k_ps_restore(sc);
1676 break;
1677 case IEEE80211_AMPDU_TX_STOP:
1678 ath9k_ps_wakeup(sc);
1679 ath_tx_aggr_stop(sc, sta, tid);
1680 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1681 ath9k_ps_restore(sc);
1682 break;
1683 case IEEE80211_AMPDU_TX_OPERATIONAL:
1684 ath9k_ps_wakeup(sc);
1685 ath_tx_aggr_resume(sc, sta, tid);
1686 ath9k_ps_restore(sc);
1687 break;
1688 default:
1689 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1690 }
1691
1692 local_bh_enable();
1693
1694 return ret;
1695 }
1696
1697 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1698 struct survey_info *survey)
1699 {
1700 struct ath_softc *sc = hw->priv;
1701 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1702 struct ieee80211_supported_band *sband;
1703 struct ieee80211_channel *chan;
1704 unsigned long flags;
1705 int pos;
1706
1707 spin_lock_irqsave(&common->cc_lock, flags);
1708 if (idx == 0)
1709 ath_update_survey_stats(sc);
1710
1711 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1712 if (sband && idx >= sband->n_channels) {
1713 idx -= sband->n_channels;
1714 sband = NULL;
1715 }
1716
1717 if (!sband)
1718 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1719
1720 if (!sband || idx >= sband->n_channels) {
1721 spin_unlock_irqrestore(&common->cc_lock, flags);
1722 return -ENOENT;
1723 }
1724
1725 chan = &sband->channels[idx];
1726 pos = chan->hw_value;
1727 memcpy(survey, &sc->survey[pos], sizeof(*survey));
1728 survey->channel = chan;
1729 spin_unlock_irqrestore(&common->cc_lock, flags);
1730
1731 return 0;
1732 }
1733
1734 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
1735 {
1736 struct ath_softc *sc = hw->priv;
1737 struct ath_hw *ah = sc->sc_ah;
1738
1739 mutex_lock(&sc->mutex);
1740 ah->coverage_class = coverage_class;
1741
1742 ath9k_ps_wakeup(sc);
1743 ath9k_hw_init_global_settings(ah);
1744 ath9k_ps_restore(sc);
1745
1746 mutex_unlock(&sc->mutex);
1747 }
1748
1749 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
1750 {
1751 struct ath_softc *sc = hw->priv;
1752 struct ath_hw *ah = sc->sc_ah;
1753 struct ath_common *common = ath9k_hw_common(ah);
1754 int timeout = 200; /* ms */
1755 int i, j;
1756 bool drain_txq;
1757
1758 mutex_lock(&sc->mutex);
1759 cancel_delayed_work_sync(&sc->tx_complete_work);
1760
1761 if (ah->ah_flags & AH_UNPLUGGED) {
1762 ath_dbg(common, ANY, "Device has been unplugged!\n");
1763 mutex_unlock(&sc->mutex);
1764 return;
1765 }
1766
1767 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
1768 ath_dbg(common, ANY, "Device not present\n");
1769 mutex_unlock(&sc->mutex);
1770 return;
1771 }
1772
1773 for (j = 0; j < timeout; j++) {
1774 bool npend = false;
1775
1776 if (j)
1777 usleep_range(1000, 2000);
1778
1779 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1780 if (!ATH_TXQ_SETUP(sc, i))
1781 continue;
1782
1783 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
1784
1785 if (npend)
1786 break;
1787 }
1788
1789 if (!npend)
1790 break;
1791 }
1792
1793 if (drop) {
1794 ath9k_ps_wakeup(sc);
1795 spin_lock_bh(&sc->sc_pcu_lock);
1796 drain_txq = ath_drain_all_txq(sc, false);
1797 spin_unlock_bh(&sc->sc_pcu_lock);
1798
1799 if (!drain_txq)
1800 ath_reset(sc, false);
1801
1802 ath9k_ps_restore(sc);
1803 ieee80211_wake_queues(hw);
1804 }
1805
1806 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
1807 mutex_unlock(&sc->mutex);
1808 }
1809
1810 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
1811 {
1812 struct ath_softc *sc = hw->priv;
1813 int i;
1814
1815 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1816 if (!ATH_TXQ_SETUP(sc, i))
1817 continue;
1818
1819 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
1820 return true;
1821 }
1822 return false;
1823 }
1824
1825 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
1826 {
1827 struct ath_softc *sc = hw->priv;
1828 struct ath_hw *ah = sc->sc_ah;
1829 struct ieee80211_vif *vif;
1830 struct ath_vif *avp;
1831 struct ath_buf *bf;
1832 struct ath_tx_status ts;
1833 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1834 int status;
1835
1836 vif = sc->beacon.bslot[0];
1837 if (!vif)
1838 return 0;
1839
1840 avp = (void *)vif->drv_priv;
1841 if (!avp->is_bslot_active)
1842 return 0;
1843
1844 if (!sc->beacon.tx_processed && !edma) {
1845 tasklet_disable(&sc->bcon_tasklet);
1846
1847 bf = avp->av_bcbuf;
1848 if (!bf || !bf->bf_mpdu)
1849 goto skip;
1850
1851 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
1852 if (status == -EINPROGRESS)
1853 goto skip;
1854
1855 sc->beacon.tx_processed = true;
1856 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
1857
1858 skip:
1859 tasklet_enable(&sc->bcon_tasklet);
1860 }
1861
1862 return sc->beacon.tx_last;
1863 }
1864
1865 static int ath9k_get_stats(struct ieee80211_hw *hw,
1866 struct ieee80211_low_level_stats *stats)
1867 {
1868 struct ath_softc *sc = hw->priv;
1869 struct ath_hw *ah = sc->sc_ah;
1870 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
1871
1872 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
1873 stats->dot11RTSFailureCount = mib_stats->rts_bad;
1874 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
1875 stats->dot11RTSSuccessCount = mib_stats->rts_good;
1876 return 0;
1877 }
1878
1879 static u32 fill_chainmask(u32 cap, u32 new)
1880 {
1881 u32 filled = 0;
1882 int i;
1883
1884 for (i = 0; cap && new; i++, cap >>= 1) {
1885 if (!(cap & BIT(0)))
1886 continue;
1887
1888 if (new & BIT(0))
1889 filled |= BIT(i);
1890
1891 new >>= 1;
1892 }
1893
1894 return filled;
1895 }
1896
1897 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
1898 {
1899 switch (val & 0x7) {
1900 case 0x1:
1901 case 0x3:
1902 case 0x7:
1903 return true;
1904 case 0x2:
1905 return (ah->caps.rx_chainmask == 1);
1906 default:
1907 return false;
1908 }
1909 }
1910
1911 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
1912 {
1913 struct ath_softc *sc = hw->priv;
1914 struct ath_hw *ah = sc->sc_ah;
1915
1916 if (ah->caps.rx_chainmask != 1)
1917 rx_ant |= tx_ant;
1918
1919 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
1920 return -EINVAL;
1921
1922 sc->ant_rx = rx_ant;
1923 sc->ant_tx = tx_ant;
1924
1925 if (ah->caps.rx_chainmask == 1)
1926 return 0;
1927
1928 /* AR9100 runs into calibration issues if not all rx chains are enabled */
1929 if (AR_SREV_9100(ah))
1930 ah->rxchainmask = 0x7;
1931 else
1932 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
1933
1934 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
1935 ath9k_reload_chainmask_settings(sc);
1936
1937 return 0;
1938 }
1939
1940 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
1941 {
1942 struct ath_softc *sc = hw->priv;
1943
1944 *tx_ant = sc->ant_tx;
1945 *rx_ant = sc->ant_rx;
1946 return 0;
1947 }
1948
1949 #ifdef CONFIG_ATH9K_DEBUGFS
1950
1951 /* Ethtool support for get-stats */
1952
1953 #define AMKSTR(nm) #nm "_BE", #nm "_BK", #nm "_VI", #nm "_VO"
1954 static const char ath9k_gstrings_stats[][ETH_GSTRING_LEN] = {
1955 "tx_pkts_nic",
1956 "tx_bytes_nic",
1957 "rx_pkts_nic",
1958 "rx_bytes_nic",
1959 AMKSTR(d_tx_pkts),
1960 AMKSTR(d_tx_bytes),
1961 AMKSTR(d_tx_mpdus_queued),
1962 AMKSTR(d_tx_mpdus_completed),
1963 AMKSTR(d_tx_mpdu_xretries),
1964 AMKSTR(d_tx_aggregates),
1965 AMKSTR(d_tx_ampdus_queued_hw),
1966 AMKSTR(d_tx_ampdus_queued_sw),
1967 AMKSTR(d_tx_ampdus_completed),
1968 AMKSTR(d_tx_ampdu_retries),
1969 AMKSTR(d_tx_ampdu_xretries),
1970 AMKSTR(d_tx_fifo_underrun),
1971 AMKSTR(d_tx_op_exceeded),
1972 AMKSTR(d_tx_timer_expiry),
1973 AMKSTR(d_tx_desc_cfg_err),
1974 AMKSTR(d_tx_data_underrun),
1975 AMKSTR(d_tx_delim_underrun),
1976
1977 "d_rx_decrypt_crc_err",
1978 "d_rx_phy_err",
1979 "d_rx_mic_err",
1980 "d_rx_pre_delim_crc_err",
1981 "d_rx_post_delim_crc_err",
1982 "d_rx_decrypt_busy_err",
1983
1984 "d_rx_phyerr_radar",
1985 "d_rx_phyerr_ofdm_timing",
1986 "d_rx_phyerr_cck_timing",
1987
1988 };
1989 #define ATH9K_SSTATS_LEN ARRAY_SIZE(ath9k_gstrings_stats)
1990
1991 static void ath9k_get_et_strings(struct ieee80211_hw *hw,
1992 struct ieee80211_vif *vif,
1993 u32 sset, u8 *data)
1994 {
1995 if (sset == ETH_SS_STATS)
1996 memcpy(data, *ath9k_gstrings_stats,
1997 sizeof(ath9k_gstrings_stats));
1998 }
1999
2000 static int ath9k_get_et_sset_count(struct ieee80211_hw *hw,
2001 struct ieee80211_vif *vif, int sset)
2002 {
2003 if (sset == ETH_SS_STATS)
2004 return ATH9K_SSTATS_LEN;
2005 return 0;
2006 }
2007
2008 #define PR_QNUM(_n) (sc->tx.txq_map[_n]->axq_qnum)
2009 #define AWDATA(elem) \
2010 do { \
2011 data[i++] = sc->debug.stats.txstats[PR_QNUM(WME_AC_BE)].elem; \
2012 data[i++] = sc->debug.stats.txstats[PR_QNUM(WME_AC_BK)].elem; \
2013 data[i++] = sc->debug.stats.txstats[PR_QNUM(WME_AC_VI)].elem; \
2014 data[i++] = sc->debug.stats.txstats[PR_QNUM(WME_AC_VO)].elem; \
2015 } while (0)
2016
2017 #define AWDATA_RX(elem) \
2018 do { \
2019 data[i++] = sc->debug.stats.rxstats.elem; \
2020 } while (0)
2021
2022 static void ath9k_get_et_stats(struct ieee80211_hw *hw,
2023 struct ieee80211_vif *vif,
2024 struct ethtool_stats *stats, u64 *data)
2025 {
2026 struct ath_softc *sc = hw->priv;
2027 int i = 0;
2028
2029 data[i++] = (sc->debug.stats.txstats[PR_QNUM(WME_AC_BE)].tx_pkts_all +
2030 sc->debug.stats.txstats[PR_QNUM(WME_AC_BK)].tx_pkts_all +
2031 sc->debug.stats.txstats[PR_QNUM(WME_AC_VI)].tx_pkts_all +
2032 sc->debug.stats.txstats[PR_QNUM(WME_AC_VO)].tx_pkts_all);
2033 data[i++] = (sc->debug.stats.txstats[PR_QNUM(WME_AC_BE)].tx_bytes_all +
2034 sc->debug.stats.txstats[PR_QNUM(WME_AC_BK)].tx_bytes_all +
2035 sc->debug.stats.txstats[PR_QNUM(WME_AC_VI)].tx_bytes_all +
2036 sc->debug.stats.txstats[PR_QNUM(WME_AC_VO)].tx_bytes_all);
2037 AWDATA_RX(rx_pkts_all);
2038 AWDATA_RX(rx_bytes_all);
2039
2040 AWDATA(tx_pkts_all);
2041 AWDATA(tx_bytes_all);
2042 AWDATA(queued);
2043 AWDATA(completed);
2044 AWDATA(xretries);
2045 AWDATA(a_aggr);
2046 AWDATA(a_queued_hw);
2047 AWDATA(a_queued_sw);
2048 AWDATA(a_completed);
2049 AWDATA(a_retries);
2050 AWDATA(a_xretries);
2051 AWDATA(fifo_underrun);
2052 AWDATA(xtxop);
2053 AWDATA(timer_exp);
2054 AWDATA(desc_cfg_err);
2055 AWDATA(data_underrun);
2056 AWDATA(delim_underrun);
2057
2058 AWDATA_RX(decrypt_crc_err);
2059 AWDATA_RX(phy_err);
2060 AWDATA_RX(mic_err);
2061 AWDATA_RX(pre_delim_crc_err);
2062 AWDATA_RX(post_delim_crc_err);
2063 AWDATA_RX(decrypt_busy_err);
2064
2065 AWDATA_RX(phy_err_stats[ATH9K_PHYERR_RADAR]);
2066 AWDATA_RX(phy_err_stats[ATH9K_PHYERR_OFDM_TIMING]);
2067 AWDATA_RX(phy_err_stats[ATH9K_PHYERR_CCK_TIMING]);
2068
2069 WARN_ON(i != ATH9K_SSTATS_LEN);
2070 }
2071
2072 /* End of ethtool get-stats functions */
2073
2074 #endif
2075
2076
2077 #ifdef CONFIG_PM_SLEEP
2078
2079 static void ath9k_wow_map_triggers(struct ath_softc *sc,
2080 struct cfg80211_wowlan *wowlan,
2081 u32 *wow_triggers)
2082 {
2083 if (wowlan->disconnect)
2084 *wow_triggers |= AH_WOW_LINK_CHANGE |
2085 AH_WOW_BEACON_MISS;
2086 if (wowlan->magic_pkt)
2087 *wow_triggers |= AH_WOW_MAGIC_PATTERN_EN;
2088
2089 if (wowlan->n_patterns)
2090 *wow_triggers |= AH_WOW_USER_PATTERN_EN;
2091
2092 sc->wow_enabled = *wow_triggers;
2093
2094 }
2095
2096 static void ath9k_wow_add_disassoc_deauth_pattern(struct ath_softc *sc)
2097 {
2098 struct ath_hw *ah = sc->sc_ah;
2099 struct ath_common *common = ath9k_hw_common(ah);
2100 struct ath9k_hw_capabilities *pcaps = &ah->caps;
2101 int pattern_count = 0;
2102 int i, byte_cnt;
2103 u8 dis_deauth_pattern[MAX_PATTERN_SIZE];
2104 u8 dis_deauth_mask[MAX_PATTERN_SIZE];
2105
2106 memset(dis_deauth_pattern, 0, MAX_PATTERN_SIZE);
2107 memset(dis_deauth_mask, 0, MAX_PATTERN_SIZE);
2108
2109 /*
2110 * Create Dissassociate / Deauthenticate packet filter
2111 *
2112 * 2 bytes 2 byte 6 bytes 6 bytes 6 bytes
2113 * +--------------+----------+---------+--------+--------+----
2114 * + Frame Control+ Duration + DA + SA + BSSID +
2115 * +--------------+----------+---------+--------+--------+----
2116 *
2117 * The above is the management frame format for disassociate/
2118 * deauthenticate pattern, from this we need to match the first byte
2119 * of 'Frame Control' and DA, SA, and BSSID fields
2120 * (skipping 2nd byte of FC and Duration feild.
2121 *
2122 * Disassociate pattern
2123 * --------------------
2124 * Frame control = 00 00 1010
2125 * DA, SA, BSSID = x:x:x:x:x:x
2126 * Pattern will be A0000000 | x:x:x:x:x:x | x:x:x:x:x:x
2127 * | x:x:x:x:x:x -- 22 bytes
2128 *
2129 * Deauthenticate pattern
2130 * ----------------------
2131 * Frame control = 00 00 1100
2132 * DA, SA, BSSID = x:x:x:x:x:x
2133 * Pattern will be C0000000 | x:x:x:x:x:x | x:x:x:x:x:x
2134 * | x:x:x:x:x:x -- 22 bytes
2135 */
2136
2137 /* Create Disassociate Pattern first */
2138
2139 byte_cnt = 0;
2140
2141 /* Fill out the mask with all FF's */
2142
2143 for (i = 0; i < MAX_PATTERN_MASK_SIZE; i++)
2144 dis_deauth_mask[i] = 0xff;
2145
2146 /* copy the first byte of frame control field */
2147 dis_deauth_pattern[byte_cnt] = 0xa0;
2148 byte_cnt++;
2149
2150 /* skip 2nd byte of frame control and Duration field */
2151 byte_cnt += 3;
2152
2153 /*
2154 * need not match the destination mac address, it can be a broadcast
2155 * mac address or an unicast to this station
2156 */
2157 byte_cnt += 6;
2158
2159 /* copy the source mac address */
2160 memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
2161
2162 byte_cnt += 6;
2163
2164 /* copy the bssid, its same as the source mac address */
2165
2166 memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
2167
2168 /* Create Disassociate pattern mask */
2169
2170 if (pcaps->hw_caps & ATH9K_HW_WOW_PATTERN_MATCH_EXACT) {
2171
2172 if (pcaps->hw_caps & ATH9K_HW_WOW_PATTERN_MATCH_DWORD) {
2173 /*
2174 * for AR9280, because of hardware limitation, the
2175 * first 4 bytes have to be matched for all patterns.
2176 * the mask for disassociation and de-auth pattern
2177 * matching need to enable the first 4 bytes.
2178 * also the duration field needs to be filled.
2179 */
2180 dis_deauth_mask[0] = 0xf0;
2181
2182 /*
2183 * fill in duration field
2184 FIXME: what is the exact value ?
2185 */
2186 dis_deauth_pattern[2] = 0xff;
2187 dis_deauth_pattern[3] = 0xff;
2188 } else {
2189 dis_deauth_mask[0] = 0xfe;
2190 }
2191
2192 dis_deauth_mask[1] = 0x03;
2193 dis_deauth_mask[2] = 0xc0;
2194 } else {
2195 dis_deauth_mask[0] = 0xef;
2196 dis_deauth_mask[1] = 0x3f;
2197 dis_deauth_mask[2] = 0x00;
2198 dis_deauth_mask[3] = 0xfc;
2199 }
2200
2201 ath_dbg(common, WOW, "Adding disassoc/deauth patterns for WoW\n");
2202
2203 ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
2204 pattern_count, byte_cnt);
2205
2206 pattern_count++;
2207 /*
2208 * for de-authenticate pattern, only the first byte of the frame
2209 * control field gets changed from 0xA0 to 0xC0
2210 */
2211 dis_deauth_pattern[0] = 0xC0;
2212
2213 ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
2214 pattern_count, byte_cnt);
2215
2216 }
2217
2218 static void ath9k_wow_add_pattern(struct ath_softc *sc,
2219 struct cfg80211_wowlan *wowlan)
2220 {
2221 struct ath_hw *ah = sc->sc_ah;
2222 struct ath9k_wow_pattern *wow_pattern = NULL;
2223 struct cfg80211_wowlan_trig_pkt_pattern *patterns = wowlan->patterns;
2224 int mask_len;
2225 s8 i = 0;
2226
2227 if (!wowlan->n_patterns)
2228 return;
2229
2230 /*
2231 * Add the new user configured patterns
2232 */
2233 for (i = 0; i < wowlan->n_patterns; i++) {
2234
2235 wow_pattern = kzalloc(sizeof(*wow_pattern), GFP_KERNEL);
2236
2237 if (!wow_pattern)
2238 return;
2239
2240 /*
2241 * TODO: convert the generic user space pattern to
2242 * appropriate chip specific/802.11 pattern.
2243 */
2244
2245 mask_len = DIV_ROUND_UP(wowlan->patterns[i].pattern_len, 8);
2246 memset(wow_pattern->pattern_bytes, 0, MAX_PATTERN_SIZE);
2247 memset(wow_pattern->mask_bytes, 0, MAX_PATTERN_SIZE);
2248 memcpy(wow_pattern->pattern_bytes, patterns[i].pattern,
2249 patterns[i].pattern_len);
2250 memcpy(wow_pattern->mask_bytes, patterns[i].mask, mask_len);
2251 wow_pattern->pattern_len = patterns[i].pattern_len;
2252
2253 /*
2254 * just need to take care of deauth and disssoc pattern,
2255 * make sure we don't overwrite them.
2256 */
2257
2258 ath9k_hw_wow_apply_pattern(ah, wow_pattern->pattern_bytes,
2259 wow_pattern->mask_bytes,
2260 i + 2,
2261 wow_pattern->pattern_len);
2262 kfree(wow_pattern);
2263
2264 }
2265
2266 }
2267
2268 static int ath9k_suspend(struct ieee80211_hw *hw,
2269 struct cfg80211_wowlan *wowlan)
2270 {
2271 struct ath_softc *sc = hw->priv;
2272 struct ath_hw *ah = sc->sc_ah;
2273 struct ath_common *common = ath9k_hw_common(ah);
2274 u32 wow_triggers_enabled = 0;
2275 int ret = 0;
2276
2277 mutex_lock(&sc->mutex);
2278
2279 ath_cancel_work(sc);
2280 del_timer_sync(&common->ani.timer);
2281 del_timer_sync(&sc->rx_poll_timer);
2282
2283 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
2284 ath_dbg(common, ANY, "Device not present\n");
2285 ret = -EINVAL;
2286 goto fail_wow;
2287 }
2288
2289 if (WARN_ON(!wowlan)) {
2290 ath_dbg(common, WOW, "None of the WoW triggers enabled\n");
2291 ret = -EINVAL;
2292 goto fail_wow;
2293 }
2294
2295 if (!device_can_wakeup(sc->dev)) {
2296 ath_dbg(common, WOW, "device_can_wakeup failed, WoW is not enabled\n");
2297 ret = 1;
2298 goto fail_wow;
2299 }
2300
2301 /*
2302 * none of the sta vifs are associated
2303 * and we are not currently handling multivif
2304 * cases, for instance we have to seperately
2305 * configure 'keep alive frame' for each
2306 * STA.
2307 */
2308
2309 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
2310 ath_dbg(common, WOW, "None of the STA vifs are associated\n");
2311 ret = 1;
2312 goto fail_wow;
2313 }
2314
2315 if (sc->nvifs > 1) {
2316 ath_dbg(common, WOW, "WoW for multivif is not yet supported\n");
2317 ret = 1;
2318 goto fail_wow;
2319 }
2320
2321 ath9k_wow_map_triggers(sc, wowlan, &wow_triggers_enabled);
2322
2323 ath_dbg(common, WOW, "WoW triggers enabled 0x%x\n",
2324 wow_triggers_enabled);
2325
2326 ath9k_ps_wakeup(sc);
2327
2328 ath9k_stop_btcoex(sc);
2329
2330 /*
2331 * Enable wake up on recieving disassoc/deauth
2332 * frame by default.
2333 */
2334 ath9k_wow_add_disassoc_deauth_pattern(sc);
2335
2336 if (wow_triggers_enabled & AH_WOW_USER_PATTERN_EN)
2337 ath9k_wow_add_pattern(sc, wowlan);
2338
2339 spin_lock_bh(&sc->sc_pcu_lock);
2340 /*
2341 * To avoid false wake, we enable beacon miss interrupt only
2342 * when we go to sleep. We save the current interrupt mask
2343 * so we can restore it after the system wakes up
2344 */
2345 sc->wow_intr_before_sleep = ah->imask;
2346 ah->imask &= ~ATH9K_INT_GLOBAL;
2347 ath9k_hw_disable_interrupts(ah);
2348 ah->imask = ATH9K_INT_BMISS | ATH9K_INT_GLOBAL;
2349 ath9k_hw_set_interrupts(ah);
2350 ath9k_hw_enable_interrupts(ah);
2351
2352 spin_unlock_bh(&sc->sc_pcu_lock);
2353
2354 /*
2355 * we can now sync irq and kill any running tasklets, since we already
2356 * disabled interrupts and not holding a spin lock
2357 */
2358 synchronize_irq(sc->irq);
2359 tasklet_kill(&sc->intr_tq);
2360
2361 ath9k_hw_wow_enable(ah, wow_triggers_enabled);
2362
2363 ath9k_ps_restore(sc);
2364 ath_dbg(common, ANY, "WoW enabled in ath9k\n");
2365 atomic_inc(&sc->wow_sleep_proc_intr);
2366
2367 fail_wow:
2368 mutex_unlock(&sc->mutex);
2369 return ret;
2370 }
2371
2372 static int ath9k_resume(struct ieee80211_hw *hw)
2373 {
2374 struct ath_softc *sc = hw->priv;
2375 struct ath_hw *ah = sc->sc_ah;
2376 struct ath_common *common = ath9k_hw_common(ah);
2377 u32 wow_status;
2378
2379 mutex_lock(&sc->mutex);
2380
2381 ath9k_ps_wakeup(sc);
2382
2383 spin_lock_bh(&sc->sc_pcu_lock);
2384
2385 ath9k_hw_disable_interrupts(ah);
2386 ah->imask = sc->wow_intr_before_sleep;
2387 ath9k_hw_set_interrupts(ah);
2388 ath9k_hw_enable_interrupts(ah);
2389
2390 spin_unlock_bh(&sc->sc_pcu_lock);
2391
2392 wow_status = ath9k_hw_wow_wakeup(ah);
2393
2394 if (atomic_read(&sc->wow_got_bmiss_intr) == 0) {
2395 /*
2396 * some devices may not pick beacon miss
2397 * as the reason they woke up so we add
2398 * that here for that shortcoming.
2399 */
2400 wow_status |= AH_WOW_BEACON_MISS;
2401 atomic_dec(&sc->wow_got_bmiss_intr);
2402 ath_dbg(common, ANY, "Beacon miss interrupt picked up during WoW sleep\n");
2403 }
2404
2405 atomic_dec(&sc->wow_sleep_proc_intr);
2406
2407 if (wow_status) {
2408 ath_dbg(common, ANY, "Waking up due to WoW triggers %s with WoW status = %x\n",
2409 ath9k_hw_wow_event_to_string(wow_status), wow_status);
2410 }
2411
2412 ath_restart_work(sc);
2413 ath9k_start_btcoex(sc);
2414
2415 ath9k_ps_restore(sc);
2416 mutex_unlock(&sc->mutex);
2417
2418 return 0;
2419 }
2420
2421 static void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
2422 {
2423 struct ath_softc *sc = hw->priv;
2424
2425 mutex_lock(&sc->mutex);
2426 device_init_wakeup(sc->dev, 1);
2427 device_set_wakeup_enable(sc->dev, enabled);
2428 mutex_unlock(&sc->mutex);
2429 }
2430
2431 #endif
2432
2433 struct ieee80211_ops ath9k_ops = {
2434 .tx = ath9k_tx,
2435 .start = ath9k_start,
2436 .stop = ath9k_stop,
2437 .add_interface = ath9k_add_interface,
2438 .change_interface = ath9k_change_interface,
2439 .remove_interface = ath9k_remove_interface,
2440 .config = ath9k_config,
2441 .configure_filter = ath9k_configure_filter,
2442 .sta_add = ath9k_sta_add,
2443 .sta_remove = ath9k_sta_remove,
2444 .sta_notify = ath9k_sta_notify,
2445 .conf_tx = ath9k_conf_tx,
2446 .bss_info_changed = ath9k_bss_info_changed,
2447 .set_key = ath9k_set_key,
2448 .get_tsf = ath9k_get_tsf,
2449 .set_tsf = ath9k_set_tsf,
2450 .reset_tsf = ath9k_reset_tsf,
2451 .ampdu_action = ath9k_ampdu_action,
2452 .get_survey = ath9k_get_survey,
2453 .rfkill_poll = ath9k_rfkill_poll_state,
2454 .set_coverage_class = ath9k_set_coverage_class,
2455 .flush = ath9k_flush,
2456 .tx_frames_pending = ath9k_tx_frames_pending,
2457 .tx_last_beacon = ath9k_tx_last_beacon,
2458 .get_stats = ath9k_get_stats,
2459 .set_antenna = ath9k_set_antenna,
2460 .get_antenna = ath9k_get_antenna,
2461
2462 #ifdef CONFIG_PM_SLEEP
2463 .suspend = ath9k_suspend,
2464 .resume = ath9k_resume,
2465 .set_wakeup = ath9k_set_wakeup,
2466 #endif
2467
2468 #ifdef CONFIG_ATH9K_DEBUGFS
2469 .get_et_sset_count = ath9k_get_et_sset_count,
2470 .get_et_stats = ath9k_get_et_stats,
2471 .get_et_strings = ath9k_get_et_strings,
2472 #endif
2473 };
Linux kernel - Deliverables
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