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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
[deliverable/linux.git] / drivers / net / wireless / ath / ath9k / main.c
1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
19 #include "ath9k.h"
20 #include "btcoex.h"
21
22 static u8 parse_mpdudensity(u8 mpdudensity)
23 {
24 /*
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
27 * 1 for 1/4 us
28 * 2 for 1/2 us
29 * 3 for 1 us
30 * 4 for 2 us
31 * 5 for 4 us
32 * 6 for 8 us
33 * 7 for 16 us
34 */
35 switch (mpdudensity) {
36 case 0:
37 return 0;
38 case 1:
39 case 2:
40 case 3:
41 /* Our lower layer calculations limit our precision to
42 1 microsecond */
43 return 1;
44 case 4:
45 return 2;
46 case 5:
47 return 4;
48 case 6:
49 return 8;
50 case 7:
51 return 16;
52 default:
53 return 0;
54 }
55 }
56
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
58 {
59 bool pending = false;
60
61 spin_lock_bh(&txq->axq_lock);
62
63 if (txq->axq_depth || !list_empty(&txq->axq_acq))
64 pending = true;
65
66 spin_unlock_bh(&txq->axq_lock);
67 return pending;
68 }
69
70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
71 {
72 unsigned long flags;
73 bool ret;
74
75 spin_lock_irqsave(&sc->sc_pm_lock, flags);
76 ret = ath9k_hw_setpower(sc->sc_ah, mode);
77 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
78
79 return ret;
80 }
81
82 void ath9k_ps_wakeup(struct ath_softc *sc)
83 {
84 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
85 unsigned long flags;
86 enum ath9k_power_mode power_mode;
87
88 spin_lock_irqsave(&sc->sc_pm_lock, flags);
89 if (++sc->ps_usecount != 1)
90 goto unlock;
91
92 power_mode = sc->sc_ah->power_mode;
93 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
94
95 /*
96 * While the hardware is asleep, the cycle counters contain no
97 * useful data. Better clear them now so that they don't mess up
98 * survey data results.
99 */
100 if (power_mode != ATH9K_PM_AWAKE) {
101 spin_lock(&common->cc_lock);
102 ath_hw_cycle_counters_update(common);
103 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
104 spin_unlock(&common->cc_lock);
105 }
106
107 unlock:
108 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
109 }
110
111 void ath9k_ps_restore(struct ath_softc *sc)
112 {
113 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
114 enum ath9k_power_mode mode;
115 unsigned long flags;
116
117 spin_lock_irqsave(&sc->sc_pm_lock, flags);
118 if (--sc->ps_usecount != 0)
119 goto unlock;
120
121 if (sc->ps_idle && (sc->ps_flags & PS_WAIT_FOR_TX_ACK))
122 mode = ATH9K_PM_FULL_SLEEP;
123 else if (sc->ps_enabled &&
124 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
125 PS_WAIT_FOR_CAB |
126 PS_WAIT_FOR_PSPOLL_DATA |
127 PS_WAIT_FOR_TX_ACK)))
128 mode = ATH9K_PM_NETWORK_SLEEP;
129 else
130 goto unlock;
131
132 spin_lock(&common->cc_lock);
133 ath_hw_cycle_counters_update(common);
134 spin_unlock(&common->cc_lock);
135
136 ath9k_hw_setpower(sc->sc_ah, mode);
137
138 unlock:
139 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
140 }
141
142 void ath_start_ani(struct ath_common *common)
143 {
144 struct ath_hw *ah = common->ah;
145 unsigned long timestamp = jiffies_to_msecs(jiffies);
146 struct ath_softc *sc = (struct ath_softc *) common->priv;
147
148 if (!(sc->sc_flags & SC_OP_ANI_RUN))
149 return;
150
151 if (sc->sc_flags & SC_OP_OFFCHANNEL)
152 return;
153
154 common->ani.longcal_timer = timestamp;
155 common->ani.shortcal_timer = timestamp;
156 common->ani.checkani_timer = timestamp;
157
158 mod_timer(&common->ani.timer,
159 jiffies +
160 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
161 }
162
163 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
164 {
165 struct ath_hw *ah = sc->sc_ah;
166 struct ath9k_channel *chan = &ah->channels[channel];
167 struct survey_info *survey = &sc->survey[channel];
168
169 if (chan->noisefloor) {
170 survey->filled |= SURVEY_INFO_NOISE_DBM;
171 survey->noise = ath9k_hw_getchan_noise(ah, chan);
172 }
173 }
174
175 /*
176 * Updates the survey statistics and returns the busy time since last
177 * update in %, if the measurement duration was long enough for the
178 * result to be useful, -1 otherwise.
179 */
180 static int ath_update_survey_stats(struct ath_softc *sc)
181 {
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
188 int ret = 0;
189
190 if (!ah->curchan)
191 return -1;
192
193 if (ah->power_mode == ATH9K_PM_AWAKE)
194 ath_hw_cycle_counters_update(common);
195
196 if (cc->cycles > 0) {
197 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
198 SURVEY_INFO_CHANNEL_TIME_BUSY |
199 SURVEY_INFO_CHANNEL_TIME_RX |
200 SURVEY_INFO_CHANNEL_TIME_TX;
201 survey->channel_time += cc->cycles / div;
202 survey->channel_time_busy += cc->rx_busy / div;
203 survey->channel_time_rx += cc->rx_frame / div;
204 survey->channel_time_tx += cc->tx_frame / div;
205 }
206
207 if (cc->cycles < div)
208 return -1;
209
210 if (cc->cycles > 0)
211 ret = cc->rx_busy * 100 / cc->cycles;
212
213 memset(cc, 0, sizeof(*cc));
214
215 ath_update_survey_nf(sc, pos);
216
217 return ret;
218 }
219
220 static void __ath_cancel_work(struct ath_softc *sc)
221 {
222 cancel_work_sync(&sc->paprd_work);
223 cancel_work_sync(&sc->hw_check_work);
224 cancel_delayed_work_sync(&sc->tx_complete_work);
225 cancel_delayed_work_sync(&sc->hw_pll_work);
226 }
227
228 static void ath_cancel_work(struct ath_softc *sc)
229 {
230 __ath_cancel_work(sc);
231 cancel_work_sync(&sc->hw_reset_work);
232 }
233
234 static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
235 {
236 struct ath_hw *ah = sc->sc_ah;
237 struct ath_common *common = ath9k_hw_common(ah);
238 bool ret;
239
240 ieee80211_stop_queues(sc->hw);
241
242 sc->hw_busy_count = 0;
243 del_timer_sync(&common->ani.timer);
244
245 ath9k_debug_samp_bb_mac(sc);
246 ath9k_hw_disable_interrupts(ah);
247
248 ret = ath_drain_all_txq(sc, retry_tx);
249
250 if (!ath_stoprecv(sc))
251 ret = false;
252
253 if (!flush) {
254 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
255 ath_rx_tasklet(sc, 1, true);
256 ath_rx_tasklet(sc, 1, false);
257 } else {
258 ath_flushrecv(sc);
259 }
260
261 return ret;
262 }
263
264 static bool ath_complete_reset(struct ath_softc *sc, bool start)
265 {
266 struct ath_hw *ah = sc->sc_ah;
267 struct ath_common *common = ath9k_hw_common(ah);
268
269 if (ath_startrecv(sc) != 0) {
270 ath_err(common, "Unable to restart recv logic\n");
271 return false;
272 }
273
274 ath9k_cmn_update_txpow(ah, sc->curtxpow,
275 sc->config.txpowlimit, &sc->curtxpow);
276 ath9k_hw_set_interrupts(ah);
277 ath9k_hw_enable_interrupts(ah);
278
279 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
280 if (sc->sc_flags & SC_OP_BEACONS)
281 ath_set_beacon(sc);
282
283 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
284 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
285 if (!common->disable_ani)
286 ath_start_ani(common);
287 }
288
289 if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3) {
290 struct ath_hw_antcomb_conf div_ant_conf;
291 u8 lna_conf;
292
293 ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
294
295 if (sc->ant_rx == 1)
296 lna_conf = ATH_ANT_DIV_COMB_LNA1;
297 else
298 lna_conf = ATH_ANT_DIV_COMB_LNA2;
299 div_ant_conf.main_lna_conf = lna_conf;
300 div_ant_conf.alt_lna_conf = lna_conf;
301
302 ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
303 }
304
305 ieee80211_wake_queues(sc->hw);
306
307 return true;
308 }
309
310 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
311 bool retry_tx)
312 {
313 struct ath_hw *ah = sc->sc_ah;
314 struct ath_common *common = ath9k_hw_common(ah);
315 struct ath9k_hw_cal_data *caldata = NULL;
316 bool fastcc = true;
317 bool flush = false;
318 int r;
319
320 __ath_cancel_work(sc);
321
322 spin_lock_bh(&sc->sc_pcu_lock);
323
324 if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
325 fastcc = false;
326 caldata = &sc->caldata;
327 }
328
329 if (!hchan) {
330 fastcc = false;
331 flush = true;
332 hchan = ah->curchan;
333 }
334
335 if (fastcc && (ah->chip_fullsleep ||
336 !ath9k_hw_check_alive(ah)))
337 fastcc = false;
338
339 if (!ath_prepare_reset(sc, retry_tx, flush))
340 fastcc = false;
341
342 ath_dbg(common, ATH_DBG_CONFIG,
343 "Reset to %u MHz, HT40: %d fastcc: %d\n",
344 hchan->channel, !!(hchan->channelFlags & (CHANNEL_HT40MINUS |
345 CHANNEL_HT40PLUS)),
346 fastcc);
347
348 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
349 if (r) {
350 ath_err(common,
351 "Unable to reset channel, reset status %d\n", r);
352 goto out;
353 }
354
355 if (!ath_complete_reset(sc, true))
356 r = -EIO;
357
358 out:
359 spin_unlock_bh(&sc->sc_pcu_lock);
360 return r;
361 }
362
363
364 /*
365 * Set/change channels. If the channel is really being changed, it's done
366 * by reseting the chip. To accomplish this we must first cleanup any pending
367 * DMA, then restart stuff.
368 */
369 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
370 struct ath9k_channel *hchan)
371 {
372 int r;
373
374 if (sc->sc_flags & SC_OP_INVALID)
375 return -EIO;
376
377 ath9k_ps_wakeup(sc);
378
379 r = ath_reset_internal(sc, hchan, false);
380
381 ath9k_ps_restore(sc);
382
383 return r;
384 }
385
386 static void ath_paprd_activate(struct ath_softc *sc)
387 {
388 struct ath_hw *ah = sc->sc_ah;
389 struct ath9k_hw_cal_data *caldata = ah->caldata;
390 int chain;
391
392 if (!caldata || !caldata->paprd_done)
393 return;
394
395 ath9k_ps_wakeup(sc);
396 ar9003_paprd_enable(ah, false);
397 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
398 if (!(ah->txchainmask & BIT(chain)))
399 continue;
400
401 ar9003_paprd_populate_single_table(ah, caldata, chain);
402 }
403
404 ar9003_paprd_enable(ah, true);
405 ath9k_ps_restore(sc);
406 }
407
408 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
409 {
410 struct ieee80211_hw *hw = sc->hw;
411 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
412 struct ath_hw *ah = sc->sc_ah;
413 struct ath_common *common = ath9k_hw_common(ah);
414 struct ath_tx_control txctl;
415 int time_left;
416
417 memset(&txctl, 0, sizeof(txctl));
418 txctl.txq = sc->tx.txq_map[WME_AC_BE];
419
420 memset(tx_info, 0, sizeof(*tx_info));
421 tx_info->band = hw->conf.channel->band;
422 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
423 tx_info->control.rates[0].idx = 0;
424 tx_info->control.rates[0].count = 1;
425 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
426 tx_info->control.rates[1].idx = -1;
427
428 init_completion(&sc->paprd_complete);
429 txctl.paprd = BIT(chain);
430
431 if (ath_tx_start(hw, skb, &txctl) != 0) {
432 ath_dbg(common, ATH_DBG_CALIBRATE, "PAPRD TX failed\n");
433 dev_kfree_skb_any(skb);
434 return false;
435 }
436
437 time_left = wait_for_completion_timeout(&sc->paprd_complete,
438 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
439
440 if (!time_left)
441 ath_dbg(common, ATH_DBG_CALIBRATE,
442 "Timeout waiting for paprd training on TX chain %d\n",
443 chain);
444
445 return !!time_left;
446 }
447
448 void ath_paprd_calibrate(struct work_struct *work)
449 {
450 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
451 struct ieee80211_hw *hw = sc->hw;
452 struct ath_hw *ah = sc->sc_ah;
453 struct ieee80211_hdr *hdr;
454 struct sk_buff *skb = NULL;
455 struct ath9k_hw_cal_data *caldata = ah->caldata;
456 struct ath_common *common = ath9k_hw_common(ah);
457 int ftype;
458 int chain_ok = 0;
459 int chain;
460 int len = 1800;
461
462 if (!caldata)
463 return;
464
465 ath9k_ps_wakeup(sc);
466
467 if (ar9003_paprd_init_table(ah) < 0)
468 goto fail_paprd;
469
470 skb = alloc_skb(len, GFP_KERNEL);
471 if (!skb)
472 goto fail_paprd;
473
474 skb_put(skb, len);
475 memset(skb->data, 0, len);
476 hdr = (struct ieee80211_hdr *)skb->data;
477 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
478 hdr->frame_control = cpu_to_le16(ftype);
479 hdr->duration_id = cpu_to_le16(10);
480 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
481 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
482 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
483
484 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
485 if (!(ah->txchainmask & BIT(chain)))
486 continue;
487
488 chain_ok = 0;
489
490 ath_dbg(common, ATH_DBG_CALIBRATE,
491 "Sending PAPRD frame for thermal measurement "
492 "on chain %d\n", chain);
493 if (!ath_paprd_send_frame(sc, skb, chain))
494 goto fail_paprd;
495
496 ar9003_paprd_setup_gain_table(ah, chain);
497
498 ath_dbg(common, ATH_DBG_CALIBRATE,
499 "Sending PAPRD training frame on chain %d\n", chain);
500 if (!ath_paprd_send_frame(sc, skb, chain))
501 goto fail_paprd;
502
503 if (!ar9003_paprd_is_done(ah)) {
504 ath_dbg(common, ATH_DBG_CALIBRATE,
505 "PAPRD not yet done on chain %d\n", chain);
506 break;
507 }
508
509 if (ar9003_paprd_create_curve(ah, caldata, chain)) {
510 ath_dbg(common, ATH_DBG_CALIBRATE,
511 "PAPRD create curve failed on chain %d\n",
512 chain);
513 break;
514 }
515
516 chain_ok = 1;
517 }
518 kfree_skb(skb);
519
520 if (chain_ok) {
521 caldata->paprd_done = true;
522 ath_paprd_activate(sc);
523 }
524
525 fail_paprd:
526 ath9k_ps_restore(sc);
527 }
528
529 /*
530 * This routine performs the periodic noise floor calibration function
531 * that is used to adjust and optimize the chip performance. This
532 * takes environmental changes (location, temperature) into account.
533 * When the task is complete, it reschedules itself depending on the
534 * appropriate interval that was calculated.
535 */
536 void ath_ani_calibrate(unsigned long data)
537 {
538 struct ath_softc *sc = (struct ath_softc *)data;
539 struct ath_hw *ah = sc->sc_ah;
540 struct ath_common *common = ath9k_hw_common(ah);
541 bool longcal = false;
542 bool shortcal = false;
543 bool aniflag = false;
544 unsigned int timestamp = jiffies_to_msecs(jiffies);
545 u32 cal_interval, short_cal_interval, long_cal_interval;
546 unsigned long flags;
547
548 if (ah->caldata && ah->caldata->nfcal_interference)
549 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
550 else
551 long_cal_interval = ATH_LONG_CALINTERVAL;
552
553 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
554 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
555
556 /* Only calibrate if awake */
557 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
558 goto set_timer;
559
560 ath9k_ps_wakeup(sc);
561
562 /* Long calibration runs independently of short calibration. */
563 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
564 longcal = true;
565 common->ani.longcal_timer = timestamp;
566 }
567
568 /* Short calibration applies only while caldone is false */
569 if (!common->ani.caldone) {
570 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
571 shortcal = true;
572 common->ani.shortcal_timer = timestamp;
573 common->ani.resetcal_timer = timestamp;
574 }
575 } else {
576 if ((timestamp - common->ani.resetcal_timer) >=
577 ATH_RESTART_CALINTERVAL) {
578 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
579 if (common->ani.caldone)
580 common->ani.resetcal_timer = timestamp;
581 }
582 }
583
584 /* Verify whether we must check ANI */
585 if (sc->sc_ah->config.enable_ani
586 && (timestamp - common->ani.checkani_timer) >=
587 ah->config.ani_poll_interval) {
588 aniflag = true;
589 common->ani.checkani_timer = timestamp;
590 }
591
592 /* Call ANI routine if necessary */
593 if (aniflag) {
594 spin_lock_irqsave(&common->cc_lock, flags);
595 ath9k_hw_ani_monitor(ah, ah->curchan);
596 ath_update_survey_stats(sc);
597 spin_unlock_irqrestore(&common->cc_lock, flags);
598 }
599
600 /* Perform calibration if necessary */
601 if (longcal || shortcal) {
602 common->ani.caldone =
603 ath9k_hw_calibrate(ah, ah->curchan,
604 ah->rxchainmask, longcal);
605 }
606
607 ath_dbg(common, ATH_DBG_ANI,
608 "Calibration @%lu finished: %s %s %s, caldone: %s\n", jiffies,
609 longcal ? "long" : "", shortcal ? "short" : "",
610 aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
611
612 ath9k_ps_restore(sc);
613
614 set_timer:
615 /*
616 * Set timer interval based on previous results.
617 * The interval must be the shortest necessary to satisfy ANI,
618 * short calibration and long calibration.
619 */
620 ath9k_debug_samp_bb_mac(sc);
621 cal_interval = ATH_LONG_CALINTERVAL;
622 if (sc->sc_ah->config.enable_ani)
623 cal_interval = min(cal_interval,
624 (u32)ah->config.ani_poll_interval);
625 if (!common->ani.caldone)
626 cal_interval = min(cal_interval, (u32)short_cal_interval);
627
628 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
629 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
630 if (!ah->caldata->paprd_done)
631 ieee80211_queue_work(sc->hw, &sc->paprd_work);
632 else if (!ah->paprd_table_write_done)
633 ath_paprd_activate(sc);
634 }
635 }
636
637 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
638 struct ieee80211_vif *vif)
639 {
640 struct ath_node *an;
641 an = (struct ath_node *)sta->drv_priv;
642
643 #ifdef CONFIG_ATH9K_DEBUGFS
644 spin_lock(&sc->nodes_lock);
645 list_add(&an->list, &sc->nodes);
646 spin_unlock(&sc->nodes_lock);
647 an->sta = sta;
648 an->vif = vif;
649 #endif
650 if (sc->sc_flags & SC_OP_TXAGGR) {
651 ath_tx_node_init(sc, an);
652 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
653 sta->ht_cap.ampdu_factor);
654 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
655 }
656 }
657
658 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
659 {
660 struct ath_node *an = (struct ath_node *)sta->drv_priv;
661
662 #ifdef CONFIG_ATH9K_DEBUGFS
663 spin_lock(&sc->nodes_lock);
664 list_del(&an->list);
665 spin_unlock(&sc->nodes_lock);
666 an->sta = NULL;
667 #endif
668
669 if (sc->sc_flags & SC_OP_TXAGGR)
670 ath_tx_node_cleanup(sc, an);
671 }
672
673
674 void ath9k_tasklet(unsigned long data)
675 {
676 struct ath_softc *sc = (struct ath_softc *)data;
677 struct ath_hw *ah = sc->sc_ah;
678 struct ath_common *common = ath9k_hw_common(ah);
679
680 u32 status = sc->intrstatus;
681 u32 rxmask;
682
683 ath9k_ps_wakeup(sc);
684 spin_lock(&sc->sc_pcu_lock);
685
686 if ((status & ATH9K_INT_FATAL) ||
687 (status & ATH9K_INT_BB_WATCHDOG)) {
688 #ifdef CONFIG_ATH9K_DEBUGFS
689 enum ath_reset_type type;
690
691 if (status & ATH9K_INT_FATAL)
692 type = RESET_TYPE_FATAL_INT;
693 else
694 type = RESET_TYPE_BB_WATCHDOG;
695
696 RESET_STAT_INC(sc, type);
697 #endif
698 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
699 goto out;
700 }
701
702 /*
703 * Only run the baseband hang check if beacons stop working in AP or
704 * IBSS mode, because it has a high false positive rate. For station
705 * mode it should not be necessary, since the upper layers will detect
706 * this through a beacon miss automatically and the following channel
707 * change will trigger a hardware reset anyway
708 */
709 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
710 !ath9k_hw_check_alive(ah))
711 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
712
713 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
714 /*
715 * TSF sync does not look correct; remain awake to sync with
716 * the next Beacon.
717 */
718 ath_dbg(common, ATH_DBG_PS,
719 "TSFOOR - Sync with next Beacon\n");
720 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
721 }
722
723 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
724 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
725 ATH9K_INT_RXORN);
726 else
727 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
728
729 if (status & rxmask) {
730 /* Check for high priority Rx first */
731 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
732 (status & ATH9K_INT_RXHP))
733 ath_rx_tasklet(sc, 0, true);
734
735 ath_rx_tasklet(sc, 0, false);
736 }
737
738 if (status & ATH9K_INT_TX) {
739 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
740 ath_tx_edma_tasklet(sc);
741 else
742 ath_tx_tasklet(sc);
743 }
744
745 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
746 if (status & ATH9K_INT_GENTIMER)
747 ath_gen_timer_isr(sc->sc_ah);
748
749 if (status & ATH9K_INT_MCI)
750 ath_mci_intr(sc);
751
752 out:
753 /* re-enable hardware interrupt */
754 ath9k_hw_enable_interrupts(ah);
755
756 spin_unlock(&sc->sc_pcu_lock);
757 ath9k_ps_restore(sc);
758 }
759
760 irqreturn_t ath_isr(int irq, void *dev)
761 {
762 #define SCHED_INTR ( \
763 ATH9K_INT_FATAL | \
764 ATH9K_INT_BB_WATCHDOG | \
765 ATH9K_INT_RXORN | \
766 ATH9K_INT_RXEOL | \
767 ATH9K_INT_RX | \
768 ATH9K_INT_RXLP | \
769 ATH9K_INT_RXHP | \
770 ATH9K_INT_TX | \
771 ATH9K_INT_BMISS | \
772 ATH9K_INT_CST | \
773 ATH9K_INT_TSFOOR | \
774 ATH9K_INT_GENTIMER | \
775 ATH9K_INT_MCI)
776
777 struct ath_softc *sc = dev;
778 struct ath_hw *ah = sc->sc_ah;
779 struct ath_common *common = ath9k_hw_common(ah);
780 enum ath9k_int status;
781 bool sched = false;
782
783 /*
784 * The hardware is not ready/present, don't
785 * touch anything. Note this can happen early
786 * on if the IRQ is shared.
787 */
788 if (sc->sc_flags & SC_OP_INVALID)
789 return IRQ_NONE;
790
791
792 /* shared irq, not for us */
793
794 if (!ath9k_hw_intrpend(ah))
795 return IRQ_NONE;
796
797 /*
798 * Figure out the reason(s) for the interrupt. Note
799 * that the hal returns a pseudo-ISR that may include
800 * bits we haven't explicitly enabled so we mask the
801 * value to insure we only process bits we requested.
802 */
803 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
804 status &= ah->imask; /* discard unasked-for bits */
805
806 /*
807 * If there are no status bits set, then this interrupt was not
808 * for me (should have been caught above).
809 */
810 if (!status)
811 return IRQ_NONE;
812
813 /* Cache the status */
814 sc->intrstatus = status;
815
816 if (status & SCHED_INTR)
817 sched = true;
818
819 /*
820 * If a FATAL or RXORN interrupt is received, we have to reset the
821 * chip immediately.
822 */
823 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
824 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
825 goto chip_reset;
826
827 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
828 (status & ATH9K_INT_BB_WATCHDOG)) {
829
830 spin_lock(&common->cc_lock);
831 ath_hw_cycle_counters_update(common);
832 ar9003_hw_bb_watchdog_dbg_info(ah);
833 spin_unlock(&common->cc_lock);
834
835 goto chip_reset;
836 }
837
838 if (status & ATH9K_INT_SWBA)
839 tasklet_schedule(&sc->bcon_tasklet);
840
841 if (status & ATH9K_INT_TXURN)
842 ath9k_hw_updatetxtriglevel(ah, true);
843
844 if (status & ATH9K_INT_RXEOL) {
845 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
846 ath9k_hw_set_interrupts(ah);
847 }
848
849 if (status & ATH9K_INT_MIB) {
850 /*
851 * Disable interrupts until we service the MIB
852 * interrupt; otherwise it will continue to
853 * fire.
854 */
855 ath9k_hw_disable_interrupts(ah);
856 /*
857 * Let the hal handle the event. We assume
858 * it will clear whatever condition caused
859 * the interrupt.
860 */
861 spin_lock(&common->cc_lock);
862 ath9k_hw_proc_mib_event(ah);
863 spin_unlock(&common->cc_lock);
864 ath9k_hw_enable_interrupts(ah);
865 }
866
867 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
868 if (status & ATH9K_INT_TIM_TIMER) {
869 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
870 goto chip_reset;
871 /* Clear RxAbort bit so that we can
872 * receive frames */
873 ath9k_setpower(sc, ATH9K_PM_AWAKE);
874 ath9k_hw_setrxabort(sc->sc_ah, 0);
875 sc->ps_flags |= PS_WAIT_FOR_BEACON;
876 }
877
878 chip_reset:
879
880 ath_debug_stat_interrupt(sc, status);
881
882 if (sched) {
883 /* turn off every interrupt */
884 ath9k_hw_disable_interrupts(ah);
885 tasklet_schedule(&sc->intr_tq);
886 }
887
888 return IRQ_HANDLED;
889
890 #undef SCHED_INTR
891 }
892
893 static int ath_reset(struct ath_softc *sc, bool retry_tx)
894 {
895 int r;
896
897 ath9k_ps_wakeup(sc);
898
899 r = ath_reset_internal(sc, NULL, retry_tx);
900
901 if (retry_tx) {
902 int i;
903 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
904 if (ATH_TXQ_SETUP(sc, i)) {
905 spin_lock_bh(&sc->tx.txq[i].axq_lock);
906 ath_txq_schedule(sc, &sc->tx.txq[i]);
907 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
908 }
909 }
910 }
911
912 ath9k_ps_restore(sc);
913
914 return r;
915 }
916
917 void ath_reset_work(struct work_struct *work)
918 {
919 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
920
921 ath_reset(sc, true);
922 }
923
924 void ath_hw_check(struct work_struct *work)
925 {
926 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
927 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
928 unsigned long flags;
929 int busy;
930
931 ath9k_ps_wakeup(sc);
932 if (ath9k_hw_check_alive(sc->sc_ah))
933 goto out;
934
935 spin_lock_irqsave(&common->cc_lock, flags);
936 busy = ath_update_survey_stats(sc);
937 spin_unlock_irqrestore(&common->cc_lock, flags);
938
939 ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
940 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
941 if (busy >= 99) {
942 if (++sc->hw_busy_count >= 3) {
943 RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
944 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
945 }
946
947 } else if (busy >= 0)
948 sc->hw_busy_count = 0;
949
950 out:
951 ath9k_ps_restore(sc);
952 }
953
954 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
955 {
956 static int count;
957 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
958
959 if (pll_sqsum >= 0x40000) {
960 count++;
961 if (count == 3) {
962 /* Rx is hung for more than 500ms. Reset it */
963 ath_dbg(common, ATH_DBG_RESET,
964 "Possible RX hang, resetting");
965 RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
966 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
967 count = 0;
968 }
969 } else
970 count = 0;
971 }
972
973 void ath_hw_pll_work(struct work_struct *work)
974 {
975 struct ath_softc *sc = container_of(work, struct ath_softc,
976 hw_pll_work.work);
977 u32 pll_sqsum;
978
979 if (AR_SREV_9485(sc->sc_ah)) {
980
981 ath9k_ps_wakeup(sc);
982 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
983 ath9k_ps_restore(sc);
984
985 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
986
987 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
988 }
989 }
990
991 /**********************/
992 /* mac80211 callbacks */
993 /**********************/
994
995 static int ath9k_start(struct ieee80211_hw *hw)
996 {
997 struct ath_softc *sc = hw->priv;
998 struct ath_hw *ah = sc->sc_ah;
999 struct ath_common *common = ath9k_hw_common(ah);
1000 struct ieee80211_channel *curchan = hw->conf.channel;
1001 struct ath9k_channel *init_channel;
1002 int r;
1003
1004 ath_dbg(common, ATH_DBG_CONFIG,
1005 "Starting driver with initial channel: %d MHz\n",
1006 curchan->center_freq);
1007
1008 ath9k_ps_wakeup(sc);
1009
1010 mutex_lock(&sc->mutex);
1011
1012 /* setup initial channel */
1013 sc->chan_idx = curchan->hw_value;
1014
1015 init_channel = ath9k_cmn_get_curchannel(hw, ah);
1016
1017 /* Reset SERDES registers */
1018 ath9k_hw_configpcipowersave(ah, false);
1019
1020 /*
1021 * The basic interface to setting the hardware in a good
1022 * state is ``reset''. On return the hardware is known to
1023 * be powered up and with interrupts disabled. This must
1024 * be followed by initialization of the appropriate bits
1025 * and then setup of the interrupt mask.
1026 */
1027 spin_lock_bh(&sc->sc_pcu_lock);
1028
1029 atomic_set(&ah->intr_ref_cnt, -1);
1030
1031 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1032 if (r) {
1033 ath_err(common,
1034 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1035 r, curchan->center_freq);
1036 spin_unlock_bh(&sc->sc_pcu_lock);
1037 goto mutex_unlock;
1038 }
1039
1040 /* Setup our intr mask. */
1041 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1042 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1043 ATH9K_INT_GLOBAL;
1044
1045 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1046 ah->imask |= ATH9K_INT_RXHP |
1047 ATH9K_INT_RXLP |
1048 ATH9K_INT_BB_WATCHDOG;
1049 else
1050 ah->imask |= ATH9K_INT_RX;
1051
1052 ah->imask |= ATH9K_INT_GTT;
1053
1054 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1055 ah->imask |= ATH9K_INT_CST;
1056
1057 if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
1058 ah->imask |= ATH9K_INT_MCI;
1059
1060 sc->sc_flags &= ~SC_OP_INVALID;
1061 sc->sc_ah->is_monitoring = false;
1062
1063 /* Disable BMISS interrupt when we're not associated */
1064 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1065
1066 if (!ath_complete_reset(sc, false)) {
1067 r = -EIO;
1068 spin_unlock_bh(&sc->sc_pcu_lock);
1069 goto mutex_unlock;
1070 }
1071
1072 if (ah->led_pin >= 0) {
1073 ath9k_hw_cfg_output(ah, ah->led_pin,
1074 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1075 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
1076 }
1077
1078 /*
1079 * Reset key cache to sane defaults (all entries cleared) instead of
1080 * semi-random values after suspend/resume.
1081 */
1082 ath9k_cmn_init_crypto(sc->sc_ah);
1083
1084 spin_unlock_bh(&sc->sc_pcu_lock);
1085
1086 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1087 !ah->btcoex_hw.enabled) {
1088 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
1089 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1090 AR_STOMP_LOW_WLAN_WGHT);
1091 ath9k_hw_btcoex_enable(ah);
1092
1093 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1094 ath9k_btcoex_timer_resume(sc);
1095 }
1096
1097 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1098 common->bus_ops->extn_synch_en(common);
1099
1100 mutex_unlock:
1101 mutex_unlock(&sc->mutex);
1102
1103 ath9k_ps_restore(sc);
1104
1105 return r;
1106 }
1107
1108 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1109 {
1110 struct ath_softc *sc = hw->priv;
1111 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1112 struct ath_tx_control txctl;
1113 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1114
1115 if (sc->ps_enabled) {
1116 /*
1117 * mac80211 does not set PM field for normal data frames, so we
1118 * need to update that based on the current PS mode.
1119 */
1120 if (ieee80211_is_data(hdr->frame_control) &&
1121 !ieee80211_is_nullfunc(hdr->frame_control) &&
1122 !ieee80211_has_pm(hdr->frame_control)) {
1123 ath_dbg(common, ATH_DBG_PS,
1124 "Add PM=1 for a TX frame while in PS mode\n");
1125 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1126 }
1127 }
1128
1129 /*
1130 * Cannot tx while the hardware is in full sleep, it first needs a full
1131 * chip reset to recover from that
1132 */
1133 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP))
1134 goto exit;
1135
1136 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1137 /*
1138 * We are using PS-Poll and mac80211 can request TX while in
1139 * power save mode. Need to wake up hardware for the TX to be
1140 * completed and if needed, also for RX of buffered frames.
1141 */
1142 ath9k_ps_wakeup(sc);
1143 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1144 ath9k_hw_setrxabort(sc->sc_ah, 0);
1145 if (ieee80211_is_pspoll(hdr->frame_control)) {
1146 ath_dbg(common, ATH_DBG_PS,
1147 "Sending PS-Poll to pick a buffered frame\n");
1148 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1149 } else {
1150 ath_dbg(common, ATH_DBG_PS,
1151 "Wake up to complete TX\n");
1152 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1153 }
1154 /*
1155 * The actual restore operation will happen only after
1156 * the sc_flags bit is cleared. We are just dropping
1157 * the ps_usecount here.
1158 */
1159 ath9k_ps_restore(sc);
1160 }
1161
1162 memset(&txctl, 0, sizeof(struct ath_tx_control));
1163 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1164
1165 ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1166
1167 if (ath_tx_start(hw, skb, &txctl) != 0) {
1168 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1169 goto exit;
1170 }
1171
1172 return;
1173 exit:
1174 dev_kfree_skb_any(skb);
1175 }
1176
1177 static void ath9k_stop(struct ieee80211_hw *hw)
1178 {
1179 struct ath_softc *sc = hw->priv;
1180 struct ath_hw *ah = sc->sc_ah;
1181 struct ath_common *common = ath9k_hw_common(ah);
1182 bool prev_idle;
1183
1184 mutex_lock(&sc->mutex);
1185
1186 ath_cancel_work(sc);
1187
1188 if (sc->sc_flags & SC_OP_INVALID) {
1189 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1190 mutex_unlock(&sc->mutex);
1191 return;
1192 }
1193
1194 /* Ensure HW is awake when we try to shut it down. */
1195 ath9k_ps_wakeup(sc);
1196
1197 if (ah->btcoex_hw.enabled) {
1198 ath9k_hw_btcoex_disable(ah);
1199 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1200 ath9k_btcoex_timer_pause(sc);
1201 ath_mci_flush_profile(&sc->btcoex.mci);
1202 }
1203
1204 spin_lock_bh(&sc->sc_pcu_lock);
1205
1206 /* prevent tasklets to enable interrupts once we disable them */
1207 ah->imask &= ~ATH9K_INT_GLOBAL;
1208
1209 /* make sure h/w will not generate any interrupt
1210 * before setting the invalid flag. */
1211 ath9k_hw_disable_interrupts(ah);
1212
1213 spin_unlock_bh(&sc->sc_pcu_lock);
1214
1215 /* we can now sync irq and kill any running tasklets, since we already
1216 * disabled interrupts and not holding a spin lock */
1217 synchronize_irq(sc->irq);
1218 tasklet_kill(&sc->intr_tq);
1219 tasklet_kill(&sc->bcon_tasklet);
1220
1221 prev_idle = sc->ps_idle;
1222 sc->ps_idle = true;
1223
1224 spin_lock_bh(&sc->sc_pcu_lock);
1225
1226 if (ah->led_pin >= 0) {
1227 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
1228 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
1229 }
1230
1231 ath_prepare_reset(sc, false, true);
1232
1233 if (sc->rx.frag) {
1234 dev_kfree_skb_any(sc->rx.frag);
1235 sc->rx.frag = NULL;
1236 }
1237
1238 if (!ah->curchan)
1239 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
1240
1241 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
1242 ath9k_hw_phy_disable(ah);
1243
1244 ath9k_hw_configpcipowersave(ah, true);
1245
1246 spin_unlock_bh(&sc->sc_pcu_lock);
1247
1248 ath9k_ps_restore(sc);
1249
1250 sc->sc_flags |= SC_OP_INVALID;
1251 sc->ps_idle = prev_idle;
1252
1253 mutex_unlock(&sc->mutex);
1254
1255 ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1256 }
1257
1258 bool ath9k_uses_beacons(int type)
1259 {
1260 switch (type) {
1261 case NL80211_IFTYPE_AP:
1262 case NL80211_IFTYPE_ADHOC:
1263 case NL80211_IFTYPE_MESH_POINT:
1264 return true;
1265 default:
1266 return false;
1267 }
1268 }
1269
1270 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1271 struct ieee80211_vif *vif)
1272 {
1273 struct ath_vif *avp = (void *)vif->drv_priv;
1274
1275 ath9k_set_beaconing_status(sc, false);
1276 ath_beacon_return(sc, avp);
1277 ath9k_set_beaconing_status(sc, true);
1278 sc->sc_flags &= ~SC_OP_BEACONS;
1279 }
1280
1281 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1282 {
1283 struct ath9k_vif_iter_data *iter_data = data;
1284 int i;
1285
1286 if (iter_data->hw_macaddr)
1287 for (i = 0; i < ETH_ALEN; i++)
1288 iter_data->mask[i] &=
1289 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1290
1291 switch (vif->type) {
1292 case NL80211_IFTYPE_AP:
1293 iter_data->naps++;
1294 break;
1295 case NL80211_IFTYPE_STATION:
1296 iter_data->nstations++;
1297 break;
1298 case NL80211_IFTYPE_ADHOC:
1299 iter_data->nadhocs++;
1300 break;
1301 case NL80211_IFTYPE_MESH_POINT:
1302 iter_data->nmeshes++;
1303 break;
1304 case NL80211_IFTYPE_WDS:
1305 iter_data->nwds++;
1306 break;
1307 default:
1308 iter_data->nothers++;
1309 break;
1310 }
1311 }
1312
1313 /* Called with sc->mutex held. */
1314 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1315 struct ieee80211_vif *vif,
1316 struct ath9k_vif_iter_data *iter_data)
1317 {
1318 struct ath_softc *sc = hw->priv;
1319 struct ath_hw *ah = sc->sc_ah;
1320 struct ath_common *common = ath9k_hw_common(ah);
1321
1322 /*
1323 * Use the hardware MAC address as reference, the hardware uses it
1324 * together with the BSSID mask when matching addresses.
1325 */
1326 memset(iter_data, 0, sizeof(*iter_data));
1327 iter_data->hw_macaddr = common->macaddr;
1328 memset(&iter_data->mask, 0xff, ETH_ALEN);
1329
1330 if (vif)
1331 ath9k_vif_iter(iter_data, vif->addr, vif);
1332
1333 /* Get list of all active MAC addresses */
1334 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1335 iter_data);
1336 }
1337
1338 /* Called with sc->mutex held. */
1339 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1340 struct ieee80211_vif *vif)
1341 {
1342 struct ath_softc *sc = hw->priv;
1343 struct ath_hw *ah = sc->sc_ah;
1344 struct ath_common *common = ath9k_hw_common(ah);
1345 struct ath9k_vif_iter_data iter_data;
1346
1347 ath9k_calculate_iter_data(hw, vif, &iter_data);
1348
1349 /* Set BSSID mask. */
1350 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1351 ath_hw_setbssidmask(common);
1352
1353 /* Set op-mode & TSF */
1354 if (iter_data.naps > 0) {
1355 ath9k_hw_set_tsfadjust(ah, 1);
1356 sc->sc_flags |= SC_OP_TSF_RESET;
1357 ah->opmode = NL80211_IFTYPE_AP;
1358 } else {
1359 ath9k_hw_set_tsfadjust(ah, 0);
1360 sc->sc_flags &= ~SC_OP_TSF_RESET;
1361
1362 if (iter_data.nmeshes)
1363 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1364 else if (iter_data.nwds)
1365 ah->opmode = NL80211_IFTYPE_AP;
1366 else if (iter_data.nadhocs)
1367 ah->opmode = NL80211_IFTYPE_ADHOC;
1368 else
1369 ah->opmode = NL80211_IFTYPE_STATION;
1370 }
1371
1372 /*
1373 * Enable MIB interrupts when there are hardware phy counters.
1374 */
1375 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1376 if (ah->config.enable_ani)
1377 ah->imask |= ATH9K_INT_MIB;
1378 ah->imask |= ATH9K_INT_TSFOOR;
1379 } else {
1380 ah->imask &= ~ATH9K_INT_MIB;
1381 ah->imask &= ~ATH9K_INT_TSFOOR;
1382 }
1383
1384 ath9k_hw_set_interrupts(ah);
1385
1386 /* Set up ANI */
1387 if (iter_data.naps > 0) {
1388 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1389
1390 if (!common->disable_ani) {
1391 sc->sc_flags |= SC_OP_ANI_RUN;
1392 ath_start_ani(common);
1393 }
1394
1395 } else {
1396 sc->sc_flags &= ~SC_OP_ANI_RUN;
1397 del_timer_sync(&common->ani.timer);
1398 }
1399 }
1400
1401 /* Called with sc->mutex held, vif counts set up properly. */
1402 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1403 struct ieee80211_vif *vif)
1404 {
1405 struct ath_softc *sc = hw->priv;
1406
1407 ath9k_calculate_summary_state(hw, vif);
1408
1409 if (ath9k_uses_beacons(vif->type)) {
1410 int error;
1411 /* This may fail because upper levels do not have beacons
1412 * properly configured yet. That's OK, we assume it
1413 * will be properly configured and then we will be notified
1414 * in the info_changed method and set up beacons properly
1415 * there.
1416 */
1417 ath9k_set_beaconing_status(sc, false);
1418 error = ath_beacon_alloc(sc, vif);
1419 if (!error)
1420 ath_beacon_config(sc, vif);
1421 ath9k_set_beaconing_status(sc, true);
1422 }
1423 }
1424
1425
1426 static int ath9k_add_interface(struct ieee80211_hw *hw,
1427 struct ieee80211_vif *vif)
1428 {
1429 struct ath_softc *sc = hw->priv;
1430 struct ath_hw *ah = sc->sc_ah;
1431 struct ath_common *common = ath9k_hw_common(ah);
1432 int ret = 0;
1433
1434 ath9k_ps_wakeup(sc);
1435 mutex_lock(&sc->mutex);
1436
1437 switch (vif->type) {
1438 case NL80211_IFTYPE_STATION:
1439 case NL80211_IFTYPE_WDS:
1440 case NL80211_IFTYPE_ADHOC:
1441 case NL80211_IFTYPE_AP:
1442 case NL80211_IFTYPE_MESH_POINT:
1443 break;
1444 default:
1445 ath_err(common, "Interface type %d not yet supported\n",
1446 vif->type);
1447 ret = -EOPNOTSUPP;
1448 goto out;
1449 }
1450
1451 if (ath9k_uses_beacons(vif->type)) {
1452 if (sc->nbcnvifs >= ATH_BCBUF) {
1453 ath_err(common, "Not enough beacon buffers when adding"
1454 " new interface of type: %i\n",
1455 vif->type);
1456 ret = -ENOBUFS;
1457 goto out;
1458 }
1459 }
1460
1461 if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1462 ((vif->type == NL80211_IFTYPE_ADHOC) &&
1463 sc->nvifs > 0)) {
1464 ath_err(common, "Cannot create ADHOC interface when other"
1465 " interfaces already exist.\n");
1466 ret = -EINVAL;
1467 goto out;
1468 }
1469
1470 ath_dbg(common, ATH_DBG_CONFIG,
1471 "Attach a VIF of type: %d\n", vif->type);
1472
1473 sc->nvifs++;
1474
1475 ath9k_do_vif_add_setup(hw, vif);
1476 out:
1477 mutex_unlock(&sc->mutex);
1478 ath9k_ps_restore(sc);
1479 return ret;
1480 }
1481
1482 static int ath9k_change_interface(struct ieee80211_hw *hw,
1483 struct ieee80211_vif *vif,
1484 enum nl80211_iftype new_type,
1485 bool p2p)
1486 {
1487 struct ath_softc *sc = hw->priv;
1488 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1489 int ret = 0;
1490
1491 ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1492 mutex_lock(&sc->mutex);
1493 ath9k_ps_wakeup(sc);
1494
1495 /* See if new interface type is valid. */
1496 if ((new_type == NL80211_IFTYPE_ADHOC) &&
1497 (sc->nvifs > 1)) {
1498 ath_err(common, "When using ADHOC, it must be the only"
1499 " interface.\n");
1500 ret = -EINVAL;
1501 goto out;
1502 }
1503
1504 if (ath9k_uses_beacons(new_type) &&
1505 !ath9k_uses_beacons(vif->type)) {
1506 if (sc->nbcnvifs >= ATH_BCBUF) {
1507 ath_err(common, "No beacon slot available\n");
1508 ret = -ENOBUFS;
1509 goto out;
1510 }
1511 }
1512
1513 /* Clean up old vif stuff */
1514 if (ath9k_uses_beacons(vif->type))
1515 ath9k_reclaim_beacon(sc, vif);
1516
1517 /* Add new settings */
1518 vif->type = new_type;
1519 vif->p2p = p2p;
1520
1521 ath9k_do_vif_add_setup(hw, vif);
1522 out:
1523 ath9k_ps_restore(sc);
1524 mutex_unlock(&sc->mutex);
1525 return ret;
1526 }
1527
1528 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1529 struct ieee80211_vif *vif)
1530 {
1531 struct ath_softc *sc = hw->priv;
1532 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1533
1534 ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1535
1536 ath9k_ps_wakeup(sc);
1537 mutex_lock(&sc->mutex);
1538
1539 sc->nvifs--;
1540
1541 /* Reclaim beacon resources */
1542 if (ath9k_uses_beacons(vif->type))
1543 ath9k_reclaim_beacon(sc, vif);
1544
1545 ath9k_calculate_summary_state(hw, NULL);
1546
1547 mutex_unlock(&sc->mutex);
1548 ath9k_ps_restore(sc);
1549 }
1550
1551 static void ath9k_enable_ps(struct ath_softc *sc)
1552 {
1553 struct ath_hw *ah = sc->sc_ah;
1554
1555 sc->ps_enabled = true;
1556 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1557 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1558 ah->imask |= ATH9K_INT_TIM_TIMER;
1559 ath9k_hw_set_interrupts(ah);
1560 }
1561 ath9k_hw_setrxabort(ah, 1);
1562 }
1563 }
1564
1565 static void ath9k_disable_ps(struct ath_softc *sc)
1566 {
1567 struct ath_hw *ah = sc->sc_ah;
1568
1569 sc->ps_enabled = false;
1570 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1571 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1572 ath9k_hw_setrxabort(ah, 0);
1573 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1574 PS_WAIT_FOR_CAB |
1575 PS_WAIT_FOR_PSPOLL_DATA |
1576 PS_WAIT_FOR_TX_ACK);
1577 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1578 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1579 ath9k_hw_set_interrupts(ah);
1580 }
1581 }
1582
1583 }
1584
1585 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1586 {
1587 struct ath_softc *sc = hw->priv;
1588 struct ath_hw *ah = sc->sc_ah;
1589 struct ath_common *common = ath9k_hw_common(ah);
1590 struct ieee80211_conf *conf = &hw->conf;
1591
1592 ath9k_ps_wakeup(sc);
1593 mutex_lock(&sc->mutex);
1594
1595 /*
1596 * Leave this as the first check because we need to turn on the
1597 * radio if it was disabled before prior to processing the rest
1598 * of the changes. Likewise we must only disable the radio towards
1599 * the end.
1600 */
1601 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1602 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1603 if (sc->ps_idle)
1604 ath_cancel_work(sc);
1605 }
1606
1607 /*
1608 * We just prepare to enable PS. We have to wait until our AP has
1609 * ACK'd our null data frame to disable RX otherwise we'll ignore
1610 * those ACKs and end up retransmitting the same null data frames.
1611 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1612 */
1613 if (changed & IEEE80211_CONF_CHANGE_PS) {
1614 unsigned long flags;
1615 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1616 if (conf->flags & IEEE80211_CONF_PS)
1617 ath9k_enable_ps(sc);
1618 else
1619 ath9k_disable_ps(sc);
1620 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1621 }
1622
1623 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1624 if (conf->flags & IEEE80211_CONF_MONITOR) {
1625 ath_dbg(common, ATH_DBG_CONFIG,
1626 "Monitor mode is enabled\n");
1627 sc->sc_ah->is_monitoring = true;
1628 } else {
1629 ath_dbg(common, ATH_DBG_CONFIG,
1630 "Monitor mode is disabled\n");
1631 sc->sc_ah->is_monitoring = false;
1632 }
1633 }
1634
1635 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1636 struct ieee80211_channel *curchan = hw->conf.channel;
1637 struct ath9k_channel old_chan;
1638 int pos = curchan->hw_value;
1639 int old_pos = -1;
1640 unsigned long flags;
1641
1642 if (ah->curchan)
1643 old_pos = ah->curchan - &ah->channels[0];
1644
1645 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1646 sc->sc_flags |= SC_OP_OFFCHANNEL;
1647 else
1648 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1649
1650 ath_dbg(common, ATH_DBG_CONFIG,
1651 "Set channel: %d MHz type: %d\n",
1652 curchan->center_freq, conf->channel_type);
1653
1654 /* update survey stats for the old channel before switching */
1655 spin_lock_irqsave(&common->cc_lock, flags);
1656 ath_update_survey_stats(sc);
1657 spin_unlock_irqrestore(&common->cc_lock, flags);
1658
1659 /*
1660 * Preserve the current channel values, before updating
1661 * the same channel
1662 */
1663 if (old_pos == pos) {
1664 memcpy(&old_chan, &sc->sc_ah->channels[pos],
1665 sizeof(struct ath9k_channel));
1666 ah->curchan = &old_chan;
1667 }
1668
1669 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1670 curchan, conf->channel_type);
1671
1672 /*
1673 * If the operating channel changes, change the survey in-use flags
1674 * along with it.
1675 * Reset the survey data for the new channel, unless we're switching
1676 * back to the operating channel from an off-channel operation.
1677 */
1678 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1679 sc->cur_survey != &sc->survey[pos]) {
1680
1681 if (sc->cur_survey)
1682 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1683
1684 sc->cur_survey = &sc->survey[pos];
1685
1686 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1687 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1688 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1689 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1690 }
1691
1692 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1693 ath_err(common, "Unable to set channel\n");
1694 mutex_unlock(&sc->mutex);
1695 return -EINVAL;
1696 }
1697
1698 /*
1699 * The most recent snapshot of channel->noisefloor for the old
1700 * channel is only available after the hardware reset. Copy it to
1701 * the survey stats now.
1702 */
1703 if (old_pos >= 0)
1704 ath_update_survey_nf(sc, old_pos);
1705 }
1706
1707 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1708 ath_dbg(common, ATH_DBG_CONFIG,
1709 "Set power: %d\n", conf->power_level);
1710 sc->config.txpowlimit = 2 * conf->power_level;
1711 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1712 sc->config.txpowlimit, &sc->curtxpow);
1713 }
1714
1715 mutex_unlock(&sc->mutex);
1716 ath9k_ps_restore(sc);
1717
1718 return 0;
1719 }
1720
1721 #define SUPPORTED_FILTERS \
1722 (FIF_PROMISC_IN_BSS | \
1723 FIF_ALLMULTI | \
1724 FIF_CONTROL | \
1725 FIF_PSPOLL | \
1726 FIF_OTHER_BSS | \
1727 FIF_BCN_PRBRESP_PROMISC | \
1728 FIF_PROBE_REQ | \
1729 FIF_FCSFAIL)
1730
1731 /* FIXME: sc->sc_full_reset ? */
1732 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1733 unsigned int changed_flags,
1734 unsigned int *total_flags,
1735 u64 multicast)
1736 {
1737 struct ath_softc *sc = hw->priv;
1738 u32 rfilt;
1739
1740 changed_flags &= SUPPORTED_FILTERS;
1741 *total_flags &= SUPPORTED_FILTERS;
1742
1743 sc->rx.rxfilter = *total_flags;
1744 ath9k_ps_wakeup(sc);
1745 rfilt = ath_calcrxfilter(sc);
1746 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1747 ath9k_ps_restore(sc);
1748
1749 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1750 "Set HW RX filter: 0x%x\n", rfilt);
1751 }
1752
1753 static int ath9k_sta_add(struct ieee80211_hw *hw,
1754 struct ieee80211_vif *vif,
1755 struct ieee80211_sta *sta)
1756 {
1757 struct ath_softc *sc = hw->priv;
1758 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1759 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1760 struct ieee80211_key_conf ps_key = { };
1761
1762 ath_node_attach(sc, sta, vif);
1763
1764 if (vif->type != NL80211_IFTYPE_AP &&
1765 vif->type != NL80211_IFTYPE_AP_VLAN)
1766 return 0;
1767
1768 an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1769
1770 return 0;
1771 }
1772
1773 static void ath9k_del_ps_key(struct ath_softc *sc,
1774 struct ieee80211_vif *vif,
1775 struct ieee80211_sta *sta)
1776 {
1777 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1778 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1779 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1780
1781 if (!an->ps_key)
1782 return;
1783
1784 ath_key_delete(common, &ps_key);
1785 }
1786
1787 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1788 struct ieee80211_vif *vif,
1789 struct ieee80211_sta *sta)
1790 {
1791 struct ath_softc *sc = hw->priv;
1792
1793 ath9k_del_ps_key(sc, vif, sta);
1794 ath_node_detach(sc, sta);
1795
1796 return 0;
1797 }
1798
1799 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1800 struct ieee80211_vif *vif,
1801 enum sta_notify_cmd cmd,
1802 struct ieee80211_sta *sta)
1803 {
1804 struct ath_softc *sc = hw->priv;
1805 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1806
1807 switch (cmd) {
1808 case STA_NOTIFY_SLEEP:
1809 an->sleeping = true;
1810 ath_tx_aggr_sleep(sta, sc, an);
1811 break;
1812 case STA_NOTIFY_AWAKE:
1813 an->sleeping = false;
1814 ath_tx_aggr_wakeup(sc, an);
1815 break;
1816 }
1817 }
1818
1819 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1820 struct ieee80211_vif *vif, u16 queue,
1821 const struct ieee80211_tx_queue_params *params)
1822 {
1823 struct ath_softc *sc = hw->priv;
1824 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1825 struct ath_txq *txq;
1826 struct ath9k_tx_queue_info qi;
1827 int ret = 0;
1828
1829 if (queue >= WME_NUM_AC)
1830 return 0;
1831
1832 txq = sc->tx.txq_map[queue];
1833
1834 ath9k_ps_wakeup(sc);
1835 mutex_lock(&sc->mutex);
1836
1837 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1838
1839 qi.tqi_aifs = params->aifs;
1840 qi.tqi_cwmin = params->cw_min;
1841 qi.tqi_cwmax = params->cw_max;
1842 qi.tqi_burstTime = params->txop;
1843
1844 ath_dbg(common, ATH_DBG_CONFIG,
1845 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1846 queue, txq->axq_qnum, params->aifs, params->cw_min,
1847 params->cw_max, params->txop);
1848
1849 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1850 if (ret)
1851 ath_err(common, "TXQ Update failed\n");
1852
1853 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1854 if (queue == WME_AC_BE && !ret)
1855 ath_beaconq_config(sc);
1856
1857 mutex_unlock(&sc->mutex);
1858 ath9k_ps_restore(sc);
1859
1860 return ret;
1861 }
1862
1863 static int ath9k_set_key(struct ieee80211_hw *hw,
1864 enum set_key_cmd cmd,
1865 struct ieee80211_vif *vif,
1866 struct ieee80211_sta *sta,
1867 struct ieee80211_key_conf *key)
1868 {
1869 struct ath_softc *sc = hw->priv;
1870 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1871 int ret = 0;
1872
1873 if (ath9k_modparam_nohwcrypt)
1874 return -ENOSPC;
1875
1876 if (vif->type == NL80211_IFTYPE_ADHOC &&
1877 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1878 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1879 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1880 /*
1881 * For now, disable hw crypto for the RSN IBSS group keys. This
1882 * could be optimized in the future to use a modified key cache
1883 * design to support per-STA RX GTK, but until that gets
1884 * implemented, use of software crypto for group addressed
1885 * frames is a acceptable to allow RSN IBSS to be used.
1886 */
1887 return -EOPNOTSUPP;
1888 }
1889
1890 mutex_lock(&sc->mutex);
1891 ath9k_ps_wakeup(sc);
1892 ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1893
1894 switch (cmd) {
1895 case SET_KEY:
1896 if (sta)
1897 ath9k_del_ps_key(sc, vif, sta);
1898
1899 ret = ath_key_config(common, vif, sta, key);
1900 if (ret >= 0) {
1901 key->hw_key_idx = ret;
1902 /* push IV and Michael MIC generation to stack */
1903 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1904 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1905 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1906 if (sc->sc_ah->sw_mgmt_crypto &&
1907 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1908 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1909 ret = 0;
1910 }
1911 break;
1912 case DISABLE_KEY:
1913 ath_key_delete(common, key);
1914 break;
1915 default:
1916 ret = -EINVAL;
1917 }
1918
1919 ath9k_ps_restore(sc);
1920 mutex_unlock(&sc->mutex);
1921
1922 return ret;
1923 }
1924 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1925 {
1926 struct ath_softc *sc = data;
1927 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1928 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1929 struct ath_vif *avp = (void *)vif->drv_priv;
1930
1931 /*
1932 * Skip iteration if primary station vif's bss info
1933 * was not changed
1934 */
1935 if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1936 return;
1937
1938 if (bss_conf->assoc) {
1939 sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1940 avp->primary_sta_vif = true;
1941 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1942 common->curaid = bss_conf->aid;
1943 ath9k_hw_write_associd(sc->sc_ah);
1944 ath_dbg(common, ATH_DBG_CONFIG,
1945 "Bss Info ASSOC %d, bssid: %pM\n",
1946 bss_conf->aid, common->curbssid);
1947 ath_beacon_config(sc, vif);
1948 /*
1949 * Request a re-configuration of Beacon related timers
1950 * on the receipt of the first Beacon frame (i.e.,
1951 * after time sync with the AP).
1952 */
1953 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1954 /* Reset rssi stats */
1955 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1956 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1957
1958 if (!common->disable_ani) {
1959 sc->sc_flags |= SC_OP_ANI_RUN;
1960 ath_start_ani(common);
1961 }
1962
1963 }
1964 }
1965
1966 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
1967 {
1968 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1969 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1970 struct ath_vif *avp = (void *)vif->drv_priv;
1971
1972 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1973 return;
1974
1975 /* Reconfigure bss info */
1976 if (avp->primary_sta_vif && !bss_conf->assoc) {
1977 ath_dbg(common, ATH_DBG_CONFIG,
1978 "Bss Info DISASSOC %d, bssid %pM\n",
1979 common->curaid, common->curbssid);
1980 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
1981 avp->primary_sta_vif = false;
1982 memset(common->curbssid, 0, ETH_ALEN);
1983 common->curaid = 0;
1984 }
1985
1986 ieee80211_iterate_active_interfaces_atomic(
1987 sc->hw, ath9k_bss_iter, sc);
1988
1989 /*
1990 * None of station vifs are associated.
1991 * Clear bssid & aid
1992 */
1993 if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
1994 ath9k_hw_write_associd(sc->sc_ah);
1995 /* Stop ANI */
1996 sc->sc_flags &= ~SC_OP_ANI_RUN;
1997 del_timer_sync(&common->ani.timer);
1998 memset(&sc->caldata, 0, sizeof(sc->caldata));
1999 }
2000 }
2001
2002 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2003 struct ieee80211_vif *vif,
2004 struct ieee80211_bss_conf *bss_conf,
2005 u32 changed)
2006 {
2007 struct ath_softc *sc = hw->priv;
2008 struct ath_hw *ah = sc->sc_ah;
2009 struct ath_common *common = ath9k_hw_common(ah);
2010 struct ath_vif *avp = (void *)vif->drv_priv;
2011 int slottime;
2012 int error;
2013
2014 ath9k_ps_wakeup(sc);
2015 mutex_lock(&sc->mutex);
2016
2017 if (changed & BSS_CHANGED_BSSID) {
2018 ath9k_config_bss(sc, vif);
2019
2020 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
2021 common->curbssid, common->curaid);
2022 }
2023
2024 if (changed & BSS_CHANGED_IBSS) {
2025 /* There can be only one vif available */
2026 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
2027 common->curaid = bss_conf->aid;
2028 ath9k_hw_write_associd(sc->sc_ah);
2029
2030 if (bss_conf->ibss_joined) {
2031 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2032
2033 if (!common->disable_ani) {
2034 sc->sc_flags |= SC_OP_ANI_RUN;
2035 ath_start_ani(common);
2036 }
2037
2038 } else {
2039 sc->sc_flags &= ~SC_OP_ANI_RUN;
2040 del_timer_sync(&common->ani.timer);
2041 }
2042 }
2043
2044 /* Enable transmission of beacons (AP, IBSS, MESH) */
2045 if ((changed & BSS_CHANGED_BEACON) ||
2046 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2047 ath9k_set_beaconing_status(sc, false);
2048 error = ath_beacon_alloc(sc, vif);
2049 if (!error)
2050 ath_beacon_config(sc, vif);
2051 ath9k_set_beaconing_status(sc, true);
2052 }
2053
2054 if (changed & BSS_CHANGED_ERP_SLOT) {
2055 if (bss_conf->use_short_slot)
2056 slottime = 9;
2057 else
2058 slottime = 20;
2059 if (vif->type == NL80211_IFTYPE_AP) {
2060 /*
2061 * Defer update, so that connected stations can adjust
2062 * their settings at the same time.
2063 * See beacon.c for more details
2064 */
2065 sc->beacon.slottime = slottime;
2066 sc->beacon.updateslot = UPDATE;
2067 } else {
2068 ah->slottime = slottime;
2069 ath9k_hw_init_global_settings(ah);
2070 }
2071 }
2072
2073 /* Disable transmission of beacons */
2074 if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
2075 !bss_conf->enable_beacon) {
2076 ath9k_set_beaconing_status(sc, false);
2077 avp->is_bslot_active = false;
2078 ath9k_set_beaconing_status(sc, true);
2079 }
2080
2081 if (changed & BSS_CHANGED_BEACON_INT) {
2082 /*
2083 * In case of AP mode, the HW TSF has to be reset
2084 * when the beacon interval changes.
2085 */
2086 if (vif->type == NL80211_IFTYPE_AP) {
2087 sc->sc_flags |= SC_OP_TSF_RESET;
2088 ath9k_set_beaconing_status(sc, false);
2089 error = ath_beacon_alloc(sc, vif);
2090 if (!error)
2091 ath_beacon_config(sc, vif);
2092 ath9k_set_beaconing_status(sc, true);
2093 } else
2094 ath_beacon_config(sc, vif);
2095 }
2096
2097 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2098 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2099 bss_conf->use_short_preamble);
2100 if (bss_conf->use_short_preamble)
2101 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2102 else
2103 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2104 }
2105
2106 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2107 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2108 bss_conf->use_cts_prot);
2109 if (bss_conf->use_cts_prot &&
2110 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2111 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2112 else
2113 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2114 }
2115
2116 mutex_unlock(&sc->mutex);
2117 ath9k_ps_restore(sc);
2118 }
2119
2120 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2121 {
2122 struct ath_softc *sc = hw->priv;
2123 u64 tsf;
2124
2125 mutex_lock(&sc->mutex);
2126 ath9k_ps_wakeup(sc);
2127 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2128 ath9k_ps_restore(sc);
2129 mutex_unlock(&sc->mutex);
2130
2131 return tsf;
2132 }
2133
2134 static void ath9k_set_tsf(struct ieee80211_hw *hw,
2135 struct ieee80211_vif *vif,
2136 u64 tsf)
2137 {
2138 struct ath_softc *sc = hw->priv;
2139
2140 mutex_lock(&sc->mutex);
2141 ath9k_ps_wakeup(sc);
2142 ath9k_hw_settsf64(sc->sc_ah, tsf);
2143 ath9k_ps_restore(sc);
2144 mutex_unlock(&sc->mutex);
2145 }
2146
2147 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2148 {
2149 struct ath_softc *sc = hw->priv;
2150
2151 mutex_lock(&sc->mutex);
2152
2153 ath9k_ps_wakeup(sc);
2154 ath9k_hw_reset_tsf(sc->sc_ah);
2155 ath9k_ps_restore(sc);
2156
2157 mutex_unlock(&sc->mutex);
2158 }
2159
2160 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2161 struct ieee80211_vif *vif,
2162 enum ieee80211_ampdu_mlme_action action,
2163 struct ieee80211_sta *sta,
2164 u16 tid, u16 *ssn, u8 buf_size)
2165 {
2166 struct ath_softc *sc = hw->priv;
2167 int ret = 0;
2168
2169 local_bh_disable();
2170
2171 switch (action) {
2172 case IEEE80211_AMPDU_RX_START:
2173 if (!(sc->sc_flags & SC_OP_RXAGGR))
2174 ret = -ENOTSUPP;
2175 break;
2176 case IEEE80211_AMPDU_RX_STOP:
2177 break;
2178 case IEEE80211_AMPDU_TX_START:
2179 if (!(sc->sc_flags & SC_OP_TXAGGR))
2180 return -EOPNOTSUPP;
2181
2182 ath9k_ps_wakeup(sc);
2183 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2184 if (!ret)
2185 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2186 ath9k_ps_restore(sc);
2187 break;
2188 case IEEE80211_AMPDU_TX_STOP:
2189 ath9k_ps_wakeup(sc);
2190 ath_tx_aggr_stop(sc, sta, tid);
2191 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2192 ath9k_ps_restore(sc);
2193 break;
2194 case IEEE80211_AMPDU_TX_OPERATIONAL:
2195 ath9k_ps_wakeup(sc);
2196 ath_tx_aggr_resume(sc, sta, tid);
2197 ath9k_ps_restore(sc);
2198 break;
2199 default:
2200 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2201 }
2202
2203 local_bh_enable();
2204
2205 return ret;
2206 }
2207
2208 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2209 struct survey_info *survey)
2210 {
2211 struct ath_softc *sc = hw->priv;
2212 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2213 struct ieee80211_supported_band *sband;
2214 struct ieee80211_channel *chan;
2215 unsigned long flags;
2216 int pos;
2217
2218 spin_lock_irqsave(&common->cc_lock, flags);
2219 if (idx == 0)
2220 ath_update_survey_stats(sc);
2221
2222 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2223 if (sband && idx >= sband->n_channels) {
2224 idx -= sband->n_channels;
2225 sband = NULL;
2226 }
2227
2228 if (!sband)
2229 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2230
2231 if (!sband || idx >= sband->n_channels) {
2232 spin_unlock_irqrestore(&common->cc_lock, flags);
2233 return -ENOENT;
2234 }
2235
2236 chan = &sband->channels[idx];
2237 pos = chan->hw_value;
2238 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2239 survey->channel = chan;
2240 spin_unlock_irqrestore(&common->cc_lock, flags);
2241
2242 return 0;
2243 }
2244
2245 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2246 {
2247 struct ath_softc *sc = hw->priv;
2248 struct ath_hw *ah = sc->sc_ah;
2249
2250 mutex_lock(&sc->mutex);
2251 ah->coverage_class = coverage_class;
2252
2253 ath9k_ps_wakeup(sc);
2254 ath9k_hw_init_global_settings(ah);
2255 ath9k_ps_restore(sc);
2256
2257 mutex_unlock(&sc->mutex);
2258 }
2259
2260 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2261 {
2262 struct ath_softc *sc = hw->priv;
2263 struct ath_hw *ah = sc->sc_ah;
2264 struct ath_common *common = ath9k_hw_common(ah);
2265 int timeout = 200; /* ms */
2266 int i, j;
2267 bool drain_txq;
2268
2269 mutex_lock(&sc->mutex);
2270 cancel_delayed_work_sync(&sc->tx_complete_work);
2271
2272 if (ah->ah_flags & AH_UNPLUGGED) {
2273 ath_dbg(common, ATH_DBG_ANY, "Device has been unplugged!\n");
2274 mutex_unlock(&sc->mutex);
2275 return;
2276 }
2277
2278 if (sc->sc_flags & SC_OP_INVALID) {
2279 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
2280 mutex_unlock(&sc->mutex);
2281 return;
2282 }
2283
2284 for (j = 0; j < timeout; j++) {
2285 bool npend = false;
2286
2287 if (j)
2288 usleep_range(1000, 2000);
2289
2290 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2291 if (!ATH_TXQ_SETUP(sc, i))
2292 continue;
2293
2294 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2295
2296 if (npend)
2297 break;
2298 }
2299
2300 if (!npend)
2301 break;
2302 }
2303
2304 if (drop) {
2305 ath9k_ps_wakeup(sc);
2306 spin_lock_bh(&sc->sc_pcu_lock);
2307 drain_txq = ath_drain_all_txq(sc, false);
2308 spin_unlock_bh(&sc->sc_pcu_lock);
2309
2310 if (!drain_txq)
2311 ath_reset(sc, false);
2312
2313 ath9k_ps_restore(sc);
2314 ieee80211_wake_queues(hw);
2315 }
2316
2317 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2318 mutex_unlock(&sc->mutex);
2319 }
2320
2321 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2322 {
2323 struct ath_softc *sc = hw->priv;
2324 int i;
2325
2326 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2327 if (!ATH_TXQ_SETUP(sc, i))
2328 continue;
2329
2330 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2331 return true;
2332 }
2333 return false;
2334 }
2335
2336 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2337 {
2338 struct ath_softc *sc = hw->priv;
2339 struct ath_hw *ah = sc->sc_ah;
2340 struct ieee80211_vif *vif;
2341 struct ath_vif *avp;
2342 struct ath_buf *bf;
2343 struct ath_tx_status ts;
2344 int status;
2345
2346 vif = sc->beacon.bslot[0];
2347 if (!vif)
2348 return 0;
2349
2350 avp = (void *)vif->drv_priv;
2351 if (!avp->is_bslot_active)
2352 return 0;
2353
2354 if (!sc->beacon.tx_processed) {
2355 tasklet_disable(&sc->bcon_tasklet);
2356
2357 bf = avp->av_bcbuf;
2358 if (!bf || !bf->bf_mpdu)
2359 goto skip;
2360
2361 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2362 if (status == -EINPROGRESS)
2363 goto skip;
2364
2365 sc->beacon.tx_processed = true;
2366 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2367
2368 skip:
2369 tasklet_enable(&sc->bcon_tasklet);
2370 }
2371
2372 return sc->beacon.tx_last;
2373 }
2374
2375 static int ath9k_get_stats(struct ieee80211_hw *hw,
2376 struct ieee80211_low_level_stats *stats)
2377 {
2378 struct ath_softc *sc = hw->priv;
2379 struct ath_hw *ah = sc->sc_ah;
2380 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2381
2382 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2383 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2384 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2385 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2386 return 0;
2387 }
2388
2389 static u32 fill_chainmask(u32 cap, u32 new)
2390 {
2391 u32 filled = 0;
2392 int i;
2393
2394 for (i = 0; cap && new; i++, cap >>= 1) {
2395 if (!(cap & BIT(0)))
2396 continue;
2397
2398 if (new & BIT(0))
2399 filled |= BIT(i);
2400
2401 new >>= 1;
2402 }
2403
2404 return filled;
2405 }
2406
2407 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2408 {
2409 struct ath_softc *sc = hw->priv;
2410 struct ath_hw *ah = sc->sc_ah;
2411
2412 if (!rx_ant || !tx_ant)
2413 return -EINVAL;
2414
2415 sc->ant_rx = rx_ant;
2416 sc->ant_tx = tx_ant;
2417
2418 if (ah->caps.rx_chainmask == 1)
2419 return 0;
2420
2421 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2422 if (AR_SREV_9100(ah))
2423 ah->rxchainmask = 0x7;
2424 else
2425 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2426
2427 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2428 ath9k_reload_chainmask_settings(sc);
2429
2430 return 0;
2431 }
2432
2433 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2434 {
2435 struct ath_softc *sc = hw->priv;
2436
2437 *tx_ant = sc->ant_tx;
2438 *rx_ant = sc->ant_rx;
2439 return 0;
2440 }
2441
2442 struct ieee80211_ops ath9k_ops = {
2443 .tx = ath9k_tx,
2444 .start = ath9k_start,
2445 .stop = ath9k_stop,
2446 .add_interface = ath9k_add_interface,
2447 .change_interface = ath9k_change_interface,
2448 .remove_interface = ath9k_remove_interface,
2449 .config = ath9k_config,
2450 .configure_filter = ath9k_configure_filter,
2451 .sta_add = ath9k_sta_add,
2452 .sta_remove = ath9k_sta_remove,
2453 .sta_notify = ath9k_sta_notify,
2454 .conf_tx = ath9k_conf_tx,
2455 .bss_info_changed = ath9k_bss_info_changed,
2456 .set_key = ath9k_set_key,
2457 .get_tsf = ath9k_get_tsf,
2458 .set_tsf = ath9k_set_tsf,
2459 .reset_tsf = ath9k_reset_tsf,
2460 .ampdu_action = ath9k_ampdu_action,
2461 .get_survey = ath9k_get_survey,
2462 .rfkill_poll = ath9k_rfkill_poll_state,
2463 .set_coverage_class = ath9k_set_coverage_class,
2464 .flush = ath9k_flush,
2465 .tx_frames_pending = ath9k_tx_frames_pending,
2466 .tx_last_beacon = ath9k_tx_last_beacon,
2467 .get_stats = ath9k_get_stats,
2468 .set_antenna = ath9k_set_antenna,
2469 .get_antenna = ath9k_get_antenna,
2470 };
Linux kernel - Deliverables
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