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Merge branch 'for-john' of git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac802...
[deliverable/linux.git] / drivers / net / wireless / ath / ath9k / main.c
1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
19 #include "ath9k.h"
20 #include "btcoex.h"
21
22 static void ath9k_set_assoc_state(struct ath_softc *sc,
23 struct ieee80211_vif *vif);
24
25 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
26 {
27 /*
28 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
29 * 0 for no restriction
30 * 1 for 1/4 us
31 * 2 for 1/2 us
32 * 3 for 1 us
33 * 4 for 2 us
34 * 5 for 4 us
35 * 6 for 8 us
36 * 7 for 16 us
37 */
38 switch (mpdudensity) {
39 case 0:
40 return 0;
41 case 1:
42 case 2:
43 case 3:
44 /* Our lower layer calculations limit our precision to
45 1 microsecond */
46 return 1;
47 case 4:
48 return 2;
49 case 5:
50 return 4;
51 case 6:
52 return 8;
53 case 7:
54 return 16;
55 default:
56 return 0;
57 }
58 }
59
60 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
61 {
62 bool pending = false;
63
64 spin_lock_bh(&txq->axq_lock);
65
66 if (txq->axq_depth || !list_empty(&txq->axq_acq))
67 pending = true;
68
69 spin_unlock_bh(&txq->axq_lock);
70 return pending;
71 }
72
73 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
74 {
75 unsigned long flags;
76 bool ret;
77
78 spin_lock_irqsave(&sc->sc_pm_lock, flags);
79 ret = ath9k_hw_setpower(sc->sc_ah, mode);
80 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
81
82 return ret;
83 }
84
85 void ath9k_ps_wakeup(struct ath_softc *sc)
86 {
87 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
88 unsigned long flags;
89 enum ath9k_power_mode power_mode;
90
91 spin_lock_irqsave(&sc->sc_pm_lock, flags);
92 if (++sc->ps_usecount != 1)
93 goto unlock;
94
95 power_mode = sc->sc_ah->power_mode;
96 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
97
98 /*
99 * While the hardware is asleep, the cycle counters contain no
100 * useful data. Better clear them now so that they don't mess up
101 * survey data results.
102 */
103 if (power_mode != ATH9K_PM_AWAKE) {
104 spin_lock(&common->cc_lock);
105 ath_hw_cycle_counters_update(common);
106 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
107 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
108 spin_unlock(&common->cc_lock);
109 }
110
111 unlock:
112 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
113 }
114
115 void ath9k_ps_restore(struct ath_softc *sc)
116 {
117 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
118 enum ath9k_power_mode mode;
119 unsigned long flags;
120 bool reset;
121
122 spin_lock_irqsave(&sc->sc_pm_lock, flags);
123 if (--sc->ps_usecount != 0)
124 goto unlock;
125
126 if (sc->ps_idle) {
127 ath9k_hw_setrxabort(sc->sc_ah, 1);
128 ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
129 mode = ATH9K_PM_FULL_SLEEP;
130 } else if (sc->ps_enabled &&
131 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
132 PS_WAIT_FOR_CAB |
133 PS_WAIT_FOR_PSPOLL_DATA |
134 PS_WAIT_FOR_TX_ACK |
135 PS_WAIT_FOR_ANI))) {
136 mode = ATH9K_PM_NETWORK_SLEEP;
137 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
138 ath9k_btcoex_stop_gen_timer(sc);
139 } else {
140 goto unlock;
141 }
142
143 spin_lock(&common->cc_lock);
144 ath_hw_cycle_counters_update(common);
145 spin_unlock(&common->cc_lock);
146
147 ath9k_hw_setpower(sc->sc_ah, mode);
148
149 unlock:
150 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
151 }
152
153 static void __ath_cancel_work(struct ath_softc *sc)
154 {
155 cancel_work_sync(&sc->paprd_work);
156 cancel_work_sync(&sc->hw_check_work);
157 cancel_delayed_work_sync(&sc->tx_complete_work);
158 cancel_delayed_work_sync(&sc->hw_pll_work);
159
160 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
161 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
162 cancel_work_sync(&sc->mci_work);
163 #endif
164 }
165
166 static void ath_cancel_work(struct ath_softc *sc)
167 {
168 __ath_cancel_work(sc);
169 cancel_work_sync(&sc->hw_reset_work);
170 }
171
172 static void ath_restart_work(struct ath_softc *sc)
173 {
174 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
175
176 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9485(sc->sc_ah) ||
177 AR_SREV_9550(sc->sc_ah))
178 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
179 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
180
181 ath_start_rx_poll(sc, 3);
182 ath_start_ani(sc);
183 }
184
185 static bool ath_prepare_reset(struct ath_softc *sc)
186 {
187 struct ath_hw *ah = sc->sc_ah;
188 bool ret = true;
189
190 ieee80211_stop_queues(sc->hw);
191
192 sc->hw_busy_count = 0;
193 ath_stop_ani(sc);
194 del_timer_sync(&sc->rx_poll_timer);
195
196 ath9k_debug_samp_bb_mac(sc);
197 ath9k_hw_disable_interrupts(ah);
198
199 if (!ath_drain_all_txq(sc))
200 ret = false;
201
202 if (!ath_stoprecv(sc))
203 ret = false;
204
205 return ret;
206 }
207
208 static bool ath_complete_reset(struct ath_softc *sc, bool start)
209 {
210 struct ath_hw *ah = sc->sc_ah;
211 struct ath_common *common = ath9k_hw_common(ah);
212 unsigned long flags;
213
214 if (ath_startrecv(sc) != 0) {
215 ath_err(common, "Unable to restart recv logic\n");
216 return false;
217 }
218
219 ath9k_cmn_update_txpow(ah, sc->curtxpow,
220 sc->config.txpowlimit, &sc->curtxpow);
221
222 clear_bit(SC_OP_HW_RESET, &sc->sc_flags);
223 ath9k_hw_set_interrupts(ah);
224 ath9k_hw_enable_interrupts(ah);
225
226 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && start) {
227 if (!test_bit(SC_OP_BEACONS, &sc->sc_flags))
228 goto work;
229
230 ath9k_set_beacon(sc);
231
232 if (ah->opmode == NL80211_IFTYPE_STATION &&
233 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
234 spin_lock_irqsave(&sc->sc_pm_lock, flags);
235 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
236 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
237 }
238 work:
239 ath_restart_work(sc);
240 }
241
242 if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3)
243 ath_ant_comb_update(sc);
244
245 ieee80211_wake_queues(sc->hw);
246
247 return true;
248 }
249
250 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
251 {
252 struct ath_hw *ah = sc->sc_ah;
253 struct ath_common *common = ath9k_hw_common(ah);
254 struct ath9k_hw_cal_data *caldata = NULL;
255 bool fastcc = true;
256 int r;
257
258 __ath_cancel_work(sc);
259
260 tasklet_disable(&sc->intr_tq);
261 spin_lock_bh(&sc->sc_pcu_lock);
262
263 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) {
264 fastcc = false;
265 caldata = &sc->caldata;
266 }
267
268 if (!hchan) {
269 fastcc = false;
270 hchan = ah->curchan;
271 }
272
273 if (!ath_prepare_reset(sc))
274 fastcc = false;
275
276 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
277 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
278
279 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
280 if (r) {
281 ath_err(common,
282 "Unable to reset channel, reset status %d\n", r);
283
284 ath9k_hw_enable_interrupts(ah);
285 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
286
287 goto out;
288 }
289
290 if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
291 (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL))
292 ath9k_mci_set_txpower(sc, true, false);
293
294 if (!ath_complete_reset(sc, true))
295 r = -EIO;
296
297 out:
298 spin_unlock_bh(&sc->sc_pcu_lock);
299 tasklet_enable(&sc->intr_tq);
300
301 return r;
302 }
303
304
305 /*
306 * Set/change channels. If the channel is really being changed, it's done
307 * by reseting the chip. To accomplish this we must first cleanup any pending
308 * DMA, then restart stuff.
309 */
310 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
311 struct ath9k_channel *hchan)
312 {
313 int r;
314
315 if (test_bit(SC_OP_INVALID, &sc->sc_flags))
316 return -EIO;
317
318 r = ath_reset_internal(sc, hchan);
319
320 return r;
321 }
322
323 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
324 struct ieee80211_vif *vif)
325 {
326 struct ath_node *an;
327 an = (struct ath_node *)sta->drv_priv;
328
329 an->sc = sc;
330 an->sta = sta;
331 an->vif = vif;
332
333 ath_tx_node_init(sc, an);
334
335 if (sta->ht_cap.ht_supported) {
336 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
337 sta->ht_cap.ampdu_factor);
338 an->mpdudensity = ath9k_parse_mpdudensity(sta->ht_cap.ampdu_density);
339 }
340 }
341
342 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
343 {
344 struct ath_node *an = (struct ath_node *)sta->drv_priv;
345 ath_tx_node_cleanup(sc, an);
346 }
347
348 void ath9k_tasklet(unsigned long data)
349 {
350 struct ath_softc *sc = (struct ath_softc *)data;
351 struct ath_hw *ah = sc->sc_ah;
352 struct ath_common *common = ath9k_hw_common(ah);
353 enum ath_reset_type type;
354 unsigned long flags;
355 u32 status = sc->intrstatus;
356 u32 rxmask;
357
358 ath9k_ps_wakeup(sc);
359 spin_lock(&sc->sc_pcu_lock);
360
361 if ((status & ATH9K_INT_FATAL) ||
362 (status & ATH9K_INT_BB_WATCHDOG)) {
363
364 if (status & ATH9K_INT_FATAL)
365 type = RESET_TYPE_FATAL_INT;
366 else
367 type = RESET_TYPE_BB_WATCHDOG;
368
369 ath9k_queue_reset(sc, type);
370 goto out;
371 }
372
373 spin_lock_irqsave(&sc->sc_pm_lock, flags);
374 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
375 /*
376 * TSF sync does not look correct; remain awake to sync with
377 * the next Beacon.
378 */
379 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
380 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
381 }
382 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
383
384 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
385 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
386 ATH9K_INT_RXORN);
387 else
388 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
389
390 if (status & rxmask) {
391 /* Check for high priority Rx first */
392 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
393 (status & ATH9K_INT_RXHP))
394 ath_rx_tasklet(sc, 0, true);
395
396 ath_rx_tasklet(sc, 0, false);
397 }
398
399 if (status & ATH9K_INT_TX) {
400 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
401 ath_tx_edma_tasklet(sc);
402 else
403 ath_tx_tasklet(sc);
404 }
405
406 ath9k_btcoex_handle_interrupt(sc, status);
407
408 out:
409 /* re-enable hardware interrupt */
410 ath9k_hw_enable_interrupts(ah);
411
412 spin_unlock(&sc->sc_pcu_lock);
413 ath9k_ps_restore(sc);
414 }
415
416 irqreturn_t ath_isr(int irq, void *dev)
417 {
418 #define SCHED_INTR ( \
419 ATH9K_INT_FATAL | \
420 ATH9K_INT_BB_WATCHDOG | \
421 ATH9K_INT_RXORN | \
422 ATH9K_INT_RXEOL | \
423 ATH9K_INT_RX | \
424 ATH9K_INT_RXLP | \
425 ATH9K_INT_RXHP | \
426 ATH9K_INT_TX | \
427 ATH9K_INT_BMISS | \
428 ATH9K_INT_CST | \
429 ATH9K_INT_TSFOOR | \
430 ATH9K_INT_GENTIMER | \
431 ATH9K_INT_MCI)
432
433 struct ath_softc *sc = dev;
434 struct ath_hw *ah = sc->sc_ah;
435 struct ath_common *common = ath9k_hw_common(ah);
436 enum ath9k_int status;
437 bool sched = false;
438
439 /*
440 * The hardware is not ready/present, don't
441 * touch anything. Note this can happen early
442 * on if the IRQ is shared.
443 */
444 if (test_bit(SC_OP_INVALID, &sc->sc_flags))
445 return IRQ_NONE;
446
447 /* shared irq, not for us */
448
449 if (!ath9k_hw_intrpend(ah))
450 return IRQ_NONE;
451
452 if (test_bit(SC_OP_HW_RESET, &sc->sc_flags)) {
453 ath9k_hw_kill_interrupts(ah);
454 return IRQ_HANDLED;
455 }
456
457 /*
458 * Figure out the reason(s) for the interrupt. Note
459 * that the hal returns a pseudo-ISR that may include
460 * bits we haven't explicitly enabled so we mask the
461 * value to insure we only process bits we requested.
462 */
463 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
464 status &= ah->imask; /* discard unasked-for bits */
465
466 /*
467 * If there are no status bits set, then this interrupt was not
468 * for me (should have been caught above).
469 */
470 if (!status)
471 return IRQ_NONE;
472
473 /* Cache the status */
474 sc->intrstatus = status;
475
476 if (status & SCHED_INTR)
477 sched = true;
478
479 /*
480 * If a FATAL or RXORN interrupt is received, we have to reset the
481 * chip immediately.
482 */
483 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
484 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
485 goto chip_reset;
486
487 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
488 (status & ATH9K_INT_BB_WATCHDOG)) {
489
490 spin_lock(&common->cc_lock);
491 ath_hw_cycle_counters_update(common);
492 ar9003_hw_bb_watchdog_dbg_info(ah);
493 spin_unlock(&common->cc_lock);
494
495 goto chip_reset;
496 }
497 #ifdef CONFIG_PM_SLEEP
498 if (status & ATH9K_INT_BMISS) {
499 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
500 ath_dbg(common, ANY, "during WoW we got a BMISS\n");
501 atomic_inc(&sc->wow_got_bmiss_intr);
502 atomic_dec(&sc->wow_sleep_proc_intr);
503 }
504 }
505 #endif
506 if (status & ATH9K_INT_SWBA)
507 tasklet_schedule(&sc->bcon_tasklet);
508
509 if (status & ATH9K_INT_TXURN)
510 ath9k_hw_updatetxtriglevel(ah, true);
511
512 if (status & ATH9K_INT_RXEOL) {
513 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
514 ath9k_hw_set_interrupts(ah);
515 }
516
517 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
518 if (status & ATH9K_INT_TIM_TIMER) {
519 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
520 goto chip_reset;
521 /* Clear RxAbort bit so that we can
522 * receive frames */
523 ath9k_setpower(sc, ATH9K_PM_AWAKE);
524 spin_lock(&sc->sc_pm_lock);
525 ath9k_hw_setrxabort(sc->sc_ah, 0);
526 sc->ps_flags |= PS_WAIT_FOR_BEACON;
527 spin_unlock(&sc->sc_pm_lock);
528 }
529
530 chip_reset:
531
532 ath_debug_stat_interrupt(sc, status);
533
534 if (sched) {
535 /* turn off every interrupt */
536 ath9k_hw_disable_interrupts(ah);
537 tasklet_schedule(&sc->intr_tq);
538 }
539
540 return IRQ_HANDLED;
541
542 #undef SCHED_INTR
543 }
544
545 static int ath_reset(struct ath_softc *sc)
546 {
547 int i, r;
548
549 ath9k_ps_wakeup(sc);
550
551 r = ath_reset_internal(sc, NULL);
552
553 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
554 if (!ATH_TXQ_SETUP(sc, i))
555 continue;
556
557 spin_lock_bh(&sc->tx.txq[i].axq_lock);
558 ath_txq_schedule(sc, &sc->tx.txq[i]);
559 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
560 }
561
562 ath9k_ps_restore(sc);
563
564 return r;
565 }
566
567 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
568 {
569 #ifdef CONFIG_ATH9K_DEBUGFS
570 RESET_STAT_INC(sc, type);
571 #endif
572 set_bit(SC_OP_HW_RESET, &sc->sc_flags);
573 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
574 }
575
576 void ath_reset_work(struct work_struct *work)
577 {
578 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
579
580 ath_reset(sc);
581 }
582
583 /**********************/
584 /* mac80211 callbacks */
585 /**********************/
586
587 static int ath9k_start(struct ieee80211_hw *hw)
588 {
589 struct ath_softc *sc = hw->priv;
590 struct ath_hw *ah = sc->sc_ah;
591 struct ath_common *common = ath9k_hw_common(ah);
592 struct ieee80211_channel *curchan = hw->conf.chandef.chan;
593 struct ath9k_channel *init_channel;
594 int r;
595
596 ath_dbg(common, CONFIG,
597 "Starting driver with initial channel: %d MHz\n",
598 curchan->center_freq);
599
600 ath9k_ps_wakeup(sc);
601 mutex_lock(&sc->mutex);
602
603 init_channel = ath9k_cmn_get_curchannel(hw, ah);
604
605 /* Reset SERDES registers */
606 ath9k_hw_configpcipowersave(ah, false);
607
608 /*
609 * The basic interface to setting the hardware in a good
610 * state is ``reset''. On return the hardware is known to
611 * be powered up and with interrupts disabled. This must
612 * be followed by initialization of the appropriate bits
613 * and then setup of the interrupt mask.
614 */
615 spin_lock_bh(&sc->sc_pcu_lock);
616
617 atomic_set(&ah->intr_ref_cnt, -1);
618
619 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
620 if (r) {
621 ath_err(common,
622 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
623 r, curchan->center_freq);
624 ah->reset_power_on = false;
625 }
626
627 /* Setup our intr mask. */
628 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
629 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
630 ATH9K_INT_GLOBAL;
631
632 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
633 ah->imask |= ATH9K_INT_RXHP |
634 ATH9K_INT_RXLP |
635 ATH9K_INT_BB_WATCHDOG;
636 else
637 ah->imask |= ATH9K_INT_RX;
638
639 ah->imask |= ATH9K_INT_GTT;
640
641 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
642 ah->imask |= ATH9K_INT_CST;
643
644 ath_mci_enable(sc);
645
646 clear_bit(SC_OP_INVALID, &sc->sc_flags);
647 sc->sc_ah->is_monitoring = false;
648
649 if (!ath_complete_reset(sc, false))
650 ah->reset_power_on = false;
651
652 if (ah->led_pin >= 0) {
653 ath9k_hw_cfg_output(ah, ah->led_pin,
654 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
655 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
656 }
657
658 /*
659 * Reset key cache to sane defaults (all entries cleared) instead of
660 * semi-random values after suspend/resume.
661 */
662 ath9k_cmn_init_crypto(sc->sc_ah);
663
664 spin_unlock_bh(&sc->sc_pcu_lock);
665
666 mutex_unlock(&sc->mutex);
667
668 ath9k_ps_restore(sc);
669
670 return 0;
671 }
672
673 static void ath9k_tx(struct ieee80211_hw *hw,
674 struct ieee80211_tx_control *control,
675 struct sk_buff *skb)
676 {
677 struct ath_softc *sc = hw->priv;
678 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
679 struct ath_tx_control txctl;
680 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
681 unsigned long flags;
682
683 if (sc->ps_enabled) {
684 /*
685 * mac80211 does not set PM field for normal data frames, so we
686 * need to update that based on the current PS mode.
687 */
688 if (ieee80211_is_data(hdr->frame_control) &&
689 !ieee80211_is_nullfunc(hdr->frame_control) &&
690 !ieee80211_has_pm(hdr->frame_control)) {
691 ath_dbg(common, PS,
692 "Add PM=1 for a TX frame while in PS mode\n");
693 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
694 }
695 }
696
697 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
698 /*
699 * We are using PS-Poll and mac80211 can request TX while in
700 * power save mode. Need to wake up hardware for the TX to be
701 * completed and if needed, also for RX of buffered frames.
702 */
703 ath9k_ps_wakeup(sc);
704 spin_lock_irqsave(&sc->sc_pm_lock, flags);
705 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
706 ath9k_hw_setrxabort(sc->sc_ah, 0);
707 if (ieee80211_is_pspoll(hdr->frame_control)) {
708 ath_dbg(common, PS,
709 "Sending PS-Poll to pick a buffered frame\n");
710 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
711 } else {
712 ath_dbg(common, PS, "Wake up to complete TX\n");
713 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
714 }
715 /*
716 * The actual restore operation will happen only after
717 * the ps_flags bit is cleared. We are just dropping
718 * the ps_usecount here.
719 */
720 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
721 ath9k_ps_restore(sc);
722 }
723
724 /*
725 * Cannot tx while the hardware is in full sleep, it first needs a full
726 * chip reset to recover from that
727 */
728 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
729 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
730 goto exit;
731 }
732
733 memset(&txctl, 0, sizeof(struct ath_tx_control));
734 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
735 txctl.sta = control->sta;
736
737 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
738
739 if (ath_tx_start(hw, skb, &txctl) != 0) {
740 ath_dbg(common, XMIT, "TX failed\n");
741 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
742 goto exit;
743 }
744
745 return;
746 exit:
747 ieee80211_free_txskb(hw, skb);
748 }
749
750 static void ath9k_stop(struct ieee80211_hw *hw)
751 {
752 struct ath_softc *sc = hw->priv;
753 struct ath_hw *ah = sc->sc_ah;
754 struct ath_common *common = ath9k_hw_common(ah);
755 bool prev_idle;
756
757 mutex_lock(&sc->mutex);
758
759 ath_cancel_work(sc);
760 del_timer_sync(&sc->rx_poll_timer);
761
762 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
763 ath_dbg(common, ANY, "Device not present\n");
764 mutex_unlock(&sc->mutex);
765 return;
766 }
767
768 /* Ensure HW is awake when we try to shut it down. */
769 ath9k_ps_wakeup(sc);
770
771 spin_lock_bh(&sc->sc_pcu_lock);
772
773 /* prevent tasklets to enable interrupts once we disable them */
774 ah->imask &= ~ATH9K_INT_GLOBAL;
775
776 /* make sure h/w will not generate any interrupt
777 * before setting the invalid flag. */
778 ath9k_hw_disable_interrupts(ah);
779
780 spin_unlock_bh(&sc->sc_pcu_lock);
781
782 /* we can now sync irq and kill any running tasklets, since we already
783 * disabled interrupts and not holding a spin lock */
784 synchronize_irq(sc->irq);
785 tasklet_kill(&sc->intr_tq);
786 tasklet_kill(&sc->bcon_tasklet);
787
788 prev_idle = sc->ps_idle;
789 sc->ps_idle = true;
790
791 spin_lock_bh(&sc->sc_pcu_lock);
792
793 if (ah->led_pin >= 0) {
794 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
795 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
796 }
797
798 ath_prepare_reset(sc);
799
800 if (sc->rx.frag) {
801 dev_kfree_skb_any(sc->rx.frag);
802 sc->rx.frag = NULL;
803 }
804
805 if (!ah->curchan)
806 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
807
808 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
809 ath9k_hw_phy_disable(ah);
810
811 ath9k_hw_configpcipowersave(ah, true);
812
813 spin_unlock_bh(&sc->sc_pcu_lock);
814
815 ath9k_ps_restore(sc);
816
817 set_bit(SC_OP_INVALID, &sc->sc_flags);
818 sc->ps_idle = prev_idle;
819
820 mutex_unlock(&sc->mutex);
821
822 ath_dbg(common, CONFIG, "Driver halt\n");
823 }
824
825 bool ath9k_uses_beacons(int type)
826 {
827 switch (type) {
828 case NL80211_IFTYPE_AP:
829 case NL80211_IFTYPE_ADHOC:
830 case NL80211_IFTYPE_MESH_POINT:
831 return true;
832 default:
833 return false;
834 }
835 }
836
837 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
838 {
839 struct ath9k_vif_iter_data *iter_data = data;
840 int i;
841
842 if (iter_data->hw_macaddr)
843 for (i = 0; i < ETH_ALEN; i++)
844 iter_data->mask[i] &=
845 ~(iter_data->hw_macaddr[i] ^ mac[i]);
846
847 switch (vif->type) {
848 case NL80211_IFTYPE_AP:
849 iter_data->naps++;
850 break;
851 case NL80211_IFTYPE_STATION:
852 iter_data->nstations++;
853 break;
854 case NL80211_IFTYPE_ADHOC:
855 iter_data->nadhocs++;
856 break;
857 case NL80211_IFTYPE_MESH_POINT:
858 iter_data->nmeshes++;
859 break;
860 case NL80211_IFTYPE_WDS:
861 iter_data->nwds++;
862 break;
863 default:
864 break;
865 }
866 }
867
868 static void ath9k_sta_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
869 {
870 struct ath_softc *sc = data;
871 struct ath_vif *avp = (void *)vif->drv_priv;
872
873 if (vif->type != NL80211_IFTYPE_STATION)
874 return;
875
876 if (avp->primary_sta_vif)
877 ath9k_set_assoc_state(sc, vif);
878 }
879
880 /* Called with sc->mutex held. */
881 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
882 struct ieee80211_vif *vif,
883 struct ath9k_vif_iter_data *iter_data)
884 {
885 struct ath_softc *sc = hw->priv;
886 struct ath_hw *ah = sc->sc_ah;
887 struct ath_common *common = ath9k_hw_common(ah);
888
889 /*
890 * Use the hardware MAC address as reference, the hardware uses it
891 * together with the BSSID mask when matching addresses.
892 */
893 memset(iter_data, 0, sizeof(*iter_data));
894 iter_data->hw_macaddr = common->macaddr;
895 memset(&iter_data->mask, 0xff, ETH_ALEN);
896
897 if (vif)
898 ath9k_vif_iter(iter_data, vif->addr, vif);
899
900 /* Get list of all active MAC addresses */
901 ieee80211_iterate_active_interfaces_atomic(
902 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
903 ath9k_vif_iter, iter_data);
904 }
905
906 /* Called with sc->mutex held. */
907 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
908 struct ieee80211_vif *vif)
909 {
910 struct ath_softc *sc = hw->priv;
911 struct ath_hw *ah = sc->sc_ah;
912 struct ath_common *common = ath9k_hw_common(ah);
913 struct ath9k_vif_iter_data iter_data;
914 enum nl80211_iftype old_opmode = ah->opmode;
915
916 ath9k_calculate_iter_data(hw, vif, &iter_data);
917
918 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
919 ath_hw_setbssidmask(common);
920
921 if (iter_data.naps > 0) {
922 ath9k_hw_set_tsfadjust(ah, true);
923 ah->opmode = NL80211_IFTYPE_AP;
924 } else {
925 ath9k_hw_set_tsfadjust(ah, false);
926
927 if (iter_data.nmeshes)
928 ah->opmode = NL80211_IFTYPE_MESH_POINT;
929 else if (iter_data.nwds)
930 ah->opmode = NL80211_IFTYPE_AP;
931 else if (iter_data.nadhocs)
932 ah->opmode = NL80211_IFTYPE_ADHOC;
933 else
934 ah->opmode = NL80211_IFTYPE_STATION;
935 }
936
937 ath9k_hw_setopmode(ah);
938
939 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
940 ah->imask |= ATH9K_INT_TSFOOR;
941 else
942 ah->imask &= ~ATH9K_INT_TSFOOR;
943
944 ath9k_hw_set_interrupts(ah);
945
946 /*
947 * If we are changing the opmode to STATION,
948 * a beacon sync needs to be done.
949 */
950 if (ah->opmode == NL80211_IFTYPE_STATION &&
951 old_opmode == NL80211_IFTYPE_AP &&
952 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
953 ieee80211_iterate_active_interfaces_atomic(
954 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
955 ath9k_sta_vif_iter, sc);
956 }
957 }
958
959 static int ath9k_add_interface(struct ieee80211_hw *hw,
960 struct ieee80211_vif *vif)
961 {
962 struct ath_softc *sc = hw->priv;
963 struct ath_hw *ah = sc->sc_ah;
964 struct ath_common *common = ath9k_hw_common(ah);
965
966 mutex_lock(&sc->mutex);
967
968 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
969 sc->nvifs++;
970
971 ath9k_ps_wakeup(sc);
972 ath9k_calculate_summary_state(hw, vif);
973 ath9k_ps_restore(sc);
974
975 if (ath9k_uses_beacons(vif->type))
976 ath9k_beacon_assign_slot(sc, vif);
977
978 mutex_unlock(&sc->mutex);
979 return 0;
980 }
981
982 static int ath9k_change_interface(struct ieee80211_hw *hw,
983 struct ieee80211_vif *vif,
984 enum nl80211_iftype new_type,
985 bool p2p)
986 {
987 struct ath_softc *sc = hw->priv;
988 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
989
990 ath_dbg(common, CONFIG, "Change Interface\n");
991 mutex_lock(&sc->mutex);
992
993 if (ath9k_uses_beacons(vif->type))
994 ath9k_beacon_remove_slot(sc, vif);
995
996 vif->type = new_type;
997 vif->p2p = p2p;
998
999 ath9k_ps_wakeup(sc);
1000 ath9k_calculate_summary_state(hw, vif);
1001 ath9k_ps_restore(sc);
1002
1003 if (ath9k_uses_beacons(vif->type))
1004 ath9k_beacon_assign_slot(sc, vif);
1005
1006 mutex_unlock(&sc->mutex);
1007 return 0;
1008 }
1009
1010 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1011 struct ieee80211_vif *vif)
1012 {
1013 struct ath_softc *sc = hw->priv;
1014 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1015
1016 ath_dbg(common, CONFIG, "Detach Interface\n");
1017
1018 mutex_lock(&sc->mutex);
1019
1020 sc->nvifs--;
1021
1022 if (ath9k_uses_beacons(vif->type))
1023 ath9k_beacon_remove_slot(sc, vif);
1024
1025 ath9k_ps_wakeup(sc);
1026 ath9k_calculate_summary_state(hw, NULL);
1027 ath9k_ps_restore(sc);
1028
1029 mutex_unlock(&sc->mutex);
1030 }
1031
1032 static void ath9k_enable_ps(struct ath_softc *sc)
1033 {
1034 struct ath_hw *ah = sc->sc_ah;
1035 struct ath_common *common = ath9k_hw_common(ah);
1036
1037 sc->ps_enabled = true;
1038 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1039 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1040 ah->imask |= ATH9K_INT_TIM_TIMER;
1041 ath9k_hw_set_interrupts(ah);
1042 }
1043 ath9k_hw_setrxabort(ah, 1);
1044 }
1045 ath_dbg(common, PS, "PowerSave enabled\n");
1046 }
1047
1048 static void ath9k_disable_ps(struct ath_softc *sc)
1049 {
1050 struct ath_hw *ah = sc->sc_ah;
1051 struct ath_common *common = ath9k_hw_common(ah);
1052
1053 sc->ps_enabled = false;
1054 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1055 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1056 ath9k_hw_setrxabort(ah, 0);
1057 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1058 PS_WAIT_FOR_CAB |
1059 PS_WAIT_FOR_PSPOLL_DATA |
1060 PS_WAIT_FOR_TX_ACK);
1061 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1062 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1063 ath9k_hw_set_interrupts(ah);
1064 }
1065 }
1066 ath_dbg(common, PS, "PowerSave disabled\n");
1067 }
1068
1069 void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw)
1070 {
1071 struct ath_softc *sc = hw->priv;
1072 struct ath_hw *ah = sc->sc_ah;
1073 struct ath_common *common = ath9k_hw_common(ah);
1074 u32 rxfilter;
1075
1076 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1077 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1078 return;
1079 }
1080
1081 ath9k_ps_wakeup(sc);
1082 rxfilter = ath9k_hw_getrxfilter(ah);
1083 ath9k_hw_setrxfilter(ah, rxfilter |
1084 ATH9K_RX_FILTER_PHYRADAR |
1085 ATH9K_RX_FILTER_PHYERR);
1086
1087 /* TODO: usually this should not be neccesary, but for some reason
1088 * (or in some mode?) the trigger must be called after the
1089 * configuration, otherwise the register will have its values reset
1090 * (on my ar9220 to value 0x01002310)
1091 */
1092 ath9k_spectral_scan_config(hw, sc->spectral_mode);
1093 ath9k_hw_ops(ah)->spectral_scan_trigger(ah);
1094 ath9k_ps_restore(sc);
1095 }
1096
1097 int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
1098 enum spectral_mode spectral_mode)
1099 {
1100 struct ath_softc *sc = hw->priv;
1101 struct ath_hw *ah = sc->sc_ah;
1102 struct ath_common *common = ath9k_hw_common(ah);
1103
1104 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1105 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1106 return -1;
1107 }
1108
1109 switch (spectral_mode) {
1110 case SPECTRAL_DISABLED:
1111 sc->spec_config.enabled = 0;
1112 break;
1113 case SPECTRAL_BACKGROUND:
1114 /* send endless samples.
1115 * TODO: is this really useful for "background"?
1116 */
1117 sc->spec_config.endless = 1;
1118 sc->spec_config.enabled = 1;
1119 break;
1120 case SPECTRAL_CHANSCAN:
1121 case SPECTRAL_MANUAL:
1122 sc->spec_config.endless = 0;
1123 sc->spec_config.enabled = 1;
1124 break;
1125 default:
1126 return -1;
1127 }
1128
1129 ath9k_ps_wakeup(sc);
1130 ath9k_hw_ops(ah)->spectral_scan_config(ah, &sc->spec_config);
1131 ath9k_ps_restore(sc);
1132
1133 sc->spectral_mode = spectral_mode;
1134
1135 return 0;
1136 }
1137
1138 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1139 {
1140 struct ath_softc *sc = hw->priv;
1141 struct ath_hw *ah = sc->sc_ah;
1142 struct ath_common *common = ath9k_hw_common(ah);
1143 struct ieee80211_conf *conf = &hw->conf;
1144 bool reset_channel = false;
1145
1146 ath9k_ps_wakeup(sc);
1147 mutex_lock(&sc->mutex);
1148
1149 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1150 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1151 if (sc->ps_idle) {
1152 ath_cancel_work(sc);
1153 ath9k_stop_btcoex(sc);
1154 } else {
1155 ath9k_start_btcoex(sc);
1156 /*
1157 * The chip needs a reset to properly wake up from
1158 * full sleep
1159 */
1160 reset_channel = ah->chip_fullsleep;
1161 }
1162 }
1163
1164 /*
1165 * We just prepare to enable PS. We have to wait until our AP has
1166 * ACK'd our null data frame to disable RX otherwise we'll ignore
1167 * those ACKs and end up retransmitting the same null data frames.
1168 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1169 */
1170 if (changed & IEEE80211_CONF_CHANGE_PS) {
1171 unsigned long flags;
1172 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1173 if (conf->flags & IEEE80211_CONF_PS)
1174 ath9k_enable_ps(sc);
1175 else
1176 ath9k_disable_ps(sc);
1177 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1178 }
1179
1180 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1181 if (conf->flags & IEEE80211_CONF_MONITOR) {
1182 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1183 sc->sc_ah->is_monitoring = true;
1184 } else {
1185 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1186 sc->sc_ah->is_monitoring = false;
1187 }
1188 }
1189
1190 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) {
1191 struct ieee80211_channel *curchan = hw->conf.chandef.chan;
1192 enum nl80211_channel_type channel_type =
1193 cfg80211_get_chandef_type(&conf->chandef);
1194 int pos = curchan->hw_value;
1195 int old_pos = -1;
1196 unsigned long flags;
1197
1198 if (ah->curchan)
1199 old_pos = ah->curchan - &ah->channels[0];
1200
1201 ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n",
1202 curchan->center_freq, channel_type);
1203
1204 /* update survey stats for the old channel before switching */
1205 spin_lock_irqsave(&common->cc_lock, flags);
1206 ath_update_survey_stats(sc);
1207 spin_unlock_irqrestore(&common->cc_lock, flags);
1208
1209 /*
1210 * Preserve the current channel values, before updating
1211 * the same channel
1212 */
1213 if (ah->curchan && (old_pos == pos))
1214 ath9k_hw_getnf(ah, ah->curchan);
1215
1216 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1217 curchan, channel_type);
1218
1219 /*
1220 * If the operating channel changes, change the survey in-use flags
1221 * along with it.
1222 * Reset the survey data for the new channel, unless we're switching
1223 * back to the operating channel from an off-channel operation.
1224 */
1225 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1226 sc->cur_survey != &sc->survey[pos]) {
1227
1228 if (sc->cur_survey)
1229 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1230
1231 sc->cur_survey = &sc->survey[pos];
1232
1233 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1234 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1235 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1236 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1237 }
1238
1239 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1240 ath_err(common, "Unable to set channel\n");
1241 mutex_unlock(&sc->mutex);
1242 ath9k_ps_restore(sc);
1243 return -EINVAL;
1244 }
1245
1246 /*
1247 * The most recent snapshot of channel->noisefloor for the old
1248 * channel is only available after the hardware reset. Copy it to
1249 * the survey stats now.
1250 */
1251 if (old_pos >= 0)
1252 ath_update_survey_nf(sc, old_pos);
1253
1254 /*
1255 * Enable radar pulse detection if on a DFS channel. Spectral
1256 * scanning and radar detection can not be used concurrently.
1257 */
1258 if (hw->conf.radar_enabled) {
1259 u32 rxfilter;
1260
1261 /* set HW specific DFS configuration */
1262 ath9k_hw_set_radar_params(ah);
1263 rxfilter = ath9k_hw_getrxfilter(ah);
1264 rxfilter |= ATH9K_RX_FILTER_PHYRADAR |
1265 ATH9K_RX_FILTER_PHYERR;
1266 ath9k_hw_setrxfilter(ah, rxfilter);
1267 ath_dbg(common, DFS, "DFS enabled at freq %d\n",
1268 curchan->center_freq);
1269 } else {
1270 /* perform spectral scan if requested. */
1271 if (sc->scanning &&
1272 sc->spectral_mode == SPECTRAL_CHANSCAN)
1273 ath9k_spectral_scan_trigger(hw);
1274 }
1275 }
1276
1277 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1278 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1279 sc->config.txpowlimit = 2 * conf->power_level;
1280 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1281 sc->config.txpowlimit, &sc->curtxpow);
1282 }
1283
1284 mutex_unlock(&sc->mutex);
1285 ath9k_ps_restore(sc);
1286
1287 return 0;
1288 }
1289
1290 #define SUPPORTED_FILTERS \
1291 (FIF_PROMISC_IN_BSS | \
1292 FIF_ALLMULTI | \
1293 FIF_CONTROL | \
1294 FIF_PSPOLL | \
1295 FIF_OTHER_BSS | \
1296 FIF_BCN_PRBRESP_PROMISC | \
1297 FIF_PROBE_REQ | \
1298 FIF_FCSFAIL)
1299
1300 /* FIXME: sc->sc_full_reset ? */
1301 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1302 unsigned int changed_flags,
1303 unsigned int *total_flags,
1304 u64 multicast)
1305 {
1306 struct ath_softc *sc = hw->priv;
1307 u32 rfilt;
1308
1309 changed_flags &= SUPPORTED_FILTERS;
1310 *total_flags &= SUPPORTED_FILTERS;
1311
1312 sc->rx.rxfilter = *total_flags;
1313 ath9k_ps_wakeup(sc);
1314 rfilt = ath_calcrxfilter(sc);
1315 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1316 ath9k_ps_restore(sc);
1317
1318 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1319 rfilt);
1320 }
1321
1322 static int ath9k_sta_add(struct ieee80211_hw *hw,
1323 struct ieee80211_vif *vif,
1324 struct ieee80211_sta *sta)
1325 {
1326 struct ath_softc *sc = hw->priv;
1327 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1328 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1329 struct ieee80211_key_conf ps_key = { };
1330
1331 ath_node_attach(sc, sta, vif);
1332
1333 if (vif->type != NL80211_IFTYPE_AP &&
1334 vif->type != NL80211_IFTYPE_AP_VLAN)
1335 return 0;
1336
1337 an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1338
1339 return 0;
1340 }
1341
1342 static void ath9k_del_ps_key(struct ath_softc *sc,
1343 struct ieee80211_vif *vif,
1344 struct ieee80211_sta *sta)
1345 {
1346 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1347 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1348 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1349
1350 if (!an->ps_key)
1351 return;
1352
1353 ath_key_delete(common, &ps_key);
1354 }
1355
1356 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1357 struct ieee80211_vif *vif,
1358 struct ieee80211_sta *sta)
1359 {
1360 struct ath_softc *sc = hw->priv;
1361
1362 ath9k_del_ps_key(sc, vif, sta);
1363 ath_node_detach(sc, sta);
1364
1365 return 0;
1366 }
1367
1368 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1369 struct ieee80211_vif *vif,
1370 enum sta_notify_cmd cmd,
1371 struct ieee80211_sta *sta)
1372 {
1373 struct ath_softc *sc = hw->priv;
1374 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1375
1376 if (!sta->ht_cap.ht_supported)
1377 return;
1378
1379 switch (cmd) {
1380 case STA_NOTIFY_SLEEP:
1381 an->sleeping = true;
1382 ath_tx_aggr_sleep(sta, sc, an);
1383 break;
1384 case STA_NOTIFY_AWAKE:
1385 an->sleeping = false;
1386 ath_tx_aggr_wakeup(sc, an);
1387 break;
1388 }
1389 }
1390
1391 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1392 struct ieee80211_vif *vif, u16 queue,
1393 const struct ieee80211_tx_queue_params *params)
1394 {
1395 struct ath_softc *sc = hw->priv;
1396 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1397 struct ath_txq *txq;
1398 struct ath9k_tx_queue_info qi;
1399 int ret = 0;
1400
1401 if (queue >= IEEE80211_NUM_ACS)
1402 return 0;
1403
1404 txq = sc->tx.txq_map[queue];
1405
1406 ath9k_ps_wakeup(sc);
1407 mutex_lock(&sc->mutex);
1408
1409 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1410
1411 qi.tqi_aifs = params->aifs;
1412 qi.tqi_cwmin = params->cw_min;
1413 qi.tqi_cwmax = params->cw_max;
1414 qi.tqi_burstTime = params->txop * 32;
1415
1416 ath_dbg(common, CONFIG,
1417 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1418 queue, txq->axq_qnum, params->aifs, params->cw_min,
1419 params->cw_max, params->txop);
1420
1421 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1422 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1423 if (ret)
1424 ath_err(common, "TXQ Update failed\n");
1425
1426 mutex_unlock(&sc->mutex);
1427 ath9k_ps_restore(sc);
1428
1429 return ret;
1430 }
1431
1432 static int ath9k_set_key(struct ieee80211_hw *hw,
1433 enum set_key_cmd cmd,
1434 struct ieee80211_vif *vif,
1435 struct ieee80211_sta *sta,
1436 struct ieee80211_key_conf *key)
1437 {
1438 struct ath_softc *sc = hw->priv;
1439 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1440 int ret = 0;
1441
1442 if (ath9k_modparam_nohwcrypt)
1443 return -ENOSPC;
1444
1445 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1446 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1447 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1448 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1449 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1450 /*
1451 * For now, disable hw crypto for the RSN IBSS group keys. This
1452 * could be optimized in the future to use a modified key cache
1453 * design to support per-STA RX GTK, but until that gets
1454 * implemented, use of software crypto for group addressed
1455 * frames is a acceptable to allow RSN IBSS to be used.
1456 */
1457 return -EOPNOTSUPP;
1458 }
1459
1460 mutex_lock(&sc->mutex);
1461 ath9k_ps_wakeup(sc);
1462 ath_dbg(common, CONFIG, "Set HW Key\n");
1463
1464 switch (cmd) {
1465 case SET_KEY:
1466 if (sta)
1467 ath9k_del_ps_key(sc, vif, sta);
1468
1469 ret = ath_key_config(common, vif, sta, key);
1470 if (ret >= 0) {
1471 key->hw_key_idx = ret;
1472 /* push IV and Michael MIC generation to stack */
1473 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1474 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1475 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1476 if (sc->sc_ah->sw_mgmt_crypto &&
1477 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1478 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1479 ret = 0;
1480 }
1481 break;
1482 case DISABLE_KEY:
1483 ath_key_delete(common, key);
1484 break;
1485 default:
1486 ret = -EINVAL;
1487 }
1488
1489 ath9k_ps_restore(sc);
1490 mutex_unlock(&sc->mutex);
1491
1492 return ret;
1493 }
1494
1495 static void ath9k_set_assoc_state(struct ath_softc *sc,
1496 struct ieee80211_vif *vif)
1497 {
1498 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1499 struct ath_vif *avp = (void *)vif->drv_priv;
1500 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1501 unsigned long flags;
1502
1503 set_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
1504 avp->primary_sta_vif = true;
1505
1506 /*
1507 * Set the AID, BSSID and do beacon-sync only when
1508 * the HW opmode is STATION.
1509 *
1510 * But the primary bit is set above in any case.
1511 */
1512 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1513 return;
1514
1515 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1516 common->curaid = bss_conf->aid;
1517 ath9k_hw_write_associd(sc->sc_ah);
1518
1519 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1520 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1521
1522 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1523 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1524 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1525
1526 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1527 ath9k_mci_update_wlan_channels(sc, false);
1528
1529 ath_dbg(common, CONFIG,
1530 "Primary Station interface: %pM, BSSID: %pM\n",
1531 vif->addr, common->curbssid);
1532 }
1533
1534 static void ath9k_bss_assoc_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1535 {
1536 struct ath_softc *sc = data;
1537 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1538
1539 if (test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
1540 return;
1541
1542 if (bss_conf->assoc)
1543 ath9k_set_assoc_state(sc, vif);
1544 }
1545
1546 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1547 struct ieee80211_vif *vif,
1548 struct ieee80211_bss_conf *bss_conf,
1549 u32 changed)
1550 {
1551 #define CHECK_ANI \
1552 (BSS_CHANGED_ASSOC | \
1553 BSS_CHANGED_IBSS | \
1554 BSS_CHANGED_BEACON_ENABLED)
1555
1556 struct ath_softc *sc = hw->priv;
1557 struct ath_hw *ah = sc->sc_ah;
1558 struct ath_common *common = ath9k_hw_common(ah);
1559 struct ath_vif *avp = (void *)vif->drv_priv;
1560 int slottime;
1561
1562 ath9k_ps_wakeup(sc);
1563 mutex_lock(&sc->mutex);
1564
1565 if (changed & BSS_CHANGED_ASSOC) {
1566 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1567 bss_conf->bssid, bss_conf->assoc);
1568
1569 if (avp->primary_sta_vif && !bss_conf->assoc) {
1570 clear_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
1571 avp->primary_sta_vif = false;
1572
1573 if (ah->opmode == NL80211_IFTYPE_STATION)
1574 clear_bit(SC_OP_BEACONS, &sc->sc_flags);
1575 }
1576
1577 ieee80211_iterate_active_interfaces_atomic(
1578 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1579 ath9k_bss_assoc_iter, sc);
1580
1581 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags) &&
1582 ah->opmode == NL80211_IFTYPE_STATION) {
1583 memset(common->curbssid, 0, ETH_ALEN);
1584 common->curaid = 0;
1585 ath9k_hw_write_associd(sc->sc_ah);
1586 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1587 ath9k_mci_update_wlan_channels(sc, true);
1588 }
1589 }
1590
1591 if (changed & BSS_CHANGED_IBSS) {
1592 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1593 common->curaid = bss_conf->aid;
1594 ath9k_hw_write_associd(sc->sc_ah);
1595 }
1596
1597 if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1598 (changed & BSS_CHANGED_BEACON_INT)) {
1599 if (ah->opmode == NL80211_IFTYPE_AP &&
1600 bss_conf->enable_beacon)
1601 ath9k_set_tsfadjust(sc, vif);
1602 if (ath9k_allow_beacon_config(sc, vif))
1603 ath9k_beacon_config(sc, vif, changed);
1604 }
1605
1606 if (changed & BSS_CHANGED_ERP_SLOT) {
1607 if (bss_conf->use_short_slot)
1608 slottime = 9;
1609 else
1610 slottime = 20;
1611 if (vif->type == NL80211_IFTYPE_AP) {
1612 /*
1613 * Defer update, so that connected stations can adjust
1614 * their settings at the same time.
1615 * See beacon.c for more details
1616 */
1617 sc->beacon.slottime = slottime;
1618 sc->beacon.updateslot = UPDATE;
1619 } else {
1620 ah->slottime = slottime;
1621 ath9k_hw_init_global_settings(ah);
1622 }
1623 }
1624
1625 if (changed & CHECK_ANI)
1626 ath_check_ani(sc);
1627
1628 mutex_unlock(&sc->mutex);
1629 ath9k_ps_restore(sc);
1630
1631 #undef CHECK_ANI
1632 }
1633
1634 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1635 {
1636 struct ath_softc *sc = hw->priv;
1637 u64 tsf;
1638
1639 mutex_lock(&sc->mutex);
1640 ath9k_ps_wakeup(sc);
1641 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1642 ath9k_ps_restore(sc);
1643 mutex_unlock(&sc->mutex);
1644
1645 return tsf;
1646 }
1647
1648 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1649 struct ieee80211_vif *vif,
1650 u64 tsf)
1651 {
1652 struct ath_softc *sc = hw->priv;
1653
1654 mutex_lock(&sc->mutex);
1655 ath9k_ps_wakeup(sc);
1656 ath9k_hw_settsf64(sc->sc_ah, tsf);
1657 ath9k_ps_restore(sc);
1658 mutex_unlock(&sc->mutex);
1659 }
1660
1661 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1662 {
1663 struct ath_softc *sc = hw->priv;
1664
1665 mutex_lock(&sc->mutex);
1666
1667 ath9k_ps_wakeup(sc);
1668 ath9k_hw_reset_tsf(sc->sc_ah);
1669 ath9k_ps_restore(sc);
1670
1671 mutex_unlock(&sc->mutex);
1672 }
1673
1674 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1675 struct ieee80211_vif *vif,
1676 enum ieee80211_ampdu_mlme_action action,
1677 struct ieee80211_sta *sta,
1678 u16 tid, u16 *ssn, u8 buf_size)
1679 {
1680 struct ath_softc *sc = hw->priv;
1681 int ret = 0;
1682
1683 local_bh_disable();
1684
1685 switch (action) {
1686 case IEEE80211_AMPDU_RX_START:
1687 break;
1688 case IEEE80211_AMPDU_RX_STOP:
1689 break;
1690 case IEEE80211_AMPDU_TX_START:
1691 ath9k_ps_wakeup(sc);
1692 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1693 if (!ret)
1694 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1695 ath9k_ps_restore(sc);
1696 break;
1697 case IEEE80211_AMPDU_TX_STOP_CONT:
1698 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1699 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1700 ath9k_ps_wakeup(sc);
1701 ath_tx_aggr_stop(sc, sta, tid);
1702 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1703 ath9k_ps_restore(sc);
1704 break;
1705 case IEEE80211_AMPDU_TX_OPERATIONAL:
1706 ath9k_ps_wakeup(sc);
1707 ath_tx_aggr_resume(sc, sta, tid);
1708 ath9k_ps_restore(sc);
1709 break;
1710 default:
1711 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1712 }
1713
1714 local_bh_enable();
1715
1716 return ret;
1717 }
1718
1719 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1720 struct survey_info *survey)
1721 {
1722 struct ath_softc *sc = hw->priv;
1723 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1724 struct ieee80211_supported_band *sband;
1725 struct ieee80211_channel *chan;
1726 unsigned long flags;
1727 int pos;
1728
1729 spin_lock_irqsave(&common->cc_lock, flags);
1730 if (idx == 0)
1731 ath_update_survey_stats(sc);
1732
1733 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1734 if (sband && idx >= sband->n_channels) {
1735 idx -= sband->n_channels;
1736 sband = NULL;
1737 }
1738
1739 if (!sband)
1740 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1741
1742 if (!sband || idx >= sband->n_channels) {
1743 spin_unlock_irqrestore(&common->cc_lock, flags);
1744 return -ENOENT;
1745 }
1746
1747 chan = &sband->channels[idx];
1748 pos = chan->hw_value;
1749 memcpy(survey, &sc->survey[pos], sizeof(*survey));
1750 survey->channel = chan;
1751 spin_unlock_irqrestore(&common->cc_lock, flags);
1752
1753 return 0;
1754 }
1755
1756 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
1757 {
1758 struct ath_softc *sc = hw->priv;
1759 struct ath_hw *ah = sc->sc_ah;
1760
1761 mutex_lock(&sc->mutex);
1762 ah->coverage_class = coverage_class;
1763
1764 ath9k_ps_wakeup(sc);
1765 ath9k_hw_init_global_settings(ah);
1766 ath9k_ps_restore(sc);
1767
1768 mutex_unlock(&sc->mutex);
1769 }
1770
1771 static void ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1772 {
1773 struct ath_softc *sc = hw->priv;
1774 struct ath_hw *ah = sc->sc_ah;
1775 struct ath_common *common = ath9k_hw_common(ah);
1776 int timeout = 200; /* ms */
1777 int i, j;
1778 bool drain_txq;
1779
1780 mutex_lock(&sc->mutex);
1781 cancel_delayed_work_sync(&sc->tx_complete_work);
1782
1783 if (ah->ah_flags & AH_UNPLUGGED) {
1784 ath_dbg(common, ANY, "Device has been unplugged!\n");
1785 mutex_unlock(&sc->mutex);
1786 return;
1787 }
1788
1789 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
1790 ath_dbg(common, ANY, "Device not present\n");
1791 mutex_unlock(&sc->mutex);
1792 return;
1793 }
1794
1795 for (j = 0; j < timeout; j++) {
1796 bool npend = false;
1797
1798 if (j)
1799 usleep_range(1000, 2000);
1800
1801 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1802 if (!ATH_TXQ_SETUP(sc, i))
1803 continue;
1804
1805 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
1806
1807 if (npend)
1808 break;
1809 }
1810
1811 if (!npend)
1812 break;
1813 }
1814
1815 if (drop) {
1816 ath9k_ps_wakeup(sc);
1817 spin_lock_bh(&sc->sc_pcu_lock);
1818 drain_txq = ath_drain_all_txq(sc);
1819 spin_unlock_bh(&sc->sc_pcu_lock);
1820
1821 if (!drain_txq)
1822 ath_reset(sc);
1823
1824 ath9k_ps_restore(sc);
1825 ieee80211_wake_queues(hw);
1826 }
1827
1828 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
1829 mutex_unlock(&sc->mutex);
1830 }
1831
1832 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
1833 {
1834 struct ath_softc *sc = hw->priv;
1835 int i;
1836
1837 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1838 if (!ATH_TXQ_SETUP(sc, i))
1839 continue;
1840
1841 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
1842 return true;
1843 }
1844 return false;
1845 }
1846
1847 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
1848 {
1849 struct ath_softc *sc = hw->priv;
1850 struct ath_hw *ah = sc->sc_ah;
1851 struct ieee80211_vif *vif;
1852 struct ath_vif *avp;
1853 struct ath_buf *bf;
1854 struct ath_tx_status ts;
1855 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1856 int status;
1857
1858 vif = sc->beacon.bslot[0];
1859 if (!vif)
1860 return 0;
1861
1862 if (!vif->bss_conf.enable_beacon)
1863 return 0;
1864
1865 avp = (void *)vif->drv_priv;
1866
1867 if (!sc->beacon.tx_processed && !edma) {
1868 tasklet_disable(&sc->bcon_tasklet);
1869
1870 bf = avp->av_bcbuf;
1871 if (!bf || !bf->bf_mpdu)
1872 goto skip;
1873
1874 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
1875 if (status == -EINPROGRESS)
1876 goto skip;
1877
1878 sc->beacon.tx_processed = true;
1879 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
1880
1881 skip:
1882 tasklet_enable(&sc->bcon_tasklet);
1883 }
1884
1885 return sc->beacon.tx_last;
1886 }
1887
1888 static int ath9k_get_stats(struct ieee80211_hw *hw,
1889 struct ieee80211_low_level_stats *stats)
1890 {
1891 struct ath_softc *sc = hw->priv;
1892 struct ath_hw *ah = sc->sc_ah;
1893 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
1894
1895 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
1896 stats->dot11RTSFailureCount = mib_stats->rts_bad;
1897 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
1898 stats->dot11RTSSuccessCount = mib_stats->rts_good;
1899 return 0;
1900 }
1901
1902 static u32 fill_chainmask(u32 cap, u32 new)
1903 {
1904 u32 filled = 0;
1905 int i;
1906
1907 for (i = 0; cap && new; i++, cap >>= 1) {
1908 if (!(cap & BIT(0)))
1909 continue;
1910
1911 if (new & BIT(0))
1912 filled |= BIT(i);
1913
1914 new >>= 1;
1915 }
1916
1917 return filled;
1918 }
1919
1920 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
1921 {
1922 if (AR_SREV_9300_20_OR_LATER(ah))
1923 return true;
1924
1925 switch (val & 0x7) {
1926 case 0x1:
1927 case 0x3:
1928 case 0x7:
1929 return true;
1930 case 0x2:
1931 return (ah->caps.rx_chainmask == 1);
1932 default:
1933 return false;
1934 }
1935 }
1936
1937 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
1938 {
1939 struct ath_softc *sc = hw->priv;
1940 struct ath_hw *ah = sc->sc_ah;
1941
1942 if (ah->caps.rx_chainmask != 1)
1943 rx_ant |= tx_ant;
1944
1945 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
1946 return -EINVAL;
1947
1948 sc->ant_rx = rx_ant;
1949 sc->ant_tx = tx_ant;
1950
1951 if (ah->caps.rx_chainmask == 1)
1952 return 0;
1953
1954 /* AR9100 runs into calibration issues if not all rx chains are enabled */
1955 if (AR_SREV_9100(ah))
1956 ah->rxchainmask = 0x7;
1957 else
1958 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
1959
1960 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
1961 ath9k_reload_chainmask_settings(sc);
1962
1963 return 0;
1964 }
1965
1966 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
1967 {
1968 struct ath_softc *sc = hw->priv;
1969
1970 *tx_ant = sc->ant_tx;
1971 *rx_ant = sc->ant_rx;
1972 return 0;
1973 }
1974
1975 #ifdef CONFIG_PM_SLEEP
1976
1977 static void ath9k_wow_map_triggers(struct ath_softc *sc,
1978 struct cfg80211_wowlan *wowlan,
1979 u32 *wow_triggers)
1980 {
1981 if (wowlan->disconnect)
1982 *wow_triggers |= AH_WOW_LINK_CHANGE |
1983 AH_WOW_BEACON_MISS;
1984 if (wowlan->magic_pkt)
1985 *wow_triggers |= AH_WOW_MAGIC_PATTERN_EN;
1986
1987 if (wowlan->n_patterns)
1988 *wow_triggers |= AH_WOW_USER_PATTERN_EN;
1989
1990 sc->wow_enabled = *wow_triggers;
1991
1992 }
1993
1994 static void ath9k_wow_add_disassoc_deauth_pattern(struct ath_softc *sc)
1995 {
1996 struct ath_hw *ah = sc->sc_ah;
1997 struct ath_common *common = ath9k_hw_common(ah);
1998 struct ath9k_hw_capabilities *pcaps = &ah->caps;
1999 int pattern_count = 0;
2000 int i, byte_cnt;
2001 u8 dis_deauth_pattern[MAX_PATTERN_SIZE];
2002 u8 dis_deauth_mask[MAX_PATTERN_SIZE];
2003
2004 memset(dis_deauth_pattern, 0, MAX_PATTERN_SIZE);
2005 memset(dis_deauth_mask, 0, MAX_PATTERN_SIZE);
2006
2007 /*
2008 * Create Dissassociate / Deauthenticate packet filter
2009 *
2010 * 2 bytes 2 byte 6 bytes 6 bytes 6 bytes
2011 * +--------------+----------+---------+--------+--------+----
2012 * + Frame Control+ Duration + DA + SA + BSSID +
2013 * +--------------+----------+---------+--------+--------+----
2014 *
2015 * The above is the management frame format for disassociate/
2016 * deauthenticate pattern, from this we need to match the first byte
2017 * of 'Frame Control' and DA, SA, and BSSID fields
2018 * (skipping 2nd byte of FC and Duration feild.
2019 *
2020 * Disassociate pattern
2021 * --------------------
2022 * Frame control = 00 00 1010
2023 * DA, SA, BSSID = x:x:x:x:x:x
2024 * Pattern will be A0000000 | x:x:x:x:x:x | x:x:x:x:x:x
2025 * | x:x:x:x:x:x -- 22 bytes
2026 *
2027 * Deauthenticate pattern
2028 * ----------------------
2029 * Frame control = 00 00 1100
2030 * DA, SA, BSSID = x:x:x:x:x:x
2031 * Pattern will be C0000000 | x:x:x:x:x:x | x:x:x:x:x:x
2032 * | x:x:x:x:x:x -- 22 bytes
2033 */
2034
2035 /* Create Disassociate Pattern first */
2036
2037 byte_cnt = 0;
2038
2039 /* Fill out the mask with all FF's */
2040
2041 for (i = 0; i < MAX_PATTERN_MASK_SIZE; i++)
2042 dis_deauth_mask[i] = 0xff;
2043
2044 /* copy the first byte of frame control field */
2045 dis_deauth_pattern[byte_cnt] = 0xa0;
2046 byte_cnt++;
2047
2048 /* skip 2nd byte of frame control and Duration field */
2049 byte_cnt += 3;
2050
2051 /*
2052 * need not match the destination mac address, it can be a broadcast
2053 * mac address or an unicast to this station
2054 */
2055 byte_cnt += 6;
2056
2057 /* copy the source mac address */
2058 memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
2059
2060 byte_cnt += 6;
2061
2062 /* copy the bssid, its same as the source mac address */
2063
2064 memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
2065
2066 /* Create Disassociate pattern mask */
2067
2068 if (pcaps->hw_caps & ATH9K_HW_WOW_PATTERN_MATCH_EXACT) {
2069
2070 if (pcaps->hw_caps & ATH9K_HW_WOW_PATTERN_MATCH_DWORD) {
2071 /*
2072 * for AR9280, because of hardware limitation, the
2073 * first 4 bytes have to be matched for all patterns.
2074 * the mask for disassociation and de-auth pattern
2075 * matching need to enable the first 4 bytes.
2076 * also the duration field needs to be filled.
2077 */
2078 dis_deauth_mask[0] = 0xf0;
2079
2080 /*
2081 * fill in duration field
2082 FIXME: what is the exact value ?
2083 */
2084 dis_deauth_pattern[2] = 0xff;
2085 dis_deauth_pattern[3] = 0xff;
2086 } else {
2087 dis_deauth_mask[0] = 0xfe;
2088 }
2089
2090 dis_deauth_mask[1] = 0x03;
2091 dis_deauth_mask[2] = 0xc0;
2092 } else {
2093 dis_deauth_mask[0] = 0xef;
2094 dis_deauth_mask[1] = 0x3f;
2095 dis_deauth_mask[2] = 0x00;
2096 dis_deauth_mask[3] = 0xfc;
2097 }
2098
2099 ath_dbg(common, WOW, "Adding disassoc/deauth patterns for WoW\n");
2100
2101 ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
2102 pattern_count, byte_cnt);
2103
2104 pattern_count++;
2105 /*
2106 * for de-authenticate pattern, only the first byte of the frame
2107 * control field gets changed from 0xA0 to 0xC0
2108 */
2109 dis_deauth_pattern[0] = 0xC0;
2110
2111 ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
2112 pattern_count, byte_cnt);
2113
2114 }
2115
2116 static void ath9k_wow_add_pattern(struct ath_softc *sc,
2117 struct cfg80211_wowlan *wowlan)
2118 {
2119 struct ath_hw *ah = sc->sc_ah;
2120 struct ath9k_wow_pattern *wow_pattern = NULL;
2121 struct cfg80211_wowlan_trig_pkt_pattern *patterns = wowlan->patterns;
2122 int mask_len;
2123 s8 i = 0;
2124
2125 if (!wowlan->n_patterns)
2126 return;
2127
2128 /*
2129 * Add the new user configured patterns
2130 */
2131 for (i = 0; i < wowlan->n_patterns; i++) {
2132
2133 wow_pattern = kzalloc(sizeof(*wow_pattern), GFP_KERNEL);
2134
2135 if (!wow_pattern)
2136 return;
2137
2138 /*
2139 * TODO: convert the generic user space pattern to
2140 * appropriate chip specific/802.11 pattern.
2141 */
2142
2143 mask_len = DIV_ROUND_UP(wowlan->patterns[i].pattern_len, 8);
2144 memset(wow_pattern->pattern_bytes, 0, MAX_PATTERN_SIZE);
2145 memset(wow_pattern->mask_bytes, 0, MAX_PATTERN_SIZE);
2146 memcpy(wow_pattern->pattern_bytes, patterns[i].pattern,
2147 patterns[i].pattern_len);
2148 memcpy(wow_pattern->mask_bytes, patterns[i].mask, mask_len);
2149 wow_pattern->pattern_len = patterns[i].pattern_len;
2150
2151 /*
2152 * just need to take care of deauth and disssoc pattern,
2153 * make sure we don't overwrite them.
2154 */
2155
2156 ath9k_hw_wow_apply_pattern(ah, wow_pattern->pattern_bytes,
2157 wow_pattern->mask_bytes,
2158 i + 2,
2159 wow_pattern->pattern_len);
2160 kfree(wow_pattern);
2161
2162 }
2163
2164 }
2165
2166 static int ath9k_suspend(struct ieee80211_hw *hw,
2167 struct cfg80211_wowlan *wowlan)
2168 {
2169 struct ath_softc *sc = hw->priv;
2170 struct ath_hw *ah = sc->sc_ah;
2171 struct ath_common *common = ath9k_hw_common(ah);
2172 u32 wow_triggers_enabled = 0;
2173 int ret = 0;
2174
2175 mutex_lock(&sc->mutex);
2176
2177 ath_cancel_work(sc);
2178 ath_stop_ani(sc);
2179 del_timer_sync(&sc->rx_poll_timer);
2180
2181 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
2182 ath_dbg(common, ANY, "Device not present\n");
2183 ret = -EINVAL;
2184 goto fail_wow;
2185 }
2186
2187 if (WARN_ON(!wowlan)) {
2188 ath_dbg(common, WOW, "None of the WoW triggers enabled\n");
2189 ret = -EINVAL;
2190 goto fail_wow;
2191 }
2192
2193 if (!device_can_wakeup(sc->dev)) {
2194 ath_dbg(common, WOW, "device_can_wakeup failed, WoW is not enabled\n");
2195 ret = 1;
2196 goto fail_wow;
2197 }
2198
2199 /*
2200 * none of the sta vifs are associated
2201 * and we are not currently handling multivif
2202 * cases, for instance we have to seperately
2203 * configure 'keep alive frame' for each
2204 * STA.
2205 */
2206
2207 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
2208 ath_dbg(common, WOW, "None of the STA vifs are associated\n");
2209 ret = 1;
2210 goto fail_wow;
2211 }
2212
2213 if (sc->nvifs > 1) {
2214 ath_dbg(common, WOW, "WoW for multivif is not yet supported\n");
2215 ret = 1;
2216 goto fail_wow;
2217 }
2218
2219 ath9k_wow_map_triggers(sc, wowlan, &wow_triggers_enabled);
2220
2221 ath_dbg(common, WOW, "WoW triggers enabled 0x%x\n",
2222 wow_triggers_enabled);
2223
2224 ath9k_ps_wakeup(sc);
2225
2226 ath9k_stop_btcoex(sc);
2227
2228 /*
2229 * Enable wake up on recieving disassoc/deauth
2230 * frame by default.
2231 */
2232 ath9k_wow_add_disassoc_deauth_pattern(sc);
2233
2234 if (wow_triggers_enabled & AH_WOW_USER_PATTERN_EN)
2235 ath9k_wow_add_pattern(sc, wowlan);
2236
2237 spin_lock_bh(&sc->sc_pcu_lock);
2238 /*
2239 * To avoid false wake, we enable beacon miss interrupt only
2240 * when we go to sleep. We save the current interrupt mask
2241 * so we can restore it after the system wakes up
2242 */
2243 sc->wow_intr_before_sleep = ah->imask;
2244 ah->imask &= ~ATH9K_INT_GLOBAL;
2245 ath9k_hw_disable_interrupts(ah);
2246 ah->imask = ATH9K_INT_BMISS | ATH9K_INT_GLOBAL;
2247 ath9k_hw_set_interrupts(ah);
2248 ath9k_hw_enable_interrupts(ah);
2249
2250 spin_unlock_bh(&sc->sc_pcu_lock);
2251
2252 /*
2253 * we can now sync irq and kill any running tasklets, since we already
2254 * disabled interrupts and not holding a spin lock
2255 */
2256 synchronize_irq(sc->irq);
2257 tasklet_kill(&sc->intr_tq);
2258
2259 ath9k_hw_wow_enable(ah, wow_triggers_enabled);
2260
2261 ath9k_ps_restore(sc);
2262 ath_dbg(common, ANY, "WoW enabled in ath9k\n");
2263 atomic_inc(&sc->wow_sleep_proc_intr);
2264
2265 fail_wow:
2266 mutex_unlock(&sc->mutex);
2267 return ret;
2268 }
2269
2270 static int ath9k_resume(struct ieee80211_hw *hw)
2271 {
2272 struct ath_softc *sc = hw->priv;
2273 struct ath_hw *ah = sc->sc_ah;
2274 struct ath_common *common = ath9k_hw_common(ah);
2275 u32 wow_status;
2276
2277 mutex_lock(&sc->mutex);
2278
2279 ath9k_ps_wakeup(sc);
2280
2281 spin_lock_bh(&sc->sc_pcu_lock);
2282
2283 ath9k_hw_disable_interrupts(ah);
2284 ah->imask = sc->wow_intr_before_sleep;
2285 ath9k_hw_set_interrupts(ah);
2286 ath9k_hw_enable_interrupts(ah);
2287
2288 spin_unlock_bh(&sc->sc_pcu_lock);
2289
2290 wow_status = ath9k_hw_wow_wakeup(ah);
2291
2292 if (atomic_read(&sc->wow_got_bmiss_intr) == 0) {
2293 /*
2294 * some devices may not pick beacon miss
2295 * as the reason they woke up so we add
2296 * that here for that shortcoming.
2297 */
2298 wow_status |= AH_WOW_BEACON_MISS;
2299 atomic_dec(&sc->wow_got_bmiss_intr);
2300 ath_dbg(common, ANY, "Beacon miss interrupt picked up during WoW sleep\n");
2301 }
2302
2303 atomic_dec(&sc->wow_sleep_proc_intr);
2304
2305 if (wow_status) {
2306 ath_dbg(common, ANY, "Waking up due to WoW triggers %s with WoW status = %x\n",
2307 ath9k_hw_wow_event_to_string(wow_status), wow_status);
2308 }
2309
2310 ath_restart_work(sc);
2311 ath9k_start_btcoex(sc);
2312
2313 ath9k_ps_restore(sc);
2314 mutex_unlock(&sc->mutex);
2315
2316 return 0;
2317 }
2318
2319 static void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
2320 {
2321 struct ath_softc *sc = hw->priv;
2322
2323 mutex_lock(&sc->mutex);
2324 device_init_wakeup(sc->dev, 1);
2325 device_set_wakeup_enable(sc->dev, enabled);
2326 mutex_unlock(&sc->mutex);
2327 }
2328
2329 #endif
2330 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2331 {
2332 struct ath_softc *sc = hw->priv;
2333
2334 sc->scanning = 1;
2335 }
2336
2337 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2338 {
2339 struct ath_softc *sc = hw->priv;
2340
2341 sc->scanning = 0;
2342 }
2343
2344 struct ieee80211_ops ath9k_ops = {
2345 .tx = ath9k_tx,
2346 .start = ath9k_start,
2347 .stop = ath9k_stop,
2348 .add_interface = ath9k_add_interface,
2349 .change_interface = ath9k_change_interface,
2350 .remove_interface = ath9k_remove_interface,
2351 .config = ath9k_config,
2352 .configure_filter = ath9k_configure_filter,
2353 .sta_add = ath9k_sta_add,
2354 .sta_remove = ath9k_sta_remove,
2355 .sta_notify = ath9k_sta_notify,
2356 .conf_tx = ath9k_conf_tx,
2357 .bss_info_changed = ath9k_bss_info_changed,
2358 .set_key = ath9k_set_key,
2359 .get_tsf = ath9k_get_tsf,
2360 .set_tsf = ath9k_set_tsf,
2361 .reset_tsf = ath9k_reset_tsf,
2362 .ampdu_action = ath9k_ampdu_action,
2363 .get_survey = ath9k_get_survey,
2364 .rfkill_poll = ath9k_rfkill_poll_state,
2365 .set_coverage_class = ath9k_set_coverage_class,
2366 .flush = ath9k_flush,
2367 .tx_frames_pending = ath9k_tx_frames_pending,
2368 .tx_last_beacon = ath9k_tx_last_beacon,
2369 .get_stats = ath9k_get_stats,
2370 .set_antenna = ath9k_set_antenna,
2371 .get_antenna = ath9k_get_antenna,
2372
2373 #ifdef CONFIG_PM_SLEEP
2374 .suspend = ath9k_suspend,
2375 .resume = ath9k_resume,
2376 .set_wakeup = ath9k_set_wakeup,
2377 #endif
2378
2379 #ifdef CONFIG_ATH9K_DEBUGFS
2380 .get_et_sset_count = ath9k_get_et_sset_count,
2381 .get_et_stats = ath9k_get_et_stats,
2382 .get_et_strings = ath9k_get_et_strings,
2383 #endif
2384
2385 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_DEBUGFS)
2386 .sta_add_debugfs = ath9k_sta_add_debugfs,
2387 .sta_remove_debugfs = ath9k_sta_remove_debugfs,
2388 #endif
2389 .sw_scan_start = ath9k_sw_scan_start,
2390 .sw_scan_complete = ath9k_sw_scan_complete,
2391 };
Linux kernel - Deliverables
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