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Staging: Merge branch 'tidspbridge-for-2.6.39' of git://dev.omapzoom.org/pub/scm...
[deliverable/linux.git] / drivers / net / wireless / ath / ath9k / main.c
1 /*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <linux/nl80211.h>
18 #include "ath9k.h"
19 #include "btcoex.h"
20
21 static void ath_update_txpow(struct ath_softc *sc)
22 {
23 struct ath_hw *ah = sc->sc_ah;
24
25 if (sc->curtxpow != sc->config.txpowlimit) {
26 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
27 /* read back in case value is clamped */
28 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
29 }
30 }
31
32 static u8 parse_mpdudensity(u8 mpdudensity)
33 {
34 /*
35 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
36 * 0 for no restriction
37 * 1 for 1/4 us
38 * 2 for 1/2 us
39 * 3 for 1 us
40 * 4 for 2 us
41 * 5 for 4 us
42 * 6 for 8 us
43 * 7 for 16 us
44 */
45 switch (mpdudensity) {
46 case 0:
47 return 0;
48 case 1:
49 case 2:
50 case 3:
51 /* Our lower layer calculations limit our precision to
52 1 microsecond */
53 return 1;
54 case 4:
55 return 2;
56 case 5:
57 return 4;
58 case 6:
59 return 8;
60 case 7:
61 return 16;
62 default:
63 return 0;
64 }
65 }
66
67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
68 struct ieee80211_hw *hw)
69 {
70 struct ieee80211_channel *curchan = hw->conf.channel;
71 struct ath9k_channel *channel;
72 u8 chan_idx;
73
74 chan_idx = curchan->hw_value;
75 channel = &sc->sc_ah->channels[chan_idx];
76 ath9k_update_ichannel(sc, hw, channel);
77 return channel;
78 }
79
80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
81 {
82 unsigned long flags;
83 bool ret;
84
85 spin_lock_irqsave(&sc->sc_pm_lock, flags);
86 ret = ath9k_hw_setpower(sc->sc_ah, mode);
87 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
88
89 return ret;
90 }
91
92 void ath9k_ps_wakeup(struct ath_softc *sc)
93 {
94 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
95 unsigned long flags;
96 enum ath9k_power_mode power_mode;
97
98 spin_lock_irqsave(&sc->sc_pm_lock, flags);
99 if (++sc->ps_usecount != 1)
100 goto unlock;
101
102 power_mode = sc->sc_ah->power_mode;
103 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
104
105 /*
106 * While the hardware is asleep, the cycle counters contain no
107 * useful data. Better clear them now so that they don't mess up
108 * survey data results.
109 */
110 if (power_mode != ATH9K_PM_AWAKE) {
111 spin_lock(&common->cc_lock);
112 ath_hw_cycle_counters_update(common);
113 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
114 spin_unlock(&common->cc_lock);
115 }
116
117 unlock:
118 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
119 }
120
121 void ath9k_ps_restore(struct ath_softc *sc)
122 {
123 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
124 unsigned long flags;
125
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (--sc->ps_usecount != 0)
128 goto unlock;
129
130 spin_lock(&common->cc_lock);
131 ath_hw_cycle_counters_update(common);
132 spin_unlock(&common->cc_lock);
133
134 if (sc->ps_idle)
135 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
136 else if (sc->ps_enabled &&
137 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
138 PS_WAIT_FOR_CAB |
139 PS_WAIT_FOR_PSPOLL_DATA |
140 PS_WAIT_FOR_TX_ACK)))
141 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
142
143 unlock:
144 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
145 }
146
147 static void ath_start_ani(struct ath_common *common)
148 {
149 struct ath_hw *ah = common->ah;
150 unsigned long timestamp = jiffies_to_msecs(jiffies);
151 struct ath_softc *sc = (struct ath_softc *) common->priv;
152
153 if (!(sc->sc_flags & SC_OP_ANI_RUN))
154 return;
155
156 if (sc->sc_flags & SC_OP_OFFCHANNEL)
157 return;
158
159 common->ani.longcal_timer = timestamp;
160 common->ani.shortcal_timer = timestamp;
161 common->ani.checkani_timer = timestamp;
162
163 mod_timer(&common->ani.timer,
164 jiffies +
165 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
166 }
167
168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
169 {
170 struct ath_hw *ah = sc->sc_ah;
171 struct ath9k_channel *chan = &ah->channels[channel];
172 struct survey_info *survey = &sc->survey[channel];
173
174 if (chan->noisefloor) {
175 survey->filled |= SURVEY_INFO_NOISE_DBM;
176 survey->noise = chan->noisefloor;
177 }
178 }
179
180 static void ath_update_survey_stats(struct ath_softc *sc)
181 {
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
188
189 if (!ah->curchan)
190 return;
191
192 if (ah->power_mode == ATH9K_PM_AWAKE)
193 ath_hw_cycle_counters_update(common);
194
195 if (cc->cycles > 0) {
196 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
197 SURVEY_INFO_CHANNEL_TIME_BUSY |
198 SURVEY_INFO_CHANNEL_TIME_RX |
199 SURVEY_INFO_CHANNEL_TIME_TX;
200 survey->channel_time += cc->cycles / div;
201 survey->channel_time_busy += cc->rx_busy / div;
202 survey->channel_time_rx += cc->rx_frame / div;
203 survey->channel_time_tx += cc->tx_frame / div;
204 }
205 memset(cc, 0, sizeof(*cc));
206
207 ath_update_survey_nf(sc, pos);
208 }
209
210 /*
211 * Set/change channels. If the channel is really being changed, it's done
212 * by reseting the chip. To accomplish this we must first cleanup any pending
213 * DMA, then restart stuff.
214 */
215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
216 struct ath9k_channel *hchan)
217 {
218 struct ath_wiphy *aphy = hw->priv;
219 struct ath_hw *ah = sc->sc_ah;
220 struct ath_common *common = ath9k_hw_common(ah);
221 struct ieee80211_conf *conf = &common->hw->conf;
222 bool fastcc = true, stopped;
223 struct ieee80211_channel *channel = hw->conf.channel;
224 struct ath9k_hw_cal_data *caldata = NULL;
225 int r;
226
227 if (sc->sc_flags & SC_OP_INVALID)
228 return -EIO;
229
230 del_timer_sync(&common->ani.timer);
231 cancel_work_sync(&sc->paprd_work);
232 cancel_work_sync(&sc->hw_check_work);
233 cancel_delayed_work_sync(&sc->tx_complete_work);
234
235 ath9k_ps_wakeup(sc);
236
237 spin_lock_bh(&sc->sc_pcu_lock);
238
239 /*
240 * This is only performed if the channel settings have
241 * actually changed.
242 *
243 * To switch channels clear any pending DMA operations;
244 * wait long enough for the RX fifo to drain, reset the
245 * hardware at the new frequency, and then re-enable
246 * the relevant bits of the h/w.
247 */
248 ath9k_hw_disable_interrupts(ah);
249 stopped = ath_drain_all_txq(sc, false);
250
251 if (!ath_stoprecv(sc))
252 stopped = false;
253
254 /* XXX: do not flush receive queue here. We don't want
255 * to flush data frames already in queue because of
256 * changing channel. */
257
258 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
259 fastcc = false;
260
261 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
262 caldata = &aphy->caldata;
263
264 ath_dbg(common, ATH_DBG_CONFIG,
265 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
266 sc->sc_ah->curchan->channel,
267 channel->center_freq, conf_is_ht40(conf),
268 fastcc);
269
270 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
271 if (r) {
272 ath_err(common,
273 "Unable to reset channel (%u MHz), reset status %d\n",
274 channel->center_freq, r);
275 goto ps_restore;
276 }
277
278 if (ath_startrecv(sc) != 0) {
279 ath_err(common, "Unable to restart recv logic\n");
280 r = -EIO;
281 goto ps_restore;
282 }
283
284 ath_update_txpow(sc);
285 ath9k_hw_set_interrupts(ah, ah->imask);
286
287 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
288 if (sc->sc_flags & SC_OP_BEACONS)
289 ath_beacon_config(sc, NULL);
290 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
291 ath_start_ani(common);
292 }
293
294 ps_restore:
295 spin_unlock_bh(&sc->sc_pcu_lock);
296
297 ath9k_ps_restore(sc);
298 return r;
299 }
300
301 static void ath_paprd_activate(struct ath_softc *sc)
302 {
303 struct ath_hw *ah = sc->sc_ah;
304 struct ath9k_hw_cal_data *caldata = ah->caldata;
305 struct ath_common *common = ath9k_hw_common(ah);
306 int chain;
307
308 if (!caldata || !caldata->paprd_done)
309 return;
310
311 ath9k_ps_wakeup(sc);
312 ar9003_paprd_enable(ah, false);
313 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
314 if (!(common->tx_chainmask & BIT(chain)))
315 continue;
316
317 ar9003_paprd_populate_single_table(ah, caldata, chain);
318 }
319
320 ar9003_paprd_enable(ah, true);
321 ath9k_ps_restore(sc);
322 }
323
324 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
325 {
326 struct ieee80211_hw *hw = sc->hw;
327 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
328 struct ath_tx_control txctl;
329 int time_left;
330
331 memset(&txctl, 0, sizeof(txctl));
332 txctl.txq = sc->tx.txq_map[WME_AC_BE];
333
334 memset(tx_info, 0, sizeof(*tx_info));
335 tx_info->band = hw->conf.channel->band;
336 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
337 tx_info->control.rates[0].idx = 0;
338 tx_info->control.rates[0].count = 1;
339 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
340 tx_info->control.rates[1].idx = -1;
341
342 init_completion(&sc->paprd_complete);
343 sc->paprd_pending = true;
344 txctl.paprd = BIT(chain);
345 if (ath_tx_start(hw, skb, &txctl) != 0)
346 return false;
347
348 time_left = wait_for_completion_timeout(&sc->paprd_complete,
349 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
350 sc->paprd_pending = false;
351
352 if (!time_left)
353 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
354 "Timeout waiting for paprd training on TX chain %d\n",
355 chain);
356
357 return !!time_left;
358 }
359
360 void ath_paprd_calibrate(struct work_struct *work)
361 {
362 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
363 struct ieee80211_hw *hw = sc->hw;
364 struct ath_hw *ah = sc->sc_ah;
365 struct ieee80211_hdr *hdr;
366 struct sk_buff *skb = NULL;
367 struct ath9k_hw_cal_data *caldata = ah->caldata;
368 struct ath_common *common = ath9k_hw_common(ah);
369 int ftype;
370 int chain_ok = 0;
371 int chain;
372 int len = 1800;
373
374 if (!caldata)
375 return;
376
377 if (ar9003_paprd_init_table(ah) < 0)
378 return;
379
380 skb = alloc_skb(len, GFP_KERNEL);
381 if (!skb)
382 return;
383
384 skb_put(skb, len);
385 memset(skb->data, 0, len);
386 hdr = (struct ieee80211_hdr *)skb->data;
387 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
388 hdr->frame_control = cpu_to_le16(ftype);
389 hdr->duration_id = cpu_to_le16(10);
390 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
391 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
392 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
393
394 ath9k_ps_wakeup(sc);
395 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
396 if (!(common->tx_chainmask & BIT(chain)))
397 continue;
398
399 chain_ok = 0;
400
401 ath_dbg(common, ATH_DBG_CALIBRATE,
402 "Sending PAPRD frame for thermal measurement "
403 "on chain %d\n", chain);
404 if (!ath_paprd_send_frame(sc, skb, chain))
405 goto fail_paprd;
406
407 ar9003_paprd_setup_gain_table(ah, chain);
408
409 ath_dbg(common, ATH_DBG_CALIBRATE,
410 "Sending PAPRD training frame on chain %d\n", chain);
411 if (!ath_paprd_send_frame(sc, skb, chain))
412 goto fail_paprd;
413
414 if (!ar9003_paprd_is_done(ah))
415 break;
416
417 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
418 break;
419
420 chain_ok = 1;
421 }
422 kfree_skb(skb);
423
424 if (chain_ok) {
425 caldata->paprd_done = true;
426 ath_paprd_activate(sc);
427 }
428
429 fail_paprd:
430 ath9k_ps_restore(sc);
431 }
432
433 /*
434 * This routine performs the periodic noise floor calibration function
435 * that is used to adjust and optimize the chip performance. This
436 * takes environmental changes (location, temperature) into account.
437 * When the task is complete, it reschedules itself depending on the
438 * appropriate interval that was calculated.
439 */
440 void ath_ani_calibrate(unsigned long data)
441 {
442 struct ath_softc *sc = (struct ath_softc *)data;
443 struct ath_hw *ah = sc->sc_ah;
444 struct ath_common *common = ath9k_hw_common(ah);
445 bool longcal = false;
446 bool shortcal = false;
447 bool aniflag = false;
448 unsigned int timestamp = jiffies_to_msecs(jiffies);
449 u32 cal_interval, short_cal_interval, long_cal_interval;
450 unsigned long flags;
451
452 if (ah->caldata && ah->caldata->nfcal_interference)
453 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
454 else
455 long_cal_interval = ATH_LONG_CALINTERVAL;
456
457 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
458 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
459
460 /* Only calibrate if awake */
461 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
462 goto set_timer;
463
464 ath9k_ps_wakeup(sc);
465
466 /* Long calibration runs independently of short calibration. */
467 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
468 longcal = true;
469 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
470 common->ani.longcal_timer = timestamp;
471 }
472
473 /* Short calibration applies only while caldone is false */
474 if (!common->ani.caldone) {
475 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
476 shortcal = true;
477 ath_dbg(common, ATH_DBG_ANI,
478 "shortcal @%lu\n", jiffies);
479 common->ani.shortcal_timer = timestamp;
480 common->ani.resetcal_timer = timestamp;
481 }
482 } else {
483 if ((timestamp - common->ani.resetcal_timer) >=
484 ATH_RESTART_CALINTERVAL) {
485 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
486 if (common->ani.caldone)
487 common->ani.resetcal_timer = timestamp;
488 }
489 }
490
491 /* Verify whether we must check ANI */
492 if ((timestamp - common->ani.checkani_timer) >=
493 ah->config.ani_poll_interval) {
494 aniflag = true;
495 common->ani.checkani_timer = timestamp;
496 }
497
498 /* Skip all processing if there's nothing to do. */
499 if (longcal || shortcal || aniflag) {
500 /* Call ANI routine if necessary */
501 if (aniflag) {
502 spin_lock_irqsave(&common->cc_lock, flags);
503 ath9k_hw_ani_monitor(ah, ah->curchan);
504 ath_update_survey_stats(sc);
505 spin_unlock_irqrestore(&common->cc_lock, flags);
506 }
507
508 /* Perform calibration if necessary */
509 if (longcal || shortcal) {
510 common->ani.caldone =
511 ath9k_hw_calibrate(ah,
512 ah->curchan,
513 common->rx_chainmask,
514 longcal);
515 }
516 }
517
518 ath9k_ps_restore(sc);
519
520 set_timer:
521 /*
522 * Set timer interval based on previous results.
523 * The interval must be the shortest necessary to satisfy ANI,
524 * short calibration and long calibration.
525 */
526 cal_interval = ATH_LONG_CALINTERVAL;
527 if (sc->sc_ah->config.enable_ani)
528 cal_interval = min(cal_interval,
529 (u32)ah->config.ani_poll_interval);
530 if (!common->ani.caldone)
531 cal_interval = min(cal_interval, (u32)short_cal_interval);
532
533 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
534 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
535 if (!ah->caldata->paprd_done)
536 ieee80211_queue_work(sc->hw, &sc->paprd_work);
537 else if (!ah->paprd_table_write_done)
538 ath_paprd_activate(sc);
539 }
540 }
541
542 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
543 {
544 struct ath_node *an;
545 struct ath_hw *ah = sc->sc_ah;
546 an = (struct ath_node *)sta->drv_priv;
547
548 if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
549 sc->sc_flags |= SC_OP_ENABLE_APM;
550
551 if (sc->sc_flags & SC_OP_TXAGGR) {
552 ath_tx_node_init(sc, an);
553 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
554 sta->ht_cap.ampdu_factor);
555 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
556 }
557 }
558
559 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
560 {
561 struct ath_node *an = (struct ath_node *)sta->drv_priv;
562
563 if (sc->sc_flags & SC_OP_TXAGGR)
564 ath_tx_node_cleanup(sc, an);
565 }
566
567 void ath_hw_check(struct work_struct *work)
568 {
569 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
570 int i;
571
572 ath9k_ps_wakeup(sc);
573
574 for (i = 0; i < 3; i++) {
575 if (ath9k_hw_check_alive(sc->sc_ah))
576 goto out;
577
578 msleep(1);
579 }
580 ath_reset(sc, true);
581
582 out:
583 ath9k_ps_restore(sc);
584 }
585
586 void ath9k_tasklet(unsigned long data)
587 {
588 struct ath_softc *sc = (struct ath_softc *)data;
589 struct ath_hw *ah = sc->sc_ah;
590 struct ath_common *common = ath9k_hw_common(ah);
591
592 u32 status = sc->intrstatus;
593 u32 rxmask;
594
595 if (status & ATH9K_INT_FATAL) {
596 ath_reset(sc, true);
597 return;
598 }
599
600 ath9k_ps_wakeup(sc);
601 spin_lock(&sc->sc_pcu_lock);
602
603 if (!ath9k_hw_check_alive(ah))
604 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
605
606 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
607 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
608 ATH9K_INT_RXORN);
609 else
610 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
611
612 if (status & rxmask) {
613 /* Check for high priority Rx first */
614 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
615 (status & ATH9K_INT_RXHP))
616 ath_rx_tasklet(sc, 0, true);
617
618 ath_rx_tasklet(sc, 0, false);
619 }
620
621 if (status & ATH9K_INT_TX) {
622 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
623 ath_tx_edma_tasklet(sc);
624 else
625 ath_tx_tasklet(sc);
626 }
627
628 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
629 /*
630 * TSF sync does not look correct; remain awake to sync with
631 * the next Beacon.
632 */
633 ath_dbg(common, ATH_DBG_PS,
634 "TSFOOR - Sync with next Beacon\n");
635 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
636 }
637
638 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
639 if (status & ATH9K_INT_GENTIMER)
640 ath_gen_timer_isr(sc->sc_ah);
641
642 /* re-enable hardware interrupt */
643 ath9k_hw_enable_interrupts(ah);
644
645 spin_unlock(&sc->sc_pcu_lock);
646 ath9k_ps_restore(sc);
647 }
648
649 irqreturn_t ath_isr(int irq, void *dev)
650 {
651 #define SCHED_INTR ( \
652 ATH9K_INT_FATAL | \
653 ATH9K_INT_RXORN | \
654 ATH9K_INT_RXEOL | \
655 ATH9K_INT_RX | \
656 ATH9K_INT_RXLP | \
657 ATH9K_INT_RXHP | \
658 ATH9K_INT_TX | \
659 ATH9K_INT_BMISS | \
660 ATH9K_INT_CST | \
661 ATH9K_INT_TSFOOR | \
662 ATH9K_INT_GENTIMER)
663
664 struct ath_softc *sc = dev;
665 struct ath_hw *ah = sc->sc_ah;
666 struct ath_common *common = ath9k_hw_common(ah);
667 enum ath9k_int status;
668 bool sched = false;
669
670 /*
671 * The hardware is not ready/present, don't
672 * touch anything. Note this can happen early
673 * on if the IRQ is shared.
674 */
675 if (sc->sc_flags & SC_OP_INVALID)
676 return IRQ_NONE;
677
678
679 /* shared irq, not for us */
680
681 if (!ath9k_hw_intrpend(ah))
682 return IRQ_NONE;
683
684 /*
685 * Figure out the reason(s) for the interrupt. Note
686 * that the hal returns a pseudo-ISR that may include
687 * bits we haven't explicitly enabled so we mask the
688 * value to insure we only process bits we requested.
689 */
690 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
691 status &= ah->imask; /* discard unasked-for bits */
692
693 /*
694 * If there are no status bits set, then this interrupt was not
695 * for me (should have been caught above).
696 */
697 if (!status)
698 return IRQ_NONE;
699
700 /* Cache the status */
701 sc->intrstatus = status;
702
703 if (status & SCHED_INTR)
704 sched = true;
705
706 /*
707 * If a FATAL or RXORN interrupt is received, we have to reset the
708 * chip immediately.
709 */
710 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
711 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
712 goto chip_reset;
713
714 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
715 (status & ATH9K_INT_BB_WATCHDOG)) {
716
717 spin_lock(&common->cc_lock);
718 ath_hw_cycle_counters_update(common);
719 ar9003_hw_bb_watchdog_dbg_info(ah);
720 spin_unlock(&common->cc_lock);
721
722 goto chip_reset;
723 }
724
725 if (status & ATH9K_INT_SWBA)
726 tasklet_schedule(&sc->bcon_tasklet);
727
728 if (status & ATH9K_INT_TXURN)
729 ath9k_hw_updatetxtriglevel(ah, true);
730
731 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
732 if (status & ATH9K_INT_RXEOL) {
733 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
734 ath9k_hw_set_interrupts(ah, ah->imask);
735 }
736 }
737
738 if (status & ATH9K_INT_MIB) {
739 /*
740 * Disable interrupts until we service the MIB
741 * interrupt; otherwise it will continue to
742 * fire.
743 */
744 ath9k_hw_disable_interrupts(ah);
745 /*
746 * Let the hal handle the event. We assume
747 * it will clear whatever condition caused
748 * the interrupt.
749 */
750 spin_lock(&common->cc_lock);
751 ath9k_hw_proc_mib_event(ah);
752 spin_unlock(&common->cc_lock);
753 ath9k_hw_enable_interrupts(ah);
754 }
755
756 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
757 if (status & ATH9K_INT_TIM_TIMER) {
758 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
759 goto chip_reset;
760 /* Clear RxAbort bit so that we can
761 * receive frames */
762 ath9k_setpower(sc, ATH9K_PM_AWAKE);
763 ath9k_hw_setrxabort(sc->sc_ah, 0);
764 sc->ps_flags |= PS_WAIT_FOR_BEACON;
765 }
766
767 chip_reset:
768
769 ath_debug_stat_interrupt(sc, status);
770
771 if (sched) {
772 /* turn off every interrupt */
773 ath9k_hw_disable_interrupts(ah);
774 tasklet_schedule(&sc->intr_tq);
775 }
776
777 return IRQ_HANDLED;
778
779 #undef SCHED_INTR
780 }
781
782 static u32 ath_get_extchanmode(struct ath_softc *sc,
783 struct ieee80211_channel *chan,
784 enum nl80211_channel_type channel_type)
785 {
786 u32 chanmode = 0;
787
788 switch (chan->band) {
789 case IEEE80211_BAND_2GHZ:
790 switch(channel_type) {
791 case NL80211_CHAN_NO_HT:
792 case NL80211_CHAN_HT20:
793 chanmode = CHANNEL_G_HT20;
794 break;
795 case NL80211_CHAN_HT40PLUS:
796 chanmode = CHANNEL_G_HT40PLUS;
797 break;
798 case NL80211_CHAN_HT40MINUS:
799 chanmode = CHANNEL_G_HT40MINUS;
800 break;
801 }
802 break;
803 case IEEE80211_BAND_5GHZ:
804 switch(channel_type) {
805 case NL80211_CHAN_NO_HT:
806 case NL80211_CHAN_HT20:
807 chanmode = CHANNEL_A_HT20;
808 break;
809 case NL80211_CHAN_HT40PLUS:
810 chanmode = CHANNEL_A_HT40PLUS;
811 break;
812 case NL80211_CHAN_HT40MINUS:
813 chanmode = CHANNEL_A_HT40MINUS;
814 break;
815 }
816 break;
817 default:
818 break;
819 }
820
821 return chanmode;
822 }
823
824 static void ath9k_bss_assoc_info(struct ath_softc *sc,
825 struct ieee80211_hw *hw,
826 struct ieee80211_vif *vif,
827 struct ieee80211_bss_conf *bss_conf)
828 {
829 struct ath_wiphy *aphy = hw->priv;
830 struct ath_hw *ah = sc->sc_ah;
831 struct ath_common *common = ath9k_hw_common(ah);
832
833 if (bss_conf->assoc) {
834 ath_dbg(common, ATH_DBG_CONFIG,
835 "Bss Info ASSOC %d, bssid: %pM\n",
836 bss_conf->aid, common->curbssid);
837
838 /* New association, store aid */
839 common->curaid = bss_conf->aid;
840 ath9k_hw_write_associd(ah);
841
842 /*
843 * Request a re-configuration of Beacon related timers
844 * on the receipt of the first Beacon frame (i.e.,
845 * after time sync with the AP).
846 */
847 sc->ps_flags |= PS_BEACON_SYNC;
848
849 /* Configure the beacon */
850 ath_beacon_config(sc, vif);
851
852 /* Reset rssi stats */
853 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
854 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
855
856 sc->sc_flags |= SC_OP_ANI_RUN;
857 ath_start_ani(common);
858 } else {
859 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
860 common->curaid = 0;
861 /* Stop ANI */
862 sc->sc_flags &= ~SC_OP_ANI_RUN;
863 del_timer_sync(&common->ani.timer);
864 }
865 }
866
867 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
868 {
869 struct ath_hw *ah = sc->sc_ah;
870 struct ath_common *common = ath9k_hw_common(ah);
871 struct ieee80211_channel *channel = hw->conf.channel;
872 int r;
873
874 ath9k_ps_wakeup(sc);
875 spin_lock_bh(&sc->sc_pcu_lock);
876
877 ath9k_hw_configpcipowersave(ah, 0, 0);
878
879 if (!ah->curchan)
880 ah->curchan = ath_get_curchannel(sc, sc->hw);
881
882 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
883 if (r) {
884 ath_err(common,
885 "Unable to reset channel (%u MHz), reset status %d\n",
886 channel->center_freq, r);
887 }
888
889 ath_update_txpow(sc);
890 if (ath_startrecv(sc) != 0) {
891 ath_err(common, "Unable to restart recv logic\n");
892 goto out;
893 }
894 if (sc->sc_flags & SC_OP_BEACONS)
895 ath_beacon_config(sc, NULL); /* restart beacons */
896
897 /* Re-Enable interrupts */
898 ath9k_hw_set_interrupts(ah, ah->imask);
899
900 /* Enable LED */
901 ath9k_hw_cfg_output(ah, ah->led_pin,
902 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
903 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
904
905 ieee80211_wake_queues(hw);
906 out:
907 spin_unlock_bh(&sc->sc_pcu_lock);
908
909 ath9k_ps_restore(sc);
910 }
911
912 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
913 {
914 struct ath_hw *ah = sc->sc_ah;
915 struct ieee80211_channel *channel = hw->conf.channel;
916 int r;
917
918 ath9k_ps_wakeup(sc);
919 spin_lock_bh(&sc->sc_pcu_lock);
920
921 ieee80211_stop_queues(hw);
922
923 /*
924 * Keep the LED on when the radio is disabled
925 * during idle unassociated state.
926 */
927 if (!sc->ps_idle) {
928 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
929 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
930 }
931
932 /* Disable interrupts */
933 ath9k_hw_disable_interrupts(ah);
934
935 ath_drain_all_txq(sc, false); /* clear pending tx frames */
936
937 ath_stoprecv(sc); /* turn off frame recv */
938 ath_flushrecv(sc); /* flush recv queue */
939
940 if (!ah->curchan)
941 ah->curchan = ath_get_curchannel(sc, hw);
942
943 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
944 if (r) {
945 ath_err(ath9k_hw_common(sc->sc_ah),
946 "Unable to reset channel (%u MHz), reset status %d\n",
947 channel->center_freq, r);
948 }
949
950 ath9k_hw_phy_disable(ah);
951
952 ath9k_hw_configpcipowersave(ah, 1, 1);
953
954 spin_unlock_bh(&sc->sc_pcu_lock);
955 ath9k_ps_restore(sc);
956
957 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
958 }
959
960 int ath_reset(struct ath_softc *sc, bool retry_tx)
961 {
962 struct ath_hw *ah = sc->sc_ah;
963 struct ath_common *common = ath9k_hw_common(ah);
964 struct ieee80211_hw *hw = sc->hw;
965 int r;
966
967 /* Stop ANI */
968 del_timer_sync(&common->ani.timer);
969
970 ath9k_ps_wakeup(sc);
971 spin_lock_bh(&sc->sc_pcu_lock);
972
973 ieee80211_stop_queues(hw);
974
975 ath9k_hw_disable_interrupts(ah);
976 ath_drain_all_txq(sc, retry_tx);
977
978 ath_stoprecv(sc);
979 ath_flushrecv(sc);
980
981 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
982 if (r)
983 ath_err(common,
984 "Unable to reset hardware; reset status %d\n", r);
985
986 if (ath_startrecv(sc) != 0)
987 ath_err(common, "Unable to start recv logic\n");
988
989 /*
990 * We may be doing a reset in response to a request
991 * that changes the channel so update any state that
992 * might change as a result.
993 */
994 ath_update_txpow(sc);
995
996 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
997 ath_beacon_config(sc, NULL); /* restart beacons */
998
999 ath9k_hw_set_interrupts(ah, ah->imask);
1000
1001 if (retry_tx) {
1002 int i;
1003 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1004 if (ATH_TXQ_SETUP(sc, i)) {
1005 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1006 ath_txq_schedule(sc, &sc->tx.txq[i]);
1007 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1008 }
1009 }
1010 }
1011
1012 ieee80211_wake_queues(hw);
1013 spin_unlock_bh(&sc->sc_pcu_lock);
1014
1015 /* Start ANI */
1016 ath_start_ani(common);
1017 ath9k_ps_restore(sc);
1018
1019 return r;
1020 }
1021
1022 /* XXX: Remove me once we don't depend on ath9k_channel for all
1023 * this redundant data */
1024 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1025 struct ath9k_channel *ichan)
1026 {
1027 struct ieee80211_channel *chan = hw->conf.channel;
1028 struct ieee80211_conf *conf = &hw->conf;
1029
1030 ichan->channel = chan->center_freq;
1031 ichan->chan = chan;
1032
1033 if (chan->band == IEEE80211_BAND_2GHZ) {
1034 ichan->chanmode = CHANNEL_G;
1035 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1036 } else {
1037 ichan->chanmode = CHANNEL_A;
1038 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1039 }
1040
1041 if (conf_is_ht(conf))
1042 ichan->chanmode = ath_get_extchanmode(sc, chan,
1043 conf->channel_type);
1044 }
1045
1046 /**********************/
1047 /* mac80211 callbacks */
1048 /**********************/
1049
1050 static int ath9k_start(struct ieee80211_hw *hw)
1051 {
1052 struct ath_wiphy *aphy = hw->priv;
1053 struct ath_softc *sc = aphy->sc;
1054 struct ath_hw *ah = sc->sc_ah;
1055 struct ath_common *common = ath9k_hw_common(ah);
1056 struct ieee80211_channel *curchan = hw->conf.channel;
1057 struct ath9k_channel *init_channel;
1058 int r;
1059
1060 ath_dbg(common, ATH_DBG_CONFIG,
1061 "Starting driver with initial channel: %d MHz\n",
1062 curchan->center_freq);
1063
1064 mutex_lock(&sc->mutex);
1065
1066 if (ath9k_wiphy_started(sc)) {
1067 if (sc->chan_idx == curchan->hw_value) {
1068 /*
1069 * Already on the operational channel, the new wiphy
1070 * can be marked active.
1071 */
1072 aphy->state = ATH_WIPHY_ACTIVE;
1073 ieee80211_wake_queues(hw);
1074 } else {
1075 /*
1076 * Another wiphy is on another channel, start the new
1077 * wiphy in paused state.
1078 */
1079 aphy->state = ATH_WIPHY_PAUSED;
1080 ieee80211_stop_queues(hw);
1081 }
1082 mutex_unlock(&sc->mutex);
1083 return 0;
1084 }
1085 aphy->state = ATH_WIPHY_ACTIVE;
1086
1087 /* setup initial channel */
1088
1089 sc->chan_idx = curchan->hw_value;
1090
1091 init_channel = ath_get_curchannel(sc, hw);
1092
1093 /* Reset SERDES registers */
1094 ath9k_hw_configpcipowersave(ah, 0, 0);
1095
1096 /*
1097 * The basic interface to setting the hardware in a good
1098 * state is ``reset''. On return the hardware is known to
1099 * be powered up and with interrupts disabled. This must
1100 * be followed by initialization of the appropriate bits
1101 * and then setup of the interrupt mask.
1102 */
1103 spin_lock_bh(&sc->sc_pcu_lock);
1104 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1105 if (r) {
1106 ath_err(common,
1107 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1108 r, curchan->center_freq);
1109 spin_unlock_bh(&sc->sc_pcu_lock);
1110 goto mutex_unlock;
1111 }
1112
1113 /*
1114 * This is needed only to setup initial state
1115 * but it's best done after a reset.
1116 */
1117 ath_update_txpow(sc);
1118
1119 /*
1120 * Setup the hardware after reset:
1121 * The receive engine is set going.
1122 * Frame transmit is handled entirely
1123 * in the frame output path; there's nothing to do
1124 * here except setup the interrupt mask.
1125 */
1126 if (ath_startrecv(sc) != 0) {
1127 ath_err(common, "Unable to start recv logic\n");
1128 r = -EIO;
1129 spin_unlock_bh(&sc->sc_pcu_lock);
1130 goto mutex_unlock;
1131 }
1132 spin_unlock_bh(&sc->sc_pcu_lock);
1133
1134 /* Setup our intr mask. */
1135 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1136 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1137 ATH9K_INT_GLOBAL;
1138
1139 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1140 ah->imask |= ATH9K_INT_RXHP |
1141 ATH9K_INT_RXLP |
1142 ATH9K_INT_BB_WATCHDOG;
1143 else
1144 ah->imask |= ATH9K_INT_RX;
1145
1146 ah->imask |= ATH9K_INT_GTT;
1147
1148 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1149 ah->imask |= ATH9K_INT_CST;
1150
1151 sc->sc_flags &= ~SC_OP_INVALID;
1152 sc->sc_ah->is_monitoring = false;
1153
1154 /* Disable BMISS interrupt when we're not associated */
1155 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1156 ath9k_hw_set_interrupts(ah, ah->imask);
1157
1158 ieee80211_wake_queues(hw);
1159
1160 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1161
1162 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1163 !ah->btcoex_hw.enabled) {
1164 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1165 AR_STOMP_LOW_WLAN_WGHT);
1166 ath9k_hw_btcoex_enable(ah);
1167
1168 if (common->bus_ops->bt_coex_prep)
1169 common->bus_ops->bt_coex_prep(common);
1170 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1171 ath9k_btcoex_timer_resume(sc);
1172 }
1173
1174 /* User has the option to provide pm-qos value as a module
1175 * parameter rather than using the default value of
1176 * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
1177 */
1178 pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
1179
1180 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1181 common->bus_ops->extn_synch_en(common);
1182
1183 mutex_unlock:
1184 mutex_unlock(&sc->mutex);
1185
1186 return r;
1187 }
1188
1189 static int ath9k_tx(struct ieee80211_hw *hw,
1190 struct sk_buff *skb)
1191 {
1192 struct ath_wiphy *aphy = hw->priv;
1193 struct ath_softc *sc = aphy->sc;
1194 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1195 struct ath_tx_control txctl;
1196 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1197
1198 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1199 ath_dbg(common, ATH_DBG_XMIT,
1200 "ath9k: %s: TX in unexpected wiphy state %d\n",
1201 wiphy_name(hw->wiphy), aphy->state);
1202 goto exit;
1203 }
1204
1205 if (sc->ps_enabled) {
1206 /*
1207 * mac80211 does not set PM field for normal data frames, so we
1208 * need to update that based on the current PS mode.
1209 */
1210 if (ieee80211_is_data(hdr->frame_control) &&
1211 !ieee80211_is_nullfunc(hdr->frame_control) &&
1212 !ieee80211_has_pm(hdr->frame_control)) {
1213 ath_dbg(common, ATH_DBG_PS,
1214 "Add PM=1 for a TX frame while in PS mode\n");
1215 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1216 }
1217 }
1218
1219 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1220 /*
1221 * We are using PS-Poll and mac80211 can request TX while in
1222 * power save mode. Need to wake up hardware for the TX to be
1223 * completed and if needed, also for RX of buffered frames.
1224 */
1225 ath9k_ps_wakeup(sc);
1226 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1227 ath9k_hw_setrxabort(sc->sc_ah, 0);
1228 if (ieee80211_is_pspoll(hdr->frame_control)) {
1229 ath_dbg(common, ATH_DBG_PS,
1230 "Sending PS-Poll to pick a buffered frame\n");
1231 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1232 } else {
1233 ath_dbg(common, ATH_DBG_PS,
1234 "Wake up to complete TX\n");
1235 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1236 }
1237 /*
1238 * The actual restore operation will happen only after
1239 * the sc_flags bit is cleared. We are just dropping
1240 * the ps_usecount here.
1241 */
1242 ath9k_ps_restore(sc);
1243 }
1244
1245 memset(&txctl, 0, sizeof(struct ath_tx_control));
1246 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1247
1248 ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1249
1250 if (ath_tx_start(hw, skb, &txctl) != 0) {
1251 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1252 goto exit;
1253 }
1254
1255 return 0;
1256 exit:
1257 dev_kfree_skb_any(skb);
1258 return 0;
1259 }
1260
1261 static void ath9k_stop(struct ieee80211_hw *hw)
1262 {
1263 struct ath_wiphy *aphy = hw->priv;
1264 struct ath_softc *sc = aphy->sc;
1265 struct ath_hw *ah = sc->sc_ah;
1266 struct ath_common *common = ath9k_hw_common(ah);
1267 int i;
1268
1269 mutex_lock(&sc->mutex);
1270
1271 aphy->state = ATH_WIPHY_INACTIVE;
1272
1273 if (led_blink)
1274 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1275
1276 cancel_delayed_work_sync(&sc->tx_complete_work);
1277 cancel_work_sync(&sc->paprd_work);
1278 cancel_work_sync(&sc->hw_check_work);
1279
1280 for (i = 0; i < sc->num_sec_wiphy; i++) {
1281 if (sc->sec_wiphy[i])
1282 break;
1283 }
1284
1285 if (i == sc->num_sec_wiphy) {
1286 cancel_delayed_work_sync(&sc->wiphy_work);
1287 cancel_work_sync(&sc->chan_work);
1288 }
1289
1290 if (sc->sc_flags & SC_OP_INVALID) {
1291 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1292 mutex_unlock(&sc->mutex);
1293 return;
1294 }
1295
1296 if (ath9k_wiphy_started(sc)) {
1297 mutex_unlock(&sc->mutex);
1298 return; /* another wiphy still in use */
1299 }
1300
1301 /* Ensure HW is awake when we try to shut it down. */
1302 ath9k_ps_wakeup(sc);
1303
1304 if (ah->btcoex_hw.enabled) {
1305 ath9k_hw_btcoex_disable(ah);
1306 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1307 ath9k_btcoex_timer_pause(sc);
1308 }
1309
1310 spin_lock_bh(&sc->sc_pcu_lock);
1311
1312 /* make sure h/w will not generate any interrupt
1313 * before setting the invalid flag. */
1314 ath9k_hw_disable_interrupts(ah);
1315
1316 if (!(sc->sc_flags & SC_OP_INVALID)) {
1317 ath_drain_all_txq(sc, false);
1318 ath_stoprecv(sc);
1319 ath9k_hw_phy_disable(ah);
1320 } else
1321 sc->rx.rxlink = NULL;
1322
1323 /* disable HAL and put h/w to sleep */
1324 ath9k_hw_disable(ah);
1325 ath9k_hw_configpcipowersave(ah, 1, 1);
1326
1327 spin_unlock_bh(&sc->sc_pcu_lock);
1328
1329 ath9k_ps_restore(sc);
1330
1331 sc->ps_idle = true;
1332 ath9k_set_wiphy_idle(aphy, true);
1333 ath_radio_disable(sc, hw);
1334
1335 sc->sc_flags |= SC_OP_INVALID;
1336
1337 pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1338
1339 mutex_unlock(&sc->mutex);
1340
1341 ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1342 }
1343
1344 static int ath9k_add_interface(struct ieee80211_hw *hw,
1345 struct ieee80211_vif *vif)
1346 {
1347 struct ath_wiphy *aphy = hw->priv;
1348 struct ath_softc *sc = aphy->sc;
1349 struct ath_hw *ah = sc->sc_ah;
1350 struct ath_common *common = ath9k_hw_common(ah);
1351 struct ath_vif *avp = (void *)vif->drv_priv;
1352 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1353 int ret = 0;
1354
1355 mutex_lock(&sc->mutex);
1356
1357 switch (vif->type) {
1358 case NL80211_IFTYPE_STATION:
1359 ic_opmode = NL80211_IFTYPE_STATION;
1360 break;
1361 case NL80211_IFTYPE_WDS:
1362 ic_opmode = NL80211_IFTYPE_WDS;
1363 break;
1364 case NL80211_IFTYPE_ADHOC:
1365 case NL80211_IFTYPE_AP:
1366 case NL80211_IFTYPE_MESH_POINT:
1367 if (sc->nbcnvifs >= ATH_BCBUF) {
1368 ret = -ENOBUFS;
1369 goto out;
1370 }
1371 ic_opmode = vif->type;
1372 break;
1373 default:
1374 ath_err(common, "Interface type %d not yet supported\n",
1375 vif->type);
1376 ret = -EOPNOTSUPP;
1377 goto out;
1378 }
1379
1380 ath_dbg(common, ATH_DBG_CONFIG,
1381 "Attach a VIF of type: %d\n", ic_opmode);
1382
1383 /* Set the VIF opmode */
1384 avp->av_opmode = ic_opmode;
1385 avp->av_bslot = -1;
1386
1387 sc->nvifs++;
1388
1389 ath9k_set_bssid_mask(hw, vif);
1390
1391 if (sc->nvifs > 1)
1392 goto out; /* skip global settings for secondary vif */
1393
1394 if (ic_opmode == NL80211_IFTYPE_AP) {
1395 ath9k_hw_set_tsfadjust(ah, 1);
1396 sc->sc_flags |= SC_OP_TSF_RESET;
1397 }
1398
1399 /* Set the device opmode */
1400 ah->opmode = ic_opmode;
1401
1402 /*
1403 * Enable MIB interrupts when there are hardware phy counters.
1404 * Note we only do this (at the moment) for station mode.
1405 */
1406 if ((vif->type == NL80211_IFTYPE_STATION) ||
1407 (vif->type == NL80211_IFTYPE_ADHOC) ||
1408 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1409 if (ah->config.enable_ani)
1410 ah->imask |= ATH9K_INT_MIB;
1411 ah->imask |= ATH9K_INT_TSFOOR;
1412 }
1413
1414 ath9k_hw_set_interrupts(ah, ah->imask);
1415
1416 if (vif->type == NL80211_IFTYPE_AP ||
1417 vif->type == NL80211_IFTYPE_ADHOC) {
1418 sc->sc_flags |= SC_OP_ANI_RUN;
1419 ath_start_ani(common);
1420 }
1421
1422 out:
1423 mutex_unlock(&sc->mutex);
1424 return ret;
1425 }
1426
1427 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1428 struct ieee80211_vif *vif)
1429 {
1430 struct ath_vif *avp = (void *)vif->drv_priv;
1431
1432 /* Disable SWBA interrupt */
1433 sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1434 ath9k_ps_wakeup(sc);
1435 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1436 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1437 tasklet_kill(&sc->bcon_tasklet);
1438 ath9k_ps_restore(sc);
1439
1440 ath_beacon_return(sc, avp);
1441 sc->sc_flags &= ~SC_OP_BEACONS;
1442
1443 if (sc->nbcnvifs > 0) {
1444 /* Re-enable beaconing */
1445 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1446 ath9k_ps_wakeup(sc);
1447 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1448 ath9k_ps_restore(sc);
1449 }
1450 }
1451
1452 static int ath9k_change_interface(struct ieee80211_hw *hw,
1453 struct ieee80211_vif *vif,
1454 enum nl80211_iftype new_type,
1455 bool p2p)
1456 {
1457 struct ath_wiphy *aphy = hw->priv;
1458 struct ath_softc *sc = aphy->sc;
1459 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1460 int ret = 0;
1461
1462 ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1463 mutex_lock(&sc->mutex);
1464
1465 switch (new_type) {
1466 case NL80211_IFTYPE_AP:
1467 case NL80211_IFTYPE_ADHOC:
1468 if (sc->nbcnvifs >= ATH_BCBUF) {
1469 ath_err(common, "No beacon slot available\n");
1470 ret = -ENOBUFS;
1471 goto out;
1472 }
1473 break;
1474 case NL80211_IFTYPE_STATION:
1475 /* Stop ANI */
1476 sc->sc_flags &= ~SC_OP_ANI_RUN;
1477 del_timer_sync(&common->ani.timer);
1478 if ((vif->type == NL80211_IFTYPE_AP) ||
1479 (vif->type == NL80211_IFTYPE_ADHOC))
1480 ath9k_reclaim_beacon(sc, vif);
1481 break;
1482 default:
1483 ath_err(common, "Interface type %d not yet supported\n",
1484 vif->type);
1485 ret = -ENOTSUPP;
1486 goto out;
1487 }
1488 vif->type = new_type;
1489 vif->p2p = p2p;
1490
1491 out:
1492 mutex_unlock(&sc->mutex);
1493 return ret;
1494 }
1495
1496 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1497 struct ieee80211_vif *vif)
1498 {
1499 struct ath_wiphy *aphy = hw->priv;
1500 struct ath_softc *sc = aphy->sc;
1501 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1502
1503 ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1504
1505 mutex_lock(&sc->mutex);
1506
1507 /* Stop ANI */
1508 sc->sc_flags &= ~SC_OP_ANI_RUN;
1509 del_timer_sync(&common->ani.timer);
1510
1511 /* Reclaim beacon resources */
1512 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1513 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1514 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT))
1515 ath9k_reclaim_beacon(sc, vif);
1516
1517 sc->nvifs--;
1518
1519 mutex_unlock(&sc->mutex);
1520 }
1521
1522 static void ath9k_enable_ps(struct ath_softc *sc)
1523 {
1524 struct ath_hw *ah = sc->sc_ah;
1525
1526 sc->ps_enabled = true;
1527 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1528 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1529 ah->imask |= ATH9K_INT_TIM_TIMER;
1530 ath9k_hw_set_interrupts(ah, ah->imask);
1531 }
1532 ath9k_hw_setrxabort(ah, 1);
1533 }
1534 }
1535
1536 static void ath9k_disable_ps(struct ath_softc *sc)
1537 {
1538 struct ath_hw *ah = sc->sc_ah;
1539
1540 sc->ps_enabled = false;
1541 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1542 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1543 ath9k_hw_setrxabort(ah, 0);
1544 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1545 PS_WAIT_FOR_CAB |
1546 PS_WAIT_FOR_PSPOLL_DATA |
1547 PS_WAIT_FOR_TX_ACK);
1548 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1549 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1550 ath9k_hw_set_interrupts(ah, ah->imask);
1551 }
1552 }
1553
1554 }
1555
1556 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1557 {
1558 struct ath_wiphy *aphy = hw->priv;
1559 struct ath_softc *sc = aphy->sc;
1560 struct ath_hw *ah = sc->sc_ah;
1561 struct ath_common *common = ath9k_hw_common(ah);
1562 struct ieee80211_conf *conf = &hw->conf;
1563 bool disable_radio;
1564
1565 mutex_lock(&sc->mutex);
1566
1567 /*
1568 * Leave this as the first check because we need to turn on the
1569 * radio if it was disabled before prior to processing the rest
1570 * of the changes. Likewise we must only disable the radio towards
1571 * the end.
1572 */
1573 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1574 bool enable_radio;
1575 bool all_wiphys_idle;
1576 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1577
1578 spin_lock_bh(&sc->wiphy_lock);
1579 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1580 ath9k_set_wiphy_idle(aphy, idle);
1581
1582 enable_radio = (!idle && all_wiphys_idle);
1583
1584 /*
1585 * After we unlock here its possible another wiphy
1586 * can be re-renabled so to account for that we will
1587 * only disable the radio toward the end of this routine
1588 * if by then all wiphys are still idle.
1589 */
1590 spin_unlock_bh(&sc->wiphy_lock);
1591
1592 if (enable_radio) {
1593 sc->ps_idle = false;
1594 ath_radio_enable(sc, hw);
1595 ath_dbg(common, ATH_DBG_CONFIG,
1596 "not-idle: enabling radio\n");
1597 }
1598 }
1599
1600 /*
1601 * We just prepare to enable PS. We have to wait until our AP has
1602 * ACK'd our null data frame to disable RX otherwise we'll ignore
1603 * those ACKs and end up retransmitting the same null data frames.
1604 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1605 */
1606 if (changed & IEEE80211_CONF_CHANGE_PS) {
1607 unsigned long flags;
1608 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1609 if (conf->flags & IEEE80211_CONF_PS)
1610 ath9k_enable_ps(sc);
1611 else
1612 ath9k_disable_ps(sc);
1613 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1614 }
1615
1616 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1617 if (conf->flags & IEEE80211_CONF_MONITOR) {
1618 ath_dbg(common, ATH_DBG_CONFIG,
1619 "Monitor mode is enabled\n");
1620 sc->sc_ah->is_monitoring = true;
1621 } else {
1622 ath_dbg(common, ATH_DBG_CONFIG,
1623 "Monitor mode is disabled\n");
1624 sc->sc_ah->is_monitoring = false;
1625 }
1626 }
1627
1628 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1629 struct ieee80211_channel *curchan = hw->conf.channel;
1630 int pos = curchan->hw_value;
1631 int old_pos = -1;
1632 unsigned long flags;
1633
1634 if (ah->curchan)
1635 old_pos = ah->curchan - &ah->channels[0];
1636
1637 aphy->chan_idx = pos;
1638 aphy->chan_is_ht = conf_is_ht(conf);
1639 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1640 sc->sc_flags |= SC_OP_OFFCHANNEL;
1641 else
1642 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1643
1644 if (aphy->state == ATH_WIPHY_SCAN ||
1645 aphy->state == ATH_WIPHY_ACTIVE)
1646 ath9k_wiphy_pause_all_forced(sc, aphy);
1647 else {
1648 /*
1649 * Do not change operational channel based on a paused
1650 * wiphy changes.
1651 */
1652 goto skip_chan_change;
1653 }
1654
1655 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1656 curchan->center_freq);
1657
1658 /* XXX: remove me eventualy */
1659 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1660
1661 /* update survey stats for the old channel before switching */
1662 spin_lock_irqsave(&common->cc_lock, flags);
1663 ath_update_survey_stats(sc);
1664 spin_unlock_irqrestore(&common->cc_lock, flags);
1665
1666 /*
1667 * If the operating channel changes, change the survey in-use flags
1668 * along with it.
1669 * Reset the survey data for the new channel, unless we're switching
1670 * back to the operating channel from an off-channel operation.
1671 */
1672 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1673 sc->cur_survey != &sc->survey[pos]) {
1674
1675 if (sc->cur_survey)
1676 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1677
1678 sc->cur_survey = &sc->survey[pos];
1679
1680 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1681 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1682 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1683 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1684 }
1685
1686 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1687 ath_err(common, "Unable to set channel\n");
1688 mutex_unlock(&sc->mutex);
1689 return -EINVAL;
1690 }
1691
1692 /*
1693 * The most recent snapshot of channel->noisefloor for the old
1694 * channel is only available after the hardware reset. Copy it to
1695 * the survey stats now.
1696 */
1697 if (old_pos >= 0)
1698 ath_update_survey_nf(sc, old_pos);
1699 }
1700
1701 skip_chan_change:
1702 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1703 sc->config.txpowlimit = 2 * conf->power_level;
1704 ath9k_ps_wakeup(sc);
1705 ath_update_txpow(sc);
1706 ath9k_ps_restore(sc);
1707 }
1708
1709 spin_lock_bh(&sc->wiphy_lock);
1710 disable_radio = ath9k_all_wiphys_idle(sc);
1711 spin_unlock_bh(&sc->wiphy_lock);
1712
1713 if (disable_radio) {
1714 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1715 sc->ps_idle = true;
1716 ath_radio_disable(sc, hw);
1717 }
1718
1719 mutex_unlock(&sc->mutex);
1720
1721 return 0;
1722 }
1723
1724 #define SUPPORTED_FILTERS \
1725 (FIF_PROMISC_IN_BSS | \
1726 FIF_ALLMULTI | \
1727 FIF_CONTROL | \
1728 FIF_PSPOLL | \
1729 FIF_OTHER_BSS | \
1730 FIF_BCN_PRBRESP_PROMISC | \
1731 FIF_PROBE_REQ | \
1732 FIF_FCSFAIL)
1733
1734 /* FIXME: sc->sc_full_reset ? */
1735 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1736 unsigned int changed_flags,
1737 unsigned int *total_flags,
1738 u64 multicast)
1739 {
1740 struct ath_wiphy *aphy = hw->priv;
1741 struct ath_softc *sc = aphy->sc;
1742 u32 rfilt;
1743
1744 changed_flags &= SUPPORTED_FILTERS;
1745 *total_flags &= SUPPORTED_FILTERS;
1746
1747 sc->rx.rxfilter = *total_flags;
1748 ath9k_ps_wakeup(sc);
1749 rfilt = ath_calcrxfilter(sc);
1750 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1751 ath9k_ps_restore(sc);
1752
1753 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1754 "Set HW RX filter: 0x%x\n", rfilt);
1755 }
1756
1757 static int ath9k_sta_add(struct ieee80211_hw *hw,
1758 struct ieee80211_vif *vif,
1759 struct ieee80211_sta *sta)
1760 {
1761 struct ath_wiphy *aphy = hw->priv;
1762 struct ath_softc *sc = aphy->sc;
1763
1764 ath_node_attach(sc, sta);
1765
1766 return 0;
1767 }
1768
1769 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1770 struct ieee80211_vif *vif,
1771 struct ieee80211_sta *sta)
1772 {
1773 struct ath_wiphy *aphy = hw->priv;
1774 struct ath_softc *sc = aphy->sc;
1775
1776 ath_node_detach(sc, sta);
1777
1778 return 0;
1779 }
1780
1781 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1782 const struct ieee80211_tx_queue_params *params)
1783 {
1784 struct ath_wiphy *aphy = hw->priv;
1785 struct ath_softc *sc = aphy->sc;
1786 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1787 struct ath_txq *txq;
1788 struct ath9k_tx_queue_info qi;
1789 int ret = 0;
1790
1791 if (queue >= WME_NUM_AC)
1792 return 0;
1793
1794 txq = sc->tx.txq_map[queue];
1795
1796 mutex_lock(&sc->mutex);
1797
1798 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1799
1800 qi.tqi_aifs = params->aifs;
1801 qi.tqi_cwmin = params->cw_min;
1802 qi.tqi_cwmax = params->cw_max;
1803 qi.tqi_burstTime = params->txop;
1804
1805 ath_dbg(common, ATH_DBG_CONFIG,
1806 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1807 queue, txq->axq_qnum, params->aifs, params->cw_min,
1808 params->cw_max, params->txop);
1809
1810 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1811 if (ret)
1812 ath_err(common, "TXQ Update failed\n");
1813
1814 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1815 if (queue == WME_AC_BE && !ret)
1816 ath_beaconq_config(sc);
1817
1818 mutex_unlock(&sc->mutex);
1819
1820 return ret;
1821 }
1822
1823 static int ath9k_set_key(struct ieee80211_hw *hw,
1824 enum set_key_cmd cmd,
1825 struct ieee80211_vif *vif,
1826 struct ieee80211_sta *sta,
1827 struct ieee80211_key_conf *key)
1828 {
1829 struct ath_wiphy *aphy = hw->priv;
1830 struct ath_softc *sc = aphy->sc;
1831 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1832 int ret = 0;
1833
1834 if (ath9k_modparam_nohwcrypt)
1835 return -ENOSPC;
1836
1837 mutex_lock(&sc->mutex);
1838 ath9k_ps_wakeup(sc);
1839 ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1840
1841 switch (cmd) {
1842 case SET_KEY:
1843 ret = ath_key_config(common, vif, sta, key);
1844 if (ret >= 0) {
1845 key->hw_key_idx = ret;
1846 /* push IV and Michael MIC generation to stack */
1847 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1848 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1849 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1850 if (sc->sc_ah->sw_mgmt_crypto &&
1851 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1852 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1853 ret = 0;
1854 }
1855 break;
1856 case DISABLE_KEY:
1857 ath_key_delete(common, key);
1858 break;
1859 default:
1860 ret = -EINVAL;
1861 }
1862
1863 ath9k_ps_restore(sc);
1864 mutex_unlock(&sc->mutex);
1865
1866 return ret;
1867 }
1868
1869 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1870 struct ieee80211_vif *vif,
1871 struct ieee80211_bss_conf *bss_conf,
1872 u32 changed)
1873 {
1874 struct ath_wiphy *aphy = hw->priv;
1875 struct ath_softc *sc = aphy->sc;
1876 struct ath_hw *ah = sc->sc_ah;
1877 struct ath_common *common = ath9k_hw_common(ah);
1878 struct ath_vif *avp = (void *)vif->drv_priv;
1879 int slottime;
1880 int error;
1881
1882 mutex_lock(&sc->mutex);
1883
1884 if (changed & BSS_CHANGED_BSSID) {
1885 /* Set BSSID */
1886 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1887 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1888 common->curaid = 0;
1889 ath9k_hw_write_associd(ah);
1890
1891 /* Set aggregation protection mode parameters */
1892 sc->config.ath_aggr_prot = 0;
1893
1894 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1895 common->curbssid, common->curaid);
1896
1897 /* need to reconfigure the beacon */
1898 sc->sc_flags &= ~SC_OP_BEACONS ;
1899 }
1900
1901 /* Enable transmission of beacons (AP, IBSS, MESH) */
1902 if ((changed & BSS_CHANGED_BEACON) ||
1903 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1904 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1905 error = ath_beacon_alloc(aphy, vif);
1906 if (!error)
1907 ath_beacon_config(sc, vif);
1908 }
1909
1910 if (changed & BSS_CHANGED_ERP_SLOT) {
1911 if (bss_conf->use_short_slot)
1912 slottime = 9;
1913 else
1914 slottime = 20;
1915 if (vif->type == NL80211_IFTYPE_AP) {
1916 /*
1917 * Defer update, so that connected stations can adjust
1918 * their settings at the same time.
1919 * See beacon.c for more details
1920 */
1921 sc->beacon.slottime = slottime;
1922 sc->beacon.updateslot = UPDATE;
1923 } else {
1924 ah->slottime = slottime;
1925 ath9k_hw_init_global_settings(ah);
1926 }
1927 }
1928
1929 /* Disable transmission of beacons */
1930 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1931 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1932
1933 if (changed & BSS_CHANGED_BEACON_INT) {
1934 sc->beacon_interval = bss_conf->beacon_int;
1935 /*
1936 * In case of AP mode, the HW TSF has to be reset
1937 * when the beacon interval changes.
1938 */
1939 if (vif->type == NL80211_IFTYPE_AP) {
1940 sc->sc_flags |= SC_OP_TSF_RESET;
1941 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1942 error = ath_beacon_alloc(aphy, vif);
1943 if (!error)
1944 ath_beacon_config(sc, vif);
1945 } else {
1946 ath_beacon_config(sc, vif);
1947 }
1948 }
1949
1950 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1951 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1952 bss_conf->use_short_preamble);
1953 if (bss_conf->use_short_preamble)
1954 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1955 else
1956 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1957 }
1958
1959 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1960 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1961 bss_conf->use_cts_prot);
1962 if (bss_conf->use_cts_prot &&
1963 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1964 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1965 else
1966 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1967 }
1968
1969 if (changed & BSS_CHANGED_ASSOC) {
1970 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1971 bss_conf->assoc);
1972 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1973 }
1974
1975 mutex_unlock(&sc->mutex);
1976 }
1977
1978 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1979 {
1980 u64 tsf;
1981 struct ath_wiphy *aphy = hw->priv;
1982 struct ath_softc *sc = aphy->sc;
1983
1984 mutex_lock(&sc->mutex);
1985 ath9k_ps_wakeup(sc);
1986 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1987 ath9k_ps_restore(sc);
1988 mutex_unlock(&sc->mutex);
1989
1990 return tsf;
1991 }
1992
1993 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1994 {
1995 struct ath_wiphy *aphy = hw->priv;
1996 struct ath_softc *sc = aphy->sc;
1997
1998 mutex_lock(&sc->mutex);
1999 ath9k_ps_wakeup(sc);
2000 ath9k_hw_settsf64(sc->sc_ah, tsf);
2001 ath9k_ps_restore(sc);
2002 mutex_unlock(&sc->mutex);
2003 }
2004
2005 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2006 {
2007 struct ath_wiphy *aphy = hw->priv;
2008 struct ath_softc *sc = aphy->sc;
2009
2010 mutex_lock(&sc->mutex);
2011
2012 ath9k_ps_wakeup(sc);
2013 ath9k_hw_reset_tsf(sc->sc_ah);
2014 ath9k_ps_restore(sc);
2015
2016 mutex_unlock(&sc->mutex);
2017 }
2018
2019 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2020 struct ieee80211_vif *vif,
2021 enum ieee80211_ampdu_mlme_action action,
2022 struct ieee80211_sta *sta,
2023 u16 tid, u16 *ssn)
2024 {
2025 struct ath_wiphy *aphy = hw->priv;
2026 struct ath_softc *sc = aphy->sc;
2027 int ret = 0;
2028
2029 local_bh_disable();
2030
2031 switch (action) {
2032 case IEEE80211_AMPDU_RX_START:
2033 if (!(sc->sc_flags & SC_OP_RXAGGR))
2034 ret = -ENOTSUPP;
2035 break;
2036 case IEEE80211_AMPDU_RX_STOP:
2037 break;
2038 case IEEE80211_AMPDU_TX_START:
2039 if (!(sc->sc_flags & SC_OP_TXAGGR))
2040 return -EOPNOTSUPP;
2041
2042 ath9k_ps_wakeup(sc);
2043 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2044 if (!ret)
2045 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2046 ath9k_ps_restore(sc);
2047 break;
2048 case IEEE80211_AMPDU_TX_STOP:
2049 ath9k_ps_wakeup(sc);
2050 ath_tx_aggr_stop(sc, sta, tid);
2051 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2052 ath9k_ps_restore(sc);
2053 break;
2054 case IEEE80211_AMPDU_TX_OPERATIONAL:
2055 ath9k_ps_wakeup(sc);
2056 ath_tx_aggr_resume(sc, sta, tid);
2057 ath9k_ps_restore(sc);
2058 break;
2059 default:
2060 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2061 }
2062
2063 local_bh_enable();
2064
2065 return ret;
2066 }
2067
2068 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2069 struct survey_info *survey)
2070 {
2071 struct ath_wiphy *aphy = hw->priv;
2072 struct ath_softc *sc = aphy->sc;
2073 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2074 struct ieee80211_supported_band *sband;
2075 struct ieee80211_channel *chan;
2076 unsigned long flags;
2077 int pos;
2078
2079 spin_lock_irqsave(&common->cc_lock, flags);
2080 if (idx == 0)
2081 ath_update_survey_stats(sc);
2082
2083 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2084 if (sband && idx >= sband->n_channels) {
2085 idx -= sband->n_channels;
2086 sband = NULL;
2087 }
2088
2089 if (!sband)
2090 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2091
2092 if (!sband || idx >= sband->n_channels) {
2093 spin_unlock_irqrestore(&common->cc_lock, flags);
2094 return -ENOENT;
2095 }
2096
2097 chan = &sband->channels[idx];
2098 pos = chan->hw_value;
2099 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2100 survey->channel = chan;
2101 spin_unlock_irqrestore(&common->cc_lock, flags);
2102
2103 return 0;
2104 }
2105
2106 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2107 {
2108 struct ath_wiphy *aphy = hw->priv;
2109 struct ath_softc *sc = aphy->sc;
2110
2111 mutex_lock(&sc->mutex);
2112 if (ath9k_wiphy_scanning(sc)) {
2113 /*
2114 * There is a race here in mac80211 but fixing it requires
2115 * we revisit how we handle the scan complete callback.
2116 * After mac80211 fixes we will not have configured hardware
2117 * to the home channel nor would we have configured the RX
2118 * filter yet.
2119 */
2120 mutex_unlock(&sc->mutex);
2121 return;
2122 }
2123
2124 aphy->state = ATH_WIPHY_SCAN;
2125 ath9k_wiphy_pause_all_forced(sc, aphy);
2126 mutex_unlock(&sc->mutex);
2127 }
2128
2129 /*
2130 * XXX: this requires a revisit after the driver
2131 * scan_complete gets moved to another place/removed in mac80211.
2132 */
2133 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2134 {
2135 struct ath_wiphy *aphy = hw->priv;
2136 struct ath_softc *sc = aphy->sc;
2137
2138 mutex_lock(&sc->mutex);
2139 aphy->state = ATH_WIPHY_ACTIVE;
2140 mutex_unlock(&sc->mutex);
2141 }
2142
2143 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2144 {
2145 struct ath_wiphy *aphy = hw->priv;
2146 struct ath_softc *sc = aphy->sc;
2147 struct ath_hw *ah = sc->sc_ah;
2148
2149 mutex_lock(&sc->mutex);
2150 ah->coverage_class = coverage_class;
2151 ath9k_hw_init_global_settings(ah);
2152 mutex_unlock(&sc->mutex);
2153 }
2154
2155 struct ieee80211_ops ath9k_ops = {
2156 .tx = ath9k_tx,
2157 .start = ath9k_start,
2158 .stop = ath9k_stop,
2159 .add_interface = ath9k_add_interface,
2160 .change_interface = ath9k_change_interface,
2161 .remove_interface = ath9k_remove_interface,
2162 .config = ath9k_config,
2163 .configure_filter = ath9k_configure_filter,
2164 .sta_add = ath9k_sta_add,
2165 .sta_remove = ath9k_sta_remove,
2166 .conf_tx = ath9k_conf_tx,
2167 .bss_info_changed = ath9k_bss_info_changed,
2168 .set_key = ath9k_set_key,
2169 .get_tsf = ath9k_get_tsf,
2170 .set_tsf = ath9k_set_tsf,
2171 .reset_tsf = ath9k_reset_tsf,
2172 .ampdu_action = ath9k_ampdu_action,
2173 .get_survey = ath9k_get_survey,
2174 .sw_scan_start = ath9k_sw_scan_start,
2175 .sw_scan_complete = ath9k_sw_scan_complete,
2176 .rfkill_poll = ath9k_rfkill_poll_state,
2177 .set_coverage_class = ath9k_set_coverage_class,
2178 };
Linux kernel - Deliverables
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