2 * Copyright (c) 2010-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/dma-mapping.h>
18 #include <linux/slab.h>
23 static const u8 ath_mci_duty_cycle
[] = { 55, 50, 60, 70, 80, 85, 90, 95, 98 };
25 static struct ath_mci_profile_info
*
26 ath_mci_find_profile(struct ath_mci_profile
*mci
,
27 struct ath_mci_profile_info
*info
)
29 struct ath_mci_profile_info
*entry
;
31 if (list_empty(&mci
->info
))
34 list_for_each_entry(entry
, &mci
->info
, list
) {
35 if (entry
->conn_handle
== info
->conn_handle
)
41 static bool ath_mci_add_profile(struct ath_common
*common
,
42 struct ath_mci_profile
*mci
,
43 struct ath_mci_profile_info
*info
)
45 struct ath_mci_profile_info
*entry
;
47 if ((mci
->num_sco
== ATH_MCI_MAX_SCO_PROFILE
) &&
48 (info
->type
== MCI_GPM_COEX_PROFILE_VOICE
))
51 if (((NUM_PROF(mci
) - mci
->num_sco
) == ATH_MCI_MAX_ACL_PROFILE
) &&
52 (info
->type
!= MCI_GPM_COEX_PROFILE_VOICE
))
55 entry
= kzalloc(sizeof(*entry
), GFP_ATOMIC
);
59 memcpy(entry
, info
, 10);
61 list_add_tail(&entry
->list
, &mci
->info
);
66 static void ath_mci_del_profile(struct ath_common
*common
,
67 struct ath_mci_profile
*mci
,
68 struct ath_mci_profile_info
*entry
)
74 list_del(&entry
->list
);
78 void ath_mci_flush_profile(struct ath_mci_profile
*mci
)
80 struct ath_mci_profile_info
*info
, *tinfo
;
85 if (list_empty(&mci
->info
))
88 list_for_each_entry_safe(info
, tinfo
, &mci
->info
, list
) {
89 list_del(&info
->list
);
95 static void ath_mci_adjust_aggr_limit(struct ath_btcoex
*btcoex
)
97 struct ath_mci_profile
*mci
= &btcoex
->mci
;
98 u32 wlan_airtime
= btcoex
->btcoex_period
*
99 (100 - btcoex
->duty_cycle
) / 100;
102 * Scale: wlan_airtime is in ms, aggr_limit is in 0.25 ms.
103 * When wlan_airtime is less than 4ms, aggregation limit has to be
104 * adjusted half of wlan_airtime to ensure that the aggregation can fit
105 * without collision with BT traffic.
107 if ((wlan_airtime
<= 4) &&
108 (!mci
->aggr_limit
|| (mci
->aggr_limit
> (2 * wlan_airtime
))))
109 mci
->aggr_limit
= 2 * wlan_airtime
;
112 static void ath_mci_update_scheme(struct ath_softc
*sc
)
114 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
115 struct ath_btcoex
*btcoex
= &sc
->btcoex
;
116 struct ath_mci_profile
*mci
= &btcoex
->mci
;
117 struct ath9k_hw_mci
*mci_hw
= &sc
->sc_ah
->btcoex_hw
.mci
;
118 struct ath_mci_profile_info
*info
;
119 u32 num_profile
= NUM_PROF(mci
);
121 if (mci_hw
->config
& ATH_MCI_CONFIG_DISABLE_TUNING
)
125 btcoex
->duty_cycle
= ath_mci_duty_cycle
[num_profile
];
126 btcoex
->btcoex_period
= ATH_MCI_DEF_BT_PERIOD
;
128 btcoex
->bt_stomp_type
= ATH_BTCOEX_STOMP_LOW
;
130 btcoex
->bt_stomp_type
= mci
->num_mgmt
? ATH_BTCOEX_STOMP_ALL
:
131 ATH_BTCOEX_STOMP_LOW
;
133 if (num_profile
== 1) {
134 info
= list_first_entry(&mci
->info
,
135 struct ath_mci_profile_info
,
140 else if (info
->T
== 6) {
142 btcoex
->duty_cycle
= 30;
146 "Single SCO, aggregation limit %d 1/4 ms\n",
148 } else if (mci
->num_pan
|| mci
->num_other_acl
) {
150 * For single PAN/FTP profile, allocate 35% for BT
151 * to improve WLAN throughput.
153 btcoex
->duty_cycle
= 35;
154 btcoex
->btcoex_period
= 53;
156 "Single PAN/FTP bt period %d ms dutycycle %d\n",
157 btcoex
->duty_cycle
, btcoex
->btcoex_period
);
158 } else if (mci
->num_hid
) {
159 btcoex
->duty_cycle
= 30;
162 "Multiple attempt/timeout single HID "
163 "aggregation limit 1.5 ms dutycycle 30%%\n");
165 } else if (num_profile
== 2) {
166 if (mci
->num_hid
== 2)
167 btcoex
->duty_cycle
= 30;
170 "Two BT profiles aggr limit 1.5 ms dutycycle %d%%\n",
172 } else if (num_profile
>= 3) {
175 "Three or more profiles aggregation limit 1 ms\n");
179 if (IS_CHAN_2GHZ(sc
->sc_ah
->curchan
)) {
180 if (IS_CHAN_HT(sc
->sc_ah
->curchan
))
181 ath_mci_adjust_aggr_limit(btcoex
);
183 btcoex
->btcoex_period
>>= 1;
186 ath9k_btcoex_timer_pause(sc
);
187 ath9k_hw_btcoex_disable(sc
->sc_ah
);
189 if (IS_CHAN_5GHZ(sc
->sc_ah
->curchan
))
192 btcoex
->duty_cycle
+= (mci
->num_bdr
? ATH_MCI_BDR_DUTY_CYCLE
: 0);
193 if (btcoex
->duty_cycle
> ATH_MCI_MAX_DUTY_CYCLE
)
194 btcoex
->duty_cycle
= ATH_MCI_MAX_DUTY_CYCLE
;
196 btcoex
->btcoex_no_stomp
= btcoex
->btcoex_period
* 1000 *
197 (100 - btcoex
->duty_cycle
) / 100;
199 ath9k_hw_btcoex_enable(sc
->sc_ah
);
200 ath9k_btcoex_timer_resume(sc
);
203 static void ath_mci_wait_btcal_done(struct ath_softc
*sc
)
205 struct ath_hw
*ah
= sc
->sc_ah
;
208 ieee80211_stop_queues(sc
->hw
);
210 ath_drain_all_txq(sc
, false);
212 /* Wait for cal done */
213 ar9003_mci_start_reset(ah
, ah
->curchan
);
217 ieee80211_wake_queues(sc
->hw
);
220 static void ath_mci_cal_msg(struct ath_softc
*sc
, u8 opcode
, u8
*rx_payload
)
222 struct ath_hw
*ah
= sc
->sc_ah
;
223 struct ath_common
*common
= ath9k_hw_common(ah
);
224 struct ath9k_hw_mci
*mci_hw
= &ah
->btcoex_hw
.mci
;
225 u32 payload
[4] = {0, 0, 0, 0};
228 case MCI_GPM_BT_CAL_REQ
:
229 if (mci_hw
->bt_state
== MCI_BT_AWAKE
) {
230 mci_hw
->bt_state
= MCI_BT_CAL_START
;
231 ath_mci_wait_btcal_done(sc
);
233 ath_dbg(common
, MCI
, "MCI State : %d\n", mci_hw
->bt_state
);
235 case MCI_GPM_BT_CAL_GRANT
:
236 MCI_GPM_SET_CAL_TYPE(payload
, MCI_GPM_WLAN_CAL_DONE
);
237 ar9003_mci_send_message(sc
->sc_ah
, MCI_GPM
, 0, payload
,
241 ath_dbg(common
, MCI
, "Unknown GPM CAL message\n");
246 static void ath9k_mci_work(struct work_struct
*work
)
248 struct ath_softc
*sc
= container_of(work
, struct ath_softc
, mci_work
);
250 ath_mci_update_scheme(sc
);
253 static u8
ath_mci_process_profile(struct ath_softc
*sc
,
254 struct ath_mci_profile_info
*info
)
256 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
257 struct ath_btcoex
*btcoex
= &sc
->btcoex
;
258 struct ath_mci_profile
*mci
= &btcoex
->mci
;
259 struct ath_mci_profile_info
*entry
= NULL
;
261 entry
= ath_mci_find_profile(mci
, info
);
264 * Two MCI interrupts are generated while connecting to
265 * headset and A2DP profile, but only one MCI interrupt
266 * is generated with last added profile type while disconnecting
268 * So while adding second profile type decrement
271 if (entry
->type
!= info
->type
) {
272 DEC_PROF(mci
, entry
);
275 memcpy(entry
, info
, 10);
279 if (!entry
&& !ath_mci_add_profile(common
, mci
, info
))
282 ath_mci_del_profile(common
, mci
, entry
);
287 static u8
ath_mci_process_status(struct ath_softc
*sc
,
288 struct ath_mci_profile_status
*status
)
290 struct ath_btcoex
*btcoex
= &sc
->btcoex
;
291 struct ath_mci_profile
*mci
= &btcoex
->mci
;
292 struct ath_mci_profile_info info
;
293 int i
= 0, old_num_mgmt
= mci
->num_mgmt
;
295 /* Link status type are not handled */
299 info
.conn_handle
= status
->conn_handle
;
300 if (ath_mci_find_profile(mci
, &info
))
303 if (status
->conn_handle
>= ATH_MCI_MAX_PROFILE
)
306 if (status
->is_critical
)
307 __set_bit(status
->conn_handle
, mci
->status
);
309 __clear_bit(status
->conn_handle
, mci
->status
);
313 if (test_bit(i
, mci
->status
))
315 } while (++i
< ATH_MCI_MAX_PROFILE
);
317 if (old_num_mgmt
!= mci
->num_mgmt
)
323 static void ath_mci_msg(struct ath_softc
*sc
, u8 opcode
, u8
*rx_payload
)
325 struct ath_hw
*ah
= sc
->sc_ah
;
326 struct ath_mci_profile_info profile_info
;
327 struct ath_mci_profile_status profile_status
;
328 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
329 u8 major
, minor
, update_scheme
= 0;
332 if (ar9003_mci_state(ah
, MCI_STATE_NEED_FLUSH_BT_INFO
) &&
333 ar9003_mci_state(ah
, MCI_STATE_ENABLE
)) {
334 ath_dbg(common
, MCI
, "(MCI) Need to flush BT profiles\n");
335 ath_mci_flush_profile(&sc
->btcoex
.mci
);
336 ar9003_mci_state(ah
, MCI_STATE_SEND_STATUS_QUERY
);
340 case MCI_GPM_COEX_VERSION_QUERY
:
341 ar9003_mci_state(ah
, MCI_STATE_SEND_WLAN_COEX_VERSION
);
343 case MCI_GPM_COEX_VERSION_RESPONSE
:
344 major
= *(rx_payload
+ MCI_GPM_COEX_B_MAJOR_VERSION
);
345 minor
= *(rx_payload
+ MCI_GPM_COEX_B_MINOR_VERSION
);
346 ar9003_mci_set_bt_version(ah
, major
, minor
);
348 case MCI_GPM_COEX_STATUS_QUERY
:
349 ar9003_mci_send_wlan_channels(ah
);
351 case MCI_GPM_COEX_BT_PROFILE_INFO
:
352 memcpy(&profile_info
,
353 (rx_payload
+ MCI_GPM_COEX_B_PROFILE_TYPE
), 10);
355 if ((profile_info
.type
== MCI_GPM_COEX_PROFILE_UNKNOWN
) ||
356 (profile_info
.type
>= MCI_GPM_COEX_PROFILE_MAX
)) {
358 "Illegal profile type = %d, state = %d\n",
364 update_scheme
+= ath_mci_process_profile(sc
, &profile_info
);
366 case MCI_GPM_COEX_BT_STATUS_UPDATE
:
367 profile_status
.is_link
= *(rx_payload
+
368 MCI_GPM_COEX_B_STATUS_TYPE
);
369 profile_status
.conn_handle
= *(rx_payload
+
370 MCI_GPM_COEX_B_STATUS_LINKID
);
371 profile_status
.is_critical
= *(rx_payload
+
372 MCI_GPM_COEX_B_STATUS_STATE
);
374 seq_num
= *((u32
*)(rx_payload
+ 12));
376 "BT_Status_Update: is_link=%d, linkId=%d, state=%d, SEQ=%u\n",
377 profile_status
.is_link
, profile_status
.conn_handle
,
378 profile_status
.is_critical
, seq_num
);
380 update_scheme
+= ath_mci_process_status(sc
, &profile_status
);
383 ath_dbg(common
, MCI
, "Unknown GPM COEX message = 0x%02x\n", opcode
);
387 ieee80211_queue_work(sc
->hw
, &sc
->mci_work
);
390 int ath_mci_setup(struct ath_softc
*sc
)
392 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
393 struct ath_mci_coex
*mci
= &sc
->mci_coex
;
394 struct ath_mci_buf
*buf
= &mci
->sched_buf
;
397 buf
->bf_addr
= dma_alloc_coherent(sc
->dev
,
398 ATH_MCI_SCHED_BUF_SIZE
+ ATH_MCI_GPM_BUF_SIZE
,
399 &buf
->bf_paddr
, GFP_KERNEL
);
401 if (buf
->bf_addr
== NULL
) {
402 ath_dbg(common
, FATAL
, "MCI buffer alloc failed\n");
406 memset(buf
->bf_addr
, MCI_GPM_RSVD_PATTERN
,
407 ATH_MCI_SCHED_BUF_SIZE
+ ATH_MCI_GPM_BUF_SIZE
);
409 mci
->sched_buf
.bf_len
= ATH_MCI_SCHED_BUF_SIZE
;
411 mci
->gpm_buf
.bf_len
= ATH_MCI_GPM_BUF_SIZE
;
412 mci
->gpm_buf
.bf_addr
= (u8
*)mci
->sched_buf
.bf_addr
+ mci
->sched_buf
.bf_len
;
413 mci
->gpm_buf
.bf_paddr
= mci
->sched_buf
.bf_paddr
+ mci
->sched_buf
.bf_len
;
415 ret
= ar9003_mci_setup(sc
->sc_ah
, mci
->gpm_buf
.bf_paddr
,
416 mci
->gpm_buf
.bf_addr
, (mci
->gpm_buf
.bf_len
>> 4),
417 mci
->sched_buf
.bf_paddr
);
419 ath_err(common
, "Failed to initialize MCI\n");
423 INIT_WORK(&sc
->mci_work
, ath9k_mci_work
);
424 ath_dbg(common
, MCI
, "MCI Initialized\n");
429 void ath_mci_cleanup(struct ath_softc
*sc
)
431 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
432 struct ath_hw
*ah
= sc
->sc_ah
;
433 struct ath_mci_coex
*mci
= &sc
->mci_coex
;
434 struct ath_mci_buf
*buf
= &mci
->sched_buf
;
437 dma_free_coherent(sc
->dev
,
438 ATH_MCI_SCHED_BUF_SIZE
+ ATH_MCI_GPM_BUF_SIZE
,
439 buf
->bf_addr
, buf
->bf_paddr
);
441 ar9003_mci_cleanup(ah
);
443 ath_dbg(common
, MCI
, "MCI De-Initialized\n");
446 void ath_mci_intr(struct ath_softc
*sc
)
448 struct ath_mci_coex
*mci
= &sc
->mci_coex
;
449 struct ath_hw
*ah
= sc
->sc_ah
;
450 struct ath_common
*common
= ath9k_hw_common(ah
);
451 struct ath9k_hw_mci
*mci_hw
= &ah
->btcoex_hw
.mci
;
452 u32 mci_int
, mci_int_rxmsg
;
453 u32 offset
, subtype
, opcode
;
455 u32 more_data
= MCI_GPM_MORE
;
456 bool skip_gpm
= false;
458 ar9003_mci_get_interrupt(sc
->sc_ah
, &mci_int
, &mci_int_rxmsg
);
460 if (ar9003_mci_state(ah
, MCI_STATE_ENABLE
) == 0) {
461 ar9003_mci_get_next_gpm_offset(ah
, true, NULL
);
465 if (mci_int_rxmsg
& AR_MCI_INTERRUPT_RX_MSG_REQ_WAKE
) {
466 u32 payload
[4] = { 0xffffffff, 0xffffffff,
467 0xffffffff, 0xffffff00};
470 * The following REMOTE_RESET and SYS_WAKING used to sent
471 * only when BT wake up. Now they are always sent, as a
472 * recovery method to reset BT MCI's RX alignment.
474 ar9003_mci_send_message(ah
, MCI_REMOTE_RESET
, 0,
475 payload
, 16, true, false);
476 ar9003_mci_send_message(ah
, MCI_SYS_WAKING
, 0,
477 NULL
, 0, true, false);
479 mci_int_rxmsg
&= ~AR_MCI_INTERRUPT_RX_MSG_REQ_WAKE
;
480 ar9003_mci_state(ah
, MCI_STATE_RESET_REQ_WAKE
);
483 * always do this for recovery and 2G/5G toggling and LNA_TRANS
485 ar9003_mci_state(ah
, MCI_STATE_SET_BT_AWAKE
);
488 if (mci_int_rxmsg
& AR_MCI_INTERRUPT_RX_MSG_SYS_WAKING
) {
489 mci_int_rxmsg
&= ~AR_MCI_INTERRUPT_RX_MSG_SYS_WAKING
;
491 if ((mci_hw
->bt_state
== MCI_BT_SLEEP
) &&
492 (ar9003_mci_state(ah
, MCI_STATE_REMOTE_SLEEP
) !=
494 ar9003_mci_state(ah
, MCI_STATE_SET_BT_AWAKE
);
497 if (mci_int_rxmsg
& AR_MCI_INTERRUPT_RX_MSG_SYS_SLEEPING
) {
498 mci_int_rxmsg
&= ~AR_MCI_INTERRUPT_RX_MSG_SYS_SLEEPING
;
500 if ((mci_hw
->bt_state
== MCI_BT_AWAKE
) &&
501 (ar9003_mci_state(ah
, MCI_STATE_REMOTE_SLEEP
) !=
503 mci_hw
->bt_state
= MCI_BT_SLEEP
;
506 if ((mci_int
& AR_MCI_INTERRUPT_RX_INVALID_HDR
) ||
507 (mci_int
& AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT
)) {
508 ar9003_mci_state(ah
, MCI_STATE_RECOVER_RX
);
512 if (mci_int_rxmsg
& AR_MCI_INTERRUPT_RX_MSG_SCHD_INFO
) {
513 mci_int_rxmsg
&= ~AR_MCI_INTERRUPT_RX_MSG_SCHD_INFO
;
514 offset
= ar9003_mci_state(ah
, MCI_STATE_LAST_SCHD_MSG_OFFSET
);
517 if (mci_int_rxmsg
& AR_MCI_INTERRUPT_RX_MSG_GPM
) {
518 mci_int_rxmsg
&= ~AR_MCI_INTERRUPT_RX_MSG_GPM
;
520 while (more_data
== MCI_GPM_MORE
) {
522 pgpm
= mci
->gpm_buf
.bf_addr
;
523 offset
= ar9003_mci_get_next_gpm_offset(ah
, false,
526 if (offset
== MCI_GPM_INVALID
)
529 pgpm
+= (offset
>> 2);
532 * The first dword is timer.
533 * The real data starts from 2nd dword.
535 subtype
= MCI_GPM_TYPE(pgpm
);
536 opcode
= MCI_GPM_OPCODE(pgpm
);
541 if (MCI_GPM_IS_CAL_TYPE(subtype
)) {
542 ath_mci_cal_msg(sc
, subtype
, (u8
*)pgpm
);
545 case MCI_GPM_COEX_AGENT
:
546 ath_mci_msg(sc
, opcode
, (u8
*)pgpm
);
553 MCI_GPM_RECYCLE(pgpm
);
557 if (mci_int_rxmsg
& AR_MCI_INTERRUPT_RX_HW_MSG_MASK
) {
558 if (mci_int_rxmsg
& AR_MCI_INTERRUPT_RX_MSG_LNA_CONTROL
)
559 mci_int_rxmsg
&= ~AR_MCI_INTERRUPT_RX_MSG_LNA_CONTROL
;
561 if (mci_int_rxmsg
& AR_MCI_INTERRUPT_RX_MSG_LNA_INFO
)
562 mci_int_rxmsg
&= ~AR_MCI_INTERRUPT_RX_MSG_LNA_INFO
;
564 if (mci_int_rxmsg
& AR_MCI_INTERRUPT_RX_MSG_CONT_INFO
) {
565 int value_dbm
= MS(mci_hw
->cont_status
,
566 AR_MCI_CONT_RSSI_POWER
);
568 mci_int_rxmsg
&= ~AR_MCI_INTERRUPT_RX_MSG_CONT_INFO
;
571 "MCI CONT_INFO: (%s) pri = %d pwr = %d dBm\n",
572 MS(mci_hw
->cont_status
, AR_MCI_CONT_TXRX
) ?
574 MS(mci_hw
->cont_status
, AR_MCI_CONT_PRIORITY
),
578 if (mci_int_rxmsg
& AR_MCI_INTERRUPT_RX_MSG_CONT_NACK
)
579 mci_int_rxmsg
&= ~AR_MCI_INTERRUPT_RX_MSG_CONT_NACK
;
581 if (mci_int_rxmsg
& AR_MCI_INTERRUPT_RX_MSG_CONT_RST
)
582 mci_int_rxmsg
&= ~AR_MCI_INTERRUPT_RX_MSG_CONT_RST
;
585 if ((mci_int
& AR_MCI_INTERRUPT_RX_INVALID_HDR
) ||
586 (mci_int
& AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT
)) {
587 mci_int
&= ~(AR_MCI_INTERRUPT_RX_INVALID_HDR
|
588 AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT
);
589 ath_mci_msg(sc
, MCI_GPM_COEX_NOOP
, NULL
);
593 void ath_mci_enable(struct ath_softc
*sc
)
595 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
597 if (!common
->btcoex_enabled
)
600 if (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_MCI
)
601 sc
->sc_ah
->imask
|= ATH9K_INT_MCI
;