2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/dma-mapping.h>
19 #include "ar9003_mac.h"
21 #define BITS_PER_BYTE 8
22 #define OFDM_PLCP_BITS 22
23 #define HT_RC_2_STREAMS(_rc) ((((_rc) & 0x78) >> 3) + 1)
29 #define HT_LTF(_ns) (4 * (_ns))
30 #define SYMBOL_TIME(_ns) ((_ns) << 2) /* ns * 4 us */
31 #define SYMBOL_TIME_HALFGI(_ns) (((_ns) * 18 + 4) / 5) /* ns * 3.6 us */
32 #define TIME_SYMBOLS(t) ((t) >> 2)
33 #define TIME_SYMBOLS_HALFGI(t) (((t) * 5 - 4) / 18)
34 #define NUM_SYMBOLS_PER_USEC(_usec) (_usec >> 2)
35 #define NUM_SYMBOLS_PER_USEC_HALFGI(_usec) (((_usec*5)-4)/18)
38 static u16 bits_per_symbol
[][2] = {
40 { 26, 54 }, /* 0: BPSK */
41 { 52, 108 }, /* 1: QPSK 1/2 */
42 { 78, 162 }, /* 2: QPSK 3/4 */
43 { 104, 216 }, /* 3: 16-QAM 1/2 */
44 { 156, 324 }, /* 4: 16-QAM 3/4 */
45 { 208, 432 }, /* 5: 64-QAM 2/3 */
46 { 234, 486 }, /* 6: 64-QAM 3/4 */
47 { 260, 540 }, /* 7: 64-QAM 5/6 */
50 static void ath_tx_send_normal(struct ath_softc
*sc
, struct ath_txq
*txq
,
51 struct ath_atx_tid
*tid
, struct sk_buff
*skb
);
52 static void ath_tx_complete(struct ath_softc
*sc
, struct sk_buff
*skb
,
53 int tx_flags
, struct ath_txq
*txq
);
54 static void ath_tx_complete_buf(struct ath_softc
*sc
, struct ath_buf
*bf
,
55 struct ath_txq
*txq
, struct list_head
*bf_q
,
56 struct ath_tx_status
*ts
, int txok
);
57 static void ath_tx_txqaddbuf(struct ath_softc
*sc
, struct ath_txq
*txq
,
58 struct list_head
*head
, bool internal
);
59 static void ath_tx_rc_status(struct ath_softc
*sc
, struct ath_buf
*bf
,
60 struct ath_tx_status
*ts
, int nframes
, int nbad
,
62 static void ath_tx_update_baw(struct ath_softc
*sc
, struct ath_atx_tid
*tid
,
64 static struct ath_buf
*ath_tx_setup_buffer(struct ath_softc
*sc
,
66 struct ath_atx_tid
*tid
,
76 /*********************/
77 /* Aggregation logic */
78 /*********************/
80 void ath_txq_lock(struct ath_softc
*sc
, struct ath_txq
*txq
)
81 __acquires(&txq
->axq_lock
)
83 spin_lock_bh(&txq
->axq_lock
);
86 void ath_txq_unlock(struct ath_softc
*sc
, struct ath_txq
*txq
)
87 __releases(&txq
->axq_lock
)
89 spin_unlock_bh(&txq
->axq_lock
);
92 void ath_txq_unlock_complete(struct ath_softc
*sc
, struct ath_txq
*txq
)
93 __releases(&txq
->axq_lock
)
95 struct sk_buff_head q
;
98 __skb_queue_head_init(&q
);
99 skb_queue_splice_init(&txq
->complete_q
, &q
);
100 spin_unlock_bh(&txq
->axq_lock
);
102 while ((skb
= __skb_dequeue(&q
)))
103 ieee80211_tx_status(sc
->hw
, skb
);
106 static void ath_tx_queue_tid(struct ath_softc
*sc
, struct ath_txq
*txq
,
107 struct ath_atx_tid
*tid
)
109 struct ath_atx_ac
*ac
= tid
->ac
;
110 struct list_head
*list
;
111 struct ath_vif
*avp
= (struct ath_vif
*) tid
->an
->vif
->drv_priv
;
112 struct ath_chanctx
*ctx
= avp
->chanctx
;
121 list_add_tail(&tid
->list
, &ac
->tid_q
);
128 list
= &ctx
->acq
[TID_TO_WME_AC(tid
->tidno
)];
129 list_add_tail(&ac
->list
, list
);
132 static struct ath_frame_info
*get_frame_info(struct sk_buff
*skb
)
134 struct ieee80211_tx_info
*tx_info
= IEEE80211_SKB_CB(skb
);
135 BUILD_BUG_ON(sizeof(struct ath_frame_info
) >
136 sizeof(tx_info
->rate_driver_data
));
137 return (struct ath_frame_info
*) &tx_info
->rate_driver_data
[0];
140 static void ath_send_bar(struct ath_atx_tid
*tid
, u16 seqno
)
145 ieee80211_send_bar(tid
->an
->vif
, tid
->an
->sta
->addr
, tid
->tidno
,
146 seqno
<< IEEE80211_SEQ_SEQ_SHIFT
);
149 static void ath_set_rates(struct ieee80211_vif
*vif
, struct ieee80211_sta
*sta
,
152 ieee80211_get_tx_rates(vif
, sta
, bf
->bf_mpdu
, bf
->rates
,
153 ARRAY_SIZE(bf
->rates
));
156 static void ath_txq_skb_done(struct ath_softc
*sc
, struct ath_txq
*txq
,
159 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
160 struct ath_frame_info
*fi
= get_frame_info(skb
);
166 txq
= sc
->tx
.txq_map
[q
];
167 if (WARN_ON(--txq
->pending_frames
< 0))
168 txq
->pending_frames
= 0;
171 txq
->pending_frames
< sc
->tx
.txq_max_pending
[q
]) {
172 if (ath9k_is_chanctx_enabled())
173 ieee80211_wake_queue(sc
->hw
, info
->hw_queue
);
175 ieee80211_wake_queue(sc
->hw
, q
);
176 txq
->stopped
= false;
180 static struct ath_atx_tid
*
181 ath_get_skb_tid(struct ath_softc
*sc
, struct ath_node
*an
, struct sk_buff
*skb
)
183 u8 tidno
= skb
->priority
& IEEE80211_QOS_CTL_TID_MASK
;
184 return ATH_AN_2_TID(an
, tidno
);
187 static bool ath_tid_has_buffered(struct ath_atx_tid
*tid
)
189 return !skb_queue_empty(&tid
->buf_q
) || !skb_queue_empty(&tid
->retry_q
);
192 static struct sk_buff
*ath_tid_dequeue(struct ath_atx_tid
*tid
)
196 skb
= __skb_dequeue(&tid
->retry_q
);
198 skb
= __skb_dequeue(&tid
->buf_q
);
204 * ath_tx_tid_change_state:
205 * - clears a-mpdu flag of previous session
206 * - force sequence number allocation to fix next BlockAck Window
209 ath_tx_tid_change_state(struct ath_softc
*sc
, struct ath_atx_tid
*tid
)
211 struct ath_txq
*txq
= tid
->ac
->txq
;
212 struct ieee80211_tx_info
*tx_info
;
213 struct sk_buff
*skb
, *tskb
;
215 struct ath_frame_info
*fi
;
217 skb_queue_walk_safe(&tid
->buf_q
, skb
, tskb
) {
218 fi
= get_frame_info(skb
);
221 tx_info
= IEEE80211_SKB_CB(skb
);
222 tx_info
->flags
&= ~IEEE80211_TX_CTL_AMPDU
;
227 bf
= ath_tx_setup_buffer(sc
, txq
, tid
, skb
);
229 __skb_unlink(skb
, &tid
->buf_q
);
230 ath_txq_skb_done(sc
, txq
, skb
);
231 ieee80211_free_txskb(sc
->hw
, skb
);
238 static void ath_tx_flush_tid(struct ath_softc
*sc
, struct ath_atx_tid
*tid
)
240 struct ath_txq
*txq
= tid
->ac
->txq
;
243 struct list_head bf_head
;
244 struct ath_tx_status ts
;
245 struct ath_frame_info
*fi
;
246 bool sendbar
= false;
248 INIT_LIST_HEAD(&bf_head
);
250 memset(&ts
, 0, sizeof(ts
));
252 while ((skb
= __skb_dequeue(&tid
->retry_q
))) {
253 fi
= get_frame_info(skb
);
256 ath_txq_skb_done(sc
, txq
, skb
);
257 ieee80211_free_txskb(sc
->hw
, skb
);
261 if (fi
->baw_tracked
) {
262 ath_tx_update_baw(sc
, tid
, bf
->bf_state
.seqno
);
266 list_add_tail(&bf
->list
, &bf_head
);
267 ath_tx_complete_buf(sc
, bf
, txq
, &bf_head
, &ts
, 0);
271 ath_txq_unlock(sc
, txq
);
272 ath_send_bar(tid
, tid
->seq_start
);
273 ath_txq_lock(sc
, txq
);
277 static void ath_tx_update_baw(struct ath_softc
*sc
, struct ath_atx_tid
*tid
,
282 index
= ATH_BA_INDEX(tid
->seq_start
, seqno
);
283 cindex
= (tid
->baw_head
+ index
) & (ATH_TID_MAX_BUFS
- 1);
285 __clear_bit(cindex
, tid
->tx_buf
);
287 while (tid
->baw_head
!= tid
->baw_tail
&& !test_bit(tid
->baw_head
, tid
->tx_buf
)) {
288 INCR(tid
->seq_start
, IEEE80211_SEQ_MAX
);
289 INCR(tid
->baw_head
, ATH_TID_MAX_BUFS
);
290 if (tid
->bar_index
>= 0)
295 static void ath_tx_addto_baw(struct ath_softc
*sc
, struct ath_atx_tid
*tid
,
298 struct ath_frame_info
*fi
= get_frame_info(bf
->bf_mpdu
);
299 u16 seqno
= bf
->bf_state
.seqno
;
302 index
= ATH_BA_INDEX(tid
->seq_start
, seqno
);
303 cindex
= (tid
->baw_head
+ index
) & (ATH_TID_MAX_BUFS
- 1);
304 __set_bit(cindex
, tid
->tx_buf
);
307 if (index
>= ((tid
->baw_tail
- tid
->baw_head
) &
308 (ATH_TID_MAX_BUFS
- 1))) {
309 tid
->baw_tail
= cindex
;
310 INCR(tid
->baw_tail
, ATH_TID_MAX_BUFS
);
314 static void ath_tid_drain(struct ath_softc
*sc
, struct ath_txq
*txq
,
315 struct ath_atx_tid
*tid
)
320 struct list_head bf_head
;
321 struct ath_tx_status ts
;
322 struct ath_frame_info
*fi
;
324 memset(&ts
, 0, sizeof(ts
));
325 INIT_LIST_HEAD(&bf_head
);
327 while ((skb
= ath_tid_dequeue(tid
))) {
328 fi
= get_frame_info(skb
);
332 ath_tx_complete(sc
, skb
, ATH_TX_ERROR
, txq
);
336 list_add_tail(&bf
->list
, &bf_head
);
337 ath_tx_complete_buf(sc
, bf
, txq
, &bf_head
, &ts
, 0);
341 static void ath_tx_set_retry(struct ath_softc
*sc
, struct ath_txq
*txq
,
342 struct sk_buff
*skb
, int count
)
344 struct ath_frame_info
*fi
= get_frame_info(skb
);
345 struct ath_buf
*bf
= fi
->bf
;
346 struct ieee80211_hdr
*hdr
;
347 int prev
= fi
->retries
;
349 TX_STAT_INC(txq
->axq_qnum
, a_retries
);
350 fi
->retries
+= count
;
355 hdr
= (struct ieee80211_hdr
*)skb
->data
;
356 hdr
->frame_control
|= cpu_to_le16(IEEE80211_FCTL_RETRY
);
357 dma_sync_single_for_device(sc
->dev
, bf
->bf_buf_addr
,
358 sizeof(*hdr
), DMA_TO_DEVICE
);
361 static struct ath_buf
*ath_tx_get_buffer(struct ath_softc
*sc
)
363 struct ath_buf
*bf
= NULL
;
365 spin_lock_bh(&sc
->tx
.txbuflock
);
367 if (unlikely(list_empty(&sc
->tx
.txbuf
))) {
368 spin_unlock_bh(&sc
->tx
.txbuflock
);
372 bf
= list_first_entry(&sc
->tx
.txbuf
, struct ath_buf
, list
);
375 spin_unlock_bh(&sc
->tx
.txbuflock
);
380 static void ath_tx_return_buffer(struct ath_softc
*sc
, struct ath_buf
*bf
)
382 spin_lock_bh(&sc
->tx
.txbuflock
);
383 list_add_tail(&bf
->list
, &sc
->tx
.txbuf
);
384 spin_unlock_bh(&sc
->tx
.txbuflock
);
387 static struct ath_buf
* ath_clone_txbuf(struct ath_softc
*sc
, struct ath_buf
*bf
)
391 tbf
= ath_tx_get_buffer(sc
);
395 ATH_TXBUF_RESET(tbf
);
397 tbf
->bf_mpdu
= bf
->bf_mpdu
;
398 tbf
->bf_buf_addr
= bf
->bf_buf_addr
;
399 memcpy(tbf
->bf_desc
, bf
->bf_desc
, sc
->sc_ah
->caps
.tx_desc_len
);
400 tbf
->bf_state
= bf
->bf_state
;
401 tbf
->bf_state
.stale
= false;
406 static void ath_tx_count_frames(struct ath_softc
*sc
, struct ath_buf
*bf
,
407 struct ath_tx_status
*ts
, int txok
,
408 int *nframes
, int *nbad
)
410 struct ath_frame_info
*fi
;
412 u32 ba
[WME_BA_BMP_SIZE
>> 5];
419 isaggr
= bf_isaggr(bf
);
421 seq_st
= ts
->ts_seqnum
;
422 memcpy(ba
, &ts
->ba_low
, WME_BA_BMP_SIZE
>> 3);
426 fi
= get_frame_info(bf
->bf_mpdu
);
427 ba_index
= ATH_BA_INDEX(seq_st
, bf
->bf_state
.seqno
);
430 if (!txok
|| (isaggr
&& !ATH_BA_ISSET(ba
, ba_index
)))
438 static void ath_tx_complete_aggr(struct ath_softc
*sc
, struct ath_txq
*txq
,
439 struct ath_buf
*bf
, struct list_head
*bf_q
,
440 struct ath_tx_status
*ts
, int txok
)
442 struct ath_node
*an
= NULL
;
444 struct ieee80211_sta
*sta
;
445 struct ieee80211_hw
*hw
= sc
->hw
;
446 struct ieee80211_hdr
*hdr
;
447 struct ieee80211_tx_info
*tx_info
;
448 struct ath_atx_tid
*tid
= NULL
;
449 struct ath_buf
*bf_next
, *bf_last
= bf
->bf_lastbf
;
450 struct list_head bf_head
;
451 struct sk_buff_head bf_pending
;
452 u16 seq_st
= 0, acked_cnt
= 0, txfail_cnt
= 0, seq_first
;
453 u32 ba
[WME_BA_BMP_SIZE
>> 5];
454 int isaggr
, txfail
, txpending
, sendbar
= 0, needreset
= 0, nbad
= 0;
455 bool rc_update
= true, isba
;
456 struct ieee80211_tx_rate rates
[4];
457 struct ath_frame_info
*fi
;
459 bool flush
= !!(ts
->ts_status
& ATH9K_TX_FLUSH
);
464 hdr
= (struct ieee80211_hdr
*)skb
->data
;
466 tx_info
= IEEE80211_SKB_CB(skb
);
468 memcpy(rates
, bf
->rates
, sizeof(rates
));
470 retries
= ts
->ts_longretry
+ 1;
471 for (i
= 0; i
< ts
->ts_rateindex
; i
++)
472 retries
+= rates
[i
].count
;
476 sta
= ieee80211_find_sta_by_ifaddr(hw
, hdr
->addr1
, hdr
->addr2
);
480 INIT_LIST_HEAD(&bf_head
);
482 bf_next
= bf
->bf_next
;
484 if (!bf
->bf_state
.stale
|| bf_next
!= NULL
)
485 list_move_tail(&bf
->list
, &bf_head
);
487 ath_tx_complete_buf(sc
, bf
, txq
, &bf_head
, ts
, 0);
494 an
= (struct ath_node
*)sta
->drv_priv
;
495 tid
= ath_get_skb_tid(sc
, an
, skb
);
496 seq_first
= tid
->seq_start
;
497 isba
= ts
->ts_flags
& ATH9K_TX_BA
;
500 * The hardware occasionally sends a tx status for the wrong TID.
501 * In this case, the BA status cannot be considered valid and all
502 * subframes need to be retransmitted
504 * Only BlockAcks have a TID and therefore normal Acks cannot be
507 if (isba
&& tid
->tidno
!= ts
->tid
)
510 isaggr
= bf_isaggr(bf
);
511 memset(ba
, 0, WME_BA_BMP_SIZE
>> 3);
513 if (isaggr
&& txok
) {
514 if (ts
->ts_flags
& ATH9K_TX_BA
) {
515 seq_st
= ts
->ts_seqnum
;
516 memcpy(ba
, &ts
->ba_low
, WME_BA_BMP_SIZE
>> 3);
519 * AR5416 can become deaf/mute when BA
520 * issue happens. Chip needs to be reset.
521 * But AP code may have sychronization issues
522 * when perform internal reset in this routine.
523 * Only enable reset in STA mode for now.
525 if (sc
->sc_ah
->opmode
== NL80211_IFTYPE_STATION
)
530 __skb_queue_head_init(&bf_pending
);
532 ath_tx_count_frames(sc
, bf
, ts
, txok
, &nframes
, &nbad
);
534 u16 seqno
= bf
->bf_state
.seqno
;
536 txfail
= txpending
= sendbar
= 0;
537 bf_next
= bf
->bf_next
;
540 tx_info
= IEEE80211_SKB_CB(skb
);
541 fi
= get_frame_info(skb
);
543 if (!BAW_WITHIN(tid
->seq_start
, tid
->baw_size
, seqno
) ||
546 * Outside of the current BlockAck window,
547 * maybe part of a previous session
550 } else if (ATH_BA_ISSET(ba
, ATH_BA_INDEX(seq_st
, seqno
))) {
551 /* transmit completion, subframe is
552 * acked by block ack */
554 } else if (!isaggr
&& txok
) {
555 /* transmit completion */
559 } else if (fi
->retries
< ATH_MAX_SW_RETRIES
) {
560 if (txok
|| !an
->sleeping
)
561 ath_tx_set_retry(sc
, txq
, bf
->bf_mpdu
,
568 bar_index
= max_t(int, bar_index
,
569 ATH_BA_INDEX(seq_first
, seqno
));
573 * Make sure the last desc is reclaimed if it
574 * not a holding desc.
576 INIT_LIST_HEAD(&bf_head
);
577 if (bf_next
!= NULL
|| !bf_last
->bf_state
.stale
)
578 list_move_tail(&bf
->list
, &bf_head
);
582 * complete the acked-ones/xretried ones; update
585 ath_tx_update_baw(sc
, tid
, seqno
);
587 if (rc_update
&& (acked_cnt
== 1 || txfail_cnt
== 1)) {
588 memcpy(tx_info
->control
.rates
, rates
, sizeof(rates
));
589 ath_tx_rc_status(sc
, bf
, ts
, nframes
, nbad
, txok
);
591 if (bf
== bf
->bf_lastbf
)
592 ath_dynack_sample_tx_ts(sc
->sc_ah
,
597 ath_tx_complete_buf(sc
, bf
, txq
, &bf_head
, ts
,
600 if (tx_info
->flags
& IEEE80211_TX_STATUS_EOSP
) {
601 tx_info
->flags
&= ~IEEE80211_TX_STATUS_EOSP
;
602 ieee80211_sta_eosp(sta
);
604 /* retry the un-acked ones */
605 if (bf
->bf_next
== NULL
&& bf_last
->bf_state
.stale
) {
608 tbf
= ath_clone_txbuf(sc
, bf_last
);
610 * Update tx baw and complete the
611 * frame with failed status if we
615 ath_tx_update_baw(sc
, tid
, seqno
);
617 ath_tx_complete_buf(sc
, bf
, txq
,
619 bar_index
= max_t(int, bar_index
,
620 ATH_BA_INDEX(seq_first
, seqno
));
628 * Put this buffer to the temporary pending
629 * queue to retain ordering
631 __skb_queue_tail(&bf_pending
, skb
);
637 /* prepend un-acked frames to the beginning of the pending frame queue */
638 if (!skb_queue_empty(&bf_pending
)) {
640 ieee80211_sta_set_buffered(sta
, tid
->tidno
, true);
642 skb_queue_splice_tail(&bf_pending
, &tid
->retry_q
);
644 ath_tx_queue_tid(sc
, txq
, tid
);
646 if (ts
->ts_status
& (ATH9K_TXERR_FILT
| ATH9K_TXERR_XRETRY
))
647 tid
->ac
->clear_ps_filter
= true;
651 if (bar_index
>= 0) {
652 u16 bar_seq
= ATH_BA_INDEX2SEQ(seq_first
, bar_index
);
654 if (BAW_WITHIN(tid
->seq_start
, tid
->baw_size
, bar_seq
))
655 tid
->bar_index
= ATH_BA_INDEX(tid
->seq_start
, bar_seq
);
657 ath_txq_unlock(sc
, txq
);
658 ath_send_bar(tid
, ATH_BA_INDEX2SEQ(seq_first
, bar_index
+ 1));
659 ath_txq_lock(sc
, txq
);
665 ath9k_queue_reset(sc
, RESET_TYPE_TX_ERROR
);
668 static bool bf_is_ampdu_not_probing(struct ath_buf
*bf
)
670 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(bf
->bf_mpdu
);
671 return bf_isampdu(bf
) && !(info
->flags
& IEEE80211_TX_CTL_RATE_CTRL_PROBE
);
674 static void ath_tx_process_buffer(struct ath_softc
*sc
, struct ath_txq
*txq
,
675 struct ath_tx_status
*ts
, struct ath_buf
*bf
,
676 struct list_head
*bf_head
)
678 struct ieee80211_tx_info
*info
;
681 txok
= !(ts
->ts_status
& ATH9K_TXERR_MASK
);
682 flush
= !!(ts
->ts_status
& ATH9K_TX_FLUSH
);
683 txq
->axq_tx_inprogress
= false;
686 if (bf_is_ampdu_not_probing(bf
))
687 txq
->axq_ampdu_depth
--;
689 ts
->duration
= ath9k_hw_get_duration(sc
->sc_ah
, bf
->bf_desc
,
691 if (!bf_isampdu(bf
)) {
693 info
= IEEE80211_SKB_CB(bf
->bf_mpdu
);
694 memcpy(info
->control
.rates
, bf
->rates
,
695 sizeof(info
->control
.rates
));
696 ath_tx_rc_status(sc
, bf
, ts
, 1, txok
? 0 : 1, txok
);
697 ath_dynack_sample_tx_ts(sc
->sc_ah
, bf
->bf_mpdu
, ts
);
699 ath_tx_complete_buf(sc
, bf
, txq
, bf_head
, ts
, txok
);
701 ath_tx_complete_aggr(sc
, txq
, bf
, bf_head
, ts
, txok
);
704 ath_txq_schedule(sc
, txq
);
707 static bool ath_lookup_legacy(struct ath_buf
*bf
)
710 struct ieee80211_tx_info
*tx_info
;
711 struct ieee80211_tx_rate
*rates
;
715 tx_info
= IEEE80211_SKB_CB(skb
);
716 rates
= tx_info
->control
.rates
;
718 for (i
= 0; i
< 4; i
++) {
719 if (!rates
[i
].count
|| rates
[i
].idx
< 0)
722 if (!(rates
[i
].flags
& IEEE80211_TX_RC_MCS
))
729 static u32
ath_lookup_rate(struct ath_softc
*sc
, struct ath_buf
*bf
,
730 struct ath_atx_tid
*tid
)
733 struct ieee80211_tx_info
*tx_info
;
734 struct ieee80211_tx_rate
*rates
;
735 u32 max_4ms_framelen
, frmlen
;
736 u16 aggr_limit
, bt_aggr_limit
, legacy
= 0;
737 int q
= tid
->ac
->txq
->mac80211_qnum
;
741 tx_info
= IEEE80211_SKB_CB(skb
);
745 * Find the lowest frame length among the rate series that will have a
746 * 4ms (or TXOP limited) transmit duration.
748 max_4ms_framelen
= ATH_AMPDU_LIMIT_MAX
;
750 for (i
= 0; i
< 4; i
++) {
756 if (!(rates
[i
].flags
& IEEE80211_TX_RC_MCS
)) {
761 if (rates
[i
].flags
& IEEE80211_TX_RC_40_MHZ_WIDTH
)
766 if (rates
[i
].flags
& IEEE80211_TX_RC_SHORT_GI
)
769 frmlen
= sc
->tx
.max_aggr_framelen
[q
][modeidx
][rates
[i
].idx
];
770 max_4ms_framelen
= min(max_4ms_framelen
, frmlen
);
774 * limit aggregate size by the minimum rate if rate selected is
775 * not a probe rate, if rate selected is a probe rate then
776 * avoid aggregation of this packet.
778 if (tx_info
->flags
& IEEE80211_TX_CTL_RATE_CTRL_PROBE
|| legacy
)
781 aggr_limit
= min(max_4ms_framelen
, (u32
)ATH_AMPDU_LIMIT_MAX
);
784 * Override the default aggregation limit for BTCOEX.
786 bt_aggr_limit
= ath9k_btcoex_aggr_limit(sc
, max_4ms_framelen
);
788 aggr_limit
= bt_aggr_limit
;
790 if (tid
->an
->maxampdu
)
791 aggr_limit
= min(aggr_limit
, tid
->an
->maxampdu
);
797 * Returns the number of delimiters to be added to
798 * meet the minimum required mpdudensity.
800 static int ath_compute_num_delims(struct ath_softc
*sc
, struct ath_atx_tid
*tid
,
801 struct ath_buf
*bf
, u16 frmlen
,
804 #define FIRST_DESC_NDELIMS 60
805 u32 nsymbits
, nsymbols
;
808 int width
, streams
, half_gi
, ndelim
, mindelim
;
809 struct ath_frame_info
*fi
= get_frame_info(bf
->bf_mpdu
);
811 /* Select standard number of delimiters based on frame length alone */
812 ndelim
= ATH_AGGR_GET_NDELIM(frmlen
);
815 * If encryption enabled, hardware requires some more padding between
817 * TODO - this could be improved to be dependent on the rate.
818 * The hardware can keep up at lower rates, but not higher rates
820 if ((fi
->keyix
!= ATH9K_TXKEYIX_INVALID
) &&
821 !(sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
))
822 ndelim
+= ATH_AGGR_ENCRYPTDELIM
;
825 * Add delimiter when using RTS/CTS with aggregation
826 * and non enterprise AR9003 card
828 if (first_subfrm
&& !AR_SREV_9580_10_OR_LATER(sc
->sc_ah
) &&
829 (sc
->sc_ah
->ent_mode
& AR_ENT_OTP_MIN_PKT_SIZE_DISABLE
))
830 ndelim
= max(ndelim
, FIRST_DESC_NDELIMS
);
833 * Convert desired mpdu density from microeconds to bytes based
834 * on highest rate in rate series (i.e. first rate) to determine
835 * required minimum length for subframe. Take into account
836 * whether high rate is 20 or 40Mhz and half or full GI.
838 * If there is no mpdu density restriction, no further calculation
842 if (tid
->an
->mpdudensity
== 0)
845 rix
= bf
->rates
[0].idx
;
846 flags
= bf
->rates
[0].flags
;
847 width
= (flags
& IEEE80211_TX_RC_40_MHZ_WIDTH
) ? 1 : 0;
848 half_gi
= (flags
& IEEE80211_TX_RC_SHORT_GI
) ? 1 : 0;
851 nsymbols
= NUM_SYMBOLS_PER_USEC_HALFGI(tid
->an
->mpdudensity
);
853 nsymbols
= NUM_SYMBOLS_PER_USEC(tid
->an
->mpdudensity
);
858 streams
= HT_RC_2_STREAMS(rix
);
859 nsymbits
= bits_per_symbol
[rix
% 8][width
] * streams
;
860 minlen
= (nsymbols
* nsymbits
) / BITS_PER_BYTE
;
862 if (frmlen
< minlen
) {
863 mindelim
= (minlen
- frmlen
) / ATH_AGGR_DELIM_SZ
;
864 ndelim
= max(mindelim
, ndelim
);
870 static struct ath_buf
*
871 ath_tx_get_tid_subframe(struct ath_softc
*sc
, struct ath_txq
*txq
,
872 struct ath_atx_tid
*tid
, struct sk_buff_head
**q
)
874 struct ieee80211_tx_info
*tx_info
;
875 struct ath_frame_info
*fi
;
882 if (skb_queue_empty(*q
))
889 fi
= get_frame_info(skb
);
892 bf
= ath_tx_setup_buffer(sc
, txq
, tid
, skb
);
894 bf
->bf_state
.stale
= false;
897 __skb_unlink(skb
, *q
);
898 ath_txq_skb_done(sc
, txq
, skb
);
899 ieee80211_free_txskb(sc
->hw
, skb
);
906 tx_info
= IEEE80211_SKB_CB(skb
);
907 tx_info
->flags
&= ~IEEE80211_TX_CTL_CLEAR_PS_FILT
;
910 * No aggregation session is running, but there may be frames
911 * from a previous session or a failed attempt in the queue.
912 * Send them out as normal data frames
915 tx_info
->flags
&= ~IEEE80211_TX_CTL_AMPDU
;
917 if (!(tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
)) {
918 bf
->bf_state
.bf_type
= 0;
922 bf
->bf_state
.bf_type
= BUF_AMPDU
| BUF_AGGR
;
923 seqno
= bf
->bf_state
.seqno
;
925 /* do not step over block-ack window */
926 if (!BAW_WITHIN(tid
->seq_start
, tid
->baw_size
, seqno
))
929 if (tid
->bar_index
> ATH_BA_INDEX(tid
->seq_start
, seqno
)) {
930 struct ath_tx_status ts
= {};
931 struct list_head bf_head
;
933 INIT_LIST_HEAD(&bf_head
);
934 list_add(&bf
->list
, &bf_head
);
935 __skb_unlink(skb
, *q
);
936 ath_tx_update_baw(sc
, tid
, seqno
);
937 ath_tx_complete_buf(sc
, bf
, txq
, &bf_head
, &ts
, 0);
948 ath_tx_form_aggr(struct ath_softc
*sc
, struct ath_txq
*txq
,
949 struct ath_atx_tid
*tid
, struct list_head
*bf_q
,
950 struct ath_buf
*bf_first
, struct sk_buff_head
*tid_q
,
953 #define PADBYTES(_len) ((4 - ((_len) % 4)) % 4)
954 struct ath_buf
*bf
= bf_first
, *bf_prev
= NULL
;
955 int nframes
= 0, ndelim
;
956 u16 aggr_limit
= 0, al
= 0, bpad
= 0,
957 al_delta
, h_baw
= tid
->baw_size
/ 2;
958 struct ieee80211_tx_info
*tx_info
;
959 struct ath_frame_info
*fi
;
964 aggr_limit
= ath_lookup_rate(sc
, bf
, tid
);
968 fi
= get_frame_info(skb
);
970 /* do not exceed aggregation limit */
971 al_delta
= ATH_AGGR_DELIM_SZ
+ fi
->framelen
;
973 if (aggr_limit
< al
+ bpad
+ al_delta
||
974 ath_lookup_legacy(bf
) || nframes
>= h_baw
)
977 tx_info
= IEEE80211_SKB_CB(bf
->bf_mpdu
);
978 if ((tx_info
->flags
& IEEE80211_TX_CTL_RATE_CTRL_PROBE
) ||
979 !(tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
))
983 /* add padding for previous frame to aggregation length */
984 al
+= bpad
+ al_delta
;
987 * Get the delimiters needed to meet the MPDU
988 * density for this node.
990 ndelim
= ath_compute_num_delims(sc
, tid
, bf_first
, fi
->framelen
,
992 bpad
= PADBYTES(al_delta
) + (ndelim
<< 2);
997 /* link buffers of this frame to the aggregate */
998 if (!fi
->baw_tracked
)
999 ath_tx_addto_baw(sc
, tid
, bf
);
1000 bf
->bf_state
.ndelim
= ndelim
;
1002 __skb_unlink(skb
, tid_q
);
1003 list_add_tail(&bf
->list
, bf_q
);
1005 bf_prev
->bf_next
= bf
;
1009 bf
= ath_tx_get_tid_subframe(sc
, txq
, tid
, &tid_q
);
1014 } while (ath_tid_has_buffered(tid
));
1017 bf
->bf_lastbf
= bf_prev
;
1019 if (bf
== bf_prev
) {
1020 al
= get_frame_info(bf
->bf_mpdu
)->framelen
;
1021 bf
->bf_state
.bf_type
= BUF_AMPDU
;
1023 TX_STAT_INC(txq
->axq_qnum
, a_aggr
);
1034 * pktlen - total bytes (delims + data + fcs + pads + pad delims)
1035 * width - 0 for 20 MHz, 1 for 40 MHz
1036 * half_gi - to use 4us v/s 3.6 us for symbol time
1038 static u32
ath_pkt_duration(struct ath_softc
*sc
, u8 rix
, int pktlen
,
1039 int width
, int half_gi
, bool shortPreamble
)
1041 u32 nbits
, nsymbits
, duration
, nsymbols
;
1044 /* find number of symbols: PLCP + data */
1045 streams
= HT_RC_2_STREAMS(rix
);
1046 nbits
= (pktlen
<< 3) + OFDM_PLCP_BITS
;
1047 nsymbits
= bits_per_symbol
[rix
% 8][width
] * streams
;
1048 nsymbols
= (nbits
+ nsymbits
- 1) / nsymbits
;
1051 duration
= SYMBOL_TIME(nsymbols
);
1053 duration
= SYMBOL_TIME_HALFGI(nsymbols
);
1055 /* addup duration for legacy/ht training and signal fields */
1056 duration
+= L_STF
+ L_LTF
+ L_SIG
+ HT_SIG
+ HT_STF
+ HT_LTF(streams
);
1061 static int ath_max_framelen(int usec
, int mcs
, bool ht40
, bool sgi
)
1063 int streams
= HT_RC_2_STREAMS(mcs
);
1067 usec
-= L_STF
+ L_LTF
+ L_SIG
+ HT_SIG
+ HT_STF
+ HT_LTF(streams
);
1068 symbols
= sgi
? TIME_SYMBOLS_HALFGI(usec
) : TIME_SYMBOLS(usec
);
1069 bits
= symbols
* bits_per_symbol
[mcs
% 8][ht40
] * streams
;
1070 bits
-= OFDM_PLCP_BITS
;
1078 void ath_update_max_aggr_framelen(struct ath_softc
*sc
, int queue
, int txop
)
1080 u16
*cur_ht20
, *cur_ht20_sgi
, *cur_ht40
, *cur_ht40_sgi
;
1083 /* 4ms is the default (and maximum) duration */
1084 if (!txop
|| txop
> 4096)
1087 cur_ht20
= sc
->tx
.max_aggr_framelen
[queue
][MCS_HT20
];
1088 cur_ht20_sgi
= sc
->tx
.max_aggr_framelen
[queue
][MCS_HT20_SGI
];
1089 cur_ht40
= sc
->tx
.max_aggr_framelen
[queue
][MCS_HT40
];
1090 cur_ht40_sgi
= sc
->tx
.max_aggr_framelen
[queue
][MCS_HT40_SGI
];
1091 for (mcs
= 0; mcs
< 32; mcs
++) {
1092 cur_ht20
[mcs
] = ath_max_framelen(txop
, mcs
, false, false);
1093 cur_ht20_sgi
[mcs
] = ath_max_framelen(txop
, mcs
, false, true);
1094 cur_ht40
[mcs
] = ath_max_framelen(txop
, mcs
, true, false);
1095 cur_ht40_sgi
[mcs
] = ath_max_framelen(txop
, mcs
, true, true);
1099 static u8
ath_get_rate_txpower(struct ath_softc
*sc
, struct ath_buf
*bf
,
1103 struct ath_hw
*ah
= sc
->sc_ah
;
1106 return MAX_RATE_POWER
;
1108 if (!AR_SREV_9300_20_OR_LATER(ah
)) {
1109 /* ar9002 is not sipported for the moment */
1110 return MAX_RATE_POWER
;
1113 if (!bf
->bf_state
.bfs_paprd
) {
1114 struct sk_buff
*skb
= bf
->bf_mpdu
;
1115 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
1116 struct ath_frame_info
*fi
= get_frame_info(skb
);
1118 if (rateidx
< 8 && (info
->flags
& IEEE80211_TX_CTL_STBC
))
1119 max_power
= min(ah
->tx_power_stbc
[rateidx
],
1122 max_power
= min(ah
->tx_power
[rateidx
], fi
->tx_power
);
1124 max_power
= ah
->paprd_training_power
;
1130 static void ath_buf_set_rate(struct ath_softc
*sc
, struct ath_buf
*bf
,
1131 struct ath_tx_info
*info
, int len
, bool rts
)
1133 struct ath_hw
*ah
= sc
->sc_ah
;
1134 struct ath_common
*common
= ath9k_hw_common(ah
);
1135 struct sk_buff
*skb
;
1136 struct ieee80211_tx_info
*tx_info
;
1137 struct ieee80211_tx_rate
*rates
;
1138 const struct ieee80211_rate
*rate
;
1139 struct ieee80211_hdr
*hdr
;
1140 struct ath_frame_info
*fi
= get_frame_info(bf
->bf_mpdu
);
1141 u32 rts_thresh
= sc
->hw
->wiphy
->rts_threshold
;
1146 tx_info
= IEEE80211_SKB_CB(skb
);
1148 hdr
= (struct ieee80211_hdr
*)skb
->data
;
1150 /* set dur_update_en for l-sig computation except for PS-Poll frames */
1151 info
->dur_update
= !ieee80211_is_pspoll(hdr
->frame_control
);
1152 info
->rtscts_rate
= fi
->rtscts_rate
;
1154 for (i
= 0; i
< ARRAY_SIZE(bf
->rates
); i
++) {
1155 bool is_40
, is_sgi
, is_sp
;
1158 if (!rates
[i
].count
|| (rates
[i
].idx
< 0))
1162 info
->rates
[i
].Tries
= rates
[i
].count
;
1165 * Handle RTS threshold for unaggregated HT frames.
1167 if (bf_isampdu(bf
) && !bf_isaggr(bf
) &&
1168 (rates
[i
].flags
& IEEE80211_TX_RC_MCS
) &&
1169 unlikely(rts_thresh
!= (u32
) -1)) {
1170 if (!rts_thresh
|| (len
> rts_thresh
))
1174 if (rts
|| rates
[i
].flags
& IEEE80211_TX_RC_USE_RTS_CTS
) {
1175 info
->rates
[i
].RateFlags
|= ATH9K_RATESERIES_RTS_CTS
;
1176 info
->flags
|= ATH9K_TXDESC_RTSENA
;
1177 } else if (rates
[i
].flags
& IEEE80211_TX_RC_USE_CTS_PROTECT
) {
1178 info
->rates
[i
].RateFlags
|= ATH9K_RATESERIES_RTS_CTS
;
1179 info
->flags
|= ATH9K_TXDESC_CTSENA
;
1182 if (rates
[i
].flags
& IEEE80211_TX_RC_40_MHZ_WIDTH
)
1183 info
->rates
[i
].RateFlags
|= ATH9K_RATESERIES_2040
;
1184 if (rates
[i
].flags
& IEEE80211_TX_RC_SHORT_GI
)
1185 info
->rates
[i
].RateFlags
|= ATH9K_RATESERIES_HALFGI
;
1187 is_sgi
= !!(rates
[i
].flags
& IEEE80211_TX_RC_SHORT_GI
);
1188 is_40
= !!(rates
[i
].flags
& IEEE80211_TX_RC_40_MHZ_WIDTH
);
1189 is_sp
= !!(rates
[i
].flags
& IEEE80211_TX_RC_USE_SHORT_PREAMBLE
);
1191 if (rates
[i
].flags
& IEEE80211_TX_RC_MCS
) {
1193 info
->rates
[i
].Rate
= rix
| 0x80;
1194 info
->rates
[i
].ChSel
= ath_txchainmask_reduction(sc
,
1195 ah
->txchainmask
, info
->rates
[i
].Rate
);
1196 info
->rates
[i
].PktDuration
= ath_pkt_duration(sc
, rix
, len
,
1197 is_40
, is_sgi
, is_sp
);
1198 if (rix
< 8 && (tx_info
->flags
& IEEE80211_TX_CTL_STBC
))
1199 info
->rates
[i
].RateFlags
|= ATH9K_RATESERIES_STBC
;
1201 info
->txpower
[i
] = ath_get_rate_txpower(sc
, bf
, rix
);
1206 rate
= &common
->sbands
[tx_info
->band
].bitrates
[rates
[i
].idx
];
1207 if ((tx_info
->band
== IEEE80211_BAND_2GHZ
) &&
1208 !(rate
->flags
& IEEE80211_RATE_ERP_G
))
1209 phy
= WLAN_RC_PHY_CCK
;
1211 phy
= WLAN_RC_PHY_OFDM
;
1213 info
->rates
[i
].Rate
= rate
->hw_value
;
1214 if (rate
->hw_value_short
) {
1215 if (rates
[i
].flags
& IEEE80211_TX_RC_USE_SHORT_PREAMBLE
)
1216 info
->rates
[i
].Rate
|= rate
->hw_value_short
;
1221 if (bf
->bf_state
.bfs_paprd
)
1222 info
->rates
[i
].ChSel
= ah
->txchainmask
;
1224 info
->rates
[i
].ChSel
= ath_txchainmask_reduction(sc
,
1225 ah
->txchainmask
, info
->rates
[i
].Rate
);
1227 info
->rates
[i
].PktDuration
= ath9k_hw_computetxtime(sc
->sc_ah
,
1228 phy
, rate
->bitrate
* 100, len
, rix
, is_sp
);
1230 info
->txpower
[i
] = ath_get_rate_txpower(sc
, bf
, rix
);
1233 /* For AR5416 - RTS cannot be followed by a frame larger than 8K */
1234 if (bf_isaggr(bf
) && (len
> sc
->sc_ah
->caps
.rts_aggr_limit
))
1235 info
->flags
&= ~ATH9K_TXDESC_RTSENA
;
1237 /* ATH9K_TXDESC_RTSENA and ATH9K_TXDESC_CTSENA are mutually exclusive. */
1238 if (info
->flags
& ATH9K_TXDESC_RTSENA
)
1239 info
->flags
&= ~ATH9K_TXDESC_CTSENA
;
1242 static enum ath9k_pkt_type
get_hw_packet_type(struct sk_buff
*skb
)
1244 struct ieee80211_hdr
*hdr
;
1245 enum ath9k_pkt_type htype
;
1248 hdr
= (struct ieee80211_hdr
*)skb
->data
;
1249 fc
= hdr
->frame_control
;
1251 if (ieee80211_is_beacon(fc
))
1252 htype
= ATH9K_PKT_TYPE_BEACON
;
1253 else if (ieee80211_is_probe_resp(fc
))
1254 htype
= ATH9K_PKT_TYPE_PROBE_RESP
;
1255 else if (ieee80211_is_atim(fc
))
1256 htype
= ATH9K_PKT_TYPE_ATIM
;
1257 else if (ieee80211_is_pspoll(fc
))
1258 htype
= ATH9K_PKT_TYPE_PSPOLL
;
1260 htype
= ATH9K_PKT_TYPE_NORMAL
;
1265 static void ath_tx_fill_desc(struct ath_softc
*sc
, struct ath_buf
*bf
,
1266 struct ath_txq
*txq
, int len
)
1268 struct ath_hw
*ah
= sc
->sc_ah
;
1269 struct ath_buf
*bf_first
= NULL
;
1270 struct ath_tx_info info
;
1271 u32 rts_thresh
= sc
->hw
->wiphy
->rts_threshold
;
1274 memset(&info
, 0, sizeof(info
));
1275 info
.is_first
= true;
1276 info
.is_last
= true;
1277 info
.qcu
= txq
->axq_qnum
;
1280 struct sk_buff
*skb
= bf
->bf_mpdu
;
1281 struct ieee80211_tx_info
*tx_info
= IEEE80211_SKB_CB(skb
);
1282 struct ath_frame_info
*fi
= get_frame_info(skb
);
1283 bool aggr
= !!(bf
->bf_state
.bf_type
& BUF_AGGR
);
1285 info
.type
= get_hw_packet_type(skb
);
1287 info
.link
= bf
->bf_next
->bf_daddr
;
1289 info
.link
= (sc
->tx99_state
) ? bf
->bf_daddr
: 0;
1294 if (!sc
->tx99_state
)
1295 info
.flags
= ATH9K_TXDESC_INTREQ
;
1296 if ((tx_info
->flags
& IEEE80211_TX_CTL_CLEAR_PS_FILT
) ||
1297 txq
== sc
->tx
.uapsdq
)
1298 info
.flags
|= ATH9K_TXDESC_CLRDMASK
;
1300 if (tx_info
->flags
& IEEE80211_TX_CTL_NO_ACK
)
1301 info
.flags
|= ATH9K_TXDESC_NOACK
;
1302 if (tx_info
->flags
& IEEE80211_TX_CTL_LDPC
)
1303 info
.flags
|= ATH9K_TXDESC_LDPC
;
1305 if (bf
->bf_state
.bfs_paprd
)
1306 info
.flags
|= (u32
) bf
->bf_state
.bfs_paprd
<<
1307 ATH9K_TXDESC_PAPRD_S
;
1310 * mac80211 doesn't handle RTS threshold for HT because
1311 * the decision has to be taken based on AMPDU length
1312 * and aggregation is done entirely inside ath9k.
1313 * Set the RTS/CTS flag for the first subframe based
1316 if (aggr
&& (bf
== bf_first
) &&
1317 unlikely(rts_thresh
!= (u32
) -1)) {
1319 * "len" is the size of the entire AMPDU.
1321 if (!rts_thresh
|| (len
> rts_thresh
))
1328 ath_buf_set_rate(sc
, bf
, &info
, len
, rts
);
1331 info
.buf_addr
[0] = bf
->bf_buf_addr
;
1332 info
.buf_len
[0] = skb
->len
;
1333 info
.pkt_len
= fi
->framelen
;
1334 info
.keyix
= fi
->keyix
;
1335 info
.keytype
= fi
->keytype
;
1339 info
.aggr
= AGGR_BUF_FIRST
;
1340 else if (bf
== bf_first
->bf_lastbf
)
1341 info
.aggr
= AGGR_BUF_LAST
;
1343 info
.aggr
= AGGR_BUF_MIDDLE
;
1345 info
.ndelim
= bf
->bf_state
.ndelim
;
1346 info
.aggr_len
= len
;
1349 if (bf
== bf_first
->bf_lastbf
)
1352 ath9k_hw_set_txdesc(ah
, bf
->bf_desc
, &info
);
1358 ath_tx_form_burst(struct ath_softc
*sc
, struct ath_txq
*txq
,
1359 struct ath_atx_tid
*tid
, struct list_head
*bf_q
,
1360 struct ath_buf
*bf_first
, struct sk_buff_head
*tid_q
)
1362 struct ath_buf
*bf
= bf_first
, *bf_prev
= NULL
;
1363 struct sk_buff
*skb
;
1367 struct ieee80211_tx_info
*tx_info
;
1371 __skb_unlink(skb
, tid_q
);
1372 list_add_tail(&bf
->list
, bf_q
);
1374 bf_prev
->bf_next
= bf
;
1380 bf
= ath_tx_get_tid_subframe(sc
, txq
, tid
, &tid_q
);
1384 tx_info
= IEEE80211_SKB_CB(bf
->bf_mpdu
);
1385 if (tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
)
1388 ath_set_rates(tid
->an
->vif
, tid
->an
->sta
, bf
);
1392 static bool ath_tx_sched_aggr(struct ath_softc
*sc
, struct ath_txq
*txq
,
1393 struct ath_atx_tid
*tid
, bool *stop
)
1396 struct ieee80211_tx_info
*tx_info
;
1397 struct sk_buff_head
*tid_q
;
1398 struct list_head bf_q
;
1400 bool aggr
, last
= true;
1402 if (!ath_tid_has_buffered(tid
))
1405 INIT_LIST_HEAD(&bf_q
);
1407 bf
= ath_tx_get_tid_subframe(sc
, txq
, tid
, &tid_q
);
1411 tx_info
= IEEE80211_SKB_CB(bf
->bf_mpdu
);
1412 aggr
= !!(tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
);
1413 if ((aggr
&& txq
->axq_ampdu_depth
>= ATH_AGGR_MIN_QDEPTH
) ||
1414 (!aggr
&& txq
->axq_depth
>= ATH_NON_AGGR_MIN_QDEPTH
)) {
1419 ath_set_rates(tid
->an
->vif
, tid
->an
->sta
, bf
);
1421 last
= ath_tx_form_aggr(sc
, txq
, tid
, &bf_q
, bf
,
1424 ath_tx_form_burst(sc
, txq
, tid
, &bf_q
, bf
, tid_q
);
1426 if (list_empty(&bf_q
))
1429 if (tid
->ac
->clear_ps_filter
|| tid
->an
->no_ps_filter
) {
1430 tid
->ac
->clear_ps_filter
= false;
1431 tx_info
->flags
|= IEEE80211_TX_CTL_CLEAR_PS_FILT
;
1434 ath_tx_fill_desc(sc
, bf
, txq
, aggr_len
);
1435 ath_tx_txqaddbuf(sc
, txq
, &bf_q
, false);
1439 int ath_tx_aggr_start(struct ath_softc
*sc
, struct ieee80211_sta
*sta
,
1442 struct ath_atx_tid
*txtid
;
1443 struct ath_txq
*txq
;
1444 struct ath_node
*an
;
1447 an
= (struct ath_node
*)sta
->drv_priv
;
1448 txtid
= ATH_AN_2_TID(an
, tid
);
1449 txq
= txtid
->ac
->txq
;
1451 ath_txq_lock(sc
, txq
);
1453 /* update ampdu factor/density, they may have changed. This may happen
1454 * in HT IBSS when a beacon with HT-info is received after the station
1455 * has already been added.
1457 if (sta
->ht_cap
.ht_supported
) {
1458 an
->maxampdu
= (1 << (IEEE80211_HT_MAX_AMPDU_FACTOR
+
1459 sta
->ht_cap
.ampdu_factor
)) - 1;
1460 density
= ath9k_parse_mpdudensity(sta
->ht_cap
.ampdu_density
);
1461 an
->mpdudensity
= density
;
1464 /* force sequence number allocation for pending frames */
1465 ath_tx_tid_change_state(sc
, txtid
);
1467 txtid
->active
= true;
1468 *ssn
= txtid
->seq_start
= txtid
->seq_next
;
1469 txtid
->bar_index
= -1;
1471 memset(txtid
->tx_buf
, 0, sizeof(txtid
->tx_buf
));
1472 txtid
->baw_head
= txtid
->baw_tail
= 0;
1474 ath_txq_unlock_complete(sc
, txq
);
1479 void ath_tx_aggr_stop(struct ath_softc
*sc
, struct ieee80211_sta
*sta
, u16 tid
)
1481 struct ath_node
*an
= (struct ath_node
*)sta
->drv_priv
;
1482 struct ath_atx_tid
*txtid
= ATH_AN_2_TID(an
, tid
);
1483 struct ath_txq
*txq
= txtid
->ac
->txq
;
1485 ath_txq_lock(sc
, txq
);
1486 txtid
->active
= false;
1487 ath_tx_flush_tid(sc
, txtid
);
1488 ath_tx_tid_change_state(sc
, txtid
);
1489 ath_txq_unlock_complete(sc
, txq
);
1492 void ath_tx_aggr_sleep(struct ieee80211_sta
*sta
, struct ath_softc
*sc
,
1493 struct ath_node
*an
)
1495 struct ath_atx_tid
*tid
;
1496 struct ath_atx_ac
*ac
;
1497 struct ath_txq
*txq
;
1501 for (tidno
= 0, tid
= &an
->tid
[tidno
];
1502 tidno
< IEEE80211_NUM_TIDS
; tidno
++, tid
++) {
1507 ath_txq_lock(sc
, txq
);
1510 ath_txq_unlock(sc
, txq
);
1514 buffered
= ath_tid_has_buffered(tid
);
1517 list_del(&tid
->list
);
1521 list_del(&ac
->list
);
1524 ath_txq_unlock(sc
, txq
);
1526 ieee80211_sta_set_buffered(sta
, tidno
, buffered
);
1530 void ath_tx_aggr_wakeup(struct ath_softc
*sc
, struct ath_node
*an
)
1532 struct ath_atx_tid
*tid
;
1533 struct ath_atx_ac
*ac
;
1534 struct ath_txq
*txq
;
1537 for (tidno
= 0, tid
= &an
->tid
[tidno
];
1538 tidno
< IEEE80211_NUM_TIDS
; tidno
++, tid
++) {
1543 ath_txq_lock(sc
, txq
);
1544 ac
->clear_ps_filter
= true;
1546 if (ath_tid_has_buffered(tid
)) {
1547 ath_tx_queue_tid(sc
, txq
, tid
);
1548 ath_txq_schedule(sc
, txq
);
1551 ath_txq_unlock_complete(sc
, txq
);
1555 void ath_tx_aggr_resume(struct ath_softc
*sc
, struct ieee80211_sta
*sta
,
1558 struct ath_atx_tid
*tid
;
1559 struct ath_node
*an
;
1560 struct ath_txq
*txq
;
1562 an
= (struct ath_node
*)sta
->drv_priv
;
1563 tid
= ATH_AN_2_TID(an
, tidno
);
1566 ath_txq_lock(sc
, txq
);
1568 tid
->baw_size
= IEEE80211_MIN_AMPDU_BUF
<< sta
->ht_cap
.ampdu_factor
;
1570 if (ath_tid_has_buffered(tid
)) {
1571 ath_tx_queue_tid(sc
, txq
, tid
);
1572 ath_txq_schedule(sc
, txq
);
1575 ath_txq_unlock_complete(sc
, txq
);
1578 void ath9k_release_buffered_frames(struct ieee80211_hw
*hw
,
1579 struct ieee80211_sta
*sta
,
1580 u16 tids
, int nframes
,
1581 enum ieee80211_frame_release_type reason
,
1584 struct ath_softc
*sc
= hw
->priv
;
1585 struct ath_node
*an
= (struct ath_node
*)sta
->drv_priv
;
1586 struct ath_txq
*txq
= sc
->tx
.uapsdq
;
1587 struct ieee80211_tx_info
*info
;
1588 struct list_head bf_q
;
1589 struct ath_buf
*bf_tail
= NULL
, *bf
;
1590 struct sk_buff_head
*tid_q
;
1594 INIT_LIST_HEAD(&bf_q
);
1595 for (i
= 0; tids
&& nframes
; i
++, tids
>>= 1) {
1596 struct ath_atx_tid
*tid
;
1601 tid
= ATH_AN_2_TID(an
, i
);
1603 ath_txq_lock(sc
, tid
->ac
->txq
);
1604 while (nframes
> 0) {
1605 bf
= ath_tx_get_tid_subframe(sc
, sc
->tx
.uapsdq
, tid
, &tid_q
);
1609 __skb_unlink(bf
->bf_mpdu
, tid_q
);
1610 list_add_tail(&bf
->list
, &bf_q
);
1611 ath_set_rates(tid
->an
->vif
, tid
->an
->sta
, bf
);
1612 if (bf_isampdu(bf
)) {
1613 ath_tx_addto_baw(sc
, tid
, bf
);
1614 bf
->bf_state
.bf_type
&= ~BUF_AGGR
;
1617 bf_tail
->bf_next
= bf
;
1622 TX_STAT_INC(txq
->axq_qnum
, a_queued_hw
);
1624 if (an
->sta
&& !ath_tid_has_buffered(tid
))
1625 ieee80211_sta_set_buffered(an
->sta
, i
, false);
1627 ath_txq_unlock_complete(sc
, tid
->ac
->txq
);
1630 if (list_empty(&bf_q
))
1633 info
= IEEE80211_SKB_CB(bf_tail
->bf_mpdu
);
1634 info
->flags
|= IEEE80211_TX_STATUS_EOSP
;
1636 bf
= list_first_entry(&bf_q
, struct ath_buf
, list
);
1637 ath_txq_lock(sc
, txq
);
1638 ath_tx_fill_desc(sc
, bf
, txq
, 0);
1639 ath_tx_txqaddbuf(sc
, txq
, &bf_q
, false);
1640 ath_txq_unlock(sc
, txq
);
1643 /********************/
1644 /* Queue Management */
1645 /********************/
1647 struct ath_txq
*ath_txq_setup(struct ath_softc
*sc
, int qtype
, int subtype
)
1649 struct ath_hw
*ah
= sc
->sc_ah
;
1650 struct ath9k_tx_queue_info qi
;
1651 static const int subtype_txq_to_hwq
[] = {
1652 [IEEE80211_AC_BE
] = ATH_TXQ_AC_BE
,
1653 [IEEE80211_AC_BK
] = ATH_TXQ_AC_BK
,
1654 [IEEE80211_AC_VI
] = ATH_TXQ_AC_VI
,
1655 [IEEE80211_AC_VO
] = ATH_TXQ_AC_VO
,
1659 memset(&qi
, 0, sizeof(qi
));
1660 qi
.tqi_subtype
= subtype_txq_to_hwq
[subtype
];
1661 qi
.tqi_aifs
= ATH9K_TXQ_USEDEFAULT
;
1662 qi
.tqi_cwmin
= ATH9K_TXQ_USEDEFAULT
;
1663 qi
.tqi_cwmax
= ATH9K_TXQ_USEDEFAULT
;
1664 qi
.tqi_physCompBuf
= 0;
1667 * Enable interrupts only for EOL and DESC conditions.
1668 * We mark tx descriptors to receive a DESC interrupt
1669 * when a tx queue gets deep; otherwise waiting for the
1670 * EOL to reap descriptors. Note that this is done to
1671 * reduce interrupt load and this only defers reaping
1672 * descriptors, never transmitting frames. Aside from
1673 * reducing interrupts this also permits more concurrency.
1674 * The only potential downside is if the tx queue backs
1675 * up in which case the top half of the kernel may backup
1676 * due to a lack of tx descriptors.
1678 * The UAPSD queue is an exception, since we take a desc-
1679 * based intr on the EOSP frames.
1681 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) {
1682 qi
.tqi_qflags
= TXQ_FLAG_TXINT_ENABLE
;
1684 if (qtype
== ATH9K_TX_QUEUE_UAPSD
)
1685 qi
.tqi_qflags
= TXQ_FLAG_TXDESCINT_ENABLE
;
1687 qi
.tqi_qflags
= TXQ_FLAG_TXEOLINT_ENABLE
|
1688 TXQ_FLAG_TXDESCINT_ENABLE
;
1690 axq_qnum
= ath9k_hw_setuptxqueue(ah
, qtype
, &qi
);
1691 if (axq_qnum
== -1) {
1693 * NB: don't print a message, this happens
1694 * normally on parts with too few tx queues
1698 if (!ATH_TXQ_SETUP(sc
, axq_qnum
)) {
1699 struct ath_txq
*txq
= &sc
->tx
.txq
[axq_qnum
];
1701 txq
->axq_qnum
= axq_qnum
;
1702 txq
->mac80211_qnum
= -1;
1703 txq
->axq_link
= NULL
;
1704 __skb_queue_head_init(&txq
->complete_q
);
1705 INIT_LIST_HEAD(&txq
->axq_q
);
1706 spin_lock_init(&txq
->axq_lock
);
1708 txq
->axq_ampdu_depth
= 0;
1709 txq
->axq_tx_inprogress
= false;
1710 sc
->tx
.txqsetup
|= 1<<axq_qnum
;
1712 txq
->txq_headidx
= txq
->txq_tailidx
= 0;
1713 for (i
= 0; i
< ATH_TXFIFO_DEPTH
; i
++)
1714 INIT_LIST_HEAD(&txq
->txq_fifo
[i
]);
1716 return &sc
->tx
.txq
[axq_qnum
];
1719 int ath_txq_update(struct ath_softc
*sc
, int qnum
,
1720 struct ath9k_tx_queue_info
*qinfo
)
1722 struct ath_hw
*ah
= sc
->sc_ah
;
1724 struct ath9k_tx_queue_info qi
;
1726 BUG_ON(sc
->tx
.txq
[qnum
].axq_qnum
!= qnum
);
1728 ath9k_hw_get_txq_props(ah
, qnum
, &qi
);
1729 qi
.tqi_aifs
= qinfo
->tqi_aifs
;
1730 qi
.tqi_cwmin
= qinfo
->tqi_cwmin
;
1731 qi
.tqi_cwmax
= qinfo
->tqi_cwmax
;
1732 qi
.tqi_burstTime
= qinfo
->tqi_burstTime
;
1733 qi
.tqi_readyTime
= qinfo
->tqi_readyTime
;
1735 if (!ath9k_hw_set_txq_props(ah
, qnum
, &qi
)) {
1736 ath_err(ath9k_hw_common(sc
->sc_ah
),
1737 "Unable to update hardware queue %u!\n", qnum
);
1740 ath9k_hw_resettxqueue(ah
, qnum
);
1746 int ath_cabq_update(struct ath_softc
*sc
)
1748 struct ath9k_tx_queue_info qi
;
1749 struct ath_beacon_config
*cur_conf
= &sc
->cur_chan
->beacon
;
1750 int qnum
= sc
->beacon
.cabq
->axq_qnum
;
1752 ath9k_hw_get_txq_props(sc
->sc_ah
, qnum
, &qi
);
1754 qi
.tqi_readyTime
= (TU_TO_USEC(cur_conf
->beacon_interval
) *
1755 ATH_CABQ_READY_TIME
) / 100;
1756 ath_txq_update(sc
, qnum
, &qi
);
1761 static void ath_drain_txq_list(struct ath_softc
*sc
, struct ath_txq
*txq
,
1762 struct list_head
*list
)
1764 struct ath_buf
*bf
, *lastbf
;
1765 struct list_head bf_head
;
1766 struct ath_tx_status ts
;
1768 memset(&ts
, 0, sizeof(ts
));
1769 ts
.ts_status
= ATH9K_TX_FLUSH
;
1770 INIT_LIST_HEAD(&bf_head
);
1772 while (!list_empty(list
)) {
1773 bf
= list_first_entry(list
, struct ath_buf
, list
);
1775 if (bf
->bf_state
.stale
) {
1776 list_del(&bf
->list
);
1778 ath_tx_return_buffer(sc
, bf
);
1782 lastbf
= bf
->bf_lastbf
;
1783 list_cut_position(&bf_head
, list
, &lastbf
->list
);
1784 ath_tx_process_buffer(sc
, txq
, &ts
, bf
, &bf_head
);
1789 * Drain a given TX queue (could be Beacon or Data)
1791 * This assumes output has been stopped and
1792 * we do not need to block ath_tx_tasklet.
1794 void ath_draintxq(struct ath_softc
*sc
, struct ath_txq
*txq
)
1796 ath_txq_lock(sc
, txq
);
1798 if (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) {
1799 int idx
= txq
->txq_tailidx
;
1801 while (!list_empty(&txq
->txq_fifo
[idx
])) {
1802 ath_drain_txq_list(sc
, txq
, &txq
->txq_fifo
[idx
]);
1804 INCR(idx
, ATH_TXFIFO_DEPTH
);
1806 txq
->txq_tailidx
= idx
;
1809 txq
->axq_link
= NULL
;
1810 txq
->axq_tx_inprogress
= false;
1811 ath_drain_txq_list(sc
, txq
, &txq
->axq_q
);
1813 ath_txq_unlock_complete(sc
, txq
);
1816 bool ath_drain_all_txq(struct ath_softc
*sc
)
1818 struct ath_hw
*ah
= sc
->sc_ah
;
1819 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1820 struct ath_txq
*txq
;
1824 if (test_bit(ATH_OP_INVALID
, &common
->op_flags
))
1827 ath9k_hw_abort_tx_dma(ah
);
1829 /* Check if any queue remains active */
1830 for (i
= 0; i
< ATH9K_NUM_TX_QUEUES
; i
++) {
1831 if (!ATH_TXQ_SETUP(sc
, i
))
1834 if (!sc
->tx
.txq
[i
].axq_depth
)
1837 if (ath9k_hw_numtxpending(ah
, sc
->tx
.txq
[i
].axq_qnum
))
1842 ath_err(common
, "Failed to stop TX DMA, queues=0x%03x!\n", npend
);
1844 for (i
= 0; i
< ATH9K_NUM_TX_QUEUES
; i
++) {
1845 if (!ATH_TXQ_SETUP(sc
, i
))
1849 * The caller will resume queues with ieee80211_wake_queues.
1850 * Mark the queue as not stopped to prevent ath_tx_complete
1851 * from waking the queue too early.
1853 txq
= &sc
->tx
.txq
[i
];
1854 txq
->stopped
= false;
1855 ath_draintxq(sc
, txq
);
1861 void ath_tx_cleanupq(struct ath_softc
*sc
, struct ath_txq
*txq
)
1863 ath9k_hw_releasetxqueue(sc
->sc_ah
, txq
->axq_qnum
);
1864 sc
->tx
.txqsetup
&= ~(1<<txq
->axq_qnum
);
1867 /* For each acq entry, for each tid, try to schedule packets
1868 * for transmit until ampdu_depth has reached min Q depth.
1870 void ath_txq_schedule(struct ath_softc
*sc
, struct ath_txq
*txq
)
1872 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1873 struct ath_atx_ac
*ac
, *last_ac
;
1874 struct ath_atx_tid
*tid
, *last_tid
;
1875 struct list_head
*ac_list
;
1878 if (txq
->mac80211_qnum
< 0)
1881 if (test_bit(ATH_OP_HW_RESET
, &common
->op_flags
))
1884 spin_lock_bh(&sc
->chan_lock
);
1885 ac_list
= &sc
->cur_chan
->acq
[txq
->mac80211_qnum
];
1887 if (list_empty(ac_list
)) {
1888 spin_unlock_bh(&sc
->chan_lock
);
1894 last_ac
= list_entry(ac_list
->prev
, struct ath_atx_ac
, list
);
1895 while (!list_empty(ac_list
)) {
1898 if (sc
->cur_chan
->stopped
)
1901 ac
= list_first_entry(ac_list
, struct ath_atx_ac
, list
);
1902 last_tid
= list_entry(ac
->tid_q
.prev
, struct ath_atx_tid
, list
);
1903 list_del(&ac
->list
);
1906 while (!list_empty(&ac
->tid_q
)) {
1908 tid
= list_first_entry(&ac
->tid_q
, struct ath_atx_tid
,
1910 list_del(&tid
->list
);
1913 if (ath_tx_sched_aggr(sc
, txq
, tid
, &stop
))
1917 * add tid to round-robin queue if more frames
1918 * are pending for the tid
1920 if (ath_tid_has_buffered(tid
))
1921 ath_tx_queue_tid(sc
, txq
, tid
);
1923 if (stop
|| tid
== last_tid
)
1927 if (!list_empty(&ac
->tid_q
) && !ac
->sched
) {
1929 list_add_tail(&ac
->list
, ac_list
);
1935 if (ac
== last_ac
) {
1940 last_ac
= list_entry(ac_list
->prev
,
1941 struct ath_atx_ac
, list
);
1946 spin_unlock_bh(&sc
->chan_lock
);
1949 void ath_txq_schedule_all(struct ath_softc
*sc
)
1951 struct ath_txq
*txq
;
1954 for (i
= 0; i
< IEEE80211_NUM_ACS
; i
++) {
1955 txq
= sc
->tx
.txq_map
[i
];
1957 spin_lock_bh(&txq
->axq_lock
);
1958 ath_txq_schedule(sc
, txq
);
1959 spin_unlock_bh(&txq
->axq_lock
);
1968 * Insert a chain of ath_buf (descriptors) on a txq and
1969 * assume the descriptors are already chained together by caller.
1971 static void ath_tx_txqaddbuf(struct ath_softc
*sc
, struct ath_txq
*txq
,
1972 struct list_head
*head
, bool internal
)
1974 struct ath_hw
*ah
= sc
->sc_ah
;
1975 struct ath_common
*common
= ath9k_hw_common(ah
);
1976 struct ath_buf
*bf
, *bf_last
;
1977 bool puttxbuf
= false;
1981 * Insert the frame on the outbound list and
1982 * pass it on to the hardware.
1985 if (list_empty(head
))
1988 edma
= !!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
);
1989 bf
= list_first_entry(head
, struct ath_buf
, list
);
1990 bf_last
= list_entry(head
->prev
, struct ath_buf
, list
);
1992 ath_dbg(common
, QUEUE
, "qnum: %d, txq depth: %d\n",
1993 txq
->axq_qnum
, txq
->axq_depth
);
1995 if (edma
&& list_empty(&txq
->txq_fifo
[txq
->txq_headidx
])) {
1996 list_splice_tail_init(head
, &txq
->txq_fifo
[txq
->txq_headidx
]);
1997 INCR(txq
->txq_headidx
, ATH_TXFIFO_DEPTH
);
2000 list_splice_tail_init(head
, &txq
->axq_q
);
2002 if (txq
->axq_link
) {
2003 ath9k_hw_set_desc_link(ah
, txq
->axq_link
, bf
->bf_daddr
);
2004 ath_dbg(common
, XMIT
, "link[%u] (%p)=%llx (%p)\n",
2005 txq
->axq_qnum
, txq
->axq_link
,
2006 ito64(bf
->bf_daddr
), bf
->bf_desc
);
2010 txq
->axq_link
= bf_last
->bf_desc
;
2014 TX_STAT_INC(txq
->axq_qnum
, puttxbuf
);
2015 ath9k_hw_puttxbuf(ah
, txq
->axq_qnum
, bf
->bf_daddr
);
2016 ath_dbg(common
, XMIT
, "TXDP[%u] = %llx (%p)\n",
2017 txq
->axq_qnum
, ito64(bf
->bf_daddr
), bf
->bf_desc
);
2020 if (!edma
|| sc
->tx99_state
) {
2021 TX_STAT_INC(txq
->axq_qnum
, txstart
);
2022 ath9k_hw_txstart(ah
, txq
->axq_qnum
);
2028 if (bf_is_ampdu_not_probing(bf
))
2029 txq
->axq_ampdu_depth
++;
2031 bf_last
= bf
->bf_lastbf
;
2032 bf
= bf_last
->bf_next
;
2033 bf_last
->bf_next
= NULL
;
2038 static void ath_tx_send_normal(struct ath_softc
*sc
, struct ath_txq
*txq
,
2039 struct ath_atx_tid
*tid
, struct sk_buff
*skb
)
2041 struct ieee80211_tx_info
*tx_info
= IEEE80211_SKB_CB(skb
);
2042 struct ath_frame_info
*fi
= get_frame_info(skb
);
2043 struct list_head bf_head
;
2044 struct ath_buf
*bf
= fi
->bf
;
2046 INIT_LIST_HEAD(&bf_head
);
2047 list_add_tail(&bf
->list
, &bf_head
);
2048 bf
->bf_state
.bf_type
= 0;
2049 if (tid
&& (tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
)) {
2050 bf
->bf_state
.bf_type
= BUF_AMPDU
;
2051 ath_tx_addto_baw(sc
, tid
, bf
);
2056 ath_tx_fill_desc(sc
, bf
, txq
, fi
->framelen
);
2057 ath_tx_txqaddbuf(sc
, txq
, &bf_head
, false);
2058 TX_STAT_INC(txq
->axq_qnum
, queued
);
2061 static void setup_frame_info(struct ieee80211_hw
*hw
,
2062 struct ieee80211_sta
*sta
,
2063 struct sk_buff
*skb
,
2066 struct ieee80211_tx_info
*tx_info
= IEEE80211_SKB_CB(skb
);
2067 struct ieee80211_key_conf
*hw_key
= tx_info
->control
.hw_key
;
2068 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*)skb
->data
;
2069 const struct ieee80211_rate
*rate
;
2070 struct ath_frame_info
*fi
= get_frame_info(skb
);
2071 struct ath_node
*an
= NULL
;
2072 enum ath9k_key_type keytype
;
2073 bool short_preamble
= false;
2076 * We check if Short Preamble is needed for the CTS rate by
2077 * checking the BSS's global flag.
2078 * But for the rate series, IEEE80211_TX_RC_USE_SHORT_PREAMBLE is used.
2080 if (tx_info
->control
.vif
&&
2081 tx_info
->control
.vif
->bss_conf
.use_short_preamble
)
2082 short_preamble
= true;
2084 rate
= ieee80211_get_rts_cts_rate(hw
, tx_info
);
2085 keytype
= ath9k_cmn_get_hw_crypto_keytype(skb
);
2088 an
= (struct ath_node
*) sta
->drv_priv
;
2090 memset(fi
, 0, sizeof(*fi
));
2093 fi
->keyix
= hw_key
->hw_key_idx
;
2094 else if (an
&& ieee80211_is_data(hdr
->frame_control
) && an
->ps_key
> 0)
2095 fi
->keyix
= an
->ps_key
;
2097 fi
->keyix
= ATH9K_TXKEYIX_INVALID
;
2098 fi
->keytype
= keytype
;
2099 fi
->framelen
= framelen
;
2100 fi
->tx_power
= MAX_RATE_POWER
;
2104 fi
->rtscts_rate
= rate
->hw_value
;
2106 fi
->rtscts_rate
|= rate
->hw_value_short
;
2109 u8
ath_txchainmask_reduction(struct ath_softc
*sc
, u8 chainmask
, u32 rate
)
2111 struct ath_hw
*ah
= sc
->sc_ah
;
2112 struct ath9k_channel
*curchan
= ah
->curchan
;
2114 if ((ah
->caps
.hw_caps
& ATH9K_HW_CAP_APM
) && IS_CHAN_5GHZ(curchan
) &&
2115 (chainmask
== 0x7) && (rate
< 0x90))
2117 else if (AR_SREV_9462(ah
) && ath9k_hw_btcoex_is_enabled(ah
) &&
2125 * Assign a descriptor (and sequence number if necessary,
2126 * and map buffer for DMA. Frees skb on error
2128 static struct ath_buf
*ath_tx_setup_buffer(struct ath_softc
*sc
,
2129 struct ath_txq
*txq
,
2130 struct ath_atx_tid
*tid
,
2131 struct sk_buff
*skb
)
2133 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2134 struct ath_frame_info
*fi
= get_frame_info(skb
);
2135 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*)skb
->data
;
2140 bf
= ath_tx_get_buffer(sc
);
2142 ath_dbg(common
, XMIT
, "TX buffers are full\n");
2146 ATH_TXBUF_RESET(bf
);
2148 if (tid
&& ieee80211_is_data_present(hdr
->frame_control
)) {
2149 fragno
= le16_to_cpu(hdr
->seq_ctrl
) & IEEE80211_SCTL_FRAG
;
2150 seqno
= tid
->seq_next
;
2151 hdr
->seq_ctrl
= cpu_to_le16(tid
->seq_next
<< IEEE80211_SEQ_SEQ_SHIFT
);
2154 hdr
->seq_ctrl
|= cpu_to_le16(fragno
);
2156 if (!ieee80211_has_morefrags(hdr
->frame_control
))
2157 INCR(tid
->seq_next
, IEEE80211_SEQ_MAX
);
2159 bf
->bf_state
.seqno
= seqno
;
2164 bf
->bf_buf_addr
= dma_map_single(sc
->dev
, skb
->data
,
2165 skb
->len
, DMA_TO_DEVICE
);
2166 if (unlikely(dma_mapping_error(sc
->dev
, bf
->bf_buf_addr
))) {
2168 bf
->bf_buf_addr
= 0;
2169 ath_err(ath9k_hw_common(sc
->sc_ah
),
2170 "dma_mapping_error() on TX\n");
2171 ath_tx_return_buffer(sc
, bf
);
2180 void ath_assign_seq(struct ath_common
*common
, struct sk_buff
*skb
)
2182 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*) skb
->data
;
2183 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
2184 struct ieee80211_vif
*vif
= info
->control
.vif
;
2185 struct ath_vif
*avp
;
2187 if (!(info
->flags
& IEEE80211_TX_CTL_ASSIGN_SEQ
))
2193 avp
= (struct ath_vif
*)vif
->drv_priv
;
2195 if (info
->flags
& IEEE80211_TX_CTL_FIRST_FRAGMENT
)
2196 avp
->seq_no
+= 0x10;
2198 hdr
->seq_ctrl
&= cpu_to_le16(IEEE80211_SCTL_FRAG
);
2199 hdr
->seq_ctrl
|= cpu_to_le16(avp
->seq_no
);
2202 static int ath_tx_prepare(struct ieee80211_hw
*hw
, struct sk_buff
*skb
,
2203 struct ath_tx_control
*txctl
)
2205 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*) skb
->data
;
2206 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
2207 struct ieee80211_sta
*sta
= txctl
->sta
;
2208 struct ieee80211_vif
*vif
= info
->control
.vif
;
2209 struct ath_vif
*avp
;
2210 struct ath_softc
*sc
= hw
->priv
;
2211 int frmlen
= skb
->len
+ FCS_LEN
;
2212 int padpos
, padsize
;
2214 /* NOTE: sta can be NULL according to net/mac80211.h */
2216 txctl
->an
= (struct ath_node
*)sta
->drv_priv
;
2217 else if (vif
&& ieee80211_is_data(hdr
->frame_control
)) {
2218 avp
= (void *)vif
->drv_priv
;
2219 txctl
->an
= &avp
->mcast_node
;
2222 if (info
->control
.hw_key
)
2223 frmlen
+= info
->control
.hw_key
->icv_len
;
2225 ath_assign_seq(ath9k_hw_common(sc
->sc_ah
), skb
);
2227 if ((vif
&& vif
->type
!= NL80211_IFTYPE_AP
&&
2228 vif
->type
!= NL80211_IFTYPE_AP_VLAN
) ||
2229 !ieee80211_is_data(hdr
->frame_control
))
2230 info
->flags
|= IEEE80211_TX_CTL_CLEAR_PS_FILT
;
2232 /* Add the padding after the header if this is not already done */
2233 padpos
= ieee80211_hdrlen(hdr
->frame_control
);
2234 padsize
= padpos
& 3;
2235 if (padsize
&& skb
->len
> padpos
) {
2236 if (skb_headroom(skb
) < padsize
)
2239 skb_push(skb
, padsize
);
2240 memmove(skb
->data
, skb
->data
+ padsize
, padpos
);
2243 setup_frame_info(hw
, sta
, skb
, frmlen
);
2248 /* Upon failure caller should free skb */
2249 int ath_tx_start(struct ieee80211_hw
*hw
, struct sk_buff
*skb
,
2250 struct ath_tx_control
*txctl
)
2252 struct ieee80211_hdr
*hdr
;
2253 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
2254 struct ieee80211_sta
*sta
= txctl
->sta
;
2255 struct ieee80211_vif
*vif
= info
->control
.vif
;
2256 struct ath_frame_info
*fi
= get_frame_info(skb
);
2257 struct ath_vif
*avp
= NULL
;
2258 struct ath_softc
*sc
= hw
->priv
;
2259 struct ath_txq
*txq
= txctl
->txq
;
2260 struct ath_atx_tid
*tid
= NULL
;
2262 bool queue
, skip_uapsd
= false, ps_resp
;
2266 avp
= (void *)vif
->drv_priv
;
2268 if (info
->flags
& IEEE80211_TX_CTL_TX_OFFCHAN
)
2269 txctl
->force_channel
= true;
2271 ps_resp
= !!(info
->control
.flags
& IEEE80211_TX_CTRL_PS_RESPONSE
);
2273 ret
= ath_tx_prepare(hw
, skb
, txctl
);
2277 hdr
= (struct ieee80211_hdr
*) skb
->data
;
2279 * At this point, the vif, hw_key and sta pointers in the tx control
2280 * info are no longer valid (overwritten by the ath_frame_info data.
2283 q
= skb_get_queue_mapping(skb
);
2285 ath_txq_lock(sc
, txq
);
2286 if (txq
== sc
->tx
.txq_map
[q
]) {
2288 if (++txq
->pending_frames
> sc
->tx
.txq_max_pending
[q
] &&
2290 if (ath9k_is_chanctx_enabled())
2291 ieee80211_stop_queue(sc
->hw
, info
->hw_queue
);
2293 ieee80211_stop_queue(sc
->hw
, q
);
2294 txq
->stopped
= true;
2298 queue
= ieee80211_is_data_present(hdr
->frame_control
);
2300 /* Force queueing of all frames that belong to a virtual interface on
2301 * a different channel context, to ensure that they are sent on the
2304 if (((avp
&& avp
->chanctx
!= sc
->cur_chan
) ||
2305 sc
->cur_chan
->stopped
) && !txctl
->force_channel
) {
2307 txctl
->an
= &avp
->mcast_node
;
2312 if (txctl
->an
&& queue
)
2313 tid
= ath_get_skb_tid(sc
, txctl
->an
, skb
);
2315 if (!skip_uapsd
&& ps_resp
) {
2316 ath_txq_unlock(sc
, txq
);
2317 txq
= sc
->tx
.uapsdq
;
2318 ath_txq_lock(sc
, txq
);
2319 } else if (txctl
->an
&& queue
) {
2320 WARN_ON(tid
->ac
->txq
!= txctl
->txq
);
2322 if (info
->flags
& IEEE80211_TX_CTL_CLEAR_PS_FILT
)
2323 tid
->ac
->clear_ps_filter
= true;
2326 * Add this frame to software queue for scheduling later
2329 TX_STAT_INC(txq
->axq_qnum
, a_queued_sw
);
2330 __skb_queue_tail(&tid
->buf_q
, skb
);
2331 if (!txctl
->an
->sleeping
)
2332 ath_tx_queue_tid(sc
, txq
, tid
);
2334 ath_txq_schedule(sc
, txq
);
2338 bf
= ath_tx_setup_buffer(sc
, txq
, tid
, skb
);
2340 ath_txq_skb_done(sc
, txq
, skb
);
2342 dev_kfree_skb_any(skb
);
2344 ieee80211_free_txskb(sc
->hw
, skb
);
2348 bf
->bf_state
.bfs_paprd
= txctl
->paprd
;
2351 bf
->bf_state
.bfs_paprd_timestamp
= jiffies
;
2353 ath_set_rates(vif
, sta
, bf
);
2354 ath_tx_send_normal(sc
, txq
, tid
, skb
);
2357 ath_txq_unlock(sc
, txq
);
2362 void ath_tx_cabq(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
,
2363 struct sk_buff
*skb
)
2365 struct ath_softc
*sc
= hw
->priv
;
2366 struct ath_tx_control txctl
= {
2367 .txq
= sc
->beacon
.cabq
2369 struct ath_tx_info info
= {};
2370 struct ieee80211_hdr
*hdr
;
2371 struct ath_buf
*bf_tail
= NULL
;
2378 sc
->cur_chan
->beacon
.beacon_interval
* 1000 *
2379 sc
->cur_chan
->beacon
.dtim_period
/ ATH_BCBUF
;
2382 struct ath_frame_info
*fi
= get_frame_info(skb
);
2384 if (ath_tx_prepare(hw
, skb
, &txctl
))
2387 bf
= ath_tx_setup_buffer(sc
, txctl
.txq
, NULL
, skb
);
2392 ath_set_rates(vif
, NULL
, bf
);
2393 ath_buf_set_rate(sc
, bf
, &info
, fi
->framelen
, false);
2394 duration
+= info
.rates
[0].PktDuration
;
2396 bf_tail
->bf_next
= bf
;
2398 list_add_tail(&bf
->list
, &bf_q
);
2402 if (duration
> max_duration
)
2405 skb
= ieee80211_get_buffered_bc(hw
, vif
);
2409 ieee80211_free_txskb(hw
, skb
);
2411 if (list_empty(&bf_q
))
2414 bf
= list_first_entry(&bf_q
, struct ath_buf
, list
);
2415 hdr
= (struct ieee80211_hdr
*) bf
->bf_mpdu
->data
;
2417 if (hdr
->frame_control
& IEEE80211_FCTL_MOREDATA
) {
2418 hdr
->frame_control
&= ~IEEE80211_FCTL_MOREDATA
;
2419 dma_sync_single_for_device(sc
->dev
, bf
->bf_buf_addr
,
2420 sizeof(*hdr
), DMA_TO_DEVICE
);
2423 ath_txq_lock(sc
, txctl
.txq
);
2424 ath_tx_fill_desc(sc
, bf
, txctl
.txq
, 0);
2425 ath_tx_txqaddbuf(sc
, txctl
.txq
, &bf_q
, false);
2426 TX_STAT_INC(txctl
.txq
->axq_qnum
, queued
);
2427 ath_txq_unlock(sc
, txctl
.txq
);
2434 static void ath_tx_complete(struct ath_softc
*sc
, struct sk_buff
*skb
,
2435 int tx_flags
, struct ath_txq
*txq
)
2437 struct ieee80211_tx_info
*tx_info
= IEEE80211_SKB_CB(skb
);
2438 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2439 struct ieee80211_hdr
* hdr
= (struct ieee80211_hdr
*)skb
->data
;
2440 int padpos
, padsize
;
2441 unsigned long flags
;
2443 ath_dbg(common
, XMIT
, "TX complete: skb: %p\n", skb
);
2445 if (sc
->sc_ah
->caldata
)
2446 set_bit(PAPRD_PACKET_SENT
, &sc
->sc_ah
->caldata
->cal_flags
);
2448 if (!(tx_flags
& ATH_TX_ERROR
))
2449 /* Frame was ACKed */
2450 tx_info
->flags
|= IEEE80211_TX_STAT_ACK
;
2452 padpos
= ieee80211_hdrlen(hdr
->frame_control
);
2453 padsize
= padpos
& 3;
2454 if (padsize
&& skb
->len
>padpos
+padsize
) {
2456 * Remove MAC header padding before giving the frame back to
2459 memmove(skb
->data
+ padsize
, skb
->data
, padpos
);
2460 skb_pull(skb
, padsize
);
2463 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
2464 if ((sc
->ps_flags
& PS_WAIT_FOR_TX_ACK
) && !txq
->axq_depth
) {
2465 sc
->ps_flags
&= ~PS_WAIT_FOR_TX_ACK
;
2467 "Going back to sleep after having received TX status (0x%lx)\n",
2468 sc
->ps_flags
& (PS_WAIT_FOR_BEACON
|
2470 PS_WAIT_FOR_PSPOLL_DATA
|
2471 PS_WAIT_FOR_TX_ACK
));
2473 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
2475 __skb_queue_tail(&txq
->complete_q
, skb
);
2476 ath_txq_skb_done(sc
, txq
, skb
);
2479 static void ath_tx_complete_buf(struct ath_softc
*sc
, struct ath_buf
*bf
,
2480 struct ath_txq
*txq
, struct list_head
*bf_q
,
2481 struct ath_tx_status
*ts
, int txok
)
2483 struct sk_buff
*skb
= bf
->bf_mpdu
;
2484 struct ieee80211_tx_info
*tx_info
= IEEE80211_SKB_CB(skb
);
2485 unsigned long flags
;
2489 tx_flags
|= ATH_TX_ERROR
;
2491 if (ts
->ts_status
& ATH9K_TXERR_FILT
)
2492 tx_info
->flags
|= IEEE80211_TX_STAT_TX_FILTERED
;
2494 dma_unmap_single(sc
->dev
, bf
->bf_buf_addr
, skb
->len
, DMA_TO_DEVICE
);
2495 bf
->bf_buf_addr
= 0;
2497 goto skip_tx_complete
;
2499 if (bf
->bf_state
.bfs_paprd
) {
2500 if (time_after(jiffies
,
2501 bf
->bf_state
.bfs_paprd_timestamp
+
2502 msecs_to_jiffies(ATH_PAPRD_TIMEOUT
)))
2503 dev_kfree_skb_any(skb
);
2505 complete(&sc
->paprd_complete
);
2507 ath_debug_stat_tx(sc
, bf
, ts
, txq
, tx_flags
);
2508 ath_tx_complete(sc
, skb
, tx_flags
, txq
);
2511 /* At this point, skb (bf->bf_mpdu) is consumed...make sure we don't
2512 * accidentally reference it later.
2517 * Return the list of ath_buf of this mpdu to free queue
2519 spin_lock_irqsave(&sc
->tx
.txbuflock
, flags
);
2520 list_splice_tail_init(bf_q
, &sc
->tx
.txbuf
);
2521 spin_unlock_irqrestore(&sc
->tx
.txbuflock
, flags
);
2524 static void ath_tx_rc_status(struct ath_softc
*sc
, struct ath_buf
*bf
,
2525 struct ath_tx_status
*ts
, int nframes
, int nbad
,
2528 struct sk_buff
*skb
= bf
->bf_mpdu
;
2529 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*)skb
->data
;
2530 struct ieee80211_tx_info
*tx_info
= IEEE80211_SKB_CB(skb
);
2531 struct ieee80211_hw
*hw
= sc
->hw
;
2532 struct ath_hw
*ah
= sc
->sc_ah
;
2536 tx_info
->status
.ack_signal
= ts
->ts_rssi
;
2538 tx_rateindex
= ts
->ts_rateindex
;
2539 WARN_ON(tx_rateindex
>= hw
->max_rates
);
2541 if (tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
) {
2542 tx_info
->flags
|= IEEE80211_TX_STAT_AMPDU
;
2544 BUG_ON(nbad
> nframes
);
2546 tx_info
->status
.ampdu_len
= nframes
;
2547 tx_info
->status
.ampdu_ack_len
= nframes
- nbad
;
2549 if ((ts
->ts_status
& ATH9K_TXERR_FILT
) == 0 &&
2550 (tx_info
->flags
& IEEE80211_TX_CTL_NO_ACK
) == 0) {
2552 * If an underrun error is seen assume it as an excessive
2553 * retry only if max frame trigger level has been reached
2554 * (2 KB for single stream, and 4 KB for dual stream).
2555 * Adjust the long retry as if the frame was tried
2556 * hw->max_rate_tries times to affect how rate control updates
2557 * PER for the failed rate.
2558 * In case of congestion on the bus penalizing this type of
2559 * underruns should help hardware actually transmit new frames
2560 * successfully by eventually preferring slower rates.
2561 * This itself should also alleviate congestion on the bus.
2563 if (unlikely(ts
->ts_flags
& (ATH9K_TX_DATA_UNDERRUN
|
2564 ATH9K_TX_DELIM_UNDERRUN
)) &&
2565 ieee80211_is_data(hdr
->frame_control
) &&
2566 ah
->tx_trig_level
>= sc
->sc_ah
->config
.max_txtrig_level
)
2567 tx_info
->status
.rates
[tx_rateindex
].count
=
2571 for (i
= tx_rateindex
+ 1; i
< hw
->max_rates
; i
++) {
2572 tx_info
->status
.rates
[i
].count
= 0;
2573 tx_info
->status
.rates
[i
].idx
= -1;
2576 tx_info
->status
.rates
[tx_rateindex
].count
= ts
->ts_longretry
+ 1;
2579 static void ath_tx_processq(struct ath_softc
*sc
, struct ath_txq
*txq
)
2581 struct ath_hw
*ah
= sc
->sc_ah
;
2582 struct ath_common
*common
= ath9k_hw_common(ah
);
2583 struct ath_buf
*bf
, *lastbf
, *bf_held
= NULL
;
2584 struct list_head bf_head
;
2585 struct ath_desc
*ds
;
2586 struct ath_tx_status ts
;
2589 ath_dbg(common
, QUEUE
, "tx queue %d (%x), link %p\n",
2590 txq
->axq_qnum
, ath9k_hw_gettxbuf(sc
->sc_ah
, txq
->axq_qnum
),
2593 ath_txq_lock(sc
, txq
);
2595 if (test_bit(ATH_OP_HW_RESET
, &common
->op_flags
))
2598 if (list_empty(&txq
->axq_q
)) {
2599 txq
->axq_link
= NULL
;
2600 ath_txq_schedule(sc
, txq
);
2603 bf
= list_first_entry(&txq
->axq_q
, struct ath_buf
, list
);
2606 * There is a race condition that a BH gets scheduled
2607 * after sw writes TxE and before hw re-load the last
2608 * descriptor to get the newly chained one.
2609 * Software must keep the last DONE descriptor as a
2610 * holding descriptor - software does so by marking
2611 * it with the STALE flag.
2614 if (bf
->bf_state
.stale
) {
2616 if (list_is_last(&bf_held
->list
, &txq
->axq_q
))
2619 bf
= list_entry(bf_held
->list
.next
, struct ath_buf
,
2623 lastbf
= bf
->bf_lastbf
;
2624 ds
= lastbf
->bf_desc
;
2626 memset(&ts
, 0, sizeof(ts
));
2627 status
= ath9k_hw_txprocdesc(ah
, ds
, &ts
);
2628 if (status
== -EINPROGRESS
)
2631 TX_STAT_INC(txq
->axq_qnum
, txprocdesc
);
2634 * Remove ath_buf's of the same transmit unit from txq,
2635 * however leave the last descriptor back as the holding
2636 * descriptor for hw.
2638 lastbf
->bf_state
.stale
= true;
2639 INIT_LIST_HEAD(&bf_head
);
2640 if (!list_is_singular(&lastbf
->list
))
2641 list_cut_position(&bf_head
,
2642 &txq
->axq_q
, lastbf
->list
.prev
);
2645 list_del(&bf_held
->list
);
2646 ath_tx_return_buffer(sc
, bf_held
);
2649 ath_tx_process_buffer(sc
, txq
, &ts
, bf
, &bf_head
);
2651 ath_txq_unlock_complete(sc
, txq
);
2654 void ath_tx_tasklet(struct ath_softc
*sc
)
2656 struct ath_hw
*ah
= sc
->sc_ah
;
2657 u32 qcumask
= ((1 << ATH9K_NUM_TX_QUEUES
) - 1) & ah
->intr_txqs
;
2660 for (i
= 0; i
< ATH9K_NUM_TX_QUEUES
; i
++) {
2661 if (ATH_TXQ_SETUP(sc
, i
) && (qcumask
& (1 << i
)))
2662 ath_tx_processq(sc
, &sc
->tx
.txq
[i
]);
2666 void ath_tx_edma_tasklet(struct ath_softc
*sc
)
2668 struct ath_tx_status ts
;
2669 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2670 struct ath_hw
*ah
= sc
->sc_ah
;
2671 struct ath_txq
*txq
;
2672 struct ath_buf
*bf
, *lastbf
;
2673 struct list_head bf_head
;
2674 struct list_head
*fifo_list
;
2678 if (test_bit(ATH_OP_HW_RESET
, &common
->op_flags
))
2681 status
= ath9k_hw_txprocdesc(ah
, NULL
, (void *)&ts
);
2682 if (status
== -EINPROGRESS
)
2684 if (status
== -EIO
) {
2685 ath_dbg(common
, XMIT
, "Error processing tx status\n");
2689 /* Process beacon completions separately */
2690 if (ts
.qid
== sc
->beacon
.beaconq
) {
2691 sc
->beacon
.tx_processed
= true;
2692 sc
->beacon
.tx_last
= !(ts
.ts_status
& ATH9K_TXERR_MASK
);
2694 if (ath9k_is_chanctx_enabled()) {
2695 ath_chanctx_event(sc
, NULL
,
2696 ATH_CHANCTX_EVENT_BEACON_SENT
);
2699 ath9k_csa_update(sc
);
2703 txq
= &sc
->tx
.txq
[ts
.qid
];
2705 ath_txq_lock(sc
, txq
);
2707 TX_STAT_INC(txq
->axq_qnum
, txprocdesc
);
2709 fifo_list
= &txq
->txq_fifo
[txq
->txq_tailidx
];
2710 if (list_empty(fifo_list
)) {
2711 ath_txq_unlock(sc
, txq
);
2715 bf
= list_first_entry(fifo_list
, struct ath_buf
, list
);
2716 if (bf
->bf_state
.stale
) {
2717 list_del(&bf
->list
);
2718 ath_tx_return_buffer(sc
, bf
);
2719 bf
= list_first_entry(fifo_list
, struct ath_buf
, list
);
2722 lastbf
= bf
->bf_lastbf
;
2724 INIT_LIST_HEAD(&bf_head
);
2725 if (list_is_last(&lastbf
->list
, fifo_list
)) {
2726 list_splice_tail_init(fifo_list
, &bf_head
);
2727 INCR(txq
->txq_tailidx
, ATH_TXFIFO_DEPTH
);
2729 if (!list_empty(&txq
->axq_q
)) {
2730 struct list_head bf_q
;
2732 INIT_LIST_HEAD(&bf_q
);
2733 txq
->axq_link
= NULL
;
2734 list_splice_tail_init(&txq
->axq_q
, &bf_q
);
2735 ath_tx_txqaddbuf(sc
, txq
, &bf_q
, true);
2738 lastbf
->bf_state
.stale
= true;
2740 list_cut_position(&bf_head
, fifo_list
,
2744 ath_tx_process_buffer(sc
, txq
, &ts
, bf
, &bf_head
);
2745 ath_txq_unlock_complete(sc
, txq
);
2753 static int ath_txstatus_setup(struct ath_softc
*sc
, int size
)
2755 struct ath_descdma
*dd
= &sc
->txsdma
;
2756 u8 txs_len
= sc
->sc_ah
->caps
.txs_len
;
2758 dd
->dd_desc_len
= size
* txs_len
;
2759 dd
->dd_desc
= dmam_alloc_coherent(sc
->dev
, dd
->dd_desc_len
,
2760 &dd
->dd_desc_paddr
, GFP_KERNEL
);
2767 static int ath_tx_edma_init(struct ath_softc
*sc
)
2771 err
= ath_txstatus_setup(sc
, ATH_TXSTATUS_RING_SIZE
);
2773 ath9k_hw_setup_statusring(sc
->sc_ah
, sc
->txsdma
.dd_desc
,
2774 sc
->txsdma
.dd_desc_paddr
,
2775 ATH_TXSTATUS_RING_SIZE
);
2780 int ath_tx_init(struct ath_softc
*sc
, int nbufs
)
2782 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2785 spin_lock_init(&sc
->tx
.txbuflock
);
2787 error
= ath_descdma_setup(sc
, &sc
->tx
.txdma
, &sc
->tx
.txbuf
,
2791 "Failed to allocate tx descriptors: %d\n", error
);
2795 error
= ath_descdma_setup(sc
, &sc
->beacon
.bdma
, &sc
->beacon
.bbuf
,
2796 "beacon", ATH_BCBUF
, 1, 1);
2799 "Failed to allocate beacon descriptors: %d\n", error
);
2803 INIT_DELAYED_WORK(&sc
->tx_complete_work
, ath_tx_complete_poll_work
);
2805 if (sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
2806 error
= ath_tx_edma_init(sc
);
2811 void ath_tx_node_init(struct ath_softc
*sc
, struct ath_node
*an
)
2813 struct ath_atx_tid
*tid
;
2814 struct ath_atx_ac
*ac
;
2817 for (tidno
= 0, tid
= &an
->tid
[tidno
];
2818 tidno
< IEEE80211_NUM_TIDS
;
2822 tid
->seq_start
= tid
->seq_next
= 0;
2823 tid
->baw_size
= WME_MAX_BA
;
2824 tid
->baw_head
= tid
->baw_tail
= 0;
2826 tid
->active
= false;
2827 __skb_queue_head_init(&tid
->buf_q
);
2828 __skb_queue_head_init(&tid
->retry_q
);
2829 acno
= TID_TO_WME_AC(tidno
);
2830 tid
->ac
= &an
->ac
[acno
];
2833 for (acno
= 0, ac
= &an
->ac
[acno
];
2834 acno
< IEEE80211_NUM_ACS
; acno
++, ac
++) {
2836 ac
->clear_ps_filter
= true;
2837 ac
->txq
= sc
->tx
.txq_map
[acno
];
2838 INIT_LIST_HEAD(&ac
->tid_q
);
2842 void ath_tx_node_cleanup(struct ath_softc
*sc
, struct ath_node
*an
)
2844 struct ath_atx_ac
*ac
;
2845 struct ath_atx_tid
*tid
;
2846 struct ath_txq
*txq
;
2849 for (tidno
= 0, tid
= &an
->tid
[tidno
];
2850 tidno
< IEEE80211_NUM_TIDS
; tidno
++, tid
++) {
2855 ath_txq_lock(sc
, txq
);
2858 list_del(&tid
->list
);
2863 list_del(&ac
->list
);
2864 tid
->ac
->sched
= false;
2867 ath_tid_drain(sc
, txq
, tid
);
2868 tid
->active
= false;
2870 ath_txq_unlock(sc
, txq
);
2874 #ifdef CONFIG_ATH9K_TX99
2876 int ath9k_tx99_send(struct ath_softc
*sc
, struct sk_buff
*skb
,
2877 struct ath_tx_control
*txctl
)
2879 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*) skb
->data
;
2880 struct ath_frame_info
*fi
= get_frame_info(skb
);
2881 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2883 int padpos
, padsize
;
2885 padpos
= ieee80211_hdrlen(hdr
->frame_control
);
2886 padsize
= padpos
& 3;
2888 if (padsize
&& skb
->len
> padpos
) {
2889 if (skb_headroom(skb
) < padsize
) {
2890 ath_dbg(common
, XMIT
,
2891 "tx99 padding failed\n");
2895 skb_push(skb
, padsize
);
2896 memmove(skb
->data
, skb
->data
+ padsize
, padpos
);
2899 fi
->keyix
= ATH9K_TXKEYIX_INVALID
;
2900 fi
->framelen
= skb
->len
+ FCS_LEN
;
2901 fi
->keytype
= ATH9K_KEY_TYPE_CLEAR
;
2903 bf
= ath_tx_setup_buffer(sc
, txctl
->txq
, NULL
, skb
);
2905 ath_dbg(common
, XMIT
, "tx99 buffer setup failed\n");
2909 ath_set_rates(sc
->tx99_vif
, NULL
, bf
);
2911 ath9k_hw_set_desc_link(sc
->sc_ah
, bf
->bf_desc
, bf
->bf_daddr
);
2912 ath9k_hw_tx99_start(sc
->sc_ah
, txctl
->txq
->axq_qnum
);
2914 ath_tx_send_normal(sc
, txctl
->txq
, NULL
, skb
);
2919 #endif /* CONFIG_ATH9K_TX99 */