drivers/net/wireless/ath/wil6210/wil6210.h

   1 /*
   2  * Copyright (c) 2012 Qualcomm Atheros, Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #ifndef __WIL6210_H__
  18 #define __WIL6210_H__
  19
  20 #include <linux/netdevice.h>
  21 #include <linux/wireless.h>
  22 #include <net/cfg80211.h>
  23 #include <linux/timex.h>
  24
  25 #define WIL_NAME "wil6210"
  26
  27 struct wil_board {
  28         int board;
  29 #define WIL_BOARD_MARLON        (1)
  30 #define WIL_BOARD_SPARROW       (2)
  31         const char * const name;
  32 };
  33
  34 /**
  35  * extract bits [@b0:@b1] (inclusive) from the value @x
  36  * it should be @b0 <= @b1, or result is incorrect
  37  */
  38 static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)
  39 {
  40         return (x >> b0) & ((1 << (b1 - b0 + 1)) - 1);
  41 }
  42
  43 #define WIL6210_MEM_SIZE (2*1024*1024UL)
  44
  45 #define WIL6210_RX_RING_SIZE    (128)
  46 #define WIL6210_TX_RING_SIZE    (512)
  47 #define WIL6210_MAX_TX_RINGS    (24) /* HW limit */
  48 #define WIL6210_MAX_CID         (8) /* HW limit */
  49 #define WIL6210_NAPI_BUDGET     (16) /* arbitrary */
  50 #define WIL6210_ITR_TRSH        (10000) /* arbitrary - about 15 IRQs/msec */
  51 #define WIL6210_FW_RECOVERY_RETRIES     (5) /* try to recover this many times */
  52 #define WIL6210_FW_RECOVERY_TO  msecs_to_jiffies(5000)
  53 #define WIL6210_SCAN_TO         msecs_to_jiffies(10000)
  54
  55 /* Hardware definitions begin */
  56
  57 /*
  58  * Mapping
  59  * RGF File      | Host addr    |  FW addr
  60  *               |              |
  61  * user_rgf      | 0x000000     | 0x880000
  62  *  dma_rgf      | 0x001000     | 0x881000
  63  * pcie_rgf      | 0x002000     | 0x882000
  64  *               |              |
  65  */
  66
  67 /* Where various structures placed in host address space */
  68 #define WIL6210_FW_HOST_OFF      (0x880000UL)
  69
  70 #define HOSTADDR(fwaddr)        (fwaddr - WIL6210_FW_HOST_OFF)
  71
  72 /*
  73  * Interrupt control registers block
  74  *
  75  * each interrupt controlled by the same bit in all registers
  76  */
  77 struct RGF_ICR {
  78         u32 ICC; /* Cause Control, RW: 0 - W1C, 1 - COR */
  79         u32 ICR; /* Cause, W1C/COR depending on ICC */
  80         u32 ICM; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */
  81         u32 ICS; /* Cause Set, WO */
  82         u32 IMV; /* Mask, RW+S/C */
  83         u32 IMS; /* Mask Set, write 1 to set */
  84         u32 IMC; /* Mask Clear, write 1 to clear */
  85 } __packed;
  86
  87 /* registers - FW addresses */
  88 #define RGF_USER_USAGE_1                (0x880004)
  89 #define RGF_USER_HW_MACHINE_STATE       (0x8801dc)
  90         #define HW_MACHINE_BOOT_DONE    (0x3fffffd)
  91 #define RGF_USER_USER_CPU_0             (0x8801e0)
  92 #define RGF_USER_MAC_CPU_0              (0x8801fc)
  93 #define RGF_USER_USER_SCRATCH_PAD       (0x8802bc)
  94 #define RGF_USER_FW_REV_ID              (0x880a8c) /* chip revision */
  95 #define RGF_USER_CLKS_CTL_0             (0x880abc)
  96         #define BIT_USER_CLKS_RST_PWGD  BIT(11) /* reset on "power good" */
  97 #define RGF_USER_CLKS_CTL_SW_RST_VEC_0  (0x880b04)
  98 #define RGF_USER_CLKS_CTL_SW_RST_VEC_1  (0x880b08)
  99 #define RGF_USER_CLKS_CTL_SW_RST_VEC_2  (0x880b0c)
 100 #define RGF_USER_CLKS_CTL_SW_RST_VEC_3  (0x880b10)
 101 #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14)
 102 #define RGF_USER_USER_ICR               (0x880b4c) /* struct RGF_ICR */
 103         #define BIT_USER_USER_ICR_SW_INT_2      BIT(18)
 104 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0      (0x880c18)
 105
 106 #define RGF_DMA_EP_TX_ICR               (0x881bb4) /* struct RGF_ICR */
 107         #define BIT_DMA_EP_TX_ICR_TX_DONE       BIT(0)
 108         #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n)  BIT(n+1) /* n = [0..23] */
 109 #define RGF_DMA_EP_RX_ICR               (0x881bd0) /* struct RGF_ICR */
 110         #define BIT_DMA_EP_RX_ICR_RX_DONE       BIT(0)
 111 #define RGF_DMA_EP_MISC_ICR             (0x881bec) /* struct RGF_ICR */
 112         #define BIT_DMA_EP_MISC_ICR_RX_HTRSH    BIT(0)
 113         #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT   BIT(1)
 114         #define BIT_DMA_EP_MISC_ICR_FW_INT(n)   BIT(28+n) /* n = [0..3] */
 115
 116 /* Interrupt moderation control */
 117 #define RGF_DMA_ITR_CNT_TRSH            (0x881c5c)
 118 #define RGF_DMA_ITR_CNT_DATA            (0x881c60)
 119 #define RGF_DMA_ITR_CNT_CRL             (0x881c64)
 120         #define BIT_DMA_ITR_CNT_CRL_EN          BIT(0)
 121         #define BIT_DMA_ITR_CNT_CRL_EXT_TICK    BIT(1)
 122         #define BIT_DMA_ITR_CNT_CRL_FOREVER     BIT(2)
 123         #define BIT_DMA_ITR_CNT_CRL_CLR         BIT(3)
 124         #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH  BIT(4)
 125
 126 #define RGF_DMA_PSEUDO_CAUSE            (0x881c68)
 127 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW    (0x881c6c)
 128 #define RGF_DMA_PSEUDO_CAUSE_MASK_FW    (0x881c70)
 129         #define BIT_DMA_PSEUDO_CAUSE_RX         BIT(0)
 130         #define BIT_DMA_PSEUDO_CAUSE_TX         BIT(1)
 131         #define BIT_DMA_PSEUDO_CAUSE_MISC       BIT(2)
 132
 133 #define RGF_HP_CTRL                     (0x88265c)
 134 #define RGF_PCIE_LOS_COUNTER_CTL        (0x882dc4)
 135
 136 /* MAC timer, usec, for packet lifetime */
 137 #define RGF_MAC_MTRL_COUNTER_0          (0x886aa8)
 138
 139 /* popular locations */
 140 #define HOST_MBOX   HOSTADDR(RGF_USER_USER_SCRATCH_PAD)
 141 #define HOST_SW_INT (HOSTADDR(RGF_USER_USER_ICR) + \
 142         offsetof(struct RGF_ICR, ICS))
 143 #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2
 144
 145 /* ISR register bits */
 146 #define ISR_MISC_FW_READY       BIT_DMA_EP_MISC_ICR_FW_INT(0)
 147 #define ISR_MISC_MBOX_EVT       BIT_DMA_EP_MISC_ICR_FW_INT(1)
 148 #define ISR_MISC_FW_ERROR       BIT_DMA_EP_MISC_ICR_FW_INT(3)
 149
 150 /* Hardware definitions end */
 151 struct fw_map {
 152         u32 from; /* linker address - from, inclusive */
 153         u32 to;   /* linker address - to, exclusive */
 154         u32 host; /* PCI/Host address - BAR0 + 0x880000 */
 155         const char *name; /* for debugfs */
 156 };
 157 /* array size should be in sync with actual definition in the wmi.c */
 158 extern const struct fw_map fw_mapping[7];
 159
 160 /**
 161  * mk_cidxtid - construct @cidxtid field
 162  * @cid: CID value
 163  * @tid: TID value
 164  *
 165  * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
 166  */
 167 static inline u8 mk_cidxtid(u8 cid, u8 tid)
 168 {
 169         return ((tid & 0xf) << 4) | (cid & 0xf);
 170 }
 171
 172 /**
 173  * parse_cidxtid - parse @cidxtid field
 174  * @cid: store CID value here
 175  * @tid: store TID value here
 176  *
 177  * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
 178  */
 179 static inline void parse_cidxtid(u8 cidxtid, u8 *cid, u8 *tid)
 180 {
 181         *cid = cidxtid & 0xf;
 182         *tid = (cidxtid >> 4) & 0xf;
 183 }
 184
 185 struct wil6210_mbox_ring {
 186         u32 base;
 187         u16 entry_size; /* max. size of mbox entry, incl. all headers */
 188         u16 size;
 189         u32 tail;
 190         u32 head;
 191 } __packed;
 192
 193 struct wil6210_mbox_ring_desc {
 194         __le32 sync;
 195         __le32 addr;
 196 } __packed;
 197
 198 /* at HOST_OFF_WIL6210_MBOX_CTL */
 199 struct wil6210_mbox_ctl {
 200         struct wil6210_mbox_ring tx;
 201         struct wil6210_mbox_ring rx;
 202 } __packed;
 203
 204 struct wil6210_mbox_hdr {
 205         __le16 seq;
 206         __le16 len; /* payload, bytes after this header */
 207         __le16 type;
 208         u8 flags;
 209         u8 reserved;
 210 } __packed;
 211
 212 #define WIL_MBOX_HDR_TYPE_WMI (0)
 213
 214 /* max. value for wil6210_mbox_hdr.len */
 215 #define MAX_MBOXITEM_SIZE   (240)
 216
 217 /**
 218  * struct wil6210_mbox_hdr_wmi - WMI header
 219  *
 220  * @mid: MAC ID
 221  *      00 - default, created by FW
 222  *      01..0f - WiFi ports, driver to create
 223  *      10..fe - debug
 224  *      ff - broadcast
 225  * @id: command/event ID
 226  * @timestamp: FW fills for events, free-running msec timer
 227  */
 228 struct wil6210_mbox_hdr_wmi {
 229         u8 mid;
 230         u8 reserved;
 231         __le16 id;
 232         __le32 timestamp;
 233 } __packed;
 234
 235 struct pending_wmi_event {
 236         struct list_head list;
 237         struct {
 238                 struct wil6210_mbox_hdr hdr;
 239                 struct wil6210_mbox_hdr_wmi wmi;
 240                 u8 data[0];
 241         } __packed event;
 242 };
 243
 244 enum { /* for wil_ctx.mapped_as */
 245         wil_mapped_as_none = 0,
 246         wil_mapped_as_single = 1,
 247         wil_mapped_as_page = 2,
 248 };
 249
 250 /**
 251  * struct wil_ctx - software context for Vring descriptor
 252  */
 253 struct wil_ctx {
 254         struct sk_buff *skb;
 255         u8 nr_frags;
 256         u8 mapped_as;
 257 };
 258
 259 union vring_desc;
 260
 261 struct vring {
 262         dma_addr_t pa;
 263         volatile union vring_desc *va; /* vring_desc[size], WriteBack by DMA */
 264         u16 size; /* number of vring_desc elements */
 265         u32 swtail;
 266         u32 swhead;
 267         u32 hwtail; /* write here to inform hw */
 268         struct wil_ctx *ctx; /* ctx[size] - software context */
 269 };
 270
 271 /**
 272  * Additional data for Tx Vring
 273  */
 274 struct vring_tx_data {
 275         int enabled;
 276         cycles_t idle, last_idle, begin;
 277 };
 278
 279 enum { /* for wil6210_priv.status */
 280         wil_status_fwready = 0,
 281         wil_status_fwconnecting,
 282         wil_status_fwconnected,
 283         wil_status_dontscan,
 284         wil_status_reset_done,
 285         wil_status_irqen, /* FIXME: interrupts enabled - for debug */
 286         wil_status_napi_en, /* NAPI enabled protected by wil->mutex */
 287 };
 288
 289 struct pci_dev;
 290
 291 /**
 292  * struct tid_ampdu_rx - TID aggregation information (Rx).
 293  *
 294  * @reorder_buf: buffer to reorder incoming aggregated MPDUs
 295  * @reorder_time: jiffies when skb was added
 296  * @session_timer: check if peer keeps Tx-ing on the TID (by timeout value)
 297  * @reorder_timer: releases expired frames from the reorder buffer.
 298  * @last_rx: jiffies of last rx activity
 299  * @head_seq_num: head sequence number in reordering buffer.
 300  * @stored_mpdu_num: number of MPDUs in reordering buffer
 301  * @ssn: Starting Sequence Number expected to be aggregated.
 302  * @buf_size: buffer size for incoming A-MPDUs
 303  * @timeout: reset timer value (in TUs).
 304  * @dialog_token: dialog token for aggregation session
 305  * @rcu_head: RCU head used for freeing this struct
 306  * @reorder_lock: serializes access to reorder buffer, see below.
 307  *
 308  * This structure's lifetime is managed by RCU, assignments to
 309  * the array holding it must hold the aggregation mutex.
 310  *
 311  * The @reorder_lock is used to protect the members of this
 312  * struct, except for @timeout, @buf_size and @dialog_token,
 313  * which are constant across the lifetime of the struct (the
 314  * dialog token being used only for debugging).
 315  */
 316 struct wil_tid_ampdu_rx {
 317         spinlock_t reorder_lock; /* see above */
 318         struct sk_buff **reorder_buf;
 319         unsigned long *reorder_time;
 320         struct timer_list session_timer;
 321         struct timer_list reorder_timer;
 322         unsigned long last_rx;
 323         u16 head_seq_num;
 324         u16 stored_mpdu_num;
 325         u16 ssn;
 326         u16 buf_size;
 327         u16 timeout;
 328         u16 ssn_last_drop;
 329         u8 dialog_token;
 330         bool first_time; /* is it 1-st time this buffer used? */
 331 };
 332
 333 struct wil6210_stats {
 334         u64 tsf;
 335         u32 snr;
 336         u16 last_mcs_rx;
 337         u16 bf_mcs; /* last BF, used for Tx */
 338         u16 my_rx_sector;
 339         u16 my_tx_sector;
 340         u16 peer_rx_sector;
 341         u16 peer_tx_sector;
 342 };
 343
 344 enum wil_sta_status {
 345         wil_sta_unused = 0,
 346         wil_sta_conn_pending = 1,
 347         wil_sta_connected = 2,
 348 };
 349
 350 #define WIL_STA_TID_NUM (16)
 351
 352 struct wil_net_stats {
 353         unsigned long   rx_packets;
 354         unsigned long   tx_packets;
 355         unsigned long   rx_bytes;
 356         unsigned long   tx_bytes;
 357         unsigned long   tx_errors;
 358         unsigned long   rx_dropped;
 359         u16 last_mcs_rx;
 360 };
 361
 362 /**
 363  * struct wil_sta_info - data for peer
 364  *
 365  * Peer identified by its CID (connection ID)
 366  * NIC performs beam forming for each peer;
 367  * if no beam forming done, frame exchange is not
 368  * possible.
 369  */
 370 struct wil_sta_info {
 371         u8 addr[ETH_ALEN];
 372         enum wil_sta_status status;
 373         struct wil_net_stats stats;
 374         bool data_port_open; /* can send any data, not only EAPOL */
 375         /* Rx BACK */
 376         struct wil_tid_ampdu_rx *tid_rx[WIL_STA_TID_NUM];
 377         unsigned long tid_rx_timer_expired[BITS_TO_LONGS(WIL_STA_TID_NUM)];
 378         unsigned long tid_rx_stop_requested[BITS_TO_LONGS(WIL_STA_TID_NUM)];
 379 };
 380
 381 struct wil6210_priv {
 382         struct pci_dev *pdev;
 383         int n_msi;
 384         struct wireless_dev *wdev;
 385         void __iomem *csr;
 386         ulong status;
 387         u32 fw_version;
 388         u32 hw_version;
 389         struct wil_board *board;
 390         u8 n_mids; /* number of additional MIDs as reported by FW */
 391         int recovery_count; /* num of FW recovery attempts in a short time */
 392         unsigned long last_fw_recovery; /* jiffies of last fw recovery */
 393         /* profile */
 394         u32 monitor_flags;
 395         u32 secure_pcp; /* create secure PCP? */
 396         int sinfo_gen;
 397         /* cached ISR registers */
 398         u32 isr_misc;
 399         /* mailbox related */
 400         struct mutex wmi_mutex;
 401         struct wil6210_mbox_ctl mbox_ctl;
 402         struct completion wmi_ready;
 403         u16 wmi_seq;
 404         u16 reply_id; /**< wait for this WMI event */
 405         void *reply_buf;
 406         u16 reply_size;
 407         struct workqueue_struct *wmi_wq; /* for deferred calls */
 408         struct work_struct wmi_event_worker;
 409         struct workqueue_struct *wmi_wq_conn; /* for connect worker */
 410         struct work_struct connect_worker;
 411         struct work_struct disconnect_worker;
 412         struct work_struct fw_error_worker;     /* for FW error recovery */
 413         struct timer_list connect_timer;
 414         struct timer_list scan_timer; /* detect scan timeout */
 415         int pending_connect_cid;
 416         struct list_head pending_wmi_ev;
 417         /*
 418          * protect pending_wmi_ev
 419          * - fill in IRQ from wil6210_irq_misc,
 420          * - consumed in thread by wmi_event_worker
 421          */
 422         spinlock_t wmi_ev_lock;
 423         struct napi_struct napi_rx;
 424         struct napi_struct napi_tx;
 425         /* DMA related */
 426         struct vring vring_rx;
 427         struct vring vring_tx[WIL6210_MAX_TX_RINGS];
 428         struct vring_tx_data vring_tx_data[WIL6210_MAX_TX_RINGS];
 429         u8 vring2cid_tid[WIL6210_MAX_TX_RINGS][2]; /* [0] - CID, [1] - TID */
 430         struct wil_sta_info sta[WIL6210_MAX_CID];
 431         /* scan */
 432         struct cfg80211_scan_request *scan_request;
 433
 434         struct mutex mutex; /* for wil6210_priv access in wil_{up|down} */
 435         /* statistics */
 436         struct wil6210_stats stats;
 437         atomic_t isr_count_rx, isr_count_tx;
 438         /* debugfs */
 439         struct dentry *debug;
 440         struct debugfs_blob_wrapper blobs[ARRAY_SIZE(fw_mapping)];
 441 };
 442
 443 #define wil_to_wiphy(i) (i->wdev->wiphy)
 444 #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i)))
 445 #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w))
 446 #define wil_to_wdev(i) (i->wdev)
 447 #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w))
 448 #define wil_to_ndev(i) (wil_to_wdev(i)->netdev)
 449 #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr))
 450
 451 int wil_dbg_trace(struct wil6210_priv *wil, const char *fmt, ...);
 452 int wil_err(struct wil6210_priv *wil, const char *fmt, ...);
 453 int wil_info(struct wil6210_priv *wil, const char *fmt, ...);
 454 #define wil_dbg(wil, fmt, arg...) do { \
 455         netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \
 456         wil_dbg_trace(wil, fmt, ##arg); \
 457 } while (0)
 458
 459 #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
 460 #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
 461 #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
 462 #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)
 463
 464 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize,     \
 465                           groupsize, buf, len, ascii)           \
 466                           print_hex_dump_debug("DBG[TXRX]" prefix_str,\
 467                                          prefix_type, rowsize,  \
 468                                          groupsize, buf, len, ascii)
 469
 470 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize,      \
 471                          groupsize, buf, len, ascii)            \
 472                          print_hex_dump_debug("DBG[ WMI]" prefix_str,\
 473                                         prefix_type, rowsize,   \
 474                                         groupsize, buf, len, ascii)
 475
 476 void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
 477                           size_t count);
 478 void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
 479                         size_t count);
 480
 481 void *wil_if_alloc(struct device *dev, void __iomem *csr);
 482 void wil_if_free(struct wil6210_priv *wil);
 483 int wil_if_add(struct wil6210_priv *wil);
 484 void wil_if_remove(struct wil6210_priv *wil);
 485 int wil_priv_init(struct wil6210_priv *wil);
 486 void wil_priv_deinit(struct wil6210_priv *wil);
 487 int wil_reset(struct wil6210_priv *wil);
 488 void wil_fw_error_recovery(struct wil6210_priv *wil);
 489 void wil_link_on(struct wil6210_priv *wil);
 490 void wil_link_off(struct wil6210_priv *wil);
 491 int wil_up(struct wil6210_priv *wil);
 492 int wil_down(struct wil6210_priv *wil);
 493 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r);
 494 int wil_find_cid(struct wil6210_priv *wil, const u8 *mac);
 495
 496 void __iomem *wmi_buffer(struct wil6210_priv *wil, __le32 ptr);
 497 void __iomem *wmi_addr(struct wil6210_priv *wil, u32 ptr);
 498 int wmi_read_hdr(struct wil6210_priv *wil, __le32 ptr,
 499                  struct wil6210_mbox_hdr *hdr);
 500 int wmi_send(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len);
 501 void wmi_recv_cmd(struct wil6210_priv *wil);
 502 int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len,
 503              u16 reply_id, void *reply, u8 reply_size, int to_msec);
 504 void wmi_event_worker(struct work_struct *work);
 505 void wmi_event_flush(struct wil6210_priv *wil);
 506 int wmi_set_ssid(struct wil6210_priv *wil, u8 ssid_len, const void *ssid);
 507 int wmi_get_ssid(struct wil6210_priv *wil, u8 *ssid_len, void *ssid);
 508 int wmi_set_channel(struct wil6210_priv *wil, int channel);
 509 int wmi_get_channel(struct wil6210_priv *wil, int *channel);
 510 int wmi_del_cipher_key(struct wil6210_priv *wil, u8 key_index,
 511                        const void *mac_addr);
 512 int wmi_add_cipher_key(struct wil6210_priv *wil, u8 key_index,
 513                        const void *mac_addr, int key_len, const void *key);
 514 int wmi_echo(struct wil6210_priv *wil);
 515 int wmi_set_ie(struct wil6210_priv *wil, u8 type, u16 ie_len, const void *ie);
 516 int wmi_rx_chain_add(struct wil6210_priv *wil, struct vring *vring);
 517 int wmi_p2p_cfg(struct wil6210_priv *wil, int channel);
 518 int wmi_rxon(struct wil6210_priv *wil, bool on);
 519 int wmi_get_temperature(struct wil6210_priv *wil, u32 *t_m, u32 *t_r);
 520 int wmi_disconnect_sta(struct wil6210_priv *wil, const u8 *mac, u16 reason);
 521
 522 void wil6210_clear_irq(struct wil6210_priv *wil);
 523 int wil6210_init_irq(struct wil6210_priv *wil, int irq);
 524 void wil6210_fini_irq(struct wil6210_priv *wil, int irq);
 525 void wil6210_disable_irq(struct wil6210_priv *wil);
 526 void wil6210_enable_irq(struct wil6210_priv *wil);
 527 int wil_cfg80211_mgmt_tx(struct wiphy *wiphy, struct wireless_dev *wdev,
 528                          struct cfg80211_mgmt_tx_params *params,
 529                          u64 *cookie);
 530
 531 int wil6210_debugfs_init(struct wil6210_priv *wil);
 532 void wil6210_debugfs_remove(struct wil6210_priv *wil);
 533 int wil_cid_fill_sinfo(struct wil6210_priv *wil, int cid,
 534                        struct station_info *sinfo);
 535
 536 struct wireless_dev *wil_cfg80211_init(struct device *dev);
 537 void wil_wdev_free(struct wil6210_priv *wil);
 538
 539 int wmi_set_mac_address(struct wil6210_priv *wil, void *addr);
 540 int wmi_pcp_start(struct wil6210_priv *wil, int bi, u8 wmi_nettype, u8 chan);
 541 int wmi_pcp_stop(struct wil6210_priv *wil);
 542 void wil6210_disconnect(struct wil6210_priv *wil, const u8 *bssid);
 543
 544 int wil_rx_init(struct wil6210_priv *wil);
 545 void wil_rx_fini(struct wil6210_priv *wil);
 546
 547 /* TX API */
 548 int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size,
 549                       int cid, int tid);
 550 void wil_vring_fini_tx(struct wil6210_priv *wil, int id);
 551
 552 netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev);
 553 int wil_tx_complete(struct wil6210_priv *wil, int ringid);
 554 void wil6210_unmask_irq_tx(struct wil6210_priv *wil);
 555
 556 /* RX API */
 557 void wil_rx_handle(struct wil6210_priv *wil, int *quota);
 558 void wil6210_unmask_irq_rx(struct wil6210_priv *wil);
 559
 560 int wil_iftype_nl2wmi(enum nl80211_iftype type);
 561
 562 #endif /* __WIL6210_H__ */