2 * Copyright (c) 2012 Qualcomm Atheros, Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/netdevice.h>
21 #include <linux/wireless.h>
22 #include <net/cfg80211.h>
24 #include "dbg_hexdump.h"
26 #define WIL_NAME "wil6210"
29 * extract bits [@b0:@b1] (inclusive) from the value @x
30 * it should be @b0 <= @b1, or result is incorrect
32 static inline u32
WIL_GET_BITS(u32 x
, int b0
, int b1
)
34 return (x
>> b0
) & ((1 << (b1
- b0
+ 1)) - 1);
37 #define WIL6210_MEM_SIZE (2*1024*1024UL)
39 #define WIL6210_RX_RING_SIZE (128)
40 #define WIL6210_TX_RING_SIZE (128)
41 #define WIL6210_MAX_TX_RINGS (24)
43 /* Hardware definitions begin */
47 * RGF File | Host addr | FW addr
49 * user_rgf | 0x000000 | 0x880000
50 * dma_rgf | 0x001000 | 0x881000
51 * pcie_rgf | 0x002000 | 0x882000
55 /* Where various structures placed in host address space */
56 #define WIL6210_FW_HOST_OFF (0x880000UL)
58 #define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF)
61 * Interrupt control registers block
63 * each interrupt controlled by the same bit in all registers
66 u32 ICC
; /* Cause Control, RW: 0 - W1C, 1 - COR */
67 u32 ICR
; /* Cause, W1C/COR depending on ICC */
68 u32 ICM
; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */
69 u32 ICS
; /* Cause Set, WO */
70 u32 IMV
; /* Mask, RW+S/C */
71 u32 IMS
; /* Mask Set, write 1 to set */
72 u32 IMC
; /* Mask Clear, write 1 to clear */
75 /* registers - FW addresses */
76 #define RGF_USER_USER_SCRATCH_PAD (0x8802bc)
77 #define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */
78 #define BIT_USER_USER_ICR_SW_INT_2 BIT(18)
79 #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14)
80 #define RGF_USER_MAC_CPU_0 (0x8801fc)
81 #define RGF_USER_USER_CPU_0 (0x8801e0)
82 #define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04)
83 #define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08)
84 #define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c)
85 #define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10)
87 #define RGF_DMA_PSEUDO_CAUSE (0x881c68)
88 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c)
89 #define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70)
90 #define BIT_DMA_PSEUDO_CAUSE_RX BIT(0)
91 #define BIT_DMA_PSEUDO_CAUSE_TX BIT(1)
92 #define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2)
94 #define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */
95 #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0)
96 #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */
97 #define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */
98 #define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0)
99 #define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */
100 #define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0)
101 #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1)
102 #define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */
104 /* Interrupt moderation control */
105 #define RGF_DMA_ITR_CNT_TRSH (0x881c5c)
106 #define RGF_DMA_ITR_CNT_DATA (0x881c60)
107 #define RGF_DMA_ITR_CNT_CRL (0x881C64)
108 #define BIT_DMA_ITR_CNT_CRL_EN BIT(0)
109 #define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1)
110 #define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2)
111 #define BIT_DMA_ITR_CNT_CRL_CLR BIT(3)
112 #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4)
114 /* popular locations */
115 #define HOST_MBOX HOSTADDR(RGF_USER_USER_SCRATCH_PAD)
116 #define HOST_SW_INT (HOSTADDR(RGF_USER_USER_ICR) + \
117 offsetof(struct RGF_ICR, ICS))
118 #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2
120 /* ISR register bits */
121 #define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0)
122 #define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1)
123 #define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3)
125 /* Hardware definitions end */
127 struct wil6210_mbox_ring
{
129 u16 entry_size
; /* max. size of mbox entry, incl. all headers */
135 struct wil6210_mbox_ring_desc
{
140 /* at HOST_OFF_WIL6210_MBOX_CTL */
141 struct wil6210_mbox_ctl
{
142 struct wil6210_mbox_ring tx
;
143 struct wil6210_mbox_ring rx
;
146 struct wil6210_mbox_hdr
{
148 __le16 len
; /* payload, bytes after this header */
154 #define WIL_MBOX_HDR_TYPE_WMI (0)
156 /* max. value for wil6210_mbox_hdr.len */
157 #define MAX_MBOXITEM_SIZE (240)
159 struct wil6210_mbox_hdr_wmi
{
162 __le16 info1
; /* bits [0..3] - device_id, rest - unused */
166 struct pending_wmi_event
{
167 struct list_head list
;
169 struct wil6210_mbox_hdr hdr
;
170 struct wil6210_mbox_hdr_wmi wmi
;
179 volatile union vring_desc
*va
; /* vring_desc[size], WriteBack by DMA */
180 u16 size
; /* number of vring_desc elements */
183 u32 hwtail
; /* write here to inform hw */
184 void **ctx
; /* void *ctx[size] - software context */
187 enum { /* for wil6210_priv.status */
188 wil_status_fwready
= 0,
189 wil_status_fwconnected
,
191 wil_status_irqen
, /* FIXME: interrupts enabled - for debug */
196 struct wil6210_stats
{
200 u16 bf_mcs
; /* last BF, used for Tx */
207 struct wil6210_priv
{
208 struct pci_dev
*pdev
;
210 struct wireless_dev
*wdev
;
215 u32 secure_pcp
; /* create secure PCP? */
217 /* cached ISR registers */
219 /* mailbox related */
220 struct mutex wmi_mutex
;
221 struct wil6210_mbox_ctl mbox_ctl
;
222 struct completion wmi_ready
;
224 u16 reply_id
; /**< wait for this WMI event */
227 struct workqueue_struct
*wmi_wq
; /* for deferred calls */
228 struct work_struct wmi_event_worker
;
229 struct workqueue_struct
*wmi_wq_conn
; /* for connect worker */
230 struct work_struct wmi_connect_worker
;
231 struct work_struct disconnect_worker
;
232 struct timer_list connect_timer
;
233 int pending_connect_cid
;
234 struct list_head pending_wmi_ev
;
236 * protect pending_wmi_ev
237 * - fill in IRQ from wil6210_irq_misc,
238 * - consumed in thread by wmi_event_worker
240 spinlock_t wmi_ev_lock
;
242 struct vring vring_rx
;
243 struct vring vring_tx
[WIL6210_MAX_TX_RINGS
];
244 u8 dst_addr
[WIL6210_MAX_TX_RINGS
][ETH_ALEN
];
246 struct cfg80211_scan_request
*scan_request
;
248 struct mutex mutex
; /* for wil6210_priv access in wil_{up|down} */
250 struct wil6210_stats stats
;
252 struct dentry
*debug
;
253 struct debugfs_blob_wrapper fw_code_blob
;
254 struct debugfs_blob_wrapper fw_data_blob
;
255 struct debugfs_blob_wrapper fw_peri_blob
;
256 struct debugfs_blob_wrapper uc_code_blob
;
257 struct debugfs_blob_wrapper uc_data_blob
;
258 struct debugfs_blob_wrapper rgf_blob
;
261 #define wil_to_wiphy(i) (i->wdev->wiphy)
262 #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i)))
263 #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w))
264 #define wil_to_wdev(i) (i->wdev)
265 #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w))
266 #define wil_to_ndev(i) (wil_to_wdev(i)->netdev)
267 #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr))
269 #define wil_dbg(wil, fmt, arg...) netdev_dbg(wil_to_ndev(wil), fmt, ##arg)
270 #define wil_info(wil, fmt, arg...) netdev_info(wil_to_ndev(wil), fmt, ##arg)
271 #define wil_err(wil, fmt, arg...) netdev_err(wil_to_ndev(wil), fmt, ##arg)
273 #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
274 #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
275 #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
276 #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)
278 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \
279 groupsize, buf, len, ascii) \
280 wil_print_hex_dump_debug("DBG[TXRX]" prefix_str,\
281 prefix_type, rowsize, \
282 groupsize, buf, len, ascii)
284 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \
285 groupsize, buf, len, ascii) \
286 wil_print_hex_dump_debug("DBG[ WMI]" prefix_str,\
287 prefix_type, rowsize, \
288 groupsize, buf, len, ascii)
290 void wil_memcpy_fromio_32(void *dst
, const volatile void __iomem
*src
,
292 void wil_memcpy_toio_32(volatile void __iomem
*dst
, const void *src
,
295 void *wil_if_alloc(struct device
*dev
, void __iomem
*csr
);
296 void wil_if_free(struct wil6210_priv
*wil
);
297 int wil_if_add(struct wil6210_priv
*wil
);
298 void wil_if_remove(struct wil6210_priv
*wil
);
299 int wil_priv_init(struct wil6210_priv
*wil
);
300 void wil_priv_deinit(struct wil6210_priv
*wil
);
301 int wil_reset(struct wil6210_priv
*wil
);
302 void wil_link_on(struct wil6210_priv
*wil
);
303 void wil_link_off(struct wil6210_priv
*wil
);
304 int wil_up(struct wil6210_priv
*wil
);
305 int wil_down(struct wil6210_priv
*wil
);
306 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring
*r
);
308 void __iomem
*wmi_buffer(struct wil6210_priv
*wil
, __le32 ptr
);
309 void __iomem
*wmi_addr(struct wil6210_priv
*wil
, u32 ptr
);
310 int wmi_read_hdr(struct wil6210_priv
*wil
, __le32 ptr
,
311 struct wil6210_mbox_hdr
*hdr
);
312 int wmi_send(struct wil6210_priv
*wil
, u16 cmdid
, void *buf
, u16 len
);
313 void wmi_recv_cmd(struct wil6210_priv
*wil
);
314 int wmi_call(struct wil6210_priv
*wil
, u16 cmdid
, void *buf
, u16 len
,
315 u16 reply_id
, void *reply
, u8 reply_size
, int to_msec
);
316 void wmi_connect_worker(struct work_struct
*work
);
317 void wmi_event_worker(struct work_struct
*work
);
318 void wmi_event_flush(struct wil6210_priv
*wil
);
319 int wmi_set_ssid(struct wil6210_priv
*wil
, u8 ssid_len
, const void *ssid
);
320 int wmi_get_ssid(struct wil6210_priv
*wil
, u8
*ssid_len
, void *ssid
);
321 int wmi_set_channel(struct wil6210_priv
*wil
, int channel
);
322 int wmi_get_channel(struct wil6210_priv
*wil
, int *channel
);
323 int wmi_tx_eapol(struct wil6210_priv
*wil
, struct sk_buff
*skb
);
324 int wmi_del_cipher_key(struct wil6210_priv
*wil
, u8 key_index
,
325 const void *mac_addr
);
326 int wmi_add_cipher_key(struct wil6210_priv
*wil
, u8 key_index
,
327 const void *mac_addr
, int key_len
, const void *key
);
328 int wmi_echo(struct wil6210_priv
*wil
);
329 int wmi_set_ie(struct wil6210_priv
*wil
, u8 type
, u16 ie_len
, const void *ie
);
330 int wmi_rx_chain_add(struct wil6210_priv
*wil
, struct vring
*vring
);
332 int wil6210_init_irq(struct wil6210_priv
*wil
, int irq
);
333 void wil6210_fini_irq(struct wil6210_priv
*wil
, int irq
);
334 void wil6210_disable_irq(struct wil6210_priv
*wil
);
335 void wil6210_enable_irq(struct wil6210_priv
*wil
);
337 int wil6210_debugfs_init(struct wil6210_priv
*wil
);
338 void wil6210_debugfs_remove(struct wil6210_priv
*wil
);
340 struct wireless_dev
*wil_cfg80211_init(struct device
*dev
);
341 void wil_wdev_free(struct wil6210_priv
*wil
);
343 int wmi_set_mac_address(struct wil6210_priv
*wil
, void *addr
);
344 int wmi_set_bcon(struct wil6210_priv
*wil
, int bi
, u8 wmi_nettype
);
345 void wil6210_disconnect(struct wil6210_priv
*wil
, void *bssid
);
347 int wil_rx_init(struct wil6210_priv
*wil
);
348 void wil_rx_fini(struct wil6210_priv
*wil
);
351 int wil_vring_init_tx(struct wil6210_priv
*wil
, int id
, int size
,
353 void wil_vring_fini_tx(struct wil6210_priv
*wil
, int id
);
355 netdev_tx_t
wil_start_xmit(struct sk_buff
*skb
, struct net_device
*ndev
);
356 void wil_tx_complete(struct wil6210_priv
*wil
, int ringid
);
359 void wil_rx_handle(struct wil6210_priv
*wil
);
361 int wil_iftype_nl2wmi(enum nl80211_iftype type
);
363 #endif /* __WIL6210_H__ */