2 * Copyright (c) 2012-2016 Qualcomm Atheros, Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <linux/netdevice.h>
21 #include <linux/wireless.h>
22 #include <net/cfg80211.h>
23 #include <linux/timex.h>
24 #include <linux/types.h>
26 #include "wil_platform.h"
28 extern bool no_fw_recovery
;
29 extern unsigned int mtu_max
;
30 extern unsigned short rx_ring_overflow_thrsh
;
32 extern u32 vring_idle_trsh
;
33 extern bool rx_align_2
;
36 #define WIL_NAME "wil6210"
37 #define WIL_FW_NAME "wil6210.fw" /* code */
38 #define WIL_FW2_NAME "wil6210.brd" /* board & radio parameters */
40 #define WIL_MAX_BUS_REQUEST_KBPS 800000 /* ~6.1Gbps */
43 * extract bits [@b0:@b1] (inclusive) from the value @x
44 * it should be @b0 <= @b1, or result is incorrect
46 static inline u32
WIL_GET_BITS(u32 x
, int b0
, int b1
)
48 return (x
>> b0
) & ((1 << (b1
- b0
+ 1)) - 1);
51 #define WIL6210_MEM_SIZE (2*1024*1024UL)
53 #define WIL_TX_Q_LEN_DEFAULT (4000)
54 #define WIL_RX_RING_SIZE_ORDER_DEFAULT (10)
55 #define WIL_TX_RING_SIZE_ORDER_DEFAULT (12)
56 #define WIL_BCAST_RING_SIZE_ORDER_DEFAULT (7)
57 #define WIL_BCAST_MCS0_LIMIT (1024) /* limit for MCS0 frame size */
58 /* limit ring size in range [32..32k] */
59 #define WIL_RING_SIZE_ORDER_MIN (5)
60 #define WIL_RING_SIZE_ORDER_MAX (15)
61 #define WIL6210_MAX_TX_RINGS (24) /* HW limit */
62 #define WIL6210_MAX_CID (8) /* HW limit */
63 #define WIL6210_NAPI_BUDGET (16) /* arbitrary */
64 #define WIL_MAX_AMPDU_SIZE (64 * 1024) /* FW/HW limit */
65 #define WIL_MAX_AGG_WSIZE (32) /* FW/HW limit */
66 /* Hardware offload block adds the following:
67 * 26 bytes - 3-address QoS data header
68 * 8 bytes - IV + EIV (for GCMP)
70 * 16 bytes - MIC (for GCMP)
73 #define WIL_MAX_MPDU_OVERHEAD (62)
75 /* Calculate MAC buffer size for the firmware. It includes all overhead,
76 * as it will go over the air, and need to be 8 byte aligned
78 static inline u32
wil_mtu2macbuf(u32 mtu
)
80 return ALIGN(mtu
+ WIL_MAX_MPDU_OVERHEAD
, 8);
83 /* MTU for Ethernet need to take into account 8-byte SNAP header
84 * to be added when encapsulating Ethernet frame into 802.11
86 #define WIL_MAX_ETH_MTU (IEEE80211_MAX_DATA_LEN_DMG - 8)
87 /* Max supported by wil6210 value for interrupt threshold is 5sec. */
88 #define WIL6210_ITR_TRSH_MAX (5000000)
89 #define WIL6210_ITR_TX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */
90 #define WIL6210_ITR_RX_INTERFRAME_TIMEOUT_DEFAULT (13) /* usec */
91 #define WIL6210_ITR_TX_MAX_BURST_DURATION_DEFAULT (500) /* usec */
92 #define WIL6210_ITR_RX_MAX_BURST_DURATION_DEFAULT (500) /* usec */
93 #define WIL6210_FW_RECOVERY_RETRIES (5) /* try to recover this many times */
94 #define WIL6210_FW_RECOVERY_TO msecs_to_jiffies(5000)
95 #define WIL6210_SCAN_TO msecs_to_jiffies(10000)
96 #define WIL6210_DISCONNECT_TO_MS (2000)
97 #define WIL6210_RX_HIGH_TRSH_INIT (0)
98 #define WIL6210_RX_HIGH_TRSH_DEFAULT \
99 (1 << (WIL_RX_RING_SIZE_ORDER_DEFAULT - 3))
100 /* Hardware definitions begin */
104 * RGF File | Host addr | FW addr
106 * user_rgf | 0x000000 | 0x880000
107 * dma_rgf | 0x001000 | 0x881000
108 * pcie_rgf | 0x002000 | 0x882000
112 /* Where various structures placed in host address space */
113 #define WIL6210_FW_HOST_OFF (0x880000UL)
115 #define HOSTADDR(fwaddr) (fwaddr - WIL6210_FW_HOST_OFF)
118 * Interrupt control registers block
120 * each interrupt controlled by the same bit in all registers
123 u32 ICC
; /* Cause Control, RW: 0 - W1C, 1 - COR */
124 u32 ICR
; /* Cause, W1C/COR depending on ICC */
125 u32 ICM
; /* Cause masked (ICR & ~IMV), W1C/COR depending on ICC */
126 u32 ICS
; /* Cause Set, WO */
127 u32 IMV
; /* Mask, RW+S/C */
128 u32 IMS
; /* Mask Set, write 1 to set */
129 u32 IMC
; /* Mask Clear, write 1 to clear */
132 /* registers - FW addresses */
133 #define RGF_USER_USAGE_1 (0x880004)
134 #define RGF_USER_USAGE_6 (0x880018)
135 #define BIT_USER_OOB_MODE BIT(31)
136 #define RGF_USER_HW_MACHINE_STATE (0x8801dc)
137 #define HW_MACHINE_BOOT_DONE (0x3fffffd)
138 #define RGF_USER_USER_CPU_0 (0x8801e0)
139 #define BIT_USER_USER_CPU_MAN_RST BIT(1) /* user_cpu_man_rst */
140 #define RGF_USER_MAC_CPU_0 (0x8801fc)
141 #define BIT_USER_MAC_CPU_MAN_RST BIT(1) /* mac_cpu_man_rst */
142 #define RGF_USER_USER_SCRATCH_PAD (0x8802bc)
143 #define RGF_USER_BL (0x880A3C) /* Boot Loader */
144 #define RGF_USER_FW_REV_ID (0x880a8c) /* chip revision */
145 #define RGF_USER_CLKS_CTL_0 (0x880abc)
146 #define BIT_USER_CLKS_CAR_AHB_SW_SEL BIT(1) /* ref clk/PLL */
147 #define BIT_USER_CLKS_RST_PWGD BIT(11) /* reset on "power good" */
148 #define RGF_USER_CLKS_CTL_SW_RST_VEC_0 (0x880b04)
149 #define RGF_USER_CLKS_CTL_SW_RST_VEC_1 (0x880b08)
150 #define RGF_USER_CLKS_CTL_SW_RST_VEC_2 (0x880b0c)
151 #define RGF_USER_CLKS_CTL_SW_RST_VEC_3 (0x880b10)
152 #define RGF_USER_CLKS_CTL_SW_RST_MASK_0 (0x880b14)
153 #define BIT_HPAL_PERST_FROM_PAD BIT(6)
154 #define BIT_CAR_PERST_RST BIT(7)
155 #define RGF_USER_USER_ICR (0x880b4c) /* struct RGF_ICR */
156 #define BIT_USER_USER_ICR_SW_INT_2 BIT(18)
157 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0 (0x880c18)
158 #define RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1 (0x880c2c)
159 #define RGF_USER_SPARROW_M_4 (0x880c50) /* Sparrow */
160 #define BIT_SPARROW_M_4_SEL_SLEEP_OR_REF BIT(2)
162 #define RGF_DMA_EP_TX_ICR (0x881bb4) /* struct RGF_ICR */
163 #define BIT_DMA_EP_TX_ICR_TX_DONE BIT(0)
164 #define BIT_DMA_EP_TX_ICR_TX_DONE_N(n) BIT(n+1) /* n = [0..23] */
165 #define RGF_DMA_EP_RX_ICR (0x881bd0) /* struct RGF_ICR */
166 #define BIT_DMA_EP_RX_ICR_RX_DONE BIT(0)
167 #define BIT_DMA_EP_RX_ICR_RX_HTRSH BIT(1)
168 #define RGF_DMA_EP_MISC_ICR (0x881bec) /* struct RGF_ICR */
169 #define BIT_DMA_EP_MISC_ICR_RX_HTRSH BIT(0)
170 #define BIT_DMA_EP_MISC_ICR_TX_NO_ACT BIT(1)
171 #define BIT_DMA_EP_MISC_ICR_FW_INT(n) BIT(28+n) /* n = [0..3] */
173 /* Legacy interrupt moderation control (before Sparrow v2)*/
174 #define RGF_DMA_ITR_CNT_TRSH (0x881c5c)
175 #define RGF_DMA_ITR_CNT_DATA (0x881c60)
176 #define RGF_DMA_ITR_CNT_CRL (0x881c64)
177 #define BIT_DMA_ITR_CNT_CRL_EN BIT(0)
178 #define BIT_DMA_ITR_CNT_CRL_EXT_TICK BIT(1)
179 #define BIT_DMA_ITR_CNT_CRL_FOREVER BIT(2)
180 #define BIT_DMA_ITR_CNT_CRL_CLR BIT(3)
181 #define BIT_DMA_ITR_CNT_CRL_REACH_TRSH BIT(4)
183 /* Offload control (Sparrow B0+) */
184 #define RGF_DMA_OFUL_NID_0 (0x881cd4)
185 #define BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN BIT(0)
186 #define BIT_DMA_OFUL_NID_0_TX_EXT_TR_EN BIT(1)
187 #define BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC BIT(2)
188 #define BIT_DMA_OFUL_NID_0_TX_EXT_A3_SRC BIT(3)
190 /* New (sparrow v2+) interrupt moderation control */
191 #define RGF_DMA_ITR_TX_DESQ_NO_MOD (0x881d40)
192 #define RGF_DMA_ITR_TX_CNT_TRSH (0x881d34)
193 #define RGF_DMA_ITR_TX_CNT_DATA (0x881d38)
194 #define RGF_DMA_ITR_TX_CNT_CTL (0x881d3c)
195 #define BIT_DMA_ITR_TX_CNT_CTL_EN BIT(0)
196 #define BIT_DMA_ITR_TX_CNT_CTL_EXT_TIC_SEL BIT(1)
197 #define BIT_DMA_ITR_TX_CNT_CTL_FOREVER BIT(2)
198 #define BIT_DMA_ITR_TX_CNT_CTL_CLR BIT(3)
199 #define BIT_DMA_ITR_TX_CNT_CTL_REACHED_TRESH BIT(4)
200 #define BIT_DMA_ITR_TX_CNT_CTL_CROSS_EN BIT(5)
201 #define BIT_DMA_ITR_TX_CNT_CTL_FREE_RUNNIG BIT(6)
202 #define RGF_DMA_ITR_TX_IDL_CNT_TRSH (0x881d60)
203 #define RGF_DMA_ITR_TX_IDL_CNT_DATA (0x881d64)
204 #define RGF_DMA_ITR_TX_IDL_CNT_CTL (0x881d68)
205 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EN BIT(0)
206 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1)
207 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_FOREVER BIT(2)
208 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_CLR BIT(3)
209 #define BIT_DMA_ITR_TX_IDL_CNT_CTL_REACHED_TRESH BIT(4)
210 #define RGF_DMA_ITR_RX_DESQ_NO_MOD (0x881d50)
211 #define RGF_DMA_ITR_RX_CNT_TRSH (0x881d44)
212 #define RGF_DMA_ITR_RX_CNT_DATA (0x881d48)
213 #define RGF_DMA_ITR_RX_CNT_CTL (0x881d4c)
214 #define BIT_DMA_ITR_RX_CNT_CTL_EN BIT(0)
215 #define BIT_DMA_ITR_RX_CNT_CTL_EXT_TIC_SEL BIT(1)
216 #define BIT_DMA_ITR_RX_CNT_CTL_FOREVER BIT(2)
217 #define BIT_DMA_ITR_RX_CNT_CTL_CLR BIT(3)
218 #define BIT_DMA_ITR_RX_CNT_CTL_REACHED_TRESH BIT(4)
219 #define BIT_DMA_ITR_RX_CNT_CTL_CROSS_EN BIT(5)
220 #define BIT_DMA_ITR_RX_CNT_CTL_FREE_RUNNIG BIT(6)
221 #define RGF_DMA_ITR_RX_IDL_CNT_TRSH (0x881d54)
222 #define RGF_DMA_ITR_RX_IDL_CNT_DATA (0x881d58)
223 #define RGF_DMA_ITR_RX_IDL_CNT_CTL (0x881d5c)
224 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EN BIT(0)
225 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_EXT_TIC_SEL BIT(1)
226 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_FOREVER BIT(2)
227 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_CLR BIT(3)
228 #define BIT_DMA_ITR_RX_IDL_CNT_CTL_REACHED_TRESH BIT(4)
230 #define RGF_DMA_PSEUDO_CAUSE (0x881c68)
231 #define RGF_DMA_PSEUDO_CAUSE_MASK_SW (0x881c6c)
232 #define RGF_DMA_PSEUDO_CAUSE_MASK_FW (0x881c70)
233 #define BIT_DMA_PSEUDO_CAUSE_RX BIT(0)
234 #define BIT_DMA_PSEUDO_CAUSE_TX BIT(1)
235 #define BIT_DMA_PSEUDO_CAUSE_MISC BIT(2)
237 #define RGF_HP_CTRL (0x88265c)
238 #define RGF_PCIE_LOS_COUNTER_CTL (0x882dc4)
240 /* MAC timer, usec, for packet lifetime */
241 #define RGF_MAC_MTRL_COUNTER_0 (0x886aa8)
243 #define RGF_CAF_ICR (0x88946c) /* struct RGF_ICR */
244 #define RGF_CAF_OSC_CONTROL (0x88afa4)
245 #define BIT_CAF_OSC_XTAL_EN BIT(0)
246 #define RGF_CAF_PLL_LOCK_STATUS (0x88afec)
247 #define BIT_CAF_OSC_DIG_XTAL_STABLE BIT(0)
249 #define RGF_USER_JTAG_DEV_ID (0x880b34) /* device ID */
250 #define JTAG_DEV_ID_SPARROW_B0 (0x2632072f)
252 /* crash codes for FW/Ucode stored here */
253 #define RGF_FW_ASSERT_CODE (0x91f020)
254 #define RGF_UCODE_ASSERT_CODE (0x91f028)
258 HW_VER_SPARROW_B0
, /* JTAG_DEV_ID_SPARROW_B0 */
261 /* popular locations */
262 #define RGF_MBOX RGF_USER_USER_SCRATCH_PAD
263 #define HOST_MBOX HOSTADDR(RGF_MBOX)
264 #define SW_INT_MBOX BIT_USER_USER_ICR_SW_INT_2
266 /* ISR register bits */
267 #define ISR_MISC_FW_READY BIT_DMA_EP_MISC_ICR_FW_INT(0)
268 #define ISR_MISC_MBOX_EVT BIT_DMA_EP_MISC_ICR_FW_INT(1)
269 #define ISR_MISC_FW_ERROR BIT_DMA_EP_MISC_ICR_FW_INT(3)
271 /* Hardware definitions end */
273 u32 from
; /* linker address - from, inclusive */
274 u32 to
; /* linker address - to, exclusive */
275 u32 host
; /* PCI/Host address - BAR0 + 0x880000 */
276 const char *name
; /* for debugfs */
279 /* array size should be in sync with actual definition in the wmi.c */
280 extern const struct fw_map fw_mapping
[8];
283 * mk_cidxtid - construct @cidxtid field
287 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
289 static inline u8
mk_cidxtid(u8 cid
, u8 tid
)
291 return ((tid
& 0xf) << 4) | (cid
& 0xf);
295 * parse_cidxtid - parse @cidxtid field
296 * @cid: store CID value here
297 * @tid: store TID value here
299 * @cidxtid field encoded as bits 0..3 - CID; 4..7 - TID
301 static inline void parse_cidxtid(u8 cidxtid
, u8
*cid
, u8
*tid
)
303 *cid
= cidxtid
& 0xf;
304 *tid
= (cidxtid
>> 4) & 0xf;
307 struct wil6210_mbox_ring
{
309 u16 entry_size
; /* max. size of mbox entry, incl. all headers */
315 struct wil6210_mbox_ring_desc
{
320 /* at HOST_OFF_WIL6210_MBOX_CTL */
321 struct wil6210_mbox_ctl
{
322 struct wil6210_mbox_ring tx
;
323 struct wil6210_mbox_ring rx
;
326 struct wil6210_mbox_hdr
{
328 __le16 len
; /* payload, bytes after this header */
334 #define WIL_MBOX_HDR_TYPE_WMI (0)
336 /* max. value for wil6210_mbox_hdr.len */
337 #define MAX_MBOXITEM_SIZE (240)
339 struct pending_wmi_event
{
340 struct list_head list
;
342 struct wil6210_mbox_hdr hdr
;
343 struct wmi_cmd_hdr wmi
;
348 enum { /* for wil_ctx.mapped_as */
349 wil_mapped_as_none
= 0,
350 wil_mapped_as_single
= 1,
351 wil_mapped_as_page
= 2,
355 * struct wil_ctx - software context for Vring descriptor
367 volatile union vring_desc
*va
; /* vring_desc[size], WriteBack by DMA */
368 u16 size
; /* number of vring_desc elements */
371 u32 hwtail
; /* write here to inform hw */
372 struct wil_ctx
*ctx
; /* ctx[size] - software context */
376 * Additional data for Tx Vring
378 struct vring_tx_data
{
381 cycles_t idle
, last_idle
, begin
;
382 u8 agg_wsize
; /* agreed aggregation window, 0 - no agg */
385 bool addba_in_progress
; /* if set, agg_xxx is for request in progress */
389 enum { /* for wil6210_priv.status */
390 wil_status_fwready
= 0, /* FW operational */
391 wil_status_fwconnecting
,
392 wil_status_fwconnected
,
394 wil_status_mbox_ready
, /* MBOX structures ready */
395 wil_status_irqen
, /* FIXME: interrupts enabled - for debug */
396 wil_status_napi_en
, /* NAPI enabled protected by wil->mutex */
397 wil_status_resetting
, /* reset in progress */
398 wil_status_last
/* keep last */
404 * struct tid_ampdu_rx - TID aggregation information (Rx).
406 * @reorder_buf: buffer to reorder incoming aggregated MPDUs
407 * @reorder_time: jiffies when skb was added
408 * @session_timer: check if peer keeps Tx-ing on the TID (by timeout value)
409 * @reorder_timer: releases expired frames from the reorder buffer.
410 * @last_rx: jiffies of last rx activity
411 * @head_seq_num: head sequence number in reordering buffer.
412 * @stored_mpdu_num: number of MPDUs in reordering buffer
413 * @ssn: Starting Sequence Number expected to be aggregated.
414 * @buf_size: buffer size for incoming A-MPDUs
415 * @timeout: reset timer value (in TUs).
416 * @ssn_last_drop: SSN of the last dropped frame
417 * @total: total number of processed incoming frames
418 * @drop_dup: duplicate frames dropped for this reorder buffer
419 * @drop_old: old frames dropped for this reorder buffer
420 * @dialog_token: dialog token for aggregation session
421 * @first_time: true when this buffer used 1-st time
423 struct wil_tid_ampdu_rx
{
424 struct sk_buff
**reorder_buf
;
425 unsigned long *reorder_time
;
426 struct timer_list session_timer
;
427 struct timer_list reorder_timer
;
428 unsigned long last_rx
;
435 unsigned long long total
; /* frames processed */
436 unsigned long long drop_dup
;
437 unsigned long long drop_old
;
439 bool first_time
; /* is it 1-st time this buffer used? */
443 * struct wil_tid_crypto_rx_single - TID crypto information (Rx).
445 * @pn: GCMP PN for the session
446 * @key_set: valid key present
448 struct wil_tid_crypto_rx_single
{
449 u8 pn
[IEEE80211_GCMP_PN_LEN
];
453 struct wil_tid_crypto_rx
{
454 struct wil_tid_crypto_rx_single key_id
[4];
457 struct wil_p2p_info
{
458 struct ieee80211_channel listen_chan
;
459 u8 discovery_started
;
461 struct timer_list discovery_timer
; /* listen/search duration */
462 struct work_struct discovery_expired_work
; /* listen/search expire */
465 enum wil_sta_status
{
467 wil_sta_conn_pending
= 1,
468 wil_sta_connected
= 2,
471 #define WIL_STA_TID_NUM (16)
472 #define WIL_MCS_MAX (12) /* Maximum MCS supported */
474 struct wil_net_stats
{
475 unsigned long rx_packets
;
476 unsigned long tx_packets
;
477 unsigned long rx_bytes
;
478 unsigned long tx_bytes
;
479 unsigned long tx_errors
;
480 unsigned long rx_dropped
;
481 unsigned long rx_non_data_frame
;
482 unsigned long rx_short_frame
;
483 unsigned long rx_large_frame
;
484 unsigned long rx_replay
;
486 u64 rx_per_mcs
[WIL_MCS_MAX
+ 1];
490 * struct wil_sta_info - data for peer
492 * Peer identified by its CID (connection ID)
493 * NIC performs beam forming for each peer;
494 * if no beam forming done, frame exchange is not
497 struct wil_sta_info
{
499 enum wil_sta_status status
;
500 struct wil_net_stats stats
;
502 struct wil_tid_ampdu_rx
*tid_rx
[WIL_STA_TID_NUM
];
503 spinlock_t tid_rx_lock
; /* guarding tid_rx array */
504 unsigned long tid_rx_timer_expired
[BITS_TO_LONGS(WIL_STA_TID_NUM
)];
505 unsigned long tid_rx_stop_requested
[BITS_TO_LONGS(WIL_STA_TID_NUM
)];
506 struct wil_tid_crypto_rx tid_crypto_rx
[WIL_STA_TID_NUM
];
507 struct wil_tid_crypto_rx group_crypto_rx
;
511 fw_recovery_idle
= 0,
512 fw_recovery_pending
= 1,
513 fw_recovery_running
= 2,
520 struct wil_probe_client_req
{
521 struct list_head list
;
527 /* alloc, free, and read operations must own the lock */
529 struct vring_tx_desc
*pring_va
;
531 struct desc_alloc_info
*descriptors
;
537 struct wil6210_priv
{
538 struct pci_dev
*pdev
;
539 struct wireless_dev
*wdev
;
541 DECLARE_BITMAP(status
, wil_status_last
);
545 DECLARE_BITMAP(hw_capabilities
, hw_capability_last
);
546 u8 n_mids
; /* number of additional MIDs as reported by FW */
547 u32 recovery_count
; /* num of FW recovery attempts in a short time */
548 u32 recovery_state
; /* FW recovery state machine */
549 unsigned long last_fw_recovery
; /* jiffies of last fw recovery */
550 wait_queue_head_t wq
; /* for all wait_event() use */
553 u32 privacy
; /* secure connection? */
554 u8 hidden_ssid
; /* relevant in AP mode */
555 u16 channel
; /* relevant in AP mode */
557 u32 ap_isolate
; /* no intra-BSS communication */
558 /* interrupt moderation */
559 u32 tx_max_burst_duration
;
560 u32 tx_interframe_timeout
;
561 u32 rx_max_burst_duration
;
562 u32 rx_interframe_timeout
;
563 /* cached ISR registers */
565 /* mailbox related */
566 struct mutex wmi_mutex
;
567 struct wil6210_mbox_ctl mbox_ctl
;
568 struct completion wmi_ready
;
569 struct completion wmi_call
;
571 u16 reply_id
; /**< wait for this WMI event */
574 struct workqueue_struct
*wmi_wq
; /* for deferred calls */
575 struct work_struct wmi_event_worker
;
576 struct workqueue_struct
*wq_service
;
577 struct work_struct disconnect_worker
;
578 struct work_struct fw_error_worker
; /* for FW error recovery */
579 struct timer_list connect_timer
;
580 struct timer_list scan_timer
; /* detect scan timeout */
581 struct list_head pending_wmi_ev
;
583 * protect pending_wmi_ev
584 * - fill in IRQ from wil6210_irq_misc,
585 * - consumed in thread by wmi_event_worker
587 spinlock_t wmi_ev_lock
;
588 struct napi_struct napi_rx
;
589 struct napi_struct napi_tx
;
591 struct list_head probe_client_pending
;
592 struct mutex probe_client_mutex
; /* protect @probe_client_pending */
593 struct work_struct probe_client_worker
;
595 struct vring vring_rx
;
596 struct vring vring_tx
[WIL6210_MAX_TX_RINGS
];
597 struct vring_tx_data vring_tx_data
[WIL6210_MAX_TX_RINGS
];
598 u8 vring2cid_tid
[WIL6210_MAX_TX_RINGS
][2]; /* [0] - CID, [1] - TID */
599 struct wil_sta_info sta
[WIL6210_MAX_CID
];
602 struct cfg80211_scan_request
*scan_request
;
604 struct mutex mutex
; /* for wil6210_priv access in wil_{up|down} */
606 atomic_t isr_count_rx
, isr_count_tx
;
608 struct dentry
*debug
;
609 struct debugfs_blob_wrapper blobs
[ARRAY_SIZE(fw_mapping
)];
612 void *platform_handle
;
613 struct wil_platform_ops platform_ops
;
619 struct wil_p2p_info p2p
;
622 struct wireless_dev
*p2p_wdev
;
623 struct mutex p2p_wdev_mutex
; /* protect @p2p_wdev */
624 struct wireless_dev
*radio_wdev
;
627 #define wil_to_wiphy(i) (i->wdev->wiphy)
628 #define wil_to_dev(i) (wiphy_dev(wil_to_wiphy(i)))
629 #define wiphy_to_wil(w) (struct wil6210_priv *)(wiphy_priv(w))
630 #define wil_to_wdev(i) (i->wdev)
631 #define wdev_to_wil(w) (struct wil6210_priv *)(wdev_priv(w))
632 #define wil_to_ndev(i) (wil_to_wdev(i)->netdev)
633 #define ndev_to_wil(n) (wdev_to_wil(n->ieee80211_ptr))
636 void wil_dbg_trace(struct wil6210_priv
*wil
, const char *fmt
, ...);
638 void wil_err(struct wil6210_priv
*wil
, const char *fmt
, ...);
640 void wil_err_ratelimited(struct wil6210_priv
*wil
, const char *fmt
, ...);
642 void wil_info(struct wil6210_priv
*wil
, const char *fmt
, ...);
643 #define wil_dbg(wil, fmt, arg...) do { \
644 netdev_dbg(wil_to_ndev(wil), fmt, ##arg); \
645 wil_dbg_trace(wil, fmt, ##arg); \
648 #define wil_dbg_irq(wil, fmt, arg...) wil_dbg(wil, "DBG[ IRQ]" fmt, ##arg)
649 #define wil_dbg_txrx(wil, fmt, arg...) wil_dbg(wil, "DBG[TXRX]" fmt, ##arg)
650 #define wil_dbg_wmi(wil, fmt, arg...) wil_dbg(wil, "DBG[ WMI]" fmt, ##arg)
651 #define wil_dbg_misc(wil, fmt, arg...) wil_dbg(wil, "DBG[MISC]" fmt, ##arg)
652 #define wil_dbg_pm(wil, fmt, arg...) wil_dbg(wil, "DBG[ PM ]" fmt, ##arg)
654 /* target operations */
656 static inline u32
wil_r(struct wil6210_priv
*wil
, u32 reg
)
658 return readl(wil
->csr
+ HOSTADDR(reg
));
661 /* register write. wmb() to make sure it is completed */
662 static inline void wil_w(struct wil6210_priv
*wil
, u32 reg
, u32 val
)
664 writel(val
, wil
->csr
+ HOSTADDR(reg
));
665 wmb(); /* wait for write to propagate to the HW */
668 /* register set = read, OR, write */
669 static inline void wil_s(struct wil6210_priv
*wil
, u32 reg
, u32 val
)
671 wil_w(wil
, reg
, wil_r(wil
, reg
) | val
);
674 /* register clear = read, AND with inverted, write */
675 static inline void wil_c(struct wil6210_priv
*wil
, u32 reg
, u32 val
)
677 wil_w(wil
, reg
, wil_r(wil
, reg
) & ~val
);
680 #if defined(CONFIG_DYNAMIC_DEBUG)
681 #define wil_hex_dump_txrx(prefix_str, prefix_type, rowsize, \
682 groupsize, buf, len, ascii) \
683 print_hex_dump_debug("DBG[TXRX]" prefix_str,\
684 prefix_type, rowsize, \
685 groupsize, buf, len, ascii)
687 #define wil_hex_dump_wmi(prefix_str, prefix_type, rowsize, \
688 groupsize, buf, len, ascii) \
689 print_hex_dump_debug("DBG[ WMI]" prefix_str,\
690 prefix_type, rowsize, \
691 groupsize, buf, len, ascii)
692 #else /* defined(CONFIG_DYNAMIC_DEBUG) */
694 void wil_hex_dump_txrx(const char *prefix_str
, int prefix_type
, int rowsize
,
695 int groupsize
, const void *buf
, size_t len
, bool ascii
)
700 void wil_hex_dump_wmi(const char *prefix_str
, int prefix_type
, int rowsize
,
701 int groupsize
, const void *buf
, size_t len
, bool ascii
)
704 #endif /* defined(CONFIG_DYNAMIC_DEBUG) */
706 void wil_memcpy_fromio_32(void *dst
, const volatile void __iomem
*src
,
708 void wil_memcpy_toio_32(volatile void __iomem
*dst
, const void *src
,
711 void *wil_if_alloc(struct device
*dev
);
712 void wil_if_free(struct wil6210_priv
*wil
);
713 int wil_if_add(struct wil6210_priv
*wil
);
714 void wil_if_remove(struct wil6210_priv
*wil
);
715 int wil_priv_init(struct wil6210_priv
*wil
);
716 void wil_priv_deinit(struct wil6210_priv
*wil
);
717 int wil_reset(struct wil6210_priv
*wil
, bool no_fw
);
718 void wil_fw_error_recovery(struct wil6210_priv
*wil
);
719 void wil_set_recovery_state(struct wil6210_priv
*wil
, int state
);
720 bool wil_is_recovery_blocked(struct wil6210_priv
*wil
);
721 int wil_up(struct wil6210_priv
*wil
);
722 int __wil_up(struct wil6210_priv
*wil
);
723 int wil_down(struct wil6210_priv
*wil
);
724 int __wil_down(struct wil6210_priv
*wil
);
725 void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring
*r
);
726 int wil_find_cid(struct wil6210_priv
*wil
, const u8
*mac
);
727 void wil_set_ethtoolops(struct net_device
*ndev
);
729 void __iomem
*wmi_buffer(struct wil6210_priv
*wil
, __le32 ptr
);
730 void __iomem
*wmi_addr(struct wil6210_priv
*wil
, u32 ptr
);
731 int wmi_read_hdr(struct wil6210_priv
*wil
, __le32 ptr
,
732 struct wil6210_mbox_hdr
*hdr
);
733 int wmi_send(struct wil6210_priv
*wil
, u16 cmdid
, void *buf
, u16 len
);
734 void wmi_recv_cmd(struct wil6210_priv
*wil
);
735 int wmi_call(struct wil6210_priv
*wil
, u16 cmdid
, void *buf
, u16 len
,
736 u16 reply_id
, void *reply
, u8 reply_size
, int to_msec
);
737 void wmi_event_worker(struct work_struct
*work
);
738 void wmi_event_flush(struct wil6210_priv
*wil
);
739 int wmi_set_ssid(struct wil6210_priv
*wil
, u8 ssid_len
, const void *ssid
);
740 int wmi_get_ssid(struct wil6210_priv
*wil
, u8
*ssid_len
, void *ssid
);
741 int wmi_set_channel(struct wil6210_priv
*wil
, int channel
);
742 int wmi_get_channel(struct wil6210_priv
*wil
, int *channel
);
743 int wmi_del_cipher_key(struct wil6210_priv
*wil
, u8 key_index
,
744 const void *mac_addr
, int key_usage
);
745 int wmi_add_cipher_key(struct wil6210_priv
*wil
, u8 key_index
,
746 const void *mac_addr
, int key_len
, const void *key
,
748 int wmi_echo(struct wil6210_priv
*wil
);
749 int wmi_set_ie(struct wil6210_priv
*wil
, u8 type
, u16 ie_len
, const void *ie
);
750 int wmi_rx_chain_add(struct wil6210_priv
*wil
, struct vring
*vring
);
751 int wmi_rxon(struct wil6210_priv
*wil
, bool on
);
752 int wmi_get_temperature(struct wil6210_priv
*wil
, u32
*t_m
, u32
*t_r
);
753 int wmi_disconnect_sta(struct wil6210_priv
*wil
, const u8
*mac
, u16 reason
,
754 bool full_disconnect
);
755 int wmi_addba(struct wil6210_priv
*wil
, u8 ringid
, u8 size
, u16 timeout
);
756 int wmi_delba_tx(struct wil6210_priv
*wil
, u8 ringid
, u16 reason
);
757 int wmi_delba_rx(struct wil6210_priv
*wil
, u8 cidxtid
, u16 reason
);
758 int wmi_addba_rx_resp(struct wil6210_priv
*wil
, u8 cid
, u8 tid
, u8 token
,
759 u16 status
, bool amsdu
, u16 agg_wsize
, u16 timeout
);
760 int wil_addba_rx_request(struct wil6210_priv
*wil
, u8 cidxtid
,
761 u8 dialog_token
, __le16 ba_param_set
,
762 __le16 ba_timeout
, __le16 ba_seq_ctrl
);
763 int wil_addba_tx_request(struct wil6210_priv
*wil
, u8 ringid
, u16 wsize
);
765 void wil6210_clear_irq(struct wil6210_priv
*wil
);
766 int wil6210_init_irq(struct wil6210_priv
*wil
, int irq
, bool use_msi
);
767 void wil6210_fini_irq(struct wil6210_priv
*wil
, int irq
);
768 void wil_mask_irq(struct wil6210_priv
*wil
);
769 void wil_unmask_irq(struct wil6210_priv
*wil
);
770 void wil_configure_interrupt_moderation(struct wil6210_priv
*wil
);
771 void wil_disable_irq(struct wil6210_priv
*wil
);
772 void wil_enable_irq(struct wil6210_priv
*wil
);
775 void wil_p2p_discovery_timer_fn(ulong x
);
776 int wil_p2p_search(struct wil6210_priv
*wil
,
777 struct cfg80211_scan_request
*request
);
778 int wil_p2p_listen(struct wil6210_priv
*wil
, unsigned int duration
,
779 struct ieee80211_channel
*chan
, u64
*cookie
);
780 u8
wil_p2p_stop_discovery(struct wil6210_priv
*wil
);
781 int wil_p2p_cancel_listen(struct wil6210_priv
*wil
, u64 cookie
);
782 void wil_p2p_listen_expired(struct work_struct
*work
);
783 void wil_p2p_search_expired(struct work_struct
*work
);
786 int wmi_p2p_cfg(struct wil6210_priv
*wil
, int channel
, int bi
);
787 int wmi_start_listen(struct wil6210_priv
*wil
);
788 int wmi_start_search(struct wil6210_priv
*wil
);
789 int wmi_stop_discovery(struct wil6210_priv
*wil
);
791 int wil_cfg80211_mgmt_tx(struct wiphy
*wiphy
, struct wireless_dev
*wdev
,
792 struct cfg80211_mgmt_tx_params
*params
,
795 int wil6210_debugfs_init(struct wil6210_priv
*wil
);
796 void wil6210_debugfs_remove(struct wil6210_priv
*wil
);
797 int wil_cid_fill_sinfo(struct wil6210_priv
*wil
, int cid
,
798 struct station_info
*sinfo
);
800 struct wireless_dev
*wil_cfg80211_init(struct device
*dev
);
801 void wil_wdev_free(struct wil6210_priv
*wil
);
802 void wil_p2p_wdev_free(struct wil6210_priv
*wil
);
804 int wmi_set_mac_address(struct wil6210_priv
*wil
, void *addr
);
805 int wmi_pcp_start(struct wil6210_priv
*wil
, int bi
, u8 wmi_nettype
,
806 u8 chan
, u8 hidden_ssid
, u8 is_go
);
807 int wmi_pcp_stop(struct wil6210_priv
*wil
);
808 void wil6210_disconnect(struct wil6210_priv
*wil
, const u8
*bssid
,
809 u16 reason_code
, bool from_event
);
810 void wil_probe_client_flush(struct wil6210_priv
*wil
);
811 void wil_probe_client_worker(struct work_struct
*work
);
813 int wil_rx_init(struct wil6210_priv
*wil
, u16 size
);
814 void wil_rx_fini(struct wil6210_priv
*wil
);
817 int wil_vring_init_tx(struct wil6210_priv
*wil
, int id
, int size
,
819 void wil_vring_fini_tx(struct wil6210_priv
*wil
, int id
);
820 int wil_tx_init(struct wil6210_priv
*wil
, int cid
);
821 int wil_vring_init_bcast(struct wil6210_priv
*wil
, int id
, int size
);
822 int wil_bcast_init(struct wil6210_priv
*wil
);
823 void wil_bcast_fini(struct wil6210_priv
*wil
);
825 netdev_tx_t
wil_start_xmit(struct sk_buff
*skb
, struct net_device
*ndev
);
826 int wil_tx_complete(struct wil6210_priv
*wil
, int ringid
);
827 void wil6210_unmask_irq_tx(struct wil6210_priv
*wil
);
830 void wil_rx_handle(struct wil6210_priv
*wil
, int *quota
);
831 void wil6210_unmask_irq_rx(struct wil6210_priv
*wil
);
833 int wil_iftype_nl2wmi(enum nl80211_iftype type
);
835 int wil_ioctl(struct wil6210_priv
*wil
, void __user
*data
, int cmd
);
836 int wil_request_firmware(struct wil6210_priv
*wil
, const char *name
);
838 int wil_can_suspend(struct wil6210_priv
*wil
, bool is_runtime
);
839 int wil_suspend(struct wil6210_priv
*wil
, bool is_runtime
);
840 int wil_resume(struct wil6210_priv
*wil
, bool is_runtime
);
842 int wil_fw_copy_crash_dump(struct wil6210_priv
*wil
, void *dest
, u32 size
);
843 void wil_fw_core_dump(struct wil6210_priv
*wil
);
845 #endif /* __WIL6210_H__ */