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mac80211: share STA information with driver
[deliverable/linux.git] / drivers / net / wireless / ath9k / main.c
1 /*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 /* mac80211 and PCI callbacks */
18
19 #include <linux/nl80211.h>
20 #include "core.h"
21
22 #define ATH_PCI_VERSION "0.1"
23
24 #define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
25
26 static char *dev_info = "ath9k";
27
28 MODULE_AUTHOR("Atheros Communications");
29 MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
30 MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
31 MODULE_LICENSE("Dual BSD/GPL");
32
33 static struct pci_device_id ath_pci_id_table[] __devinitdata = {
34 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
35 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
36 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
38 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
39 { 0 }
40 };
41
42 static int ath_get_channel(struct ath_softc *sc,
43 struct ieee80211_channel *chan)
44 {
45 int i;
46
47 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
48 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
49 return i;
50 }
51
52 return -1;
53 }
54
55 static u32 ath_get_extchanmode(struct ath_softc *sc,
56 struct ieee80211_channel *chan)
57 {
58 u32 chanmode = 0;
59 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
60 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
61
62 switch (chan->band) {
63 case IEEE80211_BAND_2GHZ:
64 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
65 (tx_chan_width == ATH9K_HT_MACMODE_20))
66 chanmode = CHANNEL_G_HT20;
67 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
68 (tx_chan_width == ATH9K_HT_MACMODE_2040))
69 chanmode = CHANNEL_G_HT40PLUS;
70 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
71 (tx_chan_width == ATH9K_HT_MACMODE_2040))
72 chanmode = CHANNEL_G_HT40MINUS;
73 break;
74 case IEEE80211_BAND_5GHZ:
75 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
76 (tx_chan_width == ATH9K_HT_MACMODE_20))
77 chanmode = CHANNEL_A_HT20;
78 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
79 (tx_chan_width == ATH9K_HT_MACMODE_2040))
80 chanmode = CHANNEL_A_HT40PLUS;
81 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
82 (tx_chan_width == ATH9K_HT_MACMODE_2040))
83 chanmode = CHANNEL_A_HT40MINUS;
84 break;
85 default:
86 break;
87 }
88
89 return chanmode;
90 }
91
92
93 static int ath_setkey_tkip(struct ath_softc *sc,
94 struct ieee80211_key_conf *key,
95 struct ath9k_keyval *hk,
96 const u8 *addr)
97 {
98 u8 *key_rxmic = NULL;
99 u8 *key_txmic = NULL;
100
101 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
102 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
103
104 if (addr == NULL) {
105 /* Group key installation */
106 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
107 return ath_keyset(sc, key->keyidx, hk, addr);
108 }
109 if (!sc->sc_splitmic) {
110 /*
111 * data key goes at first index,
112 * the hal handles the MIC keys at index+64.
113 */
114 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
115 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
116 return ath_keyset(sc, key->keyidx, hk, addr);
117 }
118 /*
119 * TX key goes at first index, RX key at +32.
120 * The hal handles the MIC keys at index+64.
121 */
122 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
123 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
124 /* Txmic entry failed. No need to proceed further */
125 DPRINTF(sc, ATH_DBG_KEYCACHE,
126 "%s Setting TX MIC Key Failed\n", __func__);
127 return 0;
128 }
129
130 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
131 /* XXX delete tx key on failure? */
132 return ath_keyset(sc, key->keyidx+32, hk, addr);
133 }
134
135 static int ath_key_config(struct ath_softc *sc,
136 const u8 *addr,
137 struct ieee80211_key_conf *key)
138 {
139 struct ieee80211_vif *vif;
140 struct ath9k_keyval hk;
141 const u8 *mac = NULL;
142 int ret = 0;
143 enum nl80211_iftype opmode;
144
145 memset(&hk, 0, sizeof(hk));
146
147 switch (key->alg) {
148 case ALG_WEP:
149 hk.kv_type = ATH9K_CIPHER_WEP;
150 break;
151 case ALG_TKIP:
152 hk.kv_type = ATH9K_CIPHER_TKIP;
153 break;
154 case ALG_CCMP:
155 hk.kv_type = ATH9K_CIPHER_AES_CCM;
156 break;
157 default:
158 return -EINVAL;
159 }
160
161 hk.kv_len = key->keylen;
162 memcpy(hk.kv_val, key->key, key->keylen);
163
164 if (!sc->sc_vaps[0])
165 return -EIO;
166
167 vif = sc->sc_vaps[0]->av_if_data;
168 opmode = vif->type;
169
170 /*
171 * Strategy:
172 * For _M_STA mc tx, we will not setup a key at all since we never
173 * tx mc.
174 * _M_STA mc rx, we will use the keyID.
175 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
176 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
177 * peer node. BUT we will plumb a cleartext key so that we can do
178 * perSta default key table lookup in software.
179 */
180 if (is_broadcast_ether_addr(addr)) {
181 switch (opmode) {
182 case NL80211_IFTYPE_STATION:
183 /* default key: could be group WPA key
184 * or could be static WEP key */
185 mac = NULL;
186 break;
187 case NL80211_IFTYPE_ADHOC:
188 break;
189 case NL80211_IFTYPE_AP:
190 break;
191 default:
192 ASSERT(0);
193 break;
194 }
195 } else {
196 mac = addr;
197 }
198
199 if (key->alg == ALG_TKIP)
200 ret = ath_setkey_tkip(sc, key, &hk, mac);
201 else
202 ret = ath_keyset(sc, key->keyidx, &hk, mac);
203
204 if (!ret)
205 return -EIO;
206
207 if (mac)
208 sc->sc_keytype = hk.kv_type;
209 return 0;
210 }
211
212 static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
213 {
214 int freeslot;
215
216 freeslot = (key->keyidx >= 4) ? 1 : 0;
217 ath_key_reset(sc, key->keyidx, freeslot);
218 }
219
220 static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
221 {
222 #define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
223 #define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
224
225 ht_info->ht_supported = 1;
226 ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
227 |(u16)IEEE80211_HT_CAP_SM_PS
228 |(u16)IEEE80211_HT_CAP_SGI_40
229 |(u16)IEEE80211_HT_CAP_DSSSCCK40;
230
231 ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
232 ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
233 /* setup supported mcs set */
234 memset(ht_info->supp_mcs_set, 0, 16);
235 ht_info->supp_mcs_set[0] = 0xff;
236 ht_info->supp_mcs_set[1] = 0xff;
237 ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
238 }
239
240 static int ath_rate2idx(struct ath_softc *sc, int rate)
241 {
242 int i = 0, cur_band, n_rates;
243 struct ieee80211_hw *hw = sc->hw;
244
245 cur_band = hw->conf.channel->band;
246 n_rates = sc->sbands[cur_band].n_bitrates;
247
248 for (i = 0; i < n_rates; i++) {
249 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
250 break;
251 }
252
253 /*
254 * NB:mac80211 validates rx rate index against the supported legacy rate
255 * index only (should be done against ht rates also), return the highest
256 * legacy rate index for rx rate which does not match any one of the
257 * supported basic and extended rates to make mac80211 happy.
258 * The following hack will be cleaned up once the issue with
259 * the rx rate index validation in mac80211 is fixed.
260 */
261 if (i == n_rates)
262 return n_rates - 1;
263 return i;
264 }
265
266 static void ath9k_rx_prepare(struct ath_softc *sc,
267 struct sk_buff *skb,
268 struct ath_recv_status *status,
269 struct ieee80211_rx_status *rx_status)
270 {
271 struct ieee80211_hw *hw = sc->hw;
272 struct ieee80211_channel *curchan = hw->conf.channel;
273
274 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
275
276 rx_status->mactime = status->tsf;
277 rx_status->band = curchan->band;
278 rx_status->freq = curchan->center_freq;
279 rx_status->noise = ATH_DEFAULT_NOISE_FLOOR;
280 rx_status->signal = rx_status->noise + status->rssi;
281 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
282 rx_status->antenna = status->antenna;
283 rx_status->qual = status->rssi * 100 / 64;
284
285 if (status->flags & ATH_RX_MIC_ERROR)
286 rx_status->flag |= RX_FLAG_MMIC_ERROR;
287 if (status->flags & ATH_RX_FCS_ERROR)
288 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
289
290 rx_status->flag |= RX_FLAG_TSFT;
291 }
292
293 static u8 parse_mpdudensity(u8 mpdudensity)
294 {
295 /*
296 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
297 * 0 for no restriction
298 * 1 for 1/4 us
299 * 2 for 1/2 us
300 * 3 for 1 us
301 * 4 for 2 us
302 * 5 for 4 us
303 * 6 for 8 us
304 * 7 for 16 us
305 */
306 switch (mpdudensity) {
307 case 0:
308 return 0;
309 case 1:
310 case 2:
311 case 3:
312 /* Our lower layer calculations limit our precision to
313 1 microsecond */
314 return 1;
315 case 4:
316 return 2;
317 case 5:
318 return 4;
319 case 6:
320 return 8;
321 case 7:
322 return 16;
323 default:
324 return 0;
325 }
326 }
327
328 static void ath9k_ht_conf(struct ath_softc *sc,
329 struct ieee80211_bss_conf *bss_conf)
330 {
331 #define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
332 struct ath_ht_info *ht_info = &sc->sc_ht_info;
333
334 if (bss_conf->assoc_ht) {
335 ht_info->ext_chan_offset =
336 bss_conf->ht_bss_conf->bss_cap &
337 IEEE80211_HT_IE_CHA_SEC_OFFSET;
338
339 if (!(bss_conf->ht_conf->cap &
340 IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
341 (bss_conf->ht_bss_conf->bss_cap &
342 IEEE80211_HT_IE_CHA_WIDTH))
343 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
344 else
345 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
346
347 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
348 ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
349 bss_conf->ht_conf->ampdu_factor);
350 ht_info->mpdudensity =
351 parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
352
353 }
354
355 #undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
356 }
357
358 static void ath9k_bss_assoc_info(struct ath_softc *sc,
359 struct ieee80211_bss_conf *bss_conf)
360 {
361 struct ieee80211_hw *hw = sc->hw;
362 struct ieee80211_channel *curchan = hw->conf.channel;
363 struct ath_vap *avp;
364 int pos;
365 DECLARE_MAC_BUF(mac);
366
367 if (bss_conf->assoc) {
368 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
369 __func__,
370 bss_conf->aid);
371
372 avp = sc->sc_vaps[0];
373 if (avp == NULL) {
374 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
375 __func__);
376 return;
377 }
378
379 /* New association, store aid */
380 if (avp->av_opmode == ATH9K_M_STA) {
381 sc->sc_curaid = bss_conf->aid;
382 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
383 sc->sc_curaid);
384 }
385
386 /* Configure the beacon */
387 ath_beacon_config(sc, 0);
388 sc->sc_flags |= SC_OP_BEACONS;
389
390 /* Reset rssi stats */
391 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
392 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
393 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
394 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
395
396 /* Update chainmask */
397 ath_update_chainmask(sc, bss_conf->assoc_ht);
398
399 DPRINTF(sc, ATH_DBG_CONFIG,
400 "%s: bssid %s aid 0x%x\n",
401 __func__,
402 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
403
404 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
405 __func__,
406 curchan->center_freq);
407
408 pos = ath_get_channel(sc, curchan);
409 if (pos == -1) {
410 DPRINTF(sc, ATH_DBG_FATAL,
411 "%s: Invalid channel\n", __func__);
412 return;
413 }
414
415 if (hw->conf.ht_conf.ht_supported)
416 sc->sc_ah->ah_channels[pos].chanmode =
417 ath_get_extchanmode(sc, curchan);
418 else
419 sc->sc_ah->ah_channels[pos].chanmode =
420 (curchan->band == IEEE80211_BAND_2GHZ) ?
421 CHANNEL_G : CHANNEL_A;
422
423 /* set h/w channel */
424 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
425 DPRINTF(sc, ATH_DBG_FATAL,
426 "%s: Unable to set channel\n",
427 __func__);
428
429 ath_rate_newstate(sc, avp);
430 /* Update ratectrl about the new state */
431 ath_rc_node_update(hw, avp->rc_node);
432 } else {
433 DPRINTF(sc, ATH_DBG_CONFIG,
434 "%s: Bss Info DISSOC\n", __func__);
435 sc->sc_curaid = 0;
436 }
437 }
438
439 void ath_get_beaconconfig(struct ath_softc *sc,
440 int if_id,
441 struct ath_beacon_config *conf)
442 {
443 struct ieee80211_hw *hw = sc->hw;
444
445 /* fill in beacon config data */
446
447 conf->beacon_interval = hw->conf.beacon_int;
448 conf->listen_interval = 100;
449 conf->dtim_count = 1;
450 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
451 }
452
453 void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
454 struct ath_xmit_status *tx_status, struct ath_node *an)
455 {
456 struct ieee80211_hw *hw = sc->hw;
457 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
458
459 DPRINTF(sc, ATH_DBG_XMIT,
460 "%s: TX complete: skb: %p\n", __func__, skb);
461
462 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
463 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
464 /* free driver's private data area of tx_info */
465 if (tx_info->driver_data[0] != NULL)
466 kfree(tx_info->driver_data[0]);
467 tx_info->driver_data[0] = NULL;
468 }
469
470 if (tx_status->flags & ATH_TX_BAR) {
471 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
472 tx_status->flags &= ~ATH_TX_BAR;
473 }
474
475 if (tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY)) {
476 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) {
477 /* Frame was not ACKed, but an ACK was expected */
478 tx_info->status.excessive_retries = 1;
479 }
480 } else {
481 /* Frame was ACKed */
482 tx_info->flags |= IEEE80211_TX_STAT_ACK;
483 }
484
485 tx_info->status.retry_count = tx_status->retries;
486
487 ieee80211_tx_status(hw, skb);
488 if (an)
489 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
490 }
491
492 int _ath_rx_indicate(struct ath_softc *sc,
493 struct sk_buff *skb,
494 struct ath_recv_status *status,
495 u16 keyix)
496 {
497 struct ieee80211_hw *hw = sc->hw;
498 struct ath_node *an = NULL;
499 struct ieee80211_rx_status rx_status;
500 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
501 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
502 int padsize;
503 enum ATH_RX_TYPE st;
504
505 /* see if any padding is done by the hw and remove it */
506 if (hdrlen & 3) {
507 padsize = hdrlen % 4;
508 memmove(skb->data + padsize, skb->data, hdrlen);
509 skb_pull(skb, padsize);
510 }
511
512 /* Prepare rx status */
513 ath9k_rx_prepare(sc, skb, status, &rx_status);
514
515 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
516 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
517 rx_status.flag |= RX_FLAG_DECRYPTED;
518 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
519 && !(status->flags & ATH_RX_DECRYPT_ERROR)
520 && skb->len >= hdrlen + 4) {
521 keyix = skb->data[hdrlen + 3] >> 6;
522
523 if (test_bit(keyix, sc->sc_keymap))
524 rx_status.flag |= RX_FLAG_DECRYPTED;
525 }
526
527 spin_lock_bh(&sc->node_lock);
528 an = ath_node_find(sc, hdr->addr2);
529 spin_unlock_bh(&sc->node_lock);
530
531 if (an) {
532 ath_rx_input(sc, an,
533 hw->conf.ht_conf.ht_supported,
534 skb, status, &st);
535 }
536 if (!an || (st != ATH_RX_CONSUMED))
537 __ieee80211_rx(hw, skb, &rx_status);
538
539 return 0;
540 }
541
542 int ath_rx_subframe(struct ath_node *an,
543 struct sk_buff *skb,
544 struct ath_recv_status *status)
545 {
546 struct ath_softc *sc = an->an_sc;
547 struct ieee80211_hw *hw = sc->hw;
548 struct ieee80211_rx_status rx_status;
549
550 /* Prepare rx status */
551 ath9k_rx_prepare(sc, skb, status, &rx_status);
552 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
553 rx_status.flag |= RX_FLAG_DECRYPTED;
554
555 __ieee80211_rx(hw, skb, &rx_status);
556
557 return 0;
558 }
559
560 /********************************/
561 /* LED functions */
562 /********************************/
563
564 static void ath_led_brightness(struct led_classdev *led_cdev,
565 enum led_brightness brightness)
566 {
567 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
568 struct ath_softc *sc = led->sc;
569
570 switch (brightness) {
571 case LED_OFF:
572 if (led->led_type == ATH_LED_ASSOC ||
573 led->led_type == ATH_LED_RADIO)
574 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
575 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
576 (led->led_type == ATH_LED_RADIO) ? 1 :
577 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
578 break;
579 case LED_FULL:
580 if (led->led_type == ATH_LED_ASSOC)
581 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
582 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
583 break;
584 default:
585 break;
586 }
587 }
588
589 static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
590 char *trigger)
591 {
592 int ret;
593
594 led->sc = sc;
595 led->led_cdev.name = led->name;
596 led->led_cdev.default_trigger = trigger;
597 led->led_cdev.brightness_set = ath_led_brightness;
598
599 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
600 if (ret)
601 DPRINTF(sc, ATH_DBG_FATAL,
602 "Failed to register led:%s", led->name);
603 else
604 led->registered = 1;
605 return ret;
606 }
607
608 static void ath_unregister_led(struct ath_led *led)
609 {
610 if (led->registered) {
611 led_classdev_unregister(&led->led_cdev);
612 led->registered = 0;
613 }
614 }
615
616 static void ath_deinit_leds(struct ath_softc *sc)
617 {
618 ath_unregister_led(&sc->assoc_led);
619 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
620 ath_unregister_led(&sc->tx_led);
621 ath_unregister_led(&sc->rx_led);
622 ath_unregister_led(&sc->radio_led);
623 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
624 }
625
626 static void ath_init_leds(struct ath_softc *sc)
627 {
628 char *trigger;
629 int ret;
630
631 /* Configure gpio 1 for output */
632 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
633 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
634 /* LED off, active low */
635 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
636
637 trigger = ieee80211_get_radio_led_name(sc->hw);
638 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
639 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
640 ret = ath_register_led(sc, &sc->radio_led, trigger);
641 sc->radio_led.led_type = ATH_LED_RADIO;
642 if (ret)
643 goto fail;
644
645 trigger = ieee80211_get_assoc_led_name(sc->hw);
646 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
647 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
648 ret = ath_register_led(sc, &sc->assoc_led, trigger);
649 sc->assoc_led.led_type = ATH_LED_ASSOC;
650 if (ret)
651 goto fail;
652
653 trigger = ieee80211_get_tx_led_name(sc->hw);
654 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
655 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
656 ret = ath_register_led(sc, &sc->tx_led, trigger);
657 sc->tx_led.led_type = ATH_LED_TX;
658 if (ret)
659 goto fail;
660
661 trigger = ieee80211_get_rx_led_name(sc->hw);
662 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
663 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
664 ret = ath_register_led(sc, &sc->rx_led, trigger);
665 sc->rx_led.led_type = ATH_LED_RX;
666 if (ret)
667 goto fail;
668
669 return;
670
671 fail:
672 ath_deinit_leds(sc);
673 }
674
675 #ifdef CONFIG_RFKILL
676 /*******************/
677 /* Rfkill */
678 /*******************/
679
680 static void ath_radio_enable(struct ath_softc *sc)
681 {
682 struct ath_hal *ah = sc->sc_ah;
683 int status;
684
685 spin_lock_bh(&sc->sc_resetlock);
686 if (!ath9k_hw_reset(ah, ah->ah_curchan,
687 sc->sc_ht_info.tx_chan_width,
688 sc->sc_tx_chainmask,
689 sc->sc_rx_chainmask,
690 sc->sc_ht_extprotspacing,
691 false, &status)) {
692 DPRINTF(sc, ATH_DBG_FATAL,
693 "%s: unable to reset channel %u (%uMhz) "
694 "flags 0x%x hal status %u\n", __func__,
695 ath9k_hw_mhz2ieee(ah,
696 ah->ah_curchan->channel,
697 ah->ah_curchan->channelFlags),
698 ah->ah_curchan->channel,
699 ah->ah_curchan->channelFlags, status);
700 }
701 spin_unlock_bh(&sc->sc_resetlock);
702
703 ath_update_txpow(sc);
704 if (ath_startrecv(sc) != 0) {
705 DPRINTF(sc, ATH_DBG_FATAL,
706 "%s: unable to restart recv logic\n", __func__);
707 return;
708 }
709
710 if (sc->sc_flags & SC_OP_BEACONS)
711 ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */
712
713 /* Re-Enable interrupts */
714 ath9k_hw_set_interrupts(ah, sc->sc_imask);
715
716 /* Enable LED */
717 ath9k_hw_cfg_output(ah, ATH_LED_PIN,
718 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
719 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 0);
720
721 ieee80211_wake_queues(sc->hw);
722 }
723
724 static void ath_radio_disable(struct ath_softc *sc)
725 {
726 struct ath_hal *ah = sc->sc_ah;
727 int status;
728
729
730 ieee80211_stop_queues(sc->hw);
731
732 /* Disable LED */
733 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 1);
734 ath9k_hw_cfg_gpio_input(ah, ATH_LED_PIN);
735
736 /* Disable interrupts */
737 ath9k_hw_set_interrupts(ah, 0);
738
739 ath_draintxq(sc, false); /* clear pending tx frames */
740 ath_stoprecv(sc); /* turn off frame recv */
741 ath_flushrecv(sc); /* flush recv queue */
742
743 spin_lock_bh(&sc->sc_resetlock);
744 if (!ath9k_hw_reset(ah, ah->ah_curchan,
745 sc->sc_ht_info.tx_chan_width,
746 sc->sc_tx_chainmask,
747 sc->sc_rx_chainmask,
748 sc->sc_ht_extprotspacing,
749 false, &status)) {
750 DPRINTF(sc, ATH_DBG_FATAL,
751 "%s: unable to reset channel %u (%uMhz) "
752 "flags 0x%x hal status %u\n", __func__,
753 ath9k_hw_mhz2ieee(ah,
754 ah->ah_curchan->channel,
755 ah->ah_curchan->channelFlags),
756 ah->ah_curchan->channel,
757 ah->ah_curchan->channelFlags, status);
758 }
759 spin_unlock_bh(&sc->sc_resetlock);
760
761 ath9k_hw_phy_disable(ah);
762 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
763 }
764
765 static bool ath_is_rfkill_set(struct ath_softc *sc)
766 {
767 struct ath_hal *ah = sc->sc_ah;
768
769 return ath9k_hw_gpio_get(ah, ah->ah_rfkill_gpio) ==
770 ah->ah_rfkill_polarity;
771 }
772
773 /* h/w rfkill poll function */
774 static void ath_rfkill_poll(struct work_struct *work)
775 {
776 struct ath_softc *sc = container_of(work, struct ath_softc,
777 rf_kill.rfkill_poll.work);
778 bool radio_on;
779
780 if (sc->sc_flags & SC_OP_INVALID)
781 return;
782
783 radio_on = !ath_is_rfkill_set(sc);
784
785 /*
786 * enable/disable radio only when there is a
787 * state change in RF switch
788 */
789 if (radio_on == !!(sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED)) {
790 enum rfkill_state state;
791
792 if (sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED) {
793 state = radio_on ? RFKILL_STATE_SOFT_BLOCKED
794 : RFKILL_STATE_HARD_BLOCKED;
795 } else if (radio_on) {
796 ath_radio_enable(sc);
797 state = RFKILL_STATE_UNBLOCKED;
798 } else {
799 ath_radio_disable(sc);
800 state = RFKILL_STATE_HARD_BLOCKED;
801 }
802
803 if (state == RFKILL_STATE_HARD_BLOCKED)
804 sc->sc_flags |= SC_OP_RFKILL_HW_BLOCKED;
805 else
806 sc->sc_flags &= ~SC_OP_RFKILL_HW_BLOCKED;
807
808 rfkill_force_state(sc->rf_kill.rfkill, state);
809 }
810
811 queue_delayed_work(sc->hw->workqueue, &sc->rf_kill.rfkill_poll,
812 msecs_to_jiffies(ATH_RFKILL_POLL_INTERVAL));
813 }
814
815 /* s/w rfkill handler */
816 static int ath_sw_toggle_radio(void *data, enum rfkill_state state)
817 {
818 struct ath_softc *sc = data;
819
820 switch (state) {
821 case RFKILL_STATE_SOFT_BLOCKED:
822 if (!(sc->sc_flags & (SC_OP_RFKILL_HW_BLOCKED |
823 SC_OP_RFKILL_SW_BLOCKED)))
824 ath_radio_disable(sc);
825 sc->sc_flags |= SC_OP_RFKILL_SW_BLOCKED;
826 return 0;
827 case RFKILL_STATE_UNBLOCKED:
828 if ((sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED)) {
829 sc->sc_flags &= ~SC_OP_RFKILL_SW_BLOCKED;
830 if (sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED) {
831 DPRINTF(sc, ATH_DBG_FATAL, "Can't turn on the"
832 "radio as it is disabled by h/w \n");
833 return -EPERM;
834 }
835 ath_radio_enable(sc);
836 }
837 return 0;
838 default:
839 return -EINVAL;
840 }
841 }
842
843 /* Init s/w rfkill */
844 static int ath_init_sw_rfkill(struct ath_softc *sc)
845 {
846 sc->rf_kill.rfkill = rfkill_allocate(wiphy_dev(sc->hw->wiphy),
847 RFKILL_TYPE_WLAN);
848 if (!sc->rf_kill.rfkill) {
849 DPRINTF(sc, ATH_DBG_FATAL, "Failed to allocate rfkill\n");
850 return -ENOMEM;
851 }
852
853 snprintf(sc->rf_kill.rfkill_name, sizeof(sc->rf_kill.rfkill_name),
854 "ath9k-%s:rfkill", wiphy_name(sc->hw->wiphy));
855 sc->rf_kill.rfkill->name = sc->rf_kill.rfkill_name;
856 sc->rf_kill.rfkill->data = sc;
857 sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio;
858 sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED;
859 sc->rf_kill.rfkill->user_claim_unsupported = 1;
860
861 return 0;
862 }
863
864 /* Deinitialize rfkill */
865 static void ath_deinit_rfkill(struct ath_softc *sc)
866 {
867 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
868 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
869
870 if (sc->sc_flags & SC_OP_RFKILL_REGISTERED) {
871 rfkill_unregister(sc->rf_kill.rfkill);
872 sc->sc_flags &= ~SC_OP_RFKILL_REGISTERED;
873 sc->rf_kill.rfkill = NULL;
874 }
875 }
876 #endif /* CONFIG_RFKILL */
877
878 static int ath_detach(struct ath_softc *sc)
879 {
880 struct ieee80211_hw *hw = sc->hw;
881
882 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
883
884 /* Deinit LED control */
885 ath_deinit_leds(sc);
886
887 #ifdef CONFIG_RFKILL
888 /* deinit rfkill */
889 ath_deinit_rfkill(sc);
890 #endif
891
892 /* Unregister hw */
893
894 ieee80211_unregister_hw(hw);
895
896 /* unregister Rate control */
897 ath_rate_control_unregister();
898
899 /* tx/rx cleanup */
900
901 ath_rx_cleanup(sc);
902 ath_tx_cleanup(sc);
903
904 /* Deinit */
905
906 ath_deinit(sc);
907
908 return 0;
909 }
910
911 static int ath_attach(u16 devid,
912 struct ath_softc *sc)
913 {
914 struct ieee80211_hw *hw = sc->hw;
915 int error = 0;
916
917 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
918
919 error = ath_init(devid, sc);
920 if (error != 0)
921 return error;
922
923 /* Init nodes */
924
925 INIT_LIST_HEAD(&sc->node_list);
926 spin_lock_init(&sc->node_lock);
927
928 /* get mac address from hardware and set in mac80211 */
929
930 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
931
932 /* setup channels and rates */
933
934 sc->sbands[IEEE80211_BAND_2GHZ].channels =
935 sc->channels[IEEE80211_BAND_2GHZ];
936 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
937 sc->rates[IEEE80211_BAND_2GHZ];
938 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
939
940 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
941 /* Setup HT capabilities for 2.4Ghz*/
942 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
943
944 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
945 &sc->sbands[IEEE80211_BAND_2GHZ];
946
947 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
948 sc->sbands[IEEE80211_BAND_5GHZ].channels =
949 sc->channels[IEEE80211_BAND_5GHZ];
950 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
951 sc->rates[IEEE80211_BAND_5GHZ];
952 sc->sbands[IEEE80211_BAND_5GHZ].band =
953 IEEE80211_BAND_5GHZ;
954
955 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
956 /* Setup HT capabilities for 5Ghz*/
957 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
958
959 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
960 &sc->sbands[IEEE80211_BAND_5GHZ];
961 }
962
963 /* FIXME: Have to figure out proper hw init values later */
964
965 hw->queues = 4;
966 hw->ampdu_queues = 1;
967
968 /* Register rate control */
969 hw->rate_control_algorithm = "ath9k_rate_control";
970 error = ath_rate_control_register();
971 if (error != 0) {
972 DPRINTF(sc, ATH_DBG_FATAL,
973 "%s: Unable to register rate control "
974 "algorithm:%d\n", __func__, error);
975 ath_rate_control_unregister();
976 goto bad;
977 }
978
979 error = ieee80211_register_hw(hw);
980 if (error != 0) {
981 ath_rate_control_unregister();
982 goto bad;
983 }
984
985 /* Initialize LED control */
986 ath_init_leds(sc);
987
988 #ifdef CONFIG_RFKILL
989 /* Initialze h/w Rfkill */
990 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
991 INIT_DELAYED_WORK(&sc->rf_kill.rfkill_poll, ath_rfkill_poll);
992
993 /* Initialize s/w rfkill */
994 if (ath_init_sw_rfkill(sc))
995 goto detach;
996 #endif
997
998 /* initialize tx/rx engine */
999
1000 error = ath_tx_init(sc, ATH_TXBUF);
1001 if (error != 0)
1002 goto detach;
1003
1004 error = ath_rx_init(sc, ATH_RXBUF);
1005 if (error != 0)
1006 goto detach;
1007
1008 return 0;
1009 detach:
1010 ath_detach(sc);
1011 bad:
1012 return error;
1013 }
1014
1015 static int ath9k_start(struct ieee80211_hw *hw)
1016 {
1017 struct ath_softc *sc = hw->priv;
1018 struct ieee80211_channel *curchan = hw->conf.channel;
1019 int error = 0, pos;
1020
1021 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
1022 "initial channel: %d MHz\n", __func__, curchan->center_freq);
1023
1024 /* setup initial channel */
1025
1026 pos = ath_get_channel(sc, curchan);
1027 if (pos == -1) {
1028 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1029 return -EINVAL;
1030 }
1031
1032 sc->sc_ah->ah_channels[pos].chanmode =
1033 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
1034
1035 /* open ath_dev */
1036 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
1037 if (error) {
1038 DPRINTF(sc, ATH_DBG_FATAL,
1039 "%s: Unable to complete ath_open\n", __func__);
1040 return error;
1041 }
1042
1043 #ifdef CONFIG_RFKILL
1044 /* Start rfkill polling */
1045 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1046 queue_delayed_work(sc->hw->workqueue,
1047 &sc->rf_kill.rfkill_poll, 0);
1048
1049 if (!(sc->sc_flags & SC_OP_RFKILL_REGISTERED)) {
1050 if (rfkill_register(sc->rf_kill.rfkill)) {
1051 DPRINTF(sc, ATH_DBG_FATAL,
1052 "Unable to register rfkill\n");
1053 rfkill_free(sc->rf_kill.rfkill);
1054
1055 /* Deinitialize the device */
1056 if (sc->pdev->irq)
1057 free_irq(sc->pdev->irq, sc);
1058 ath_detach(sc);
1059 pci_iounmap(sc->pdev, sc->mem);
1060 pci_release_region(sc->pdev, 0);
1061 pci_disable_device(sc->pdev);
1062 ieee80211_free_hw(hw);
1063 return -EIO;
1064 } else {
1065 sc->sc_flags |= SC_OP_RFKILL_REGISTERED;
1066 }
1067 }
1068 #endif
1069
1070 ieee80211_wake_queues(hw);
1071 return 0;
1072 }
1073
1074 static int ath9k_tx(struct ieee80211_hw *hw,
1075 struct sk_buff *skb)
1076 {
1077 struct ath_softc *sc = hw->priv;
1078 int hdrlen, padsize;
1079 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1080
1081 /*
1082 * As a temporary workaround, assign seq# here; this will likely need
1083 * to be cleaned up to work better with Beacon transmission and virtual
1084 * BSSes.
1085 */
1086 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1087 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1088 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1089 sc->seq_no += 0x10;
1090 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1091 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
1092 }
1093
1094 /* Add the padding after the header if this is not already done */
1095 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1096 if (hdrlen & 3) {
1097 padsize = hdrlen % 4;
1098 if (skb_headroom(skb) < padsize)
1099 return -1;
1100 skb_push(skb, padsize);
1101 memmove(skb->data, skb->data + padsize, hdrlen);
1102 }
1103
1104 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
1105 __func__,
1106 skb);
1107
1108 if (ath_tx_start(sc, skb) != 0) {
1109 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
1110 dev_kfree_skb_any(skb);
1111 /* FIXME: Check for proper return value from ATH_DEV */
1112 return 0;
1113 }
1114
1115 return 0;
1116 }
1117
1118 static void ath9k_stop(struct ieee80211_hw *hw)
1119 {
1120 struct ath_softc *sc = hw->priv;
1121 int error;
1122
1123 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
1124
1125 error = ath_suspend(sc);
1126 if (error)
1127 DPRINTF(sc, ATH_DBG_CONFIG,
1128 "%s: Device is no longer present\n", __func__);
1129
1130 ieee80211_stop_queues(hw);
1131
1132 #ifdef CONFIG_RFKILL
1133 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1134 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1135 #endif
1136 }
1137
1138 static int ath9k_add_interface(struct ieee80211_hw *hw,
1139 struct ieee80211_if_init_conf *conf)
1140 {
1141 struct ath_softc *sc = hw->priv;
1142 int error, ic_opmode = 0;
1143
1144 /* Support only vap for now */
1145
1146 if (sc->sc_nvaps)
1147 return -ENOBUFS;
1148
1149 switch (conf->type) {
1150 case NL80211_IFTYPE_STATION:
1151 ic_opmode = ATH9K_M_STA;
1152 break;
1153 case NL80211_IFTYPE_ADHOC:
1154 ic_opmode = ATH9K_M_IBSS;
1155 break;
1156 case NL80211_IFTYPE_AP:
1157 ic_opmode = ATH9K_M_HOSTAP;
1158 break;
1159 default:
1160 DPRINTF(sc, ATH_DBG_FATAL,
1161 "%s: Interface type %d not yet supported\n",
1162 __func__, conf->type);
1163 return -EOPNOTSUPP;
1164 }
1165
1166 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
1167 __func__,
1168 ic_opmode);
1169
1170 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
1171 if (error) {
1172 DPRINTF(sc, ATH_DBG_FATAL,
1173 "%s: Unable to attach vap, error: %d\n",
1174 __func__, error);
1175 return error;
1176 }
1177
1178 return 0;
1179 }
1180
1181 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1182 struct ieee80211_if_init_conf *conf)
1183 {
1184 struct ath_softc *sc = hw->priv;
1185 struct ath_vap *avp;
1186 int error;
1187
1188 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
1189
1190 avp = sc->sc_vaps[0];
1191 if (avp == NULL) {
1192 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
1193 __func__);
1194 return;
1195 }
1196
1197 #ifdef CONFIG_SLOW_ANT_DIV
1198 ath_slow_ant_div_stop(&sc->sc_antdiv);
1199 #endif
1200
1201 /* Update ratectrl */
1202 ath_rate_newstate(sc, avp);
1203
1204 /* Reclaim beacon resources */
1205 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
1206 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
1207 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1208 ath_beacon_return(sc, avp);
1209 }
1210
1211 /* Set interrupt mask */
1212 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1213 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
1214 sc->sc_flags &= ~SC_OP_BEACONS;
1215
1216 error = ath_vap_detach(sc, 0);
1217 if (error)
1218 DPRINTF(sc, ATH_DBG_FATAL,
1219 "%s: Unable to detach vap, error: %d\n",
1220 __func__, error);
1221 }
1222
1223 static int ath9k_config(struct ieee80211_hw *hw,
1224 struct ieee80211_conf *conf)
1225 {
1226 struct ath_softc *sc = hw->priv;
1227 struct ieee80211_channel *curchan = hw->conf.channel;
1228 int pos;
1229
1230 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
1231 __func__,
1232 curchan->center_freq);
1233
1234 pos = ath_get_channel(sc, curchan);
1235 if (pos == -1) {
1236 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1237 return -EINVAL;
1238 }
1239
1240 sc->sc_ah->ah_channels[pos].chanmode =
1241 (curchan->band == IEEE80211_BAND_2GHZ) ?
1242 CHANNEL_G : CHANNEL_A;
1243
1244 if (sc->sc_curaid && hw->conf.ht_conf.ht_supported)
1245 sc->sc_ah->ah_channels[pos].chanmode =
1246 ath_get_extchanmode(sc, curchan);
1247
1248 sc->sc_config.txpowlimit = 2 * conf->power_level;
1249
1250 /* set h/w channel */
1251 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
1252 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
1253 __func__);
1254
1255 return 0;
1256 }
1257
1258 static int ath9k_config_interface(struct ieee80211_hw *hw,
1259 struct ieee80211_vif *vif,
1260 struct ieee80211_if_conf *conf)
1261 {
1262 struct ath_softc *sc = hw->priv;
1263 struct ath_hal *ah = sc->sc_ah;
1264 struct ath_vap *avp;
1265 u32 rfilt = 0;
1266 int error, i;
1267 DECLARE_MAC_BUF(mac);
1268
1269 avp = sc->sc_vaps[0];
1270 if (avp == NULL) {
1271 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
1272 __func__);
1273 return -EINVAL;
1274 }
1275
1276 /* TODO: Need to decide which hw opmode to use for multi-interface
1277 * cases */
1278 if (vif->type == NL80211_IFTYPE_AP &&
1279 ah->ah_opmode != ATH9K_M_HOSTAP) {
1280 ah->ah_opmode = ATH9K_M_HOSTAP;
1281 ath9k_hw_setopmode(ah);
1282 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
1283 /* Request full reset to get hw opmode changed properly */
1284 sc->sc_flags |= SC_OP_FULL_RESET;
1285 }
1286
1287 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
1288 !is_zero_ether_addr(conf->bssid)) {
1289 switch (vif->type) {
1290 case NL80211_IFTYPE_STATION:
1291 case NL80211_IFTYPE_ADHOC:
1292 /* Update ratectrl about the new state */
1293 ath_rate_newstate(sc, avp);
1294
1295 /* Set BSSID */
1296 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
1297 sc->sc_curaid = 0;
1298 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
1299 sc->sc_curaid);
1300
1301 /* Set aggregation protection mode parameters */
1302 sc->sc_config.ath_aggr_prot = 0;
1303
1304 /*
1305 * Reset our TSF so that its value is lower than the
1306 * beacon that we are trying to catch.
1307 * Only then hw will update its TSF register with the
1308 * new beacon. Reset the TSF before setting the BSSID
1309 * to avoid allowing in any frames that would update
1310 * our TSF only to have us clear it
1311 * immediately thereafter.
1312 */
1313 ath9k_hw_reset_tsf(sc->sc_ah);
1314
1315 /* Disable BMISS interrupt when we're not associated */
1316 ath9k_hw_set_interrupts(sc->sc_ah,
1317 sc->sc_imask &
1318 ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
1319 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1320
1321 DPRINTF(sc, ATH_DBG_CONFIG,
1322 "%s: RX filter 0x%x bssid %s aid 0x%x\n",
1323 __func__, rfilt,
1324 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
1325
1326 /* need to reconfigure the beacon */
1327 sc->sc_flags &= ~SC_OP_BEACONS ;
1328
1329 break;
1330 default:
1331 break;
1332 }
1333 }
1334
1335 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
1336 ((vif->type == NL80211_IFTYPE_ADHOC) ||
1337 (vif->type == NL80211_IFTYPE_AP))) {
1338 /*
1339 * Allocate and setup the beacon frame.
1340 *
1341 * Stop any previous beacon DMA. This may be
1342 * necessary, for example, when an ibss merge
1343 * causes reconfiguration; we may be called
1344 * with beacon transmission active.
1345 */
1346 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1347
1348 error = ath_beacon_alloc(sc, 0);
1349 if (error != 0)
1350 return error;
1351
1352 ath_beacon_sync(sc, 0);
1353 }
1354
1355 /* Check for WLAN_CAPABILITY_PRIVACY ? */
1356 if ((avp->av_opmode != NL80211_IFTYPE_STATION)) {
1357 for (i = 0; i < IEEE80211_WEP_NKID; i++)
1358 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
1359 ath9k_hw_keysetmac(sc->sc_ah,
1360 (u16)i,
1361 sc->sc_curbssid);
1362 }
1363
1364 /* Only legacy IBSS for now */
1365 if (vif->type == NL80211_IFTYPE_ADHOC)
1366 ath_update_chainmask(sc, 0);
1367
1368 return 0;
1369 }
1370
1371 #define SUPPORTED_FILTERS \
1372 (FIF_PROMISC_IN_BSS | \
1373 FIF_ALLMULTI | \
1374 FIF_CONTROL | \
1375 FIF_OTHER_BSS | \
1376 FIF_BCN_PRBRESP_PROMISC | \
1377 FIF_FCSFAIL)
1378
1379 /* FIXME: sc->sc_full_reset ? */
1380 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1381 unsigned int changed_flags,
1382 unsigned int *total_flags,
1383 int mc_count,
1384 struct dev_mc_list *mclist)
1385 {
1386 struct ath_softc *sc = hw->priv;
1387 u32 rfilt;
1388
1389 changed_flags &= SUPPORTED_FILTERS;
1390 *total_flags &= SUPPORTED_FILTERS;
1391
1392 sc->rx_filter = *total_flags;
1393 rfilt = ath_calcrxfilter(sc);
1394 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1395
1396 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1397 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1398 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
1399 }
1400
1401 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
1402 __func__, sc->rx_filter);
1403 }
1404
1405 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1406 struct ieee80211_vif *vif,
1407 enum sta_notify_cmd cmd,
1408 struct ieee80211_sta *sta)
1409 {
1410 struct ath_softc *sc = hw->priv;
1411 struct ath_node *an;
1412 unsigned long flags;
1413 DECLARE_MAC_BUF(mac);
1414
1415 spin_lock_irqsave(&sc->node_lock, flags);
1416 an = ath_node_find(sc, sta->addr);
1417 spin_unlock_irqrestore(&sc->node_lock, flags);
1418
1419 switch (cmd) {
1420 case STA_NOTIFY_ADD:
1421 spin_lock_irqsave(&sc->node_lock, flags);
1422 if (!an) {
1423 ath_node_attach(sc, sta->addr, 0);
1424 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %s\n",
1425 __func__, print_mac(mac, sta->addr));
1426 } else {
1427 ath_node_get(sc, sta->addr);
1428 }
1429 spin_unlock_irqrestore(&sc->node_lock, flags);
1430 break;
1431 case STA_NOTIFY_REMOVE:
1432 if (!an)
1433 DPRINTF(sc, ATH_DBG_FATAL,
1434 "%s: Removal of a non-existent node\n",
1435 __func__);
1436 else {
1437 ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
1438 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %s\n",
1439 __func__,
1440 print_mac(mac, sta->addr));
1441 }
1442 break;
1443 default:
1444 break;
1445 }
1446 }
1447
1448 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1449 u16 queue,
1450 const struct ieee80211_tx_queue_params *params)
1451 {
1452 struct ath_softc *sc = hw->priv;
1453 struct ath9k_tx_queue_info qi;
1454 int ret = 0, qnum;
1455
1456 if (queue >= WME_NUM_AC)
1457 return 0;
1458
1459 qi.tqi_aifs = params->aifs;
1460 qi.tqi_cwmin = params->cw_min;
1461 qi.tqi_cwmax = params->cw_max;
1462 qi.tqi_burstTime = params->txop;
1463 qnum = ath_get_hal_qnum(queue, sc);
1464
1465 DPRINTF(sc, ATH_DBG_CONFIG,
1466 "%s: Configure tx [queue/halq] [%d/%d], "
1467 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1468 __func__,
1469 queue,
1470 qnum,
1471 params->aifs,
1472 params->cw_min,
1473 params->cw_max,
1474 params->txop);
1475
1476 ret = ath_txq_update(sc, qnum, &qi);
1477 if (ret)
1478 DPRINTF(sc, ATH_DBG_FATAL,
1479 "%s: TXQ Update failed\n", __func__);
1480
1481 return ret;
1482 }
1483
1484 static int ath9k_set_key(struct ieee80211_hw *hw,
1485 enum set_key_cmd cmd,
1486 const u8 *local_addr,
1487 const u8 *addr,
1488 struct ieee80211_key_conf *key)
1489 {
1490 struct ath_softc *sc = hw->priv;
1491 int ret = 0;
1492
1493 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
1494
1495 switch (cmd) {
1496 case SET_KEY:
1497 ret = ath_key_config(sc, addr, key);
1498 if (!ret) {
1499 set_bit(key->keyidx, sc->sc_keymap);
1500 key->hw_key_idx = key->keyidx;
1501 /* push IV and Michael MIC generation to stack */
1502 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1503 if (key->alg == ALG_TKIP)
1504 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1505 }
1506 break;
1507 case DISABLE_KEY:
1508 ath_key_delete(sc, key);
1509 clear_bit(key->keyidx, sc->sc_keymap);
1510 sc->sc_keytype = ATH9K_CIPHER_CLR;
1511 break;
1512 default:
1513 ret = -EINVAL;
1514 }
1515
1516 return ret;
1517 }
1518
1519 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1520 struct ieee80211_vif *vif,
1521 struct ieee80211_bss_conf *bss_conf,
1522 u32 changed)
1523 {
1524 struct ath_softc *sc = hw->priv;
1525
1526 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1527 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
1528 __func__,
1529 bss_conf->use_short_preamble);
1530 if (bss_conf->use_short_preamble)
1531 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1532 else
1533 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1534 }
1535
1536 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1537 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
1538 __func__,
1539 bss_conf->use_cts_prot);
1540 if (bss_conf->use_cts_prot &&
1541 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1542 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1543 else
1544 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1545 }
1546
1547 if (changed & BSS_CHANGED_HT) {
1548 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT %d\n",
1549 __func__,
1550 bss_conf->assoc_ht);
1551 ath9k_ht_conf(sc, bss_conf);
1552 }
1553
1554 if (changed & BSS_CHANGED_ASSOC) {
1555 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
1556 __func__,
1557 bss_conf->assoc);
1558 ath9k_bss_assoc_info(sc, bss_conf);
1559 }
1560 }
1561
1562 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1563 {
1564 u64 tsf;
1565 struct ath_softc *sc = hw->priv;
1566 struct ath_hal *ah = sc->sc_ah;
1567
1568 tsf = ath9k_hw_gettsf64(ah);
1569
1570 return tsf;
1571 }
1572
1573 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1574 {
1575 struct ath_softc *sc = hw->priv;
1576 struct ath_hal *ah = sc->sc_ah;
1577
1578 ath9k_hw_reset_tsf(ah);
1579 }
1580
1581 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1582 enum ieee80211_ampdu_mlme_action action,
1583 struct ieee80211_sta *sta,
1584 u16 tid, u16 *ssn)
1585 {
1586 struct ath_softc *sc = hw->priv;
1587 int ret = 0;
1588
1589 switch (action) {
1590 case IEEE80211_AMPDU_RX_START:
1591 ret = ath_rx_aggr_start(sc, sta->addr, tid, ssn);
1592 if (ret < 0)
1593 DPRINTF(sc, ATH_DBG_FATAL,
1594 "%s: Unable to start RX aggregation\n",
1595 __func__);
1596 break;
1597 case IEEE80211_AMPDU_RX_STOP:
1598 ret = ath_rx_aggr_stop(sc, sta->addr, tid);
1599 if (ret < 0)
1600 DPRINTF(sc, ATH_DBG_FATAL,
1601 "%s: Unable to stop RX aggregation\n",
1602 __func__);
1603 break;
1604 case IEEE80211_AMPDU_TX_START:
1605 ret = ath_tx_aggr_start(sc, sta->addr, tid, ssn);
1606 if (ret < 0)
1607 DPRINTF(sc, ATH_DBG_FATAL,
1608 "%s: Unable to start TX aggregation\n",
1609 __func__);
1610 else
1611 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1612 break;
1613 case IEEE80211_AMPDU_TX_STOP:
1614 ret = ath_tx_aggr_stop(sc, sta->addr, tid);
1615 if (ret < 0)
1616 DPRINTF(sc, ATH_DBG_FATAL,
1617 "%s: Unable to stop TX aggregation\n",
1618 __func__);
1619
1620 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1621 break;
1622 default:
1623 DPRINTF(sc, ATH_DBG_FATAL,
1624 "%s: Unknown AMPDU action\n", __func__);
1625 }
1626
1627 return ret;
1628 }
1629
1630 static struct ieee80211_ops ath9k_ops = {
1631 .tx = ath9k_tx,
1632 .start = ath9k_start,
1633 .stop = ath9k_stop,
1634 .add_interface = ath9k_add_interface,
1635 .remove_interface = ath9k_remove_interface,
1636 .config = ath9k_config,
1637 .config_interface = ath9k_config_interface,
1638 .configure_filter = ath9k_configure_filter,
1639 .get_stats = NULL,
1640 .sta_notify = ath9k_sta_notify,
1641 .conf_tx = ath9k_conf_tx,
1642 .get_tx_stats = NULL,
1643 .bss_info_changed = ath9k_bss_info_changed,
1644 .set_tim = NULL,
1645 .set_key = ath9k_set_key,
1646 .hw_scan = NULL,
1647 .get_tkip_seq = NULL,
1648 .set_rts_threshold = NULL,
1649 .set_frag_threshold = NULL,
1650 .set_retry_limit = NULL,
1651 .get_tsf = ath9k_get_tsf,
1652 .reset_tsf = ath9k_reset_tsf,
1653 .tx_last_beacon = NULL,
1654 .ampdu_action = ath9k_ampdu_action
1655 };
1656
1657 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1658 {
1659 void __iomem *mem;
1660 struct ath_softc *sc;
1661 struct ieee80211_hw *hw;
1662 const char *athname;
1663 u8 csz;
1664 u32 val;
1665 int ret = 0;
1666
1667 if (pci_enable_device(pdev))
1668 return -EIO;
1669
1670 /* XXX 32-bit addressing only */
1671 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1672 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1673 ret = -ENODEV;
1674 goto bad;
1675 }
1676
1677 /*
1678 * Cache line size is used to size and align various
1679 * structures used to communicate with the hardware.
1680 */
1681 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1682 if (csz == 0) {
1683 /*
1684 * Linux 2.4.18 (at least) writes the cache line size
1685 * register as a 16-bit wide register which is wrong.
1686 * We must have this setup properly for rx buffer
1687 * DMA to work so force a reasonable value here if it
1688 * comes up zero.
1689 */
1690 csz = L1_CACHE_BYTES / sizeof(u32);
1691 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1692 }
1693 /*
1694 * The default setting of latency timer yields poor results,
1695 * set it to the value used by other systems. It may be worth
1696 * tweaking this setting more.
1697 */
1698 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1699
1700 pci_set_master(pdev);
1701
1702 /*
1703 * Disable the RETRY_TIMEOUT register (0x41) to keep
1704 * PCI Tx retries from interfering with C3 CPU state.
1705 */
1706 pci_read_config_dword(pdev, 0x40, &val);
1707 if ((val & 0x0000ff00) != 0)
1708 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1709
1710 ret = pci_request_region(pdev, 0, "ath9k");
1711 if (ret) {
1712 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1713 ret = -ENODEV;
1714 goto bad;
1715 }
1716
1717 mem = pci_iomap(pdev, 0, 0);
1718 if (!mem) {
1719 printk(KERN_ERR "PCI memory map error\n") ;
1720 ret = -EIO;
1721 goto bad1;
1722 }
1723
1724 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1725 if (hw == NULL) {
1726 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1727 goto bad2;
1728 }
1729
1730 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
1731 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1732 IEEE80211_HW_SIGNAL_DBM |
1733 IEEE80211_HW_NOISE_DBM;
1734
1735 hw->wiphy->interface_modes =
1736 BIT(NL80211_IFTYPE_AP) |
1737 BIT(NL80211_IFTYPE_STATION) |
1738 BIT(NL80211_IFTYPE_ADHOC);
1739
1740 SET_IEEE80211_DEV(hw, &pdev->dev);
1741 pci_set_drvdata(pdev, hw);
1742
1743 sc = hw->priv;
1744 sc->hw = hw;
1745 sc->pdev = pdev;
1746 sc->mem = mem;
1747
1748 if (ath_attach(id->device, sc) != 0) {
1749 ret = -ENODEV;
1750 goto bad3;
1751 }
1752
1753 /* setup interrupt service routine */
1754
1755 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1756 printk(KERN_ERR "%s: request_irq failed\n",
1757 wiphy_name(hw->wiphy));
1758 ret = -EIO;
1759 goto bad4;
1760 }
1761
1762 athname = ath9k_hw_probe(id->vendor, id->device);
1763
1764 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1765 wiphy_name(hw->wiphy),
1766 athname ? athname : "Atheros ???",
1767 (unsigned long)mem, pdev->irq);
1768
1769 return 0;
1770 bad4:
1771 ath_detach(sc);
1772 bad3:
1773 ieee80211_free_hw(hw);
1774 bad2:
1775 pci_iounmap(pdev, mem);
1776 bad1:
1777 pci_release_region(pdev, 0);
1778 bad:
1779 pci_disable_device(pdev);
1780 return ret;
1781 }
1782
1783 static void ath_pci_remove(struct pci_dev *pdev)
1784 {
1785 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1786 struct ath_softc *sc = hw->priv;
1787
1788 if (pdev->irq)
1789 free_irq(pdev->irq, sc);
1790 ath_detach(sc);
1791 pci_iounmap(pdev, sc->mem);
1792 pci_release_region(pdev, 0);
1793 pci_disable_device(pdev);
1794 ieee80211_free_hw(hw);
1795 }
1796
1797 #ifdef CONFIG_PM
1798
1799 static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1800 {
1801 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1802 struct ath_softc *sc = hw->priv;
1803
1804 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1805
1806 #ifdef CONFIG_RFKILL
1807 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1808 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1809 #endif
1810
1811 pci_save_state(pdev);
1812 pci_disable_device(pdev);
1813 pci_set_power_state(pdev, 3);
1814
1815 return 0;
1816 }
1817
1818 static int ath_pci_resume(struct pci_dev *pdev)
1819 {
1820 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1821 struct ath_softc *sc = hw->priv;
1822 u32 val;
1823 int err;
1824
1825 err = pci_enable_device(pdev);
1826 if (err)
1827 return err;
1828 pci_restore_state(pdev);
1829 /*
1830 * Suspend/Resume resets the PCI configuration space, so we have to
1831 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1832 * PCI Tx retries from interfering with C3 CPU state
1833 */
1834 pci_read_config_dword(pdev, 0x40, &val);
1835 if ((val & 0x0000ff00) != 0)
1836 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1837
1838 /* Enable LED */
1839 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1840 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1841 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1842
1843 #ifdef CONFIG_RFKILL
1844 /*
1845 * check the h/w rfkill state on resume
1846 * and start the rfkill poll timer
1847 */
1848 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1849 queue_delayed_work(sc->hw->workqueue,
1850 &sc->rf_kill.rfkill_poll, 0);
1851 #endif
1852
1853 return 0;
1854 }
1855
1856 #endif /* CONFIG_PM */
1857
1858 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1859
1860 static struct pci_driver ath_pci_driver = {
1861 .name = "ath9k",
1862 .id_table = ath_pci_id_table,
1863 .probe = ath_pci_probe,
1864 .remove = ath_pci_remove,
1865 #ifdef CONFIG_PM
1866 .suspend = ath_pci_suspend,
1867 .resume = ath_pci_resume,
1868 #endif /* CONFIG_PM */
1869 };
1870
1871 static int __init init_ath_pci(void)
1872 {
1873 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1874
1875 if (pci_register_driver(&ath_pci_driver) < 0) {
1876 printk(KERN_ERR
1877 "ath_pci: No devices found, driver not installed.\n");
1878 pci_unregister_driver(&ath_pci_driver);
1879 return -ENODEV;
1880 }
1881
1882 return 0;
1883 }
1884 module_init(init_ath_pci);
1885
1886 static void __exit exit_ath_pci(void)
1887 {
1888 pci_unregister_driver(&ath_pci_driver);
1889 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1890 }
1891 module_exit(exit_ath_pci);
Linux kernel - Deliverables
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