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SELinux: memory leak in security_context_to_sid_core
[deliverable/linux.git] / drivers / net / wireless / ath9k / main.c
1 /*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 /* mac80211 and PCI callbacks */
18
19 #include <linux/nl80211.h>
20 #include "core.h"
21
22 #define ATH_PCI_VERSION "0.1"
23
24 #define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
25 #define IEEE80211_ACTION_CAT_HT 7
26 #define IEEE80211_ACTION_HT_TXCHWIDTH 0
27
28 static char *dev_info = "ath9k";
29
30 MODULE_AUTHOR("Atheros Communications");
31 MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
32 MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
33 MODULE_LICENSE("Dual BSD/GPL");
34
35 static struct pci_device_id ath_pci_id_table[] __devinitdata = {
36 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
38 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
39 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
40 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
41 { 0 }
42 };
43
44 static int ath_get_channel(struct ath_softc *sc,
45 struct ieee80211_channel *chan)
46 {
47 int i;
48
49 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
50 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
51 return i;
52 }
53
54 return -1;
55 }
56
57 static u32 ath_get_extchanmode(struct ath_softc *sc,
58 struct ieee80211_channel *chan)
59 {
60 u32 chanmode = 0;
61 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
62 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
63
64 switch (chan->band) {
65 case IEEE80211_BAND_2GHZ:
66 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
67 (tx_chan_width == ATH9K_HT_MACMODE_20))
68 chanmode = CHANNEL_G_HT20;
69 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
70 (tx_chan_width == ATH9K_HT_MACMODE_2040))
71 chanmode = CHANNEL_G_HT40PLUS;
72 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
73 (tx_chan_width == ATH9K_HT_MACMODE_2040))
74 chanmode = CHANNEL_G_HT40MINUS;
75 break;
76 case IEEE80211_BAND_5GHZ:
77 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
78 (tx_chan_width == ATH9K_HT_MACMODE_20))
79 chanmode = CHANNEL_A_HT20;
80 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
81 (tx_chan_width == ATH9K_HT_MACMODE_2040))
82 chanmode = CHANNEL_A_HT40PLUS;
83 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
84 (tx_chan_width == ATH9K_HT_MACMODE_2040))
85 chanmode = CHANNEL_A_HT40MINUS;
86 break;
87 default:
88 break;
89 }
90
91 return chanmode;
92 }
93
94
95 static int ath_setkey_tkip(struct ath_softc *sc,
96 struct ieee80211_key_conf *key,
97 struct ath9k_keyval *hk,
98 const u8 *addr)
99 {
100 u8 *key_rxmic = NULL;
101 u8 *key_txmic = NULL;
102
103 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
104 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
105
106 if (addr == NULL) {
107 /* Group key installation */
108 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
109 return ath_keyset(sc, key->keyidx, hk, addr);
110 }
111 if (!sc->sc_splitmic) {
112 /*
113 * data key goes at first index,
114 * the hal handles the MIC keys at index+64.
115 */
116 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
117 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
118 return ath_keyset(sc, key->keyidx, hk, addr);
119 }
120 /*
121 * TX key goes at first index, RX key at +32.
122 * The hal handles the MIC keys at index+64.
123 */
124 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
125 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
126 /* Txmic entry failed. No need to proceed further */
127 DPRINTF(sc, ATH_DBG_KEYCACHE,
128 "%s Setting TX MIC Key Failed\n", __func__);
129 return 0;
130 }
131
132 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
133 /* XXX delete tx key on failure? */
134 return ath_keyset(sc, key->keyidx+32, hk, addr);
135 }
136
137 static int ath_key_config(struct ath_softc *sc,
138 const u8 *addr,
139 struct ieee80211_key_conf *key)
140 {
141 struct ieee80211_vif *vif;
142 struct ath9k_keyval hk;
143 const u8 *mac = NULL;
144 int ret = 0;
145 enum ieee80211_if_types opmode;
146
147 memset(&hk, 0, sizeof(hk));
148
149 switch (key->alg) {
150 case ALG_WEP:
151 hk.kv_type = ATH9K_CIPHER_WEP;
152 break;
153 case ALG_TKIP:
154 hk.kv_type = ATH9K_CIPHER_TKIP;
155 break;
156 case ALG_CCMP:
157 hk.kv_type = ATH9K_CIPHER_AES_CCM;
158 break;
159 default:
160 return -EINVAL;
161 }
162
163 hk.kv_len = key->keylen;
164 memcpy(hk.kv_val, key->key, key->keylen);
165
166 if (!sc->sc_vaps[0])
167 return -EIO;
168
169 vif = sc->sc_vaps[0]->av_if_data;
170 opmode = vif->type;
171
172 /*
173 * Strategy:
174 * For _M_STA mc tx, we will not setup a key at all since we never
175 * tx mc.
176 * _M_STA mc rx, we will use the keyID.
177 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
178 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
179 * peer node. BUT we will plumb a cleartext key so that we can do
180 * perSta default key table lookup in software.
181 */
182 if (is_broadcast_ether_addr(addr)) {
183 switch (opmode) {
184 case IEEE80211_IF_TYPE_STA:
185 /* default key: could be group WPA key
186 * or could be static WEP key */
187 mac = NULL;
188 break;
189 case IEEE80211_IF_TYPE_IBSS:
190 break;
191 case IEEE80211_IF_TYPE_AP:
192 break;
193 default:
194 ASSERT(0);
195 break;
196 }
197 } else {
198 mac = addr;
199 }
200
201 if (key->alg == ALG_TKIP)
202 ret = ath_setkey_tkip(sc, key, &hk, mac);
203 else
204 ret = ath_keyset(sc, key->keyidx, &hk, mac);
205
206 if (!ret)
207 return -EIO;
208
209 if (mac)
210 sc->sc_keytype = hk.kv_type;
211 return 0;
212 }
213
214 static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
215 {
216 #define ATH_MAX_NUM_KEYS 4
217 int freeslot;
218
219 freeslot = (key->keyidx >= ATH_MAX_NUM_KEYS) ? 1 : 0;
220 ath_key_reset(sc, key->keyidx, freeslot);
221 #undef ATH_MAX_NUM_KEYS
222 }
223
224 static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
225 {
226 /* Until mac80211 includes these fields */
227
228 #define IEEE80211_HT_CAP_DSSSCCK40 0x1000
229 #define IEEE80211_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
230 #define IEEE80211_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
231
232 ht_info->ht_supported = 1;
233 ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
234 |(u16)IEEE80211_HT_CAP_MIMO_PS
235 |(u16)IEEE80211_HT_CAP_SGI_40
236 |(u16)IEEE80211_HT_CAP_DSSSCCK40;
237
238 ht_info->ampdu_factor = IEEE80211_HT_CAP_MAXRXAMPDU_65536;
239 ht_info->ampdu_density = IEEE80211_HT_CAP_MPDUDENSITY_8;
240 /* setup supported mcs set */
241 memset(ht_info->supp_mcs_set, 0, 16);
242 ht_info->supp_mcs_set[0] = 0xff;
243 ht_info->supp_mcs_set[1] = 0xff;
244 ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
245 }
246
247 static int ath_rate2idx(struct ath_softc *sc, int rate)
248 {
249 int i = 0, cur_band, n_rates;
250 struct ieee80211_hw *hw = sc->hw;
251
252 cur_band = hw->conf.channel->band;
253 n_rates = sc->sbands[cur_band].n_bitrates;
254
255 for (i = 0; i < n_rates; i++) {
256 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
257 break;
258 }
259
260 /*
261 * NB:mac80211 validates rx rate index against the supported legacy rate
262 * index only (should be done against ht rates also), return the highest
263 * legacy rate index for rx rate which does not match any one of the
264 * supported basic and extended rates to make mac80211 happy.
265 * The following hack will be cleaned up once the issue with
266 * the rx rate index validation in mac80211 is fixed.
267 */
268 if (i == n_rates)
269 return n_rates - 1;
270 return i;
271 }
272
273 static void ath9k_rx_prepare(struct ath_softc *sc,
274 struct sk_buff *skb,
275 struct ath_recv_status *status,
276 struct ieee80211_rx_status *rx_status)
277 {
278 struct ieee80211_hw *hw = sc->hw;
279 struct ieee80211_channel *curchan = hw->conf.channel;
280
281 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
282
283 rx_status->mactime = status->tsf;
284 rx_status->band = curchan->band;
285 rx_status->freq = curchan->center_freq;
286 rx_status->noise = ATH_DEFAULT_NOISE_FLOOR;
287 rx_status->signal = rx_status->noise + status->rssi;
288 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
289 rx_status->antenna = status->antenna;
290 rx_status->qual = status->rssi * 100 / 64;
291
292 if (status->flags & ATH_RX_MIC_ERROR)
293 rx_status->flag |= RX_FLAG_MMIC_ERROR;
294 if (status->flags & ATH_RX_FCS_ERROR)
295 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
296
297 rx_status->flag |= RX_FLAG_TSFT;
298 }
299
300 static u8 parse_mpdudensity(u8 mpdudensity)
301 {
302 /*
303 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
304 * 0 for no restriction
305 * 1 for 1/4 us
306 * 2 for 1/2 us
307 * 3 for 1 us
308 * 4 for 2 us
309 * 5 for 4 us
310 * 6 for 8 us
311 * 7 for 16 us
312 */
313 switch (mpdudensity) {
314 case 0:
315 return 0;
316 case 1:
317 case 2:
318 case 3:
319 /* Our lower layer calculations limit our precision to
320 1 microsecond */
321 return 1;
322 case 4:
323 return 2;
324 case 5:
325 return 4;
326 case 6:
327 return 8;
328 case 7:
329 return 16;
330 default:
331 return 0;
332 }
333 }
334
335 static int ath9k_start(struct ieee80211_hw *hw)
336 {
337 struct ath_softc *sc = hw->priv;
338 struct ieee80211_channel *curchan = hw->conf.channel;
339 int error = 0, pos;
340
341 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
342 "initial channel: %d MHz\n", __func__, curchan->center_freq);
343
344 /* setup initial channel */
345
346 pos = ath_get_channel(sc, curchan);
347 if (pos == -1) {
348 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
349 return -EINVAL;
350 }
351
352 sc->sc_ah->ah_channels[pos].chanmode =
353 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
354
355 /* open ath_dev */
356 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
357 if (error) {
358 DPRINTF(sc, ATH_DBG_FATAL,
359 "%s: Unable to complete ath_open\n", __func__);
360 return error;
361 }
362
363 ieee80211_wake_queues(hw);
364 return 0;
365 }
366
367 static int ath9k_tx(struct ieee80211_hw *hw,
368 struct sk_buff *skb)
369 {
370 struct ath_softc *sc = hw->priv;
371 int hdrlen, padsize;
372
373 /* Add the padding after the header if this is not already done */
374 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
375 if (hdrlen & 3) {
376 padsize = hdrlen % 4;
377 if (skb_headroom(skb) < padsize)
378 return -1;
379 skb_push(skb, padsize);
380 memmove(skb->data, skb->data + padsize, hdrlen);
381 }
382
383 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
384 __func__,
385 skb);
386
387 if (ath_tx_start(sc, skb) != 0) {
388 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
389 dev_kfree_skb_any(skb);
390 /* FIXME: Check for proper return value from ATH_DEV */
391 return 0;
392 }
393
394 return 0;
395 }
396
397 static void ath9k_stop(struct ieee80211_hw *hw)
398 {
399 struct ath_softc *sc = hw->priv;
400 int error;
401
402 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
403
404 error = ath_suspend(sc);
405 if (error)
406 DPRINTF(sc, ATH_DBG_CONFIG,
407 "%s: Device is no longer present\n", __func__);
408
409 ieee80211_stop_queues(hw);
410 }
411
412 static int ath9k_add_interface(struct ieee80211_hw *hw,
413 struct ieee80211_if_init_conf *conf)
414 {
415 struct ath_softc *sc = hw->priv;
416 int error, ic_opmode = 0;
417
418 /* Support only vap for now */
419
420 if (sc->sc_nvaps)
421 return -ENOBUFS;
422
423 switch (conf->type) {
424 case IEEE80211_IF_TYPE_STA:
425 ic_opmode = ATH9K_M_STA;
426 break;
427 case IEEE80211_IF_TYPE_IBSS:
428 ic_opmode = ATH9K_M_IBSS;
429 break;
430 default:
431 DPRINTF(sc, ATH_DBG_FATAL,
432 "%s: Only STA and IBSS are supported currently\n",
433 __func__);
434 return -EOPNOTSUPP;
435 }
436
437 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
438 __func__,
439 ic_opmode);
440
441 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
442 if (error) {
443 DPRINTF(sc, ATH_DBG_FATAL,
444 "%s: Unable to attach vap, error: %d\n",
445 __func__, error);
446 return error;
447 }
448
449 return 0;
450 }
451
452 static void ath9k_remove_interface(struct ieee80211_hw *hw,
453 struct ieee80211_if_init_conf *conf)
454 {
455 struct ath_softc *sc = hw->priv;
456 struct ath_vap *avp;
457 int error;
458
459 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
460
461 avp = sc->sc_vaps[0];
462 if (avp == NULL) {
463 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
464 __func__);
465 return;
466 }
467
468 #ifdef CONFIG_SLOW_ANT_DIV
469 ath_slow_ant_div_stop(&sc->sc_antdiv);
470 #endif
471
472 /* Update ratectrl */
473 ath_rate_newstate(sc, avp);
474
475 /* Reclaim beacon resources */
476 if (sc->sc_opmode == ATH9K_M_HOSTAP || sc->sc_opmode == ATH9K_M_IBSS) {
477 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
478 ath_beacon_return(sc, avp);
479 }
480
481 /* Set interrupt mask */
482 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
483 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
484 sc->sc_beacons = 0;
485
486 error = ath_vap_detach(sc, 0);
487 if (error)
488 DPRINTF(sc, ATH_DBG_FATAL,
489 "%s: Unable to detach vap, error: %d\n",
490 __func__, error);
491 }
492
493 static int ath9k_config(struct ieee80211_hw *hw,
494 struct ieee80211_conf *conf)
495 {
496 struct ath_softc *sc = hw->priv;
497 struct ieee80211_channel *curchan = hw->conf.channel;
498 int pos;
499
500 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
501 __func__,
502 curchan->center_freq);
503
504 pos = ath_get_channel(sc, curchan);
505 if (pos == -1) {
506 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
507 return -EINVAL;
508 }
509
510 sc->sc_ah->ah_channels[pos].chanmode =
511 (curchan->band == IEEE80211_BAND_2GHZ) ?
512 CHANNEL_G : CHANNEL_A;
513
514 if (sc->sc_curaid && hw->conf.ht_conf.ht_supported)
515 sc->sc_ah->ah_channels[pos].chanmode =
516 ath_get_extchanmode(sc, curchan);
517
518 sc->sc_config.txpowlimit = 2 * conf->power_level;
519
520 /* set h/w channel */
521 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
522 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
523 __func__);
524
525 return 0;
526 }
527
528 static int ath9k_config_interface(struct ieee80211_hw *hw,
529 struct ieee80211_vif *vif,
530 struct ieee80211_if_conf *conf)
531 {
532 struct ath_softc *sc = hw->priv;
533 struct ath_vap *avp;
534 u32 rfilt = 0;
535 int error, i;
536 DECLARE_MAC_BUF(mac);
537
538 avp = sc->sc_vaps[0];
539 if (avp == NULL) {
540 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
541 __func__);
542 return -EINVAL;
543 }
544
545 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
546 !is_zero_ether_addr(conf->bssid)) {
547 switch (vif->type) {
548 case IEEE80211_IF_TYPE_STA:
549 case IEEE80211_IF_TYPE_IBSS:
550 /* Update ratectrl about the new state */
551 ath_rate_newstate(sc, avp);
552
553 /* Set rx filter */
554 rfilt = ath_calcrxfilter(sc);
555 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
556
557 /* Set BSSID */
558 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
559 sc->sc_curaid = 0;
560 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
561 sc->sc_curaid);
562
563 /* Set aggregation protection mode parameters */
564 sc->sc_config.ath_aggr_prot = 0;
565
566 /*
567 * Reset our TSF so that its value is lower than the
568 * beacon that we are trying to catch.
569 * Only then hw will update its TSF register with the
570 * new beacon. Reset the TSF before setting the BSSID
571 * to avoid allowing in any frames that would update
572 * our TSF only to have us clear it
573 * immediately thereafter.
574 */
575 ath9k_hw_reset_tsf(sc->sc_ah);
576
577 /* Disable BMISS interrupt when we're not associated */
578 ath9k_hw_set_interrupts(sc->sc_ah,
579 sc->sc_imask &
580 ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
581 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
582
583 DPRINTF(sc, ATH_DBG_CONFIG,
584 "%s: RX filter 0x%x bssid %s aid 0x%x\n",
585 __func__, rfilt,
586 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
587
588 /* need to reconfigure the beacon */
589 sc->sc_beacons = 0;
590
591 break;
592 default:
593 break;
594 }
595 }
596
597 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
598 (vif->type == IEEE80211_IF_TYPE_IBSS)) {
599 /*
600 * Allocate and setup the beacon frame.
601 *
602 * Stop any previous beacon DMA. This may be
603 * necessary, for example, when an ibss merge
604 * causes reconfiguration; we may be called
605 * with beacon transmission active.
606 */
607 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
608
609 error = ath_beacon_alloc(sc, 0);
610 if (error != 0)
611 return error;
612
613 ath_beacon_sync(sc, 0);
614 }
615
616 /* Check for WLAN_CAPABILITY_PRIVACY ? */
617 if ((avp->av_opmode != IEEE80211_IF_TYPE_STA)) {
618 for (i = 0; i < IEEE80211_WEP_NKID; i++)
619 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
620 ath9k_hw_keysetmac(sc->sc_ah,
621 (u16)i,
622 sc->sc_curbssid);
623 }
624
625 /* Only legacy IBSS for now */
626 if (vif->type == IEEE80211_IF_TYPE_IBSS)
627 ath_update_chainmask(sc, 0);
628
629 return 0;
630 }
631
632 #define SUPPORTED_FILTERS \
633 (FIF_PROMISC_IN_BSS | \
634 FIF_ALLMULTI | \
635 FIF_CONTROL | \
636 FIF_OTHER_BSS | \
637 FIF_BCN_PRBRESP_PROMISC | \
638 FIF_FCSFAIL)
639
640 /* Accept unicast, bcast and mcast frames */
641
642 static void ath9k_configure_filter(struct ieee80211_hw *hw,
643 unsigned int changed_flags,
644 unsigned int *total_flags,
645 int mc_count,
646 struct dev_mc_list *mclist)
647 {
648 struct ath_softc *sc = hw->priv;
649
650 changed_flags &= SUPPORTED_FILTERS;
651 *total_flags &= SUPPORTED_FILTERS;
652
653 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
654 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
655 ath_scan_start(sc);
656 else
657 ath_scan_end(sc);
658 }
659 }
660
661 static void ath9k_sta_notify(struct ieee80211_hw *hw,
662 struct ieee80211_vif *vif,
663 enum sta_notify_cmd cmd,
664 const u8 *addr)
665 {
666 struct ath_softc *sc = hw->priv;
667 struct ath_node *an;
668 unsigned long flags;
669 DECLARE_MAC_BUF(mac);
670
671 spin_lock_irqsave(&sc->node_lock, flags);
672 an = ath_node_find(sc, (u8 *) addr);
673 spin_unlock_irqrestore(&sc->node_lock, flags);
674
675 switch (cmd) {
676 case STA_NOTIFY_ADD:
677 spin_lock_irqsave(&sc->node_lock, flags);
678 if (!an) {
679 ath_node_attach(sc, (u8 *)addr, 0);
680 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %s\n",
681 __func__,
682 print_mac(mac, addr));
683 } else {
684 ath_node_get(sc, (u8 *)addr);
685 }
686 spin_unlock_irqrestore(&sc->node_lock, flags);
687 break;
688 case STA_NOTIFY_REMOVE:
689 if (!an)
690 DPRINTF(sc, ATH_DBG_FATAL,
691 "%s: Removal of a non-existent node\n",
692 __func__);
693 else {
694 ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
695 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %s\n",
696 __func__,
697 print_mac(mac, addr));
698 }
699 break;
700 default:
701 break;
702 }
703 }
704
705 static int ath9k_conf_tx(struct ieee80211_hw *hw,
706 u16 queue,
707 const struct ieee80211_tx_queue_params *params)
708 {
709 struct ath_softc *sc = hw->priv;
710 struct ath9k_tx_queue_info qi;
711 int ret = 0, qnum;
712
713 if (queue >= WME_NUM_AC)
714 return 0;
715
716 qi.tqi_aifs = params->aifs;
717 qi.tqi_cwmin = params->cw_min;
718 qi.tqi_cwmax = params->cw_max;
719 qi.tqi_burstTime = params->txop;
720 qnum = ath_get_hal_qnum(queue, sc);
721
722 DPRINTF(sc, ATH_DBG_CONFIG,
723 "%s: Configure tx [queue/halq] [%d/%d], "
724 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
725 __func__,
726 queue,
727 qnum,
728 params->aifs,
729 params->cw_min,
730 params->cw_max,
731 params->txop);
732
733 ret = ath_txq_update(sc, qnum, &qi);
734 if (ret)
735 DPRINTF(sc, ATH_DBG_FATAL,
736 "%s: TXQ Update failed\n", __func__);
737
738 return ret;
739 }
740
741 static int ath9k_set_key(struct ieee80211_hw *hw,
742 enum set_key_cmd cmd,
743 const u8 *local_addr,
744 const u8 *addr,
745 struct ieee80211_key_conf *key)
746 {
747 struct ath_softc *sc = hw->priv;
748 int ret = 0;
749
750 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
751
752 switch (cmd) {
753 case SET_KEY:
754 ret = ath_key_config(sc, addr, key);
755 if (!ret) {
756 set_bit(key->keyidx, sc->sc_keymap);
757 key->hw_key_idx = key->keyidx;
758 /* push IV and Michael MIC generation to stack */
759 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
760 if (key->alg == ALG_TKIP)
761 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
762 }
763 break;
764 case DISABLE_KEY:
765 ath_key_delete(sc, key);
766 clear_bit(key->keyidx, sc->sc_keymap);
767 sc->sc_keytype = ATH9K_CIPHER_CLR;
768 break;
769 default:
770 ret = -EINVAL;
771 }
772
773 return ret;
774 }
775
776 static void ath9k_ht_conf(struct ath_softc *sc,
777 struct ieee80211_bss_conf *bss_conf)
778 {
779 #define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
780 struct ath_ht_info *ht_info = &sc->sc_ht_info;
781
782 if (bss_conf->assoc_ht) {
783 ht_info->ext_chan_offset =
784 bss_conf->ht_bss_conf->bss_cap &
785 IEEE80211_HT_IE_CHA_SEC_OFFSET;
786
787 if (!(bss_conf->ht_conf->cap &
788 IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
789 (bss_conf->ht_bss_conf->bss_cap &
790 IEEE80211_HT_IE_CHA_WIDTH))
791 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
792 else
793 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
794
795 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
796 ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
797 bss_conf->ht_conf->ampdu_factor);
798 ht_info->mpdudensity =
799 parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
800
801 }
802
803 #undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
804 }
805
806 static void ath9k_bss_assoc_info(struct ath_softc *sc,
807 struct ieee80211_bss_conf *bss_conf)
808 {
809 struct ieee80211_hw *hw = sc->hw;
810 struct ieee80211_channel *curchan = hw->conf.channel;
811 struct ath_vap *avp;
812 int pos;
813 DECLARE_MAC_BUF(mac);
814
815 if (bss_conf->assoc) {
816 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
817 __func__,
818 bss_conf->aid);
819
820 avp = sc->sc_vaps[0];
821 if (avp == NULL) {
822 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
823 __func__);
824 return;
825 }
826
827 /* New association, store aid */
828 if (avp->av_opmode == ATH9K_M_STA) {
829 sc->sc_curaid = bss_conf->aid;
830 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
831 sc->sc_curaid);
832 }
833
834 /* Configure the beacon */
835 ath_beacon_config(sc, 0);
836 sc->sc_beacons = 1;
837
838 /* Reset rssi stats */
839 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
840 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
841 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
842 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
843
844 /* Update chainmask */
845 ath_update_chainmask(sc, bss_conf->assoc_ht);
846
847 DPRINTF(sc, ATH_DBG_CONFIG,
848 "%s: bssid %s aid 0x%x\n",
849 __func__,
850 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
851
852 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
853 __func__,
854 curchan->center_freq);
855
856 pos = ath_get_channel(sc, curchan);
857 if (pos == -1) {
858 DPRINTF(sc, ATH_DBG_FATAL,
859 "%s: Invalid channel\n", __func__);
860 return;
861 }
862
863 if (hw->conf.ht_conf.ht_supported)
864 sc->sc_ah->ah_channels[pos].chanmode =
865 ath_get_extchanmode(sc, curchan);
866 else
867 sc->sc_ah->ah_channels[pos].chanmode =
868 (curchan->band == IEEE80211_BAND_2GHZ) ?
869 CHANNEL_G : CHANNEL_A;
870
871 /* set h/w channel */
872 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
873 DPRINTF(sc, ATH_DBG_FATAL,
874 "%s: Unable to set channel\n",
875 __func__);
876
877 ath_rate_newstate(sc, avp);
878 /* Update ratectrl about the new state */
879 ath_rc_node_update(hw, avp->rc_node);
880 } else {
881 DPRINTF(sc, ATH_DBG_CONFIG,
882 "%s: Bss Info DISSOC\n", __func__);
883 sc->sc_curaid = 0;
884 }
885 }
886
887 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
888 struct ieee80211_vif *vif,
889 struct ieee80211_bss_conf *bss_conf,
890 u32 changed)
891 {
892 struct ath_softc *sc = hw->priv;
893
894 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
895 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
896 __func__,
897 bss_conf->use_short_preamble);
898 if (bss_conf->use_short_preamble)
899 sc->sc_flags |= ATH_PREAMBLE_SHORT;
900 else
901 sc->sc_flags &= ~ATH_PREAMBLE_SHORT;
902 }
903
904 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
905 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
906 __func__,
907 bss_conf->use_cts_prot);
908 if (bss_conf->use_cts_prot &&
909 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
910 sc->sc_flags |= ATH_PROTECT_ENABLE;
911 else
912 sc->sc_flags &= ~ATH_PROTECT_ENABLE;
913 }
914
915 if (changed & BSS_CHANGED_HT) {
916 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT %d\n",
917 __func__,
918 bss_conf->assoc_ht);
919 ath9k_ht_conf(sc, bss_conf);
920 }
921
922 if (changed & BSS_CHANGED_ASSOC) {
923 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
924 __func__,
925 bss_conf->assoc);
926 ath9k_bss_assoc_info(sc, bss_conf);
927 }
928 }
929
930 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
931 {
932 u64 tsf;
933 struct ath_softc *sc = hw->priv;
934 struct ath_hal *ah = sc->sc_ah;
935
936 tsf = ath9k_hw_gettsf64(ah);
937
938 return tsf;
939 }
940
941 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
942 {
943 struct ath_softc *sc = hw->priv;
944 struct ath_hal *ah = sc->sc_ah;
945
946 ath9k_hw_reset_tsf(ah);
947 }
948
949 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
950 enum ieee80211_ampdu_mlme_action action,
951 const u8 *addr,
952 u16 tid,
953 u16 *ssn)
954 {
955 struct ath_softc *sc = hw->priv;
956 int ret = 0;
957
958 switch (action) {
959 case IEEE80211_AMPDU_RX_START:
960 ret = ath_rx_aggr_start(sc, addr, tid, ssn);
961 if (ret < 0)
962 DPRINTF(sc, ATH_DBG_FATAL,
963 "%s: Unable to start RX aggregation\n",
964 __func__);
965 break;
966 case IEEE80211_AMPDU_RX_STOP:
967 ret = ath_rx_aggr_stop(sc, addr, tid);
968 if (ret < 0)
969 DPRINTF(sc, ATH_DBG_FATAL,
970 "%s: Unable to stop RX aggregation\n",
971 __func__);
972 break;
973 case IEEE80211_AMPDU_TX_START:
974 ret = ath_tx_aggr_start(sc, addr, tid, ssn);
975 if (ret < 0)
976 DPRINTF(sc, ATH_DBG_FATAL,
977 "%s: Unable to start TX aggregation\n",
978 __func__);
979 else
980 ieee80211_start_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
981 break;
982 case IEEE80211_AMPDU_TX_STOP:
983 ret = ath_tx_aggr_stop(sc, addr, tid);
984 if (ret < 0)
985 DPRINTF(sc, ATH_DBG_FATAL,
986 "%s: Unable to stop TX aggregation\n",
987 __func__);
988
989 ieee80211_stop_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
990 break;
991 default:
992 DPRINTF(sc, ATH_DBG_FATAL,
993 "%s: Unknown AMPDU action\n", __func__);
994 }
995
996 return ret;
997 }
998
999 static struct ieee80211_ops ath9k_ops = {
1000 .tx = ath9k_tx,
1001 .start = ath9k_start,
1002 .stop = ath9k_stop,
1003 .add_interface = ath9k_add_interface,
1004 .remove_interface = ath9k_remove_interface,
1005 .config = ath9k_config,
1006 .config_interface = ath9k_config_interface,
1007 .configure_filter = ath9k_configure_filter,
1008 .get_stats = NULL,
1009 .sta_notify = ath9k_sta_notify,
1010 .conf_tx = ath9k_conf_tx,
1011 .get_tx_stats = NULL,
1012 .bss_info_changed = ath9k_bss_info_changed,
1013 .set_tim = NULL,
1014 .set_key = ath9k_set_key,
1015 .hw_scan = NULL,
1016 .get_tkip_seq = NULL,
1017 .set_rts_threshold = NULL,
1018 .set_frag_threshold = NULL,
1019 .set_retry_limit = NULL,
1020 .get_tsf = ath9k_get_tsf,
1021 .reset_tsf = ath9k_reset_tsf,
1022 .tx_last_beacon = NULL,
1023 .ampdu_action = ath9k_ampdu_action
1024 };
1025
1026 void ath_get_beaconconfig(struct ath_softc *sc,
1027 int if_id,
1028 struct ath_beacon_config *conf)
1029 {
1030 struct ieee80211_hw *hw = sc->hw;
1031
1032 /* fill in beacon config data */
1033
1034 conf->beacon_interval = hw->conf.beacon_int;
1035 conf->listen_interval = 100;
1036 conf->dtim_count = 1;
1037 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
1038 }
1039
1040 int ath_update_beacon(struct ath_softc *sc,
1041 int if_id,
1042 struct ath_beacon_offset *bo,
1043 struct sk_buff *skb,
1044 int mcast)
1045 {
1046 return 0;
1047 }
1048
1049 void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
1050 struct ath_xmit_status *tx_status, struct ath_node *an)
1051 {
1052 struct ieee80211_hw *hw = sc->hw;
1053 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1054
1055 DPRINTF(sc, ATH_DBG_XMIT,
1056 "%s: TX complete: skb: %p\n", __func__, skb);
1057
1058 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
1059 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
1060 /* free driver's private data area of tx_info */
1061 if (tx_info->driver_data[0] != NULL)
1062 kfree(tx_info->driver_data[0]);
1063 tx_info->driver_data[0] = NULL;
1064 }
1065
1066 if (tx_status->flags & ATH_TX_BAR) {
1067 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
1068 tx_status->flags &= ~ATH_TX_BAR;
1069 }
1070 if (tx_status->flags)
1071 tx_info->status.excessive_retries = 1;
1072
1073 tx_info->status.retry_count = tx_status->retries;
1074
1075 ieee80211_tx_status(hw, skb);
1076 if (an)
1077 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
1078 }
1079
1080 int ath__rx_indicate(struct ath_softc *sc,
1081 struct sk_buff *skb,
1082 struct ath_recv_status *status,
1083 u16 keyix)
1084 {
1085 struct ieee80211_hw *hw = sc->hw;
1086 struct ath_node *an = NULL;
1087 struct ieee80211_rx_status rx_status;
1088 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1089 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1090 int padsize;
1091 enum ATH_RX_TYPE st;
1092
1093 /* see if any padding is done by the hw and remove it */
1094 if (hdrlen & 3) {
1095 padsize = hdrlen % 4;
1096 memmove(skb->data + padsize, skb->data, hdrlen);
1097 skb_pull(skb, padsize);
1098 }
1099
1100 /* remove FCS before passing up to protocol stack */
1101 skb_trim(skb, (skb->len - FCS_LEN));
1102
1103 /* Prepare rx status */
1104 ath9k_rx_prepare(sc, skb, status, &rx_status);
1105
1106 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
1107 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
1108 rx_status.flag |= RX_FLAG_DECRYPTED;
1109 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
1110 && !(status->flags & ATH_RX_DECRYPT_ERROR)
1111 && skb->len >= hdrlen + 4) {
1112 keyix = skb->data[hdrlen + 3] >> 6;
1113
1114 if (test_bit(keyix, sc->sc_keymap))
1115 rx_status.flag |= RX_FLAG_DECRYPTED;
1116 }
1117
1118 spin_lock_bh(&sc->node_lock);
1119 an = ath_node_find(sc, hdr->addr2);
1120 spin_unlock_bh(&sc->node_lock);
1121
1122 if (an) {
1123 ath_rx_input(sc, an,
1124 hw->conf.ht_conf.ht_supported,
1125 skb, status, &st);
1126 }
1127 if (!an || (st != ATH_RX_CONSUMED))
1128 __ieee80211_rx(hw, skb, &rx_status);
1129
1130 return 0;
1131 }
1132
1133 int ath_rx_subframe(struct ath_node *an,
1134 struct sk_buff *skb,
1135 struct ath_recv_status *status)
1136 {
1137 struct ath_softc *sc = an->an_sc;
1138 struct ieee80211_hw *hw = sc->hw;
1139 struct ieee80211_rx_status rx_status;
1140
1141 /* Prepare rx status */
1142 ath9k_rx_prepare(sc, skb, status, &rx_status);
1143 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
1144 rx_status.flag |= RX_FLAG_DECRYPTED;
1145
1146 __ieee80211_rx(hw, skb, &rx_status);
1147
1148 return 0;
1149 }
1150
1151 enum ath9k_ht_macmode ath_cwm_macmode(struct ath_softc *sc)
1152 {
1153 return sc->sc_ht_info.tx_chan_width;
1154 }
1155
1156 static int ath_detach(struct ath_softc *sc)
1157 {
1158 struct ieee80211_hw *hw = sc->hw;
1159
1160 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
1161
1162 /* Unregister hw */
1163
1164 ieee80211_unregister_hw(hw);
1165
1166 /* unregister Rate control */
1167 ath_rate_control_unregister();
1168
1169 /* tx/rx cleanup */
1170
1171 ath_rx_cleanup(sc);
1172 ath_tx_cleanup(sc);
1173
1174 /* Deinit */
1175
1176 ath_deinit(sc);
1177
1178 return 0;
1179 }
1180
1181 static int ath_attach(u16 devid,
1182 struct ath_softc *sc)
1183 {
1184 struct ieee80211_hw *hw = sc->hw;
1185 int error = 0;
1186
1187 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
1188
1189 error = ath_init(devid, sc);
1190 if (error != 0)
1191 return error;
1192
1193 /* Init nodes */
1194
1195 INIT_LIST_HEAD(&sc->node_list);
1196 spin_lock_init(&sc->node_lock);
1197
1198 /* get mac address from hardware and set in mac80211 */
1199
1200 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
1201
1202 /* setup channels and rates */
1203
1204 sc->sbands[IEEE80211_BAND_2GHZ].channels =
1205 sc->channels[IEEE80211_BAND_2GHZ];
1206 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
1207 sc->rates[IEEE80211_BAND_2GHZ];
1208 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
1209
1210 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
1211 /* Setup HT capabilities for 2.4Ghz*/
1212 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
1213
1214 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1215 &sc->sbands[IEEE80211_BAND_2GHZ];
1216
1217 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
1218 sc->sbands[IEEE80211_BAND_5GHZ].channels =
1219 sc->channels[IEEE80211_BAND_5GHZ];
1220 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
1221 sc->rates[IEEE80211_BAND_5GHZ];
1222 sc->sbands[IEEE80211_BAND_5GHZ].band =
1223 IEEE80211_BAND_5GHZ;
1224
1225 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
1226 /* Setup HT capabilities for 5Ghz*/
1227 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
1228
1229 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1230 &sc->sbands[IEEE80211_BAND_5GHZ];
1231 }
1232
1233 /* FIXME: Have to figure out proper hw init values later */
1234
1235 hw->queues = 4;
1236 hw->ampdu_queues = 1;
1237
1238 /* Register rate control */
1239 hw->rate_control_algorithm = "ath9k_rate_control";
1240 error = ath_rate_control_register();
1241 if (error != 0) {
1242 DPRINTF(sc, ATH_DBG_FATAL,
1243 "%s: Unable to register rate control "
1244 "algorithm:%d\n", __func__, error);
1245 ath_rate_control_unregister();
1246 goto bad;
1247 }
1248
1249 error = ieee80211_register_hw(hw);
1250 if (error != 0) {
1251 ath_rate_control_unregister();
1252 goto bad;
1253 }
1254
1255 /* initialize tx/rx engine */
1256
1257 error = ath_tx_init(sc, ATH_TXBUF);
1258 if (error != 0)
1259 goto bad1;
1260
1261 error = ath_rx_init(sc, ATH_RXBUF);
1262 if (error != 0)
1263 goto bad1;
1264
1265 return 0;
1266 bad1:
1267 ath_detach(sc);
1268 bad:
1269 return error;
1270 }
1271
1272 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1273 {
1274 void __iomem *mem;
1275 struct ath_softc *sc;
1276 struct ieee80211_hw *hw;
1277 const char *athname;
1278 u8 csz;
1279 u32 val;
1280 int ret = 0;
1281
1282 if (pci_enable_device(pdev))
1283 return -EIO;
1284
1285 /* XXX 32-bit addressing only */
1286 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1287 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1288 ret = -ENODEV;
1289 goto bad;
1290 }
1291
1292 /*
1293 * Cache line size is used to size and align various
1294 * structures used to communicate with the hardware.
1295 */
1296 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1297 if (csz == 0) {
1298 /*
1299 * Linux 2.4.18 (at least) writes the cache line size
1300 * register as a 16-bit wide register which is wrong.
1301 * We must have this setup properly for rx buffer
1302 * DMA to work so force a reasonable value here if it
1303 * comes up zero.
1304 */
1305 csz = L1_CACHE_BYTES / sizeof(u32);
1306 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1307 }
1308 /*
1309 * The default setting of latency timer yields poor results,
1310 * set it to the value used by other systems. It may be worth
1311 * tweaking this setting more.
1312 */
1313 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1314
1315 pci_set_master(pdev);
1316
1317 /*
1318 * Disable the RETRY_TIMEOUT register (0x41) to keep
1319 * PCI Tx retries from interfering with C3 CPU state.
1320 */
1321 pci_read_config_dword(pdev, 0x40, &val);
1322 if ((val & 0x0000ff00) != 0)
1323 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1324
1325 ret = pci_request_region(pdev, 0, "ath9k");
1326 if (ret) {
1327 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1328 ret = -ENODEV;
1329 goto bad;
1330 }
1331
1332 mem = pci_iomap(pdev, 0, 0);
1333 if (!mem) {
1334 printk(KERN_ERR "PCI memory map error\n") ;
1335 ret = -EIO;
1336 goto bad1;
1337 }
1338
1339 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1340 if (hw == NULL) {
1341 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1342 goto bad2;
1343 }
1344
1345 hw->flags = IEEE80211_HW_SIGNAL_DBM |
1346 IEEE80211_HW_NOISE_DBM;
1347
1348 SET_IEEE80211_DEV(hw, &pdev->dev);
1349 pci_set_drvdata(pdev, hw);
1350
1351 sc = hw->priv;
1352 sc->hw = hw;
1353 sc->pdev = pdev;
1354 sc->mem = mem;
1355
1356 if (ath_attach(id->device, sc) != 0) {
1357 ret = -ENODEV;
1358 goto bad3;
1359 }
1360
1361 /* setup interrupt service routine */
1362
1363 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1364 printk(KERN_ERR "%s: request_irq failed\n",
1365 wiphy_name(hw->wiphy));
1366 ret = -EIO;
1367 goto bad4;
1368 }
1369
1370 athname = ath9k_hw_probe(id->vendor, id->device);
1371
1372 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1373 wiphy_name(hw->wiphy),
1374 athname ? athname : "Atheros ???",
1375 (unsigned long)mem, pdev->irq);
1376
1377 return 0;
1378 bad4:
1379 ath_detach(sc);
1380 bad3:
1381 ieee80211_free_hw(hw);
1382 bad2:
1383 pci_iounmap(pdev, mem);
1384 bad1:
1385 pci_release_region(pdev, 0);
1386 bad:
1387 pci_disable_device(pdev);
1388 return ret;
1389 }
1390
1391 static void ath_pci_remove(struct pci_dev *pdev)
1392 {
1393 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1394 struct ath_softc *sc = hw->priv;
1395
1396 if (pdev->irq)
1397 free_irq(pdev->irq, sc);
1398 ath_detach(sc);
1399 pci_iounmap(pdev, sc->mem);
1400 pci_release_region(pdev, 0);
1401 pci_disable_device(pdev);
1402 ieee80211_free_hw(hw);
1403 }
1404
1405 #ifdef CONFIG_PM
1406
1407 static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1408 {
1409 pci_save_state(pdev);
1410 pci_disable_device(pdev);
1411 pci_set_power_state(pdev, 3);
1412
1413 return 0;
1414 }
1415
1416 static int ath_pci_resume(struct pci_dev *pdev)
1417 {
1418 u32 val;
1419 int err;
1420
1421 err = pci_enable_device(pdev);
1422 if (err)
1423 return err;
1424 pci_restore_state(pdev);
1425 /*
1426 * Suspend/Resume resets the PCI configuration space, so we have to
1427 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1428 * PCI Tx retries from interfering with C3 CPU state
1429 */
1430 pci_read_config_dword(pdev, 0x40, &val);
1431 if ((val & 0x0000ff00) != 0)
1432 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1433
1434 return 0;
1435 }
1436
1437 #endif /* CONFIG_PM */
1438
1439 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1440
1441 static struct pci_driver ath_pci_driver = {
1442 .name = "ath9k",
1443 .id_table = ath_pci_id_table,
1444 .probe = ath_pci_probe,
1445 .remove = ath_pci_remove,
1446 #ifdef CONFIG_PM
1447 .suspend = ath_pci_suspend,
1448 .resume = ath_pci_resume,
1449 #endif /* CONFIG_PM */
1450 };
1451
1452 static int __init init_ath_pci(void)
1453 {
1454 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1455
1456 if (pci_register_driver(&ath_pci_driver) < 0) {
1457 printk(KERN_ERR
1458 "ath_pci: No devices found, driver not installed.\n");
1459 pci_unregister_driver(&ath_pci_driver);
1460 return -ENODEV;
1461 }
1462
1463 return 0;
1464 }
1465 module_init(init_ath_pci);
1466
1467 static void __exit exit_ath_pci(void)
1468 {
1469 pci_unregister_driver(&ath_pci_driver);
1470 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1471 }
1472 module_exit(exit_ath_pci);
Linux kernel - Deliverables
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