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ath9k: Assign seq# when mac80211 requests this
[deliverable/linux.git] / drivers / net / wireless / ath9k / main.c
1 /*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 /* mac80211 and PCI callbacks */
18
19 #include <linux/nl80211.h>
20 #include "core.h"
21
22 #define ATH_PCI_VERSION "0.1"
23
24 #define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
25 #define IEEE80211_ACTION_CAT_HT 7
26 #define IEEE80211_ACTION_HT_TXCHWIDTH 0
27
28 static char *dev_info = "ath9k";
29
30 MODULE_AUTHOR("Atheros Communications");
31 MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
32 MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
33 MODULE_LICENSE("Dual BSD/GPL");
34
35 static struct pci_device_id ath_pci_id_table[] __devinitdata = {
36 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
38 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
39 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
40 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
41 { 0 }
42 };
43
44 static int ath_get_channel(struct ath_softc *sc,
45 struct ieee80211_channel *chan)
46 {
47 int i;
48
49 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
50 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
51 return i;
52 }
53
54 return -1;
55 }
56
57 static u32 ath_get_extchanmode(struct ath_softc *sc,
58 struct ieee80211_channel *chan)
59 {
60 u32 chanmode = 0;
61 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
62 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
63
64 switch (chan->band) {
65 case IEEE80211_BAND_2GHZ:
66 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
67 (tx_chan_width == ATH9K_HT_MACMODE_20))
68 chanmode = CHANNEL_G_HT20;
69 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
70 (tx_chan_width == ATH9K_HT_MACMODE_2040))
71 chanmode = CHANNEL_G_HT40PLUS;
72 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
73 (tx_chan_width == ATH9K_HT_MACMODE_2040))
74 chanmode = CHANNEL_G_HT40MINUS;
75 break;
76 case IEEE80211_BAND_5GHZ:
77 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
78 (tx_chan_width == ATH9K_HT_MACMODE_20))
79 chanmode = CHANNEL_A_HT20;
80 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
81 (tx_chan_width == ATH9K_HT_MACMODE_2040))
82 chanmode = CHANNEL_A_HT40PLUS;
83 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
84 (tx_chan_width == ATH9K_HT_MACMODE_2040))
85 chanmode = CHANNEL_A_HT40MINUS;
86 break;
87 default:
88 break;
89 }
90
91 return chanmode;
92 }
93
94
95 static int ath_setkey_tkip(struct ath_softc *sc,
96 struct ieee80211_key_conf *key,
97 struct ath9k_keyval *hk,
98 const u8 *addr)
99 {
100 u8 *key_rxmic = NULL;
101 u8 *key_txmic = NULL;
102
103 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
104 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
105
106 if (addr == NULL) {
107 /* Group key installation */
108 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
109 return ath_keyset(sc, key->keyidx, hk, addr);
110 }
111 if (!sc->sc_splitmic) {
112 /*
113 * data key goes at first index,
114 * the hal handles the MIC keys at index+64.
115 */
116 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
117 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
118 return ath_keyset(sc, key->keyidx, hk, addr);
119 }
120 /*
121 * TX key goes at first index, RX key at +32.
122 * The hal handles the MIC keys at index+64.
123 */
124 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
125 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
126 /* Txmic entry failed. No need to proceed further */
127 DPRINTF(sc, ATH_DBG_KEYCACHE,
128 "%s Setting TX MIC Key Failed\n", __func__);
129 return 0;
130 }
131
132 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
133 /* XXX delete tx key on failure? */
134 return ath_keyset(sc, key->keyidx+32, hk, addr);
135 }
136
137 static int ath_key_config(struct ath_softc *sc,
138 const u8 *addr,
139 struct ieee80211_key_conf *key)
140 {
141 struct ieee80211_vif *vif;
142 struct ath9k_keyval hk;
143 const u8 *mac = NULL;
144 int ret = 0;
145 enum ieee80211_if_types opmode;
146
147 memset(&hk, 0, sizeof(hk));
148
149 switch (key->alg) {
150 case ALG_WEP:
151 hk.kv_type = ATH9K_CIPHER_WEP;
152 break;
153 case ALG_TKIP:
154 hk.kv_type = ATH9K_CIPHER_TKIP;
155 break;
156 case ALG_CCMP:
157 hk.kv_type = ATH9K_CIPHER_AES_CCM;
158 break;
159 default:
160 return -EINVAL;
161 }
162
163 hk.kv_len = key->keylen;
164 memcpy(hk.kv_val, key->key, key->keylen);
165
166 if (!sc->sc_vaps[0])
167 return -EIO;
168
169 vif = sc->sc_vaps[0]->av_if_data;
170 opmode = vif->type;
171
172 /*
173 * Strategy:
174 * For _M_STA mc tx, we will not setup a key at all since we never
175 * tx mc.
176 * _M_STA mc rx, we will use the keyID.
177 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
178 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
179 * peer node. BUT we will plumb a cleartext key so that we can do
180 * perSta default key table lookup in software.
181 */
182 if (is_broadcast_ether_addr(addr)) {
183 switch (opmode) {
184 case IEEE80211_IF_TYPE_STA:
185 /* default key: could be group WPA key
186 * or could be static WEP key */
187 mac = NULL;
188 break;
189 case IEEE80211_IF_TYPE_IBSS:
190 break;
191 case IEEE80211_IF_TYPE_AP:
192 break;
193 default:
194 ASSERT(0);
195 break;
196 }
197 } else {
198 mac = addr;
199 }
200
201 if (key->alg == ALG_TKIP)
202 ret = ath_setkey_tkip(sc, key, &hk, mac);
203 else
204 ret = ath_keyset(sc, key->keyidx, &hk, mac);
205
206 if (!ret)
207 return -EIO;
208
209 if (mac)
210 sc->sc_keytype = hk.kv_type;
211 return 0;
212 }
213
214 static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
215 {
216 #define ATH_MAX_NUM_KEYS 4
217 int freeslot;
218
219 freeslot = (key->keyidx >= ATH_MAX_NUM_KEYS) ? 1 : 0;
220 ath_key_reset(sc, key->keyidx, freeslot);
221 #undef ATH_MAX_NUM_KEYS
222 }
223
224 static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
225 {
226 /* Until mac80211 includes these fields */
227
228 #define IEEE80211_HT_CAP_DSSSCCK40 0x1000
229 #define IEEE80211_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
230 #define IEEE80211_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
231
232 ht_info->ht_supported = 1;
233 ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
234 |(u16)IEEE80211_HT_CAP_MIMO_PS
235 |(u16)IEEE80211_HT_CAP_SGI_40
236 |(u16)IEEE80211_HT_CAP_DSSSCCK40;
237
238 ht_info->ampdu_factor = IEEE80211_HT_CAP_MAXRXAMPDU_65536;
239 ht_info->ampdu_density = IEEE80211_HT_CAP_MPDUDENSITY_8;
240 /* setup supported mcs set */
241 memset(ht_info->supp_mcs_set, 0, 16);
242 ht_info->supp_mcs_set[0] = 0xff;
243 ht_info->supp_mcs_set[1] = 0xff;
244 ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
245 }
246
247 static int ath_rate2idx(struct ath_softc *sc, int rate)
248 {
249 int i = 0, cur_band, n_rates;
250 struct ieee80211_hw *hw = sc->hw;
251
252 cur_band = hw->conf.channel->band;
253 n_rates = sc->sbands[cur_band].n_bitrates;
254
255 for (i = 0; i < n_rates; i++) {
256 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
257 break;
258 }
259
260 /*
261 * NB:mac80211 validates rx rate index against the supported legacy rate
262 * index only (should be done against ht rates also), return the highest
263 * legacy rate index for rx rate which does not match any one of the
264 * supported basic and extended rates to make mac80211 happy.
265 * The following hack will be cleaned up once the issue with
266 * the rx rate index validation in mac80211 is fixed.
267 */
268 if (i == n_rates)
269 return n_rates - 1;
270 return i;
271 }
272
273 static void ath9k_rx_prepare(struct ath_softc *sc,
274 struct sk_buff *skb,
275 struct ath_recv_status *status,
276 struct ieee80211_rx_status *rx_status)
277 {
278 struct ieee80211_hw *hw = sc->hw;
279 struct ieee80211_channel *curchan = hw->conf.channel;
280
281 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
282
283 rx_status->mactime = status->tsf;
284 rx_status->band = curchan->band;
285 rx_status->freq = curchan->center_freq;
286 rx_status->noise = ATH_DEFAULT_NOISE_FLOOR;
287 rx_status->signal = rx_status->noise + status->rssi;
288 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
289 rx_status->antenna = status->antenna;
290 rx_status->qual = status->rssi * 100 / 64;
291
292 if (status->flags & ATH_RX_MIC_ERROR)
293 rx_status->flag |= RX_FLAG_MMIC_ERROR;
294 if (status->flags & ATH_RX_FCS_ERROR)
295 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
296
297 rx_status->flag |= RX_FLAG_TSFT;
298 }
299
300 static u8 parse_mpdudensity(u8 mpdudensity)
301 {
302 /*
303 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
304 * 0 for no restriction
305 * 1 for 1/4 us
306 * 2 for 1/2 us
307 * 3 for 1 us
308 * 4 for 2 us
309 * 5 for 4 us
310 * 6 for 8 us
311 * 7 for 16 us
312 */
313 switch (mpdudensity) {
314 case 0:
315 return 0;
316 case 1:
317 case 2:
318 case 3:
319 /* Our lower layer calculations limit our precision to
320 1 microsecond */
321 return 1;
322 case 4:
323 return 2;
324 case 5:
325 return 4;
326 case 6:
327 return 8;
328 case 7:
329 return 16;
330 default:
331 return 0;
332 }
333 }
334
335 static int ath9k_start(struct ieee80211_hw *hw)
336 {
337 struct ath_softc *sc = hw->priv;
338 struct ieee80211_channel *curchan = hw->conf.channel;
339 int error = 0, pos;
340
341 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
342 "initial channel: %d MHz\n", __func__, curchan->center_freq);
343
344 /* setup initial channel */
345
346 pos = ath_get_channel(sc, curchan);
347 if (pos == -1) {
348 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
349 return -EINVAL;
350 }
351
352 sc->sc_ah->ah_channels[pos].chanmode =
353 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
354
355 /* open ath_dev */
356 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
357 if (error) {
358 DPRINTF(sc, ATH_DBG_FATAL,
359 "%s: Unable to complete ath_open\n", __func__);
360 return error;
361 }
362
363 ieee80211_wake_queues(hw);
364 return 0;
365 }
366
367 static int ath9k_tx(struct ieee80211_hw *hw,
368 struct sk_buff *skb)
369 {
370 struct ath_softc *sc = hw->priv;
371 int hdrlen, padsize;
372 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
373
374 /*
375 * As a temporary workaround, assign seq# here; this will likely need
376 * to be cleaned up to work better with Beacon transmission and virtual
377 * BSSes.
378 */
379 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
380 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
381 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
382 sc->seq_no += 0x10;
383 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
384 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
385 }
386
387 /* Add the padding after the header if this is not already done */
388 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
389 if (hdrlen & 3) {
390 padsize = hdrlen % 4;
391 if (skb_headroom(skb) < padsize)
392 return -1;
393 skb_push(skb, padsize);
394 memmove(skb->data, skb->data + padsize, hdrlen);
395 }
396
397 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
398 __func__,
399 skb);
400
401 if (ath_tx_start(sc, skb) != 0) {
402 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
403 dev_kfree_skb_any(skb);
404 /* FIXME: Check for proper return value from ATH_DEV */
405 return 0;
406 }
407
408 return 0;
409 }
410
411 static void ath9k_stop(struct ieee80211_hw *hw)
412 {
413 struct ath_softc *sc = hw->priv;
414 int error;
415
416 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
417
418 error = ath_suspend(sc);
419 if (error)
420 DPRINTF(sc, ATH_DBG_CONFIG,
421 "%s: Device is no longer present\n", __func__);
422
423 ieee80211_stop_queues(hw);
424 }
425
426 static int ath9k_add_interface(struct ieee80211_hw *hw,
427 struct ieee80211_if_init_conf *conf)
428 {
429 struct ath_softc *sc = hw->priv;
430 int error, ic_opmode = 0;
431
432 /* Support only vap for now */
433
434 if (sc->sc_nvaps)
435 return -ENOBUFS;
436
437 switch (conf->type) {
438 case IEEE80211_IF_TYPE_STA:
439 ic_opmode = ATH9K_M_STA;
440 break;
441 case IEEE80211_IF_TYPE_IBSS:
442 ic_opmode = ATH9K_M_IBSS;
443 break;
444 default:
445 DPRINTF(sc, ATH_DBG_FATAL,
446 "%s: Only STA and IBSS are supported currently\n",
447 __func__);
448 return -EOPNOTSUPP;
449 }
450
451 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
452 __func__,
453 ic_opmode);
454
455 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
456 if (error) {
457 DPRINTF(sc, ATH_DBG_FATAL,
458 "%s: Unable to attach vap, error: %d\n",
459 __func__, error);
460 return error;
461 }
462
463 return 0;
464 }
465
466 static void ath9k_remove_interface(struct ieee80211_hw *hw,
467 struct ieee80211_if_init_conf *conf)
468 {
469 struct ath_softc *sc = hw->priv;
470 struct ath_vap *avp;
471 int error;
472
473 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
474
475 avp = sc->sc_vaps[0];
476 if (avp == NULL) {
477 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
478 __func__);
479 return;
480 }
481
482 #ifdef CONFIG_SLOW_ANT_DIV
483 ath_slow_ant_div_stop(&sc->sc_antdiv);
484 #endif
485
486 /* Update ratectrl */
487 ath_rate_newstate(sc, avp);
488
489 /* Reclaim beacon resources */
490 if (sc->sc_opmode == ATH9K_M_HOSTAP || sc->sc_opmode == ATH9K_M_IBSS) {
491 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
492 ath_beacon_return(sc, avp);
493 }
494
495 /* Set interrupt mask */
496 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
497 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
498 sc->sc_beacons = 0;
499
500 error = ath_vap_detach(sc, 0);
501 if (error)
502 DPRINTF(sc, ATH_DBG_FATAL,
503 "%s: Unable to detach vap, error: %d\n",
504 __func__, error);
505 }
506
507 static int ath9k_config(struct ieee80211_hw *hw,
508 struct ieee80211_conf *conf)
509 {
510 struct ath_softc *sc = hw->priv;
511 struct ieee80211_channel *curchan = hw->conf.channel;
512 int pos;
513
514 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
515 __func__,
516 curchan->center_freq);
517
518 pos = ath_get_channel(sc, curchan);
519 if (pos == -1) {
520 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
521 return -EINVAL;
522 }
523
524 sc->sc_ah->ah_channels[pos].chanmode =
525 (curchan->band == IEEE80211_BAND_2GHZ) ?
526 CHANNEL_G : CHANNEL_A;
527
528 if (sc->sc_curaid && hw->conf.ht_conf.ht_supported)
529 sc->sc_ah->ah_channels[pos].chanmode =
530 ath_get_extchanmode(sc, curchan);
531
532 sc->sc_config.txpowlimit = 2 * conf->power_level;
533
534 /* set h/w channel */
535 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
536 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
537 __func__);
538
539 return 0;
540 }
541
542 static int ath9k_config_interface(struct ieee80211_hw *hw,
543 struct ieee80211_vif *vif,
544 struct ieee80211_if_conf *conf)
545 {
546 struct ath_softc *sc = hw->priv;
547 struct ath_vap *avp;
548 u32 rfilt = 0;
549 int error, i;
550 DECLARE_MAC_BUF(mac);
551
552 avp = sc->sc_vaps[0];
553 if (avp == NULL) {
554 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
555 __func__);
556 return -EINVAL;
557 }
558
559 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
560 !is_zero_ether_addr(conf->bssid)) {
561 switch (vif->type) {
562 case IEEE80211_IF_TYPE_STA:
563 case IEEE80211_IF_TYPE_IBSS:
564 /* Update ratectrl about the new state */
565 ath_rate_newstate(sc, avp);
566
567 /* Set rx filter */
568 rfilt = ath_calcrxfilter(sc);
569 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
570
571 /* Set BSSID */
572 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
573 sc->sc_curaid = 0;
574 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
575 sc->sc_curaid);
576
577 /* Set aggregation protection mode parameters */
578 sc->sc_config.ath_aggr_prot = 0;
579
580 /*
581 * Reset our TSF so that its value is lower than the
582 * beacon that we are trying to catch.
583 * Only then hw will update its TSF register with the
584 * new beacon. Reset the TSF before setting the BSSID
585 * to avoid allowing in any frames that would update
586 * our TSF only to have us clear it
587 * immediately thereafter.
588 */
589 ath9k_hw_reset_tsf(sc->sc_ah);
590
591 /* Disable BMISS interrupt when we're not associated */
592 ath9k_hw_set_interrupts(sc->sc_ah,
593 sc->sc_imask &
594 ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
595 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
596
597 DPRINTF(sc, ATH_DBG_CONFIG,
598 "%s: RX filter 0x%x bssid %s aid 0x%x\n",
599 __func__, rfilt,
600 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
601
602 /* need to reconfigure the beacon */
603 sc->sc_beacons = 0;
604
605 break;
606 default:
607 break;
608 }
609 }
610
611 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
612 (vif->type == IEEE80211_IF_TYPE_IBSS)) {
613 /*
614 * Allocate and setup the beacon frame.
615 *
616 * Stop any previous beacon DMA. This may be
617 * necessary, for example, when an ibss merge
618 * causes reconfiguration; we may be called
619 * with beacon transmission active.
620 */
621 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
622
623 error = ath_beacon_alloc(sc, 0);
624 if (error != 0)
625 return error;
626
627 ath_beacon_sync(sc, 0);
628 }
629
630 /* Check for WLAN_CAPABILITY_PRIVACY ? */
631 if ((avp->av_opmode != IEEE80211_IF_TYPE_STA)) {
632 for (i = 0; i < IEEE80211_WEP_NKID; i++)
633 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
634 ath9k_hw_keysetmac(sc->sc_ah,
635 (u16)i,
636 sc->sc_curbssid);
637 }
638
639 /* Only legacy IBSS for now */
640 if (vif->type == IEEE80211_IF_TYPE_IBSS)
641 ath_update_chainmask(sc, 0);
642
643 return 0;
644 }
645
646 #define SUPPORTED_FILTERS \
647 (FIF_PROMISC_IN_BSS | \
648 FIF_ALLMULTI | \
649 FIF_CONTROL | \
650 FIF_OTHER_BSS | \
651 FIF_BCN_PRBRESP_PROMISC | \
652 FIF_FCSFAIL)
653
654 /* Accept unicast, bcast and mcast frames */
655
656 static void ath9k_configure_filter(struct ieee80211_hw *hw,
657 unsigned int changed_flags,
658 unsigned int *total_flags,
659 int mc_count,
660 struct dev_mc_list *mclist)
661 {
662 struct ath_softc *sc = hw->priv;
663
664 changed_flags &= SUPPORTED_FILTERS;
665 *total_flags &= SUPPORTED_FILTERS;
666
667 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
668 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
669 ath_scan_start(sc);
670 else
671 ath_scan_end(sc);
672 }
673 }
674
675 static void ath9k_sta_notify(struct ieee80211_hw *hw,
676 struct ieee80211_vif *vif,
677 enum sta_notify_cmd cmd,
678 const u8 *addr)
679 {
680 struct ath_softc *sc = hw->priv;
681 struct ath_node *an;
682 unsigned long flags;
683 DECLARE_MAC_BUF(mac);
684
685 spin_lock_irqsave(&sc->node_lock, flags);
686 an = ath_node_find(sc, (u8 *) addr);
687 spin_unlock_irqrestore(&sc->node_lock, flags);
688
689 switch (cmd) {
690 case STA_NOTIFY_ADD:
691 spin_lock_irqsave(&sc->node_lock, flags);
692 if (!an) {
693 ath_node_attach(sc, (u8 *)addr, 0);
694 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %s\n",
695 __func__,
696 print_mac(mac, addr));
697 } else {
698 ath_node_get(sc, (u8 *)addr);
699 }
700 spin_unlock_irqrestore(&sc->node_lock, flags);
701 break;
702 case STA_NOTIFY_REMOVE:
703 if (!an)
704 DPRINTF(sc, ATH_DBG_FATAL,
705 "%s: Removal of a non-existent node\n",
706 __func__);
707 else {
708 ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
709 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %s\n",
710 __func__,
711 print_mac(mac, addr));
712 }
713 break;
714 default:
715 break;
716 }
717 }
718
719 static int ath9k_conf_tx(struct ieee80211_hw *hw,
720 u16 queue,
721 const struct ieee80211_tx_queue_params *params)
722 {
723 struct ath_softc *sc = hw->priv;
724 struct ath9k_tx_queue_info qi;
725 int ret = 0, qnum;
726
727 if (queue >= WME_NUM_AC)
728 return 0;
729
730 qi.tqi_aifs = params->aifs;
731 qi.tqi_cwmin = params->cw_min;
732 qi.tqi_cwmax = params->cw_max;
733 qi.tqi_burstTime = params->txop;
734 qnum = ath_get_hal_qnum(queue, sc);
735
736 DPRINTF(sc, ATH_DBG_CONFIG,
737 "%s: Configure tx [queue/halq] [%d/%d], "
738 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
739 __func__,
740 queue,
741 qnum,
742 params->aifs,
743 params->cw_min,
744 params->cw_max,
745 params->txop);
746
747 ret = ath_txq_update(sc, qnum, &qi);
748 if (ret)
749 DPRINTF(sc, ATH_DBG_FATAL,
750 "%s: TXQ Update failed\n", __func__);
751
752 return ret;
753 }
754
755 static int ath9k_set_key(struct ieee80211_hw *hw,
756 enum set_key_cmd cmd,
757 const u8 *local_addr,
758 const u8 *addr,
759 struct ieee80211_key_conf *key)
760 {
761 struct ath_softc *sc = hw->priv;
762 int ret = 0;
763
764 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
765
766 switch (cmd) {
767 case SET_KEY:
768 ret = ath_key_config(sc, addr, key);
769 if (!ret) {
770 set_bit(key->keyidx, sc->sc_keymap);
771 key->hw_key_idx = key->keyidx;
772 /* push IV and Michael MIC generation to stack */
773 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
774 if (key->alg == ALG_TKIP)
775 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
776 }
777 break;
778 case DISABLE_KEY:
779 ath_key_delete(sc, key);
780 clear_bit(key->keyidx, sc->sc_keymap);
781 sc->sc_keytype = ATH9K_CIPHER_CLR;
782 break;
783 default:
784 ret = -EINVAL;
785 }
786
787 return ret;
788 }
789
790 static void ath9k_ht_conf(struct ath_softc *sc,
791 struct ieee80211_bss_conf *bss_conf)
792 {
793 #define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
794 struct ath_ht_info *ht_info = &sc->sc_ht_info;
795
796 if (bss_conf->assoc_ht) {
797 ht_info->ext_chan_offset =
798 bss_conf->ht_bss_conf->bss_cap &
799 IEEE80211_HT_IE_CHA_SEC_OFFSET;
800
801 if (!(bss_conf->ht_conf->cap &
802 IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
803 (bss_conf->ht_bss_conf->bss_cap &
804 IEEE80211_HT_IE_CHA_WIDTH))
805 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
806 else
807 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
808
809 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
810 ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
811 bss_conf->ht_conf->ampdu_factor);
812 ht_info->mpdudensity =
813 parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
814
815 }
816
817 #undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
818 }
819
820 static void ath9k_bss_assoc_info(struct ath_softc *sc,
821 struct ieee80211_bss_conf *bss_conf)
822 {
823 struct ieee80211_hw *hw = sc->hw;
824 struct ieee80211_channel *curchan = hw->conf.channel;
825 struct ath_vap *avp;
826 int pos;
827 DECLARE_MAC_BUF(mac);
828
829 if (bss_conf->assoc) {
830 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
831 __func__,
832 bss_conf->aid);
833
834 avp = sc->sc_vaps[0];
835 if (avp == NULL) {
836 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
837 __func__);
838 return;
839 }
840
841 /* New association, store aid */
842 if (avp->av_opmode == ATH9K_M_STA) {
843 sc->sc_curaid = bss_conf->aid;
844 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
845 sc->sc_curaid);
846 }
847
848 /* Configure the beacon */
849 ath_beacon_config(sc, 0);
850 sc->sc_beacons = 1;
851
852 /* Reset rssi stats */
853 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
854 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
855 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
856 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
857
858 /* Update chainmask */
859 ath_update_chainmask(sc, bss_conf->assoc_ht);
860
861 DPRINTF(sc, ATH_DBG_CONFIG,
862 "%s: bssid %s aid 0x%x\n",
863 __func__,
864 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
865
866 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
867 __func__,
868 curchan->center_freq);
869
870 pos = ath_get_channel(sc, curchan);
871 if (pos == -1) {
872 DPRINTF(sc, ATH_DBG_FATAL,
873 "%s: Invalid channel\n", __func__);
874 return;
875 }
876
877 if (hw->conf.ht_conf.ht_supported)
878 sc->sc_ah->ah_channels[pos].chanmode =
879 ath_get_extchanmode(sc, curchan);
880 else
881 sc->sc_ah->ah_channels[pos].chanmode =
882 (curchan->band == IEEE80211_BAND_2GHZ) ?
883 CHANNEL_G : CHANNEL_A;
884
885 /* set h/w channel */
886 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
887 DPRINTF(sc, ATH_DBG_FATAL,
888 "%s: Unable to set channel\n",
889 __func__);
890
891 ath_rate_newstate(sc, avp);
892 /* Update ratectrl about the new state */
893 ath_rc_node_update(hw, avp->rc_node);
894 } else {
895 DPRINTF(sc, ATH_DBG_CONFIG,
896 "%s: Bss Info DISSOC\n", __func__);
897 sc->sc_curaid = 0;
898 }
899 }
900
901 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
902 struct ieee80211_vif *vif,
903 struct ieee80211_bss_conf *bss_conf,
904 u32 changed)
905 {
906 struct ath_softc *sc = hw->priv;
907
908 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
909 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
910 __func__,
911 bss_conf->use_short_preamble);
912 if (bss_conf->use_short_preamble)
913 sc->sc_flags |= ATH_PREAMBLE_SHORT;
914 else
915 sc->sc_flags &= ~ATH_PREAMBLE_SHORT;
916 }
917
918 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
919 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
920 __func__,
921 bss_conf->use_cts_prot);
922 if (bss_conf->use_cts_prot &&
923 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
924 sc->sc_flags |= ATH_PROTECT_ENABLE;
925 else
926 sc->sc_flags &= ~ATH_PROTECT_ENABLE;
927 }
928
929 if (changed & BSS_CHANGED_HT) {
930 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT %d\n",
931 __func__,
932 bss_conf->assoc_ht);
933 ath9k_ht_conf(sc, bss_conf);
934 }
935
936 if (changed & BSS_CHANGED_ASSOC) {
937 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
938 __func__,
939 bss_conf->assoc);
940 ath9k_bss_assoc_info(sc, bss_conf);
941 }
942 }
943
944 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
945 {
946 u64 tsf;
947 struct ath_softc *sc = hw->priv;
948 struct ath_hal *ah = sc->sc_ah;
949
950 tsf = ath9k_hw_gettsf64(ah);
951
952 return tsf;
953 }
954
955 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
956 {
957 struct ath_softc *sc = hw->priv;
958 struct ath_hal *ah = sc->sc_ah;
959
960 ath9k_hw_reset_tsf(ah);
961 }
962
963 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
964 enum ieee80211_ampdu_mlme_action action,
965 const u8 *addr,
966 u16 tid,
967 u16 *ssn)
968 {
969 struct ath_softc *sc = hw->priv;
970 int ret = 0;
971
972 switch (action) {
973 case IEEE80211_AMPDU_RX_START:
974 ret = ath_rx_aggr_start(sc, addr, tid, ssn);
975 if (ret < 0)
976 DPRINTF(sc, ATH_DBG_FATAL,
977 "%s: Unable to start RX aggregation\n",
978 __func__);
979 break;
980 case IEEE80211_AMPDU_RX_STOP:
981 ret = ath_rx_aggr_stop(sc, addr, tid);
982 if (ret < 0)
983 DPRINTF(sc, ATH_DBG_FATAL,
984 "%s: Unable to stop RX aggregation\n",
985 __func__);
986 break;
987 case IEEE80211_AMPDU_TX_START:
988 ret = ath_tx_aggr_start(sc, addr, tid, ssn);
989 if (ret < 0)
990 DPRINTF(sc, ATH_DBG_FATAL,
991 "%s: Unable to start TX aggregation\n",
992 __func__);
993 else
994 ieee80211_start_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
995 break;
996 case IEEE80211_AMPDU_TX_STOP:
997 ret = ath_tx_aggr_stop(sc, addr, tid);
998 if (ret < 0)
999 DPRINTF(sc, ATH_DBG_FATAL,
1000 "%s: Unable to stop TX aggregation\n",
1001 __func__);
1002
1003 ieee80211_stop_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
1004 break;
1005 default:
1006 DPRINTF(sc, ATH_DBG_FATAL,
1007 "%s: Unknown AMPDU action\n", __func__);
1008 }
1009
1010 return ret;
1011 }
1012
1013 static struct ieee80211_ops ath9k_ops = {
1014 .tx = ath9k_tx,
1015 .start = ath9k_start,
1016 .stop = ath9k_stop,
1017 .add_interface = ath9k_add_interface,
1018 .remove_interface = ath9k_remove_interface,
1019 .config = ath9k_config,
1020 .config_interface = ath9k_config_interface,
1021 .configure_filter = ath9k_configure_filter,
1022 .get_stats = NULL,
1023 .sta_notify = ath9k_sta_notify,
1024 .conf_tx = ath9k_conf_tx,
1025 .get_tx_stats = NULL,
1026 .bss_info_changed = ath9k_bss_info_changed,
1027 .set_tim = NULL,
1028 .set_key = ath9k_set_key,
1029 .hw_scan = NULL,
1030 .get_tkip_seq = NULL,
1031 .set_rts_threshold = NULL,
1032 .set_frag_threshold = NULL,
1033 .set_retry_limit = NULL,
1034 .get_tsf = ath9k_get_tsf,
1035 .reset_tsf = ath9k_reset_tsf,
1036 .tx_last_beacon = NULL,
1037 .ampdu_action = ath9k_ampdu_action
1038 };
1039
1040 void ath_get_beaconconfig(struct ath_softc *sc,
1041 int if_id,
1042 struct ath_beacon_config *conf)
1043 {
1044 struct ieee80211_hw *hw = sc->hw;
1045
1046 /* fill in beacon config data */
1047
1048 conf->beacon_interval = hw->conf.beacon_int;
1049 conf->listen_interval = 100;
1050 conf->dtim_count = 1;
1051 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
1052 }
1053
1054 int ath_update_beacon(struct ath_softc *sc,
1055 int if_id,
1056 struct ath_beacon_offset *bo,
1057 struct sk_buff *skb,
1058 int mcast)
1059 {
1060 return 0;
1061 }
1062
1063 void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
1064 struct ath_xmit_status *tx_status, struct ath_node *an)
1065 {
1066 struct ieee80211_hw *hw = sc->hw;
1067 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1068
1069 DPRINTF(sc, ATH_DBG_XMIT,
1070 "%s: TX complete: skb: %p\n", __func__, skb);
1071
1072 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
1073 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
1074 /* free driver's private data area of tx_info */
1075 if (tx_info->driver_data[0] != NULL)
1076 kfree(tx_info->driver_data[0]);
1077 tx_info->driver_data[0] = NULL;
1078 }
1079
1080 if (tx_status->flags & ATH_TX_BAR) {
1081 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
1082 tx_status->flags &= ~ATH_TX_BAR;
1083 }
1084
1085 if (tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY)) {
1086 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) {
1087 /* Frame was not ACKed, but an ACK was expected */
1088 tx_info->status.excessive_retries = 1;
1089 }
1090 } else {
1091 /* Frame was ACKed */
1092 tx_info->flags |= IEEE80211_TX_STAT_ACK;
1093 }
1094
1095 tx_info->status.retry_count = tx_status->retries;
1096
1097 ieee80211_tx_status(hw, skb);
1098 if (an)
1099 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
1100 }
1101
1102 int ath__rx_indicate(struct ath_softc *sc,
1103 struct sk_buff *skb,
1104 struct ath_recv_status *status,
1105 u16 keyix)
1106 {
1107 struct ieee80211_hw *hw = sc->hw;
1108 struct ath_node *an = NULL;
1109 struct ieee80211_rx_status rx_status;
1110 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1111 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1112 int padsize;
1113 enum ATH_RX_TYPE st;
1114
1115 /* see if any padding is done by the hw and remove it */
1116 if (hdrlen & 3) {
1117 padsize = hdrlen % 4;
1118 memmove(skb->data + padsize, skb->data, hdrlen);
1119 skb_pull(skb, padsize);
1120 }
1121
1122 /* remove FCS before passing up to protocol stack */
1123 skb_trim(skb, (skb->len - FCS_LEN));
1124
1125 /* Prepare rx status */
1126 ath9k_rx_prepare(sc, skb, status, &rx_status);
1127
1128 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
1129 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
1130 rx_status.flag |= RX_FLAG_DECRYPTED;
1131 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
1132 && !(status->flags & ATH_RX_DECRYPT_ERROR)
1133 && skb->len >= hdrlen + 4) {
1134 keyix = skb->data[hdrlen + 3] >> 6;
1135
1136 if (test_bit(keyix, sc->sc_keymap))
1137 rx_status.flag |= RX_FLAG_DECRYPTED;
1138 }
1139
1140 spin_lock_bh(&sc->node_lock);
1141 an = ath_node_find(sc, hdr->addr2);
1142 spin_unlock_bh(&sc->node_lock);
1143
1144 if (an) {
1145 ath_rx_input(sc, an,
1146 hw->conf.ht_conf.ht_supported,
1147 skb, status, &st);
1148 }
1149 if (!an || (st != ATH_RX_CONSUMED))
1150 __ieee80211_rx(hw, skb, &rx_status);
1151
1152 return 0;
1153 }
1154
1155 int ath_rx_subframe(struct ath_node *an,
1156 struct sk_buff *skb,
1157 struct ath_recv_status *status)
1158 {
1159 struct ath_softc *sc = an->an_sc;
1160 struct ieee80211_hw *hw = sc->hw;
1161 struct ieee80211_rx_status rx_status;
1162
1163 /* Prepare rx status */
1164 ath9k_rx_prepare(sc, skb, status, &rx_status);
1165 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
1166 rx_status.flag |= RX_FLAG_DECRYPTED;
1167
1168 __ieee80211_rx(hw, skb, &rx_status);
1169
1170 return 0;
1171 }
1172
1173 enum ath9k_ht_macmode ath_cwm_macmode(struct ath_softc *sc)
1174 {
1175 return sc->sc_ht_info.tx_chan_width;
1176 }
1177
1178 static int ath_detach(struct ath_softc *sc)
1179 {
1180 struct ieee80211_hw *hw = sc->hw;
1181
1182 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
1183
1184 /* Unregister hw */
1185
1186 ieee80211_unregister_hw(hw);
1187
1188 /* unregister Rate control */
1189 ath_rate_control_unregister();
1190
1191 /* tx/rx cleanup */
1192
1193 ath_rx_cleanup(sc);
1194 ath_tx_cleanup(sc);
1195
1196 /* Deinit */
1197
1198 ath_deinit(sc);
1199
1200 return 0;
1201 }
1202
1203 static int ath_attach(u16 devid,
1204 struct ath_softc *sc)
1205 {
1206 struct ieee80211_hw *hw = sc->hw;
1207 int error = 0;
1208
1209 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
1210
1211 error = ath_init(devid, sc);
1212 if (error != 0)
1213 return error;
1214
1215 /* Init nodes */
1216
1217 INIT_LIST_HEAD(&sc->node_list);
1218 spin_lock_init(&sc->node_lock);
1219
1220 /* get mac address from hardware and set in mac80211 */
1221
1222 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
1223
1224 /* setup channels and rates */
1225
1226 sc->sbands[IEEE80211_BAND_2GHZ].channels =
1227 sc->channels[IEEE80211_BAND_2GHZ];
1228 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
1229 sc->rates[IEEE80211_BAND_2GHZ];
1230 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
1231
1232 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
1233 /* Setup HT capabilities for 2.4Ghz*/
1234 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
1235
1236 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1237 &sc->sbands[IEEE80211_BAND_2GHZ];
1238
1239 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
1240 sc->sbands[IEEE80211_BAND_5GHZ].channels =
1241 sc->channels[IEEE80211_BAND_5GHZ];
1242 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
1243 sc->rates[IEEE80211_BAND_5GHZ];
1244 sc->sbands[IEEE80211_BAND_5GHZ].band =
1245 IEEE80211_BAND_5GHZ;
1246
1247 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
1248 /* Setup HT capabilities for 5Ghz*/
1249 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
1250
1251 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1252 &sc->sbands[IEEE80211_BAND_5GHZ];
1253 }
1254
1255 /* FIXME: Have to figure out proper hw init values later */
1256
1257 hw->queues = 4;
1258 hw->ampdu_queues = 1;
1259
1260 /* Register rate control */
1261 hw->rate_control_algorithm = "ath9k_rate_control";
1262 error = ath_rate_control_register();
1263 if (error != 0) {
1264 DPRINTF(sc, ATH_DBG_FATAL,
1265 "%s: Unable to register rate control "
1266 "algorithm:%d\n", __func__, error);
1267 ath_rate_control_unregister();
1268 goto bad;
1269 }
1270
1271 error = ieee80211_register_hw(hw);
1272 if (error != 0) {
1273 ath_rate_control_unregister();
1274 goto bad;
1275 }
1276
1277 /* initialize tx/rx engine */
1278
1279 error = ath_tx_init(sc, ATH_TXBUF);
1280 if (error != 0)
1281 goto bad1;
1282
1283 error = ath_rx_init(sc, ATH_RXBUF);
1284 if (error != 0)
1285 goto bad1;
1286
1287 return 0;
1288 bad1:
1289 ath_detach(sc);
1290 bad:
1291 return error;
1292 }
1293
1294 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1295 {
1296 void __iomem *mem;
1297 struct ath_softc *sc;
1298 struct ieee80211_hw *hw;
1299 const char *athname;
1300 u8 csz;
1301 u32 val;
1302 int ret = 0;
1303
1304 if (pci_enable_device(pdev))
1305 return -EIO;
1306
1307 /* XXX 32-bit addressing only */
1308 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1309 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1310 ret = -ENODEV;
1311 goto bad;
1312 }
1313
1314 /*
1315 * Cache line size is used to size and align various
1316 * structures used to communicate with the hardware.
1317 */
1318 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1319 if (csz == 0) {
1320 /*
1321 * Linux 2.4.18 (at least) writes the cache line size
1322 * register as a 16-bit wide register which is wrong.
1323 * We must have this setup properly for rx buffer
1324 * DMA to work so force a reasonable value here if it
1325 * comes up zero.
1326 */
1327 csz = L1_CACHE_BYTES / sizeof(u32);
1328 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1329 }
1330 /*
1331 * The default setting of latency timer yields poor results,
1332 * set it to the value used by other systems. It may be worth
1333 * tweaking this setting more.
1334 */
1335 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1336
1337 pci_set_master(pdev);
1338
1339 /*
1340 * Disable the RETRY_TIMEOUT register (0x41) to keep
1341 * PCI Tx retries from interfering with C3 CPU state.
1342 */
1343 pci_read_config_dword(pdev, 0x40, &val);
1344 if ((val & 0x0000ff00) != 0)
1345 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1346
1347 ret = pci_request_region(pdev, 0, "ath9k");
1348 if (ret) {
1349 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1350 ret = -ENODEV;
1351 goto bad;
1352 }
1353
1354 mem = pci_iomap(pdev, 0, 0);
1355 if (!mem) {
1356 printk(KERN_ERR "PCI memory map error\n") ;
1357 ret = -EIO;
1358 goto bad1;
1359 }
1360
1361 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1362 if (hw == NULL) {
1363 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1364 goto bad2;
1365 }
1366
1367 hw->flags = IEEE80211_HW_SIGNAL_DBM |
1368 IEEE80211_HW_NOISE_DBM;
1369
1370 SET_IEEE80211_DEV(hw, &pdev->dev);
1371 pci_set_drvdata(pdev, hw);
1372
1373 sc = hw->priv;
1374 sc->hw = hw;
1375 sc->pdev = pdev;
1376 sc->mem = mem;
1377
1378 if (ath_attach(id->device, sc) != 0) {
1379 ret = -ENODEV;
1380 goto bad3;
1381 }
1382
1383 /* setup interrupt service routine */
1384
1385 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1386 printk(KERN_ERR "%s: request_irq failed\n",
1387 wiphy_name(hw->wiphy));
1388 ret = -EIO;
1389 goto bad4;
1390 }
1391
1392 athname = ath9k_hw_probe(id->vendor, id->device);
1393
1394 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1395 wiphy_name(hw->wiphy),
1396 athname ? athname : "Atheros ???",
1397 (unsigned long)mem, pdev->irq);
1398
1399 return 0;
1400 bad4:
1401 ath_detach(sc);
1402 bad3:
1403 ieee80211_free_hw(hw);
1404 bad2:
1405 pci_iounmap(pdev, mem);
1406 bad1:
1407 pci_release_region(pdev, 0);
1408 bad:
1409 pci_disable_device(pdev);
1410 return ret;
1411 }
1412
1413 static void ath_pci_remove(struct pci_dev *pdev)
1414 {
1415 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1416 struct ath_softc *sc = hw->priv;
1417
1418 if (pdev->irq)
1419 free_irq(pdev->irq, sc);
1420 ath_detach(sc);
1421 pci_iounmap(pdev, sc->mem);
1422 pci_release_region(pdev, 0);
1423 pci_disable_device(pdev);
1424 ieee80211_free_hw(hw);
1425 }
1426
1427 #ifdef CONFIG_PM
1428
1429 static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1430 {
1431 pci_save_state(pdev);
1432 pci_disable_device(pdev);
1433 pci_set_power_state(pdev, 3);
1434
1435 return 0;
1436 }
1437
1438 static int ath_pci_resume(struct pci_dev *pdev)
1439 {
1440 u32 val;
1441 int err;
1442
1443 err = pci_enable_device(pdev);
1444 if (err)
1445 return err;
1446 pci_restore_state(pdev);
1447 /*
1448 * Suspend/Resume resets the PCI configuration space, so we have to
1449 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1450 * PCI Tx retries from interfering with C3 CPU state
1451 */
1452 pci_read_config_dword(pdev, 0x40, &val);
1453 if ((val & 0x0000ff00) != 0)
1454 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1455
1456 return 0;
1457 }
1458
1459 #endif /* CONFIG_PM */
1460
1461 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1462
1463 static struct pci_driver ath_pci_driver = {
1464 .name = "ath9k",
1465 .id_table = ath_pci_id_table,
1466 .probe = ath_pci_probe,
1467 .remove = ath_pci_remove,
1468 #ifdef CONFIG_PM
1469 .suspend = ath_pci_suspend,
1470 .resume = ath_pci_resume,
1471 #endif /* CONFIG_PM */
1472 };
1473
1474 static int __init init_ath_pci(void)
1475 {
1476 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1477
1478 if (pci_register_driver(&ath_pci_driver) < 0) {
1479 printk(KERN_ERR
1480 "ath_pci: No devices found, driver not installed.\n");
1481 pci_unregister_driver(&ath_pci_driver);
1482 return -ENODEV;
1483 }
1484
1485 return 0;
1486 }
1487 module_init(init_ath_pci);
1488
1489 static void __exit exit_ath_pci(void)
1490 {
1491 pci_unregister_driver(&ath_pci_driver);
1492 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1493 }
1494 module_exit(exit_ath_pci);
Linux kernel - Deliverables
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