projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
ath9k: Node cleanup
[deliverable/linux.git] / drivers / net / wireless / ath9k / main.c
1 /*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 /* mac80211 and PCI callbacks */
18
19 #include <linux/nl80211.h>
20 #include "core.h"
21
22 #define ATH_PCI_VERSION "0.1"
23
24 static char *dev_info = "ath9k";
25
26 MODULE_AUTHOR("Atheros Communications");
27 MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
28 MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
29 MODULE_LICENSE("Dual BSD/GPL");
30
31 static struct pci_device_id ath_pci_id_table[] __devinitdata = {
32 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
33 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
34 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
35 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
36 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
37 { 0 }
38 };
39
40 static int ath_get_channel(struct ath_softc *sc,
41 struct ieee80211_channel *chan)
42 {
43 int i;
44
45 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
46 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
47 return i;
48 }
49
50 return -1;
51 }
52
53 static u32 ath_get_extchanmode(struct ath_softc *sc,
54 struct ieee80211_channel *chan)
55 {
56 u32 chanmode = 0;
57 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
58 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
59
60 switch (chan->band) {
61 case IEEE80211_BAND_2GHZ:
62 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
63 (tx_chan_width == ATH9K_HT_MACMODE_20))
64 chanmode = CHANNEL_G_HT20;
65 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
66 (tx_chan_width == ATH9K_HT_MACMODE_2040))
67 chanmode = CHANNEL_G_HT40PLUS;
68 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
69 (tx_chan_width == ATH9K_HT_MACMODE_2040))
70 chanmode = CHANNEL_G_HT40MINUS;
71 break;
72 case IEEE80211_BAND_5GHZ:
73 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
74 (tx_chan_width == ATH9K_HT_MACMODE_20))
75 chanmode = CHANNEL_A_HT20;
76 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
77 (tx_chan_width == ATH9K_HT_MACMODE_2040))
78 chanmode = CHANNEL_A_HT40PLUS;
79 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
80 (tx_chan_width == ATH9K_HT_MACMODE_2040))
81 chanmode = CHANNEL_A_HT40MINUS;
82 break;
83 default:
84 break;
85 }
86
87 return chanmode;
88 }
89
90
91 static int ath_setkey_tkip(struct ath_softc *sc,
92 struct ieee80211_key_conf *key,
93 struct ath9k_keyval *hk,
94 const u8 *addr)
95 {
96 u8 *key_rxmic = NULL;
97 u8 *key_txmic = NULL;
98
99 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
100 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
101
102 if (addr == NULL) {
103 /* Group key installation */
104 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
105 return ath_keyset(sc, key->keyidx, hk, addr);
106 }
107 if (!sc->sc_splitmic) {
108 /*
109 * data key goes at first index,
110 * the hal handles the MIC keys at index+64.
111 */
112 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
113 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
114 return ath_keyset(sc, key->keyidx, hk, addr);
115 }
116 /*
117 * TX key goes at first index, RX key at +32.
118 * The hal handles the MIC keys at index+64.
119 */
120 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
121 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
122 /* Txmic entry failed. No need to proceed further */
123 DPRINTF(sc, ATH_DBG_KEYCACHE,
124 "%s Setting TX MIC Key Failed\n", __func__);
125 return 0;
126 }
127
128 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
129 /* XXX delete tx key on failure? */
130 return ath_keyset(sc, key->keyidx+32, hk, addr);
131 }
132
133 static int ath_key_config(struct ath_softc *sc,
134 const u8 *addr,
135 struct ieee80211_key_conf *key)
136 {
137 struct ieee80211_vif *vif;
138 struct ath9k_keyval hk;
139 const u8 *mac = NULL;
140 int ret = 0;
141 enum nl80211_iftype opmode;
142
143 memset(&hk, 0, sizeof(hk));
144
145 switch (key->alg) {
146 case ALG_WEP:
147 hk.kv_type = ATH9K_CIPHER_WEP;
148 break;
149 case ALG_TKIP:
150 hk.kv_type = ATH9K_CIPHER_TKIP;
151 break;
152 case ALG_CCMP:
153 hk.kv_type = ATH9K_CIPHER_AES_CCM;
154 break;
155 default:
156 return -EINVAL;
157 }
158
159 hk.kv_len = key->keylen;
160 memcpy(hk.kv_val, key->key, key->keylen);
161
162 if (!sc->sc_vaps[0])
163 return -EIO;
164
165 vif = sc->sc_vaps[0]->av_if_data;
166 opmode = vif->type;
167
168 /*
169 * Strategy:
170 * For _M_STA mc tx, we will not setup a key at all since we never
171 * tx mc.
172 * _M_STA mc rx, we will use the keyID.
173 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
174 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
175 * peer node. BUT we will plumb a cleartext key so that we can do
176 * perSta default key table lookup in software.
177 */
178 if (is_broadcast_ether_addr(addr)) {
179 switch (opmode) {
180 case NL80211_IFTYPE_STATION:
181 /* default key: could be group WPA key
182 * or could be static WEP key */
183 mac = NULL;
184 break;
185 case NL80211_IFTYPE_ADHOC:
186 break;
187 case NL80211_IFTYPE_AP:
188 break;
189 default:
190 ASSERT(0);
191 break;
192 }
193 } else {
194 mac = addr;
195 }
196
197 if (key->alg == ALG_TKIP)
198 ret = ath_setkey_tkip(sc, key, &hk, mac);
199 else
200 ret = ath_keyset(sc, key->keyidx, &hk, mac);
201
202 if (!ret)
203 return -EIO;
204
205 return 0;
206 }
207
208 static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
209 {
210 int freeslot;
211
212 freeslot = (key->keyidx >= 4) ? 1 : 0;
213 ath_key_reset(sc, key->keyidx, freeslot);
214 }
215
216 static void setup_ht_cap(struct ieee80211_sta_ht_cap *ht_info)
217 {
218 #define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
219 #define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
220
221 ht_info->ht_supported = true;
222 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
223 IEEE80211_HT_CAP_SM_PS |
224 IEEE80211_HT_CAP_SGI_40 |
225 IEEE80211_HT_CAP_DSSSCCK40;
226
227 ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
228 ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
229 /* set up supported mcs set */
230 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
231 ht_info->mcs.rx_mask[0] = 0xff;
232 ht_info->mcs.rx_mask[1] = 0xff;
233 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
234 }
235
236 static int ath_rate2idx(struct ath_softc *sc, int rate)
237 {
238 int i = 0, cur_band, n_rates;
239 struct ieee80211_hw *hw = sc->hw;
240
241 cur_band = hw->conf.channel->band;
242 n_rates = sc->sbands[cur_band].n_bitrates;
243
244 for (i = 0; i < n_rates; i++) {
245 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
246 break;
247 }
248
249 /*
250 * NB:mac80211 validates rx rate index against the supported legacy rate
251 * index only (should be done against ht rates also), return the highest
252 * legacy rate index for rx rate which does not match any one of the
253 * supported basic and extended rates to make mac80211 happy.
254 * The following hack will be cleaned up once the issue with
255 * the rx rate index validation in mac80211 is fixed.
256 */
257 if (i == n_rates)
258 return n_rates - 1;
259 return i;
260 }
261
262 static void ath9k_rx_prepare(struct ath_softc *sc,
263 struct sk_buff *skb,
264 struct ath_recv_status *status,
265 struct ieee80211_rx_status *rx_status)
266 {
267 struct ieee80211_hw *hw = sc->hw;
268 struct ieee80211_channel *curchan = hw->conf.channel;
269
270 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
271
272 rx_status->mactime = status->tsf;
273 rx_status->band = curchan->band;
274 rx_status->freq = curchan->center_freq;
275 rx_status->noise = sc->sc_ani.sc_noise_floor;
276 rx_status->signal = rx_status->noise + status->rssi;
277 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
278 rx_status->antenna = status->antenna;
279
280 /* at 45 you will be able to use MCS 15 reliably. A more elaborate
281 * scheme can be used here but it requires tables of SNR/throughput for
282 * each possible mode used. */
283 rx_status->qual = status->rssi * 100 / 45;
284
285 /* rssi can be more than 45 though, anything above that
286 * should be considered at 100% */
287 if (rx_status->qual > 100)
288 rx_status->qual = 100;
289
290 if (status->flags & ATH_RX_MIC_ERROR)
291 rx_status->flag |= RX_FLAG_MMIC_ERROR;
292 if (status->flags & ATH_RX_FCS_ERROR)
293 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
294
295 rx_status->flag |= RX_FLAG_TSFT;
296 }
297
298 static void ath9k_ht_conf(struct ath_softc *sc,
299 struct ieee80211_bss_conf *bss_conf)
300 {
301 struct ath_ht_info *ht_info = &sc->sc_ht_info;
302
303 if (sc->hw->conf.ht.enabled) {
304 ht_info->ext_chan_offset = bss_conf->ht.secondary_channel_offset;
305
306 if (bss_conf->ht.width_40_ok)
307 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
308 else
309 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
310
311 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
312 }
313 }
314
315 static void ath9k_bss_assoc_info(struct ath_softc *sc,
316 struct ieee80211_bss_conf *bss_conf)
317 {
318 struct ieee80211_hw *hw = sc->hw;
319 struct ieee80211_channel *curchan = hw->conf.channel;
320 struct ath_vap *avp;
321 int pos;
322
323 if (bss_conf->assoc) {
324 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
325 __func__,
326 bss_conf->aid);
327
328 avp = sc->sc_vaps[0];
329 if (avp == NULL) {
330 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
331 __func__);
332 return;
333 }
334
335 /* New association, store aid */
336 if (avp->av_opmode == ATH9K_M_STA) {
337 sc->sc_curaid = bss_conf->aid;
338 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
339 sc->sc_curaid);
340 }
341
342 /* Configure the beacon */
343 ath_beacon_config(sc, 0);
344 sc->sc_flags |= SC_OP_BEACONS;
345
346 /* Reset rssi stats */
347 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
348 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
349 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
350 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
351
352 /* Update chainmask */
353 ath_update_chainmask(sc, hw->conf.ht.enabled);
354
355 DPRINTF(sc, ATH_DBG_CONFIG,
356 "%s: bssid %pM aid 0x%x\n",
357 __func__,
358 sc->sc_curbssid, sc->sc_curaid);
359
360 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
361 __func__,
362 curchan->center_freq);
363
364 pos = ath_get_channel(sc, curchan);
365 if (pos == -1) {
366 DPRINTF(sc, ATH_DBG_FATAL,
367 "%s: Invalid channel\n", __func__);
368 return;
369 }
370
371 if (hw->conf.ht.enabled)
372 sc->sc_ah->ah_channels[pos].chanmode =
373 ath_get_extchanmode(sc, curchan);
374 else
375 sc->sc_ah->ah_channels[pos].chanmode =
376 (curchan->band == IEEE80211_BAND_2GHZ) ?
377 CHANNEL_G : CHANNEL_A;
378
379 /* set h/w channel */
380 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
381 DPRINTF(sc, ATH_DBG_FATAL,
382 "%s: Unable to set channel\n",
383 __func__);
384
385 ath_rate_newstate(sc, avp);
386 /* Update ratectrl about the new state */
387 ath_rc_node_update(hw, avp->rc_node);
388
389 /* Start ANI */
390 mod_timer(&sc->sc_ani.timer,
391 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
392
393 } else {
394 DPRINTF(sc, ATH_DBG_CONFIG,
395 "%s: Bss Info DISSOC\n", __func__);
396 sc->sc_curaid = 0;
397 }
398 }
399
400 void ath_get_beaconconfig(struct ath_softc *sc,
401 int if_id,
402 struct ath_beacon_config *conf)
403 {
404 struct ieee80211_hw *hw = sc->hw;
405
406 /* fill in beacon config data */
407
408 conf->beacon_interval = hw->conf.beacon_int;
409 conf->listen_interval = 100;
410 conf->dtim_count = 1;
411 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
412 }
413
414 void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
415 struct ath_xmit_status *tx_status, struct ath_node *an)
416 {
417 struct ieee80211_hw *hw = sc->hw;
418 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
419
420 DPRINTF(sc, ATH_DBG_XMIT,
421 "%s: TX complete: skb: %p\n", __func__, skb);
422
423 ieee80211_tx_info_clear_status(tx_info);
424 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
425 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
426 /* free driver's private data area of tx_info, XXX: HACK! */
427 if (tx_info->control.vif != NULL)
428 kfree(tx_info->control.vif);
429 tx_info->control.vif = NULL;
430 }
431
432 if (tx_status->flags & ATH_TX_BAR) {
433 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
434 tx_status->flags &= ~ATH_TX_BAR;
435 }
436
437 if (!(tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY))) {
438 /* Frame was ACKed */
439 tx_info->flags |= IEEE80211_TX_STAT_ACK;
440 }
441
442 tx_info->status.rates[0].count = tx_status->retries + 1;
443
444 ieee80211_tx_status(hw, skb);
445 }
446
447 int _ath_rx_indicate(struct ath_softc *sc,
448 struct sk_buff *skb,
449 struct ath_recv_status *status,
450 u16 keyix)
451 {
452 struct ieee80211_hw *hw = sc->hw;
453 struct ath_node *an = NULL;
454 struct ieee80211_rx_status rx_status;
455 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
456 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
457 int padsize;
458 enum ATH_RX_TYPE st;
459
460 /* see if any padding is done by the hw and remove it */
461 if (hdrlen & 3) {
462 padsize = hdrlen % 4;
463 memmove(skb->data + padsize, skb->data, hdrlen);
464 skb_pull(skb, padsize);
465 }
466
467 /* Prepare rx status */
468 ath9k_rx_prepare(sc, skb, status, &rx_status);
469
470 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
471 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
472 rx_status.flag |= RX_FLAG_DECRYPTED;
473 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
474 && !(status->flags & ATH_RX_DECRYPT_ERROR)
475 && skb->len >= hdrlen + 4) {
476 keyix = skb->data[hdrlen + 3] >> 6;
477
478 if (test_bit(keyix, sc->sc_keymap))
479 rx_status.flag |= RX_FLAG_DECRYPTED;
480 }
481
482 if (an) {
483 ath_rx_input(sc, an,
484 skb, status, &st);
485 }
486 if (!an || (st != ATH_RX_CONSUMED))
487 __ieee80211_rx(hw, skb, &rx_status);
488
489 return 0;
490 }
491
492 int ath_rx_subframe(struct ath_node *an,
493 struct sk_buff *skb,
494 struct ath_recv_status *status)
495 {
496 struct ath_softc *sc = an->an_sc;
497 struct ieee80211_hw *hw = sc->hw;
498 struct ieee80211_rx_status rx_status;
499
500 /* Prepare rx status */
501 ath9k_rx_prepare(sc, skb, status, &rx_status);
502 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
503 rx_status.flag |= RX_FLAG_DECRYPTED;
504
505 __ieee80211_rx(hw, skb, &rx_status);
506
507 return 0;
508 }
509
510 /********************************/
511 /* LED functions */
512 /********************************/
513
514 static void ath_led_brightness(struct led_classdev *led_cdev,
515 enum led_brightness brightness)
516 {
517 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
518 struct ath_softc *sc = led->sc;
519
520 switch (brightness) {
521 case LED_OFF:
522 if (led->led_type == ATH_LED_ASSOC ||
523 led->led_type == ATH_LED_RADIO)
524 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
525 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
526 (led->led_type == ATH_LED_RADIO) ? 1 :
527 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
528 break;
529 case LED_FULL:
530 if (led->led_type == ATH_LED_ASSOC)
531 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
532 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
533 break;
534 default:
535 break;
536 }
537 }
538
539 static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
540 char *trigger)
541 {
542 int ret;
543
544 led->sc = sc;
545 led->led_cdev.name = led->name;
546 led->led_cdev.default_trigger = trigger;
547 led->led_cdev.brightness_set = ath_led_brightness;
548
549 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
550 if (ret)
551 DPRINTF(sc, ATH_DBG_FATAL,
552 "Failed to register led:%s", led->name);
553 else
554 led->registered = 1;
555 return ret;
556 }
557
558 static void ath_unregister_led(struct ath_led *led)
559 {
560 if (led->registered) {
561 led_classdev_unregister(&led->led_cdev);
562 led->registered = 0;
563 }
564 }
565
566 static void ath_deinit_leds(struct ath_softc *sc)
567 {
568 ath_unregister_led(&sc->assoc_led);
569 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
570 ath_unregister_led(&sc->tx_led);
571 ath_unregister_led(&sc->rx_led);
572 ath_unregister_led(&sc->radio_led);
573 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
574 }
575
576 static void ath_init_leds(struct ath_softc *sc)
577 {
578 char *trigger;
579 int ret;
580
581 /* Configure gpio 1 for output */
582 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
583 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
584 /* LED off, active low */
585 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
586
587 trigger = ieee80211_get_radio_led_name(sc->hw);
588 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
589 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
590 ret = ath_register_led(sc, &sc->radio_led, trigger);
591 sc->radio_led.led_type = ATH_LED_RADIO;
592 if (ret)
593 goto fail;
594
595 trigger = ieee80211_get_assoc_led_name(sc->hw);
596 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
597 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
598 ret = ath_register_led(sc, &sc->assoc_led, trigger);
599 sc->assoc_led.led_type = ATH_LED_ASSOC;
600 if (ret)
601 goto fail;
602
603 trigger = ieee80211_get_tx_led_name(sc->hw);
604 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
605 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
606 ret = ath_register_led(sc, &sc->tx_led, trigger);
607 sc->tx_led.led_type = ATH_LED_TX;
608 if (ret)
609 goto fail;
610
611 trigger = ieee80211_get_rx_led_name(sc->hw);
612 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
613 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
614 ret = ath_register_led(sc, &sc->rx_led, trigger);
615 sc->rx_led.led_type = ATH_LED_RX;
616 if (ret)
617 goto fail;
618
619 return;
620
621 fail:
622 ath_deinit_leds(sc);
623 }
624
625 #ifdef CONFIG_RFKILL
626 /*******************/
627 /* Rfkill */
628 /*******************/
629
630 static void ath_radio_enable(struct ath_softc *sc)
631 {
632 struct ath_hal *ah = sc->sc_ah;
633 int status;
634
635 spin_lock_bh(&sc->sc_resetlock);
636 if (!ath9k_hw_reset(ah, ah->ah_curchan,
637 sc->sc_ht_info.tx_chan_width,
638 sc->sc_tx_chainmask,
639 sc->sc_rx_chainmask,
640 sc->sc_ht_extprotspacing,
641 false, &status)) {
642 DPRINTF(sc, ATH_DBG_FATAL,
643 "%s: unable to reset channel %u (%uMhz) "
644 "flags 0x%x hal status %u\n", __func__,
645 ath9k_hw_mhz2ieee(ah,
646 ah->ah_curchan->channel,
647 ah->ah_curchan->channelFlags),
648 ah->ah_curchan->channel,
649 ah->ah_curchan->channelFlags, status);
650 }
651 spin_unlock_bh(&sc->sc_resetlock);
652
653 ath_update_txpow(sc);
654 if (ath_startrecv(sc) != 0) {
655 DPRINTF(sc, ATH_DBG_FATAL,
656 "%s: unable to restart recv logic\n", __func__);
657 return;
658 }
659
660 if (sc->sc_flags & SC_OP_BEACONS)
661 ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */
662
663 /* Re-Enable interrupts */
664 ath9k_hw_set_interrupts(ah, sc->sc_imask);
665
666 /* Enable LED */
667 ath9k_hw_cfg_output(ah, ATH_LED_PIN,
668 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
669 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 0);
670
671 ieee80211_wake_queues(sc->hw);
672 }
673
674 static void ath_radio_disable(struct ath_softc *sc)
675 {
676 struct ath_hal *ah = sc->sc_ah;
677 int status;
678
679
680 ieee80211_stop_queues(sc->hw);
681
682 /* Disable LED */
683 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 1);
684 ath9k_hw_cfg_gpio_input(ah, ATH_LED_PIN);
685
686 /* Disable interrupts */
687 ath9k_hw_set_interrupts(ah, 0);
688
689 ath_draintxq(sc, false); /* clear pending tx frames */
690 ath_stoprecv(sc); /* turn off frame recv */
691 ath_flushrecv(sc); /* flush recv queue */
692
693 spin_lock_bh(&sc->sc_resetlock);
694 if (!ath9k_hw_reset(ah, ah->ah_curchan,
695 sc->sc_ht_info.tx_chan_width,
696 sc->sc_tx_chainmask,
697 sc->sc_rx_chainmask,
698 sc->sc_ht_extprotspacing,
699 false, &status)) {
700 DPRINTF(sc, ATH_DBG_FATAL,
701 "%s: unable to reset channel %u (%uMhz) "
702 "flags 0x%x hal status %u\n", __func__,
703 ath9k_hw_mhz2ieee(ah,
704 ah->ah_curchan->channel,
705 ah->ah_curchan->channelFlags),
706 ah->ah_curchan->channel,
707 ah->ah_curchan->channelFlags, status);
708 }
709 spin_unlock_bh(&sc->sc_resetlock);
710
711 ath9k_hw_phy_disable(ah);
712 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
713 }
714
715 static bool ath_is_rfkill_set(struct ath_softc *sc)
716 {
717 struct ath_hal *ah = sc->sc_ah;
718
719 return ath9k_hw_gpio_get(ah, ah->ah_rfkill_gpio) ==
720 ah->ah_rfkill_polarity;
721 }
722
723 /* h/w rfkill poll function */
724 static void ath_rfkill_poll(struct work_struct *work)
725 {
726 struct ath_softc *sc = container_of(work, struct ath_softc,
727 rf_kill.rfkill_poll.work);
728 bool radio_on;
729
730 if (sc->sc_flags & SC_OP_INVALID)
731 return;
732
733 radio_on = !ath_is_rfkill_set(sc);
734
735 /*
736 * enable/disable radio only when there is a
737 * state change in RF switch
738 */
739 if (radio_on == !!(sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED)) {
740 enum rfkill_state state;
741
742 if (sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED) {
743 state = radio_on ? RFKILL_STATE_SOFT_BLOCKED
744 : RFKILL_STATE_HARD_BLOCKED;
745 } else if (radio_on) {
746 ath_radio_enable(sc);
747 state = RFKILL_STATE_UNBLOCKED;
748 } else {
749 ath_radio_disable(sc);
750 state = RFKILL_STATE_HARD_BLOCKED;
751 }
752
753 if (state == RFKILL_STATE_HARD_BLOCKED)
754 sc->sc_flags |= SC_OP_RFKILL_HW_BLOCKED;
755 else
756 sc->sc_flags &= ~SC_OP_RFKILL_HW_BLOCKED;
757
758 rfkill_force_state(sc->rf_kill.rfkill, state);
759 }
760
761 queue_delayed_work(sc->hw->workqueue, &sc->rf_kill.rfkill_poll,
762 msecs_to_jiffies(ATH_RFKILL_POLL_INTERVAL));
763 }
764
765 /* s/w rfkill handler */
766 static int ath_sw_toggle_radio(void *data, enum rfkill_state state)
767 {
768 struct ath_softc *sc = data;
769
770 switch (state) {
771 case RFKILL_STATE_SOFT_BLOCKED:
772 if (!(sc->sc_flags & (SC_OP_RFKILL_HW_BLOCKED |
773 SC_OP_RFKILL_SW_BLOCKED)))
774 ath_radio_disable(sc);
775 sc->sc_flags |= SC_OP_RFKILL_SW_BLOCKED;
776 return 0;
777 case RFKILL_STATE_UNBLOCKED:
778 if ((sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED)) {
779 sc->sc_flags &= ~SC_OP_RFKILL_SW_BLOCKED;
780 if (sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED) {
781 DPRINTF(sc, ATH_DBG_FATAL, "Can't turn on the"
782 "radio as it is disabled by h/w \n");
783 return -EPERM;
784 }
785 ath_radio_enable(sc);
786 }
787 return 0;
788 default:
789 return -EINVAL;
790 }
791 }
792
793 /* Init s/w rfkill */
794 static int ath_init_sw_rfkill(struct ath_softc *sc)
795 {
796 sc->rf_kill.rfkill = rfkill_allocate(wiphy_dev(sc->hw->wiphy),
797 RFKILL_TYPE_WLAN);
798 if (!sc->rf_kill.rfkill) {
799 DPRINTF(sc, ATH_DBG_FATAL, "Failed to allocate rfkill\n");
800 return -ENOMEM;
801 }
802
803 snprintf(sc->rf_kill.rfkill_name, sizeof(sc->rf_kill.rfkill_name),
804 "ath9k-%s:rfkill", wiphy_name(sc->hw->wiphy));
805 sc->rf_kill.rfkill->name = sc->rf_kill.rfkill_name;
806 sc->rf_kill.rfkill->data = sc;
807 sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio;
808 sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED;
809 sc->rf_kill.rfkill->user_claim_unsupported = 1;
810
811 return 0;
812 }
813
814 /* Deinitialize rfkill */
815 static void ath_deinit_rfkill(struct ath_softc *sc)
816 {
817 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
818 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
819
820 if (sc->sc_flags & SC_OP_RFKILL_REGISTERED) {
821 rfkill_unregister(sc->rf_kill.rfkill);
822 sc->sc_flags &= ~SC_OP_RFKILL_REGISTERED;
823 sc->rf_kill.rfkill = NULL;
824 }
825 }
826 #endif /* CONFIG_RFKILL */
827
828 static int ath_detach(struct ath_softc *sc)
829 {
830 struct ieee80211_hw *hw = sc->hw;
831
832 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
833
834 /* Deinit LED control */
835 ath_deinit_leds(sc);
836
837 #ifdef CONFIG_RFKILL
838 /* deinit rfkill */
839 ath_deinit_rfkill(sc);
840 #endif
841
842 /* Unregister hw */
843
844 ieee80211_unregister_hw(hw);
845
846 /* unregister Rate control */
847 ath_rate_control_unregister();
848
849 /* tx/rx cleanup */
850
851 ath_rx_cleanup(sc);
852 ath_tx_cleanup(sc);
853
854 /* Deinit */
855
856 ath_deinit(sc);
857
858 return 0;
859 }
860
861 static int ath_attach(u16 devid,
862 struct ath_softc *sc)
863 {
864 struct ieee80211_hw *hw = sc->hw;
865 int error = 0;
866
867 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
868
869 error = ath_init(devid, sc);
870 if (error != 0)
871 return error;
872
873 /* get mac address from hardware and set in mac80211 */
874
875 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
876
877 /* setup channels and rates */
878
879 sc->sbands[IEEE80211_BAND_2GHZ].channels =
880 sc->channels[IEEE80211_BAND_2GHZ];
881 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
882 sc->rates[IEEE80211_BAND_2GHZ];
883 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
884
885 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
886 /* Setup HT capabilities for 2.4Ghz*/
887 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
888
889 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
890 &sc->sbands[IEEE80211_BAND_2GHZ];
891
892 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
893 sc->sbands[IEEE80211_BAND_5GHZ].channels =
894 sc->channels[IEEE80211_BAND_5GHZ];
895 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
896 sc->rates[IEEE80211_BAND_5GHZ];
897 sc->sbands[IEEE80211_BAND_5GHZ].band =
898 IEEE80211_BAND_5GHZ;
899
900 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
901 /* Setup HT capabilities for 5Ghz*/
902 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
903
904 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
905 &sc->sbands[IEEE80211_BAND_5GHZ];
906 }
907
908 hw->queues = 4;
909
910 /* Register rate control */
911 hw->rate_control_algorithm = "ath9k_rate_control";
912 error = ath_rate_control_register();
913 if (error != 0) {
914 DPRINTF(sc, ATH_DBG_FATAL,
915 "%s: Unable to register rate control "
916 "algorithm:%d\n", __func__, error);
917 ath_rate_control_unregister();
918 goto bad;
919 }
920
921 error = ieee80211_register_hw(hw);
922 if (error != 0) {
923 ath_rate_control_unregister();
924 goto bad;
925 }
926
927 /* Initialize LED control */
928 ath_init_leds(sc);
929
930 #ifdef CONFIG_RFKILL
931 /* Initialze h/w Rfkill */
932 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
933 INIT_DELAYED_WORK(&sc->rf_kill.rfkill_poll, ath_rfkill_poll);
934
935 /* Initialize s/w rfkill */
936 if (ath_init_sw_rfkill(sc))
937 goto detach;
938 #endif
939
940 /* initialize tx/rx engine */
941
942 error = ath_tx_init(sc, ATH_TXBUF);
943 if (error != 0)
944 goto detach;
945
946 error = ath_rx_init(sc, ATH_RXBUF);
947 if (error != 0)
948 goto detach;
949
950 return 0;
951 detach:
952 ath_detach(sc);
953 bad:
954 return error;
955 }
956
957 static int ath9k_start(struct ieee80211_hw *hw)
958 {
959 struct ath_softc *sc = hw->priv;
960 struct ieee80211_channel *curchan = hw->conf.channel;
961 int error = 0, pos;
962
963 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
964 "initial channel: %d MHz\n", __func__, curchan->center_freq);
965
966 /* setup initial channel */
967
968 pos = ath_get_channel(sc, curchan);
969 if (pos == -1) {
970 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
971 return -EINVAL;
972 }
973
974 sc->sc_ah->ah_channels[pos].chanmode =
975 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
976
977 /* open ath_dev */
978 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
979 if (error) {
980 DPRINTF(sc, ATH_DBG_FATAL,
981 "%s: Unable to complete ath_open\n", __func__);
982 return error;
983 }
984
985 #ifdef CONFIG_RFKILL
986 /* Start rfkill polling */
987 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
988 queue_delayed_work(sc->hw->workqueue,
989 &sc->rf_kill.rfkill_poll, 0);
990
991 if (!(sc->sc_flags & SC_OP_RFKILL_REGISTERED)) {
992 if (rfkill_register(sc->rf_kill.rfkill)) {
993 DPRINTF(sc, ATH_DBG_FATAL,
994 "Unable to register rfkill\n");
995 rfkill_free(sc->rf_kill.rfkill);
996
997 /* Deinitialize the device */
998 if (sc->pdev->irq)
999 free_irq(sc->pdev->irq, sc);
1000 ath_detach(sc);
1001 pci_iounmap(sc->pdev, sc->mem);
1002 pci_release_region(sc->pdev, 0);
1003 pci_disable_device(sc->pdev);
1004 ieee80211_free_hw(hw);
1005 return -EIO;
1006 } else {
1007 sc->sc_flags |= SC_OP_RFKILL_REGISTERED;
1008 }
1009 }
1010 #endif
1011
1012 ieee80211_wake_queues(hw);
1013 return 0;
1014 }
1015
1016 static int ath9k_tx(struct ieee80211_hw *hw,
1017 struct sk_buff *skb)
1018 {
1019 struct ath_softc *sc = hw->priv;
1020 int hdrlen, padsize;
1021 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1022
1023 /*
1024 * As a temporary workaround, assign seq# here; this will likely need
1025 * to be cleaned up to work better with Beacon transmission and virtual
1026 * BSSes.
1027 */
1028 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1029 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1030 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1031 sc->seq_no += 0x10;
1032 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1033 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
1034 }
1035
1036 /* Add the padding after the header if this is not already done */
1037 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1038 if (hdrlen & 3) {
1039 padsize = hdrlen % 4;
1040 if (skb_headroom(skb) < padsize)
1041 return -1;
1042 skb_push(skb, padsize);
1043 memmove(skb->data, skb->data + padsize, hdrlen);
1044 }
1045
1046 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
1047 __func__,
1048 skb);
1049
1050 if (ath_tx_start(sc, skb) != 0) {
1051 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
1052 dev_kfree_skb_any(skb);
1053 /* FIXME: Check for proper return value from ATH_DEV */
1054 return 0;
1055 }
1056
1057 return 0;
1058 }
1059
1060 static void ath9k_stop(struct ieee80211_hw *hw)
1061 {
1062 struct ath_softc *sc = hw->priv;
1063 int error;
1064
1065 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
1066
1067 error = ath_suspend(sc);
1068 if (error)
1069 DPRINTF(sc, ATH_DBG_CONFIG,
1070 "%s: Device is no longer present\n", __func__);
1071
1072 ieee80211_stop_queues(hw);
1073
1074 #ifdef CONFIG_RFKILL
1075 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1076 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1077 #endif
1078 }
1079
1080 static int ath9k_add_interface(struct ieee80211_hw *hw,
1081 struct ieee80211_if_init_conf *conf)
1082 {
1083 struct ath_softc *sc = hw->priv;
1084 int error, ic_opmode = 0;
1085
1086 /* Support only vap for now */
1087
1088 if (sc->sc_nvaps)
1089 return -ENOBUFS;
1090
1091 switch (conf->type) {
1092 case NL80211_IFTYPE_STATION:
1093 ic_opmode = ATH9K_M_STA;
1094 break;
1095 case NL80211_IFTYPE_ADHOC:
1096 ic_opmode = ATH9K_M_IBSS;
1097 break;
1098 case NL80211_IFTYPE_AP:
1099 ic_opmode = ATH9K_M_HOSTAP;
1100 break;
1101 default:
1102 DPRINTF(sc, ATH_DBG_FATAL,
1103 "%s: Interface type %d not yet supported\n",
1104 __func__, conf->type);
1105 return -EOPNOTSUPP;
1106 }
1107
1108 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
1109 __func__,
1110 ic_opmode);
1111
1112 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
1113 if (error) {
1114 DPRINTF(sc, ATH_DBG_FATAL,
1115 "%s: Unable to attach vap, error: %d\n",
1116 __func__, error);
1117 return error;
1118 }
1119
1120 if (conf->type == NL80211_IFTYPE_AP) {
1121 /* TODO: is this a suitable place to start ANI for AP mode? */
1122 /* Start ANI */
1123 mod_timer(&sc->sc_ani.timer,
1124 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
1125 }
1126
1127 return 0;
1128 }
1129
1130 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1131 struct ieee80211_if_init_conf *conf)
1132 {
1133 struct ath_softc *sc = hw->priv;
1134 struct ath_vap *avp;
1135 int error;
1136
1137 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
1138
1139 avp = sc->sc_vaps[0];
1140 if (avp == NULL) {
1141 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
1142 __func__);
1143 return;
1144 }
1145
1146 #ifdef CONFIG_SLOW_ANT_DIV
1147 ath_slow_ant_div_stop(&sc->sc_antdiv);
1148 #endif
1149 /* Stop ANI */
1150 del_timer_sync(&sc->sc_ani.timer);
1151
1152 /* Update ratectrl */
1153 ath_rate_newstate(sc, avp);
1154
1155 /* Reclaim beacon resources */
1156 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
1157 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
1158 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1159 ath_beacon_return(sc, avp);
1160 }
1161
1162 /* Set interrupt mask */
1163 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1164 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
1165 sc->sc_flags &= ~SC_OP_BEACONS;
1166
1167 error = ath_vap_detach(sc, 0);
1168 if (error)
1169 DPRINTF(sc, ATH_DBG_FATAL,
1170 "%s: Unable to detach vap, error: %d\n",
1171 __func__, error);
1172 }
1173
1174 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1175 {
1176 struct ath_softc *sc = hw->priv;
1177 struct ieee80211_channel *curchan = hw->conf.channel;
1178 struct ieee80211_conf *conf = &hw->conf;
1179 int pos;
1180
1181 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
1182 __func__,
1183 curchan->center_freq);
1184
1185 /* Update chainmask */
1186 ath_update_chainmask(sc, conf->ht.enabled);
1187
1188 pos = ath_get_channel(sc, curchan);
1189 if (pos == -1) {
1190 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1191 return -EINVAL;
1192 }
1193
1194 sc->sc_ah->ah_channels[pos].chanmode =
1195 (curchan->band == IEEE80211_BAND_2GHZ) ?
1196 CHANNEL_G : CHANNEL_A;
1197
1198 if (sc->sc_curaid && hw->conf.ht.enabled)
1199 sc->sc_ah->ah_channels[pos].chanmode =
1200 ath_get_extchanmode(sc, curchan);
1201
1202 if (changed & IEEE80211_CONF_CHANGE_POWER)
1203 sc->sc_config.txpowlimit = 2 * conf->power_level;
1204
1205 /* set h/w channel */
1206 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
1207 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
1208 __func__);
1209
1210 return 0;
1211 }
1212
1213 static int ath9k_config_interface(struct ieee80211_hw *hw,
1214 struct ieee80211_vif *vif,
1215 struct ieee80211_if_conf *conf)
1216 {
1217 struct ath_softc *sc = hw->priv;
1218 struct ath_hal *ah = sc->sc_ah;
1219 struct ath_vap *avp;
1220 u32 rfilt = 0;
1221 int error, i;
1222
1223 avp = sc->sc_vaps[0];
1224 if (avp == NULL) {
1225 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
1226 __func__);
1227 return -EINVAL;
1228 }
1229
1230 /* TODO: Need to decide which hw opmode to use for multi-interface
1231 * cases */
1232 if (vif->type == NL80211_IFTYPE_AP &&
1233 ah->ah_opmode != ATH9K_M_HOSTAP) {
1234 ah->ah_opmode = ATH9K_M_HOSTAP;
1235 ath9k_hw_setopmode(ah);
1236 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
1237 /* Request full reset to get hw opmode changed properly */
1238 sc->sc_flags |= SC_OP_FULL_RESET;
1239 }
1240
1241 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
1242 !is_zero_ether_addr(conf->bssid)) {
1243 switch (vif->type) {
1244 case NL80211_IFTYPE_STATION:
1245 case NL80211_IFTYPE_ADHOC:
1246 /* Update ratectrl about the new state */
1247 ath_rate_newstate(sc, avp);
1248
1249 /* Set BSSID */
1250 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
1251 sc->sc_curaid = 0;
1252 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
1253 sc->sc_curaid);
1254
1255 /* Set aggregation protection mode parameters */
1256 sc->sc_config.ath_aggr_prot = 0;
1257
1258 /*
1259 * Reset our TSF so that its value is lower than the
1260 * beacon that we are trying to catch.
1261 * Only then hw will update its TSF register with the
1262 * new beacon. Reset the TSF before setting the BSSID
1263 * to avoid allowing in any frames that would update
1264 * our TSF only to have us clear it
1265 * immediately thereafter.
1266 */
1267 ath9k_hw_reset_tsf(sc->sc_ah);
1268
1269 /* Disable BMISS interrupt when we're not associated */
1270 ath9k_hw_set_interrupts(sc->sc_ah,
1271 sc->sc_imask &
1272 ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
1273 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1274
1275 DPRINTF(sc, ATH_DBG_CONFIG,
1276 "%s: RX filter 0x%x bssid %pM aid 0x%x\n",
1277 __func__, rfilt,
1278 sc->sc_curbssid, sc->sc_curaid);
1279
1280 /* need to reconfigure the beacon */
1281 sc->sc_flags &= ~SC_OP_BEACONS ;
1282
1283 break;
1284 default:
1285 break;
1286 }
1287 }
1288
1289 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
1290 ((vif->type == NL80211_IFTYPE_ADHOC) ||
1291 (vif->type == NL80211_IFTYPE_AP))) {
1292 /*
1293 * Allocate and setup the beacon frame.
1294 *
1295 * Stop any previous beacon DMA. This may be
1296 * necessary, for example, when an ibss merge
1297 * causes reconfiguration; we may be called
1298 * with beacon transmission active.
1299 */
1300 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1301
1302 error = ath_beacon_alloc(sc, 0);
1303 if (error != 0)
1304 return error;
1305
1306 ath_beacon_sync(sc, 0);
1307 }
1308
1309 /* Check for WLAN_CAPABILITY_PRIVACY ? */
1310 if ((avp->av_opmode != NL80211_IFTYPE_STATION)) {
1311 for (i = 0; i < IEEE80211_WEP_NKID; i++)
1312 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
1313 ath9k_hw_keysetmac(sc->sc_ah,
1314 (u16)i,
1315 sc->sc_curbssid);
1316 }
1317
1318 /* Only legacy IBSS for now */
1319 if (vif->type == NL80211_IFTYPE_ADHOC)
1320 ath_update_chainmask(sc, 0);
1321
1322 return 0;
1323 }
1324
1325 #define SUPPORTED_FILTERS \
1326 (FIF_PROMISC_IN_BSS | \
1327 FIF_ALLMULTI | \
1328 FIF_CONTROL | \
1329 FIF_OTHER_BSS | \
1330 FIF_BCN_PRBRESP_PROMISC | \
1331 FIF_FCSFAIL)
1332
1333 /* FIXME: sc->sc_full_reset ? */
1334 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1335 unsigned int changed_flags,
1336 unsigned int *total_flags,
1337 int mc_count,
1338 struct dev_mc_list *mclist)
1339 {
1340 struct ath_softc *sc = hw->priv;
1341 u32 rfilt;
1342
1343 changed_flags &= SUPPORTED_FILTERS;
1344 *total_flags &= SUPPORTED_FILTERS;
1345
1346 sc->rx_filter = *total_flags;
1347 rfilt = ath_calcrxfilter(sc);
1348 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1349
1350 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1351 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1352 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
1353 }
1354
1355 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
1356 __func__, sc->rx_filter);
1357 }
1358
1359 /* Only a single interface is currently supported,
1360 so pass 0 as the interface id to ath_node_attach */
1361
1362 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1363 struct ieee80211_vif *vif,
1364 enum sta_notify_cmd cmd,
1365 struct ieee80211_sta *sta)
1366 {
1367 struct ath_softc *sc = hw->priv;
1368
1369 switch (cmd) {
1370 case STA_NOTIFY_ADD:
1371 ath_node_attach(sc, sta, 0);
1372 break;
1373 case STA_NOTIFY_REMOVE:
1374 ath_node_detach(sc, sta);
1375 break;
1376 default:
1377 break;
1378 }
1379 }
1380
1381 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1382 u16 queue,
1383 const struct ieee80211_tx_queue_params *params)
1384 {
1385 struct ath_softc *sc = hw->priv;
1386 struct ath9k_tx_queue_info qi;
1387 int ret = 0, qnum;
1388
1389 if (queue >= WME_NUM_AC)
1390 return 0;
1391
1392 qi.tqi_aifs = params->aifs;
1393 qi.tqi_cwmin = params->cw_min;
1394 qi.tqi_cwmax = params->cw_max;
1395 qi.tqi_burstTime = params->txop;
1396 qnum = ath_get_hal_qnum(queue, sc);
1397
1398 DPRINTF(sc, ATH_DBG_CONFIG,
1399 "%s: Configure tx [queue/halq] [%d/%d], "
1400 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1401 __func__,
1402 queue,
1403 qnum,
1404 params->aifs,
1405 params->cw_min,
1406 params->cw_max,
1407 params->txop);
1408
1409 ret = ath_txq_update(sc, qnum, &qi);
1410 if (ret)
1411 DPRINTF(sc, ATH_DBG_FATAL,
1412 "%s: TXQ Update failed\n", __func__);
1413
1414 return ret;
1415 }
1416
1417 static int ath9k_set_key(struct ieee80211_hw *hw,
1418 enum set_key_cmd cmd,
1419 const u8 *local_addr,
1420 const u8 *addr,
1421 struct ieee80211_key_conf *key)
1422 {
1423 struct ath_softc *sc = hw->priv;
1424 int ret = 0;
1425
1426 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
1427
1428 switch (cmd) {
1429 case SET_KEY:
1430 ret = ath_key_config(sc, addr, key);
1431 if (!ret) {
1432 set_bit(key->keyidx, sc->sc_keymap);
1433 key->hw_key_idx = key->keyidx;
1434 /* push IV and Michael MIC generation to stack */
1435 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1436 if (key->alg == ALG_TKIP)
1437 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1438 }
1439 break;
1440 case DISABLE_KEY:
1441 ath_key_delete(sc, key);
1442 clear_bit(key->keyidx, sc->sc_keymap);
1443 break;
1444 default:
1445 ret = -EINVAL;
1446 }
1447
1448 return ret;
1449 }
1450
1451 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1452 struct ieee80211_vif *vif,
1453 struct ieee80211_bss_conf *bss_conf,
1454 u32 changed)
1455 {
1456 struct ath_softc *sc = hw->priv;
1457
1458 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1459 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
1460 __func__,
1461 bss_conf->use_short_preamble);
1462 if (bss_conf->use_short_preamble)
1463 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1464 else
1465 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1466 }
1467
1468 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1469 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
1470 __func__,
1471 bss_conf->use_cts_prot);
1472 if (bss_conf->use_cts_prot &&
1473 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1474 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1475 else
1476 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1477 }
1478
1479 if (changed & BSS_CHANGED_HT) {
1480 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT\n",
1481 __func__);
1482 ath9k_ht_conf(sc, bss_conf);
1483 }
1484
1485 if (changed & BSS_CHANGED_ASSOC) {
1486 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
1487 __func__,
1488 bss_conf->assoc);
1489 ath9k_bss_assoc_info(sc, bss_conf);
1490 }
1491 }
1492
1493 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1494 {
1495 u64 tsf;
1496 struct ath_softc *sc = hw->priv;
1497 struct ath_hal *ah = sc->sc_ah;
1498
1499 tsf = ath9k_hw_gettsf64(ah);
1500
1501 return tsf;
1502 }
1503
1504 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1505 {
1506 struct ath_softc *sc = hw->priv;
1507 struct ath_hal *ah = sc->sc_ah;
1508
1509 ath9k_hw_reset_tsf(ah);
1510 }
1511
1512 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1513 enum ieee80211_ampdu_mlme_action action,
1514 struct ieee80211_sta *sta,
1515 u16 tid, u16 *ssn)
1516 {
1517 struct ath_softc *sc = hw->priv;
1518 int ret = 0;
1519
1520 switch (action) {
1521 case IEEE80211_AMPDU_RX_START:
1522 ret = ath_rx_aggr_start(sc, sta, tid, ssn);
1523 if (ret < 0)
1524 DPRINTF(sc, ATH_DBG_FATAL,
1525 "%s: Unable to start RX aggregation\n",
1526 __func__);
1527 break;
1528 case IEEE80211_AMPDU_RX_STOP:
1529 ret = ath_rx_aggr_stop(sc, sta, tid);
1530 if (ret < 0)
1531 DPRINTF(sc, ATH_DBG_FATAL,
1532 "%s: Unable to stop RX aggregation\n",
1533 __func__);
1534 break;
1535 case IEEE80211_AMPDU_TX_START:
1536 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1537 if (ret < 0)
1538 DPRINTF(sc, ATH_DBG_FATAL,
1539 "%s: Unable to start TX aggregation\n",
1540 __func__);
1541 else
1542 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1543 break;
1544 case IEEE80211_AMPDU_TX_STOP:
1545 ret = ath_tx_aggr_stop(sc, sta, tid);
1546 if (ret < 0)
1547 DPRINTF(sc, ATH_DBG_FATAL,
1548 "%s: Unable to stop TX aggregation\n",
1549 __func__);
1550
1551 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1552 break;
1553 default:
1554 DPRINTF(sc, ATH_DBG_FATAL,
1555 "%s: Unknown AMPDU action\n", __func__);
1556 }
1557
1558 return ret;
1559 }
1560
1561 static int ath9k_no_fragmentation(struct ieee80211_hw *hw, u32 value)
1562 {
1563 return -EOPNOTSUPP;
1564 }
1565
1566 static struct ieee80211_ops ath9k_ops = {
1567 .tx = ath9k_tx,
1568 .start = ath9k_start,
1569 .stop = ath9k_stop,
1570 .add_interface = ath9k_add_interface,
1571 .remove_interface = ath9k_remove_interface,
1572 .config = ath9k_config,
1573 .config_interface = ath9k_config_interface,
1574 .configure_filter = ath9k_configure_filter,
1575 .sta_notify = ath9k_sta_notify,
1576 .conf_tx = ath9k_conf_tx,
1577 .bss_info_changed = ath9k_bss_info_changed,
1578 .set_key = ath9k_set_key,
1579 .get_tsf = ath9k_get_tsf,
1580 .reset_tsf = ath9k_reset_tsf,
1581 .ampdu_action = ath9k_ampdu_action,
1582 .set_frag_threshold = ath9k_no_fragmentation,
1583 };
1584
1585 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1586 {
1587 void __iomem *mem;
1588 struct ath_softc *sc;
1589 struct ieee80211_hw *hw;
1590 const char *athname;
1591 u8 csz;
1592 u32 val;
1593 int ret = 0;
1594
1595 if (pci_enable_device(pdev))
1596 return -EIO;
1597
1598 /* XXX 32-bit addressing only */
1599 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1600 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1601 ret = -ENODEV;
1602 goto bad;
1603 }
1604
1605 /*
1606 * Cache line size is used to size and align various
1607 * structures used to communicate with the hardware.
1608 */
1609 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1610 if (csz == 0) {
1611 /*
1612 * Linux 2.4.18 (at least) writes the cache line size
1613 * register as a 16-bit wide register which is wrong.
1614 * We must have this setup properly for rx buffer
1615 * DMA to work so force a reasonable value here if it
1616 * comes up zero.
1617 */
1618 csz = L1_CACHE_BYTES / sizeof(u32);
1619 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1620 }
1621 /*
1622 * The default setting of latency timer yields poor results,
1623 * set it to the value used by other systems. It may be worth
1624 * tweaking this setting more.
1625 */
1626 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1627
1628 pci_set_master(pdev);
1629
1630 /*
1631 * Disable the RETRY_TIMEOUT register (0x41) to keep
1632 * PCI Tx retries from interfering with C3 CPU state.
1633 */
1634 pci_read_config_dword(pdev, 0x40, &val);
1635 if ((val & 0x0000ff00) != 0)
1636 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1637
1638 ret = pci_request_region(pdev, 0, "ath9k");
1639 if (ret) {
1640 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1641 ret = -ENODEV;
1642 goto bad;
1643 }
1644
1645 mem = pci_iomap(pdev, 0, 0);
1646 if (!mem) {
1647 printk(KERN_ERR "PCI memory map error\n") ;
1648 ret = -EIO;
1649 goto bad1;
1650 }
1651
1652 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1653 if (hw == NULL) {
1654 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1655 goto bad2;
1656 }
1657
1658 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
1659 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1660 IEEE80211_HW_SIGNAL_DBM |
1661 IEEE80211_HW_NOISE_DBM |
1662 IEEE80211_HW_AMPDU_AGGREGATION;
1663
1664 hw->wiphy->interface_modes =
1665 BIT(NL80211_IFTYPE_AP) |
1666 BIT(NL80211_IFTYPE_STATION) |
1667 BIT(NL80211_IFTYPE_ADHOC);
1668
1669 SET_IEEE80211_DEV(hw, &pdev->dev);
1670 pci_set_drvdata(pdev, hw);
1671
1672 sc = hw->priv;
1673 sc->hw = hw;
1674 sc->pdev = pdev;
1675 sc->mem = mem;
1676
1677 if (ath_attach(id->device, sc) != 0) {
1678 ret = -ENODEV;
1679 goto bad3;
1680 }
1681
1682 /* setup interrupt service routine */
1683
1684 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1685 printk(KERN_ERR "%s: request_irq failed\n",
1686 wiphy_name(hw->wiphy));
1687 ret = -EIO;
1688 goto bad4;
1689 }
1690
1691 athname = ath9k_hw_probe(id->vendor, id->device);
1692
1693 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1694 wiphy_name(hw->wiphy),
1695 athname ? athname : "Atheros ???",
1696 (unsigned long)mem, pdev->irq);
1697
1698 return 0;
1699 bad4:
1700 ath_detach(sc);
1701 bad3:
1702 ieee80211_free_hw(hw);
1703 bad2:
1704 pci_iounmap(pdev, mem);
1705 bad1:
1706 pci_release_region(pdev, 0);
1707 bad:
1708 pci_disable_device(pdev);
1709 return ret;
1710 }
1711
1712 static void ath_pci_remove(struct pci_dev *pdev)
1713 {
1714 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1715 struct ath_softc *sc = hw->priv;
1716 enum ath9k_int status;
1717
1718 if (pdev->irq) {
1719 ath9k_hw_set_interrupts(sc->sc_ah, 0);
1720 /* clear the ISR */
1721 ath9k_hw_getisr(sc->sc_ah, &status);
1722 sc->sc_flags |= SC_OP_INVALID;
1723 free_irq(pdev->irq, sc);
1724 }
1725 ath_detach(sc);
1726
1727 pci_iounmap(pdev, sc->mem);
1728 pci_release_region(pdev, 0);
1729 pci_disable_device(pdev);
1730 ieee80211_free_hw(hw);
1731 }
1732
1733 #ifdef CONFIG_PM
1734
1735 static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1736 {
1737 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1738 struct ath_softc *sc = hw->priv;
1739
1740 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1741
1742 #ifdef CONFIG_RFKILL
1743 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1744 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1745 #endif
1746
1747 pci_save_state(pdev);
1748 pci_disable_device(pdev);
1749 pci_set_power_state(pdev, 3);
1750
1751 return 0;
1752 }
1753
1754 static int ath_pci_resume(struct pci_dev *pdev)
1755 {
1756 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1757 struct ath_softc *sc = hw->priv;
1758 u32 val;
1759 int err;
1760
1761 err = pci_enable_device(pdev);
1762 if (err)
1763 return err;
1764 pci_restore_state(pdev);
1765 /*
1766 * Suspend/Resume resets the PCI configuration space, so we have to
1767 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1768 * PCI Tx retries from interfering with C3 CPU state
1769 */
1770 pci_read_config_dword(pdev, 0x40, &val);
1771 if ((val & 0x0000ff00) != 0)
1772 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1773
1774 /* Enable LED */
1775 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1776 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1777 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1778
1779 #ifdef CONFIG_RFKILL
1780 /*
1781 * check the h/w rfkill state on resume
1782 * and start the rfkill poll timer
1783 */
1784 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1785 queue_delayed_work(sc->hw->workqueue,
1786 &sc->rf_kill.rfkill_poll, 0);
1787 #endif
1788
1789 return 0;
1790 }
1791
1792 #endif /* CONFIG_PM */
1793
1794 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1795
1796 static struct pci_driver ath_pci_driver = {
1797 .name = "ath9k",
1798 .id_table = ath_pci_id_table,
1799 .probe = ath_pci_probe,
1800 .remove = ath_pci_remove,
1801 #ifdef CONFIG_PM
1802 .suspend = ath_pci_suspend,
1803 .resume = ath_pci_resume,
1804 #endif /* CONFIG_PM */
1805 };
1806
1807 static int __init init_ath_pci(void)
1808 {
1809 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1810
1811 if (pci_register_driver(&ath_pci_driver) < 0) {
1812 printk(KERN_ERR
1813 "ath_pci: No devices found, driver not installed.\n");
1814 pci_unregister_driver(&ath_pci_driver);
1815 return -ENODEV;
1816 }
1817
1818 return 0;
1819 }
1820 module_init(init_ath_pci);
1821
1822 static void __exit exit_ath_pci(void)
1823 {
1824 pci_unregister_driver(&ath_pci_driver);
1825 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1826 }
1827 module_exit(exit_ath_pci);
Linux kernel - Deliverables
This page took 0.072673 seconds and 5 git commands to generate.