3 Broadcom B43 wireless driver
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6 Copyright (c) 2005 Stefano Brivio <stefano.brivio@polimi.it>
7 Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
8 Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
11 Some parts of the code in this file are derived from the ipw2200
12 driver Copyright(c) 2003 - 2004 Intel Corporation.
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; either version 2 of the License, or
17 (at your option) any later version.
19 This program is distributed in the hope that it will be useful,
20 but WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 GNU General Public License for more details.
24 You should have received a copy of the GNU General Public License
25 along with this program; see the file COPYING. If not, write to
26 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
27 Boston, MA 02110-1301, USA.
31 #include <linux/delay.h>
32 #include <linux/init.h>
33 #include <linux/moduleparam.h>
34 #include <linux/if_arp.h>
35 #include <linux/etherdevice.h>
36 #include <linux/version.h>
37 #include <linux/firmware.h>
38 #include <linux/wireless.h>
39 #include <linux/workqueue.h>
40 #include <linux/skbuff.h>
41 #include <linux/dma-mapping.h>
42 #include <asm/unaligned.h>
55 MODULE_DESCRIPTION("Broadcom B43 wireless driver");
56 MODULE_AUTHOR("Martin Langer");
57 MODULE_AUTHOR("Stefano Brivio");
58 MODULE_AUTHOR("Michael Buesch");
59 MODULE_LICENSE("GPL");
61 extern char *nvram_get(char *name
);
63 #if defined(CONFIG_B43_DMA) && defined(CONFIG_B43_PIO)
64 static int modparam_pio
;
65 module_param_named(pio
, modparam_pio
, int, 0444);
66 MODULE_PARM_DESC(pio
, "enable(1) / disable(0) PIO mode");
67 #elif defined(CONFIG_B43_DMA)
68 # define modparam_pio 0
69 #elif defined(CONFIG_B43_PIO)
70 # define modparam_pio 1
73 static int modparam_bad_frames_preempt
;
74 module_param_named(bad_frames_preempt
, modparam_bad_frames_preempt
, int, 0444);
75 MODULE_PARM_DESC(bad_frames_preempt
,
76 "enable(1) / disable(0) Bad Frames Preemption");
78 static char modparam_fwpostfix
[16];
79 module_param_string(fwpostfix
, modparam_fwpostfix
, 16, 0444);
80 MODULE_PARM_DESC(fwpostfix
, "Postfix for the .fw files to load.");
82 static int modparam_hwpctl
;
83 module_param_named(hwpctl
, modparam_hwpctl
, int, 0444);
84 MODULE_PARM_DESC(hwpctl
, "Enable hardware-side power control (default off)");
86 static int modparam_nohwcrypt
;
87 module_param_named(nohwcrypt
, modparam_nohwcrypt
, int, 0444);
88 MODULE_PARM_DESC(nohwcrypt
, "Disable hardware encryption.");
90 static const struct ssb_device_id b43_ssb_tbl
[] = {
91 SSB_DEVICE(SSB_VENDOR_BROADCOM
, SSB_DEV_80211
, 5),
92 SSB_DEVICE(SSB_VENDOR_BROADCOM
, SSB_DEV_80211
, 6),
93 SSB_DEVICE(SSB_VENDOR_BROADCOM
, SSB_DEV_80211
, 7),
94 SSB_DEVICE(SSB_VENDOR_BROADCOM
, SSB_DEV_80211
, 9),
95 SSB_DEVICE(SSB_VENDOR_BROADCOM
, SSB_DEV_80211
, 10),
99 MODULE_DEVICE_TABLE(ssb
, b43_ssb_tbl
);
101 /* Channel and ratetables are shared for all devices.
102 * They can't be const, because ieee80211 puts some precalculated
103 * data in there. This data is the same for all devices, so we don't
104 * get concurrency issues */
105 #define RATETAB_ENT(_rateid, _flags) \
107 .rate = B43_RATE_TO_BASE100KBPS(_rateid), \
112 static struct ieee80211_rate __b43_ratetable
[] = {
113 RATETAB_ENT(B43_CCK_RATE_1MB
, IEEE80211_RATE_CCK
),
114 RATETAB_ENT(B43_CCK_RATE_2MB
, IEEE80211_RATE_CCK_2
),
115 RATETAB_ENT(B43_CCK_RATE_5MB
, IEEE80211_RATE_CCK_2
),
116 RATETAB_ENT(B43_CCK_RATE_11MB
, IEEE80211_RATE_CCK_2
),
117 RATETAB_ENT(B43_OFDM_RATE_6MB
, IEEE80211_RATE_OFDM
),
118 RATETAB_ENT(B43_OFDM_RATE_9MB
, IEEE80211_RATE_OFDM
),
119 RATETAB_ENT(B43_OFDM_RATE_12MB
, IEEE80211_RATE_OFDM
),
120 RATETAB_ENT(B43_OFDM_RATE_18MB
, IEEE80211_RATE_OFDM
),
121 RATETAB_ENT(B43_OFDM_RATE_24MB
, IEEE80211_RATE_OFDM
),
122 RATETAB_ENT(B43_OFDM_RATE_36MB
, IEEE80211_RATE_OFDM
),
123 RATETAB_ENT(B43_OFDM_RATE_48MB
, IEEE80211_RATE_OFDM
),
124 RATETAB_ENT(B43_OFDM_RATE_54MB
, IEEE80211_RATE_OFDM
),
127 #define b43_a_ratetable (__b43_ratetable + 4)
128 #define b43_a_ratetable_size 8
129 #define b43_b_ratetable (__b43_ratetable + 0)
130 #define b43_b_ratetable_size 4
131 #define b43_g_ratetable (__b43_ratetable + 0)
132 #define b43_g_ratetable_size 12
134 #define CHANTAB_ENT(_chanid, _freq) \
139 .flag = IEEE80211_CHAN_W_SCAN | \
140 IEEE80211_CHAN_W_ACTIVE_SCAN | \
141 IEEE80211_CHAN_W_IBSS, \
142 .power_level = 0xFF, \
143 .antenna_max = 0xFF, \
145 static struct ieee80211_channel b43_bg_chantable
[] = {
146 CHANTAB_ENT(1, 2412),
147 CHANTAB_ENT(2, 2417),
148 CHANTAB_ENT(3, 2422),
149 CHANTAB_ENT(4, 2427),
150 CHANTAB_ENT(5, 2432),
151 CHANTAB_ENT(6, 2437),
152 CHANTAB_ENT(7, 2442),
153 CHANTAB_ENT(8, 2447),
154 CHANTAB_ENT(9, 2452),
155 CHANTAB_ENT(10, 2457),
156 CHANTAB_ENT(11, 2462),
157 CHANTAB_ENT(12, 2467),
158 CHANTAB_ENT(13, 2472),
159 CHANTAB_ENT(14, 2484),
162 #define b43_bg_chantable_size ARRAY_SIZE(b43_bg_chantable)
163 static struct ieee80211_channel b43_a_chantable
[] = {
164 CHANTAB_ENT(36, 5180),
165 CHANTAB_ENT(40, 5200),
166 CHANTAB_ENT(44, 5220),
167 CHANTAB_ENT(48, 5240),
168 CHANTAB_ENT(52, 5260),
169 CHANTAB_ENT(56, 5280),
170 CHANTAB_ENT(60, 5300),
171 CHANTAB_ENT(64, 5320),
172 CHANTAB_ENT(149, 5745),
173 CHANTAB_ENT(153, 5765),
174 CHANTAB_ENT(157, 5785),
175 CHANTAB_ENT(161, 5805),
176 CHANTAB_ENT(165, 5825),
179 #define b43_a_chantable_size ARRAY_SIZE(b43_a_chantable)
181 static void b43_wireless_core_exit(struct b43_wldev
*dev
);
182 static int b43_wireless_core_init(struct b43_wldev
*dev
);
183 static void b43_wireless_core_stop(struct b43_wldev
*dev
);
184 static int b43_wireless_core_start(struct b43_wldev
*dev
);
186 static int b43_ratelimit(struct b43_wl
*wl
)
188 if (!wl
|| !wl
->current_dev
)
190 if (b43_status(wl
->current_dev
) < B43_STAT_STARTED
)
192 /* We are up and running.
193 * Ratelimit the messages to avoid DoS over the net. */
194 return net_ratelimit();
197 void b43info(struct b43_wl
*wl
, const char *fmt
, ...)
201 if (!b43_ratelimit(wl
))
204 printk(KERN_INFO
"b43-%s: ",
205 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
210 void b43err(struct b43_wl
*wl
, const char *fmt
, ...)
214 if (!b43_ratelimit(wl
))
217 printk(KERN_ERR
"b43-%s ERROR: ",
218 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
223 void b43warn(struct b43_wl
*wl
, const char *fmt
, ...)
227 if (!b43_ratelimit(wl
))
230 printk(KERN_WARNING
"b43-%s warning: ",
231 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
237 void b43dbg(struct b43_wl
*wl
, const char *fmt
, ...)
242 printk(KERN_DEBUG
"b43-%s debug: ",
243 (wl
&& wl
->hw
) ? wiphy_name(wl
->hw
->wiphy
) : "wlan");
249 static void b43_ram_write(struct b43_wldev
*dev
, u16 offset
, u32 val
)
253 B43_WARN_ON(offset
% 4 != 0);
255 macctl
= b43_read32(dev
, B43_MMIO_MACCTL
);
256 if (macctl
& B43_MACCTL_BE
)
259 b43_write32(dev
, B43_MMIO_RAM_CONTROL
, offset
);
261 b43_write32(dev
, B43_MMIO_RAM_DATA
, val
);
265 void b43_shm_control_word(struct b43_wldev
*dev
, u16 routing
, u16 offset
)
269 /* "offset" is the WORD offset. */
274 b43_write32(dev
, B43_MMIO_SHM_CONTROL
, control
);
277 u32
b43_shm_read32(struct b43_wldev
*dev
, u16 routing
, u16 offset
)
281 if (routing
== B43_SHM_SHARED
) {
282 B43_WARN_ON(offset
& 0x0001);
283 if (offset
& 0x0003) {
284 /* Unaligned access */
285 b43_shm_control_word(dev
, routing
, offset
>> 2);
286 ret
= b43_read16(dev
, B43_MMIO_SHM_DATA_UNALIGNED
);
288 b43_shm_control_word(dev
, routing
, (offset
>> 2) + 1);
289 ret
|= b43_read16(dev
, B43_MMIO_SHM_DATA
);
295 b43_shm_control_word(dev
, routing
, offset
);
296 ret
= b43_read32(dev
, B43_MMIO_SHM_DATA
);
301 u16
b43_shm_read16(struct b43_wldev
* dev
, u16 routing
, u16 offset
)
305 if (routing
== B43_SHM_SHARED
) {
306 B43_WARN_ON(offset
& 0x0001);
307 if (offset
& 0x0003) {
308 /* Unaligned access */
309 b43_shm_control_word(dev
, routing
, offset
>> 2);
310 ret
= b43_read16(dev
, B43_MMIO_SHM_DATA_UNALIGNED
);
316 b43_shm_control_word(dev
, routing
, offset
);
317 ret
= b43_read16(dev
, B43_MMIO_SHM_DATA
);
322 void b43_shm_write32(struct b43_wldev
*dev
, u16 routing
, u16 offset
, u32 value
)
324 if (routing
== B43_SHM_SHARED
) {
325 B43_WARN_ON(offset
& 0x0001);
326 if (offset
& 0x0003) {
327 /* Unaligned access */
328 b43_shm_control_word(dev
, routing
, offset
>> 2);
330 b43_write16(dev
, B43_MMIO_SHM_DATA_UNALIGNED
,
331 (value
>> 16) & 0xffff);
333 b43_shm_control_word(dev
, routing
, (offset
>> 2) + 1);
335 b43_write16(dev
, B43_MMIO_SHM_DATA
, value
& 0xffff);
340 b43_shm_control_word(dev
, routing
, offset
);
342 b43_write32(dev
, B43_MMIO_SHM_DATA
, value
);
345 void b43_shm_write16(struct b43_wldev
*dev
, u16 routing
, u16 offset
, u16 value
)
347 if (routing
== B43_SHM_SHARED
) {
348 B43_WARN_ON(offset
& 0x0001);
349 if (offset
& 0x0003) {
350 /* Unaligned access */
351 b43_shm_control_word(dev
, routing
, offset
>> 2);
353 b43_write16(dev
, B43_MMIO_SHM_DATA_UNALIGNED
, value
);
358 b43_shm_control_word(dev
, routing
, offset
);
360 b43_write16(dev
, B43_MMIO_SHM_DATA
, value
);
364 u32
b43_hf_read(struct b43_wldev
* dev
)
368 ret
= b43_shm_read16(dev
, B43_SHM_SHARED
, B43_SHM_SH_HOSTFHI
);
370 ret
|= b43_shm_read16(dev
, B43_SHM_SHARED
, B43_SHM_SH_HOSTFLO
);
375 /* Write HostFlags */
376 void b43_hf_write(struct b43_wldev
*dev
, u32 value
)
378 b43_shm_write16(dev
, B43_SHM_SHARED
,
379 B43_SHM_SH_HOSTFLO
, (value
& 0x0000FFFF));
380 b43_shm_write16(dev
, B43_SHM_SHARED
,
381 B43_SHM_SH_HOSTFHI
, ((value
& 0xFFFF0000) >> 16));
384 void b43_tsf_read(struct b43_wldev
*dev
, u64
* tsf
)
386 /* We need to be careful. As we read the TSF from multiple
387 * registers, we should take care of register overflows.
388 * In theory, the whole tsf read process should be atomic.
389 * We try to be atomic here, by restaring the read process,
390 * if any of the high registers changed (overflew).
392 if (dev
->dev
->id
.revision
>= 3) {
393 u32 low
, high
, high2
;
396 high
= b43_read32(dev
, B43_MMIO_REV3PLUS_TSF_HIGH
);
397 low
= b43_read32(dev
, B43_MMIO_REV3PLUS_TSF_LOW
);
398 high2
= b43_read32(dev
, B43_MMIO_REV3PLUS_TSF_HIGH
);
399 } while (unlikely(high
!= high2
));
407 u16 test1
, test2
, test3
;
410 v3
= b43_read16(dev
, B43_MMIO_TSF_3
);
411 v2
= b43_read16(dev
, B43_MMIO_TSF_2
);
412 v1
= b43_read16(dev
, B43_MMIO_TSF_1
);
413 v0
= b43_read16(dev
, B43_MMIO_TSF_0
);
415 test3
= b43_read16(dev
, B43_MMIO_TSF_3
);
416 test2
= b43_read16(dev
, B43_MMIO_TSF_2
);
417 test1
= b43_read16(dev
, B43_MMIO_TSF_1
);
418 } while (v3
!= test3
|| v2
!= test2
|| v1
!= test1
);
432 static void b43_time_lock(struct b43_wldev
*dev
)
436 macctl
= b43_read32(dev
, B43_MMIO_MACCTL
);
437 macctl
|= B43_MACCTL_TBTTHOLD
;
438 b43_write32(dev
, B43_MMIO_MACCTL
, macctl
);
439 /* Commit the write */
440 b43_read32(dev
, B43_MMIO_MACCTL
);
443 static void b43_time_unlock(struct b43_wldev
*dev
)
447 macctl
= b43_read32(dev
, B43_MMIO_MACCTL
);
448 macctl
&= ~B43_MACCTL_TBTTHOLD
;
449 b43_write32(dev
, B43_MMIO_MACCTL
, macctl
);
450 /* Commit the write */
451 b43_read32(dev
, B43_MMIO_MACCTL
);
454 static void b43_tsf_write_locked(struct b43_wldev
*dev
, u64 tsf
)
456 /* Be careful with the in-progress timer.
457 * First zero out the low register, so we have a full
458 * register-overflow duration to complete the operation.
460 if (dev
->dev
->id
.revision
>= 3) {
461 u32 lo
= (tsf
& 0x00000000FFFFFFFFULL
);
462 u32 hi
= (tsf
& 0xFFFFFFFF00000000ULL
) >> 32;
464 b43_write32(dev
, B43_MMIO_REV3PLUS_TSF_LOW
, 0);
466 b43_write32(dev
, B43_MMIO_REV3PLUS_TSF_HIGH
, hi
);
468 b43_write32(dev
, B43_MMIO_REV3PLUS_TSF_LOW
, lo
);
470 u16 v0
= (tsf
& 0x000000000000FFFFULL
);
471 u16 v1
= (tsf
& 0x00000000FFFF0000ULL
) >> 16;
472 u16 v2
= (tsf
& 0x0000FFFF00000000ULL
) >> 32;
473 u16 v3
= (tsf
& 0xFFFF000000000000ULL
) >> 48;
475 b43_write16(dev
, B43_MMIO_TSF_0
, 0);
477 b43_write16(dev
, B43_MMIO_TSF_3
, v3
);
479 b43_write16(dev
, B43_MMIO_TSF_2
, v2
);
481 b43_write16(dev
, B43_MMIO_TSF_1
, v1
);
483 b43_write16(dev
, B43_MMIO_TSF_0
, v0
);
487 void b43_tsf_write(struct b43_wldev
*dev
, u64 tsf
)
490 b43_tsf_write_locked(dev
, tsf
);
491 b43_time_unlock(dev
);
495 void b43_macfilter_set(struct b43_wldev
*dev
, u16 offset
, const u8
* mac
)
497 static const u8 zero_addr
[ETH_ALEN
] = { 0 };
504 b43_write16(dev
, B43_MMIO_MACFILTER_CONTROL
, offset
);
508 b43_write16(dev
, B43_MMIO_MACFILTER_DATA
, data
);
511 b43_write16(dev
, B43_MMIO_MACFILTER_DATA
, data
);
514 b43_write16(dev
, B43_MMIO_MACFILTER_DATA
, data
);
517 static void b43_write_mac_bssid_templates(struct b43_wldev
*dev
)
521 u8 mac_bssid
[ETH_ALEN
* 2];
525 bssid
= dev
->wl
->bssid
;
526 mac
= dev
->wl
->mac_addr
;
528 b43_macfilter_set(dev
, B43_MACFILTER_BSSID
, bssid
);
530 memcpy(mac_bssid
, mac
, ETH_ALEN
);
531 memcpy(mac_bssid
+ ETH_ALEN
, bssid
, ETH_ALEN
);
533 /* Write our MAC address and BSSID to template ram */
534 for (i
= 0; i
< ARRAY_SIZE(mac_bssid
); i
+= sizeof(u32
)) {
535 tmp
= (u32
) (mac_bssid
[i
+ 0]);
536 tmp
|= (u32
) (mac_bssid
[i
+ 1]) << 8;
537 tmp
|= (u32
) (mac_bssid
[i
+ 2]) << 16;
538 tmp
|= (u32
) (mac_bssid
[i
+ 3]) << 24;
539 b43_ram_write(dev
, 0x20 + i
, tmp
);
543 static void b43_upload_card_macaddress(struct b43_wldev
*dev
)
545 b43_write_mac_bssid_templates(dev
);
546 b43_macfilter_set(dev
, B43_MACFILTER_SELF
, dev
->wl
->mac_addr
);
549 static void b43_set_slot_time(struct b43_wldev
*dev
, u16 slot_time
)
551 /* slot_time is in usec. */
552 if (dev
->phy
.type
!= B43_PHYTYPE_G
)
554 b43_write16(dev
, 0x684, 510 + slot_time
);
555 b43_shm_write16(dev
, B43_SHM_SHARED
, 0x0010, slot_time
);
558 static void b43_short_slot_timing_enable(struct b43_wldev
*dev
)
560 b43_set_slot_time(dev
, 9);
564 static void b43_short_slot_timing_disable(struct b43_wldev
*dev
)
566 b43_set_slot_time(dev
, 20);
570 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
571 * Returns the _previously_ enabled IRQ mask.
573 static inline u32
b43_interrupt_enable(struct b43_wldev
*dev
, u32 mask
)
577 old_mask
= b43_read32(dev
, B43_MMIO_GEN_IRQ_MASK
);
578 b43_write32(dev
, B43_MMIO_GEN_IRQ_MASK
, old_mask
| mask
);
583 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
584 * Returns the _previously_ enabled IRQ mask.
586 static inline u32
b43_interrupt_disable(struct b43_wldev
*dev
, u32 mask
)
590 old_mask
= b43_read32(dev
, B43_MMIO_GEN_IRQ_MASK
);
591 b43_write32(dev
, B43_MMIO_GEN_IRQ_MASK
, old_mask
& ~mask
);
596 /* Synchronize IRQ top- and bottom-half.
597 * IRQs must be masked before calling this.
598 * This must not be called with the irq_lock held.
600 static void b43_synchronize_irq(struct b43_wldev
*dev
)
602 synchronize_irq(dev
->dev
->irq
);
603 tasklet_kill(&dev
->isr_tasklet
);
606 /* DummyTransmission function, as documented on
607 * http://bcm-specs.sipsolutions.net/DummyTransmission
609 void b43_dummy_transmission(struct b43_wldev
*dev
)
611 struct b43_phy
*phy
= &dev
->phy
;
612 unsigned int i
, max_loop
;
625 buffer
[0] = 0x000201CC;
630 buffer
[0] = 0x000B846E;
637 for (i
= 0; i
< 5; i
++)
638 b43_ram_write(dev
, i
* 4, buffer
[i
]);
641 b43_read32(dev
, B43_MMIO_MACCTL
);
643 b43_write16(dev
, 0x0568, 0x0000);
644 b43_write16(dev
, 0x07C0, 0x0000);
645 value
= ((phy
->type
== B43_PHYTYPE_A
) ? 1 : 0);
646 b43_write16(dev
, 0x050C, value
);
647 b43_write16(dev
, 0x0508, 0x0000);
648 b43_write16(dev
, 0x050A, 0x0000);
649 b43_write16(dev
, 0x054C, 0x0000);
650 b43_write16(dev
, 0x056A, 0x0014);
651 b43_write16(dev
, 0x0568, 0x0826);
652 b43_write16(dev
, 0x0500, 0x0000);
653 b43_write16(dev
, 0x0502, 0x0030);
655 if (phy
->radio_ver
== 0x2050 && phy
->radio_rev
<= 0x5)
656 b43_radio_write16(dev
, 0x0051, 0x0017);
657 for (i
= 0x00; i
< max_loop
; i
++) {
658 value
= b43_read16(dev
, 0x050E);
663 for (i
= 0x00; i
< 0x0A; i
++) {
664 value
= b43_read16(dev
, 0x050E);
669 for (i
= 0x00; i
< 0x0A; i
++) {
670 value
= b43_read16(dev
, 0x0690);
671 if (!(value
& 0x0100))
675 if (phy
->radio_ver
== 0x2050 && phy
->radio_rev
<= 0x5)
676 b43_radio_write16(dev
, 0x0051, 0x0037);
679 static void key_write(struct b43_wldev
*dev
,
680 u8 index
, u8 algorithm
, const u8
* key
)
687 /* Key index/algo block */
688 kidx
= b43_kidx_to_fw(dev
, index
);
689 value
= ((kidx
<< 4) | algorithm
);
690 b43_shm_write16(dev
, B43_SHM_SHARED
,
691 B43_SHM_SH_KEYIDXBLOCK
+ (kidx
* 2), value
);
693 /* Write the key to the Key Table Pointer offset */
694 offset
= dev
->ktp
+ (index
* B43_SEC_KEYSIZE
);
695 for (i
= 0; i
< B43_SEC_KEYSIZE
; i
+= 2) {
697 value
|= (u16
) (key
[i
+ 1]) << 8;
698 b43_shm_write16(dev
, B43_SHM_SHARED
, offset
+ i
, value
);
702 static void keymac_write(struct b43_wldev
*dev
, u8 index
, const u8
* addr
)
704 u32 addrtmp
[2] = { 0, 0, };
705 u8 per_sta_keys_start
= 8;
707 if (b43_new_kidx_api(dev
))
708 per_sta_keys_start
= 4;
710 B43_WARN_ON(index
< per_sta_keys_start
);
711 /* We have two default TX keys and possibly two default RX keys.
712 * Physical mac 0 is mapped to physical key 4 or 8, depending
713 * on the firmware version.
714 * So we must adjust the index here.
716 index
-= per_sta_keys_start
;
719 addrtmp
[0] = addr
[0];
720 addrtmp
[0] |= ((u32
) (addr
[1]) << 8);
721 addrtmp
[0] |= ((u32
) (addr
[2]) << 16);
722 addrtmp
[0] |= ((u32
) (addr
[3]) << 24);
723 addrtmp
[1] = addr
[4];
724 addrtmp
[1] |= ((u32
) (addr
[5]) << 8);
727 if (dev
->dev
->id
.revision
>= 5) {
728 /* Receive match transmitter address mechanism */
729 b43_shm_write32(dev
, B43_SHM_RCMTA
,
730 (index
* 2) + 0, addrtmp
[0]);
731 b43_shm_write16(dev
, B43_SHM_RCMTA
,
732 (index
* 2) + 1, addrtmp
[1]);
734 /* RXE (Receive Engine) and
735 * PSM (Programmable State Machine) mechanism
738 /* TODO write to RCM 16, 19, 22 and 25 */
740 b43_shm_write32(dev
, B43_SHM_SHARED
,
741 B43_SHM_SH_PSM
+ (index
* 6) + 0,
743 b43_shm_write16(dev
, B43_SHM_SHARED
,
744 B43_SHM_SH_PSM
+ (index
* 6) + 4,
750 static void do_key_write(struct b43_wldev
*dev
,
751 u8 index
, u8 algorithm
,
752 const u8
* key
, size_t key_len
, const u8
* mac_addr
)
754 u8 buf
[B43_SEC_KEYSIZE
] = { 0, };
755 u8 per_sta_keys_start
= 8;
757 if (b43_new_kidx_api(dev
))
758 per_sta_keys_start
= 4;
760 B43_WARN_ON(index
>= dev
->max_nr_keys
);
761 B43_WARN_ON(key_len
> B43_SEC_KEYSIZE
);
763 if (index
>= per_sta_keys_start
)
764 keymac_write(dev
, index
, NULL
); /* First zero out mac. */
766 memcpy(buf
, key
, key_len
);
767 key_write(dev
, index
, algorithm
, buf
);
768 if (index
>= per_sta_keys_start
)
769 keymac_write(dev
, index
, mac_addr
);
771 dev
->key
[index
].algorithm
= algorithm
;
774 static int b43_key_write(struct b43_wldev
*dev
,
775 int index
, u8 algorithm
,
776 const u8
* key
, size_t key_len
,
778 struct ieee80211_key_conf
*keyconf
)
783 if (key_len
> B43_SEC_KEYSIZE
)
785 for (i
= 0; i
< dev
->max_nr_keys
; i
++) {
786 /* Check that we don't already have this key. */
787 B43_WARN_ON(dev
->key
[i
].keyconf
== keyconf
);
790 /* Either pairwise key or address is 00:00:00:00:00:00
791 * for transmit-only keys. Search the index. */
792 if (b43_new_kidx_api(dev
))
796 for (i
= sta_keys_start
; i
< dev
->max_nr_keys
; i
++) {
797 if (!dev
->key
[i
].keyconf
) {
804 b43err(dev
->wl
, "Out of hardware key memory\n");
808 B43_WARN_ON(index
> 3);
810 do_key_write(dev
, index
, algorithm
, key
, key_len
, mac_addr
);
811 if ((index
<= 3) && !b43_new_kidx_api(dev
)) {
813 B43_WARN_ON(mac_addr
);
814 do_key_write(dev
, index
+ 4, algorithm
, key
, key_len
, NULL
);
816 keyconf
->hw_key_idx
= index
;
817 dev
->key
[index
].keyconf
= keyconf
;
822 static int b43_key_clear(struct b43_wldev
*dev
, int index
)
824 if (B43_WARN_ON((index
< 0) || (index
>= dev
->max_nr_keys
)))
826 do_key_write(dev
, index
, B43_SEC_ALGO_NONE
,
827 NULL
, B43_SEC_KEYSIZE
, NULL
);
828 if ((index
<= 3) && !b43_new_kidx_api(dev
)) {
829 do_key_write(dev
, index
+ 4, B43_SEC_ALGO_NONE
,
830 NULL
, B43_SEC_KEYSIZE
, NULL
);
832 dev
->key
[index
].keyconf
= NULL
;
837 static void b43_clear_keys(struct b43_wldev
*dev
)
841 for (i
= 0; i
< dev
->max_nr_keys
; i
++)
842 b43_key_clear(dev
, i
);
845 void b43_power_saving_ctl_bits(struct b43_wldev
*dev
, unsigned int ps_flags
)
853 B43_WARN_ON((ps_flags
& B43_PS_ENABLED
) &&
854 (ps_flags
& B43_PS_DISABLED
));
855 B43_WARN_ON((ps_flags
& B43_PS_AWAKE
) && (ps_flags
& B43_PS_ASLEEP
));
857 if (ps_flags
& B43_PS_ENABLED
) {
859 } else if (ps_flags
& B43_PS_DISABLED
) {
862 //TODO: If powersave is not off and FIXME is not set and we are not in adhoc
863 // and thus is not an AP and we are associated, set bit 25
865 if (ps_flags
& B43_PS_AWAKE
) {
867 } else if (ps_flags
& B43_PS_ASLEEP
) {
870 //TODO: If the device is awake or this is an AP, or we are scanning, or FIXME,
871 // or we are associated, or FIXME, or the latest PS-Poll packet sent was
872 // successful, set bit26
875 /* FIXME: For now we force awake-on and hwps-off */
879 macctl
= b43_read32(dev
, B43_MMIO_MACCTL
);
881 macctl
|= B43_MACCTL_HWPS
;
883 macctl
&= ~B43_MACCTL_HWPS
;
885 macctl
|= B43_MACCTL_AWAKE
;
887 macctl
&= ~B43_MACCTL_AWAKE
;
888 b43_write32(dev
, B43_MMIO_MACCTL
, macctl
);
890 b43_read32(dev
, B43_MMIO_MACCTL
);
891 if (awake
&& dev
->dev
->id
.revision
>= 5) {
892 /* Wait for the microcode to wake up. */
893 for (i
= 0; i
< 100; i
++) {
894 ucstat
= b43_shm_read16(dev
, B43_SHM_SHARED
,
895 B43_SHM_SH_UCODESTAT
);
896 if (ucstat
!= B43_SHM_SH_UCODESTAT_SLEEP
)
903 /* Turn the Analog ON/OFF */
904 static void b43_switch_analog(struct b43_wldev
*dev
, int on
)
906 b43_write16(dev
, B43_MMIO_PHY0
, on
? 0 : 0xF4);
909 void b43_wireless_core_reset(struct b43_wldev
*dev
, u32 flags
)
914 flags
|= B43_TMSLOW_PHYCLKEN
;
915 flags
|= B43_TMSLOW_PHYRESET
;
916 ssb_device_enable(dev
->dev
, flags
);
917 msleep(2); /* Wait for the PLL to turn on. */
919 /* Now take the PHY out of Reset again */
920 tmslow
= ssb_read32(dev
->dev
, SSB_TMSLOW
);
921 tmslow
|= SSB_TMSLOW_FGC
;
922 tmslow
&= ~B43_TMSLOW_PHYRESET
;
923 ssb_write32(dev
->dev
, SSB_TMSLOW
, tmslow
);
924 ssb_read32(dev
->dev
, SSB_TMSLOW
); /* flush */
926 tmslow
&= ~SSB_TMSLOW_FGC
;
927 ssb_write32(dev
->dev
, SSB_TMSLOW
, tmslow
);
928 ssb_read32(dev
->dev
, SSB_TMSLOW
); /* flush */
932 b43_switch_analog(dev
, 1);
934 macctl
= b43_read32(dev
, B43_MMIO_MACCTL
);
935 macctl
&= ~B43_MACCTL_GMODE
;
936 if (flags
& B43_TMSLOW_GMODE
)
937 macctl
|= B43_MACCTL_GMODE
;
938 macctl
|= B43_MACCTL_IHR_ENABLED
;
939 b43_write32(dev
, B43_MMIO_MACCTL
, macctl
);
942 static void handle_irq_transmit_status(struct b43_wldev
*dev
)
946 struct b43_txstatus stat
;
949 v0
= b43_read32(dev
, B43_MMIO_XMITSTAT_0
);
950 if (!(v0
& 0x00000001))
952 v1
= b43_read32(dev
, B43_MMIO_XMITSTAT_1
);
954 stat
.cookie
= (v0
>> 16);
955 stat
.seq
= (v1
& 0x0000FFFF);
956 stat
.phy_stat
= ((v1
& 0x00FF0000) >> 16);
957 tmp
= (v0
& 0x0000FFFF);
958 stat
.frame_count
= ((tmp
& 0xF000) >> 12);
959 stat
.rts_count
= ((tmp
& 0x0F00) >> 8);
960 stat
.supp_reason
= ((tmp
& 0x001C) >> 2);
961 stat
.pm_indicated
= !!(tmp
& 0x0080);
962 stat
.intermediate
= !!(tmp
& 0x0040);
963 stat
.for_ampdu
= !!(tmp
& 0x0020);
964 stat
.acked
= !!(tmp
& 0x0002);
966 b43_handle_txstatus(dev
, &stat
);
970 static void drain_txstatus_queue(struct b43_wldev
*dev
)
974 if (dev
->dev
->id
.revision
< 5)
976 /* Read all entries from the microcode TXstatus FIFO
977 * and throw them away.
980 dummy
= b43_read32(dev
, B43_MMIO_XMITSTAT_0
);
981 if (!(dummy
& 0x00000001))
983 dummy
= b43_read32(dev
, B43_MMIO_XMITSTAT_1
);
987 static u32
b43_jssi_read(struct b43_wldev
*dev
)
991 val
= b43_shm_read16(dev
, B43_SHM_SHARED
, 0x08A);
993 val
|= b43_shm_read16(dev
, B43_SHM_SHARED
, 0x088);
998 static void b43_jssi_write(struct b43_wldev
*dev
, u32 jssi
)
1000 b43_shm_write16(dev
, B43_SHM_SHARED
, 0x088, (jssi
& 0x0000FFFF));
1001 b43_shm_write16(dev
, B43_SHM_SHARED
, 0x08A, (jssi
& 0xFFFF0000) >> 16);
1004 static void b43_generate_noise_sample(struct b43_wldev
*dev
)
1006 b43_jssi_write(dev
, 0x7F7F7F7F);
1007 b43_write32(dev
, B43_MMIO_STATUS2_BITFIELD
,
1008 b43_read32(dev
, B43_MMIO_STATUS2_BITFIELD
)
1010 B43_WARN_ON(dev
->noisecalc
.channel_at_start
!= dev
->phy
.channel
);
1013 static void b43_calculate_link_quality(struct b43_wldev
*dev
)
1015 /* Top half of Link Quality calculation. */
1017 if (dev
->noisecalc
.calculation_running
)
1019 dev
->noisecalc
.channel_at_start
= dev
->phy
.channel
;
1020 dev
->noisecalc
.calculation_running
= 1;
1021 dev
->noisecalc
.nr_samples
= 0;
1023 b43_generate_noise_sample(dev
);
1026 static void handle_irq_noise(struct b43_wldev
*dev
)
1028 struct b43_phy
*phy
= &dev
->phy
;
1034 /* Bottom half of Link Quality calculation. */
1036 B43_WARN_ON(!dev
->noisecalc
.calculation_running
);
1037 if (dev
->noisecalc
.channel_at_start
!= phy
->channel
)
1038 goto drop_calculation
;
1039 *((__le32
*)noise
) = cpu_to_le32(b43_jssi_read(dev
));
1040 if (noise
[0] == 0x7F || noise
[1] == 0x7F ||
1041 noise
[2] == 0x7F || noise
[3] == 0x7F)
1044 /* Get the noise samples. */
1045 B43_WARN_ON(dev
->noisecalc
.nr_samples
>= 8);
1046 i
= dev
->noisecalc
.nr_samples
;
1047 noise
[0] = limit_value(noise
[0], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
1048 noise
[1] = limit_value(noise
[1], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
1049 noise
[2] = limit_value(noise
[2], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
1050 noise
[3] = limit_value(noise
[3], 0, ARRAY_SIZE(phy
->nrssi_lt
) - 1);
1051 dev
->noisecalc
.samples
[i
][0] = phy
->nrssi_lt
[noise
[0]];
1052 dev
->noisecalc
.samples
[i
][1] = phy
->nrssi_lt
[noise
[1]];
1053 dev
->noisecalc
.samples
[i
][2] = phy
->nrssi_lt
[noise
[2]];
1054 dev
->noisecalc
.samples
[i
][3] = phy
->nrssi_lt
[noise
[3]];
1055 dev
->noisecalc
.nr_samples
++;
1056 if (dev
->noisecalc
.nr_samples
== 8) {
1057 /* Calculate the Link Quality by the noise samples. */
1059 for (i
= 0; i
< 8; i
++) {
1060 for (j
= 0; j
< 4; j
++)
1061 average
+= dev
->noisecalc
.samples
[i
][j
];
1067 tmp
= b43_shm_read16(dev
, B43_SHM_SHARED
, 0x40C);
1068 tmp
= (tmp
/ 128) & 0x1F;
1078 dev
->stats
.link_noise
= average
;
1080 dev
->noisecalc
.calculation_running
= 0;
1084 b43_generate_noise_sample(dev
);
1087 static void handle_irq_tbtt_indication(struct b43_wldev
*dev
)
1089 if (b43_is_mode(dev
->wl
, IEEE80211_IF_TYPE_AP
)) {
1092 if (1 /*FIXME: the last PSpoll frame was sent successfully */ )
1093 b43_power_saving_ctl_bits(dev
, 0);
1095 dev
->reg124_set_0x4
= 0;
1096 if (b43_is_mode(dev
->wl
, IEEE80211_IF_TYPE_IBSS
))
1097 dev
->reg124_set_0x4
= 1;
1100 static void handle_irq_atim_end(struct b43_wldev
*dev
)
1102 if (!dev
->reg124_set_0x4
/*FIXME rename this variable */ )
1104 b43_write32(dev
, B43_MMIO_STATUS2_BITFIELD
,
1105 b43_read32(dev
, B43_MMIO_STATUS2_BITFIELD
)
1109 static void handle_irq_pmq(struct b43_wldev
*dev
)
1116 tmp
= b43_read32(dev
, B43_MMIO_PS_STATUS
);
1117 if (!(tmp
& 0x00000008))
1120 /* 16bit write is odd, but correct. */
1121 b43_write16(dev
, B43_MMIO_PS_STATUS
, 0x0002);
1124 static void b43_write_template_common(struct b43_wldev
*dev
,
1125 const u8
* data
, u16 size
,
1127 u16 shm_size_offset
, u8 rate
)
1130 struct b43_plcp_hdr4 plcp
;
1133 b43_generate_plcp_hdr(&plcp
, size
+ FCS_LEN
, rate
);
1134 b43_ram_write(dev
, ram_offset
, le32_to_cpu(plcp
.data
));
1135 ram_offset
+= sizeof(u32
);
1136 /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
1137 * So leave the first two bytes of the next write blank.
1139 tmp
= (u32
) (data
[0]) << 16;
1140 tmp
|= (u32
) (data
[1]) << 24;
1141 b43_ram_write(dev
, ram_offset
, tmp
);
1142 ram_offset
+= sizeof(u32
);
1143 for (i
= 2; i
< size
; i
+= sizeof(u32
)) {
1144 tmp
= (u32
) (data
[i
+ 0]);
1146 tmp
|= (u32
) (data
[i
+ 1]) << 8;
1148 tmp
|= (u32
) (data
[i
+ 2]) << 16;
1150 tmp
|= (u32
) (data
[i
+ 3]) << 24;
1151 b43_ram_write(dev
, ram_offset
+ i
- 2, tmp
);
1153 b43_shm_write16(dev
, B43_SHM_SHARED
, shm_size_offset
,
1154 size
+ sizeof(struct b43_plcp_hdr6
));
1157 static void b43_write_beacon_template(struct b43_wldev
*dev
,
1159 u16 shm_size_offset
, u8 rate
)
1164 B43_WARN_ON(!dev
->cached_beacon
);
1165 len
= min((size_t) dev
->cached_beacon
->len
,
1166 0x200 - sizeof(struct b43_plcp_hdr6
));
1167 data
= (const u8
*)(dev
->cached_beacon
->data
);
1168 b43_write_template_common(dev
, data
,
1169 len
, ram_offset
, shm_size_offset
, rate
);
1172 static void b43_write_probe_resp_plcp(struct b43_wldev
*dev
,
1173 u16 shm_offset
, u16 size
, u8 rate
)
1175 struct b43_plcp_hdr4 plcp
;
1180 b43_generate_plcp_hdr(&plcp
, size
+ FCS_LEN
, rate
);
1181 dur
= ieee80211_generic_frame_duration(dev
->wl
->hw
,
1182 dev
->wl
->if_id
, size
,
1183 B43_RATE_TO_BASE100KBPS(rate
));
1184 /* Write PLCP in two parts and timing for packet transfer */
1185 tmp
= le32_to_cpu(plcp
.data
);
1186 b43_shm_write16(dev
, B43_SHM_SHARED
, shm_offset
, tmp
& 0xFFFF);
1187 b43_shm_write16(dev
, B43_SHM_SHARED
, shm_offset
+ 2, tmp
>> 16);
1188 b43_shm_write16(dev
, B43_SHM_SHARED
, shm_offset
+ 6, le16_to_cpu(dur
));
1191 /* Instead of using custom probe response template, this function
1192 * just patches custom beacon template by:
1193 * 1) Changing packet type
1194 * 2) Patching duration field
1197 static u8
*b43_generate_probe_resp(struct b43_wldev
*dev
,
1198 u16
* dest_size
, u8 rate
)
1202 u16 src_size
, elem_size
, src_pos
, dest_pos
;
1204 struct ieee80211_hdr
*hdr
;
1206 B43_WARN_ON(!dev
->cached_beacon
);
1207 src_size
= dev
->cached_beacon
->len
;
1208 src_data
= (const u8
*)dev
->cached_beacon
->data
;
1210 if (unlikely(src_size
< 0x24)) {
1211 b43dbg(dev
->wl
, "b43_generate_probe_resp: " "invalid beacon\n");
1215 dest_data
= kmalloc(src_size
, GFP_ATOMIC
);
1216 if (unlikely(!dest_data
))
1219 /* 0x24 is offset of first variable-len Information-Element
1222 memcpy(dest_data
, src_data
, 0x24);
1223 src_pos
= dest_pos
= 0x24;
1224 for (; src_pos
< src_size
- 2; src_pos
+= elem_size
) {
1225 elem_size
= src_data
[src_pos
+ 1] + 2;
1226 if (src_data
[src_pos
] != 0x05) { /* TIM */
1227 memcpy(dest_data
+ dest_pos
, src_data
+ src_pos
,
1229 dest_pos
+= elem_size
;
1232 *dest_size
= dest_pos
;
1233 hdr
= (struct ieee80211_hdr
*)dest_data
;
1235 /* Set the frame control. */
1236 hdr
->frame_control
= cpu_to_le16(IEEE80211_FTYPE_MGMT
|
1237 IEEE80211_STYPE_PROBE_RESP
);
1238 dur
= ieee80211_generic_frame_duration(dev
->wl
->hw
,
1239 dev
->wl
->if_id
, *dest_size
,
1240 B43_RATE_TO_BASE100KBPS(rate
));
1241 hdr
->duration_id
= dur
;
1246 static void b43_write_probe_resp_template(struct b43_wldev
*dev
,
1248 u16 shm_size_offset
, u8 rate
)
1250 u8
*probe_resp_data
;
1253 B43_WARN_ON(!dev
->cached_beacon
);
1254 size
= dev
->cached_beacon
->len
;
1255 probe_resp_data
= b43_generate_probe_resp(dev
, &size
, rate
);
1256 if (unlikely(!probe_resp_data
))
1259 /* Looks like PLCP headers plus packet timings are stored for
1260 * all possible basic rates
1262 b43_write_probe_resp_plcp(dev
, 0x31A, size
, B43_CCK_RATE_1MB
);
1263 b43_write_probe_resp_plcp(dev
, 0x32C, size
, B43_CCK_RATE_2MB
);
1264 b43_write_probe_resp_plcp(dev
, 0x33E, size
, B43_CCK_RATE_5MB
);
1265 b43_write_probe_resp_plcp(dev
, 0x350, size
, B43_CCK_RATE_11MB
);
1267 size
= min((size_t) size
, 0x200 - sizeof(struct b43_plcp_hdr6
));
1268 b43_write_template_common(dev
, probe_resp_data
,
1269 size
, ram_offset
, shm_size_offset
, rate
);
1270 kfree(probe_resp_data
);
1273 static int b43_refresh_cached_beacon(struct b43_wldev
*dev
,
1274 struct sk_buff
*beacon
)
1276 if (dev
->cached_beacon
)
1277 kfree_skb(dev
->cached_beacon
);
1278 dev
->cached_beacon
= beacon
;
1283 static void b43_update_templates(struct b43_wldev
*dev
)
1287 B43_WARN_ON(!dev
->cached_beacon
);
1289 b43_write_beacon_template(dev
, 0x68, 0x18, B43_CCK_RATE_1MB
);
1290 b43_write_beacon_template(dev
, 0x468, 0x1A, B43_CCK_RATE_1MB
);
1291 b43_write_probe_resp_template(dev
, 0x268, 0x4A, B43_CCK_RATE_11MB
);
1293 status
= b43_read32(dev
, B43_MMIO_STATUS2_BITFIELD
);
1295 b43_write32(dev
, B43_MMIO_STATUS2_BITFIELD
, status
);
1298 static void b43_refresh_templates(struct b43_wldev
*dev
, struct sk_buff
*beacon
)
1302 err
= b43_refresh_cached_beacon(dev
, beacon
);
1305 b43_update_templates(dev
);
1308 static void b43_set_ssid(struct b43_wldev
*dev
, const u8
* ssid
, u8 ssid_len
)
1313 len
= min((u16
) ssid_len
, (u16
) 0x100);
1314 for (i
= 0; i
< len
; i
+= sizeof(u32
)) {
1315 tmp
= (u32
) (ssid
[i
+ 0]);
1317 tmp
|= (u32
) (ssid
[i
+ 1]) << 8;
1319 tmp
|= (u32
) (ssid
[i
+ 2]) << 16;
1321 tmp
|= (u32
) (ssid
[i
+ 3]) << 24;
1322 b43_shm_write32(dev
, B43_SHM_SHARED
, 0x380 + i
, tmp
);
1324 b43_shm_write16(dev
, B43_SHM_SHARED
, 0x48, len
);
1327 static void b43_set_beacon_int(struct b43_wldev
*dev
, u16 beacon_int
)
1330 if (dev
->dev
->id
.revision
>= 3) {
1331 b43_write32(dev
, 0x188, (beacon_int
<< 16));
1333 b43_write16(dev
, 0x606, (beacon_int
>> 6));
1334 b43_write16(dev
, 0x610, beacon_int
);
1336 b43_time_unlock(dev
);
1339 static void handle_irq_beacon(struct b43_wldev
*dev
)
1343 if (!b43_is_mode(dev
->wl
, IEEE80211_IF_TYPE_AP
))
1346 dev
->irq_savedstate
&= ~B43_IRQ_BEACON
;
1347 status
= b43_read32(dev
, B43_MMIO_STATUS2_BITFIELD
);
1349 if (!dev
->cached_beacon
|| ((status
& 0x1) && (status
& 0x2))) {
1350 /* ACK beacon IRQ. */
1351 b43_write32(dev
, B43_MMIO_GEN_IRQ_REASON
, B43_IRQ_BEACON
);
1352 dev
->irq_savedstate
|= B43_IRQ_BEACON
;
1353 if (dev
->cached_beacon
)
1354 kfree_skb(dev
->cached_beacon
);
1355 dev
->cached_beacon
= NULL
;
1358 if (!(status
& 0x1)) {
1359 b43_write_beacon_template(dev
, 0x68, 0x18, B43_CCK_RATE_1MB
);
1361 b43_write32(dev
, B43_MMIO_STATUS2_BITFIELD
, status
);
1363 if (!(status
& 0x2)) {
1364 b43_write_beacon_template(dev
, 0x468, 0x1A, B43_CCK_RATE_1MB
);
1366 b43_write32(dev
, B43_MMIO_STATUS2_BITFIELD
, status
);
1370 static void handle_irq_ucode_debug(struct b43_wldev
*dev
)
1375 /* Interrupt handler bottom-half */
1376 static void b43_interrupt_tasklet(struct b43_wldev
*dev
)
1379 u32 dma_reason
[ARRAY_SIZE(dev
->dma_reason
)];
1380 u32 merged_dma_reason
= 0;
1382 unsigned long flags
;
1384 spin_lock_irqsave(&dev
->wl
->irq_lock
, flags
);
1386 B43_WARN_ON(b43_status(dev
) != B43_STAT_STARTED
);
1388 reason
= dev
->irq_reason
;
1389 for (i
= 0; i
< ARRAY_SIZE(dma_reason
); i
++) {
1390 dma_reason
[i
] = dev
->dma_reason
[i
];
1391 merged_dma_reason
|= dma_reason
[i
];
1394 if (unlikely(reason
& B43_IRQ_MAC_TXERR
))
1395 b43err(dev
->wl
, "MAC transmission error\n");
1397 if (unlikely(reason
& B43_IRQ_PHY_TXERR
))
1398 b43err(dev
->wl
, "PHY transmission error\n");
1400 if (unlikely(merged_dma_reason
& (B43_DMAIRQ_FATALMASK
|
1401 B43_DMAIRQ_NONFATALMASK
))) {
1402 if (merged_dma_reason
& B43_DMAIRQ_FATALMASK
) {
1403 b43err(dev
->wl
, "Fatal DMA error: "
1404 "0x%08X, 0x%08X, 0x%08X, "
1405 "0x%08X, 0x%08X, 0x%08X\n",
1406 dma_reason
[0], dma_reason
[1],
1407 dma_reason
[2], dma_reason
[3],
1408 dma_reason
[4], dma_reason
[5]);
1409 b43_controller_restart(dev
, "DMA error");
1411 spin_unlock_irqrestore(&dev
->wl
->irq_lock
, flags
);
1414 if (merged_dma_reason
& B43_DMAIRQ_NONFATALMASK
) {
1415 b43err(dev
->wl
, "DMA error: "
1416 "0x%08X, 0x%08X, 0x%08X, "
1417 "0x%08X, 0x%08X, 0x%08X\n",
1418 dma_reason
[0], dma_reason
[1],
1419 dma_reason
[2], dma_reason
[3],
1420 dma_reason
[4], dma_reason
[5]);
1424 if (unlikely(reason
& B43_IRQ_UCODE_DEBUG
))
1425 handle_irq_ucode_debug(dev
);
1426 if (reason
& B43_IRQ_TBTT_INDI
)
1427 handle_irq_tbtt_indication(dev
);
1428 if (reason
& B43_IRQ_ATIM_END
)
1429 handle_irq_atim_end(dev
);
1430 if (reason
& B43_IRQ_BEACON
)
1431 handle_irq_beacon(dev
);
1432 if (reason
& B43_IRQ_PMQ
)
1433 handle_irq_pmq(dev
);
1434 if (reason
& B43_IRQ_TXFIFO_FLUSH_OK
)
1436 if (reason
& B43_IRQ_NOISESAMPLE_OK
)
1437 handle_irq_noise(dev
);
1439 /* Check the DMA reason registers for received data. */
1440 if (dma_reason
[0] & B43_DMAIRQ_RX_DONE
) {
1441 if (b43_using_pio(dev
))
1442 b43_pio_rx(dev
->pio
.queue0
);
1444 b43_dma_rx(dev
->dma
.rx_ring0
);
1446 B43_WARN_ON(dma_reason
[1] & B43_DMAIRQ_RX_DONE
);
1447 B43_WARN_ON(dma_reason
[2] & B43_DMAIRQ_RX_DONE
);
1448 if (dma_reason
[3] & B43_DMAIRQ_RX_DONE
) {
1449 if (b43_using_pio(dev
))
1450 b43_pio_rx(dev
->pio
.queue3
);
1452 b43_dma_rx(dev
->dma
.rx_ring3
);
1454 B43_WARN_ON(dma_reason
[4] & B43_DMAIRQ_RX_DONE
);
1455 B43_WARN_ON(dma_reason
[5] & B43_DMAIRQ_RX_DONE
);
1457 if (reason
& B43_IRQ_TX_OK
)
1458 handle_irq_transmit_status(dev
);
1460 b43_interrupt_enable(dev
, dev
->irq_savedstate
);
1462 spin_unlock_irqrestore(&dev
->wl
->irq_lock
, flags
);
1465 static void pio_irq_workaround(struct b43_wldev
*dev
, u16 base
, int queueidx
)
1469 rxctl
= b43_read16(dev
, base
+ B43_PIO_RXCTL
);
1470 if (rxctl
& B43_PIO_RXCTL_DATAAVAILABLE
)
1471 dev
->dma_reason
[queueidx
] |= B43_DMAIRQ_RX_DONE
;
1473 dev
->dma_reason
[queueidx
] &= ~B43_DMAIRQ_RX_DONE
;
1476 static void b43_interrupt_ack(struct b43_wldev
*dev
, u32 reason
)
1478 if (b43_using_pio(dev
) &&
1479 (dev
->dev
->id
.revision
< 3) &&
1480 (!(reason
& B43_IRQ_PIO_WORKAROUND
))) {
1481 /* Apply a PIO specific workaround to the dma_reasons */
1482 pio_irq_workaround(dev
, B43_MMIO_PIO1_BASE
, 0);
1483 pio_irq_workaround(dev
, B43_MMIO_PIO2_BASE
, 1);
1484 pio_irq_workaround(dev
, B43_MMIO_PIO3_BASE
, 2);
1485 pio_irq_workaround(dev
, B43_MMIO_PIO4_BASE
, 3);
1488 b43_write32(dev
, B43_MMIO_GEN_IRQ_REASON
, reason
);
1490 b43_write32(dev
, B43_MMIO_DMA0_REASON
, dev
->dma_reason
[0]);
1491 b43_write32(dev
, B43_MMIO_DMA1_REASON
, dev
->dma_reason
[1]);
1492 b43_write32(dev
, B43_MMIO_DMA2_REASON
, dev
->dma_reason
[2]);
1493 b43_write32(dev
, B43_MMIO_DMA3_REASON
, dev
->dma_reason
[3]);
1494 b43_write32(dev
, B43_MMIO_DMA4_REASON
, dev
->dma_reason
[4]);
1495 b43_write32(dev
, B43_MMIO_DMA5_REASON
, dev
->dma_reason
[5]);
1498 /* Interrupt handler top-half */
1499 static irqreturn_t
b43_interrupt_handler(int irq
, void *dev_id
)
1501 irqreturn_t ret
= IRQ_NONE
;
1502 struct b43_wldev
*dev
= dev_id
;
1508 spin_lock(&dev
->wl
->irq_lock
);
1510 if (b43_status(dev
) < B43_STAT_STARTED
)
1512 reason
= b43_read32(dev
, B43_MMIO_GEN_IRQ_REASON
);
1513 if (reason
== 0xffffffff) /* shared IRQ */
1516 reason
&= b43_read32(dev
, B43_MMIO_GEN_IRQ_MASK
);
1520 dev
->dma_reason
[0] = b43_read32(dev
, B43_MMIO_DMA0_REASON
)
1522 dev
->dma_reason
[1] = b43_read32(dev
, B43_MMIO_DMA1_REASON
)
1524 dev
->dma_reason
[2] = b43_read32(dev
, B43_MMIO_DMA2_REASON
)
1526 dev
->dma_reason
[3] = b43_read32(dev
, B43_MMIO_DMA3_REASON
)
1528 dev
->dma_reason
[4] = b43_read32(dev
, B43_MMIO_DMA4_REASON
)
1530 dev
->dma_reason
[5] = b43_read32(dev
, B43_MMIO_DMA5_REASON
)
1533 b43_interrupt_ack(dev
, reason
);
1534 /* disable all IRQs. They are enabled again in the bottom half. */
1535 dev
->irq_savedstate
= b43_interrupt_disable(dev
, B43_IRQ_ALL
);
1536 /* save the reason code and call our bottom half. */
1537 dev
->irq_reason
= reason
;
1538 tasklet_schedule(&dev
->isr_tasklet
);
1541 spin_unlock(&dev
->wl
->irq_lock
);
1546 static void b43_release_firmware(struct b43_wldev
*dev
)
1548 release_firmware(dev
->fw
.ucode
);
1549 dev
->fw
.ucode
= NULL
;
1550 release_firmware(dev
->fw
.pcm
);
1552 release_firmware(dev
->fw
.initvals
);
1553 dev
->fw
.initvals
= NULL
;
1554 release_firmware(dev
->fw
.initvals_band
);
1555 dev
->fw
.initvals_band
= NULL
;
1558 static void b43_print_fw_helptext(struct b43_wl
*wl
)
1560 b43err(wl
, "You must go to "
1561 "http://linuxwireless.org/en/users/Drivers/b43#devicefirmware "
1562 "and download the correct firmware (version 4).\n");
1565 static int do_request_fw(struct b43_wldev
*dev
,
1567 const struct firmware
**fw
)
1569 char path
[sizeof(modparam_fwpostfix
) + 32];
1570 struct b43_fw_header
*hdr
;
1577 snprintf(path
, ARRAY_SIZE(path
),
1579 modparam_fwpostfix
, name
);
1580 err
= request_firmware(fw
, path
, dev
->dev
->dev
);
1582 b43err(dev
->wl
, "Firmware file \"%s\" not found "
1583 "or load failed.\n", path
);
1586 if ((*fw
)->size
< sizeof(struct b43_fw_header
))
1588 hdr
= (struct b43_fw_header
*)((*fw
)->data
);
1589 switch (hdr
->type
) {
1590 case B43_FW_TYPE_UCODE
:
1591 case B43_FW_TYPE_PCM
:
1592 size
= be32_to_cpu(hdr
->size
);
1593 if (size
!= (*fw
)->size
- sizeof(struct b43_fw_header
))
1596 case B43_FW_TYPE_IV
:
1607 b43err(dev
->wl
, "Firmware file \"%s\" format error.\n", path
);
1611 static int b43_request_firmware(struct b43_wldev
*dev
)
1613 struct b43_firmware
*fw
= &dev
->fw
;
1614 const u8 rev
= dev
->dev
->id
.revision
;
1615 const char *filename
;
1619 tmshigh
= ssb_read32(dev
->dev
, SSB_TMSHIGH
);
1621 if ((rev
>= 5) && (rev
<= 10))
1622 filename
= "ucode5";
1623 else if ((rev
>= 11) && (rev
<= 12))
1624 filename
= "ucode11";
1626 filename
= "ucode13";
1629 err
= do_request_fw(dev
, filename
, &fw
->ucode
);
1634 if ((rev
>= 5) && (rev
<= 10))
1640 err
= do_request_fw(dev
, filename
, &fw
->pcm
);
1644 if (!fw
->initvals
) {
1645 switch (dev
->phy
.type
) {
1647 if ((rev
>= 5) && (rev
<= 10)) {
1648 if (tmshigh
& B43_TMSHIGH_GPHY
)
1649 filename
= "a0g1initvals5";
1651 filename
= "a0g0initvals5";
1653 goto err_no_initvals
;
1656 if ((rev
>= 5) && (rev
<= 10))
1657 filename
= "b0g0initvals5";
1659 filename
= "lp0initvals13";
1661 goto err_no_initvals
;
1664 goto err_no_initvals
;
1666 err
= do_request_fw(dev
, filename
, &fw
->initvals
);
1670 if (!fw
->initvals_band
) {
1671 switch (dev
->phy
.type
) {
1673 if ((rev
>= 5) && (rev
<= 10)) {
1674 if (tmshigh
& B43_TMSHIGH_GPHY
)
1675 filename
= "a0g1bsinitvals5";
1677 filename
= "a0g0bsinitvals5";
1678 } else if (rev
>= 11)
1681 goto err_no_initvals
;
1684 if ((rev
>= 5) && (rev
<= 10))
1685 filename
= "b0g0bsinitvals5";
1689 goto err_no_initvals
;
1692 goto err_no_initvals
;
1694 err
= do_request_fw(dev
, filename
, &fw
->initvals_band
);
1702 b43_print_fw_helptext(dev
->wl
);
1707 b43err(dev
->wl
, "No microcode available for core rev %u\n", rev
);
1712 b43err(dev
->wl
, "No PCM available for core rev %u\n", rev
);
1717 b43err(dev
->wl
, "No Initial Values firmware file for PHY %u, "
1718 "core rev %u\n", dev
->phy
.type
, rev
);
1722 b43_release_firmware(dev
);
1726 static int b43_upload_microcode(struct b43_wldev
*dev
)
1728 const size_t hdr_len
= sizeof(struct b43_fw_header
);
1730 unsigned int i
, len
;
1731 u16 fwrev
, fwpatch
, fwdate
, fwtime
;
1735 /* Upload Microcode. */
1736 data
= (__be32
*) (dev
->fw
.ucode
->data
+ hdr_len
);
1737 len
= (dev
->fw
.ucode
->size
- hdr_len
) / sizeof(__be32
);
1738 b43_shm_control_word(dev
, B43_SHM_UCODE
| B43_SHM_AUTOINC_W
, 0x0000);
1739 for (i
= 0; i
< len
; i
++) {
1740 b43_write32(dev
, B43_MMIO_SHM_DATA
, be32_to_cpu(data
[i
]));
1745 /* Upload PCM data. */
1746 data
= (__be32
*) (dev
->fw
.pcm
->data
+ hdr_len
);
1747 len
= (dev
->fw
.pcm
->size
- hdr_len
) / sizeof(__be32
);
1748 b43_shm_control_word(dev
, B43_SHM_HW
, 0x01EA);
1749 b43_write32(dev
, B43_MMIO_SHM_DATA
, 0x00004000);
1750 /* No need for autoinc bit in SHM_HW */
1751 b43_shm_control_word(dev
, B43_SHM_HW
, 0x01EB);
1752 for (i
= 0; i
< len
; i
++) {
1753 b43_write32(dev
, B43_MMIO_SHM_DATA
, be32_to_cpu(data
[i
]));
1758 b43_write32(dev
, B43_MMIO_GEN_IRQ_REASON
, B43_IRQ_ALL
);
1759 b43_write32(dev
, B43_MMIO_MACCTL
,
1760 B43_MACCTL_PSM_RUN
|
1761 B43_MACCTL_IHR_ENABLED
| B43_MACCTL_INFRA
);
1763 /* Wait for the microcode to load and respond */
1766 tmp
= b43_read32(dev
, B43_MMIO_GEN_IRQ_REASON
);
1767 if (tmp
== B43_IRQ_MAC_SUSPENDED
)
1771 b43err(dev
->wl
, "Microcode not responding\n");
1772 b43_print_fw_helptext(dev
->wl
);
1778 b43_read32(dev
, B43_MMIO_GEN_IRQ_REASON
); /* dummy read */
1780 /* Get and check the revisions. */
1781 fwrev
= b43_shm_read16(dev
, B43_SHM_SHARED
, B43_SHM_SH_UCODEREV
);
1782 fwpatch
= b43_shm_read16(dev
, B43_SHM_SHARED
, B43_SHM_SH_UCODEPATCH
);
1783 fwdate
= b43_shm_read16(dev
, B43_SHM_SHARED
, B43_SHM_SH_UCODEDATE
);
1784 fwtime
= b43_shm_read16(dev
, B43_SHM_SHARED
, B43_SHM_SH_UCODETIME
);
1786 if (fwrev
<= 0x128) {
1787 b43err(dev
->wl
, "YOUR FIRMWARE IS TOO OLD. Firmware from "
1788 "binary drivers older than version 4.x is unsupported. "
1789 "You must upgrade your firmware files.\n");
1790 b43_print_fw_helptext(dev
->wl
);
1791 b43_write32(dev
, B43_MMIO_MACCTL
, 0);
1795 b43dbg(dev
->wl
, "Loading firmware version %u.%u "
1796 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n",
1798 (fwdate
>> 12) & 0xF, (fwdate
>> 8) & 0xF, fwdate
& 0xFF,
1799 (fwtime
>> 11) & 0x1F, (fwtime
>> 5) & 0x3F, fwtime
& 0x1F);
1801 dev
->fw
.rev
= fwrev
;
1802 dev
->fw
.patch
= fwpatch
;
1808 static int b43_write_initvals(struct b43_wldev
*dev
,
1809 const struct b43_iv
*ivals
,
1813 const struct b43_iv
*iv
;
1818 BUILD_BUG_ON(sizeof(struct b43_iv
) != 6);
1820 for (i
= 0; i
< count
; i
++) {
1821 if (array_size
< sizeof(iv
->offset_size
))
1823 array_size
-= sizeof(iv
->offset_size
);
1824 offset
= be16_to_cpu(iv
->offset_size
);
1825 bit32
= !!(offset
& B43_IV_32BIT
);
1826 offset
&= B43_IV_OFFSET_MASK
;
1827 if (offset
>= 0x1000)
1832 if (array_size
< sizeof(iv
->data
.d32
))
1834 array_size
-= sizeof(iv
->data
.d32
);
1836 value
= be32_to_cpu(get_unaligned(&iv
->data
.d32
));
1837 b43_write32(dev
, offset
, value
);
1839 iv
= (const struct b43_iv
*)((const uint8_t *)iv
+
1845 if (array_size
< sizeof(iv
->data
.d16
))
1847 array_size
-= sizeof(iv
->data
.d16
);
1849 value
= be16_to_cpu(iv
->data
.d16
);
1850 b43_write16(dev
, offset
, value
);
1852 iv
= (const struct b43_iv
*)((const uint8_t *)iv
+
1863 b43err(dev
->wl
, "Initial Values Firmware file-format error.\n");
1864 b43_print_fw_helptext(dev
->wl
);
1869 static int b43_upload_initvals(struct b43_wldev
*dev
)
1871 const size_t hdr_len
= sizeof(struct b43_fw_header
);
1872 const struct b43_fw_header
*hdr
;
1873 struct b43_firmware
*fw
= &dev
->fw
;
1874 const struct b43_iv
*ivals
;
1878 hdr
= (const struct b43_fw_header
*)(fw
->initvals
->data
);
1879 ivals
= (const struct b43_iv
*)(fw
->initvals
->data
+ hdr_len
);
1880 count
= be32_to_cpu(hdr
->size
);
1881 err
= b43_write_initvals(dev
, ivals
, count
,
1882 fw
->initvals
->size
- hdr_len
);
1885 if (fw
->initvals_band
) {
1886 hdr
= (const struct b43_fw_header
*)(fw
->initvals_band
->data
);
1887 ivals
= (const struct b43_iv
*)(fw
->initvals_band
->data
+ hdr_len
);
1888 count
= be32_to_cpu(hdr
->size
);
1889 err
= b43_write_initvals(dev
, ivals
, count
,
1890 fw
->initvals_band
->size
- hdr_len
);
1899 /* Initialize the GPIOs
1900 * http://bcm-specs.sipsolutions.net/GPIO
1902 static int b43_gpio_init(struct b43_wldev
*dev
)
1904 struct ssb_bus
*bus
= dev
->dev
->bus
;
1905 struct ssb_device
*gpiodev
, *pcidev
= NULL
;
1908 b43_write32(dev
, B43_MMIO_MACCTL
, b43_read32(dev
, B43_MMIO_MACCTL
)
1909 & ~B43_MACCTL_GPOUTSMSK
);
1911 b43_write16(dev
, B43_MMIO_GPIO_MASK
, b43_read16(dev
, B43_MMIO_GPIO_MASK
)
1916 if (dev
->dev
->bus
->chip_id
== 0x4301) {
1920 if (0 /* FIXME: conditional unknown */ ) {
1921 b43_write16(dev
, B43_MMIO_GPIO_MASK
,
1922 b43_read16(dev
, B43_MMIO_GPIO_MASK
)
1927 if (dev
->dev
->bus
->sprom
.boardflags_lo
& B43_BFL_PACTRL
) {
1928 b43_write16(dev
, B43_MMIO_GPIO_MASK
,
1929 b43_read16(dev
, B43_MMIO_GPIO_MASK
)
1934 if (dev
->dev
->id
.revision
>= 2)
1935 mask
|= 0x0010; /* FIXME: This is redundant. */
1937 #ifdef CONFIG_SSB_DRIVER_PCICORE
1938 pcidev
= bus
->pcicore
.dev
;
1940 gpiodev
= bus
->chipco
.dev
? : pcidev
;
1943 ssb_write32(gpiodev
, B43_GPIO_CONTROL
,
1944 (ssb_read32(gpiodev
, B43_GPIO_CONTROL
)
1950 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1951 static void b43_gpio_cleanup(struct b43_wldev
*dev
)
1953 struct ssb_bus
*bus
= dev
->dev
->bus
;
1954 struct ssb_device
*gpiodev
, *pcidev
= NULL
;
1956 #ifdef CONFIG_SSB_DRIVER_PCICORE
1957 pcidev
= bus
->pcicore
.dev
;
1959 gpiodev
= bus
->chipco
.dev
? : pcidev
;
1962 ssb_write32(gpiodev
, B43_GPIO_CONTROL
, 0);
1965 /* http://bcm-specs.sipsolutions.net/EnableMac */
1966 void b43_mac_enable(struct b43_wldev
*dev
)
1968 dev
->mac_suspended
--;
1969 B43_WARN_ON(dev
->mac_suspended
< 0);
1970 B43_WARN_ON(irqs_disabled());
1971 if (dev
->mac_suspended
== 0) {
1972 b43_write32(dev
, B43_MMIO_MACCTL
,
1973 b43_read32(dev
, B43_MMIO_MACCTL
)
1974 | B43_MACCTL_ENABLED
);
1975 b43_write32(dev
, B43_MMIO_GEN_IRQ_REASON
,
1976 B43_IRQ_MAC_SUSPENDED
);
1978 b43_read32(dev
, B43_MMIO_MACCTL
);
1979 b43_read32(dev
, B43_MMIO_GEN_IRQ_REASON
);
1980 b43_power_saving_ctl_bits(dev
, 0);
1982 /* Re-enable IRQs. */
1983 spin_lock_irq(&dev
->wl
->irq_lock
);
1984 b43_interrupt_enable(dev
, dev
->irq_savedstate
);
1985 spin_unlock_irq(&dev
->wl
->irq_lock
);
1989 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1990 void b43_mac_suspend(struct b43_wldev
*dev
)
1996 B43_WARN_ON(irqs_disabled());
1997 B43_WARN_ON(dev
->mac_suspended
< 0);
1999 if (dev
->mac_suspended
== 0) {
2000 /* Mask IRQs before suspending MAC. Otherwise
2001 * the MAC stays busy and won't suspend. */
2002 spin_lock_irq(&dev
->wl
->irq_lock
);
2003 tmp
= b43_interrupt_disable(dev
, B43_IRQ_ALL
);
2004 spin_unlock_irq(&dev
->wl
->irq_lock
);
2005 b43_synchronize_irq(dev
);
2006 dev
->irq_savedstate
= tmp
;
2008 b43_power_saving_ctl_bits(dev
, B43_PS_AWAKE
);
2009 b43_write32(dev
, B43_MMIO_MACCTL
,
2010 b43_read32(dev
, B43_MMIO_MACCTL
)
2011 & ~B43_MACCTL_ENABLED
);
2012 /* force pci to flush the write */
2013 b43_read32(dev
, B43_MMIO_MACCTL
);
2014 for (i
= 40; i
; i
--) {
2015 tmp
= b43_read32(dev
, B43_MMIO_GEN_IRQ_REASON
);
2016 if (tmp
& B43_IRQ_MAC_SUSPENDED
)
2020 b43err(dev
->wl
, "MAC suspend failed\n");
2023 dev
->mac_suspended
++;
2026 static void b43_adjust_opmode(struct b43_wldev
*dev
)
2028 struct b43_wl
*wl
= dev
->wl
;
2032 ctl
= b43_read32(dev
, B43_MMIO_MACCTL
);
2033 /* Reset status to STA infrastructure mode. */
2034 ctl
&= ~B43_MACCTL_AP
;
2035 ctl
&= ~B43_MACCTL_KEEP_CTL
;
2036 ctl
&= ~B43_MACCTL_KEEP_BADPLCP
;
2037 ctl
&= ~B43_MACCTL_KEEP_BAD
;
2038 ctl
&= ~B43_MACCTL_PROMISC
;
2039 ctl
&= ~B43_MACCTL_BEACPROMISC
;
2040 ctl
|= B43_MACCTL_INFRA
;
2042 if (b43_is_mode(wl
, IEEE80211_IF_TYPE_AP
))
2043 ctl
|= B43_MACCTL_AP
;
2044 else if (b43_is_mode(wl
, IEEE80211_IF_TYPE_IBSS
))
2045 ctl
&= ~B43_MACCTL_INFRA
;
2047 if (wl
->filter_flags
& FIF_CONTROL
)
2048 ctl
|= B43_MACCTL_KEEP_CTL
;
2049 if (wl
->filter_flags
& FIF_FCSFAIL
)
2050 ctl
|= B43_MACCTL_KEEP_BAD
;
2051 if (wl
->filter_flags
& FIF_PLCPFAIL
)
2052 ctl
|= B43_MACCTL_KEEP_BADPLCP
;
2053 if (wl
->filter_flags
& FIF_PROMISC_IN_BSS
)
2054 ctl
|= B43_MACCTL_PROMISC
;
2055 if (wl
->filter_flags
& FIF_BCN_PRBRESP_PROMISC
)
2056 ctl
|= B43_MACCTL_BEACPROMISC
;
2058 /* Workaround: On old hardware the HW-MAC-address-filter
2059 * doesn't work properly, so always run promisc in filter
2060 * it in software. */
2061 if (dev
->dev
->id
.revision
<= 4)
2062 ctl
|= B43_MACCTL_PROMISC
;
2064 b43_write32(dev
, B43_MMIO_MACCTL
, ctl
);
2067 if ((ctl
& B43_MACCTL_INFRA
) && !(ctl
& B43_MACCTL_AP
)) {
2068 if (dev
->dev
->bus
->chip_id
== 0x4306 &&
2069 dev
->dev
->bus
->chip_rev
== 3)
2074 b43_write16(dev
, 0x612, cfp_pretbtt
);
2077 static void b43_rate_memory_write(struct b43_wldev
*dev
, u16 rate
, int is_ofdm
)
2083 offset
+= (b43_plcp_get_ratecode_ofdm(rate
) & 0x000F) * 2;
2086 offset
+= (b43_plcp_get_ratecode_cck(rate
) & 0x000F) * 2;
2088 b43_shm_write16(dev
, B43_SHM_SHARED
, offset
+ 0x20,
2089 b43_shm_read16(dev
, B43_SHM_SHARED
, offset
));
2092 static void b43_rate_memory_init(struct b43_wldev
*dev
)
2094 switch (dev
->phy
.type
) {
2097 b43_rate_memory_write(dev
, B43_OFDM_RATE_6MB
, 1);
2098 b43_rate_memory_write(dev
, B43_OFDM_RATE_12MB
, 1);
2099 b43_rate_memory_write(dev
, B43_OFDM_RATE_18MB
, 1);
2100 b43_rate_memory_write(dev
, B43_OFDM_RATE_24MB
, 1);
2101 b43_rate_memory_write(dev
, B43_OFDM_RATE_36MB
, 1);
2102 b43_rate_memory_write(dev
, B43_OFDM_RATE_48MB
, 1);
2103 b43_rate_memory_write(dev
, B43_OFDM_RATE_54MB
, 1);
2104 if (dev
->phy
.type
== B43_PHYTYPE_A
)
2108 b43_rate_memory_write(dev
, B43_CCK_RATE_1MB
, 0);
2109 b43_rate_memory_write(dev
, B43_CCK_RATE_2MB
, 0);
2110 b43_rate_memory_write(dev
, B43_CCK_RATE_5MB
, 0);
2111 b43_rate_memory_write(dev
, B43_CCK_RATE_11MB
, 0);
2118 /* Set the TX-Antenna for management frames sent by firmware. */
2119 static void b43_mgmtframe_txantenna(struct b43_wldev
*dev
, int antenna
)
2126 ant
|= B43_TX4_PHY_ANT0
;
2129 ant
|= B43_TX4_PHY_ANT1
;
2131 case B43_ANTENNA_AUTO
:
2132 ant
|= B43_TX4_PHY_ANTLAST
;
2138 /* FIXME We also need to set the other flags of the PHY control field somewhere. */
2141 tmp
= b43_shm_read16(dev
, B43_SHM_SHARED
, B43_SHM_SH_BEACPHYCTL
);
2142 tmp
= (tmp
& ~B43_TX4_PHY_ANT
) | ant
;
2143 b43_shm_write16(dev
, B43_SHM_SHARED
, B43_SHM_SH_BEACPHYCTL
, tmp
);
2145 tmp
= b43_shm_read16(dev
, B43_SHM_SHARED
, B43_SHM_SH_ACKCTSPHYCTL
);
2146 tmp
= (tmp
& ~B43_TX4_PHY_ANT
) | ant
;
2147 b43_shm_write16(dev
, B43_SHM_SHARED
, B43_SHM_SH_ACKCTSPHYCTL
, tmp
);
2148 /* For Probe Resposes */
2149 tmp
= b43_shm_read16(dev
, B43_SHM_SHARED
, B43_SHM_SH_PRPHYCTL
);
2150 tmp
= (tmp
& ~B43_TX4_PHY_ANT
) | ant
;
2151 b43_shm_write16(dev
, B43_SHM_SHARED
, B43_SHM_SH_PRPHYCTL
, tmp
);
2154 /* This is the opposite of b43_chip_init() */
2155 static void b43_chip_exit(struct b43_wldev
*dev
)
2157 b43_radio_turn_off(dev
, 1);
2158 b43_gpio_cleanup(dev
);
2159 /* firmware is released later */
2162 /* Initialize the chip
2163 * http://bcm-specs.sipsolutions.net/ChipInit
2165 static int b43_chip_init(struct b43_wldev
*dev
)
2167 struct b43_phy
*phy
= &dev
->phy
;
2172 b43_write32(dev
, B43_MMIO_MACCTL
,
2173 B43_MACCTL_PSM_JMP0
| B43_MACCTL_IHR_ENABLED
);
2175 err
= b43_request_firmware(dev
);
2178 err
= b43_upload_microcode(dev
);
2180 goto out
; /* firmware is released later */
2182 err
= b43_gpio_init(dev
);
2184 goto out
; /* firmware is released later */
2186 err
= b43_upload_initvals(dev
);
2188 goto err_gpio_clean
;
2189 b43_radio_turn_on(dev
);
2191 b43_write16(dev
, 0x03E6, 0x0000);
2192 err
= b43_phy_init(dev
);
2196 /* Select initial Interference Mitigation. */
2197 tmp
= phy
->interfmode
;
2198 phy
->interfmode
= B43_INTERFMODE_NONE
;
2199 b43_radio_set_interference_mitigation(dev
, tmp
);
2201 b43_set_rx_antenna(dev
, B43_ANTENNA_DEFAULT
);
2202 b43_mgmtframe_txantenna(dev
, B43_ANTENNA_DEFAULT
);
2204 if (phy
->type
== B43_PHYTYPE_B
) {
2205 value16
= b43_read16(dev
, 0x005E);
2207 b43_write16(dev
, 0x005E, value16
);
2209 b43_write32(dev
, 0x0100, 0x01000000);
2210 if (dev
->dev
->id
.revision
< 5)
2211 b43_write32(dev
, 0x010C, 0x01000000);
2213 b43_write32(dev
, B43_MMIO_MACCTL
, b43_read32(dev
, B43_MMIO_MACCTL
)
2214 & ~B43_MACCTL_INFRA
);
2215 b43_write32(dev
, B43_MMIO_MACCTL
, b43_read32(dev
, B43_MMIO_MACCTL
)
2216 | B43_MACCTL_INFRA
);
2218 if (b43_using_pio(dev
)) {
2219 b43_write32(dev
, 0x0210, 0x00000100);
2220 b43_write32(dev
, 0x0230, 0x00000100);
2221 b43_write32(dev
, 0x0250, 0x00000100);
2222 b43_write32(dev
, 0x0270, 0x00000100);
2223 b43_shm_write16(dev
, B43_SHM_SHARED
, 0x0034, 0x0000);
2226 /* Probe Response Timeout value */
2227 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2228 b43_shm_write16(dev
, B43_SHM_SHARED
, 0x0074, 0x0000);
2230 /* Initially set the wireless operation mode. */
2231 b43_adjust_opmode(dev
);
2233 if (dev
->dev
->id
.revision
< 3) {
2234 b43_write16(dev
, 0x060E, 0x0000);
2235 b43_write16(dev
, 0x0610, 0x8000);
2236 b43_write16(dev
, 0x0604, 0x0000);
2237 b43_write16(dev
, 0x0606, 0x0200);
2239 b43_write32(dev
, 0x0188, 0x80000000);
2240 b43_write32(dev
, 0x018C, 0x02000000);
2242 b43_write32(dev
, B43_MMIO_GEN_IRQ_REASON
, 0x00004000);
2243 b43_write32(dev
, B43_MMIO_DMA0_IRQ_MASK
, 0x0001DC00);
2244 b43_write32(dev
, B43_MMIO_DMA1_IRQ_MASK
, 0x0000DC00);
2245 b43_write32(dev
, B43_MMIO_DMA2_IRQ_MASK
, 0x0000DC00);
2246 b43_write32(dev
, B43_MMIO_DMA3_IRQ_MASK
, 0x0001DC00);
2247 b43_write32(dev
, B43_MMIO_DMA4_IRQ_MASK
, 0x0000DC00);
2248 b43_write32(dev
, B43_MMIO_DMA5_IRQ_MASK
, 0x0000DC00);
2250 value32
= ssb_read32(dev
->dev
, SSB_TMSLOW
);
2251 value32
|= 0x00100000;
2252 ssb_write32(dev
->dev
, SSB_TMSLOW
, value32
);
2254 b43_write16(dev
, B43_MMIO_POWERUP_DELAY
,
2255 dev
->dev
->bus
->chipco
.fast_pwrup_delay
);
2257 /* OFDM address caching. */
2258 phy
->ofdm_valid
= 0;
2261 b43dbg(dev
->wl
, "Chip initialized\n");
2266 b43_radio_turn_off(dev
, 1);
2268 b43_gpio_cleanup(dev
);
2272 static void b43_periodic_every120sec(struct b43_wldev
*dev
)
2274 struct b43_phy
*phy
= &dev
->phy
;
2276 if (phy
->type
!= B43_PHYTYPE_G
|| phy
->rev
< 2)
2279 b43_mac_suspend(dev
);
2280 b43_lo_g_measure(dev
);
2281 b43_mac_enable(dev
);
2282 if (b43_has_hardware_pctl(phy
))
2283 b43_lo_g_ctl_mark_all_unused(dev
);
2286 static void b43_periodic_every60sec(struct b43_wldev
*dev
)
2288 struct b43_phy
*phy
= &dev
->phy
;
2290 if (!b43_has_hardware_pctl(phy
))
2291 b43_lo_g_ctl_mark_all_unused(dev
);
2292 if (dev
->dev
->bus
->sprom
.boardflags_lo
& B43_BFL_RSSI
) {
2293 b43_mac_suspend(dev
);
2294 b43_calc_nrssi_slope(dev
);
2295 if ((phy
->radio_ver
== 0x2050) && (phy
->radio_rev
== 8)) {
2296 u8 old_chan
= phy
->channel
;
2298 /* VCO Calibration */
2300 b43_radio_selectchannel(dev
, 1, 0);
2302 b43_radio_selectchannel(dev
, 13, 0);
2303 b43_radio_selectchannel(dev
, old_chan
, 0);
2305 b43_mac_enable(dev
);
2309 static void b43_periodic_every30sec(struct b43_wldev
*dev
)
2311 /* Update device statistics. */
2312 b43_calculate_link_quality(dev
);
2315 static void b43_periodic_every15sec(struct b43_wldev
*dev
)
2317 struct b43_phy
*phy
= &dev
->phy
;
2319 if (phy
->type
== B43_PHYTYPE_G
) {
2320 //TODO: update_aci_moving_average
2321 if (phy
->aci_enable
&& phy
->aci_wlan_automatic
) {
2322 b43_mac_suspend(dev
);
2323 if (!phy
->aci_enable
&& 1 /*TODO: not scanning? */ ) {
2324 if (0 /*TODO: bunch of conditions */ ) {
2325 b43_radio_set_interference_mitigation
2326 (dev
, B43_INTERFMODE_MANUALWLAN
);
2328 } else if (1 /*TODO*/) {
2330 if ((aci_average > 1000) && !(b43_radio_aci_scan(dev))) {
2331 b43_radio_set_interference_mitigation(dev,
2332 B43_INTERFMODE_NONE);
2336 b43_mac_enable(dev
);
2337 } else if (phy
->interfmode
== B43_INTERFMODE_NONWLAN
&&
2339 //TODO: implement rev1 workaround
2342 b43_phy_xmitpower(dev
); //FIXME: unless scanning?
2343 //TODO for APHY (temperature?)
2346 static void do_periodic_work(struct b43_wldev
*dev
)
2350 state
= dev
->periodic_state
;
2352 b43_periodic_every120sec(dev
);
2354 b43_periodic_every60sec(dev
);
2356 b43_periodic_every30sec(dev
);
2357 b43_periodic_every15sec(dev
);
2360 /* Periodic work locking policy:
2361 * The whole periodic work handler is protected by
2362 * wl->mutex. If another lock is needed somewhere in the
2363 * pwork callchain, it's aquired in-place, where it's needed.
2365 static void b43_periodic_work_handler(struct work_struct
*work
)
2367 struct b43_wldev
*dev
= container_of(work
, struct b43_wldev
,
2368 periodic_work
.work
);
2369 struct b43_wl
*wl
= dev
->wl
;
2370 unsigned long delay
;
2372 mutex_lock(&wl
->mutex
);
2374 if (unlikely(b43_status(dev
) != B43_STAT_STARTED
))
2376 if (b43_debug(dev
, B43_DBG_PWORK_STOP
))
2379 do_periodic_work(dev
);
2381 dev
->periodic_state
++;
2383 if (b43_debug(dev
, B43_DBG_PWORK_FAST
))
2384 delay
= msecs_to_jiffies(50);
2386 delay
= round_jiffies_relative(HZ
* 15);
2387 queue_delayed_work(wl
->hw
->workqueue
, &dev
->periodic_work
, delay
);
2389 mutex_unlock(&wl
->mutex
);
2392 static void b43_periodic_tasks_setup(struct b43_wldev
*dev
)
2394 struct delayed_work
*work
= &dev
->periodic_work
;
2396 dev
->periodic_state
= 0;
2397 INIT_DELAYED_WORK(work
, b43_periodic_work_handler
);
2398 queue_delayed_work(dev
->wl
->hw
->workqueue
, work
, 0);
2401 /* Validate access to the chip (SHM) */
2402 static int b43_validate_chipaccess(struct b43_wldev
*dev
)
2407 shm_backup
= b43_shm_read32(dev
, B43_SHM_SHARED
, 0);
2408 b43_shm_write32(dev
, B43_SHM_SHARED
, 0, 0xAA5555AA);
2409 if (b43_shm_read32(dev
, B43_SHM_SHARED
, 0) != 0xAA5555AA)
2411 b43_shm_write32(dev
, B43_SHM_SHARED
, 0, 0x55AAAA55);
2412 if (b43_shm_read32(dev
, B43_SHM_SHARED
, 0) != 0x55AAAA55)
2414 b43_shm_write32(dev
, B43_SHM_SHARED
, 0, shm_backup
);
2416 value
= b43_read32(dev
, B43_MMIO_MACCTL
);
2417 if ((value
| B43_MACCTL_GMODE
) !=
2418 (B43_MACCTL_GMODE
| B43_MACCTL_IHR_ENABLED
))
2421 value
= b43_read32(dev
, B43_MMIO_GEN_IRQ_REASON
);
2427 b43err(dev
->wl
, "Failed to validate the chipaccess\n");
2431 static void b43_security_init(struct b43_wldev
*dev
)
2433 dev
->max_nr_keys
= (dev
->dev
->id
.revision
>= 5) ? 58 : 20;
2434 B43_WARN_ON(dev
->max_nr_keys
> ARRAY_SIZE(dev
->key
));
2435 dev
->ktp
= b43_shm_read16(dev
, B43_SHM_SHARED
, B43_SHM_SH_KTP
);
2436 /* KTP is a word address, but we address SHM bytewise.
2437 * So multiply by two.
2440 if (dev
->dev
->id
.revision
>= 5) {
2441 /* Number of RCMTA address slots */
2442 b43_write16(dev
, B43_MMIO_RCMTA_COUNT
, dev
->max_nr_keys
- 8);
2444 b43_clear_keys(dev
);
2447 static int b43_rng_read(struct hwrng
*rng
, u32
* data
)
2449 struct b43_wl
*wl
= (struct b43_wl
*)rng
->priv
;
2450 unsigned long flags
;
2452 /* Don't take wl->mutex here, as it could deadlock with
2453 * hwrng internal locking. It's not needed to take
2454 * wl->mutex here, anyway. */
2456 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2457 *data
= b43_read16(wl
->current_dev
, B43_MMIO_RNG
);
2458 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2460 return (sizeof(u16
));
2463 static void b43_rng_exit(struct b43_wl
*wl
)
2465 if (wl
->rng_initialized
)
2466 hwrng_unregister(&wl
->rng
);
2469 static int b43_rng_init(struct b43_wl
*wl
)
2473 snprintf(wl
->rng_name
, ARRAY_SIZE(wl
->rng_name
),
2474 "%s_%s", KBUILD_MODNAME
, wiphy_name(wl
->hw
->wiphy
));
2475 wl
->rng
.name
= wl
->rng_name
;
2476 wl
->rng
.data_read
= b43_rng_read
;
2477 wl
->rng
.priv
= (unsigned long)wl
;
2478 wl
->rng_initialized
= 1;
2479 err
= hwrng_register(&wl
->rng
);
2481 wl
->rng_initialized
= 0;
2482 b43err(wl
, "Failed to register the random "
2483 "number generator (%d)\n", err
);
2489 static int b43_op_tx(struct ieee80211_hw
*hw
,
2490 struct sk_buff
*skb
,
2491 struct ieee80211_tx_control
*ctl
)
2493 struct b43_wl
*wl
= hw_to_b43_wl(hw
);
2494 struct b43_wldev
*dev
= wl
->current_dev
;
2496 unsigned long flags
;
2500 if (unlikely(b43_status(dev
) < B43_STAT_STARTED
))
2502 /* DMA-TX is done without a global lock. */
2503 if (b43_using_pio(dev
)) {
2504 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2505 err
= b43_pio_tx(dev
, skb
, ctl
);
2506 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2508 err
= b43_dma_tx(dev
, skb
, ctl
);
2511 return NETDEV_TX_BUSY
;
2512 return NETDEV_TX_OK
;
2515 static int b43_op_conf_tx(struct ieee80211_hw
*hw
,
2517 const struct ieee80211_tx_queue_params
*params
)
2522 static int b43_op_get_tx_stats(struct ieee80211_hw
*hw
,
2523 struct ieee80211_tx_queue_stats
*stats
)
2525 struct b43_wl
*wl
= hw_to_b43_wl(hw
);
2526 struct b43_wldev
*dev
= wl
->current_dev
;
2527 unsigned long flags
;
2532 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2533 if (likely(b43_status(dev
) >= B43_STAT_STARTED
)) {
2534 if (b43_using_pio(dev
))
2535 b43_pio_get_tx_stats(dev
, stats
);
2537 b43_dma_get_tx_stats(dev
, stats
);
2540 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2545 static int b43_op_get_stats(struct ieee80211_hw
*hw
,
2546 struct ieee80211_low_level_stats
*stats
)
2548 struct b43_wl
*wl
= hw_to_b43_wl(hw
);
2549 unsigned long flags
;
2551 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2552 memcpy(stats
, &wl
->ieee_stats
, sizeof(*stats
));
2553 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2558 static const char *phymode_to_string(unsigned int phymode
)
2573 static int find_wldev_for_phymode(struct b43_wl
*wl
,
2574 unsigned int phymode
,
2575 struct b43_wldev
**dev
, bool * gmode
)
2577 struct b43_wldev
*d
;
2579 list_for_each_entry(d
, &wl
->devlist
, list
) {
2580 if (d
->phy
.possible_phymodes
& phymode
) {
2581 /* Ok, this device supports the PHY-mode.
2582 * Now figure out how the gmode bit has to be
2583 * set to support it. */
2584 if (phymode
== B43_PHYMODE_A
)
2597 static void b43_put_phy_into_reset(struct b43_wldev
*dev
)
2599 struct ssb_device
*sdev
= dev
->dev
;
2602 tmslow
= ssb_read32(sdev
, SSB_TMSLOW
);
2603 tmslow
&= ~B43_TMSLOW_GMODE
;
2604 tmslow
|= B43_TMSLOW_PHYRESET
;
2605 tmslow
|= SSB_TMSLOW_FGC
;
2606 ssb_write32(sdev
, SSB_TMSLOW
, tmslow
);
2609 tmslow
= ssb_read32(sdev
, SSB_TMSLOW
);
2610 tmslow
&= ~SSB_TMSLOW_FGC
;
2611 tmslow
|= B43_TMSLOW_PHYRESET
;
2612 ssb_write32(sdev
, SSB_TMSLOW
, tmslow
);
2616 /* Expects wl->mutex locked */
2617 static int b43_switch_phymode(struct b43_wl
*wl
, unsigned int new_mode
)
2619 struct b43_wldev
*up_dev
;
2620 struct b43_wldev
*down_dev
;
2625 err
= find_wldev_for_phymode(wl
, new_mode
, &up_dev
, &gmode
);
2627 b43err(wl
, "Could not find a device for %s-PHY mode\n",
2628 phymode_to_string(new_mode
));
2631 if ((up_dev
== wl
->current_dev
) &&
2632 (!!wl
->current_dev
->phy
.gmode
== !!gmode
)) {
2633 /* This device is already running. */
2636 b43dbg(wl
, "Reconfiguring PHYmode to %s-PHY\n",
2637 phymode_to_string(new_mode
));
2638 down_dev
= wl
->current_dev
;
2640 prev_status
= b43_status(down_dev
);
2641 /* Shutdown the currently running core. */
2642 if (prev_status
>= B43_STAT_STARTED
)
2643 b43_wireless_core_stop(down_dev
);
2644 if (prev_status
>= B43_STAT_INITIALIZED
)
2645 b43_wireless_core_exit(down_dev
);
2647 if (down_dev
!= up_dev
) {
2648 /* We switch to a different core, so we put PHY into
2649 * RESET on the old core. */
2650 b43_put_phy_into_reset(down_dev
);
2653 /* Now start the new core. */
2654 up_dev
->phy
.gmode
= gmode
;
2655 if (prev_status
>= B43_STAT_INITIALIZED
) {
2656 err
= b43_wireless_core_init(up_dev
);
2658 b43err(wl
, "Fatal: Could not initialize device for "
2659 "newly selected %s-PHY mode\n",
2660 phymode_to_string(new_mode
));
2664 if (prev_status
>= B43_STAT_STARTED
) {
2665 err
= b43_wireless_core_start(up_dev
);
2667 b43err(wl
, "Fatal: Coult not start device for "
2668 "newly selected %s-PHY mode\n",
2669 phymode_to_string(new_mode
));
2670 b43_wireless_core_exit(up_dev
);
2674 B43_WARN_ON(b43_status(up_dev
) != prev_status
);
2676 wl
->current_dev
= up_dev
;
2680 /* Whoops, failed to init the new core. No core is operating now. */
2681 wl
->current_dev
= NULL
;
2685 static int b43_antenna_from_ieee80211(u8 antenna
)
2688 case 0: /* default/diversity */
2689 return B43_ANTENNA_DEFAULT
;
2690 case 1: /* Antenna 0 */
2691 return B43_ANTENNA0
;
2692 case 2: /* Antenna 1 */
2693 return B43_ANTENNA1
;
2695 return B43_ANTENNA_DEFAULT
;
2699 static int b43_op_config(struct ieee80211_hw
*hw
, struct ieee80211_conf
*conf
)
2701 struct b43_wl
*wl
= hw_to_b43_wl(hw
);
2702 struct b43_wldev
*dev
;
2703 struct b43_phy
*phy
;
2704 unsigned long flags
;
2705 unsigned int new_phymode
= 0xFFFF;
2711 antenna_tx
= b43_antenna_from_ieee80211(conf
->antenna_sel_tx
);
2712 antenna_rx
= b43_antenna_from_ieee80211(conf
->antenna_sel_rx
);
2714 mutex_lock(&wl
->mutex
);
2716 /* Switch the PHY mode (if necessary). */
2717 switch (conf
->phymode
) {
2718 case MODE_IEEE80211A
:
2719 new_phymode
= B43_PHYMODE_A
;
2721 case MODE_IEEE80211B
:
2722 new_phymode
= B43_PHYMODE_B
;
2724 case MODE_IEEE80211G
:
2725 new_phymode
= B43_PHYMODE_G
;
2730 err
= b43_switch_phymode(wl
, new_phymode
);
2732 goto out_unlock_mutex
;
2733 dev
= wl
->current_dev
;
2736 /* Disable IRQs while reconfiguring the device.
2737 * This makes it possible to drop the spinlock throughout
2738 * the reconfiguration process. */
2739 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2740 if (b43_status(dev
) < B43_STAT_STARTED
) {
2741 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2742 goto out_unlock_mutex
;
2744 savedirqs
= b43_interrupt_disable(dev
, B43_IRQ_ALL
);
2745 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2746 b43_synchronize_irq(dev
);
2748 /* Switch to the requested channel.
2749 * The firmware takes care of races with the TX handler. */
2750 if (conf
->channel_val
!= phy
->channel
)
2751 b43_radio_selectchannel(dev
, conf
->channel_val
, 0);
2753 /* Enable/Disable ShortSlot timing. */
2754 if ((!!(conf
->flags
& IEEE80211_CONF_SHORT_SLOT_TIME
)) !=
2756 B43_WARN_ON(phy
->type
!= B43_PHYTYPE_G
);
2757 if (conf
->flags
& IEEE80211_CONF_SHORT_SLOT_TIME
)
2758 b43_short_slot_timing_enable(dev
);
2760 b43_short_slot_timing_disable(dev
);
2763 dev
->wl
->radiotap_enabled
= !!(conf
->flags
& IEEE80211_CONF_RADIOTAP
);
2765 /* Adjust the desired TX power level. */
2766 if (conf
->power_level
!= 0) {
2767 if (conf
->power_level
!= phy
->power_level
) {
2768 phy
->power_level
= conf
->power_level
;
2769 b43_phy_xmitpower(dev
);
2773 /* Antennas for RX and management frame TX. */
2774 b43_mgmtframe_txantenna(dev
, antenna_tx
);
2775 b43_set_rx_antenna(dev
, antenna_rx
);
2777 /* Update templates for AP mode. */
2778 if (b43_is_mode(wl
, IEEE80211_IF_TYPE_AP
))
2779 b43_set_beacon_int(dev
, conf
->beacon_int
);
2781 if (!!conf
->radio_enabled
!= phy
->radio_on
) {
2782 if (conf
->radio_enabled
) {
2783 b43_radio_turn_on(dev
);
2784 b43info(dev
->wl
, "Radio turned on by software\n");
2785 if (!dev
->radio_hw_enable
) {
2786 b43info(dev
->wl
, "The hardware RF-kill button "
2787 "still turns the radio physically off. "
2788 "Press the button to turn it on.\n");
2791 b43_radio_turn_off(dev
, 0);
2792 b43info(dev
->wl
, "Radio turned off by software\n");
2796 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2797 b43_interrupt_enable(dev
, savedirqs
);
2799 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2801 mutex_unlock(&wl
->mutex
);
2806 static int b43_op_set_key(struct ieee80211_hw
*hw
, enum set_key_cmd cmd
,
2807 const u8
*local_addr
, const u8
*addr
,
2808 struct ieee80211_key_conf
*key
)
2810 struct b43_wl
*wl
= hw_to_b43_wl(hw
);
2811 struct b43_wldev
*dev
;
2812 unsigned long flags
;
2816 DECLARE_MAC_BUF(mac
);
2818 if (modparam_nohwcrypt
)
2819 return -ENOSPC
; /* User disabled HW-crypto */
2821 mutex_lock(&wl
->mutex
);
2822 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2824 dev
= wl
->current_dev
;
2826 if (!dev
|| b43_status(dev
) < B43_STAT_INITIALIZED
)
2832 if (key
->keylen
== 5)
2833 algorithm
= B43_SEC_ALGO_WEP40
;
2835 algorithm
= B43_SEC_ALGO_WEP104
;
2838 algorithm
= B43_SEC_ALGO_TKIP
;
2841 algorithm
= B43_SEC_ALGO_AES
;
2847 index
= (u8
) (key
->keyidx
);
2853 if (algorithm
== B43_SEC_ALGO_TKIP
) {
2854 /* FIXME: No TKIP hardware encryption for now. */
2859 if (is_broadcast_ether_addr(addr
)) {
2860 /* addr is FF:FF:FF:FF:FF:FF for default keys */
2861 err
= b43_key_write(dev
, index
, algorithm
,
2862 key
->key
, key
->keylen
, NULL
, key
);
2865 * either pairwise key or address is 00:00:00:00:00:00
2866 * for transmit-only keys
2868 err
= b43_key_write(dev
, -1, algorithm
,
2869 key
->key
, key
->keylen
, addr
, key
);
2874 if (algorithm
== B43_SEC_ALGO_WEP40
||
2875 algorithm
== B43_SEC_ALGO_WEP104
) {
2876 b43_hf_write(dev
, b43_hf_read(dev
) | B43_HF_USEDEFKEYS
);
2879 b43_hf_read(dev
) & ~B43_HF_USEDEFKEYS
);
2881 key
->flags
|= IEEE80211_KEY_FLAG_GENERATE_IV
;
2884 err
= b43_key_clear(dev
, key
->hw_key_idx
);
2893 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2894 mutex_unlock(&wl
->mutex
);
2896 b43dbg(wl
, "%s hardware based encryption for keyidx: %d, "
2898 cmd
== SET_KEY
? "Using" : "Disabling", key
->keyidx
,
2899 print_mac(mac
, addr
));
2904 static void b43_op_configure_filter(struct ieee80211_hw
*hw
,
2905 unsigned int changed
, unsigned int *fflags
,
2906 int mc_count
, struct dev_addr_list
*mc_list
)
2908 struct b43_wl
*wl
= hw_to_b43_wl(hw
);
2909 struct b43_wldev
*dev
= wl
->current_dev
;
2910 unsigned long flags
;
2917 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2918 *fflags
&= FIF_PROMISC_IN_BSS
|
2924 FIF_BCN_PRBRESP_PROMISC
;
2926 changed
&= FIF_PROMISC_IN_BSS
|
2932 FIF_BCN_PRBRESP_PROMISC
;
2934 wl
->filter_flags
= *fflags
;
2936 if (changed
&& b43_status(dev
) >= B43_STAT_INITIALIZED
)
2937 b43_adjust_opmode(dev
);
2938 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2941 static int b43_op_config_interface(struct ieee80211_hw
*hw
,
2943 struct ieee80211_if_conf
*conf
)
2945 struct b43_wl
*wl
= hw_to_b43_wl(hw
);
2946 struct b43_wldev
*dev
= wl
->current_dev
;
2947 unsigned long flags
;
2951 mutex_lock(&wl
->mutex
);
2952 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2953 B43_WARN_ON(wl
->if_id
!= if_id
);
2955 memcpy(wl
->bssid
, conf
->bssid
, ETH_ALEN
);
2957 memset(wl
->bssid
, 0, ETH_ALEN
);
2958 if (b43_status(dev
) >= B43_STAT_INITIALIZED
) {
2959 if (b43_is_mode(wl
, IEEE80211_IF_TYPE_AP
)) {
2960 B43_WARN_ON(conf
->type
!= IEEE80211_IF_TYPE_AP
);
2961 b43_set_ssid(dev
, conf
->ssid
, conf
->ssid_len
);
2963 b43_refresh_templates(dev
, conf
->beacon
);
2965 b43_write_mac_bssid_templates(dev
);
2967 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2968 mutex_unlock(&wl
->mutex
);
2973 /* Locking: wl->mutex */
2974 static void b43_wireless_core_stop(struct b43_wldev
*dev
)
2976 struct b43_wl
*wl
= dev
->wl
;
2977 unsigned long flags
;
2979 if (b43_status(dev
) < B43_STAT_STARTED
)
2982 /* Disable and sync interrupts. We must do this before than
2983 * setting the status to INITIALIZED, as the interrupt handler
2984 * won't care about IRQs then. */
2985 spin_lock_irqsave(&wl
->irq_lock
, flags
);
2986 dev
->irq_savedstate
= b43_interrupt_disable(dev
, B43_IRQ_ALL
);
2987 b43_read32(dev
, B43_MMIO_GEN_IRQ_MASK
); /* flush */
2988 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
2989 b43_synchronize_irq(dev
);
2991 b43_set_status(dev
, B43_STAT_INITIALIZED
);
2993 mutex_unlock(&wl
->mutex
);
2994 /* Must unlock as it would otherwise deadlock. No races here.
2995 * Cancel the possibly running self-rearming periodic work. */
2996 cancel_delayed_work_sync(&dev
->periodic_work
);
2997 mutex_lock(&wl
->mutex
);
2999 ieee80211_stop_queues(wl
->hw
); //FIXME this could cause a deadlock, as mac80211 seems buggy.
3001 b43_mac_suspend(dev
);
3002 free_irq(dev
->dev
->irq
, dev
);
3003 b43dbg(wl
, "Wireless interface stopped\n");
3006 /* Locking: wl->mutex */
3007 static int b43_wireless_core_start(struct b43_wldev
*dev
)
3011 B43_WARN_ON(b43_status(dev
) != B43_STAT_INITIALIZED
);
3013 drain_txstatus_queue(dev
);
3014 err
= request_irq(dev
->dev
->irq
, b43_interrupt_handler
,
3015 IRQF_SHARED
, KBUILD_MODNAME
, dev
);
3017 b43err(dev
->wl
, "Cannot request IRQ-%d\n", dev
->dev
->irq
);
3021 /* We are ready to run. */
3022 b43_set_status(dev
, B43_STAT_STARTED
);
3024 /* Start data flow (TX/RX). */
3025 b43_mac_enable(dev
);
3026 b43_interrupt_enable(dev
, dev
->irq_savedstate
);
3027 ieee80211_start_queues(dev
->wl
->hw
);
3029 /* Start maintainance work */
3030 b43_periodic_tasks_setup(dev
);
3032 b43dbg(dev
->wl
, "Wireless interface started\n");
3037 /* Get PHY and RADIO versioning numbers */
3038 static int b43_phy_versioning(struct b43_wldev
*dev
)
3040 struct b43_phy
*phy
= &dev
->phy
;
3048 int unsupported
= 0;
3050 /* Get PHY versioning */
3051 tmp
= b43_read16(dev
, B43_MMIO_PHY_VER
);
3052 analog_type
= (tmp
& B43_PHYVER_ANALOG
) >> B43_PHYVER_ANALOG_SHIFT
;
3053 phy_type
= (tmp
& B43_PHYVER_TYPE
) >> B43_PHYVER_TYPE_SHIFT
;
3054 phy_rev
= (tmp
& B43_PHYVER_VERSION
);
3061 if (phy_rev
!= 2 && phy_rev
!= 4 && phy_rev
!= 6
3073 b43err(dev
->wl
, "FOUND UNSUPPORTED PHY "
3074 "(Analog %u, Type %u, Revision %u)\n",
3075 analog_type
, phy_type
, phy_rev
);
3078 b43dbg(dev
->wl
, "Found PHY: Analog %u, Type %u, Revision %u\n",
3079 analog_type
, phy_type
, phy_rev
);
3081 /* Get RADIO versioning */
3082 if (dev
->dev
->bus
->chip_id
== 0x4317) {
3083 if (dev
->dev
->bus
->chip_rev
== 0)
3085 else if (dev
->dev
->bus
->chip_rev
== 1)
3090 b43_write16(dev
, B43_MMIO_RADIO_CONTROL
, B43_RADIOCTL_ID
);
3091 tmp
= b43_read16(dev
, B43_MMIO_RADIO_DATA_HIGH
);
3093 b43_write16(dev
, B43_MMIO_RADIO_CONTROL
, B43_RADIOCTL_ID
);
3094 tmp
|= b43_read16(dev
, B43_MMIO_RADIO_DATA_LOW
);
3096 radio_manuf
= (tmp
& 0x00000FFF);
3097 radio_ver
= (tmp
& 0x0FFFF000) >> 12;
3098 radio_rev
= (tmp
& 0xF0000000) >> 28;
3101 if (radio_ver
!= 0x2060)
3105 if (radio_manuf
!= 0x17F)
3109 if ((radio_ver
& 0xFFF0) != 0x2050)
3113 if (radio_ver
!= 0x2050)
3120 b43err(dev
->wl
, "FOUND UNSUPPORTED RADIO "
3121 "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
3122 radio_manuf
, radio_ver
, radio_rev
);
3125 b43dbg(dev
->wl
, "Found Radio: Manuf 0x%X, Version 0x%X, Revision %u\n",
3126 radio_manuf
, radio_ver
, radio_rev
);
3128 phy
->radio_manuf
= radio_manuf
;
3129 phy
->radio_ver
= radio_ver
;
3130 phy
->radio_rev
= radio_rev
;
3132 phy
->analog
= analog_type
;
3133 phy
->type
= phy_type
;
3139 static void setup_struct_phy_for_init(struct b43_wldev
*dev
,
3140 struct b43_phy
*phy
)
3142 struct b43_txpower_lo_control
*lo
;
3145 memset(phy
->minlowsig
, 0xFF, sizeof(phy
->minlowsig
));
3146 memset(phy
->minlowsigpos
, 0, sizeof(phy
->minlowsigpos
));
3151 phy
->aci_enable
= 0;
3152 phy
->aci_wlan_automatic
= 0;
3153 phy
->aci_hw_rssi
= 0;
3155 phy
->radio_off_context
.valid
= 0;
3157 lo
= phy
->lo_control
;
3159 memset(lo
, 0, sizeof(*(phy
->lo_control
)));
3163 phy
->max_lb_gain
= 0;
3164 phy
->trsw_rx_gain
= 0;
3165 phy
->txpwr_offset
= 0;
3168 phy
->nrssislope
= 0;
3169 for (i
= 0; i
< ARRAY_SIZE(phy
->nrssi
); i
++)
3170 phy
->nrssi
[i
] = -1000;
3171 for (i
= 0; i
< ARRAY_SIZE(phy
->nrssi_lt
); i
++)
3172 phy
->nrssi_lt
[i
] = i
;
3174 phy
->lofcal
= 0xFFFF;
3175 phy
->initval
= 0xFFFF;
3177 spin_lock_init(&phy
->lock
);
3178 phy
->interfmode
= B43_INTERFMODE_NONE
;
3179 phy
->channel
= 0xFF;
3181 phy
->hardware_power_control
= !!modparam_hwpctl
;
3184 static void setup_struct_wldev_for_init(struct b43_wldev
*dev
)
3187 dev
->reg124_set_0x4
= 0;
3188 /* Assume the radio is enabled. If it's not enabled, the state will
3189 * immediately get fixed on the first periodic work run. */
3190 dev
->radio_hw_enable
= 1;
3193 memset(&dev
->stats
, 0, sizeof(dev
->stats
));
3195 setup_struct_phy_for_init(dev
, &dev
->phy
);
3197 /* IRQ related flags */
3198 dev
->irq_reason
= 0;
3199 memset(dev
->dma_reason
, 0, sizeof(dev
->dma_reason
));
3200 dev
->irq_savedstate
= B43_IRQ_MASKTEMPLATE
;
3202 dev
->mac_suspended
= 1;
3204 /* Noise calculation context */
3205 memset(&dev
->noisecalc
, 0, sizeof(dev
->noisecalc
));
3208 static void b43_bluetooth_coext_enable(struct b43_wldev
*dev
)
3210 struct ssb_sprom
*sprom
= &dev
->dev
->bus
->sprom
;
3213 if (!(sprom
->boardflags_lo
& B43_BFL_BTCOEXIST
))
3215 if (dev
->phy
.type
!= B43_PHYTYPE_B
&& !dev
->phy
.gmode
)
3218 hf
= b43_hf_read(dev
);
3219 if (sprom
->boardflags_lo
& B43_BFL_BTCMOD
)
3220 hf
|= B43_HF_BTCOEXALT
;
3222 hf
|= B43_HF_BTCOEX
;
3223 b43_hf_write(dev
, hf
);
3227 static void b43_bluetooth_coext_disable(struct b43_wldev
*dev
)
3231 static void b43_imcfglo_timeouts_workaround(struct b43_wldev
*dev
)
3233 #ifdef CONFIG_SSB_DRIVER_PCICORE
3234 struct ssb_bus
*bus
= dev
->dev
->bus
;
3237 if (bus
->pcicore
.dev
&&
3238 bus
->pcicore
.dev
->id
.coreid
== SSB_DEV_PCI
&&
3239 bus
->pcicore
.dev
->id
.revision
<= 5) {
3240 /* IMCFGLO timeouts workaround. */
3241 tmp
= ssb_read32(dev
->dev
, SSB_IMCFGLO
);
3242 tmp
&= ~SSB_IMCFGLO_REQTO
;
3243 tmp
&= ~SSB_IMCFGLO_SERTO
;
3244 switch (bus
->bustype
) {
3245 case SSB_BUSTYPE_PCI
:
3246 case SSB_BUSTYPE_PCMCIA
:
3249 case SSB_BUSTYPE_SSB
:
3253 ssb_write32(dev
->dev
, SSB_IMCFGLO
, tmp
);
3255 #endif /* CONFIG_SSB_DRIVER_PCICORE */
3258 /* Write the short and long frame retry limit values. */
3259 static void b43_set_retry_limits(struct b43_wldev
*dev
,
3260 unsigned int short_retry
,
3261 unsigned int long_retry
)
3263 /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
3264 * the chip-internal counter. */
3265 short_retry
= min(short_retry
, (unsigned int)0xF);
3266 long_retry
= min(long_retry
, (unsigned int)0xF);
3268 b43_shm_write16(dev
, B43_SHM_SCRATCH
, B43_SHM_SC_SRLIMIT
,
3270 b43_shm_write16(dev
, B43_SHM_SCRATCH
, B43_SHM_SC_LRLIMIT
,
3274 /* Shutdown a wireless core */
3275 /* Locking: wl->mutex */
3276 static void b43_wireless_core_exit(struct b43_wldev
*dev
)
3278 struct b43_phy
*phy
= &dev
->phy
;
3280 B43_WARN_ON(b43_status(dev
) > B43_STAT_INITIALIZED
);
3281 if (b43_status(dev
) != B43_STAT_INITIALIZED
)
3283 b43_set_status(dev
, B43_STAT_UNINIT
);
3286 b43_rng_exit(dev
->wl
);
3290 b43_radio_turn_off(dev
, 1);
3291 b43_switch_analog(dev
, 0);
3292 if (phy
->dyn_tssi_tbl
)
3293 kfree(phy
->tssi2dbm
);
3294 kfree(phy
->lo_control
);
3295 phy
->lo_control
= NULL
;
3296 ssb_device_disable(dev
->dev
, 0);
3297 ssb_bus_may_powerdown(dev
->dev
->bus
);
3300 /* Initialize a wireless core */
3301 static int b43_wireless_core_init(struct b43_wldev
*dev
)
3303 struct b43_wl
*wl
= dev
->wl
;
3304 struct ssb_bus
*bus
= dev
->dev
->bus
;
3305 struct ssb_sprom
*sprom
= &bus
->sprom
;
3306 struct b43_phy
*phy
= &dev
->phy
;
3310 B43_WARN_ON(b43_status(dev
) != B43_STAT_UNINIT
);
3312 err
= ssb_bus_powerup(bus
, 0);
3315 if (!ssb_device_is_enabled(dev
->dev
)) {
3316 tmp
= phy
->gmode
? B43_TMSLOW_GMODE
: 0;
3317 b43_wireless_core_reset(dev
, tmp
);
3320 if ((phy
->type
== B43_PHYTYPE_B
) || (phy
->type
== B43_PHYTYPE_G
)) {
3322 kzalloc(sizeof(*(phy
->lo_control
)), GFP_KERNEL
);
3323 if (!phy
->lo_control
) {
3328 setup_struct_wldev_for_init(dev
);
3330 err
= b43_phy_init_tssi2dbm_table(dev
);
3332 goto err_kfree_lo_control
;
3334 /* Enable IRQ routing to this device. */
3335 ssb_pcicore_dev_irqvecs_enable(&bus
->pcicore
, dev
->dev
);
3337 b43_imcfglo_timeouts_workaround(dev
);
3338 b43_bluetooth_coext_disable(dev
);
3339 b43_phy_early_init(dev
);
3340 err
= b43_chip_init(dev
);
3342 goto err_kfree_tssitbl
;
3343 b43_shm_write16(dev
, B43_SHM_SHARED
,
3344 B43_SHM_SH_WLCOREREV
, dev
->dev
->id
.revision
);
3345 hf
= b43_hf_read(dev
);
3346 if (phy
->type
== B43_PHYTYPE_G
) {
3350 if (sprom
->boardflags_lo
& B43_BFL_PACTRL
)
3351 hf
|= B43_HF_OFDMPABOOST
;
3352 } else if (phy
->type
== B43_PHYTYPE_B
) {
3354 if (phy
->rev
>= 2 && phy
->radio_ver
== 0x2050)
3357 b43_hf_write(dev
, hf
);
3359 b43_set_retry_limits(dev
, B43_DEFAULT_SHORT_RETRY_LIMIT
,
3360 B43_DEFAULT_LONG_RETRY_LIMIT
);
3361 b43_shm_write16(dev
, B43_SHM_SHARED
, B43_SHM_SH_SFFBLIM
, 3);
3362 b43_shm_write16(dev
, B43_SHM_SHARED
, B43_SHM_SH_LFFBLIM
, 2);
3364 /* Disable sending probe responses from firmware.
3365 * Setting the MaxTime to one usec will always trigger
3366 * a timeout, so we never send any probe resp.
3367 * A timeout of zero is infinite. */
3368 b43_shm_write16(dev
, B43_SHM_SHARED
, B43_SHM_SH_PRMAXTIME
, 1);
3370 b43_rate_memory_init(dev
);
3372 /* Minimum Contention Window */
3373 if (phy
->type
== B43_PHYTYPE_B
) {
3374 b43_shm_write16(dev
, B43_SHM_SCRATCH
, B43_SHM_SC_MINCONT
, 0x1F);
3376 b43_shm_write16(dev
, B43_SHM_SCRATCH
, B43_SHM_SC_MINCONT
, 0xF);
3378 /* Maximum Contention Window */
3379 b43_shm_write16(dev
, B43_SHM_SCRATCH
, B43_SHM_SC_MAXCONT
, 0x3FF);
3382 if (b43_using_pio(dev
)) {
3383 err
= b43_pio_init(dev
);
3385 err
= b43_dma_init(dev
);
3389 } while (err
== -EAGAIN
);
3395 b43_write16(dev
, 0x0612, 0x0050);
3396 b43_shm_write16(dev
, B43_SHM_SHARED
, 0x0416, 0x0050);
3397 b43_shm_write16(dev
, B43_SHM_SHARED
, 0x0414, 0x01F4);
3400 b43_bluetooth_coext_enable(dev
);
3402 ssb_bus_powerup(bus
, 1); /* Enable dynamic PCTL */
3403 memset(wl
->bssid
, 0, ETH_ALEN
);
3404 memset(wl
->mac_addr
, 0, ETH_ALEN
);
3405 b43_upload_card_macaddress(dev
);
3406 b43_security_init(dev
);
3409 b43_set_status(dev
, B43_STAT_INITIALIZED
);
3418 if (phy
->dyn_tssi_tbl
)
3419 kfree(phy
->tssi2dbm
);
3420 err_kfree_lo_control
:
3421 kfree(phy
->lo_control
);
3422 phy
->lo_control
= NULL
;
3424 ssb_bus_may_powerdown(bus
);
3425 B43_WARN_ON(b43_status(dev
) != B43_STAT_UNINIT
);
3429 static int b43_op_add_interface(struct ieee80211_hw
*hw
,
3430 struct ieee80211_if_init_conf
*conf
)
3432 struct b43_wl
*wl
= hw_to_b43_wl(hw
);
3433 struct b43_wldev
*dev
;
3434 unsigned long flags
;
3435 int err
= -EOPNOTSUPP
;
3437 /* TODO: allow WDS/AP devices to coexist */
3439 if (conf
->type
!= IEEE80211_IF_TYPE_AP
&&
3440 conf
->type
!= IEEE80211_IF_TYPE_STA
&&
3441 conf
->type
!= IEEE80211_IF_TYPE_WDS
&&
3442 conf
->type
!= IEEE80211_IF_TYPE_IBSS
)
3445 mutex_lock(&wl
->mutex
);
3447 goto out_mutex_unlock
;
3449 b43dbg(wl
, "Adding Interface type %d\n", conf
->type
);
3451 dev
= wl
->current_dev
;
3453 wl
->if_id
= conf
->if_id
;
3454 wl
->if_type
= conf
->type
;
3455 memcpy(wl
->mac_addr
, conf
->mac_addr
, ETH_ALEN
);
3457 spin_lock_irqsave(&wl
->irq_lock
, flags
);
3458 b43_adjust_opmode(dev
);
3459 b43_upload_card_macaddress(dev
);
3460 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
3464 mutex_unlock(&wl
->mutex
);
3469 static void b43_op_remove_interface(struct ieee80211_hw
*hw
,
3470 struct ieee80211_if_init_conf
*conf
)
3472 struct b43_wl
*wl
= hw_to_b43_wl(hw
);
3473 struct b43_wldev
*dev
= wl
->current_dev
;
3474 unsigned long flags
;
3476 b43dbg(wl
, "Removing Interface type %d\n", conf
->type
);
3478 mutex_lock(&wl
->mutex
);
3480 B43_WARN_ON(!wl
->operating
);
3481 B43_WARN_ON(wl
->if_id
!= conf
->if_id
);
3485 spin_lock_irqsave(&wl
->irq_lock
, flags
);
3486 b43_adjust_opmode(dev
);
3487 memset(wl
->mac_addr
, 0, ETH_ALEN
);
3488 b43_upload_card_macaddress(dev
);
3489 spin_unlock_irqrestore(&wl
->irq_lock
, flags
);
3491 mutex_unlock(&wl
->mutex
);
3494 static int b43_op_start(struct ieee80211_hw
*hw
)
3496 struct b43_wl
*wl
= hw_to_b43_wl(hw
);
3497 struct b43_wldev
*dev
= wl
->current_dev
;
3501 /* First register RFkill.
3502 * LEDs that are registered later depend on it. */
3503 b43_rfkill_init(dev
);
3505 mutex_lock(&wl
->mutex
);
3507 if (b43_status(dev
) < B43_STAT_INITIALIZED
) {
3508 err
= b43_wireless_core_init(dev
);
3510 goto out_mutex_unlock
;
3514 if (b43_status(dev
) < B43_STAT_STARTED
) {
3515 err
= b43_wireless_core_start(dev
);
3518 b43_wireless_core_exit(dev
);
3519 goto out_mutex_unlock
;
3524 mutex_unlock(&wl
->mutex
);
3529 static void b43_op_stop(struct ieee80211_hw
*hw
)
3531 struct b43_wl
*wl
= hw_to_b43_wl(hw
);
3532 struct b43_wldev
*dev
= wl
->current_dev
;
3534 b43_rfkill_exit(dev
);
3536 mutex_lock(&wl
->mutex
);
3537 if (b43_status(dev
) >= B43_STAT_STARTED
)
3538 b43_wireless_core_stop(dev
);
3539 b43_wireless_core_exit(dev
);
3540 mutex_unlock(&wl
->mutex
);
3543 static int b43_op_set_retry_limit(struct ieee80211_hw
*hw
,
3544 u32 short_retry_limit
, u32 long_retry_limit
)
3546 struct b43_wl
*wl
= hw_to_b43_wl(hw
);
3547 struct b43_wldev
*dev
;
3550 mutex_lock(&wl
->mutex
);
3551 dev
= wl
->current_dev
;
3552 if (unlikely(!dev
|| (b43_status(dev
) < B43_STAT_INITIALIZED
))) {
3556 b43_set_retry_limits(dev
, short_retry_limit
, long_retry_limit
);
3558 mutex_unlock(&wl
->mutex
);
3563 static const struct ieee80211_ops b43_hw_ops
= {
3565 .conf_tx
= b43_op_conf_tx
,
3566 .add_interface
= b43_op_add_interface
,
3567 .remove_interface
= b43_op_remove_interface
,
3568 .config
= b43_op_config
,
3569 .config_interface
= b43_op_config_interface
,
3570 .configure_filter
= b43_op_configure_filter
,
3571 .set_key
= b43_op_set_key
,
3572 .get_stats
= b43_op_get_stats
,
3573 .get_tx_stats
= b43_op_get_tx_stats
,
3574 .start
= b43_op_start
,
3575 .stop
= b43_op_stop
,
3576 .set_retry_limit
= b43_op_set_retry_limit
,
3579 /* Hard-reset the chip. Do not call this directly.
3580 * Use b43_controller_restart()
3582 static void b43_chip_reset(struct work_struct
*work
)
3584 struct b43_wldev
*dev
=
3585 container_of(work
, struct b43_wldev
, restart_work
);
3586 struct b43_wl
*wl
= dev
->wl
;
3590 mutex_lock(&wl
->mutex
);
3592 prev_status
= b43_status(dev
);
3593 /* Bring the device down... */
3594 if (prev_status
>= B43_STAT_STARTED
)
3595 b43_wireless_core_stop(dev
);
3596 if (prev_status
>= B43_STAT_INITIALIZED
)
3597 b43_wireless_core_exit(dev
);
3599 /* ...and up again. */
3600 if (prev_status
>= B43_STAT_INITIALIZED
) {
3601 err
= b43_wireless_core_init(dev
);
3605 if (prev_status
>= B43_STAT_STARTED
) {
3606 err
= b43_wireless_core_start(dev
);
3608 b43_wireless_core_exit(dev
);
3613 mutex_unlock(&wl
->mutex
);
3615 b43err(wl
, "Controller restart FAILED\n");
3617 b43info(wl
, "Controller restarted\n");
3620 static int b43_setup_modes(struct b43_wldev
*dev
,
3621 int have_aphy
, int have_bphy
, int have_gphy
)
3623 struct ieee80211_hw
*hw
= dev
->wl
->hw
;
3624 struct ieee80211_hw_mode
*mode
;
3625 struct b43_phy
*phy
= &dev
->phy
;
3629 /*FIXME: Don't tell ieee80211 about an A-PHY, because we currently don't support A-PHY. */
3632 phy
->possible_phymodes
= 0;
3635 B43_WARN_ON(cnt
>= B43_MAX_PHYHWMODES
);
3636 mode
= &phy
->hwmodes
[cnt
];
3638 mode
->mode
= MODE_IEEE80211A
;
3639 mode
->num_channels
= b43_a_chantable_size
;
3640 mode
->channels
= b43_a_chantable
;
3641 mode
->num_rates
= b43_a_ratetable_size
;
3642 mode
->rates
= b43_a_ratetable
;
3643 err
= ieee80211_register_hwmode(hw
, mode
);
3647 phy
->possible_phymodes
|= B43_PHYMODE_A
;
3652 B43_WARN_ON(cnt
>= B43_MAX_PHYHWMODES
);
3653 mode
= &phy
->hwmodes
[cnt
];
3655 mode
->mode
= MODE_IEEE80211B
;
3656 mode
->num_channels
= b43_bg_chantable_size
;
3657 mode
->channels
= b43_bg_chantable
;
3658 mode
->num_rates
= b43_b_ratetable_size
;
3659 mode
->rates
= b43_b_ratetable
;
3660 err
= ieee80211_register_hwmode(hw
, mode
);
3664 phy
->possible_phymodes
|= B43_PHYMODE_B
;
3669 B43_WARN_ON(cnt
>= B43_MAX_PHYHWMODES
);
3670 mode
= &phy
->hwmodes
[cnt
];
3672 mode
->mode
= MODE_IEEE80211G
;
3673 mode
->num_channels
= b43_bg_chantable_size
;
3674 mode
->channels
= b43_bg_chantable
;
3675 mode
->num_rates
= b43_g_ratetable_size
;
3676 mode
->rates
= b43_g_ratetable
;
3677 err
= ieee80211_register_hwmode(hw
, mode
);
3681 phy
->possible_phymodes
|= B43_PHYMODE_G
;
3691 static void b43_wireless_core_detach(struct b43_wldev
*dev
)
3693 /* We release firmware that late to not be required to re-request
3694 * is all the time when we reinit the core. */
3695 b43_release_firmware(dev
);
3698 static int b43_wireless_core_attach(struct b43_wldev
*dev
)
3700 struct b43_wl
*wl
= dev
->wl
;
3701 struct ssb_bus
*bus
= dev
->dev
->bus
;
3702 struct pci_dev
*pdev
= bus
->host_pci
;
3704 int have_aphy
= 0, have_bphy
= 0, have_gphy
= 0;
3707 /* Do NOT do any device initialization here.
3708 * Do it in wireless_core_init() instead.
3709 * This function is for gathering basic information about the HW, only.
3710 * Also some structs may be set up here. But most likely you want to have
3711 * that in core_init(), too.
3714 err
= ssb_bus_powerup(bus
, 0);
3716 b43err(wl
, "Bus powerup failed\n");
3719 /* Get the PHY type. */
3720 if (dev
->dev
->id
.revision
>= 5) {
3723 tmshigh
= ssb_read32(dev
->dev
, SSB_TMSHIGH
);
3724 have_aphy
= !!(tmshigh
& B43_TMSHIGH_APHY
);
3725 have_gphy
= !!(tmshigh
& B43_TMSHIGH_GPHY
);
3726 if (!have_aphy
&& !have_gphy
)
3728 } else if (dev
->dev
->id
.revision
== 4) {
3734 dev
->phy
.gmode
= (have_gphy
|| have_bphy
);
3735 tmp
= dev
->phy
.gmode
? B43_TMSLOW_GMODE
: 0;
3736 b43_wireless_core_reset(dev
, tmp
);
3738 err
= b43_phy_versioning(dev
);
3741 /* Check if this device supports multiband. */
3743 (pdev
->device
!= 0x4312 &&
3744 pdev
->device
!= 0x4319 && pdev
->device
!= 0x4324)) {
3745 /* No multiband support. */
3749 switch (dev
->phy
.type
) {
3763 dev
->phy
.gmode
= (have_gphy
|| have_bphy
);
3764 tmp
= dev
->phy
.gmode
? B43_TMSLOW_GMODE
: 0;
3765 b43_wireless_core_reset(dev
, tmp
);
3767 err
= b43_validate_chipaccess(dev
);
3770 err
= b43_setup_modes(dev
, have_aphy
, have_bphy
, have_gphy
);
3774 /* Now set some default "current_dev" */
3775 if (!wl
->current_dev
)
3776 wl
->current_dev
= dev
;
3777 INIT_WORK(&dev
->restart_work
, b43_chip_reset
);
3779 b43_radio_turn_off(dev
, 1);
3780 b43_switch_analog(dev
, 0);
3781 ssb_device_disable(dev
->dev
, 0);
3782 ssb_bus_may_powerdown(bus
);
3788 ssb_bus_may_powerdown(bus
);
3792 static void b43_one_core_detach(struct ssb_device
*dev
)
3794 struct b43_wldev
*wldev
;
3797 wldev
= ssb_get_drvdata(dev
);
3799 cancel_work_sync(&wldev
->restart_work
);
3800 b43_debugfs_remove_device(wldev
);
3801 b43_wireless_core_detach(wldev
);
3802 list_del(&wldev
->list
);
3804 ssb_set_drvdata(dev
, NULL
);
3808 static int b43_one_core_attach(struct ssb_device
*dev
, struct b43_wl
*wl
)
3810 struct b43_wldev
*wldev
;
3811 struct pci_dev
*pdev
;
3814 if (!list_empty(&wl
->devlist
)) {
3815 /* We are not the first core on this chip. */
3816 pdev
= dev
->bus
->host_pci
;
3817 /* Only special chips support more than one wireless
3818 * core, although some of the other chips have more than
3819 * one wireless core as well. Check for this and
3823 ((pdev
->device
!= 0x4321) &&
3824 (pdev
->device
!= 0x4313) && (pdev
->device
!= 0x431A))) {
3825 b43dbg(wl
, "Ignoring unconnected 802.11 core\n");
3830 wldev
= kzalloc(sizeof(*wldev
), GFP_KERNEL
);
3836 b43_set_status(wldev
, B43_STAT_UNINIT
);
3837 wldev
->bad_frames_preempt
= modparam_bad_frames_preempt
;
3838 tasklet_init(&wldev
->isr_tasklet
,
3839 (void (*)(unsigned long))b43_interrupt_tasklet
,
3840 (unsigned long)wldev
);
3842 wldev
->__using_pio
= 1;
3843 INIT_LIST_HEAD(&wldev
->list
);
3845 err
= b43_wireless_core_attach(wldev
);
3847 goto err_kfree_wldev
;
3849 list_add(&wldev
->list
, &wl
->devlist
);
3851 ssb_set_drvdata(dev
, wldev
);
3852 b43_debugfs_add_device(wldev
);
3862 static void b43_sprom_fixup(struct ssb_bus
*bus
)
3864 /* boardflags workarounds */
3865 if (bus
->boardinfo
.vendor
== SSB_BOARDVENDOR_DELL
&&
3866 bus
->chip_id
== 0x4301 && bus
->boardinfo
.rev
== 0x74)
3867 bus
->sprom
.boardflags_lo
|= B43_BFL_BTCOEXIST
;
3868 if (bus
->boardinfo
.vendor
== PCI_VENDOR_ID_APPLE
&&
3869 bus
->boardinfo
.type
== 0x4E && bus
->boardinfo
.rev
> 0x40)
3870 bus
->sprom
.boardflags_lo
|= B43_BFL_PACTRL
;
3872 /* Handle case when gain is not set in sprom */
3873 if (bus
->sprom
.antenna_gain_a
== 0xFF)
3874 bus
->sprom
.antenna_gain_a
= 2;
3875 if (bus
->sprom
.antenna_gain_bg
== 0xFF)
3876 bus
->sprom
.antenna_gain_bg
= 2;
3878 /* Convert Antennagain values to Q5.2 */
3879 bus
->sprom
.antenna_gain_a
<<= 2;
3880 bus
->sprom
.antenna_gain_bg
<<= 2;
3883 static void b43_wireless_exit(struct ssb_device
*dev
, struct b43_wl
*wl
)
3885 struct ieee80211_hw
*hw
= wl
->hw
;
3887 ssb_set_devtypedata(dev
, NULL
);
3888 ieee80211_free_hw(hw
);
3891 static int b43_wireless_init(struct ssb_device
*dev
)
3893 struct ssb_sprom
*sprom
= &dev
->bus
->sprom
;
3894 struct ieee80211_hw
*hw
;
3898 b43_sprom_fixup(dev
->bus
);
3900 hw
= ieee80211_alloc_hw(sizeof(*wl
), &b43_hw_ops
);
3902 b43err(NULL
, "Could not allocate ieee80211 device\n");
3907 hw
->flags
= IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE
|
3908 IEEE80211_HW_RX_INCLUDES_FCS
;
3909 hw
->max_signal
= 100;
3910 hw
->max_rssi
= -110;
3911 hw
->max_noise
= -110;
3912 hw
->queues
= 1; /* FIXME: hardware has more queues */
3913 SET_IEEE80211_DEV(hw
, dev
->dev
);
3914 if (is_valid_ether_addr(sprom
->et1mac
))
3915 SET_IEEE80211_PERM_ADDR(hw
, sprom
->et1mac
);
3917 SET_IEEE80211_PERM_ADDR(hw
, sprom
->il0mac
);
3919 /* Get and initialize struct b43_wl */
3920 wl
= hw_to_b43_wl(hw
);
3921 memset(wl
, 0, sizeof(*wl
));
3923 spin_lock_init(&wl
->irq_lock
);
3924 spin_lock_init(&wl
->leds_lock
);
3925 mutex_init(&wl
->mutex
);
3926 INIT_LIST_HEAD(&wl
->devlist
);
3928 ssb_set_devtypedata(dev
, wl
);
3929 b43info(wl
, "Broadcom %04X WLAN found\n", dev
->bus
->chip_id
);
3935 static int b43_probe(struct ssb_device
*dev
, const struct ssb_device_id
*id
)
3941 wl
= ssb_get_devtypedata(dev
);
3943 /* Probing the first core. Must setup common struct b43_wl */
3945 err
= b43_wireless_init(dev
);
3948 wl
= ssb_get_devtypedata(dev
);
3951 err
= b43_one_core_attach(dev
, wl
);
3953 goto err_wireless_exit
;
3956 err
= ieee80211_register_hw(wl
->hw
);
3958 goto err_one_core_detach
;
3964 err_one_core_detach
:
3965 b43_one_core_detach(dev
);
3968 b43_wireless_exit(dev
, wl
);
3972 static void b43_remove(struct ssb_device
*dev
)
3974 struct b43_wl
*wl
= ssb_get_devtypedata(dev
);
3975 struct b43_wldev
*wldev
= ssb_get_drvdata(dev
);
3978 if (wl
->current_dev
== wldev
)
3979 ieee80211_unregister_hw(wl
->hw
);
3981 b43_one_core_detach(dev
);
3983 if (list_empty(&wl
->devlist
)) {
3984 /* Last core on the chip unregistered.
3985 * We can destroy common struct b43_wl.
3987 b43_wireless_exit(dev
, wl
);
3991 /* Perform a hardware reset. This can be called from any context. */
3992 void b43_controller_restart(struct b43_wldev
*dev
, const char *reason
)
3994 /* Must avoid requeueing, if we are in shutdown. */
3995 if (b43_status(dev
) < B43_STAT_INITIALIZED
)
3997 b43info(dev
->wl
, "Controller RESET (%s) ...\n", reason
);
3998 queue_work(dev
->wl
->hw
->workqueue
, &dev
->restart_work
);
4003 static int b43_suspend(struct ssb_device
*dev
, pm_message_t state
)
4005 struct b43_wldev
*wldev
= ssb_get_drvdata(dev
);
4006 struct b43_wl
*wl
= wldev
->wl
;
4008 b43dbg(wl
, "Suspending...\n");
4010 mutex_lock(&wl
->mutex
);
4011 wldev
->suspend_init_status
= b43_status(wldev
);
4012 if (wldev
->suspend_init_status
>= B43_STAT_STARTED
)
4013 b43_wireless_core_stop(wldev
);
4014 if (wldev
->suspend_init_status
>= B43_STAT_INITIALIZED
)
4015 b43_wireless_core_exit(wldev
);
4016 mutex_unlock(&wl
->mutex
);
4018 b43dbg(wl
, "Device suspended.\n");
4023 static int b43_resume(struct ssb_device
*dev
)
4025 struct b43_wldev
*wldev
= ssb_get_drvdata(dev
);
4026 struct b43_wl
*wl
= wldev
->wl
;
4029 b43dbg(wl
, "Resuming...\n");
4031 mutex_lock(&wl
->mutex
);
4032 if (wldev
->suspend_init_status
>= B43_STAT_INITIALIZED
) {
4033 err
= b43_wireless_core_init(wldev
);
4035 b43err(wl
, "Resume failed at core init\n");
4039 if (wldev
->suspend_init_status
>= B43_STAT_STARTED
) {
4040 err
= b43_wireless_core_start(wldev
);
4042 b43_wireless_core_exit(wldev
);
4043 b43err(wl
, "Resume failed at core start\n");
4047 mutex_unlock(&wl
->mutex
);
4049 b43dbg(wl
, "Device resumed.\n");
4054 #else /* CONFIG_PM */
4055 # define b43_suspend NULL
4056 # define b43_resume NULL
4057 #endif /* CONFIG_PM */
4059 static struct ssb_driver b43_ssb_driver
= {
4060 .name
= KBUILD_MODNAME
,
4061 .id_table
= b43_ssb_tbl
,
4063 .remove
= b43_remove
,
4064 .suspend
= b43_suspend
,
4065 .resume
= b43_resume
,
4068 static int __init
b43_init(void)
4073 err
= b43_pcmcia_init();
4076 err
= ssb_driver_register(&b43_ssb_driver
);
4078 goto err_pcmcia_exit
;
4089 static void __exit
b43_exit(void)
4091 ssb_driver_unregister(&b43_ssb_driver
);
4096 module_init(b43_init
)
4097 module_exit(b43_exit
)