3 Broadcom B43 wireless driver
6 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
7 Copyright (c) 2005-2007 Stefano Brivio <stefano.brivio@polimi.it>
8 Copyright (c) 2005-2008 Michael Buesch <mb@bu3sch.de>
9 Copyright (c) 2005, 2006 Danny van Dyk <kugelfang@gentoo.org>
10 Copyright (c) 2005, 2006 Andreas Jaggi <andreas.jaggi@waterwave.ch>
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; see the file COPYING. If not, write to
24 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
25 Boston, MA 02110-1301, USA.
29 #include "phy_common.h"
38 int b43_phy_allocate(struct b43_wldev
*dev
)
40 struct b43_phy
*phy
= &(dev
->phy
);
47 phy
->ops
= &b43_phyops_a
;
50 phy
->ops
= &b43_phyops_g
;
53 #ifdef CONFIG_B43_NPHY
54 phy
->ops
= &b43_phyops_n
;
58 #ifdef CONFIG_B43_PHY_LP
59 phy
->ops
= &b43_phyops_lp
;
63 if (B43_WARN_ON(!phy
->ops
))
66 err
= phy
->ops
->allocate(dev
);
73 void b43_phy_free(struct b43_wldev
*dev
)
75 dev
->phy
.ops
->free(dev
);
79 int b43_phy_init(struct b43_wldev
*dev
)
81 struct b43_phy
*phy
= &dev
->phy
;
82 const struct b43_phy_operations
*ops
= phy
->ops
;
85 phy
->channel
= ops
->get_default_chan(dev
);
87 ops
->software_rfkill(dev
, RFKILL_STATE_UNBLOCKED
);
90 b43err(dev
->wl
, "PHY init failed\n");
93 /* Make sure to switch hardware and firmware (SHM) to
94 * the default channel. */
95 err
= b43_switch_channel(dev
, ops
->get_default_chan(dev
));
97 b43err(dev
->wl
, "PHY init: Channel switch to default failed\n");
107 ops
->software_rfkill(dev
, RFKILL_STATE_SOFT_BLOCKED
);
112 void b43_phy_exit(struct b43_wldev
*dev
)
114 const struct b43_phy_operations
*ops
= dev
->phy
.ops
;
116 ops
->software_rfkill(dev
, RFKILL_STATE_SOFT_BLOCKED
);
121 bool b43_has_hardware_pctl(struct b43_wldev
*dev
)
123 if (!dev
->phy
.hardware_power_control
)
125 if (!dev
->phy
.ops
->supports_hwpctl
)
127 return dev
->phy
.ops
->supports_hwpctl(dev
);
130 void b43_radio_lock(struct b43_wldev
*dev
)
135 B43_WARN_ON(dev
->phy
.radio_locked
);
136 dev
->phy
.radio_locked
= 1;
139 macctl
= b43_read32(dev
, B43_MMIO_MACCTL
);
140 macctl
|= B43_MACCTL_RADIOLOCK
;
141 b43_write32(dev
, B43_MMIO_MACCTL
, macctl
);
142 /* Commit the write and wait for the firmware
143 * to finish any radio register access. */
144 b43_read32(dev
, B43_MMIO_MACCTL
);
148 void b43_radio_unlock(struct b43_wldev
*dev
)
153 B43_WARN_ON(!dev
->phy
.radio_locked
);
154 dev
->phy
.radio_locked
= 0;
157 /* Commit any write */
158 b43_read16(dev
, B43_MMIO_PHY_VER
);
160 macctl
= b43_read32(dev
, B43_MMIO_MACCTL
);
161 macctl
&= ~B43_MACCTL_RADIOLOCK
;
162 b43_write32(dev
, B43_MMIO_MACCTL
, macctl
);
165 void b43_phy_lock(struct b43_wldev
*dev
)
168 B43_WARN_ON(dev
->phy
.phy_locked
);
169 dev
->phy
.phy_locked
= 1;
171 B43_WARN_ON(dev
->dev
->id
.revision
< 3);
173 if (!b43_is_mode(dev
->wl
, NL80211_IFTYPE_AP
))
174 b43_power_saving_ctl_bits(dev
, B43_PS_AWAKE
);
177 void b43_phy_unlock(struct b43_wldev
*dev
)
180 B43_WARN_ON(!dev
->phy
.phy_locked
);
181 dev
->phy
.phy_locked
= 0;
183 B43_WARN_ON(dev
->dev
->id
.revision
< 3);
185 if (!b43_is_mode(dev
->wl
, NL80211_IFTYPE_AP
))
186 b43_power_saving_ctl_bits(dev
, 0);
189 static inline void assert_mac_suspended(struct b43_wldev
*dev
)
193 if ((b43_status(dev
) >= B43_STAT_INITIALIZED
) &&
194 (dev
->mac_suspended
<= 0)) {
195 b43dbg(dev
->wl
, "PHY/RADIO register access with "
201 u16
b43_radio_read(struct b43_wldev
*dev
, u16 reg
)
203 assert_mac_suspended(dev
);
204 return dev
->phy
.ops
->radio_read(dev
, reg
);
207 void b43_radio_write(struct b43_wldev
*dev
, u16 reg
, u16 value
)
209 assert_mac_suspended(dev
);
210 dev
->phy
.ops
->radio_write(dev
, reg
, value
);
213 void b43_radio_mask(struct b43_wldev
*dev
, u16 offset
, u16 mask
)
215 b43_radio_write16(dev
, offset
,
216 b43_radio_read16(dev
, offset
) & mask
);
219 void b43_radio_set(struct b43_wldev
*dev
, u16 offset
, u16 set
)
221 b43_radio_write16(dev
, offset
,
222 b43_radio_read16(dev
, offset
) | set
);
225 void b43_radio_maskset(struct b43_wldev
*dev
, u16 offset
, u16 mask
, u16 set
)
227 b43_radio_write16(dev
, offset
,
228 (b43_radio_read16(dev
, offset
) & mask
) | set
);
231 u16
b43_phy_read(struct b43_wldev
*dev
, u16 reg
)
233 assert_mac_suspended(dev
);
234 return dev
->phy
.ops
->phy_read(dev
, reg
);
237 void b43_phy_write(struct b43_wldev
*dev
, u16 reg
, u16 value
)
239 assert_mac_suspended(dev
);
240 dev
->phy
.ops
->phy_write(dev
, reg
, value
);
243 void b43_phy_mask(struct b43_wldev
*dev
, u16 offset
, u16 mask
)
245 b43_phy_write(dev
, offset
,
246 b43_phy_read(dev
, offset
) & mask
);
249 void b43_phy_set(struct b43_wldev
*dev
, u16 offset
, u16 set
)
251 b43_phy_write(dev
, offset
,
252 b43_phy_read(dev
, offset
) | set
);
255 void b43_phy_maskset(struct b43_wldev
*dev
, u16 offset
, u16 mask
, u16 set
)
257 b43_phy_write(dev
, offset
,
258 (b43_phy_read(dev
, offset
) & mask
) | set
);
261 int b43_switch_channel(struct b43_wldev
*dev
, unsigned int new_channel
)
263 struct b43_phy
*phy
= &(dev
->phy
);
264 u16 channelcookie
, savedcookie
;
267 if (new_channel
== B43_DEFAULT_CHANNEL
)
268 new_channel
= phy
->ops
->get_default_chan(dev
);
270 /* First we set the channel radio code to prevent the
271 * firmware from sending ghost packets.
273 channelcookie
= new_channel
;
274 if (b43_current_band(dev
->wl
) == IEEE80211_BAND_5GHZ
)
275 channelcookie
|= 0x100;
276 //FIXME set 40Mhz flag if required
277 savedcookie
= b43_shm_read16(dev
, B43_SHM_SHARED
, B43_SHM_SH_CHAN
);
278 b43_shm_write16(dev
, B43_SHM_SHARED
, B43_SHM_SH_CHAN
, channelcookie
);
280 /* Now try to switch the PHY hardware channel. */
281 err
= phy
->ops
->switch_channel(dev
, new_channel
);
283 goto err_restore_cookie
;
285 dev
->phy
.channel
= new_channel
;
286 /* Wait for the radio to tune to the channel and stabilize. */
292 b43_shm_write16(dev
, B43_SHM_SHARED
,
293 B43_SHM_SH_CHAN
, savedcookie
);
298 void b43_software_rfkill(struct b43_wldev
*dev
, enum rfkill_state state
)
300 struct b43_phy
*phy
= &dev
->phy
;
302 if (state
== RFKILL_STATE_HARD_BLOCKED
) {
303 /* We cannot hardware-block the device */
304 state
= RFKILL_STATE_SOFT_BLOCKED
;
307 b43_mac_suspend(dev
);
308 phy
->ops
->software_rfkill(dev
, state
);
309 phy
->radio_on
= (state
== RFKILL_STATE_UNBLOCKED
);
314 * b43_phy_txpower_adjust_work - TX power workqueue.
316 * Workqueue for updating the TX power parameters in hardware.
318 void b43_phy_txpower_adjust_work(struct work_struct
*work
)
320 struct b43_wl
*wl
= container_of(work
, struct b43_wl
,
321 txpower_adjust_work
);
322 struct b43_wldev
*dev
;
324 mutex_lock(&wl
->mutex
);
325 dev
= wl
->current_dev
;
327 if (likely(dev
&& (b43_status(dev
) >= B43_STAT_STARTED
)))
328 dev
->phy
.ops
->adjust_txpower(dev
);
330 mutex_unlock(&wl
->mutex
);
333 /* Called with wl->irq_lock locked */
334 void b43_phy_txpower_check(struct b43_wldev
*dev
, unsigned int flags
)
336 struct b43_phy
*phy
= &dev
->phy
;
337 unsigned long now
= jiffies
;
338 enum b43_txpwr_result result
;
340 if (!(flags
& B43_TXPWR_IGNORE_TIME
)) {
341 /* Check if it's time for a TXpower check. */
342 if (time_before(now
, phy
->next_txpwr_check_time
))
343 return; /* Not yet */
345 /* The next check will be needed in two seconds, or later. */
346 phy
->next_txpwr_check_time
= round_jiffies(now
+ (HZ
* 2));
348 if ((dev
->dev
->bus
->boardinfo
.vendor
== SSB_BOARDVENDOR_BCM
) &&
349 (dev
->dev
->bus
->boardinfo
.type
== SSB_BOARD_BU4306
))
350 return; /* No software txpower adjustment needed */
352 result
= phy
->ops
->recalc_txpower(dev
, !!(flags
& B43_TXPWR_IGNORE_TSSI
));
353 if (result
== B43_TXPWR_RES_DONE
)
354 return; /* We are done. */
355 B43_WARN_ON(result
!= B43_TXPWR_RES_NEED_ADJUST
);
356 B43_WARN_ON(phy
->ops
->adjust_txpower
== NULL
);
358 /* We must adjust the transmission power in hardware.
359 * Schedule b43_phy_txpower_adjust_work(). */
360 queue_work(dev
->wl
->hw
->workqueue
, &dev
->wl
->txpower_adjust_work
);
363 int b43_phy_shm_tssi_read(struct b43_wldev
*dev
, u16 shm_offset
)
365 const bool is_ofdm
= (shm_offset
!= B43_SHM_SH_TSSI_CCK
);
366 unsigned int a
, b
, c
, d
;
367 unsigned int average
;
370 tmp
= b43_shm_read32(dev
, B43_SHM_SHARED
, shm_offset
);
372 b
= (tmp
>> 8) & 0xFF;
373 c
= (tmp
>> 16) & 0xFF;
374 d
= (tmp
>> 24) & 0xFF;
375 if (a
== 0 || a
== B43_TSSI_MAX
||
376 b
== 0 || b
== B43_TSSI_MAX
||
377 c
== 0 || c
== B43_TSSI_MAX
||
378 d
== 0 || d
== B43_TSSI_MAX
)
380 /* The values are OK. Clear them. */
381 tmp
= B43_TSSI_MAX
| (B43_TSSI_MAX
<< 8) |
382 (B43_TSSI_MAX
<< 16) | (B43_TSSI_MAX
<< 24);
383 b43_shm_write32(dev
, B43_SHM_SHARED
, shm_offset
, tmp
);
392 /* Get the average of the values with 0.5 added to each value. */
393 average
= (a
+ b
+ c
+ d
+ 2) / 4;
395 /* Adjust for CCK-boost */
396 if (b43_shm_read16(dev
, B43_SHM_SHARED
, B43_SHM_SH_HOSTFLO
)
398 average
= (average
>= 13) ? (average
- 13) : 0;
404 void b43_phyop_switch_analog_generic(struct b43_wldev
*dev
, bool on
)
406 b43_write16(dev
, B43_MMIO_PHY0
, on
? 0 : 0xF4);