rfkill: rewrite
[deliverable/linux.git] / drivers / net / wireless / b43 / phy_common.h
1 #ifndef LINUX_B43_PHY_COMMON_H_
2 #define LINUX_B43_PHY_COMMON_H_
3
4 #include <linux/rfkill.h>
5
6 struct b43_wldev;
7
8
9 /* PHY register routing bits */
10 #define B43_PHYROUTE 0x0C00 /* PHY register routing bits mask */
11 #define B43_PHYROUTE_BASE 0x0000 /* Base registers */
12 #define B43_PHYROUTE_OFDM_GPHY 0x0400 /* OFDM register routing for G-PHYs */
13 #define B43_PHYROUTE_EXT_GPHY 0x0800 /* Extended G-PHY registers */
14 #define B43_PHYROUTE_N_BMODE 0x0C00 /* N-PHY BMODE registers */
15
16 /* CCK (B-PHY) registers. */
17 #define B43_PHY_CCK(reg) ((reg) | B43_PHYROUTE_BASE)
18 /* N-PHY registers. */
19 #define B43_PHY_N(reg) ((reg) | B43_PHYROUTE_BASE)
20 /* N-PHY BMODE registers. */
21 #define B43_PHY_N_BMODE(reg) ((reg) | B43_PHYROUTE_N_BMODE)
22 /* OFDM (A-PHY) registers. */
23 #define B43_PHY_OFDM(reg) ((reg) | B43_PHYROUTE_OFDM_GPHY)
24 /* Extended G-PHY registers. */
25 #define B43_PHY_EXTG(reg) ((reg) | B43_PHYROUTE_EXT_GPHY)
26
27
28 /* Masks for the PHY versioning registers. */
29 #define B43_PHYVER_ANALOG 0xF000
30 #define B43_PHYVER_ANALOG_SHIFT 12
31 #define B43_PHYVER_TYPE 0x0F00
32 #define B43_PHYVER_TYPE_SHIFT 8
33 #define B43_PHYVER_VERSION 0x00FF
34
35 /**
36 * enum b43_interference_mitigation - Interference Mitigation mode
37 *
38 * @B43_INTERFMODE_NONE: Disabled
39 * @B43_INTERFMODE_NONWLAN: Non-WLAN Interference Mitigation
40 * @B43_INTERFMODE_MANUALWLAN: WLAN Interference Mitigation
41 * @B43_INTERFMODE_AUTOWLAN: Automatic WLAN Interference Mitigation
42 */
43 enum b43_interference_mitigation {
44 B43_INTERFMODE_NONE,
45 B43_INTERFMODE_NONWLAN,
46 B43_INTERFMODE_MANUALWLAN,
47 B43_INTERFMODE_AUTOWLAN,
48 };
49
50 /* Antenna identifiers */
51 enum {
52 B43_ANTENNA0, /* Antenna 0 */
53 B43_ANTENNA1, /* Antenna 0 */
54 B43_ANTENNA_AUTO1, /* Automatic, starting with antenna 1 */
55 B43_ANTENNA_AUTO0, /* Automatic, starting with antenna 0 */
56 B43_ANTENNA2,
57 B43_ANTENNA3 = 8,
58
59 B43_ANTENNA_AUTO = B43_ANTENNA_AUTO0,
60 B43_ANTENNA_DEFAULT = B43_ANTENNA_AUTO,
61 };
62
63 /**
64 * enum b43_txpwr_result - Return value for the recalc_txpower PHY op.
65 *
66 * @B43_TXPWR_RES_NEED_ADJUST: Values changed. Hardware adjustment is needed.
67 * @B43_TXPWR_RES_DONE: No more work to do. Everything is done.
68 */
69 enum b43_txpwr_result {
70 B43_TXPWR_RES_NEED_ADJUST,
71 B43_TXPWR_RES_DONE,
72 };
73
74 /**
75 * struct b43_phy_operations - Function pointers for PHY ops.
76 *
77 * @allocate: Allocate and initialise the PHY data structures.
78 * Must not be NULL.
79 * @free: Destroy and free the PHY data structures.
80 * Must not be NULL.
81 *
82 * @prepare_structs: Prepare the PHY data structures.
83 * The data structures allocated in @allocate are
84 * initialized here.
85 * Must not be NULL.
86 * @prepare_hardware: Prepare the PHY. This is called before b43_chip_init to
87 * do some early early PHY hardware init.
88 * Can be NULL, if not required.
89 * @init: Initialize the PHY.
90 * Must not be NULL.
91 * @exit: Shutdown the PHY.
92 * Can be NULL, if not required.
93 *
94 * @phy_read: Read from a PHY register.
95 * Must not be NULL.
96 * @phy_write: Write to a PHY register.
97 * Must not be NULL.
98 * @radio_read: Read from a Radio register.
99 * Must not be NULL.
100 * @radio_write: Write to a Radio register.
101 * Must not be NULL.
102 *
103 * @supports_hwpctl: Returns a boolean whether Hardware Power Control
104 * is supported or not.
105 * If NULL, hwpctl is assumed to be never supported.
106 * @software_rfkill: Turn the radio ON or OFF.
107 * Possible state values are
108 * RFKILL_STATE_SOFT_BLOCKED or
109 * RFKILL_STATE_UNBLOCKED
110 * Must not be NULL.
111 * @switch_analog: Turn the Analog on/off.
112 * Must not be NULL.
113 * @switch_channel: Switch the radio to another channel.
114 * Must not be NULL.
115 * @get_default_chan: Just returns the default channel number.
116 * Must not be NULL.
117 * @set_rx_antenna: Set the antenna used for RX.
118 * Can be NULL, if not supported.
119 * @interf_mitigation: Switch the Interference Mitigation mode.
120 * Can be NULL, if not supported.
121 *
122 * @recalc_txpower: Recalculate the transmission power parameters.
123 * This callback has to recalculate the TX power settings,
124 * but does not need to write them to the hardware, yet.
125 * Returns enum b43_txpwr_result to indicate whether the hardware
126 * needs to be adjusted.
127 * If B43_TXPWR_NEED_ADJUST is returned, @adjust_txpower
128 * will be called later.
129 * If the parameter "ignore_tssi" is true, the TSSI values should
130 * be ignored and a recalculation of the power settings should be
131 * done even if the TSSI values did not change.
132 * This callback is called with wl->irq_lock held and must not sleep.
133 * Must not be NULL.
134 * @adjust_txpower: Write the previously calculated TX power settings
135 * (from @recalc_txpower) to the hardware.
136 * This function may sleep.
137 * Can be NULL, if (and ONLY if) @recalc_txpower _always_
138 * returns B43_TXPWR_RES_DONE.
139 *
140 * @pwork_15sec: Periodic work. Called every 15 seconds.
141 * Can be NULL, if not required.
142 * @pwork_60sec: Periodic work. Called every 60 seconds.
143 * Can be NULL, if not required.
144 */
145 struct b43_phy_operations {
146 /* Initialisation */
147 int (*allocate)(struct b43_wldev *dev);
148 void (*free)(struct b43_wldev *dev);
149 void (*prepare_structs)(struct b43_wldev *dev);
150 int (*prepare_hardware)(struct b43_wldev *dev);
151 int (*init)(struct b43_wldev *dev);
152 void (*exit)(struct b43_wldev *dev);
153
154 /* Register access */
155 u16 (*phy_read)(struct b43_wldev *dev, u16 reg);
156 void (*phy_write)(struct b43_wldev *dev, u16 reg, u16 value);
157 u16 (*radio_read)(struct b43_wldev *dev, u16 reg);
158 void (*radio_write)(struct b43_wldev *dev, u16 reg, u16 value);
159
160 /* Radio */
161 bool (*supports_hwpctl)(struct b43_wldev *dev);
162 void (*software_rfkill)(struct b43_wldev *dev, bool blocked);
163 void (*switch_analog)(struct b43_wldev *dev, bool on);
164 int (*switch_channel)(struct b43_wldev *dev, unsigned int new_channel);
165 unsigned int (*get_default_chan)(struct b43_wldev *dev);
166 void (*set_rx_antenna)(struct b43_wldev *dev, int antenna);
167 int (*interf_mitigation)(struct b43_wldev *dev,
168 enum b43_interference_mitigation new_mode);
169
170 /* Transmission power adjustment */
171 enum b43_txpwr_result (*recalc_txpower)(struct b43_wldev *dev,
172 bool ignore_tssi);
173 void (*adjust_txpower)(struct b43_wldev *dev);
174
175 /* Misc */
176 void (*pwork_15sec)(struct b43_wldev *dev);
177 void (*pwork_60sec)(struct b43_wldev *dev);
178 };
179
180 struct b43_phy_a;
181 struct b43_phy_g;
182 struct b43_phy_n;
183 struct b43_phy_lp;
184
185 struct b43_phy {
186 /* Hardware operation callbacks. */
187 const struct b43_phy_operations *ops;
188
189 /* Most hardware context information is stored in the standard-
190 * specific data structures pointed to by the pointers below.
191 * Only one of them is valid (the currently enabled PHY). */
192 #ifdef CONFIG_B43_DEBUG
193 /* No union for debug build to force NULL derefs in buggy code. */
194 struct {
195 #else
196 union {
197 #endif
198 /* A-PHY specific information */
199 struct b43_phy_a *a;
200 /* G-PHY specific information */
201 struct b43_phy_g *g;
202 /* N-PHY specific information */
203 struct b43_phy_n *n;
204 /* LP-PHY specific information */
205 struct b43_phy_lp *lp;
206 };
207
208 /* Band support flags. */
209 bool supports_2ghz;
210 bool supports_5ghz;
211
212 /* GMODE bit enabled? */
213 bool gmode;
214
215 /* Analog Type */
216 u8 analog;
217 /* B43_PHYTYPE_ */
218 u8 type;
219 /* PHY revision number. */
220 u8 rev;
221
222 /* Radio versioning */
223 u16 radio_manuf; /* Radio manufacturer */
224 u16 radio_ver; /* Radio version */
225 u8 radio_rev; /* Radio revision */
226
227 /* Software state of the radio */
228 bool radio_on;
229
230 /* Desired TX power level (in dBm).
231 * This is set by the user and adjusted in b43_phy_xmitpower(). */
232 int desired_txpower;
233
234 /* Hardware Power Control enabled? */
235 bool hardware_power_control;
236
237 /* The time (in absolute jiffies) when the next TX power output
238 * check is needed. */
239 unsigned long next_txpwr_check_time;
240
241 /* current channel */
242 unsigned int channel;
243
244 /* PHY TX errors counter. */
245 atomic_t txerr_cnt;
246
247 #ifdef CONFIG_B43_DEBUG
248 /* PHY registers locked (w.r.t. firmware) */
249 bool phy_locked;
250 /* Radio registers locked (w.r.t. firmware) */
251 bool radio_locked;
252 #endif /* B43_DEBUG */
253 };
254
255
256 /**
257 * b43_phy_allocate - Allocate PHY structs
258 * Allocate the PHY data structures, based on the current dev->phy.type
259 */
260 int b43_phy_allocate(struct b43_wldev *dev);
261
262 /**
263 * b43_phy_free - Free PHY structs
264 */
265 void b43_phy_free(struct b43_wldev *dev);
266
267 /**
268 * b43_phy_init - Initialise the PHY
269 */
270 int b43_phy_init(struct b43_wldev *dev);
271
272 /**
273 * b43_phy_exit - Cleanup PHY
274 */
275 void b43_phy_exit(struct b43_wldev *dev);
276
277 /**
278 * b43_has_hardware_pctl - Hardware Power Control supported?
279 * Returns a boolean, whether hardware power control is supported.
280 */
281 bool b43_has_hardware_pctl(struct b43_wldev *dev);
282
283 /**
284 * b43_phy_read - 16bit PHY register read access
285 */
286 u16 b43_phy_read(struct b43_wldev *dev, u16 reg);
287
288 /**
289 * b43_phy_write - 16bit PHY register write access
290 */
291 void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value);
292
293 /**
294 * b43_phy_mask - Mask a PHY register with a mask
295 */
296 void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask);
297
298 /**
299 * b43_phy_set - OR a PHY register with a bitmap
300 */
301 void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set);
302
303 /**
304 * b43_phy_maskset - Mask and OR a PHY register with a mask and bitmap
305 */
306 void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
307
308 /**
309 * b43_radio_read - 16bit Radio register read access
310 */
311 u16 b43_radio_read(struct b43_wldev *dev, u16 reg);
312 #define b43_radio_read16 b43_radio_read /* DEPRECATED */
313
314 /**
315 * b43_radio_write - 16bit Radio register write access
316 */
317 void b43_radio_write(struct b43_wldev *dev, u16 reg, u16 value);
318 #define b43_radio_write16 b43_radio_write /* DEPRECATED */
319
320 /**
321 * b43_radio_mask - Mask a 16bit radio register with a mask
322 */
323 void b43_radio_mask(struct b43_wldev *dev, u16 offset, u16 mask);
324
325 /**
326 * b43_radio_set - OR a 16bit radio register with a bitmap
327 */
328 void b43_radio_set(struct b43_wldev *dev, u16 offset, u16 set);
329
330 /**
331 * b43_radio_maskset - Mask and OR a radio register with a mask and bitmap
332 */
333 void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
334
335 /**
336 * b43_radio_lock - Lock firmware radio register access
337 */
338 void b43_radio_lock(struct b43_wldev *dev);
339
340 /**
341 * b43_radio_unlock - Unlock firmware radio register access
342 */
343 void b43_radio_unlock(struct b43_wldev *dev);
344
345 /**
346 * b43_phy_lock - Lock firmware PHY register access
347 */
348 void b43_phy_lock(struct b43_wldev *dev);
349
350 /**
351 * b43_phy_unlock - Unlock firmware PHY register access
352 */
353 void b43_phy_unlock(struct b43_wldev *dev);
354
355 /**
356 * b43_switch_channel - Switch to another channel
357 */
358 int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel);
359 /**
360 * B43_DEFAULT_CHANNEL - Switch to the default channel.
361 */
362 #define B43_DEFAULT_CHANNEL UINT_MAX
363
364 /**
365 * b43_software_rfkill - Turn the radio ON or OFF in software.
366 */
367 void b43_software_rfkill(struct b43_wldev *dev, bool blocked);
368
369 /**
370 * b43_phy_txpower_check - Check TX power output.
371 *
372 * Compare the current TX power output to the desired power emission
373 * and schedule an adjustment in case it mismatches.
374 * Requires wl->irq_lock locked.
375 *
376 * @flags: OR'ed enum b43_phy_txpower_check_flags flags.
377 * See the docs below.
378 */
379 void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags);
380 /**
381 * enum b43_phy_txpower_check_flags - Flags for b43_phy_txpower_check()
382 *
383 * @B43_TXPWR_IGNORE_TIME: Ignore the schedule time and force-redo
384 * the check now.
385 * @B43_TXPWR_IGNORE_TSSI: Redo the recalculation, even if the average
386 * TSSI did not change.
387 */
388 enum b43_phy_txpower_check_flags {
389 B43_TXPWR_IGNORE_TIME = (1 << 0),
390 B43_TXPWR_IGNORE_TSSI = (1 << 1),
391 };
392
393 struct work_struct;
394 void b43_phy_txpower_adjust_work(struct work_struct *work);
395
396 /**
397 * b43_phy_shm_tssi_read - Read the average of the last 4 TSSI from SHM.
398 *
399 * @shm_offset: The SHM address to read the values from.
400 *
401 * Returns the average of the 4 TSSI values, or a negative error code.
402 */
403 int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset);
404
405 /**
406 * b43_phy_switch_analog_generic - Generic PHY operation for switching the Analog.
407 *
408 * It does the switching based on the PHY0 core register.
409 * Do _not_ call this directly. Only use it as a switch_analog callback
410 * for struct b43_phy_operations.
411 */
412 void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on);
413
414
415 #endif /* LINUX_B43_PHY_COMMON_H_ */
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