3 Broadcom B43 wireless driver
7 Copyright (c) 2005-2008 Michael Buesch <mb@bu3sch.de>
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; see the file COPYING. If not, write to
21 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
22 Boston, MA 02110-1301, USA.
32 #include <linux/delay.h>
33 #include <linux/sched.h>
36 static u16
generate_cookie(struct b43_pio_txqueue
*q
,
37 struct b43_pio_txpacket
*pack
)
41 /* Use the upper 4 bits of the cookie as
42 * PIO controller ID and store the packet index number
43 * in the lower 12 bits.
44 * Note that the cookie must never be 0, as this
45 * is a special value used in RX path.
46 * It can also not be 0xFFFF because that is special
47 * for multicast frames.
49 cookie
= (((u16
)q
->index
+ 1) << 12);
50 cookie
|= pack
->index
;
56 struct b43_pio_txqueue
*parse_cookie(struct b43_wldev
*dev
,
58 struct b43_pio_txpacket
**pack
)
60 struct b43_pio
*pio
= &dev
->pio
;
61 struct b43_pio_txqueue
*q
= NULL
;
62 unsigned int pack_index
;
64 switch (cookie
& 0xF000) {
66 q
= pio
->tx_queue_AC_BK
;
69 q
= pio
->tx_queue_AC_BE
;
72 q
= pio
->tx_queue_AC_VI
;
75 q
= pio
->tx_queue_AC_VO
;
78 q
= pio
->tx_queue_mcast
;
83 pack_index
= (cookie
& 0x0FFF);
84 if (B43_WARN_ON(pack_index
>= ARRAY_SIZE(q
->packets
)))
86 *pack
= &q
->packets
[pack_index
];
91 static u16
index_to_pioqueue_base(struct b43_wldev
*dev
,
94 static const u16 bases
[] = {
104 static const u16 bases_rev11
[] = {
105 B43_MMIO_PIO11_BASE0
,
106 B43_MMIO_PIO11_BASE1
,
107 B43_MMIO_PIO11_BASE2
,
108 B43_MMIO_PIO11_BASE3
,
109 B43_MMIO_PIO11_BASE4
,
110 B43_MMIO_PIO11_BASE5
,
113 if (dev
->dev
->id
.revision
>= 11) {
114 B43_WARN_ON(index
>= ARRAY_SIZE(bases_rev11
));
115 return bases_rev11
[index
];
117 B43_WARN_ON(index
>= ARRAY_SIZE(bases
));
121 static u16
pio_txqueue_offset(struct b43_wldev
*dev
)
123 if (dev
->dev
->id
.revision
>= 11)
128 static u16
pio_rxqueue_offset(struct b43_wldev
*dev
)
130 if (dev
->dev
->id
.revision
>= 11)
135 static struct b43_pio_txqueue
*b43_setup_pioqueue_tx(struct b43_wldev
*dev
,
138 struct b43_pio_txqueue
*q
;
139 struct b43_pio_txpacket
*p
;
142 q
= kzalloc(sizeof(*q
), GFP_KERNEL
);
146 q
->rev
= dev
->dev
->id
.revision
;
147 q
->mmio_base
= index_to_pioqueue_base(dev
, index
) +
148 pio_txqueue_offset(dev
);
151 q
->free_packet_slots
= B43_PIO_MAX_NR_TXPACKETS
;
153 q
->buffer_size
= 1920; //FIXME this constant is wrong.
155 q
->buffer_size
= b43_piotx_read16(q
, B43_PIO_TXQBUFSIZE
);
156 q
->buffer_size
-= 80;
159 INIT_LIST_HEAD(&q
->packets_list
);
160 for (i
= 0; i
< ARRAY_SIZE(q
->packets
); i
++) {
161 p
= &(q
->packets
[i
]);
162 INIT_LIST_HEAD(&p
->list
);
165 list_add(&p
->list
, &q
->packets_list
);
171 static struct b43_pio_rxqueue
*b43_setup_pioqueue_rx(struct b43_wldev
*dev
,
174 struct b43_pio_rxqueue
*q
;
176 q
= kzalloc(sizeof(*q
), GFP_KERNEL
);
180 q
->rev
= dev
->dev
->id
.revision
;
181 q
->mmio_base
= index_to_pioqueue_base(dev
, index
) +
182 pio_rxqueue_offset(dev
);
184 /* Enable Direct FIFO RX (PIO) on the engine. */
185 b43_dma_direct_fifo_rx(dev
, index
, 1);
190 static void b43_pio_cancel_tx_packets(struct b43_pio_txqueue
*q
)
192 struct b43_pio_txpacket
*pack
;
195 for (i
= 0; i
< ARRAY_SIZE(q
->packets
); i
++) {
196 pack
= &(q
->packets
[i
]);
198 dev_kfree_skb_any(pack
->skb
);
204 static void b43_destroy_pioqueue_tx(struct b43_pio_txqueue
*q
,
209 b43_pio_cancel_tx_packets(q
);
213 static void b43_destroy_pioqueue_rx(struct b43_pio_rxqueue
*q
,
221 #define destroy_queue_tx(pio, queue) do { \
222 b43_destroy_pioqueue_tx((pio)->queue, __stringify(queue)); \
223 (pio)->queue = NULL; \
226 #define destroy_queue_rx(pio, queue) do { \
227 b43_destroy_pioqueue_rx((pio)->queue, __stringify(queue)); \
228 (pio)->queue = NULL; \
231 void b43_pio_free(struct b43_wldev
*dev
)
235 if (!b43_using_pio_transfers(dev
))
239 destroy_queue_rx(pio
, rx_queue
);
240 destroy_queue_tx(pio
, tx_queue_mcast
);
241 destroy_queue_tx(pio
, tx_queue_AC_VO
);
242 destroy_queue_tx(pio
, tx_queue_AC_VI
);
243 destroy_queue_tx(pio
, tx_queue_AC_BE
);
244 destroy_queue_tx(pio
, tx_queue_AC_BK
);
247 int b43_pio_init(struct b43_wldev
*dev
)
249 struct b43_pio
*pio
= &dev
->pio
;
252 b43_write32(dev
, B43_MMIO_MACCTL
, b43_read32(dev
, B43_MMIO_MACCTL
)
254 b43_shm_write16(dev
, B43_SHM_SHARED
, B43_SHM_SH_RXPADOFF
, 0);
256 pio
->tx_queue_AC_BK
= b43_setup_pioqueue_tx(dev
, 0);
257 if (!pio
->tx_queue_AC_BK
)
260 pio
->tx_queue_AC_BE
= b43_setup_pioqueue_tx(dev
, 1);
261 if (!pio
->tx_queue_AC_BE
)
264 pio
->tx_queue_AC_VI
= b43_setup_pioqueue_tx(dev
, 2);
265 if (!pio
->tx_queue_AC_VI
)
268 pio
->tx_queue_AC_VO
= b43_setup_pioqueue_tx(dev
, 3);
269 if (!pio
->tx_queue_AC_VO
)
272 pio
->tx_queue_mcast
= b43_setup_pioqueue_tx(dev
, 4);
273 if (!pio
->tx_queue_mcast
)
276 pio
->rx_queue
= b43_setup_pioqueue_rx(dev
, 0);
278 goto err_destroy_mcast
;
280 b43dbg(dev
->wl
, "PIO initialized\n");
286 destroy_queue_tx(pio
, tx_queue_mcast
);
288 destroy_queue_tx(pio
, tx_queue_AC_VO
);
290 destroy_queue_tx(pio
, tx_queue_AC_VI
);
292 destroy_queue_tx(pio
, tx_queue_AC_BE
);
294 destroy_queue_tx(pio
, tx_queue_AC_BK
);
298 /* Static mapping of mac80211's queues (priorities) to b43 PIO queues. */
299 static struct b43_pio_txqueue
*select_queue_by_priority(struct b43_wldev
*dev
,
302 struct b43_pio_txqueue
*q
;
304 if (dev
->qos_enabled
) {
305 /* 0 = highest priority */
306 switch (queue_prio
) {
311 q
= dev
->pio
.tx_queue_AC_VO
;
314 q
= dev
->pio
.tx_queue_AC_VI
;
317 q
= dev
->pio
.tx_queue_AC_BE
;
320 q
= dev
->pio
.tx_queue_AC_BK
;
324 q
= dev
->pio
.tx_queue_AC_BE
;
329 static u16
tx_write_2byte_queue(struct b43_pio_txqueue
*q
,
332 unsigned int data_len
)
334 struct b43_wldev
*dev
= q
->dev
;
335 const u8
*data
= _data
;
337 ctl
|= B43_PIO_TXCTL_WRITELO
| B43_PIO_TXCTL_WRITEHI
;
338 b43_piotx_write16(q
, B43_PIO_TXCTL
, ctl
);
340 ssb_block_write(dev
->dev
, data
, (data_len
& ~1),
341 q
->mmio_base
+ B43_PIO_TXDATA
,
346 /* Write the last byte. */
347 ctl
&= ~B43_PIO_TXCTL_WRITEHI
;
348 b43_piotx_write16(q
, B43_PIO_TXCTL
, ctl
);
349 tail
[0] = data
[data_len
- 1];
350 ssb_block_write(dev
->dev
, tail
, 2,
351 q
->mmio_base
+ B43_PIO_TXDATA
,
358 static void pio_tx_frame_2byte_queue(struct b43_pio_txpacket
*pack
,
359 const u8
*hdr
, unsigned int hdrlen
)
361 struct b43_pio_txqueue
*q
= pack
->queue
;
362 const char *frame
= pack
->skb
->data
;
363 unsigned int frame_len
= pack
->skb
->len
;
366 ctl
= b43_piotx_read16(q
, B43_PIO_TXCTL
);
367 ctl
|= B43_PIO_TXCTL_FREADY
;
368 ctl
&= ~B43_PIO_TXCTL_EOF
;
370 /* Transfer the header data. */
371 ctl
= tx_write_2byte_queue(q
, ctl
, hdr
, hdrlen
);
372 /* Transfer the frame data. */
373 ctl
= tx_write_2byte_queue(q
, ctl
, frame
, frame_len
);
375 ctl
|= B43_PIO_TXCTL_EOF
;
376 b43_piotx_write16(q
, B43_PIO_TXCTL
, ctl
);
379 static u32
tx_write_4byte_queue(struct b43_pio_txqueue
*q
,
382 unsigned int data_len
)
384 struct b43_wldev
*dev
= q
->dev
;
385 const u8
*data
= _data
;
387 ctl
|= B43_PIO8_TXCTL_0_7
| B43_PIO8_TXCTL_8_15
|
388 B43_PIO8_TXCTL_16_23
| B43_PIO8_TXCTL_24_31
;
389 b43_piotx_write32(q
, B43_PIO8_TXCTL
, ctl
);
391 ssb_block_write(dev
->dev
, data
, (data_len
& ~3),
392 q
->mmio_base
+ B43_PIO8_TXDATA
,
397 /* Write the last few bytes. */
398 ctl
&= ~(B43_PIO8_TXCTL_8_15
| B43_PIO8_TXCTL_16_23
|
399 B43_PIO8_TXCTL_24_31
);
400 switch (data_len
& 3) {
402 ctl
|= B43_PIO8_TXCTL_16_23
| B43_PIO8_TXCTL_8_15
;
403 tail
[0] = data
[data_len
- 3];
404 tail
[1] = data
[data_len
- 2];
405 tail
[2] = data
[data_len
- 1];
408 ctl
|= B43_PIO8_TXCTL_8_15
;
409 tail
[0] = data
[data_len
- 2];
410 tail
[1] = data
[data_len
- 1];
413 tail
[0] = data
[data_len
- 1];
416 b43_piotx_write32(q
, B43_PIO8_TXCTL
, ctl
);
417 ssb_block_write(dev
->dev
, tail
, 4,
418 q
->mmio_base
+ B43_PIO8_TXDATA
,
425 static void pio_tx_frame_4byte_queue(struct b43_pio_txpacket
*pack
,
426 const u8
*hdr
, unsigned int hdrlen
)
428 struct b43_pio_txqueue
*q
= pack
->queue
;
429 const char *frame
= pack
->skb
->data
;
430 unsigned int frame_len
= pack
->skb
->len
;
433 ctl
= b43_piotx_read32(q
, B43_PIO8_TXCTL
);
434 ctl
|= B43_PIO8_TXCTL_FREADY
;
435 ctl
&= ~B43_PIO8_TXCTL_EOF
;
437 /* Transfer the header data. */
438 ctl
= tx_write_4byte_queue(q
, ctl
, hdr
, hdrlen
);
439 /* Transfer the frame data. */
440 ctl
= tx_write_4byte_queue(q
, ctl
, frame
, frame_len
);
442 ctl
|= B43_PIO8_TXCTL_EOF
;
443 b43_piotx_write32(q
, B43_PIO_TXCTL
, ctl
);
446 static int pio_tx_frame(struct b43_pio_txqueue
*q
,
449 struct b43_pio_txpacket
*pack
;
450 struct b43_txhdr txhdr
;
454 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
456 B43_WARN_ON(list_empty(&q
->packets_list
));
457 pack
= list_entry(q
->packets_list
.next
,
458 struct b43_pio_txpacket
, list
);
460 cookie
= generate_cookie(q
, pack
);
461 hdrlen
= b43_txhdr_size(q
->dev
);
462 err
= b43_generate_txhdr(q
->dev
, (u8
*)&txhdr
, skb
,
467 if (info
->flags
& IEEE80211_TX_CTL_SEND_AFTER_DTIM
) {
468 /* Tell the firmware about the cookie of the last
469 * mcast frame, so it can clear the more-data bit in it. */
470 b43_shm_write16(q
->dev
, B43_SHM_SHARED
,
471 B43_SHM_SH_MCASTCOOKIE
, cookie
);
476 pio_tx_frame_4byte_queue(pack
, (const u8
*)&txhdr
, hdrlen
);
478 pio_tx_frame_2byte_queue(pack
, (const u8
*)&txhdr
, hdrlen
);
480 /* Remove it from the list of available packet slots.
481 * It will be put back when we receive the status report. */
482 list_del(&pack
->list
);
484 /* Update the queue statistics. */
485 q
->buffer_used
+= roundup(skb
->len
+ hdrlen
, 4);
486 q
->free_packet_slots
-= 1;
491 int b43_pio_tx(struct b43_wldev
*dev
, struct sk_buff
*skb
)
493 struct b43_pio_txqueue
*q
;
494 struct ieee80211_hdr
*hdr
;
495 unsigned int hdrlen
, total_len
;
497 struct ieee80211_tx_info
*info
= IEEE80211_SKB_CB(skb
);
499 hdr
= (struct ieee80211_hdr
*)skb
->data
;
501 if (info
->flags
& IEEE80211_TX_CTL_SEND_AFTER_DTIM
) {
502 /* The multicast queue will be sent after the DTIM. */
503 q
= dev
->pio
.tx_queue_mcast
;
504 /* Set the frame More-Data bit. Ucode will clear it
505 * for us on the last frame. */
506 hdr
->frame_control
|= cpu_to_le16(IEEE80211_FCTL_MOREDATA
);
508 /* Decide by priority where to put this frame. */
509 q
= select_queue_by_priority(dev
, skb_get_queue_mapping(skb
));
512 hdrlen
= b43_txhdr_size(dev
);
513 total_len
= roundup(skb
->len
+ hdrlen
, 4);
515 if (unlikely(total_len
> q
->buffer_size
)) {
517 b43dbg(dev
->wl
, "PIO: TX packet longer than queue.\n");
520 if (unlikely(q
->free_packet_slots
== 0)) {
522 b43warn(dev
->wl
, "PIO: TX packet overflow.\n");
525 B43_WARN_ON(q
->buffer_used
> q
->buffer_size
);
527 if (total_len
> (q
->buffer_size
- q
->buffer_used
)) {
528 /* Not enough memory on the queue. */
530 ieee80211_stop_queue(dev
->wl
->hw
, skb_get_queue_mapping(skb
));
535 /* Assign the queue number to the ring (if not already done before)
536 * so TX status handling can use it. The mac80211-queue to b43-queue
537 * mapping is static, so we don't need to store it per frame. */
538 q
->queue_prio
= skb_get_queue_mapping(skb
);
540 err
= pio_tx_frame(q
, skb
);
541 if (unlikely(err
== -ENOKEY
)) {
542 /* Drop this packet, as we don't have the encryption key
543 * anymore and must not transmit it unencrypted. */
544 dev_kfree_skb_any(skb
);
549 b43err(dev
->wl
, "PIO transmission failure\n");
554 B43_WARN_ON(q
->buffer_used
> q
->buffer_size
);
555 if (((q
->buffer_size
- q
->buffer_used
) < roundup(2 + 2 + 6, 4)) ||
556 (q
->free_packet_slots
== 0)) {
557 /* The queue is full. */
558 ieee80211_stop_queue(dev
->wl
->hw
, skb_get_queue_mapping(skb
));
566 void b43_pio_handle_txstatus(struct b43_wldev
*dev
,
567 const struct b43_txstatus
*status
)
569 struct b43_pio_txqueue
*q
;
570 struct b43_pio_txpacket
*pack
= NULL
;
571 unsigned int total_len
;
572 struct ieee80211_tx_info
*info
;
574 q
= parse_cookie(dev
, status
->cookie
, &pack
);
579 info
= IEEE80211_SKB_CB(pack
->skb
);
581 b43_fill_txstatus_report(dev
, info
, status
);
583 total_len
= pack
->skb
->len
+ b43_txhdr_size(dev
);
584 total_len
= roundup(total_len
, 4);
585 q
->buffer_used
-= total_len
;
586 q
->free_packet_slots
+= 1;
588 ieee80211_tx_status(dev
->wl
->hw
, pack
->skb
);
590 list_add(&pack
->list
, &q
->packets_list
);
593 ieee80211_wake_queue(dev
->wl
->hw
, q
->queue_prio
);
598 void b43_pio_get_tx_stats(struct b43_wldev
*dev
,
599 struct ieee80211_tx_queue_stats
*stats
)
601 const int nr_queues
= dev
->wl
->hw
->queues
;
602 struct b43_pio_txqueue
*q
;
605 for (i
= 0; i
< nr_queues
; i
++) {
606 q
= select_queue_by_priority(dev
, i
);
608 stats
[i
].len
= B43_PIO_MAX_NR_TXPACKETS
- q
->free_packet_slots
;
609 stats
[i
].limit
= B43_PIO_MAX_NR_TXPACKETS
;
610 stats
[i
].count
= q
->nr_tx_packets
;
614 /* Returns whether we should fetch another frame. */
615 static bool pio_rx_frame(struct b43_pio_rxqueue
*q
)
617 struct b43_wldev
*dev
= q
->dev
;
618 struct b43_rxhdr_fw4 rxhdr
;
621 unsigned int i
, padding
;
623 const char *err_msg
= NULL
;
625 memset(&rxhdr
, 0, sizeof(rxhdr
));
627 /* Check if we have data and wait for it to get ready. */
631 ctl
= b43_piorx_read32(q
, B43_PIO8_RXCTL
);
632 if (!(ctl
& B43_PIO8_RXCTL_FRAMERDY
))
634 b43_piorx_write32(q
, B43_PIO8_RXCTL
,
635 B43_PIO8_RXCTL_FRAMERDY
);
636 for (i
= 0; i
< 10; i
++) {
637 ctl
= b43_piorx_read32(q
, B43_PIO8_RXCTL
);
638 if (ctl
& B43_PIO8_RXCTL_DATARDY
)
645 ctl
= b43_piorx_read16(q
, B43_PIO_RXCTL
);
646 if (!(ctl
& B43_PIO_RXCTL_FRAMERDY
))
648 b43_piorx_write16(q
, B43_PIO_RXCTL
,
649 B43_PIO_RXCTL_FRAMERDY
);
650 for (i
= 0; i
< 10; i
++) {
651 ctl
= b43_piorx_read16(q
, B43_PIO_RXCTL
);
652 if (ctl
& B43_PIO_RXCTL_DATARDY
)
657 b43dbg(q
->dev
->wl
, "PIO RX timed out\n");
661 /* Get the preamble (RX header) */
663 ssb_block_read(dev
->dev
, &rxhdr
, sizeof(rxhdr
),
664 q
->mmio_base
+ B43_PIO8_RXDATA
,
667 ssb_block_read(dev
->dev
, &rxhdr
, sizeof(rxhdr
),
668 q
->mmio_base
+ B43_PIO_RXDATA
,
672 len
= le16_to_cpu(rxhdr
.frame_len
);
673 if (unlikely(len
> 0x700)) {
674 err_msg
= "len > 0x700";
677 if (unlikely(len
== 0)) {
678 err_msg
= "len == 0";
682 macstat
= le32_to_cpu(rxhdr
.mac_status
);
683 if (macstat
& B43_RX_MAC_FCSERR
) {
684 if (!(q
->dev
->wl
->filter_flags
& FIF_FCSFAIL
)) {
685 /* Drop frames with failed FCS. */
686 err_msg
= "Frame FCS error";
691 /* We always pad 2 bytes, as that's what upstream code expects
692 * due to the RX-header being 30 bytes. In case the frame is
693 * unaligned, we pad another 2 bytes. */
694 padding
= (macstat
& B43_RX_MAC_PADDING
) ? 2 : 0;
695 skb
= dev_alloc_skb(len
+ padding
+ 2);
696 if (unlikely(!skb
)) {
697 err_msg
= "Out of memory";
701 skb_put(skb
, len
+ padding
);
703 ssb_block_read(dev
->dev
, skb
->data
+ padding
, (len
& ~3),
704 q
->mmio_base
+ B43_PIO8_RXDATA
,
709 /* Read the last few bytes. */
710 ssb_block_read(dev
->dev
, tail
, 4,
711 q
->mmio_base
+ B43_PIO8_RXDATA
,
715 skb
->data
[len
+ padding
- 3] = tail
[0];
716 skb
->data
[len
+ padding
- 2] = tail
[1];
717 skb
->data
[len
+ padding
- 1] = tail
[2];
720 skb
->data
[len
+ padding
- 2] = tail
[0];
721 skb
->data
[len
+ padding
- 1] = tail
[1];
724 skb
->data
[len
+ padding
- 1] = tail
[0];
729 ssb_block_read(dev
->dev
, skb
->data
+ padding
, (len
& ~1),
730 q
->mmio_base
+ B43_PIO_RXDATA
,
735 /* Read the last byte. */
736 ssb_block_read(dev
->dev
, tail
, 2,
737 q
->mmio_base
+ B43_PIO_RXDATA
,
739 skb
->data
[len
+ padding
- 1] = tail
[0];
743 b43_rx(q
->dev
, skb
, &rxhdr
);
749 b43dbg(q
->dev
->wl
, "PIO RX error: %s\n", err_msg
);
750 b43_piorx_write16(q
, B43_PIO_RXCTL
, B43_PIO_RXCTL_DATARDY
);
754 void b43_pio_rx(struct b43_pio_rxqueue
*q
)
756 unsigned int count
= 0;
760 stop
= (pio_rx_frame(q
) == 0);
764 if (WARN_ON_ONCE(++count
> 10000))
769 static void b43_pio_tx_suspend_queue(struct b43_pio_txqueue
*q
)
772 b43_piotx_write32(q
, B43_PIO8_TXCTL
,
773 b43_piotx_read32(q
, B43_PIO8_TXCTL
)
774 | B43_PIO8_TXCTL_SUSPREQ
);
776 b43_piotx_write16(q
, B43_PIO_TXCTL
,
777 b43_piotx_read16(q
, B43_PIO_TXCTL
)
778 | B43_PIO_TXCTL_SUSPREQ
);
782 static void b43_pio_tx_resume_queue(struct b43_pio_txqueue
*q
)
785 b43_piotx_write32(q
, B43_PIO8_TXCTL
,
786 b43_piotx_read32(q
, B43_PIO8_TXCTL
)
787 & ~B43_PIO8_TXCTL_SUSPREQ
);
789 b43_piotx_write16(q
, B43_PIO_TXCTL
,
790 b43_piotx_read16(q
, B43_PIO_TXCTL
)
791 & ~B43_PIO_TXCTL_SUSPREQ
);
795 void b43_pio_tx_suspend(struct b43_wldev
*dev
)
797 b43_power_saving_ctl_bits(dev
, B43_PS_AWAKE
);
798 b43_pio_tx_suspend_queue(dev
->pio
.tx_queue_AC_BK
);
799 b43_pio_tx_suspend_queue(dev
->pio
.tx_queue_AC_BE
);
800 b43_pio_tx_suspend_queue(dev
->pio
.tx_queue_AC_VI
);
801 b43_pio_tx_suspend_queue(dev
->pio
.tx_queue_AC_VO
);
802 b43_pio_tx_suspend_queue(dev
->pio
.tx_queue_mcast
);
805 void b43_pio_tx_resume(struct b43_wldev
*dev
)
807 b43_pio_tx_resume_queue(dev
->pio
.tx_queue_mcast
);
808 b43_pio_tx_resume_queue(dev
->pio
.tx_queue_AC_VO
);
809 b43_pio_tx_resume_queue(dev
->pio
.tx_queue_AC_VI
);
810 b43_pio_tx_resume_queue(dev
->pio
.tx_queue_AC_BE
);
811 b43_pio_tx_resume_queue(dev
->pio
.tx_queue_AC_BK
);
812 b43_power_saving_ctl_bits(dev
, 0);