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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[deliverable/linux.git] / drivers / net / wireless / b43legacy / main.c
1 /*
2 *
3 * Broadcom B43legacy wireless driver
4 *
5 * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6 * Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
7 * Copyright (c) 2005, 2006 Michael Buesch <m@bues.ch>
8 * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10 * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
11 *
12 * Some parts of the code in this file are derived from the ipw2200
13 * driver Copyright(c) 2003 - 2004 Intel Corporation.
14
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; see the file COPYING. If not, write to
27 * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
28 * Boston, MA 02110-1301, USA.
29 *
30 */
31
32 #include <linux/delay.h>
33 #include <linux/init.h>
34 #include <linux/module.h>
35 #include <linux/if_arp.h>
36 #include <linux/etherdevice.h>
37 #include <linux/firmware.h>
38 #include <linux/workqueue.h>
39 #include <linux/sched.h>
40 #include <linux/skbuff.h>
41 #include <linux/dma-mapping.h>
42 #include <linux/slab.h>
43 #include <net/dst.h>
44 #include <asm/unaligned.h>
45
46 #include "b43legacy.h"
47 #include "main.h"
48 #include "debugfs.h"
49 #include "phy.h"
50 #include "dma.h"
51 #include "pio.h"
52 #include "sysfs.h"
53 #include "xmit.h"
54 #include "radio.h"
55
56
57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
58 MODULE_AUTHOR("Martin Langer");
59 MODULE_AUTHOR("Stefano Brivio");
60 MODULE_AUTHOR("Michael Buesch");
61 MODULE_LICENSE("GPL");
62
63 MODULE_FIRMWARE("b43legacy/ucode2.fw");
64 MODULE_FIRMWARE("b43legacy/ucode4.fw");
65
66 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
67 static int modparam_pio;
68 module_param_named(pio, modparam_pio, int, 0444);
69 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
70 #elif defined(CONFIG_B43LEGACY_DMA)
71 # define modparam_pio 0
72 #elif defined(CONFIG_B43LEGACY_PIO)
73 # define modparam_pio 1
74 #endif
75
76 static int modparam_bad_frames_preempt;
77 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
78 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
79 " Preemption");
80
81 static char modparam_fwpostfix[16];
82 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
83 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
84
85 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
86 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
87 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
88 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
89 SSB_DEVTABLE_END
90 };
91 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
92
93
94 /* Channel and ratetables are shared for all devices.
95 * They can't be const, because ieee80211 puts some precalculated
96 * data in there. This data is the same for all devices, so we don't
97 * get concurrency issues */
98 #define RATETAB_ENT(_rateid, _flags) \
99 { \
100 .bitrate = B43legacy_RATE_TO_100KBPS(_rateid), \
101 .hw_value = (_rateid), \
102 .flags = (_flags), \
103 }
104 /*
105 * NOTE: When changing this, sync with xmit.c's
106 * b43legacy_plcp_get_bitrate_idx_* functions!
107 */
108 static struct ieee80211_rate __b43legacy_ratetable[] = {
109 RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
110 RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
111 RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
112 RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
113 RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
114 RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
115 RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
116 RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
117 RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
118 RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
119 RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0),
120 RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0),
121 };
122 #define b43legacy_b_ratetable (__b43legacy_ratetable + 0)
123 #define b43legacy_b_ratetable_size 4
124 #define b43legacy_g_ratetable (__b43legacy_ratetable + 0)
125 #define b43legacy_g_ratetable_size 12
126
127 #define CHANTAB_ENT(_chanid, _freq) \
128 { \
129 .center_freq = (_freq), \
130 .hw_value = (_chanid), \
131 }
132 static struct ieee80211_channel b43legacy_bg_chantable[] = {
133 CHANTAB_ENT(1, 2412),
134 CHANTAB_ENT(2, 2417),
135 CHANTAB_ENT(3, 2422),
136 CHANTAB_ENT(4, 2427),
137 CHANTAB_ENT(5, 2432),
138 CHANTAB_ENT(6, 2437),
139 CHANTAB_ENT(7, 2442),
140 CHANTAB_ENT(8, 2447),
141 CHANTAB_ENT(9, 2452),
142 CHANTAB_ENT(10, 2457),
143 CHANTAB_ENT(11, 2462),
144 CHANTAB_ENT(12, 2467),
145 CHANTAB_ENT(13, 2472),
146 CHANTAB_ENT(14, 2484),
147 };
148
149 static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = {
150 .channels = b43legacy_bg_chantable,
151 .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
152 .bitrates = b43legacy_b_ratetable,
153 .n_bitrates = b43legacy_b_ratetable_size,
154 };
155
156 static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = {
157 .channels = b43legacy_bg_chantable,
158 .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
159 .bitrates = b43legacy_g_ratetable,
160 .n_bitrates = b43legacy_g_ratetable_size,
161 };
162
163 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
164 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
165 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
166 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
167
168
169 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
170 {
171 if (!wl || !wl->current_dev)
172 return 1;
173 if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
174 return 1;
175 /* We are up and running.
176 * Ratelimit the messages to avoid DoS over the net. */
177 return net_ratelimit();
178 }
179
180 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
181 {
182 struct va_format vaf;
183 va_list args;
184
185 if (!b43legacy_ratelimit(wl))
186 return;
187
188 va_start(args, fmt);
189
190 vaf.fmt = fmt;
191 vaf.va = &args;
192
193 printk(KERN_INFO "b43legacy-%s: %pV",
194 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
195
196 va_end(args);
197 }
198
199 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
200 {
201 struct va_format vaf;
202 va_list args;
203
204 if (!b43legacy_ratelimit(wl))
205 return;
206
207 va_start(args, fmt);
208
209 vaf.fmt = fmt;
210 vaf.va = &args;
211
212 printk(KERN_ERR "b43legacy-%s ERROR: %pV",
213 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
214
215 va_end(args);
216 }
217
218 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
219 {
220 struct va_format vaf;
221 va_list args;
222
223 if (!b43legacy_ratelimit(wl))
224 return;
225
226 va_start(args, fmt);
227
228 vaf.fmt = fmt;
229 vaf.va = &args;
230
231 printk(KERN_WARNING "b43legacy-%s warning: %pV",
232 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
233
234 va_end(args);
235 }
236
237 #if B43legacy_DEBUG
238 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
239 {
240 struct va_format vaf;
241 va_list args;
242
243 va_start(args, fmt);
244
245 vaf.fmt = fmt;
246 vaf.va = &args;
247
248 printk(KERN_DEBUG "b43legacy-%s debug: %pV",
249 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
250
251 va_end(args);
252 }
253 #endif /* DEBUG */
254
255 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
256 u32 val)
257 {
258 u32 status;
259
260 B43legacy_WARN_ON(offset % 4 != 0);
261
262 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
263 if (status & B43legacy_MACCTL_BE)
264 val = swab32(val);
265
266 b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
267 mmiowb();
268 b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
269 }
270
271 static inline
272 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
273 u16 routing, u16 offset)
274 {
275 u32 control;
276
277 /* "offset" is the WORD offset. */
278
279 control = routing;
280 control <<= 16;
281 control |= offset;
282 b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
283 }
284
285 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
286 u16 routing, u16 offset)
287 {
288 u32 ret;
289
290 if (routing == B43legacy_SHM_SHARED) {
291 B43legacy_WARN_ON((offset & 0x0001) != 0);
292 if (offset & 0x0003) {
293 /* Unaligned access */
294 b43legacy_shm_control_word(dev, routing, offset >> 2);
295 ret = b43legacy_read16(dev,
296 B43legacy_MMIO_SHM_DATA_UNALIGNED);
297 ret <<= 16;
298 b43legacy_shm_control_word(dev, routing,
299 (offset >> 2) + 1);
300 ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
301
302 return ret;
303 }
304 offset >>= 2;
305 }
306 b43legacy_shm_control_word(dev, routing, offset);
307 ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
308
309 return ret;
310 }
311
312 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
313 u16 routing, u16 offset)
314 {
315 u16 ret;
316
317 if (routing == B43legacy_SHM_SHARED) {
318 B43legacy_WARN_ON((offset & 0x0001) != 0);
319 if (offset & 0x0003) {
320 /* Unaligned access */
321 b43legacy_shm_control_word(dev, routing, offset >> 2);
322 ret = b43legacy_read16(dev,
323 B43legacy_MMIO_SHM_DATA_UNALIGNED);
324
325 return ret;
326 }
327 offset >>= 2;
328 }
329 b43legacy_shm_control_word(dev, routing, offset);
330 ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
331
332 return ret;
333 }
334
335 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
336 u16 routing, u16 offset,
337 u32 value)
338 {
339 if (routing == B43legacy_SHM_SHARED) {
340 B43legacy_WARN_ON((offset & 0x0001) != 0);
341 if (offset & 0x0003) {
342 /* Unaligned access */
343 b43legacy_shm_control_word(dev, routing, offset >> 2);
344 mmiowb();
345 b43legacy_write16(dev,
346 B43legacy_MMIO_SHM_DATA_UNALIGNED,
347 (value >> 16) & 0xffff);
348 mmiowb();
349 b43legacy_shm_control_word(dev, routing,
350 (offset >> 2) + 1);
351 mmiowb();
352 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
353 value & 0xffff);
354 return;
355 }
356 offset >>= 2;
357 }
358 b43legacy_shm_control_word(dev, routing, offset);
359 mmiowb();
360 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
361 }
362
363 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
364 u16 value)
365 {
366 if (routing == B43legacy_SHM_SHARED) {
367 B43legacy_WARN_ON((offset & 0x0001) != 0);
368 if (offset & 0x0003) {
369 /* Unaligned access */
370 b43legacy_shm_control_word(dev, routing, offset >> 2);
371 mmiowb();
372 b43legacy_write16(dev,
373 B43legacy_MMIO_SHM_DATA_UNALIGNED,
374 value);
375 return;
376 }
377 offset >>= 2;
378 }
379 b43legacy_shm_control_word(dev, routing, offset);
380 mmiowb();
381 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
382 }
383
384 /* Read HostFlags */
385 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
386 {
387 u32 ret;
388
389 ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
390 B43legacy_SHM_SH_HOSTFHI);
391 ret <<= 16;
392 ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
393 B43legacy_SHM_SH_HOSTFLO);
394
395 return ret;
396 }
397
398 /* Write HostFlags */
399 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
400 {
401 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
402 B43legacy_SHM_SH_HOSTFLO,
403 (value & 0x0000FFFF));
404 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
405 B43legacy_SHM_SH_HOSTFHI,
406 ((value & 0xFFFF0000) >> 16));
407 }
408
409 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
410 {
411 /* We need to be careful. As we read the TSF from multiple
412 * registers, we should take care of register overflows.
413 * In theory, the whole tsf read process should be atomic.
414 * We try to be atomic here, by restaring the read process,
415 * if any of the high registers changed (overflew).
416 */
417 if (dev->dev->id.revision >= 3) {
418 u32 low;
419 u32 high;
420 u32 high2;
421
422 do {
423 high = b43legacy_read32(dev,
424 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
425 low = b43legacy_read32(dev,
426 B43legacy_MMIO_REV3PLUS_TSF_LOW);
427 high2 = b43legacy_read32(dev,
428 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
429 } while (unlikely(high != high2));
430
431 *tsf = high;
432 *tsf <<= 32;
433 *tsf |= low;
434 } else {
435 u64 tmp;
436 u16 v0;
437 u16 v1;
438 u16 v2;
439 u16 v3;
440 u16 test1;
441 u16 test2;
442 u16 test3;
443
444 do {
445 v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
446 v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
447 v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
448 v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
449
450 test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
451 test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
452 test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
453 } while (v3 != test3 || v2 != test2 || v1 != test1);
454
455 *tsf = v3;
456 *tsf <<= 48;
457 tmp = v2;
458 tmp <<= 32;
459 *tsf |= tmp;
460 tmp = v1;
461 tmp <<= 16;
462 *tsf |= tmp;
463 *tsf |= v0;
464 }
465 }
466
467 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
468 {
469 u32 status;
470
471 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
472 status |= B43legacy_MACCTL_TBTTHOLD;
473 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
474 mmiowb();
475 }
476
477 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
478 {
479 u32 status;
480
481 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
482 status &= ~B43legacy_MACCTL_TBTTHOLD;
483 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
484 }
485
486 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
487 {
488 /* Be careful with the in-progress timer.
489 * First zero out the low register, so we have a full
490 * register-overflow duration to complete the operation.
491 */
492 if (dev->dev->id.revision >= 3) {
493 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
494 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
495
496 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
497 mmiowb();
498 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
499 hi);
500 mmiowb();
501 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
502 lo);
503 } else {
504 u16 v0 = (tsf & 0x000000000000FFFFULL);
505 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
506 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
507 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
508
509 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
510 mmiowb();
511 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
512 mmiowb();
513 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
514 mmiowb();
515 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
516 mmiowb();
517 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
518 }
519 }
520
521 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
522 {
523 b43legacy_time_lock(dev);
524 b43legacy_tsf_write_locked(dev, tsf);
525 b43legacy_time_unlock(dev);
526 }
527
528 static
529 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
530 u16 offset, const u8 *mac)
531 {
532 static const u8 zero_addr[ETH_ALEN] = { 0 };
533 u16 data;
534
535 if (!mac)
536 mac = zero_addr;
537
538 offset |= 0x0020;
539 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
540
541 data = mac[0];
542 data |= mac[1] << 8;
543 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
544 data = mac[2];
545 data |= mac[3] << 8;
546 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
547 data = mac[4];
548 data |= mac[5] << 8;
549 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
550 }
551
552 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
553 {
554 static const u8 zero_addr[ETH_ALEN] = { 0 };
555 const u8 *mac = dev->wl->mac_addr;
556 const u8 *bssid = dev->wl->bssid;
557 u8 mac_bssid[ETH_ALEN * 2];
558 int i;
559 u32 tmp;
560
561 if (!bssid)
562 bssid = zero_addr;
563 if (!mac)
564 mac = zero_addr;
565
566 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
567
568 memcpy(mac_bssid, mac, ETH_ALEN);
569 memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
570
571 /* Write our MAC address and BSSID to template ram */
572 for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
573 tmp = (u32)(mac_bssid[i + 0]);
574 tmp |= (u32)(mac_bssid[i + 1]) << 8;
575 tmp |= (u32)(mac_bssid[i + 2]) << 16;
576 tmp |= (u32)(mac_bssid[i + 3]) << 24;
577 b43legacy_ram_write(dev, 0x20 + i, tmp);
578 b43legacy_ram_write(dev, 0x78 + i, tmp);
579 b43legacy_ram_write(dev, 0x478 + i, tmp);
580 }
581 }
582
583 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
584 {
585 b43legacy_write_mac_bssid_templates(dev);
586 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
587 dev->wl->mac_addr);
588 }
589
590 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
591 u16 slot_time)
592 {
593 /* slot_time is in usec. */
594 if (dev->phy.type != B43legacy_PHYTYPE_G)
595 return;
596 b43legacy_write16(dev, 0x684, 510 + slot_time);
597 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
598 slot_time);
599 }
600
601 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
602 {
603 b43legacy_set_slot_time(dev, 9);
604 }
605
606 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
607 {
608 b43legacy_set_slot_time(dev, 20);
609 }
610
611 /* Synchronize IRQ top- and bottom-half.
612 * IRQs must be masked before calling this.
613 * This must not be called with the irq_lock held.
614 */
615 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
616 {
617 synchronize_irq(dev->dev->irq);
618 tasklet_kill(&dev->isr_tasklet);
619 }
620
621 /* DummyTransmission function, as documented on
622 * http://bcm-specs.sipsolutions.net/DummyTransmission
623 */
624 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
625 {
626 struct b43legacy_phy *phy = &dev->phy;
627 unsigned int i;
628 unsigned int max_loop;
629 u16 value;
630 u32 buffer[5] = {
631 0x00000000,
632 0x00D40000,
633 0x00000000,
634 0x01000000,
635 0x00000000,
636 };
637
638 switch (phy->type) {
639 case B43legacy_PHYTYPE_B:
640 case B43legacy_PHYTYPE_G:
641 max_loop = 0xFA;
642 buffer[0] = 0x000B846E;
643 break;
644 default:
645 B43legacy_BUG_ON(1);
646 return;
647 }
648
649 for (i = 0; i < 5; i++)
650 b43legacy_ram_write(dev, i * 4, buffer[i]);
651
652 /* dummy read follows */
653 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
654
655 b43legacy_write16(dev, 0x0568, 0x0000);
656 b43legacy_write16(dev, 0x07C0, 0x0000);
657 b43legacy_write16(dev, 0x050C, 0x0000);
658 b43legacy_write16(dev, 0x0508, 0x0000);
659 b43legacy_write16(dev, 0x050A, 0x0000);
660 b43legacy_write16(dev, 0x054C, 0x0000);
661 b43legacy_write16(dev, 0x056A, 0x0014);
662 b43legacy_write16(dev, 0x0568, 0x0826);
663 b43legacy_write16(dev, 0x0500, 0x0000);
664 b43legacy_write16(dev, 0x0502, 0x0030);
665
666 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
667 b43legacy_radio_write16(dev, 0x0051, 0x0017);
668 for (i = 0x00; i < max_loop; i++) {
669 value = b43legacy_read16(dev, 0x050E);
670 if (value & 0x0080)
671 break;
672 udelay(10);
673 }
674 for (i = 0x00; i < 0x0A; i++) {
675 value = b43legacy_read16(dev, 0x050E);
676 if (value & 0x0400)
677 break;
678 udelay(10);
679 }
680 for (i = 0x00; i < 0x0A; i++) {
681 value = b43legacy_read16(dev, 0x0690);
682 if (!(value & 0x0100))
683 break;
684 udelay(10);
685 }
686 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
687 b43legacy_radio_write16(dev, 0x0051, 0x0037);
688 }
689
690 /* Turn the Analog ON/OFF */
691 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
692 {
693 b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
694 }
695
696 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
697 {
698 u32 tmslow;
699 u32 macctl;
700
701 flags |= B43legacy_TMSLOW_PHYCLKEN;
702 flags |= B43legacy_TMSLOW_PHYRESET;
703 ssb_device_enable(dev->dev, flags);
704 msleep(2); /* Wait for the PLL to turn on. */
705
706 /* Now take the PHY out of Reset again */
707 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
708 tmslow |= SSB_TMSLOW_FGC;
709 tmslow &= ~B43legacy_TMSLOW_PHYRESET;
710 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
711 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
712 msleep(1);
713 tmslow &= ~SSB_TMSLOW_FGC;
714 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
715 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
716 msleep(1);
717
718 /* Turn Analog ON */
719 b43legacy_switch_analog(dev, 1);
720
721 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
722 macctl &= ~B43legacy_MACCTL_GMODE;
723 if (flags & B43legacy_TMSLOW_GMODE) {
724 macctl |= B43legacy_MACCTL_GMODE;
725 dev->phy.gmode = true;
726 } else
727 dev->phy.gmode = false;
728 macctl |= B43legacy_MACCTL_IHR_ENABLED;
729 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
730 }
731
732 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
733 {
734 u32 v0;
735 u32 v1;
736 u16 tmp;
737 struct b43legacy_txstatus stat;
738
739 while (1) {
740 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
741 if (!(v0 & 0x00000001))
742 break;
743 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
744
745 stat.cookie = (v0 >> 16);
746 stat.seq = (v1 & 0x0000FFFF);
747 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
748 tmp = (v0 & 0x0000FFFF);
749 stat.frame_count = ((tmp & 0xF000) >> 12);
750 stat.rts_count = ((tmp & 0x0F00) >> 8);
751 stat.supp_reason = ((tmp & 0x001C) >> 2);
752 stat.pm_indicated = !!(tmp & 0x0080);
753 stat.intermediate = !!(tmp & 0x0040);
754 stat.for_ampdu = !!(tmp & 0x0020);
755 stat.acked = !!(tmp & 0x0002);
756
757 b43legacy_handle_txstatus(dev, &stat);
758 }
759 }
760
761 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
762 {
763 u32 dummy;
764
765 if (dev->dev->id.revision < 5)
766 return;
767 /* Read all entries from the microcode TXstatus FIFO
768 * and throw them away.
769 */
770 while (1) {
771 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
772 if (!(dummy & 0x00000001))
773 break;
774 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
775 }
776 }
777
778 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
779 {
780 u32 val = 0;
781
782 val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
783 val <<= 16;
784 val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
785
786 return val;
787 }
788
789 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
790 {
791 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
792 (jssi & 0x0000FFFF));
793 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
794 (jssi & 0xFFFF0000) >> 16);
795 }
796
797 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
798 {
799 b43legacy_jssi_write(dev, 0x7F7F7F7F);
800 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
801 b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
802 | B43legacy_MACCMD_BGNOISE);
803 B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
804 dev->phy.channel);
805 }
806
807 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
808 {
809 /* Top half of Link Quality calculation. */
810
811 if (dev->noisecalc.calculation_running)
812 return;
813 dev->noisecalc.channel_at_start = dev->phy.channel;
814 dev->noisecalc.calculation_running = true;
815 dev->noisecalc.nr_samples = 0;
816
817 b43legacy_generate_noise_sample(dev);
818 }
819
820 static void handle_irq_noise(struct b43legacy_wldev *dev)
821 {
822 struct b43legacy_phy *phy = &dev->phy;
823 u16 tmp;
824 u8 noise[4];
825 u8 i;
826 u8 j;
827 s32 average;
828
829 /* Bottom half of Link Quality calculation. */
830
831 B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
832 if (dev->noisecalc.channel_at_start != phy->channel)
833 goto drop_calculation;
834 *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
835 if (noise[0] == 0x7F || noise[1] == 0x7F ||
836 noise[2] == 0x7F || noise[3] == 0x7F)
837 goto generate_new;
838
839 /* Get the noise samples. */
840 B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
841 i = dev->noisecalc.nr_samples;
842 noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
843 noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
844 noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
845 noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
846 dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
847 dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
848 dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
849 dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
850 dev->noisecalc.nr_samples++;
851 if (dev->noisecalc.nr_samples == 8) {
852 /* Calculate the Link Quality by the noise samples. */
853 average = 0;
854 for (i = 0; i < 8; i++) {
855 for (j = 0; j < 4; j++)
856 average += dev->noisecalc.samples[i][j];
857 }
858 average /= (8 * 4);
859 average *= 125;
860 average += 64;
861 average /= 128;
862 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
863 0x40C);
864 tmp = (tmp / 128) & 0x1F;
865 if (tmp >= 8)
866 average += 2;
867 else
868 average -= 25;
869 if (tmp == 8)
870 average -= 72;
871 else
872 average -= 48;
873
874 dev->stats.link_noise = average;
875 drop_calculation:
876 dev->noisecalc.calculation_running = false;
877 return;
878 }
879 generate_new:
880 b43legacy_generate_noise_sample(dev);
881 }
882
883 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
884 {
885 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) {
886 /* TODO: PS TBTT */
887 } else {
888 if (1/*FIXME: the last PSpoll frame was sent successfully */)
889 b43legacy_power_saving_ctl_bits(dev, -1, -1);
890 }
891 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
892 dev->dfq_valid = true;
893 }
894
895 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
896 {
897 if (dev->dfq_valid) {
898 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
899 b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
900 | B43legacy_MACCMD_DFQ_VALID);
901 dev->dfq_valid = false;
902 }
903 }
904
905 static void handle_irq_pmq(struct b43legacy_wldev *dev)
906 {
907 u32 tmp;
908
909 /* TODO: AP mode. */
910
911 while (1) {
912 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
913 if (!(tmp & 0x00000008))
914 break;
915 }
916 /* 16bit write is odd, but correct. */
917 b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
918 }
919
920 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
921 const u8 *data, u16 size,
922 u16 ram_offset,
923 u16 shm_size_offset, u8 rate)
924 {
925 u32 i;
926 u32 tmp;
927 struct b43legacy_plcp_hdr4 plcp;
928
929 plcp.data = 0;
930 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
931 b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
932 ram_offset += sizeof(u32);
933 /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
934 * So leave the first two bytes of the next write blank.
935 */
936 tmp = (u32)(data[0]) << 16;
937 tmp |= (u32)(data[1]) << 24;
938 b43legacy_ram_write(dev, ram_offset, tmp);
939 ram_offset += sizeof(u32);
940 for (i = 2; i < size; i += sizeof(u32)) {
941 tmp = (u32)(data[i + 0]);
942 if (i + 1 < size)
943 tmp |= (u32)(data[i + 1]) << 8;
944 if (i + 2 < size)
945 tmp |= (u32)(data[i + 2]) << 16;
946 if (i + 3 < size)
947 tmp |= (u32)(data[i + 3]) << 24;
948 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
949 }
950 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
951 size + sizeof(struct b43legacy_plcp_hdr6));
952 }
953
954 /* Convert a b43legacy antenna number value to the PHY TX control value. */
955 static u16 b43legacy_antenna_to_phyctl(int antenna)
956 {
957 switch (antenna) {
958 case B43legacy_ANTENNA0:
959 return B43legacy_TX4_PHY_ANT0;
960 case B43legacy_ANTENNA1:
961 return B43legacy_TX4_PHY_ANT1;
962 }
963 return B43legacy_TX4_PHY_ANTLAST;
964 }
965
966 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
967 u16 ram_offset,
968 u16 shm_size_offset)
969 {
970
971 unsigned int i, len, variable_len;
972 const struct ieee80211_mgmt *bcn;
973 const u8 *ie;
974 bool tim_found = false;
975 unsigned int rate;
976 u16 ctl;
977 int antenna;
978 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon);
979
980 bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
981 len = min((size_t)dev->wl->current_beacon->len,
982 0x200 - sizeof(struct b43legacy_plcp_hdr6));
983 rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value;
984
985 b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
986 shm_size_offset, rate);
987
988 /* Write the PHY TX control parameters. */
989 antenna = B43legacy_ANTENNA_DEFAULT;
990 antenna = b43legacy_antenna_to_phyctl(antenna);
991 ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
992 B43legacy_SHM_SH_BEACPHYCTL);
993 /* We can't send beacons with short preamble. Would get PHY errors. */
994 ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL;
995 ctl &= ~B43legacy_TX4_PHY_ANT;
996 ctl &= ~B43legacy_TX4_PHY_ENC;
997 ctl |= antenna;
998 ctl |= B43legacy_TX4_PHY_ENC_CCK;
999 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1000 B43legacy_SHM_SH_BEACPHYCTL, ctl);
1001
1002 /* Find the position of the TIM and the DTIM_period value
1003 * and write them to SHM. */
1004 ie = bcn->u.beacon.variable;
1005 variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
1006 for (i = 0; i < variable_len - 2; ) {
1007 uint8_t ie_id, ie_len;
1008
1009 ie_id = ie[i];
1010 ie_len = ie[i + 1];
1011 if (ie_id == 5) {
1012 u16 tim_position;
1013 u16 dtim_period;
1014 /* This is the TIM Information Element */
1015
1016 /* Check whether the ie_len is in the beacon data range. */
1017 if (variable_len < ie_len + 2 + i)
1018 break;
1019 /* A valid TIM is at least 4 bytes long. */
1020 if (ie_len < 4)
1021 break;
1022 tim_found = true;
1023
1024 tim_position = sizeof(struct b43legacy_plcp_hdr6);
1025 tim_position += offsetof(struct ieee80211_mgmt,
1026 u.beacon.variable);
1027 tim_position += i;
1028
1029 dtim_period = ie[i + 3];
1030
1031 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1032 B43legacy_SHM_SH_TIMPOS, tim_position);
1033 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1034 B43legacy_SHM_SH_DTIMP, dtim_period);
1035 break;
1036 }
1037 i += ie_len + 2;
1038 }
1039 if (!tim_found) {
1040 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
1041 "beacon template packet. AP or IBSS operation "
1042 "may be broken.\n");
1043 } else
1044 b43legacydbg(dev->wl, "Updated beacon template\n");
1045 }
1046
1047 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
1048 u16 shm_offset, u16 size,
1049 struct ieee80211_rate *rate)
1050 {
1051 struct b43legacy_plcp_hdr4 plcp;
1052 u32 tmp;
1053 __le16 dur;
1054
1055 plcp.data = 0;
1056 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value);
1057 dur = ieee80211_generic_frame_duration(dev->wl->hw,
1058 dev->wl->vif,
1059 IEEE80211_BAND_2GHZ,
1060 size,
1061 rate);
1062 /* Write PLCP in two parts and timing for packet transfer */
1063 tmp = le32_to_cpu(plcp.data);
1064 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1065 tmp & 0xFFFF);
1066 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1067 tmp >> 16);
1068 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1069 le16_to_cpu(dur));
1070 }
1071
1072 /* Instead of using custom probe response template, this function
1073 * just patches custom beacon template by:
1074 * 1) Changing packet type
1075 * 2) Patching duration field
1076 * 3) Stripping TIM
1077 */
1078 static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1079 u16 *dest_size,
1080 struct ieee80211_rate *rate)
1081 {
1082 const u8 *src_data;
1083 u8 *dest_data;
1084 u16 src_size, elem_size, src_pos, dest_pos;
1085 __le16 dur;
1086 struct ieee80211_hdr *hdr;
1087 size_t ie_start;
1088
1089 src_size = dev->wl->current_beacon->len;
1090 src_data = (const u8 *)dev->wl->current_beacon->data;
1091
1092 /* Get the start offset of the variable IEs in the packet. */
1093 ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
1094 B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt,
1095 u.beacon.variable));
1096
1097 if (B43legacy_WARN_ON(src_size < ie_start))
1098 return NULL;
1099
1100 dest_data = kmalloc(src_size, GFP_ATOMIC);
1101 if (unlikely(!dest_data))
1102 return NULL;
1103
1104 /* Copy the static data and all Information Elements, except the TIM. */
1105 memcpy(dest_data, src_data, ie_start);
1106 src_pos = ie_start;
1107 dest_pos = ie_start;
1108 for ( ; src_pos < src_size - 2; src_pos += elem_size) {
1109 elem_size = src_data[src_pos + 1] + 2;
1110 if (src_data[src_pos] == 5) {
1111 /* This is the TIM. */
1112 continue;
1113 }
1114 memcpy(dest_data + dest_pos, src_data + src_pos, elem_size);
1115 dest_pos += elem_size;
1116 }
1117 *dest_size = dest_pos;
1118 hdr = (struct ieee80211_hdr *)dest_data;
1119
1120 /* Set the frame control. */
1121 hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1122 IEEE80211_STYPE_PROBE_RESP);
1123 dur = ieee80211_generic_frame_duration(dev->wl->hw,
1124 dev->wl->vif,
1125 IEEE80211_BAND_2GHZ,
1126 *dest_size,
1127 rate);
1128 hdr->duration_id = dur;
1129
1130 return dest_data;
1131 }
1132
1133 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1134 u16 ram_offset,
1135 u16 shm_size_offset,
1136 struct ieee80211_rate *rate)
1137 {
1138 const u8 *probe_resp_data;
1139 u16 size;
1140
1141 size = dev->wl->current_beacon->len;
1142 probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1143 if (unlikely(!probe_resp_data))
1144 return;
1145
1146 /* Looks like PLCP headers plus packet timings are stored for
1147 * all possible basic rates
1148 */
1149 b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1150 &b43legacy_b_ratetable[0]);
1151 b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1152 &b43legacy_b_ratetable[1]);
1153 b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1154 &b43legacy_b_ratetable[2]);
1155 b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1156 &b43legacy_b_ratetable[3]);
1157
1158 size = min((size_t)size,
1159 0x200 - sizeof(struct b43legacy_plcp_hdr6));
1160 b43legacy_write_template_common(dev, probe_resp_data,
1161 size, ram_offset,
1162 shm_size_offset, rate->hw_value);
1163 kfree(probe_resp_data);
1164 }
1165
1166 static void b43legacy_upload_beacon0(struct b43legacy_wldev *dev)
1167 {
1168 struct b43legacy_wl *wl = dev->wl;
1169
1170 if (wl->beacon0_uploaded)
1171 return;
1172 b43legacy_write_beacon_template(dev, 0x68, 0x18);
1173 /* FIXME: Probe resp upload doesn't really belong here,
1174 * but we don't use that feature anyway. */
1175 b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1176 &__b43legacy_ratetable[3]);
1177 wl->beacon0_uploaded = true;
1178 }
1179
1180 static void b43legacy_upload_beacon1(struct b43legacy_wldev *dev)
1181 {
1182 struct b43legacy_wl *wl = dev->wl;
1183
1184 if (wl->beacon1_uploaded)
1185 return;
1186 b43legacy_write_beacon_template(dev, 0x468, 0x1A);
1187 wl->beacon1_uploaded = true;
1188 }
1189
1190 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1191 {
1192 struct b43legacy_wl *wl = dev->wl;
1193 u32 cmd, beacon0_valid, beacon1_valid;
1194
1195 if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
1196 return;
1197
1198 /* This is the bottom half of the asynchronous beacon update. */
1199
1200 /* Ignore interrupt in the future. */
1201 dev->irq_mask &= ~B43legacy_IRQ_BEACON;
1202
1203 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1204 beacon0_valid = (cmd & B43legacy_MACCMD_BEACON0_VALID);
1205 beacon1_valid = (cmd & B43legacy_MACCMD_BEACON1_VALID);
1206
1207 /* Schedule interrupt manually, if busy. */
1208 if (beacon0_valid && beacon1_valid) {
1209 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON);
1210 dev->irq_mask |= B43legacy_IRQ_BEACON;
1211 return;
1212 }
1213
1214 if (unlikely(wl->beacon_templates_virgin)) {
1215 /* We never uploaded a beacon before.
1216 * Upload both templates now, but only mark one valid. */
1217 wl->beacon_templates_virgin = false;
1218 b43legacy_upload_beacon0(dev);
1219 b43legacy_upload_beacon1(dev);
1220 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1221 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1222 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1223 } else {
1224 if (!beacon0_valid) {
1225 b43legacy_upload_beacon0(dev);
1226 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1227 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1228 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1229 } else if (!beacon1_valid) {
1230 b43legacy_upload_beacon1(dev);
1231 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1232 cmd |= B43legacy_MACCMD_BEACON1_VALID;
1233 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1234 }
1235 }
1236 }
1237
1238 static void b43legacy_beacon_update_trigger_work(struct work_struct *work)
1239 {
1240 struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
1241 beacon_update_trigger);
1242 struct b43legacy_wldev *dev;
1243
1244 mutex_lock(&wl->mutex);
1245 dev = wl->current_dev;
1246 if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) {
1247 spin_lock_irq(&wl->irq_lock);
1248 /* Update beacon right away or defer to IRQ. */
1249 handle_irq_beacon(dev);
1250 /* The handler might have updated the IRQ mask. */
1251 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1252 dev->irq_mask);
1253 mmiowb();
1254 spin_unlock_irq(&wl->irq_lock);
1255 }
1256 mutex_unlock(&wl->mutex);
1257 }
1258
1259 /* Asynchronously update the packet templates in template RAM.
1260 * Locking: Requires wl->irq_lock to be locked. */
1261 static void b43legacy_update_templates(struct b43legacy_wl *wl)
1262 {
1263 struct sk_buff *beacon;
1264 /* This is the top half of the ansynchronous beacon update. The bottom
1265 * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1266 * sending an invalid beacon. This can happen for example, if the
1267 * firmware transmits a beacon while we are updating it. */
1268
1269 /* We could modify the existing beacon and set the aid bit in the TIM
1270 * field, but that would probably require resizing and moving of data
1271 * within the beacon template. Simply request a new beacon and let
1272 * mac80211 do the hard work. */
1273 beacon = ieee80211_beacon_get(wl->hw, wl->vif);
1274 if (unlikely(!beacon))
1275 return;
1276
1277 if (wl->current_beacon)
1278 dev_kfree_skb_any(wl->current_beacon);
1279 wl->current_beacon = beacon;
1280 wl->beacon0_uploaded = false;
1281 wl->beacon1_uploaded = false;
1282 ieee80211_queue_work(wl->hw, &wl->beacon_update_trigger);
1283 }
1284
1285 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1286 u16 beacon_int)
1287 {
1288 b43legacy_time_lock(dev);
1289 if (dev->dev->id.revision >= 3) {
1290 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP,
1291 (beacon_int << 16));
1292 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START,
1293 (beacon_int << 10));
1294 } else {
1295 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1296 b43legacy_write16(dev, 0x610, beacon_int);
1297 }
1298 b43legacy_time_unlock(dev);
1299 b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
1300 }
1301
1302 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1303 {
1304 }
1305
1306 /* Interrupt handler bottom-half */
1307 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1308 {
1309 u32 reason;
1310 u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1311 u32 merged_dma_reason = 0;
1312 int i;
1313 unsigned long flags;
1314
1315 spin_lock_irqsave(&dev->wl->irq_lock, flags);
1316
1317 B43legacy_WARN_ON(b43legacy_status(dev) <
1318 B43legacy_STAT_INITIALIZED);
1319
1320 reason = dev->irq_reason;
1321 for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1322 dma_reason[i] = dev->dma_reason[i];
1323 merged_dma_reason |= dma_reason[i];
1324 }
1325
1326 if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1327 b43legacyerr(dev->wl, "MAC transmission error\n");
1328
1329 if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1330 b43legacyerr(dev->wl, "PHY transmission error\n");
1331 rmb();
1332 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1333 b43legacyerr(dev->wl, "Too many PHY TX errors, "
1334 "restarting the controller\n");
1335 b43legacy_controller_restart(dev, "PHY TX errors");
1336 }
1337 }
1338
1339 if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1340 B43legacy_DMAIRQ_NONFATALMASK))) {
1341 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1342 b43legacyerr(dev->wl, "Fatal DMA error: "
1343 "0x%08X, 0x%08X, 0x%08X, "
1344 "0x%08X, 0x%08X, 0x%08X\n",
1345 dma_reason[0], dma_reason[1],
1346 dma_reason[2], dma_reason[3],
1347 dma_reason[4], dma_reason[5]);
1348 b43legacy_controller_restart(dev, "DMA error");
1349 mmiowb();
1350 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1351 return;
1352 }
1353 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1354 b43legacyerr(dev->wl, "DMA error: "
1355 "0x%08X, 0x%08X, 0x%08X, "
1356 "0x%08X, 0x%08X, 0x%08X\n",
1357 dma_reason[0], dma_reason[1],
1358 dma_reason[2], dma_reason[3],
1359 dma_reason[4], dma_reason[5]);
1360 }
1361
1362 if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1363 handle_irq_ucode_debug(dev);
1364 if (reason & B43legacy_IRQ_TBTT_INDI)
1365 handle_irq_tbtt_indication(dev);
1366 if (reason & B43legacy_IRQ_ATIM_END)
1367 handle_irq_atim_end(dev);
1368 if (reason & B43legacy_IRQ_BEACON)
1369 handle_irq_beacon(dev);
1370 if (reason & B43legacy_IRQ_PMQ)
1371 handle_irq_pmq(dev);
1372 if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1373 ;/*TODO*/
1374 if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1375 handle_irq_noise(dev);
1376
1377 /* Check the DMA reason registers for received data. */
1378 if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1379 if (b43legacy_using_pio(dev))
1380 b43legacy_pio_rx(dev->pio.queue0);
1381 else
1382 b43legacy_dma_rx(dev->dma.rx_ring0);
1383 }
1384 B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1385 B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1386 if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1387 if (b43legacy_using_pio(dev))
1388 b43legacy_pio_rx(dev->pio.queue3);
1389 else
1390 b43legacy_dma_rx(dev->dma.rx_ring3);
1391 }
1392 B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1393 B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1394
1395 if (reason & B43legacy_IRQ_TX_OK)
1396 handle_irq_transmit_status(dev);
1397
1398 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
1399 mmiowb();
1400 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1401 }
1402
1403 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1404 u16 base, int queueidx)
1405 {
1406 u16 rxctl;
1407
1408 rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1409 if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1410 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1411 else
1412 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1413 }
1414
1415 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1416 {
1417 if (b43legacy_using_pio(dev) &&
1418 (dev->dev->id.revision < 3) &&
1419 (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1420 /* Apply a PIO specific workaround to the dma_reasons */
1421 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1422 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1423 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1424 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1425 }
1426
1427 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1428
1429 b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1430 dev->dma_reason[0]);
1431 b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1432 dev->dma_reason[1]);
1433 b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1434 dev->dma_reason[2]);
1435 b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1436 dev->dma_reason[3]);
1437 b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1438 dev->dma_reason[4]);
1439 b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1440 dev->dma_reason[5]);
1441 }
1442
1443 /* Interrupt handler top-half */
1444 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1445 {
1446 irqreturn_t ret = IRQ_NONE;
1447 struct b43legacy_wldev *dev = dev_id;
1448 u32 reason;
1449
1450 B43legacy_WARN_ON(!dev);
1451
1452 spin_lock(&dev->wl->irq_lock);
1453
1454 if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
1455 /* This can only happen on shared IRQ lines. */
1456 goto out;
1457 reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1458 if (reason == 0xffffffff) /* shared IRQ */
1459 goto out;
1460 ret = IRQ_HANDLED;
1461 reason &= dev->irq_mask;
1462 if (!reason)
1463 goto out;
1464
1465 dev->dma_reason[0] = b43legacy_read32(dev,
1466 B43legacy_MMIO_DMA0_REASON)
1467 & 0x0001DC00;
1468 dev->dma_reason[1] = b43legacy_read32(dev,
1469 B43legacy_MMIO_DMA1_REASON)
1470 & 0x0000DC00;
1471 dev->dma_reason[2] = b43legacy_read32(dev,
1472 B43legacy_MMIO_DMA2_REASON)
1473 & 0x0000DC00;
1474 dev->dma_reason[3] = b43legacy_read32(dev,
1475 B43legacy_MMIO_DMA3_REASON)
1476 & 0x0001DC00;
1477 dev->dma_reason[4] = b43legacy_read32(dev,
1478 B43legacy_MMIO_DMA4_REASON)
1479 & 0x0000DC00;
1480 dev->dma_reason[5] = b43legacy_read32(dev,
1481 B43legacy_MMIO_DMA5_REASON)
1482 & 0x0000DC00;
1483
1484 b43legacy_interrupt_ack(dev, reason);
1485 /* Disable all IRQs. They are enabled again in the bottom half. */
1486 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1487 /* Save the reason code and call our bottom half. */
1488 dev->irq_reason = reason;
1489 tasklet_schedule(&dev->isr_tasklet);
1490 out:
1491 mmiowb();
1492 spin_unlock(&dev->wl->irq_lock);
1493
1494 return ret;
1495 }
1496
1497 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1498 {
1499 release_firmware(dev->fw.ucode);
1500 dev->fw.ucode = NULL;
1501 release_firmware(dev->fw.pcm);
1502 dev->fw.pcm = NULL;
1503 release_firmware(dev->fw.initvals);
1504 dev->fw.initvals = NULL;
1505 release_firmware(dev->fw.initvals_band);
1506 dev->fw.initvals_band = NULL;
1507 }
1508
1509 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1510 {
1511 b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1512 "Drivers/b43#devicefirmware "
1513 "and download the correct firmware (version 3).\n");
1514 }
1515
1516 static int do_request_fw(struct b43legacy_wldev *dev,
1517 const char *name,
1518 const struct firmware **fw)
1519 {
1520 char path[sizeof(modparam_fwpostfix) + 32];
1521 struct b43legacy_fw_header *hdr;
1522 u32 size;
1523 int err;
1524
1525 if (!name)
1526 return 0;
1527
1528 snprintf(path, ARRAY_SIZE(path),
1529 "b43legacy%s/%s.fw",
1530 modparam_fwpostfix, name);
1531 err = request_firmware(fw, path, dev->dev->dev);
1532 if (err) {
1533 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1534 "or load failed.\n", path);
1535 return err;
1536 }
1537 if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1538 goto err_format;
1539 hdr = (struct b43legacy_fw_header *)((*fw)->data);
1540 switch (hdr->type) {
1541 case B43legacy_FW_TYPE_UCODE:
1542 case B43legacy_FW_TYPE_PCM:
1543 size = be32_to_cpu(hdr->size);
1544 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1545 goto err_format;
1546 /* fallthrough */
1547 case B43legacy_FW_TYPE_IV:
1548 if (hdr->ver != 1)
1549 goto err_format;
1550 break;
1551 default:
1552 goto err_format;
1553 }
1554
1555 return err;
1556
1557 err_format:
1558 b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1559 return -EPROTO;
1560 }
1561
1562 static int b43legacy_one_core_attach(struct ssb_device *dev,
1563 struct b43legacy_wl *wl);
1564 static void b43legacy_one_core_detach(struct ssb_device *dev);
1565
1566 static void b43legacy_request_firmware(struct work_struct *work)
1567 {
1568 struct b43legacy_wl *wl = container_of(work,
1569 struct b43legacy_wl, firmware_load);
1570 struct b43legacy_wldev *dev = wl->current_dev;
1571 struct b43legacy_firmware *fw = &dev->fw;
1572 const u8 rev = dev->dev->id.revision;
1573 const char *filename;
1574 int err;
1575
1576 /* do dummy read */
1577 ssb_read32(dev->dev, SSB_TMSHIGH);
1578 if (!fw->ucode) {
1579 if (rev == 2)
1580 filename = "ucode2";
1581 else if (rev == 4)
1582 filename = "ucode4";
1583 else
1584 filename = "ucode5";
1585 err = do_request_fw(dev, filename, &fw->ucode);
1586 if (err)
1587 goto err_load;
1588 }
1589 if (!fw->pcm) {
1590 if (rev < 5)
1591 filename = "pcm4";
1592 else
1593 filename = "pcm5";
1594 err = do_request_fw(dev, filename, &fw->pcm);
1595 if (err)
1596 goto err_load;
1597 }
1598 if (!fw->initvals) {
1599 switch (dev->phy.type) {
1600 case B43legacy_PHYTYPE_B:
1601 case B43legacy_PHYTYPE_G:
1602 if ((rev >= 5) && (rev <= 10))
1603 filename = "b0g0initvals5";
1604 else if (rev == 2 || rev == 4)
1605 filename = "b0g0initvals2";
1606 else
1607 goto err_no_initvals;
1608 break;
1609 default:
1610 goto err_no_initvals;
1611 }
1612 err = do_request_fw(dev, filename, &fw->initvals);
1613 if (err)
1614 goto err_load;
1615 }
1616 if (!fw->initvals_band) {
1617 switch (dev->phy.type) {
1618 case B43legacy_PHYTYPE_B:
1619 case B43legacy_PHYTYPE_G:
1620 if ((rev >= 5) && (rev <= 10))
1621 filename = "b0g0bsinitvals5";
1622 else if (rev >= 11)
1623 filename = NULL;
1624 else if (rev == 2 || rev == 4)
1625 filename = NULL;
1626 else
1627 goto err_no_initvals;
1628 break;
1629 default:
1630 goto err_no_initvals;
1631 }
1632 err = do_request_fw(dev, filename, &fw->initvals_band);
1633 if (err)
1634 goto err_load;
1635 }
1636 err = ieee80211_register_hw(wl->hw);
1637 if (err)
1638 goto err_one_core_detach;
1639 return;
1640
1641 err_one_core_detach:
1642 b43legacy_one_core_detach(dev->dev);
1643 goto error;
1644
1645 err_load:
1646 b43legacy_print_fw_helptext(dev->wl);
1647 goto error;
1648
1649 err_no_initvals:
1650 err = -ENODEV;
1651 b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1652 "core rev %u\n", dev->phy.type, rev);
1653 goto error;
1654
1655 error:
1656 b43legacy_release_firmware(dev);
1657 return;
1658 }
1659
1660 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1661 {
1662 struct wiphy *wiphy = dev->wl->hw->wiphy;
1663 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1664 const __be32 *data;
1665 unsigned int i;
1666 unsigned int len;
1667 u16 fwrev;
1668 u16 fwpatch;
1669 u16 fwdate;
1670 u16 fwtime;
1671 u32 tmp, macctl;
1672 int err = 0;
1673
1674 /* Jump the microcode PSM to offset 0 */
1675 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1676 B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1677 macctl |= B43legacy_MACCTL_PSM_JMP0;
1678 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1679 /* Zero out all microcode PSM registers and shared memory. */
1680 for (i = 0; i < 64; i++)
1681 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1682 for (i = 0; i < 4096; i += 2)
1683 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1684
1685 /* Upload Microcode. */
1686 data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1687 len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1688 b43legacy_shm_control_word(dev,
1689 B43legacy_SHM_UCODE |
1690 B43legacy_SHM_AUTOINC_W,
1691 0x0000);
1692 for (i = 0; i < len; i++) {
1693 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1694 be32_to_cpu(data[i]));
1695 udelay(10);
1696 }
1697
1698 if (dev->fw.pcm) {
1699 /* Upload PCM data. */
1700 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1701 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1702 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1703 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1704 /* No need for autoinc bit in SHM_HW */
1705 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1706 for (i = 0; i < len; i++) {
1707 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1708 be32_to_cpu(data[i]));
1709 udelay(10);
1710 }
1711 }
1712
1713 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1714 B43legacy_IRQ_ALL);
1715
1716 /* Start the microcode PSM */
1717 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1718 macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1719 macctl |= B43legacy_MACCTL_PSM_RUN;
1720 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1721
1722 /* Wait for the microcode to load and respond */
1723 i = 0;
1724 while (1) {
1725 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1726 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1727 break;
1728 i++;
1729 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1730 b43legacyerr(dev->wl, "Microcode not responding\n");
1731 b43legacy_print_fw_helptext(dev->wl);
1732 err = -ENODEV;
1733 goto error;
1734 }
1735 msleep_interruptible(50);
1736 if (signal_pending(current)) {
1737 err = -EINTR;
1738 goto error;
1739 }
1740 }
1741 /* dummy read follows */
1742 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1743
1744 /* Get and check the revisions. */
1745 fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1746 B43legacy_SHM_SH_UCODEREV);
1747 fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1748 B43legacy_SHM_SH_UCODEPATCH);
1749 fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1750 B43legacy_SHM_SH_UCODEDATE);
1751 fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1752 B43legacy_SHM_SH_UCODETIME);
1753
1754 if (fwrev > 0x128) {
1755 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1756 " Only firmware from binary drivers version 3.x"
1757 " is supported. You must change your firmware"
1758 " files.\n");
1759 b43legacy_print_fw_helptext(dev->wl);
1760 err = -EOPNOTSUPP;
1761 goto error;
1762 }
1763 b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1764 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1765 (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1766 (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1767 fwtime & 0x1F);
1768
1769 dev->fw.rev = fwrev;
1770 dev->fw.patch = fwpatch;
1771
1772 snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
1773 dev->fw.rev, dev->fw.patch);
1774 wiphy->hw_version = dev->dev->id.coreid;
1775
1776 return 0;
1777
1778 error:
1779 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1780 macctl &= ~B43legacy_MACCTL_PSM_RUN;
1781 macctl |= B43legacy_MACCTL_PSM_JMP0;
1782 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1783
1784 return err;
1785 }
1786
1787 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1788 const struct b43legacy_iv *ivals,
1789 size_t count,
1790 size_t array_size)
1791 {
1792 const struct b43legacy_iv *iv;
1793 u16 offset;
1794 size_t i;
1795 bool bit32;
1796
1797 BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1798 iv = ivals;
1799 for (i = 0; i < count; i++) {
1800 if (array_size < sizeof(iv->offset_size))
1801 goto err_format;
1802 array_size -= sizeof(iv->offset_size);
1803 offset = be16_to_cpu(iv->offset_size);
1804 bit32 = !!(offset & B43legacy_IV_32BIT);
1805 offset &= B43legacy_IV_OFFSET_MASK;
1806 if (offset >= 0x1000)
1807 goto err_format;
1808 if (bit32) {
1809 u32 value;
1810
1811 if (array_size < sizeof(iv->data.d32))
1812 goto err_format;
1813 array_size -= sizeof(iv->data.d32);
1814
1815 value = get_unaligned_be32(&iv->data.d32);
1816 b43legacy_write32(dev, offset, value);
1817
1818 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1819 sizeof(__be16) +
1820 sizeof(__be32));
1821 } else {
1822 u16 value;
1823
1824 if (array_size < sizeof(iv->data.d16))
1825 goto err_format;
1826 array_size -= sizeof(iv->data.d16);
1827
1828 value = be16_to_cpu(iv->data.d16);
1829 b43legacy_write16(dev, offset, value);
1830
1831 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1832 sizeof(__be16) +
1833 sizeof(__be16));
1834 }
1835 }
1836 if (array_size)
1837 goto err_format;
1838
1839 return 0;
1840
1841 err_format:
1842 b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1843 b43legacy_print_fw_helptext(dev->wl);
1844
1845 return -EPROTO;
1846 }
1847
1848 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1849 {
1850 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1851 const struct b43legacy_fw_header *hdr;
1852 struct b43legacy_firmware *fw = &dev->fw;
1853 const struct b43legacy_iv *ivals;
1854 size_t count;
1855 int err;
1856
1857 hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1858 ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1859 count = be32_to_cpu(hdr->size);
1860 err = b43legacy_write_initvals(dev, ivals, count,
1861 fw->initvals->size - hdr_len);
1862 if (err)
1863 goto out;
1864 if (fw->initvals_band) {
1865 hdr = (const struct b43legacy_fw_header *)
1866 (fw->initvals_band->data);
1867 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1868 + hdr_len);
1869 count = be32_to_cpu(hdr->size);
1870 err = b43legacy_write_initvals(dev, ivals, count,
1871 fw->initvals_band->size - hdr_len);
1872 if (err)
1873 goto out;
1874 }
1875 out:
1876
1877 return err;
1878 }
1879
1880 /* Initialize the GPIOs
1881 * http://bcm-specs.sipsolutions.net/GPIO
1882 */
1883 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1884 {
1885 struct ssb_bus *bus = dev->dev->bus;
1886 struct ssb_device *gpiodev, *pcidev = NULL;
1887 u32 mask;
1888 u32 set;
1889
1890 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1891 b43legacy_read32(dev,
1892 B43legacy_MMIO_MACCTL)
1893 & 0xFFFF3FFF);
1894
1895 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1896 b43legacy_read16(dev,
1897 B43legacy_MMIO_GPIO_MASK)
1898 | 0x000F);
1899
1900 mask = 0x0000001F;
1901 set = 0x0000000F;
1902 if (dev->dev->bus->chip_id == 0x4301) {
1903 mask |= 0x0060;
1904 set |= 0x0060;
1905 }
1906 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1907 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1908 b43legacy_read16(dev,
1909 B43legacy_MMIO_GPIO_MASK)
1910 | 0x0200);
1911 mask |= 0x0200;
1912 set |= 0x0200;
1913 }
1914 if (dev->dev->id.revision >= 2)
1915 mask |= 0x0010; /* FIXME: This is redundant. */
1916
1917 #ifdef CONFIG_SSB_DRIVER_PCICORE
1918 pcidev = bus->pcicore.dev;
1919 #endif
1920 gpiodev = bus->chipco.dev ? : pcidev;
1921 if (!gpiodev)
1922 return 0;
1923 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1924 (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1925 & mask) | set);
1926
1927 return 0;
1928 }
1929
1930 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1931 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1932 {
1933 struct ssb_bus *bus = dev->dev->bus;
1934 struct ssb_device *gpiodev, *pcidev = NULL;
1935
1936 #ifdef CONFIG_SSB_DRIVER_PCICORE
1937 pcidev = bus->pcicore.dev;
1938 #endif
1939 gpiodev = bus->chipco.dev ? : pcidev;
1940 if (!gpiodev)
1941 return;
1942 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1943 }
1944
1945 /* http://bcm-specs.sipsolutions.net/EnableMac */
1946 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1947 {
1948 dev->mac_suspended--;
1949 B43legacy_WARN_ON(dev->mac_suspended < 0);
1950 B43legacy_WARN_ON(irqs_disabled());
1951 if (dev->mac_suspended == 0) {
1952 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1953 b43legacy_read32(dev,
1954 B43legacy_MMIO_MACCTL)
1955 | B43legacy_MACCTL_ENABLED);
1956 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1957 B43legacy_IRQ_MAC_SUSPENDED);
1958 /* the next two are dummy reads */
1959 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1960 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1961 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1962
1963 /* Re-enable IRQs. */
1964 spin_lock_irq(&dev->wl->irq_lock);
1965 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1966 dev->irq_mask);
1967 spin_unlock_irq(&dev->wl->irq_lock);
1968 }
1969 }
1970
1971 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1972 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1973 {
1974 int i;
1975 u32 tmp;
1976
1977 might_sleep();
1978 B43legacy_WARN_ON(irqs_disabled());
1979 B43legacy_WARN_ON(dev->mac_suspended < 0);
1980
1981 if (dev->mac_suspended == 0) {
1982 /* Mask IRQs before suspending MAC. Otherwise
1983 * the MAC stays busy and won't suspend. */
1984 spin_lock_irq(&dev->wl->irq_lock);
1985 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1986 spin_unlock_irq(&dev->wl->irq_lock);
1987 b43legacy_synchronize_irq(dev);
1988
1989 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1990 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1991 b43legacy_read32(dev,
1992 B43legacy_MMIO_MACCTL)
1993 & ~B43legacy_MACCTL_ENABLED);
1994 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1995 for (i = 40; i; i--) {
1996 tmp = b43legacy_read32(dev,
1997 B43legacy_MMIO_GEN_IRQ_REASON);
1998 if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1999 goto out;
2000 msleep(1);
2001 }
2002 b43legacyerr(dev->wl, "MAC suspend failed\n");
2003 }
2004 out:
2005 dev->mac_suspended++;
2006 }
2007
2008 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
2009 {
2010 struct b43legacy_wl *wl = dev->wl;
2011 u32 ctl;
2012 u16 cfp_pretbtt;
2013
2014 ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2015 /* Reset status to STA infrastructure mode. */
2016 ctl &= ~B43legacy_MACCTL_AP;
2017 ctl &= ~B43legacy_MACCTL_KEEP_CTL;
2018 ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
2019 ctl &= ~B43legacy_MACCTL_KEEP_BAD;
2020 ctl &= ~B43legacy_MACCTL_PROMISC;
2021 ctl &= ~B43legacy_MACCTL_BEACPROMISC;
2022 ctl |= B43legacy_MACCTL_INFRA;
2023
2024 if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
2025 ctl |= B43legacy_MACCTL_AP;
2026 else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))
2027 ctl &= ~B43legacy_MACCTL_INFRA;
2028
2029 if (wl->filter_flags & FIF_CONTROL)
2030 ctl |= B43legacy_MACCTL_KEEP_CTL;
2031 if (wl->filter_flags & FIF_FCSFAIL)
2032 ctl |= B43legacy_MACCTL_KEEP_BAD;
2033 if (wl->filter_flags & FIF_PLCPFAIL)
2034 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
2035 if (wl->filter_flags & FIF_PROMISC_IN_BSS)
2036 ctl |= B43legacy_MACCTL_PROMISC;
2037 if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
2038 ctl |= B43legacy_MACCTL_BEACPROMISC;
2039
2040 /* Workaround: On old hardware the HW-MAC-address-filter
2041 * doesn't work properly, so always run promisc in filter
2042 * it in software. */
2043 if (dev->dev->id.revision <= 4)
2044 ctl |= B43legacy_MACCTL_PROMISC;
2045
2046 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
2047
2048 cfp_pretbtt = 2;
2049 if ((ctl & B43legacy_MACCTL_INFRA) &&
2050 !(ctl & B43legacy_MACCTL_AP)) {
2051 if (dev->dev->bus->chip_id == 0x4306 &&
2052 dev->dev->bus->chip_rev == 3)
2053 cfp_pretbtt = 100;
2054 else
2055 cfp_pretbtt = 50;
2056 }
2057 b43legacy_write16(dev, 0x612, cfp_pretbtt);
2058 }
2059
2060 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
2061 u16 rate,
2062 int is_ofdm)
2063 {
2064 u16 offset;
2065
2066 if (is_ofdm) {
2067 offset = 0x480;
2068 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
2069 } else {
2070 offset = 0x4C0;
2071 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
2072 }
2073 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
2074 b43legacy_shm_read16(dev,
2075 B43legacy_SHM_SHARED, offset));
2076 }
2077
2078 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
2079 {
2080 switch (dev->phy.type) {
2081 case B43legacy_PHYTYPE_G:
2082 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
2083 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
2084 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
2085 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
2086 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
2087 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
2088 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
2089 /* fallthrough */
2090 case B43legacy_PHYTYPE_B:
2091 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
2092 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
2093 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
2094 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
2095 break;
2096 default:
2097 B43legacy_BUG_ON(1);
2098 }
2099 }
2100
2101 /* Set the TX-Antenna for management frames sent by firmware. */
2102 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
2103 int antenna)
2104 {
2105 u16 ant = 0;
2106 u16 tmp;
2107
2108 switch (antenna) {
2109 case B43legacy_ANTENNA0:
2110 ant |= B43legacy_TX4_PHY_ANT0;
2111 break;
2112 case B43legacy_ANTENNA1:
2113 ant |= B43legacy_TX4_PHY_ANT1;
2114 break;
2115 case B43legacy_ANTENNA_AUTO:
2116 ant |= B43legacy_TX4_PHY_ANTLAST;
2117 break;
2118 default:
2119 B43legacy_BUG_ON(1);
2120 }
2121
2122 /* FIXME We also need to set the other flags of the PHY control
2123 * field somewhere. */
2124
2125 /* For Beacons */
2126 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2127 B43legacy_SHM_SH_BEACPHYCTL);
2128 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2129 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2130 B43legacy_SHM_SH_BEACPHYCTL, tmp);
2131 /* For ACK/CTS */
2132 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2133 B43legacy_SHM_SH_ACKCTSPHYCTL);
2134 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2135 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2136 B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2137 /* For Probe Resposes */
2138 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2139 B43legacy_SHM_SH_PRPHYCTL);
2140 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2141 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2142 B43legacy_SHM_SH_PRPHYCTL, tmp);
2143 }
2144
2145 /* This is the opposite of b43legacy_chip_init() */
2146 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2147 {
2148 b43legacy_radio_turn_off(dev, 1);
2149 b43legacy_gpio_cleanup(dev);
2150 /* firmware is released later */
2151 }
2152
2153 /* Initialize the chip
2154 * http://bcm-specs.sipsolutions.net/ChipInit
2155 */
2156 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2157 {
2158 struct b43legacy_phy *phy = &dev->phy;
2159 int err;
2160 int tmp;
2161 u32 value32, macctl;
2162 u16 value16;
2163
2164 /* Initialize the MAC control */
2165 macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2166 if (dev->phy.gmode)
2167 macctl |= B43legacy_MACCTL_GMODE;
2168 macctl |= B43legacy_MACCTL_INFRA;
2169 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2170
2171 err = b43legacy_upload_microcode(dev);
2172 if (err)
2173 goto out; /* firmware is released later */
2174
2175 err = b43legacy_gpio_init(dev);
2176 if (err)
2177 goto out; /* firmware is released later */
2178
2179 err = b43legacy_upload_initvals(dev);
2180 if (err)
2181 goto err_gpio_clean;
2182 b43legacy_radio_turn_on(dev);
2183
2184 b43legacy_write16(dev, 0x03E6, 0x0000);
2185 err = b43legacy_phy_init(dev);
2186 if (err)
2187 goto err_radio_off;
2188
2189 /* Select initial Interference Mitigation. */
2190 tmp = phy->interfmode;
2191 phy->interfmode = B43legacy_INTERFMODE_NONE;
2192 b43legacy_radio_set_interference_mitigation(dev, tmp);
2193
2194 b43legacy_phy_set_antenna_diversity(dev);
2195 b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2196
2197 if (phy->type == B43legacy_PHYTYPE_B) {
2198 value16 = b43legacy_read16(dev, 0x005E);
2199 value16 |= 0x0004;
2200 b43legacy_write16(dev, 0x005E, value16);
2201 }
2202 b43legacy_write32(dev, 0x0100, 0x01000000);
2203 if (dev->dev->id.revision < 5)
2204 b43legacy_write32(dev, 0x010C, 0x01000000);
2205
2206 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2207 value32 &= ~B43legacy_MACCTL_INFRA;
2208 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2209 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2210 value32 |= B43legacy_MACCTL_INFRA;
2211 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2212
2213 if (b43legacy_using_pio(dev)) {
2214 b43legacy_write32(dev, 0x0210, 0x00000100);
2215 b43legacy_write32(dev, 0x0230, 0x00000100);
2216 b43legacy_write32(dev, 0x0250, 0x00000100);
2217 b43legacy_write32(dev, 0x0270, 0x00000100);
2218 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2219 0x0000);
2220 }
2221
2222 /* Probe Response Timeout value */
2223 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2224 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2225
2226 /* Initially set the wireless operation mode. */
2227 b43legacy_adjust_opmode(dev);
2228
2229 if (dev->dev->id.revision < 3) {
2230 b43legacy_write16(dev, 0x060E, 0x0000);
2231 b43legacy_write16(dev, 0x0610, 0x8000);
2232 b43legacy_write16(dev, 0x0604, 0x0000);
2233 b43legacy_write16(dev, 0x0606, 0x0200);
2234 } else {
2235 b43legacy_write32(dev, 0x0188, 0x80000000);
2236 b43legacy_write32(dev, 0x018C, 0x02000000);
2237 }
2238 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2239 b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2240 b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2241 b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2242 b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2243 b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2244 b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2245
2246 value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2247 value32 |= B43legacy_TMSLOW_MACPHYCLKEN;
2248 ssb_write32(dev->dev, SSB_TMSLOW, value32);
2249
2250 b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2251 dev->dev->bus->chipco.fast_pwrup_delay);
2252
2253 /* PHY TX errors counter. */
2254 atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2255
2256 B43legacy_WARN_ON(err != 0);
2257 b43legacydbg(dev->wl, "Chip initialized\n");
2258 out:
2259 return err;
2260
2261 err_radio_off:
2262 b43legacy_radio_turn_off(dev, 1);
2263 err_gpio_clean:
2264 b43legacy_gpio_cleanup(dev);
2265 goto out;
2266 }
2267
2268 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2269 {
2270 struct b43legacy_phy *phy = &dev->phy;
2271
2272 if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2273 return;
2274
2275 b43legacy_mac_suspend(dev);
2276 b43legacy_phy_lo_g_measure(dev);
2277 b43legacy_mac_enable(dev);
2278 }
2279
2280 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2281 {
2282 b43legacy_phy_lo_mark_all_unused(dev);
2283 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2284 b43legacy_mac_suspend(dev);
2285 b43legacy_calc_nrssi_slope(dev);
2286 b43legacy_mac_enable(dev);
2287 }
2288 }
2289
2290 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2291 {
2292 /* Update device statistics. */
2293 b43legacy_calculate_link_quality(dev);
2294 }
2295
2296 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2297 {
2298 b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2299
2300 atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2301 wmb();
2302 }
2303
2304 static void do_periodic_work(struct b43legacy_wldev *dev)
2305 {
2306 unsigned int state;
2307
2308 state = dev->periodic_state;
2309 if (state % 8 == 0)
2310 b43legacy_periodic_every120sec(dev);
2311 if (state % 4 == 0)
2312 b43legacy_periodic_every60sec(dev);
2313 if (state % 2 == 0)
2314 b43legacy_periodic_every30sec(dev);
2315 b43legacy_periodic_every15sec(dev);
2316 }
2317
2318 /* Periodic work locking policy:
2319 * The whole periodic work handler is protected by
2320 * wl->mutex. If another lock is needed somewhere in the
2321 * pwork callchain, it's acquired in-place, where it's needed.
2322 */
2323 static void b43legacy_periodic_work_handler(struct work_struct *work)
2324 {
2325 struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2326 periodic_work.work);
2327 struct b43legacy_wl *wl = dev->wl;
2328 unsigned long delay;
2329
2330 mutex_lock(&wl->mutex);
2331
2332 if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2333 goto out;
2334 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2335 goto out_requeue;
2336
2337 do_periodic_work(dev);
2338
2339 dev->periodic_state++;
2340 out_requeue:
2341 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2342 delay = msecs_to_jiffies(50);
2343 else
2344 delay = round_jiffies_relative(HZ * 15);
2345 ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay);
2346 out:
2347 mutex_unlock(&wl->mutex);
2348 }
2349
2350 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2351 {
2352 struct delayed_work *work = &dev->periodic_work;
2353
2354 dev->periodic_state = 0;
2355 INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2356 ieee80211_queue_delayed_work(dev->wl->hw, work, 0);
2357 }
2358
2359 /* Validate access to the chip (SHM) */
2360 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2361 {
2362 u32 value;
2363 u32 shm_backup;
2364
2365 shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2366 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2367 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2368 0xAA5555AA)
2369 goto error;
2370 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2371 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2372 0x55AAAA55)
2373 goto error;
2374 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2375
2376 value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2377 if ((value | B43legacy_MACCTL_GMODE) !=
2378 (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2379 goto error;
2380
2381 value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2382 if (value)
2383 goto error;
2384
2385 return 0;
2386 error:
2387 b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2388 return -ENODEV;
2389 }
2390
2391 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2392 {
2393 dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2394 B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2395 dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2396 0x0056);
2397 /* KTP is a word address, but we address SHM bytewise.
2398 * So multiply by two.
2399 */
2400 dev->ktp *= 2;
2401 if (dev->dev->id.revision >= 5)
2402 /* Number of RCMTA address slots */
2403 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2404 dev->max_nr_keys - 8);
2405 }
2406
2407 #ifdef CONFIG_B43LEGACY_HWRNG
2408 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2409 {
2410 struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2411 unsigned long flags;
2412
2413 /* Don't take wl->mutex here, as it could deadlock with
2414 * hwrng internal locking. It's not needed to take
2415 * wl->mutex here, anyway. */
2416
2417 spin_lock_irqsave(&wl->irq_lock, flags);
2418 *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2419 spin_unlock_irqrestore(&wl->irq_lock, flags);
2420
2421 return (sizeof(u16));
2422 }
2423 #endif
2424
2425 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2426 {
2427 #ifdef CONFIG_B43LEGACY_HWRNG
2428 if (wl->rng_initialized)
2429 hwrng_unregister(&wl->rng);
2430 #endif
2431 }
2432
2433 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2434 {
2435 int err = 0;
2436
2437 #ifdef CONFIG_B43LEGACY_HWRNG
2438 snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2439 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2440 wl->rng.name = wl->rng_name;
2441 wl->rng.data_read = b43legacy_rng_read;
2442 wl->rng.priv = (unsigned long)wl;
2443 wl->rng_initialized = 1;
2444 err = hwrng_register(&wl->rng);
2445 if (err) {
2446 wl->rng_initialized = 0;
2447 b43legacyerr(wl, "Failed to register the random "
2448 "number generator (%d)\n", err);
2449 }
2450
2451 #endif
2452 return err;
2453 }
2454
2455 static void b43legacy_tx_work(struct work_struct *work)
2456 {
2457 struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
2458 tx_work);
2459 struct b43legacy_wldev *dev;
2460 struct sk_buff *skb;
2461 int queue_num;
2462 int err = 0;
2463
2464 mutex_lock(&wl->mutex);
2465 dev = wl->current_dev;
2466 if (unlikely(!dev || b43legacy_status(dev) < B43legacy_STAT_STARTED)) {
2467 mutex_unlock(&wl->mutex);
2468 return;
2469 }
2470
2471 for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2472 while (skb_queue_len(&wl->tx_queue[queue_num])) {
2473 skb = skb_dequeue(&wl->tx_queue[queue_num]);
2474 if (b43legacy_using_pio(dev))
2475 err = b43legacy_pio_tx(dev, skb);
2476 else
2477 err = b43legacy_dma_tx(dev, skb);
2478 if (err == -ENOSPC) {
2479 wl->tx_queue_stopped[queue_num] = 1;
2480 ieee80211_stop_queue(wl->hw, queue_num);
2481 skb_queue_head(&wl->tx_queue[queue_num], skb);
2482 break;
2483 }
2484 if (unlikely(err))
2485 dev_kfree_skb(skb); /* Drop it */
2486 err = 0;
2487 }
2488
2489 if (!err)
2490 wl->tx_queue_stopped[queue_num] = 0;
2491 }
2492
2493 mutex_unlock(&wl->mutex);
2494 }
2495
2496 static void b43legacy_op_tx(struct ieee80211_hw *hw,
2497 struct sk_buff *skb)
2498 {
2499 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2500
2501 if (unlikely(skb->len < 2 + 2 + 6)) {
2502 /* Too short, this can't be a valid frame. */
2503 dev_kfree_skb_any(skb);
2504 return;
2505 }
2506 B43legacy_WARN_ON(skb_shinfo(skb)->nr_frags);
2507
2508 skb_queue_tail(&wl->tx_queue[skb->queue_mapping], skb);
2509 if (!wl->tx_queue_stopped[skb->queue_mapping])
2510 ieee80211_queue_work(wl->hw, &wl->tx_work);
2511 else
2512 ieee80211_stop_queue(wl->hw, skb->queue_mapping);
2513 }
2514
2515 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2516 struct ieee80211_vif *vif, u16 queue,
2517 const struct ieee80211_tx_queue_params *params)
2518 {
2519 return 0;
2520 }
2521
2522 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2523 struct ieee80211_low_level_stats *stats)
2524 {
2525 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2526 unsigned long flags;
2527
2528 spin_lock_irqsave(&wl->irq_lock, flags);
2529 memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2530 spin_unlock_irqrestore(&wl->irq_lock, flags);
2531
2532 return 0;
2533 }
2534
2535 static const char *phymode_to_string(unsigned int phymode)
2536 {
2537 switch (phymode) {
2538 case B43legacy_PHYMODE_B:
2539 return "B";
2540 case B43legacy_PHYMODE_G:
2541 return "G";
2542 default:
2543 B43legacy_BUG_ON(1);
2544 }
2545 return "";
2546 }
2547
2548 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2549 unsigned int phymode,
2550 struct b43legacy_wldev **dev,
2551 bool *gmode)
2552 {
2553 struct b43legacy_wldev *d;
2554
2555 list_for_each_entry(d, &wl->devlist, list) {
2556 if (d->phy.possible_phymodes & phymode) {
2557 /* Ok, this device supports the PHY-mode.
2558 * Set the gmode bit. */
2559 *gmode = true;
2560 *dev = d;
2561
2562 return 0;
2563 }
2564 }
2565
2566 return -ESRCH;
2567 }
2568
2569 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2570 {
2571 struct ssb_device *sdev = dev->dev;
2572 u32 tmslow;
2573
2574 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2575 tmslow &= ~B43legacy_TMSLOW_GMODE;
2576 tmslow |= B43legacy_TMSLOW_PHYRESET;
2577 tmslow |= SSB_TMSLOW_FGC;
2578 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2579 msleep(1);
2580
2581 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2582 tmslow &= ~SSB_TMSLOW_FGC;
2583 tmslow |= B43legacy_TMSLOW_PHYRESET;
2584 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2585 msleep(1);
2586 }
2587
2588 /* Expects wl->mutex locked */
2589 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2590 unsigned int new_mode)
2591 {
2592 struct b43legacy_wldev *uninitialized_var(up_dev);
2593 struct b43legacy_wldev *down_dev;
2594 int err;
2595 bool gmode = false;
2596 int prev_status;
2597
2598 err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2599 if (err) {
2600 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2601 phymode_to_string(new_mode));
2602 return err;
2603 }
2604 if ((up_dev == wl->current_dev) &&
2605 (!!wl->current_dev->phy.gmode == !!gmode))
2606 /* This device is already running. */
2607 return 0;
2608 b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2609 phymode_to_string(new_mode));
2610 down_dev = wl->current_dev;
2611
2612 prev_status = b43legacy_status(down_dev);
2613 /* Shutdown the currently running core. */
2614 if (prev_status >= B43legacy_STAT_STARTED)
2615 b43legacy_wireless_core_stop(down_dev);
2616 if (prev_status >= B43legacy_STAT_INITIALIZED)
2617 b43legacy_wireless_core_exit(down_dev);
2618
2619 if (down_dev != up_dev)
2620 /* We switch to a different core, so we put PHY into
2621 * RESET on the old core. */
2622 b43legacy_put_phy_into_reset(down_dev);
2623
2624 /* Now start the new core. */
2625 up_dev->phy.gmode = gmode;
2626 if (prev_status >= B43legacy_STAT_INITIALIZED) {
2627 err = b43legacy_wireless_core_init(up_dev);
2628 if (err) {
2629 b43legacyerr(wl, "Fatal: Could not initialize device"
2630 " for newly selected %s-PHY mode\n",
2631 phymode_to_string(new_mode));
2632 goto init_failure;
2633 }
2634 }
2635 if (prev_status >= B43legacy_STAT_STARTED) {
2636 err = b43legacy_wireless_core_start(up_dev);
2637 if (err) {
2638 b43legacyerr(wl, "Fatal: Coult not start device for "
2639 "newly selected %s-PHY mode\n",
2640 phymode_to_string(new_mode));
2641 b43legacy_wireless_core_exit(up_dev);
2642 goto init_failure;
2643 }
2644 }
2645 B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2646
2647 b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2648
2649 wl->current_dev = up_dev;
2650
2651 return 0;
2652 init_failure:
2653 /* Whoops, failed to init the new core. No core is operating now. */
2654 wl->current_dev = NULL;
2655 return err;
2656 }
2657
2658 /* Write the short and long frame retry limit values. */
2659 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2660 unsigned int short_retry,
2661 unsigned int long_retry)
2662 {
2663 /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2664 * the chip-internal counter. */
2665 short_retry = min(short_retry, (unsigned int)0xF);
2666 long_retry = min(long_retry, (unsigned int)0xF);
2667
2668 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2669 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2670 }
2671
2672 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2673 u32 changed)
2674 {
2675 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2676 struct b43legacy_wldev *dev;
2677 struct b43legacy_phy *phy;
2678 struct ieee80211_conf *conf = &hw->conf;
2679 unsigned long flags;
2680 unsigned int new_phymode = 0xFFFF;
2681 int antenna_tx;
2682 int err = 0;
2683
2684 antenna_tx = B43legacy_ANTENNA_DEFAULT;
2685
2686 mutex_lock(&wl->mutex);
2687 dev = wl->current_dev;
2688 phy = &dev->phy;
2689
2690 if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
2691 b43legacy_set_retry_limits(dev,
2692 conf->short_frame_max_tx_count,
2693 conf->long_frame_max_tx_count);
2694 changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS;
2695 if (!changed)
2696 goto out_unlock_mutex;
2697
2698 /* Switch the PHY mode (if necessary). */
2699 switch (conf->channel->band) {
2700 case IEEE80211_BAND_2GHZ:
2701 if (phy->type == B43legacy_PHYTYPE_B)
2702 new_phymode = B43legacy_PHYMODE_B;
2703 else
2704 new_phymode = B43legacy_PHYMODE_G;
2705 break;
2706 default:
2707 B43legacy_WARN_ON(1);
2708 }
2709 err = b43legacy_switch_phymode(wl, new_phymode);
2710 if (err)
2711 goto out_unlock_mutex;
2712
2713 /* Disable IRQs while reconfiguring the device.
2714 * This makes it possible to drop the spinlock throughout
2715 * the reconfiguration process. */
2716 spin_lock_irqsave(&wl->irq_lock, flags);
2717 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2718 spin_unlock_irqrestore(&wl->irq_lock, flags);
2719 goto out_unlock_mutex;
2720 }
2721 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2722 spin_unlock_irqrestore(&wl->irq_lock, flags);
2723 b43legacy_synchronize_irq(dev);
2724
2725 /* Switch to the requested channel.
2726 * The firmware takes care of races with the TX handler. */
2727 if (conf->channel->hw_value != phy->channel)
2728 b43legacy_radio_selectchannel(dev, conf->channel->hw_value, 0);
2729
2730 dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
2731
2732 /* Adjust the desired TX power level. */
2733 if (conf->power_level != 0) {
2734 if (conf->power_level != phy->power_level) {
2735 phy->power_level = conf->power_level;
2736 b43legacy_phy_xmitpower(dev);
2737 }
2738 }
2739
2740 /* Antennas for RX and management frame TX. */
2741 b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2742
2743 if (wl->radio_enabled != phy->radio_on) {
2744 if (wl->radio_enabled) {
2745 b43legacy_radio_turn_on(dev);
2746 b43legacyinfo(dev->wl, "Radio turned on by software\n");
2747 if (!dev->radio_hw_enable)
2748 b43legacyinfo(dev->wl, "The hardware RF-kill"
2749 " button still turns the radio"
2750 " physically off. Press the"
2751 " button to turn it on.\n");
2752 } else {
2753 b43legacy_radio_turn_off(dev, 0);
2754 b43legacyinfo(dev->wl, "Radio turned off by"
2755 " software\n");
2756 }
2757 }
2758
2759 spin_lock_irqsave(&wl->irq_lock, flags);
2760 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2761 mmiowb();
2762 spin_unlock_irqrestore(&wl->irq_lock, flags);
2763 out_unlock_mutex:
2764 mutex_unlock(&wl->mutex);
2765
2766 return err;
2767 }
2768
2769 static void b43legacy_update_basic_rates(struct b43legacy_wldev *dev, u32 brates)
2770 {
2771 struct ieee80211_supported_band *sband =
2772 dev->wl->hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2773 struct ieee80211_rate *rate;
2774 int i;
2775 u16 basic, direct, offset, basic_offset, rateptr;
2776
2777 for (i = 0; i < sband->n_bitrates; i++) {
2778 rate = &sband->bitrates[i];
2779
2780 if (b43legacy_is_cck_rate(rate->hw_value)) {
2781 direct = B43legacy_SHM_SH_CCKDIRECT;
2782 basic = B43legacy_SHM_SH_CCKBASIC;
2783 offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2784 offset &= 0xF;
2785 } else {
2786 direct = B43legacy_SHM_SH_OFDMDIRECT;
2787 basic = B43legacy_SHM_SH_OFDMBASIC;
2788 offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2789 offset &= 0xF;
2790 }
2791
2792 rate = ieee80211_get_response_rate(sband, brates, rate->bitrate);
2793
2794 if (b43legacy_is_cck_rate(rate->hw_value)) {
2795 basic_offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2796 basic_offset &= 0xF;
2797 } else {
2798 basic_offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2799 basic_offset &= 0xF;
2800 }
2801
2802 /*
2803 * Get the pointer that we need to point to
2804 * from the direct map
2805 */
2806 rateptr = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2807 direct + 2 * basic_offset);
2808 /* and write it to the basic map */
2809 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2810 basic + 2 * offset, rateptr);
2811 }
2812 }
2813
2814 static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw,
2815 struct ieee80211_vif *vif,
2816 struct ieee80211_bss_conf *conf,
2817 u32 changed)
2818 {
2819 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2820 struct b43legacy_wldev *dev;
2821 unsigned long flags;
2822
2823 mutex_lock(&wl->mutex);
2824 B43legacy_WARN_ON(wl->vif != vif);
2825
2826 dev = wl->current_dev;
2827
2828 /* Disable IRQs while reconfiguring the device.
2829 * This makes it possible to drop the spinlock throughout
2830 * the reconfiguration process. */
2831 spin_lock_irqsave(&wl->irq_lock, flags);
2832 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2833 spin_unlock_irqrestore(&wl->irq_lock, flags);
2834 goto out_unlock_mutex;
2835 }
2836 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2837
2838 if (changed & BSS_CHANGED_BSSID) {
2839 b43legacy_synchronize_irq(dev);
2840
2841 if (conf->bssid)
2842 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2843 else
2844 memset(wl->bssid, 0, ETH_ALEN);
2845 }
2846
2847 if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2848 if (changed & BSS_CHANGED_BEACON &&
2849 (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2850 b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2851 b43legacy_update_templates(wl);
2852
2853 if (changed & BSS_CHANGED_BSSID)
2854 b43legacy_write_mac_bssid_templates(dev);
2855 }
2856 spin_unlock_irqrestore(&wl->irq_lock, flags);
2857
2858 b43legacy_mac_suspend(dev);
2859
2860 if (changed & BSS_CHANGED_BEACON_INT &&
2861 (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2862 b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2863 b43legacy_set_beacon_int(dev, conf->beacon_int);
2864
2865 if (changed & BSS_CHANGED_BASIC_RATES)
2866 b43legacy_update_basic_rates(dev, conf->basic_rates);
2867
2868 if (changed & BSS_CHANGED_ERP_SLOT) {
2869 if (conf->use_short_slot)
2870 b43legacy_short_slot_timing_enable(dev);
2871 else
2872 b43legacy_short_slot_timing_disable(dev);
2873 }
2874
2875 b43legacy_mac_enable(dev);
2876
2877 spin_lock_irqsave(&wl->irq_lock, flags);
2878 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2879 /* XXX: why? */
2880 mmiowb();
2881 spin_unlock_irqrestore(&wl->irq_lock, flags);
2882 out_unlock_mutex:
2883 mutex_unlock(&wl->mutex);
2884 }
2885
2886 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2887 unsigned int changed,
2888 unsigned int *fflags,u64 multicast)
2889 {
2890 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2891 struct b43legacy_wldev *dev = wl->current_dev;
2892 unsigned long flags;
2893
2894 if (!dev) {
2895 *fflags = 0;
2896 return;
2897 }
2898
2899 spin_lock_irqsave(&wl->irq_lock, flags);
2900 *fflags &= FIF_PROMISC_IN_BSS |
2901 FIF_ALLMULTI |
2902 FIF_FCSFAIL |
2903 FIF_PLCPFAIL |
2904 FIF_CONTROL |
2905 FIF_OTHER_BSS |
2906 FIF_BCN_PRBRESP_PROMISC;
2907
2908 changed &= FIF_PROMISC_IN_BSS |
2909 FIF_ALLMULTI |
2910 FIF_FCSFAIL |
2911 FIF_PLCPFAIL |
2912 FIF_CONTROL |
2913 FIF_OTHER_BSS |
2914 FIF_BCN_PRBRESP_PROMISC;
2915
2916 wl->filter_flags = *fflags;
2917
2918 if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2919 b43legacy_adjust_opmode(dev);
2920 spin_unlock_irqrestore(&wl->irq_lock, flags);
2921 }
2922
2923 /* Locking: wl->mutex */
2924 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2925 {
2926 struct b43legacy_wl *wl = dev->wl;
2927 unsigned long flags;
2928 int queue_num;
2929
2930 if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2931 return;
2932
2933 /* Disable and sync interrupts. We must do this before than
2934 * setting the status to INITIALIZED, as the interrupt handler
2935 * won't care about IRQs then. */
2936 spin_lock_irqsave(&wl->irq_lock, flags);
2937 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2938 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2939 spin_unlock_irqrestore(&wl->irq_lock, flags);
2940 b43legacy_synchronize_irq(dev);
2941
2942 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2943
2944 mutex_unlock(&wl->mutex);
2945 /* Must unlock as it would otherwise deadlock. No races here.
2946 * Cancel the possibly running self-rearming periodic work. */
2947 cancel_delayed_work_sync(&dev->periodic_work);
2948 cancel_work_sync(&wl->tx_work);
2949 mutex_lock(&wl->mutex);
2950
2951 /* Drain all TX queues. */
2952 for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2953 while (skb_queue_len(&wl->tx_queue[queue_num]))
2954 dev_kfree_skb(skb_dequeue(&wl->tx_queue[queue_num]));
2955 }
2956
2957 b43legacy_mac_suspend(dev);
2958 free_irq(dev->dev->irq, dev);
2959 b43legacydbg(wl, "Wireless interface stopped\n");
2960 }
2961
2962 /* Locking: wl->mutex */
2963 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2964 {
2965 int err;
2966
2967 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2968
2969 drain_txstatus_queue(dev);
2970 err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2971 IRQF_SHARED, KBUILD_MODNAME, dev);
2972 if (err) {
2973 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2974 dev->dev->irq);
2975 goto out;
2976 }
2977 /* We are ready to run. */
2978 ieee80211_wake_queues(dev->wl->hw);
2979 b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2980
2981 /* Start data flow (TX/RX) */
2982 b43legacy_mac_enable(dev);
2983 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2984
2985 /* Start maintenance work */
2986 b43legacy_periodic_tasks_setup(dev);
2987
2988 b43legacydbg(dev->wl, "Wireless interface started\n");
2989 out:
2990 return err;
2991 }
2992
2993 /* Get PHY and RADIO versioning numbers */
2994 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2995 {
2996 struct b43legacy_phy *phy = &dev->phy;
2997 u32 tmp;
2998 u8 analog_type;
2999 u8 phy_type;
3000 u8 phy_rev;
3001 u16 radio_manuf;
3002 u16 radio_ver;
3003 u16 radio_rev;
3004 int unsupported = 0;
3005
3006 /* Get PHY versioning */
3007 tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
3008 analog_type = (tmp & B43legacy_PHYVER_ANALOG)
3009 >> B43legacy_PHYVER_ANALOG_SHIFT;
3010 phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
3011 phy_rev = (tmp & B43legacy_PHYVER_VERSION);
3012 switch (phy_type) {
3013 case B43legacy_PHYTYPE_B:
3014 if (phy_rev != 2 && phy_rev != 4
3015 && phy_rev != 6 && phy_rev != 7)
3016 unsupported = 1;
3017 break;
3018 case B43legacy_PHYTYPE_G:
3019 if (phy_rev > 8)
3020 unsupported = 1;
3021 break;
3022 default:
3023 unsupported = 1;
3024 }
3025 if (unsupported) {
3026 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
3027 "(Analog %u, Type %u, Revision %u)\n",
3028 analog_type, phy_type, phy_rev);
3029 return -EOPNOTSUPP;
3030 }
3031 b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
3032 analog_type, phy_type, phy_rev);
3033
3034
3035 /* Get RADIO versioning */
3036 if (dev->dev->bus->chip_id == 0x4317) {
3037 if (dev->dev->bus->chip_rev == 0)
3038 tmp = 0x3205017F;
3039 else if (dev->dev->bus->chip_rev == 1)
3040 tmp = 0x4205017F;
3041 else
3042 tmp = 0x5205017F;
3043 } else {
3044 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3045 B43legacy_RADIOCTL_ID);
3046 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
3047 tmp <<= 16;
3048 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3049 B43legacy_RADIOCTL_ID);
3050 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
3051 }
3052 radio_manuf = (tmp & 0x00000FFF);
3053 radio_ver = (tmp & 0x0FFFF000) >> 12;
3054 radio_rev = (tmp & 0xF0000000) >> 28;
3055 switch (phy_type) {
3056 case B43legacy_PHYTYPE_B:
3057 if ((radio_ver & 0xFFF0) != 0x2050)
3058 unsupported = 1;
3059 break;
3060 case B43legacy_PHYTYPE_G:
3061 if (radio_ver != 0x2050)
3062 unsupported = 1;
3063 break;
3064 default:
3065 B43legacy_BUG_ON(1);
3066 }
3067 if (unsupported) {
3068 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
3069 "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
3070 radio_manuf, radio_ver, radio_rev);
3071 return -EOPNOTSUPP;
3072 }
3073 b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
3074 " Revision %u\n", radio_manuf, radio_ver, radio_rev);
3075
3076
3077 phy->radio_manuf = radio_manuf;
3078 phy->radio_ver = radio_ver;
3079 phy->radio_rev = radio_rev;
3080
3081 phy->analog = analog_type;
3082 phy->type = phy_type;
3083 phy->rev = phy_rev;
3084
3085 return 0;
3086 }
3087
3088 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
3089 struct b43legacy_phy *phy)
3090 {
3091 struct b43legacy_lopair *lo;
3092 int i;
3093
3094 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3095 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3096
3097 /* Assume the radio is enabled. If it's not enabled, the state will
3098 * immediately get fixed on the first periodic work run. */
3099 dev->radio_hw_enable = true;
3100
3101 phy->savedpctlreg = 0xFFFF;
3102 phy->aci_enable = false;
3103 phy->aci_wlan_automatic = false;
3104 phy->aci_hw_rssi = false;
3105
3106 lo = phy->_lo_pairs;
3107 if (lo)
3108 memset(lo, 0, sizeof(struct b43legacy_lopair) *
3109 B43legacy_LO_COUNT);
3110 phy->max_lb_gain = 0;
3111 phy->trsw_rx_gain = 0;
3112
3113 /* Set default attenuation values. */
3114 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3115 phy->rfatt = b43legacy_default_radio_attenuation(dev);
3116 phy->txctl1 = b43legacy_default_txctl1(dev);
3117 phy->txpwr_offset = 0;
3118
3119 /* NRSSI */
3120 phy->nrssislope = 0;
3121 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3122 phy->nrssi[i] = -1000;
3123 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3124 phy->nrssi_lt[i] = i;
3125
3126 phy->lofcal = 0xFFFF;
3127 phy->initval = 0xFFFF;
3128
3129 phy->interfmode = B43legacy_INTERFMODE_NONE;
3130 phy->channel = 0xFF;
3131 }
3132
3133 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
3134 {
3135 /* Flags */
3136 dev->dfq_valid = false;
3137
3138 /* Stats */
3139 memset(&dev->stats, 0, sizeof(dev->stats));
3140
3141 setup_struct_phy_for_init(dev, &dev->phy);
3142
3143 /* IRQ related flags */
3144 dev->irq_reason = 0;
3145 memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
3146 dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE;
3147
3148 dev->mac_suspended = 1;
3149
3150 /* Noise calculation context */
3151 memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
3152 }
3153
3154 static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev,
3155 bool idle) {
3156 u16 pu_delay = 1050;
3157
3158 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle)
3159 pu_delay = 500;
3160 if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8))
3161 pu_delay = max(pu_delay, (u16)2400);
3162
3163 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3164 B43legacy_SHM_SH_SPUWKUP, pu_delay);
3165 }
3166
3167 /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
3168 static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev)
3169 {
3170 u16 pretbtt;
3171
3172 /* The time value is in microseconds. */
3173 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
3174 pretbtt = 2;
3175 else
3176 pretbtt = 250;
3177 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3178 B43legacy_SHM_SH_PRETBTT, pretbtt);
3179 b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt);
3180 }
3181
3182 /* Shutdown a wireless core */
3183 /* Locking: wl->mutex */
3184 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3185 {
3186 struct b43legacy_phy *phy = &dev->phy;
3187 u32 macctl;
3188
3189 B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3190 if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3191 return;
3192 b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3193
3194 /* Stop the microcode PSM. */
3195 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
3196 macctl &= ~B43legacy_MACCTL_PSM_RUN;
3197 macctl |= B43legacy_MACCTL_PSM_JMP0;
3198 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3199
3200 b43legacy_leds_exit(dev);
3201 b43legacy_rng_exit(dev->wl);
3202 b43legacy_pio_free(dev);
3203 b43legacy_dma_free(dev);
3204 b43legacy_chip_exit(dev);
3205 b43legacy_radio_turn_off(dev, 1);
3206 b43legacy_switch_analog(dev, 0);
3207 if (phy->dyn_tssi_tbl)
3208 kfree(phy->tssi2dbm);
3209 kfree(phy->lo_control);
3210 phy->lo_control = NULL;
3211 if (dev->wl->current_beacon) {
3212 dev_kfree_skb_any(dev->wl->current_beacon);
3213 dev->wl->current_beacon = NULL;
3214 }
3215
3216 ssb_device_disable(dev->dev, 0);
3217 ssb_bus_may_powerdown(dev->dev->bus);
3218 }
3219
3220 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3221 {
3222 struct b43legacy_phy *phy = &dev->phy;
3223 int i;
3224
3225 /* Set default attenuation values. */
3226 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3227 phy->rfatt = b43legacy_default_radio_attenuation(dev);
3228 phy->txctl1 = b43legacy_default_txctl1(dev);
3229 phy->txctl2 = 0xFFFF;
3230 phy->txpwr_offset = 0;
3231
3232 /* NRSSI */
3233 phy->nrssislope = 0;
3234 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3235 phy->nrssi[i] = -1000;
3236 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3237 phy->nrssi_lt[i] = i;
3238
3239 phy->lofcal = 0xFFFF;
3240 phy->initval = 0xFFFF;
3241
3242 phy->aci_enable = false;
3243 phy->aci_wlan_automatic = false;
3244 phy->aci_hw_rssi = false;
3245
3246 phy->antenna_diversity = 0xFFFF;
3247 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3248 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3249
3250 /* Flags */
3251 phy->calibrated = 0;
3252
3253 if (phy->_lo_pairs)
3254 memset(phy->_lo_pairs, 0,
3255 sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3256 memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3257 }
3258
3259 /* Initialize a wireless core */
3260 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3261 {
3262 struct b43legacy_wl *wl = dev->wl;
3263 struct ssb_bus *bus = dev->dev->bus;
3264 struct b43legacy_phy *phy = &dev->phy;
3265 struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3266 int err;
3267 u32 hf;
3268 u32 tmp;
3269
3270 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3271
3272 err = ssb_bus_powerup(bus, 0);
3273 if (err)
3274 goto out;
3275 if (!ssb_device_is_enabled(dev->dev)) {
3276 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3277 b43legacy_wireless_core_reset(dev, tmp);
3278 }
3279
3280 if ((phy->type == B43legacy_PHYTYPE_B) ||
3281 (phy->type == B43legacy_PHYTYPE_G)) {
3282 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3283 * B43legacy_LO_COUNT,
3284 GFP_KERNEL);
3285 if (!phy->_lo_pairs)
3286 return -ENOMEM;
3287 }
3288 setup_struct_wldev_for_init(dev);
3289
3290 err = b43legacy_phy_init_tssi2dbm_table(dev);
3291 if (err)
3292 goto err_kfree_lo_control;
3293
3294 /* Enable IRQ routing to this device. */
3295 ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3296
3297 prepare_phy_data_for_init(dev);
3298 b43legacy_phy_calibrate(dev);
3299 err = b43legacy_chip_init(dev);
3300 if (err)
3301 goto err_kfree_tssitbl;
3302 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3303 B43legacy_SHM_SH_WLCOREREV,
3304 dev->dev->id.revision);
3305 hf = b43legacy_hf_read(dev);
3306 if (phy->type == B43legacy_PHYTYPE_G) {
3307 hf |= B43legacy_HF_SYMW;
3308 if (phy->rev == 1)
3309 hf |= B43legacy_HF_GDCW;
3310 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3311 hf |= B43legacy_HF_OFDMPABOOST;
3312 } else if (phy->type == B43legacy_PHYTYPE_B) {
3313 hf |= B43legacy_HF_SYMW;
3314 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3315 hf &= ~B43legacy_HF_GDCW;
3316 }
3317 b43legacy_hf_write(dev, hf);
3318
3319 b43legacy_set_retry_limits(dev,
3320 B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3321 B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3322
3323 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3324 0x0044, 3);
3325 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3326 0x0046, 2);
3327
3328 /* Disable sending probe responses from firmware.
3329 * Setting the MaxTime to one usec will always trigger
3330 * a timeout, so we never send any probe resp.
3331 * A timeout of zero is infinite. */
3332 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3333 B43legacy_SHM_SH_PRMAXTIME, 1);
3334
3335 b43legacy_rate_memory_init(dev);
3336
3337 /* Minimum Contention Window */
3338 if (phy->type == B43legacy_PHYTYPE_B)
3339 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3340 0x0003, 31);
3341 else
3342 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3343 0x0003, 15);
3344 /* Maximum Contention Window */
3345 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3346 0x0004, 1023);
3347
3348 do {
3349 if (b43legacy_using_pio(dev))
3350 err = b43legacy_pio_init(dev);
3351 else {
3352 err = b43legacy_dma_init(dev);
3353 if (!err)
3354 b43legacy_qos_init(dev);
3355 }
3356 } while (err == -EAGAIN);
3357 if (err)
3358 goto err_chip_exit;
3359
3360 b43legacy_set_synth_pu_delay(dev, 1);
3361
3362 ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3363 b43legacy_upload_card_macaddress(dev);
3364 b43legacy_security_init(dev);
3365 b43legacy_rng_init(wl);
3366
3367 ieee80211_wake_queues(dev->wl->hw);
3368 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3369
3370 b43legacy_leds_init(dev);
3371 out:
3372 return err;
3373
3374 err_chip_exit:
3375 b43legacy_chip_exit(dev);
3376 err_kfree_tssitbl:
3377 if (phy->dyn_tssi_tbl)
3378 kfree(phy->tssi2dbm);
3379 err_kfree_lo_control:
3380 kfree(phy->lo_control);
3381 phy->lo_control = NULL;
3382 ssb_bus_may_powerdown(bus);
3383 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3384 return err;
3385 }
3386
3387 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3388 struct ieee80211_vif *vif)
3389 {
3390 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3391 struct b43legacy_wldev *dev;
3392 unsigned long flags;
3393 int err = -EOPNOTSUPP;
3394
3395 /* TODO: allow WDS/AP devices to coexist */
3396
3397 if (vif->type != NL80211_IFTYPE_AP &&
3398 vif->type != NL80211_IFTYPE_STATION &&
3399 vif->type != NL80211_IFTYPE_WDS &&
3400 vif->type != NL80211_IFTYPE_ADHOC)
3401 return -EOPNOTSUPP;
3402
3403 mutex_lock(&wl->mutex);
3404 if (wl->operating)
3405 goto out_mutex_unlock;
3406
3407 b43legacydbg(wl, "Adding Interface type %d\n", vif->type);
3408
3409 dev = wl->current_dev;
3410 wl->operating = true;
3411 wl->vif = vif;
3412 wl->if_type = vif->type;
3413 memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
3414
3415 spin_lock_irqsave(&wl->irq_lock, flags);
3416 b43legacy_adjust_opmode(dev);
3417 b43legacy_set_pretbtt(dev);
3418 b43legacy_set_synth_pu_delay(dev, 0);
3419 b43legacy_upload_card_macaddress(dev);
3420 spin_unlock_irqrestore(&wl->irq_lock, flags);
3421
3422 err = 0;
3423 out_mutex_unlock:
3424 mutex_unlock(&wl->mutex);
3425
3426 return err;
3427 }
3428
3429 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3430 struct ieee80211_vif *vif)
3431 {
3432 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3433 struct b43legacy_wldev *dev = wl->current_dev;
3434 unsigned long flags;
3435
3436 b43legacydbg(wl, "Removing Interface type %d\n", vif->type);
3437
3438 mutex_lock(&wl->mutex);
3439
3440 B43legacy_WARN_ON(!wl->operating);
3441 B43legacy_WARN_ON(wl->vif != vif);
3442 wl->vif = NULL;
3443
3444 wl->operating = false;
3445
3446 spin_lock_irqsave(&wl->irq_lock, flags);
3447 b43legacy_adjust_opmode(dev);
3448 memset(wl->mac_addr, 0, ETH_ALEN);
3449 b43legacy_upload_card_macaddress(dev);
3450 spin_unlock_irqrestore(&wl->irq_lock, flags);
3451
3452 mutex_unlock(&wl->mutex);
3453 }
3454
3455 static int b43legacy_op_start(struct ieee80211_hw *hw)
3456 {
3457 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3458 struct b43legacy_wldev *dev = wl->current_dev;
3459 int did_init = 0;
3460 int err = 0;
3461
3462 /* Kill all old instance specific information to make sure
3463 * the card won't use it in the short timeframe between start
3464 * and mac80211 reconfiguring it. */
3465 memset(wl->bssid, 0, ETH_ALEN);
3466 memset(wl->mac_addr, 0, ETH_ALEN);
3467 wl->filter_flags = 0;
3468 wl->beacon0_uploaded = false;
3469 wl->beacon1_uploaded = false;
3470 wl->beacon_templates_virgin = true;
3471 wl->radio_enabled = true;
3472
3473 mutex_lock(&wl->mutex);
3474
3475 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3476 err = b43legacy_wireless_core_init(dev);
3477 if (err)
3478 goto out_mutex_unlock;
3479 did_init = 1;
3480 }
3481
3482 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3483 err = b43legacy_wireless_core_start(dev);
3484 if (err) {
3485 if (did_init)
3486 b43legacy_wireless_core_exit(dev);
3487 goto out_mutex_unlock;
3488 }
3489 }
3490
3491 wiphy_rfkill_start_polling(hw->wiphy);
3492
3493 out_mutex_unlock:
3494 mutex_unlock(&wl->mutex);
3495
3496 return err;
3497 }
3498
3499 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3500 {
3501 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3502 struct b43legacy_wldev *dev = wl->current_dev;
3503
3504 cancel_work_sync(&(wl->beacon_update_trigger));
3505
3506 mutex_lock(&wl->mutex);
3507 if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3508 b43legacy_wireless_core_stop(dev);
3509 b43legacy_wireless_core_exit(dev);
3510 wl->radio_enabled = false;
3511 mutex_unlock(&wl->mutex);
3512 }
3513
3514 static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw,
3515 struct ieee80211_sta *sta, bool set)
3516 {
3517 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3518 unsigned long flags;
3519
3520 spin_lock_irqsave(&wl->irq_lock, flags);
3521 b43legacy_update_templates(wl);
3522 spin_unlock_irqrestore(&wl->irq_lock, flags);
3523
3524 return 0;
3525 }
3526
3527 static int b43legacy_op_get_survey(struct ieee80211_hw *hw, int idx,
3528 struct survey_info *survey)
3529 {
3530 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3531 struct b43legacy_wldev *dev = wl->current_dev;
3532 struct ieee80211_conf *conf = &hw->conf;
3533
3534 if (idx != 0)
3535 return -ENOENT;
3536
3537 survey->channel = conf->channel;
3538 survey->filled = SURVEY_INFO_NOISE_DBM;
3539 survey->noise = dev->stats.link_noise;
3540
3541 return 0;
3542 }
3543
3544 static const struct ieee80211_ops b43legacy_hw_ops = {
3545 .tx = b43legacy_op_tx,
3546 .conf_tx = b43legacy_op_conf_tx,
3547 .add_interface = b43legacy_op_add_interface,
3548 .remove_interface = b43legacy_op_remove_interface,
3549 .config = b43legacy_op_dev_config,
3550 .bss_info_changed = b43legacy_op_bss_info_changed,
3551 .configure_filter = b43legacy_op_configure_filter,
3552 .get_stats = b43legacy_op_get_stats,
3553 .start = b43legacy_op_start,
3554 .stop = b43legacy_op_stop,
3555 .set_tim = b43legacy_op_beacon_set_tim,
3556 .get_survey = b43legacy_op_get_survey,
3557 .rfkill_poll = b43legacy_rfkill_poll,
3558 };
3559
3560 /* Hard-reset the chip. Do not call this directly.
3561 * Use b43legacy_controller_restart()
3562 */
3563 static void b43legacy_chip_reset(struct work_struct *work)
3564 {
3565 struct b43legacy_wldev *dev =
3566 container_of(work, struct b43legacy_wldev, restart_work);
3567 struct b43legacy_wl *wl = dev->wl;
3568 int err = 0;
3569 int prev_status;
3570
3571 mutex_lock(&wl->mutex);
3572
3573 prev_status = b43legacy_status(dev);
3574 /* Bring the device down... */
3575 if (prev_status >= B43legacy_STAT_STARTED)
3576 b43legacy_wireless_core_stop(dev);
3577 if (prev_status >= B43legacy_STAT_INITIALIZED)
3578 b43legacy_wireless_core_exit(dev);
3579
3580 /* ...and up again. */
3581 if (prev_status >= B43legacy_STAT_INITIALIZED) {
3582 err = b43legacy_wireless_core_init(dev);
3583 if (err)
3584 goto out;
3585 }
3586 if (prev_status >= B43legacy_STAT_STARTED) {
3587 err = b43legacy_wireless_core_start(dev);
3588 if (err) {
3589 b43legacy_wireless_core_exit(dev);
3590 goto out;
3591 }
3592 }
3593 out:
3594 if (err)
3595 wl->current_dev = NULL; /* Failed to init the dev. */
3596 mutex_unlock(&wl->mutex);
3597 if (err)
3598 b43legacyerr(wl, "Controller restart FAILED\n");
3599 else
3600 b43legacyinfo(wl, "Controller restarted\n");
3601 }
3602
3603 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3604 int have_bphy,
3605 int have_gphy)
3606 {
3607 struct ieee80211_hw *hw = dev->wl->hw;
3608 struct b43legacy_phy *phy = &dev->phy;
3609
3610 phy->possible_phymodes = 0;
3611 if (have_bphy) {
3612 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3613 &b43legacy_band_2GHz_BPHY;
3614 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3615 }
3616
3617 if (have_gphy) {
3618 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3619 &b43legacy_band_2GHz_GPHY;
3620 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3621 }
3622
3623 return 0;
3624 }
3625
3626 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3627 {
3628 /* We release firmware that late to not be required to re-request
3629 * is all the time when we reinit the core. */
3630 b43legacy_release_firmware(dev);
3631 }
3632
3633 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3634 {
3635 struct b43legacy_wl *wl = dev->wl;
3636 struct ssb_bus *bus = dev->dev->bus;
3637 struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
3638 int err;
3639 int have_bphy = 0;
3640 int have_gphy = 0;
3641 u32 tmp;
3642
3643 /* Do NOT do any device initialization here.
3644 * Do it in wireless_core_init() instead.
3645 * This function is for gathering basic information about the HW, only.
3646 * Also some structs may be set up here. But most likely you want to
3647 * have that in core_init(), too.
3648 */
3649
3650 err = ssb_bus_powerup(bus, 0);
3651 if (err) {
3652 b43legacyerr(wl, "Bus powerup failed\n");
3653 goto out;
3654 }
3655 /* Get the PHY type. */
3656 if (dev->dev->id.revision >= 5) {
3657 u32 tmshigh;
3658
3659 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3660 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3661 if (!have_gphy)
3662 have_bphy = 1;
3663 } else if (dev->dev->id.revision == 4)
3664 have_gphy = 1;
3665 else
3666 have_bphy = 1;
3667
3668 dev->phy.gmode = (have_gphy || have_bphy);
3669 dev->phy.radio_on = true;
3670 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3671 b43legacy_wireless_core_reset(dev, tmp);
3672
3673 err = b43legacy_phy_versioning(dev);
3674 if (err)
3675 goto err_powerdown;
3676 /* Check if this device supports multiband. */
3677 if (!pdev ||
3678 (pdev->device != 0x4312 &&
3679 pdev->device != 0x4319 &&
3680 pdev->device != 0x4324)) {
3681 /* No multiband support. */
3682 have_bphy = 0;
3683 have_gphy = 0;
3684 switch (dev->phy.type) {
3685 case B43legacy_PHYTYPE_B:
3686 have_bphy = 1;
3687 break;
3688 case B43legacy_PHYTYPE_G:
3689 have_gphy = 1;
3690 break;
3691 default:
3692 B43legacy_BUG_ON(1);
3693 }
3694 }
3695 dev->phy.gmode = (have_gphy || have_bphy);
3696 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3697 b43legacy_wireless_core_reset(dev, tmp);
3698
3699 err = b43legacy_validate_chipaccess(dev);
3700 if (err)
3701 goto err_powerdown;
3702 err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3703 if (err)
3704 goto err_powerdown;
3705
3706 /* Now set some default "current_dev" */
3707 if (!wl->current_dev)
3708 wl->current_dev = dev;
3709 INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3710
3711 b43legacy_radio_turn_off(dev, 1);
3712 b43legacy_switch_analog(dev, 0);
3713 ssb_device_disable(dev->dev, 0);
3714 ssb_bus_may_powerdown(bus);
3715
3716 out:
3717 return err;
3718
3719 err_powerdown:
3720 ssb_bus_may_powerdown(bus);
3721 return err;
3722 }
3723
3724 static void b43legacy_one_core_detach(struct ssb_device *dev)
3725 {
3726 struct b43legacy_wldev *wldev;
3727 struct b43legacy_wl *wl;
3728
3729 /* Do not cancel ieee80211-workqueue based work here.
3730 * See comment in b43legacy_remove(). */
3731
3732 wldev = ssb_get_drvdata(dev);
3733 wl = wldev->wl;
3734 b43legacy_debugfs_remove_device(wldev);
3735 b43legacy_wireless_core_detach(wldev);
3736 list_del(&wldev->list);
3737 wl->nr_devs--;
3738 ssb_set_drvdata(dev, NULL);
3739 kfree(wldev);
3740 }
3741
3742 static int b43legacy_one_core_attach(struct ssb_device *dev,
3743 struct b43legacy_wl *wl)
3744 {
3745 struct b43legacy_wldev *wldev;
3746 int err = -ENOMEM;
3747
3748 wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3749 if (!wldev)
3750 goto out;
3751
3752 wldev->dev = dev;
3753 wldev->wl = wl;
3754 b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3755 wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3756 tasklet_init(&wldev->isr_tasklet,
3757 (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3758 (unsigned long)wldev);
3759 if (modparam_pio)
3760 wldev->__using_pio = true;
3761 INIT_LIST_HEAD(&wldev->list);
3762
3763 err = b43legacy_wireless_core_attach(wldev);
3764 if (err)
3765 goto err_kfree_wldev;
3766
3767 list_add(&wldev->list, &wl->devlist);
3768 wl->nr_devs++;
3769 ssb_set_drvdata(dev, wldev);
3770 b43legacy_debugfs_add_device(wldev);
3771 out:
3772 return err;
3773
3774 err_kfree_wldev:
3775 kfree(wldev);
3776 return err;
3777 }
3778
3779 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3780 {
3781 /* boardflags workarounds */
3782 if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3783 bus->boardinfo.type == 0x4E &&
3784 bus->boardinfo.rev > 0x40)
3785 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3786 }
3787
3788 static void b43legacy_wireless_exit(struct ssb_device *dev,
3789 struct b43legacy_wl *wl)
3790 {
3791 struct ieee80211_hw *hw = wl->hw;
3792
3793 ssb_set_devtypedata(dev, NULL);
3794 ieee80211_free_hw(hw);
3795 }
3796
3797 static int b43legacy_wireless_init(struct ssb_device *dev)
3798 {
3799 struct ssb_sprom *sprom = &dev->bus->sprom;
3800 struct ieee80211_hw *hw;
3801 struct b43legacy_wl *wl;
3802 int err = -ENOMEM;
3803 int queue_num;
3804
3805 b43legacy_sprom_fixup(dev->bus);
3806
3807 hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3808 if (!hw) {
3809 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3810 goto out;
3811 }
3812
3813 /* fill hw info */
3814 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
3815 IEEE80211_HW_SIGNAL_DBM;
3816 hw->wiphy->interface_modes =
3817 BIT(NL80211_IFTYPE_AP) |
3818 BIT(NL80211_IFTYPE_STATION) |
3819 BIT(NL80211_IFTYPE_WDS) |
3820 BIT(NL80211_IFTYPE_ADHOC);
3821 hw->queues = 1; /* FIXME: hardware has more queues */
3822 hw->max_rates = 2;
3823 SET_IEEE80211_DEV(hw, dev->dev);
3824 if (is_valid_ether_addr(sprom->et1mac))
3825 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3826 else
3827 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3828
3829 /* Get and initialize struct b43legacy_wl */
3830 wl = hw_to_b43legacy_wl(hw);
3831 memset(wl, 0, sizeof(*wl));
3832 wl->hw = hw;
3833 spin_lock_init(&wl->irq_lock);
3834 spin_lock_init(&wl->leds_lock);
3835 mutex_init(&wl->mutex);
3836 INIT_LIST_HEAD(&wl->devlist);
3837 INIT_WORK(&wl->beacon_update_trigger, b43legacy_beacon_update_trigger_work);
3838 INIT_WORK(&wl->tx_work, b43legacy_tx_work);
3839
3840 /* Initialize queues and flags. */
3841 for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
3842 skb_queue_head_init(&wl->tx_queue[queue_num]);
3843 wl->tx_queue_stopped[queue_num] = 0;
3844 }
3845
3846 ssb_set_devtypedata(dev, wl);
3847 b43legacyinfo(wl, "Broadcom %04X WLAN found (core revision %u)\n",
3848 dev->bus->chip_id, dev->id.revision);
3849 err = 0;
3850 out:
3851 return err;
3852 }
3853
3854 static int b43legacy_probe(struct ssb_device *dev,
3855 const struct ssb_device_id *id)
3856 {
3857 struct b43legacy_wl *wl;
3858 int err;
3859 int first = 0;
3860
3861 wl = ssb_get_devtypedata(dev);
3862 if (!wl) {
3863 /* Probing the first core - setup common struct b43legacy_wl */
3864 first = 1;
3865 err = b43legacy_wireless_init(dev);
3866 if (err)
3867 goto out;
3868 wl = ssb_get_devtypedata(dev);
3869 B43legacy_WARN_ON(!wl);
3870 }
3871 err = b43legacy_one_core_attach(dev, wl);
3872 if (err)
3873 goto err_wireless_exit;
3874
3875 /* setup and start work to load firmware */
3876 INIT_WORK(&wl->firmware_load, b43legacy_request_firmware);
3877 schedule_work(&wl->firmware_load);
3878
3879 out:
3880 return err;
3881
3882 err_wireless_exit:
3883 if (first)
3884 b43legacy_wireless_exit(dev, wl);
3885 return err;
3886 }
3887
3888 static void b43legacy_remove(struct ssb_device *dev)
3889 {
3890 struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3891 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3892
3893 /* We must cancel any work here before unregistering from ieee80211,
3894 * as the ieee80211 unreg will destroy the workqueue. */
3895 cancel_work_sync(&wldev->restart_work);
3896 cancel_work_sync(&wl->firmware_load);
3897
3898 B43legacy_WARN_ON(!wl);
3899 if (wl->current_dev == wldev)
3900 ieee80211_unregister_hw(wl->hw);
3901
3902 b43legacy_one_core_detach(dev);
3903
3904 if (list_empty(&wl->devlist))
3905 /* Last core on the chip unregistered.
3906 * We can destroy common struct b43legacy_wl.
3907 */
3908 b43legacy_wireless_exit(dev, wl);
3909 }
3910
3911 /* Perform a hardware reset. This can be called from any context. */
3912 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3913 const char *reason)
3914 {
3915 /* Must avoid requeueing, if we are in shutdown. */
3916 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3917 return;
3918 b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3919 ieee80211_queue_work(dev->wl->hw, &dev->restart_work);
3920 }
3921
3922 #ifdef CONFIG_PM
3923
3924 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3925 {
3926 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3927 struct b43legacy_wl *wl = wldev->wl;
3928
3929 b43legacydbg(wl, "Suspending...\n");
3930
3931 mutex_lock(&wl->mutex);
3932 wldev->suspend_init_status = b43legacy_status(wldev);
3933 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3934 b43legacy_wireless_core_stop(wldev);
3935 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3936 b43legacy_wireless_core_exit(wldev);
3937 mutex_unlock(&wl->mutex);
3938
3939 b43legacydbg(wl, "Device suspended.\n");
3940
3941 return 0;
3942 }
3943
3944 static int b43legacy_resume(struct ssb_device *dev)
3945 {
3946 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3947 struct b43legacy_wl *wl = wldev->wl;
3948 int err = 0;
3949
3950 b43legacydbg(wl, "Resuming...\n");
3951
3952 mutex_lock(&wl->mutex);
3953 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3954 err = b43legacy_wireless_core_init(wldev);
3955 if (err) {
3956 b43legacyerr(wl, "Resume failed at core init\n");
3957 goto out;
3958 }
3959 }
3960 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3961 err = b43legacy_wireless_core_start(wldev);
3962 if (err) {
3963 b43legacy_wireless_core_exit(wldev);
3964 b43legacyerr(wl, "Resume failed at core start\n");
3965 goto out;
3966 }
3967 }
3968
3969 b43legacydbg(wl, "Device resumed.\n");
3970 out:
3971 mutex_unlock(&wl->mutex);
3972 return err;
3973 }
3974
3975 #else /* CONFIG_PM */
3976 # define b43legacy_suspend NULL
3977 # define b43legacy_resume NULL
3978 #endif /* CONFIG_PM */
3979
3980 static struct ssb_driver b43legacy_ssb_driver = {
3981 .name = KBUILD_MODNAME,
3982 .id_table = b43legacy_ssb_tbl,
3983 .probe = b43legacy_probe,
3984 .remove = b43legacy_remove,
3985 .suspend = b43legacy_suspend,
3986 .resume = b43legacy_resume,
3987 };
3988
3989 static void b43legacy_print_driverinfo(void)
3990 {
3991 const char *feat_pci = "", *feat_leds = "",
3992 *feat_pio = "", *feat_dma = "";
3993
3994 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
3995 feat_pci = "P";
3996 #endif
3997 #ifdef CONFIG_B43LEGACY_LEDS
3998 feat_leds = "L";
3999 #endif
4000 #ifdef CONFIG_B43LEGACY_PIO
4001 feat_pio = "I";
4002 #endif
4003 #ifdef CONFIG_B43LEGACY_DMA
4004 feat_dma = "D";
4005 #endif
4006 printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
4007 "[ Features: %s%s%s%s ]\n",
4008 feat_pci, feat_leds, feat_pio, feat_dma);
4009 }
4010
4011 static int __init b43legacy_init(void)
4012 {
4013 int err;
4014
4015 b43legacy_debugfs_init();
4016
4017 err = ssb_driver_register(&b43legacy_ssb_driver);
4018 if (err)
4019 goto err_dfs_exit;
4020
4021 b43legacy_print_driverinfo();
4022
4023 return err;
4024
4025 err_dfs_exit:
4026 b43legacy_debugfs_exit();
4027 return err;
4028 }
4029
4030 static void __exit b43legacy_exit(void)
4031 {
4032 ssb_driver_unregister(&b43legacy_ssb_driver);
4033 b43legacy_debugfs_exit();
4034 }
4035
4036 module_init(b43legacy_init)
4037 module_exit(b43legacy_exit)
Linux kernel - Deliverables
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