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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6
[deliverable/linux.git] / drivers / net / wireless / b43legacy / main.c
1 /*
2 *
3 * Broadcom B43legacy wireless driver
4 *
5 * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6 * Copyright (c) 2005-2007 Stefano Brivio <stefano.brivio@polimi.it>
7 * Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
8 * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10 * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
11 *
12 * Some parts of the code in this file are derived from the ipw2200
13 * driver Copyright(c) 2003 - 2004 Intel Corporation.
14
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; see the file COPYING. If not, write to
27 * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
28 * Boston, MA 02110-1301, USA.
29 *
30 */
31
32 #include <linux/delay.h>
33 #include <linux/init.h>
34 #include <linux/moduleparam.h>
35 #include <linux/if_arp.h>
36 #include <linux/etherdevice.h>
37 #include <linux/version.h>
38 #include <linux/firmware.h>
39 #include <linux/wireless.h>
40 #include <linux/workqueue.h>
41 #include <linux/skbuff.h>
42 #include <linux/dma-mapping.h>
43 #include <net/dst.h>
44 #include <asm/unaligned.h>
45
46 #include "b43legacy.h"
47 #include "main.h"
48 #include "debugfs.h"
49 #include "phy.h"
50 #include "dma.h"
51 #include "pio.h"
52 #include "sysfs.h"
53 #include "xmit.h"
54 #include "radio.h"
55
56
57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
58 MODULE_AUTHOR("Martin Langer");
59 MODULE_AUTHOR("Stefano Brivio");
60 MODULE_AUTHOR("Michael Buesch");
61 MODULE_LICENSE("GPL");
62
63 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
64 static int modparam_pio;
65 module_param_named(pio, modparam_pio, int, 0444);
66 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
67 #elif defined(CONFIG_B43LEGACY_DMA)
68 # define modparam_pio 0
69 #elif defined(CONFIG_B43LEGACY_PIO)
70 # define modparam_pio 1
71 #endif
72
73 static int modparam_bad_frames_preempt;
74 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
75 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
76 " Preemption");
77
78 static char modparam_fwpostfix[16];
79 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
80 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
81
82 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
83 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
84 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
85 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
86 SSB_DEVTABLE_END
87 };
88 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
89
90
91 /* Channel and ratetables are shared for all devices.
92 * They can't be const, because ieee80211 puts some precalculated
93 * data in there. This data is the same for all devices, so we don't
94 * get concurrency issues */
95 #define RATETAB_ENT(_rateid, _flags) \
96 { \
97 .rate = B43legacy_RATE_TO_100KBPS(_rateid), \
98 .val = (_rateid), \
99 .val2 = (_rateid), \
100 .flags = (_flags), \
101 }
102 static struct ieee80211_rate __b43legacy_ratetable[] = {
103 RATETAB_ENT(B43legacy_CCK_RATE_1MB, IEEE80211_RATE_CCK),
104 RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_CCK_2),
105 RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_CCK_2),
106 RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_CCK_2),
107 RATETAB_ENT(B43legacy_OFDM_RATE_6MB, IEEE80211_RATE_OFDM),
108 RATETAB_ENT(B43legacy_OFDM_RATE_9MB, IEEE80211_RATE_OFDM),
109 RATETAB_ENT(B43legacy_OFDM_RATE_12MB, IEEE80211_RATE_OFDM),
110 RATETAB_ENT(B43legacy_OFDM_RATE_18MB, IEEE80211_RATE_OFDM),
111 RATETAB_ENT(B43legacy_OFDM_RATE_24MB, IEEE80211_RATE_OFDM),
112 RATETAB_ENT(B43legacy_OFDM_RATE_36MB, IEEE80211_RATE_OFDM),
113 RATETAB_ENT(B43legacy_OFDM_RATE_48MB, IEEE80211_RATE_OFDM),
114 RATETAB_ENT(B43legacy_OFDM_RATE_54MB, IEEE80211_RATE_OFDM),
115 };
116 #define b43legacy_a_ratetable (__b43legacy_ratetable + 4)
117 #define b43legacy_a_ratetable_size 8
118 #define b43legacy_b_ratetable (__b43legacy_ratetable + 0)
119 #define b43legacy_b_ratetable_size 4
120 #define b43legacy_g_ratetable (__b43legacy_ratetable + 0)
121 #define b43legacy_g_ratetable_size 12
122
123 #define CHANTAB_ENT(_chanid, _freq) \
124 { \
125 .chan = (_chanid), \
126 .freq = (_freq), \
127 .val = (_chanid), \
128 .flag = IEEE80211_CHAN_W_SCAN | \
129 IEEE80211_CHAN_W_ACTIVE_SCAN | \
130 IEEE80211_CHAN_W_IBSS, \
131 .power_level = 0x0A, \
132 .antenna_max = 0xFF, \
133 }
134 static struct ieee80211_channel b43legacy_bg_chantable[] = {
135 CHANTAB_ENT(1, 2412),
136 CHANTAB_ENT(2, 2417),
137 CHANTAB_ENT(3, 2422),
138 CHANTAB_ENT(4, 2427),
139 CHANTAB_ENT(5, 2432),
140 CHANTAB_ENT(6, 2437),
141 CHANTAB_ENT(7, 2442),
142 CHANTAB_ENT(8, 2447),
143 CHANTAB_ENT(9, 2452),
144 CHANTAB_ENT(10, 2457),
145 CHANTAB_ENT(11, 2462),
146 CHANTAB_ENT(12, 2467),
147 CHANTAB_ENT(13, 2472),
148 CHANTAB_ENT(14, 2484),
149 };
150 #define b43legacy_bg_chantable_size ARRAY_SIZE(b43legacy_bg_chantable)
151
152 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
153 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
154 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
155 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
156
157
158 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
159 {
160 if (!wl || !wl->current_dev)
161 return 1;
162 if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
163 return 1;
164 /* We are up and running.
165 * Ratelimit the messages to avoid DoS over the net. */
166 return net_ratelimit();
167 }
168
169 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
170 {
171 va_list args;
172
173 if (!b43legacy_ratelimit(wl))
174 return;
175 va_start(args, fmt);
176 printk(KERN_INFO "b43legacy-%s: ",
177 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
178 vprintk(fmt, args);
179 va_end(args);
180 }
181
182 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
183 {
184 va_list args;
185
186 if (!b43legacy_ratelimit(wl))
187 return;
188 va_start(args, fmt);
189 printk(KERN_ERR "b43legacy-%s ERROR: ",
190 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
191 vprintk(fmt, args);
192 va_end(args);
193 }
194
195 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
196 {
197 va_list args;
198
199 if (!b43legacy_ratelimit(wl))
200 return;
201 va_start(args, fmt);
202 printk(KERN_WARNING "b43legacy-%s warning: ",
203 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
204 vprintk(fmt, args);
205 va_end(args);
206 }
207
208 #if B43legacy_DEBUG
209 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
210 {
211 va_list args;
212
213 va_start(args, fmt);
214 printk(KERN_DEBUG "b43legacy-%s debug: ",
215 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
216 vprintk(fmt, args);
217 va_end(args);
218 }
219 #endif /* DEBUG */
220
221 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
222 u32 val)
223 {
224 u32 status;
225
226 B43legacy_WARN_ON(offset % 4 != 0);
227
228 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
229 if (status & B43legacy_MACCTL_BE)
230 val = swab32(val);
231
232 b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
233 mmiowb();
234 b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
235 }
236
237 static inline
238 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
239 u16 routing, u16 offset)
240 {
241 u32 control;
242
243 /* "offset" is the WORD offset. */
244
245 control = routing;
246 control <<= 16;
247 control |= offset;
248 b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
249 }
250
251 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
252 u16 routing, u16 offset)
253 {
254 u32 ret;
255
256 if (routing == B43legacy_SHM_SHARED) {
257 B43legacy_WARN_ON((offset & 0x0001) != 0);
258 if (offset & 0x0003) {
259 /* Unaligned access */
260 b43legacy_shm_control_word(dev, routing, offset >> 2);
261 ret = b43legacy_read16(dev,
262 B43legacy_MMIO_SHM_DATA_UNALIGNED);
263 ret <<= 16;
264 b43legacy_shm_control_word(dev, routing,
265 (offset >> 2) + 1);
266 ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
267
268 return ret;
269 }
270 offset >>= 2;
271 }
272 b43legacy_shm_control_word(dev, routing, offset);
273 ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
274
275 return ret;
276 }
277
278 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
279 u16 routing, u16 offset)
280 {
281 u16 ret;
282
283 if (routing == B43legacy_SHM_SHARED) {
284 B43legacy_WARN_ON((offset & 0x0001) != 0);
285 if (offset & 0x0003) {
286 /* Unaligned access */
287 b43legacy_shm_control_word(dev, routing, offset >> 2);
288 ret = b43legacy_read16(dev,
289 B43legacy_MMIO_SHM_DATA_UNALIGNED);
290
291 return ret;
292 }
293 offset >>= 2;
294 }
295 b43legacy_shm_control_word(dev, routing, offset);
296 ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
297
298 return ret;
299 }
300
301 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
302 u16 routing, u16 offset,
303 u32 value)
304 {
305 if (routing == B43legacy_SHM_SHARED) {
306 B43legacy_WARN_ON((offset & 0x0001) != 0);
307 if (offset & 0x0003) {
308 /* Unaligned access */
309 b43legacy_shm_control_word(dev, routing, offset >> 2);
310 mmiowb();
311 b43legacy_write16(dev,
312 B43legacy_MMIO_SHM_DATA_UNALIGNED,
313 (value >> 16) & 0xffff);
314 mmiowb();
315 b43legacy_shm_control_word(dev, routing,
316 (offset >> 2) + 1);
317 mmiowb();
318 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
319 value & 0xffff);
320 return;
321 }
322 offset >>= 2;
323 }
324 b43legacy_shm_control_word(dev, routing, offset);
325 mmiowb();
326 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
327 }
328
329 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
330 u16 value)
331 {
332 if (routing == B43legacy_SHM_SHARED) {
333 B43legacy_WARN_ON((offset & 0x0001) != 0);
334 if (offset & 0x0003) {
335 /* Unaligned access */
336 b43legacy_shm_control_word(dev, routing, offset >> 2);
337 mmiowb();
338 b43legacy_write16(dev,
339 B43legacy_MMIO_SHM_DATA_UNALIGNED,
340 value);
341 return;
342 }
343 offset >>= 2;
344 }
345 b43legacy_shm_control_word(dev, routing, offset);
346 mmiowb();
347 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
348 }
349
350 /* Read HostFlags */
351 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
352 {
353 u32 ret;
354
355 ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
356 B43legacy_SHM_SH_HOSTFHI);
357 ret <<= 16;
358 ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
359 B43legacy_SHM_SH_HOSTFLO);
360
361 return ret;
362 }
363
364 /* Write HostFlags */
365 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
366 {
367 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
368 B43legacy_SHM_SH_HOSTFLO,
369 (value & 0x0000FFFF));
370 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
371 B43legacy_SHM_SH_HOSTFHI,
372 ((value & 0xFFFF0000) >> 16));
373 }
374
375 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
376 {
377 /* We need to be careful. As we read the TSF from multiple
378 * registers, we should take care of register overflows.
379 * In theory, the whole tsf read process should be atomic.
380 * We try to be atomic here, by restaring the read process,
381 * if any of the high registers changed (overflew).
382 */
383 if (dev->dev->id.revision >= 3) {
384 u32 low;
385 u32 high;
386 u32 high2;
387
388 do {
389 high = b43legacy_read32(dev,
390 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
391 low = b43legacy_read32(dev,
392 B43legacy_MMIO_REV3PLUS_TSF_LOW);
393 high2 = b43legacy_read32(dev,
394 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
395 } while (unlikely(high != high2));
396
397 *tsf = high;
398 *tsf <<= 32;
399 *tsf |= low;
400 } else {
401 u64 tmp;
402 u16 v0;
403 u16 v1;
404 u16 v2;
405 u16 v3;
406 u16 test1;
407 u16 test2;
408 u16 test3;
409
410 do {
411 v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
412 v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
413 v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
414 v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
415
416 test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
417 test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
418 test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
419 } while (v3 != test3 || v2 != test2 || v1 != test1);
420
421 *tsf = v3;
422 *tsf <<= 48;
423 tmp = v2;
424 tmp <<= 32;
425 *tsf |= tmp;
426 tmp = v1;
427 tmp <<= 16;
428 *tsf |= tmp;
429 *tsf |= v0;
430 }
431 }
432
433 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
434 {
435 u32 status;
436
437 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
438 status |= B43legacy_MACCTL_TBTTHOLD;
439 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
440 mmiowb();
441 }
442
443 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
444 {
445 u32 status;
446
447 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
448 status &= ~B43legacy_MACCTL_TBTTHOLD;
449 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
450 }
451
452 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
453 {
454 /* Be careful with the in-progress timer.
455 * First zero out the low register, so we have a full
456 * register-overflow duration to complete the operation.
457 */
458 if (dev->dev->id.revision >= 3) {
459 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
460 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
461
462 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
463 mmiowb();
464 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
465 hi);
466 mmiowb();
467 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
468 lo);
469 } else {
470 u16 v0 = (tsf & 0x000000000000FFFFULL);
471 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
472 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
473 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
474
475 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
476 mmiowb();
477 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
478 mmiowb();
479 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
480 mmiowb();
481 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
482 mmiowb();
483 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
484 }
485 }
486
487 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
488 {
489 b43legacy_time_lock(dev);
490 b43legacy_tsf_write_locked(dev, tsf);
491 b43legacy_time_unlock(dev);
492 }
493
494 static
495 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
496 u16 offset, const u8 *mac)
497 {
498 static const u8 zero_addr[ETH_ALEN] = { 0 };
499 u16 data;
500
501 if (!mac)
502 mac = zero_addr;
503
504 offset |= 0x0020;
505 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
506
507 data = mac[0];
508 data |= mac[1] << 8;
509 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
510 data = mac[2];
511 data |= mac[3] << 8;
512 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
513 data = mac[4];
514 data |= mac[5] << 8;
515 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
516 }
517
518 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
519 {
520 static const u8 zero_addr[ETH_ALEN] = { 0 };
521 const u8 *mac = dev->wl->mac_addr;
522 const u8 *bssid = dev->wl->bssid;
523 u8 mac_bssid[ETH_ALEN * 2];
524 int i;
525 u32 tmp;
526
527 if (!bssid)
528 bssid = zero_addr;
529 if (!mac)
530 mac = zero_addr;
531
532 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
533
534 memcpy(mac_bssid, mac, ETH_ALEN);
535 memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
536
537 /* Write our MAC address and BSSID to template ram */
538 for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
539 tmp = (u32)(mac_bssid[i + 0]);
540 tmp |= (u32)(mac_bssid[i + 1]) << 8;
541 tmp |= (u32)(mac_bssid[i + 2]) << 16;
542 tmp |= (u32)(mac_bssid[i + 3]) << 24;
543 b43legacy_ram_write(dev, 0x20 + i, tmp);
544 b43legacy_ram_write(dev, 0x78 + i, tmp);
545 b43legacy_ram_write(dev, 0x478 + i, tmp);
546 }
547 }
548
549 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
550 {
551 b43legacy_write_mac_bssid_templates(dev);
552 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
553 dev->wl->mac_addr);
554 }
555
556 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
557 u16 slot_time)
558 {
559 /* slot_time is in usec. */
560 if (dev->phy.type != B43legacy_PHYTYPE_G)
561 return;
562 b43legacy_write16(dev, 0x684, 510 + slot_time);
563 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
564 slot_time);
565 }
566
567 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
568 {
569 b43legacy_set_slot_time(dev, 9);
570 dev->short_slot = 1;
571 }
572
573 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
574 {
575 b43legacy_set_slot_time(dev, 20);
576 dev->short_slot = 0;
577 }
578
579 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
580 * Returns the _previously_ enabled IRQ mask.
581 */
582 static inline u32 b43legacy_interrupt_enable(struct b43legacy_wldev *dev,
583 u32 mask)
584 {
585 u32 old_mask;
586
587 old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
588 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask |
589 mask);
590
591 return old_mask;
592 }
593
594 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
595 * Returns the _previously_ enabled IRQ mask.
596 */
597 static inline u32 b43legacy_interrupt_disable(struct b43legacy_wldev *dev,
598 u32 mask)
599 {
600 u32 old_mask;
601
602 old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
603 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
604
605 return old_mask;
606 }
607
608 /* Synchronize IRQ top- and bottom-half.
609 * IRQs must be masked before calling this.
610 * This must not be called with the irq_lock held.
611 */
612 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
613 {
614 synchronize_irq(dev->dev->irq);
615 tasklet_kill(&dev->isr_tasklet);
616 }
617
618 /* DummyTransmission function, as documented on
619 * http://bcm-specs.sipsolutions.net/DummyTransmission
620 */
621 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
622 {
623 struct b43legacy_phy *phy = &dev->phy;
624 unsigned int i;
625 unsigned int max_loop;
626 u16 value;
627 u32 buffer[5] = {
628 0x00000000,
629 0x00D40000,
630 0x00000000,
631 0x01000000,
632 0x00000000,
633 };
634
635 switch (phy->type) {
636 case B43legacy_PHYTYPE_B:
637 case B43legacy_PHYTYPE_G:
638 max_loop = 0xFA;
639 buffer[0] = 0x000B846E;
640 break;
641 default:
642 B43legacy_BUG_ON(1);
643 return;
644 }
645
646 for (i = 0; i < 5; i++)
647 b43legacy_ram_write(dev, i * 4, buffer[i]);
648
649 /* dummy read follows */
650 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
651
652 b43legacy_write16(dev, 0x0568, 0x0000);
653 b43legacy_write16(dev, 0x07C0, 0x0000);
654 b43legacy_write16(dev, 0x050C, 0x0000);
655 b43legacy_write16(dev, 0x0508, 0x0000);
656 b43legacy_write16(dev, 0x050A, 0x0000);
657 b43legacy_write16(dev, 0x054C, 0x0000);
658 b43legacy_write16(dev, 0x056A, 0x0014);
659 b43legacy_write16(dev, 0x0568, 0x0826);
660 b43legacy_write16(dev, 0x0500, 0x0000);
661 b43legacy_write16(dev, 0x0502, 0x0030);
662
663 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
664 b43legacy_radio_write16(dev, 0x0051, 0x0017);
665 for (i = 0x00; i < max_loop; i++) {
666 value = b43legacy_read16(dev, 0x050E);
667 if (value & 0x0080)
668 break;
669 udelay(10);
670 }
671 for (i = 0x00; i < 0x0A; i++) {
672 value = b43legacy_read16(dev, 0x050E);
673 if (value & 0x0400)
674 break;
675 udelay(10);
676 }
677 for (i = 0x00; i < 0x0A; i++) {
678 value = b43legacy_read16(dev, 0x0690);
679 if (!(value & 0x0100))
680 break;
681 udelay(10);
682 }
683 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
684 b43legacy_radio_write16(dev, 0x0051, 0x0037);
685 }
686
687 /* Turn the Analog ON/OFF */
688 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
689 {
690 b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
691 }
692
693 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
694 {
695 u32 tmslow;
696 u32 macctl;
697
698 flags |= B43legacy_TMSLOW_PHYCLKEN;
699 flags |= B43legacy_TMSLOW_PHYRESET;
700 ssb_device_enable(dev->dev, flags);
701 msleep(2); /* Wait for the PLL to turn on. */
702
703 /* Now take the PHY out of Reset again */
704 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
705 tmslow |= SSB_TMSLOW_FGC;
706 tmslow &= ~B43legacy_TMSLOW_PHYRESET;
707 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
708 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
709 msleep(1);
710 tmslow &= ~SSB_TMSLOW_FGC;
711 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
712 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
713 msleep(1);
714
715 /* Turn Analog ON */
716 b43legacy_switch_analog(dev, 1);
717
718 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
719 macctl &= ~B43legacy_MACCTL_GMODE;
720 if (flags & B43legacy_TMSLOW_GMODE) {
721 macctl |= B43legacy_MACCTL_GMODE;
722 dev->phy.gmode = 1;
723 } else
724 dev->phy.gmode = 0;
725 macctl |= B43legacy_MACCTL_IHR_ENABLED;
726 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
727 }
728
729 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
730 {
731 u32 v0;
732 u32 v1;
733 u16 tmp;
734 struct b43legacy_txstatus stat;
735
736 while (1) {
737 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
738 if (!(v0 & 0x00000001))
739 break;
740 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
741
742 stat.cookie = (v0 >> 16);
743 stat.seq = (v1 & 0x0000FFFF);
744 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
745 tmp = (v0 & 0x0000FFFF);
746 stat.frame_count = ((tmp & 0xF000) >> 12);
747 stat.rts_count = ((tmp & 0x0F00) >> 8);
748 stat.supp_reason = ((tmp & 0x001C) >> 2);
749 stat.pm_indicated = !!(tmp & 0x0080);
750 stat.intermediate = !!(tmp & 0x0040);
751 stat.for_ampdu = !!(tmp & 0x0020);
752 stat.acked = !!(tmp & 0x0002);
753
754 b43legacy_handle_txstatus(dev, &stat);
755 }
756 }
757
758 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
759 {
760 u32 dummy;
761
762 if (dev->dev->id.revision < 5)
763 return;
764 /* Read all entries from the microcode TXstatus FIFO
765 * and throw them away.
766 */
767 while (1) {
768 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
769 if (!(dummy & 0x00000001))
770 break;
771 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
772 }
773 }
774
775 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
776 {
777 u32 val = 0;
778
779 val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
780 val <<= 16;
781 val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
782
783 return val;
784 }
785
786 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
787 {
788 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
789 (jssi & 0x0000FFFF));
790 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
791 (jssi & 0xFFFF0000) >> 16);
792 }
793
794 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
795 {
796 b43legacy_jssi_write(dev, 0x7F7F7F7F);
797 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
798 b43legacy_read32(dev,
799 B43legacy_MMIO_MACCMD)
800 | (1 << 4));
801 B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
802 dev->phy.channel);
803 }
804
805 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
806 {
807 /* Top half of Link Quality calculation. */
808
809 if (dev->noisecalc.calculation_running)
810 return;
811 dev->noisecalc.channel_at_start = dev->phy.channel;
812 dev->noisecalc.calculation_running = 1;
813 dev->noisecalc.nr_samples = 0;
814
815 b43legacy_generate_noise_sample(dev);
816 }
817
818 static void handle_irq_noise(struct b43legacy_wldev *dev)
819 {
820 struct b43legacy_phy *phy = &dev->phy;
821 u16 tmp;
822 u8 noise[4];
823 u8 i;
824 u8 j;
825 s32 average;
826
827 /* Bottom half of Link Quality calculation. */
828
829 B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
830 if (dev->noisecalc.channel_at_start != phy->channel)
831 goto drop_calculation;
832 *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
833 if (noise[0] == 0x7F || noise[1] == 0x7F ||
834 noise[2] == 0x7F || noise[3] == 0x7F)
835 goto generate_new;
836
837 /* Get the noise samples. */
838 B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
839 i = dev->noisecalc.nr_samples;
840 noise[0] = limit_value(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
841 noise[1] = limit_value(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
842 noise[2] = limit_value(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
843 noise[3] = limit_value(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
844 dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
845 dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
846 dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
847 dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
848 dev->noisecalc.nr_samples++;
849 if (dev->noisecalc.nr_samples == 8) {
850 /* Calculate the Link Quality by the noise samples. */
851 average = 0;
852 for (i = 0; i < 8; i++) {
853 for (j = 0; j < 4; j++)
854 average += dev->noisecalc.samples[i][j];
855 }
856 average /= (8 * 4);
857 average *= 125;
858 average += 64;
859 average /= 128;
860 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
861 0x40C);
862 tmp = (tmp / 128) & 0x1F;
863 if (tmp >= 8)
864 average += 2;
865 else
866 average -= 25;
867 if (tmp == 8)
868 average -= 72;
869 else
870 average -= 48;
871
872 dev->stats.link_noise = average;
873 drop_calculation:
874 dev->noisecalc.calculation_running = 0;
875 return;
876 }
877 generate_new:
878 b43legacy_generate_noise_sample(dev);
879 }
880
881 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
882 {
883 if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) {
884 /* TODO: PS TBTT */
885 } else {
886 if (1/*FIXME: the last PSpoll frame was sent successfully */)
887 b43legacy_power_saving_ctl_bits(dev, -1, -1);
888 }
889 dev->reg124_set_0x4 = 0;
890 if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS))
891 dev->reg124_set_0x4 = 1;
892 }
893
894 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
895 {
896 if (!dev->reg124_set_0x4) /*FIXME rename this variable*/
897 return;
898 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
899 b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
900 | 0x4);
901 }
902
903 static void handle_irq_pmq(struct b43legacy_wldev *dev)
904 {
905 u32 tmp;
906
907 /* TODO: AP mode. */
908
909 while (1) {
910 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
911 if (!(tmp & 0x00000008))
912 break;
913 }
914 /* 16bit write is odd, but correct. */
915 b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
916 }
917
918 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
919 const u8 *data, u16 size,
920 u16 ram_offset,
921 u16 shm_size_offset, u8 rate)
922 {
923 u32 i;
924 u32 tmp;
925 struct b43legacy_plcp_hdr4 plcp;
926
927 plcp.data = 0;
928 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
929 b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
930 ram_offset += sizeof(u32);
931 /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
932 * So leave the first two bytes of the next write blank.
933 */
934 tmp = (u32)(data[0]) << 16;
935 tmp |= (u32)(data[1]) << 24;
936 b43legacy_ram_write(dev, ram_offset, tmp);
937 ram_offset += sizeof(u32);
938 for (i = 2; i < size; i += sizeof(u32)) {
939 tmp = (u32)(data[i + 0]);
940 if (i + 1 < size)
941 tmp |= (u32)(data[i + 1]) << 8;
942 if (i + 2 < size)
943 tmp |= (u32)(data[i + 2]) << 16;
944 if (i + 3 < size)
945 tmp |= (u32)(data[i + 3]) << 24;
946 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
947 }
948 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
949 size + sizeof(struct b43legacy_plcp_hdr6));
950 }
951
952 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
953 u16 ram_offset,
954 u16 shm_size_offset, u8 rate)
955 {
956 int len;
957 const u8 *data;
958
959 B43legacy_WARN_ON(!dev->cached_beacon);
960 len = min((size_t)dev->cached_beacon->len,
961 0x200 - sizeof(struct b43legacy_plcp_hdr6));
962 data = (const u8 *)(dev->cached_beacon->data);
963 b43legacy_write_template_common(dev, data,
964 len, ram_offset,
965 shm_size_offset, rate);
966 }
967
968 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
969 u16 shm_offset, u16 size,
970 u8 rate)
971 {
972 struct b43legacy_plcp_hdr4 plcp;
973 u32 tmp;
974 __le16 dur;
975
976 plcp.data = 0;
977 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
978 dur = ieee80211_generic_frame_duration(dev->wl->hw,
979 dev->wl->vif,
980 size,
981 B43legacy_RATE_TO_100KBPS(rate));
982 /* Write PLCP in two parts and timing for packet transfer */
983 tmp = le32_to_cpu(plcp.data);
984 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
985 tmp & 0xFFFF);
986 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
987 tmp >> 16);
988 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
989 le16_to_cpu(dur));
990 }
991
992 /* Instead of using custom probe response template, this function
993 * just patches custom beacon template by:
994 * 1) Changing packet type
995 * 2) Patching duration field
996 * 3) Stripping TIM
997 */
998 static u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
999 u16 *dest_size, u8 rate)
1000 {
1001 const u8 *src_data;
1002 u8 *dest_data;
1003 u16 src_size;
1004 u16 elem_size;
1005 u16 src_pos;
1006 u16 dest_pos;
1007 __le16 dur;
1008 struct ieee80211_hdr *hdr;
1009
1010 B43legacy_WARN_ON(!dev->cached_beacon);
1011 src_size = dev->cached_beacon->len;
1012 src_data = (const u8 *)dev->cached_beacon->data;
1013
1014 if (unlikely(src_size < 0x24)) {
1015 b43legacydbg(dev->wl, "b43legacy_generate_probe_resp: "
1016 "invalid beacon\n");
1017 return NULL;
1018 }
1019
1020 dest_data = kmalloc(src_size, GFP_ATOMIC);
1021 if (unlikely(!dest_data))
1022 return NULL;
1023
1024 /* 0x24 is offset of first variable-len Information-Element
1025 * in beacon frame.
1026 */
1027 memcpy(dest_data, src_data, 0x24);
1028 src_pos = 0x24;
1029 dest_pos = 0x24;
1030 for (; src_pos < src_size - 2; src_pos += elem_size) {
1031 elem_size = src_data[src_pos + 1] + 2;
1032 if (src_data[src_pos] != 0x05) { /* TIM */
1033 memcpy(dest_data + dest_pos, src_data + src_pos,
1034 elem_size);
1035 dest_pos += elem_size;
1036 }
1037 }
1038 *dest_size = dest_pos;
1039 hdr = (struct ieee80211_hdr *)dest_data;
1040
1041 /* Set the frame control. */
1042 hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1043 IEEE80211_STYPE_PROBE_RESP);
1044 dur = ieee80211_generic_frame_duration(dev->wl->hw,
1045 dev->wl->vif,
1046 *dest_size,
1047 B43legacy_RATE_TO_100KBPS(rate));
1048 hdr->duration_id = dur;
1049
1050 return dest_data;
1051 }
1052
1053 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1054 u16 ram_offset,
1055 u16 shm_size_offset, u8 rate)
1056 {
1057 u8 *probe_resp_data;
1058 u16 size;
1059
1060 B43legacy_WARN_ON(!dev->cached_beacon);
1061 size = dev->cached_beacon->len;
1062 probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1063 if (unlikely(!probe_resp_data))
1064 return;
1065
1066 /* Looks like PLCP headers plus packet timings are stored for
1067 * all possible basic rates
1068 */
1069 b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1070 B43legacy_CCK_RATE_1MB);
1071 b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1072 B43legacy_CCK_RATE_2MB);
1073 b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1074 B43legacy_CCK_RATE_5MB);
1075 b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1076 B43legacy_CCK_RATE_11MB);
1077
1078 size = min((size_t)size,
1079 0x200 - sizeof(struct b43legacy_plcp_hdr6));
1080 b43legacy_write_template_common(dev, probe_resp_data,
1081 size, ram_offset,
1082 shm_size_offset, rate);
1083 kfree(probe_resp_data);
1084 }
1085
1086 static int b43legacy_refresh_cached_beacon(struct b43legacy_wldev *dev,
1087 struct sk_buff *beacon)
1088 {
1089 if (dev->cached_beacon)
1090 kfree_skb(dev->cached_beacon);
1091 dev->cached_beacon = beacon;
1092
1093 return 0;
1094 }
1095
1096 static void b43legacy_update_templates(struct b43legacy_wldev *dev)
1097 {
1098 u32 status;
1099
1100 B43legacy_WARN_ON(!dev->cached_beacon);
1101
1102 b43legacy_write_beacon_template(dev, 0x68, 0x18,
1103 B43legacy_CCK_RATE_1MB);
1104 b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1105 B43legacy_CCK_RATE_1MB);
1106 b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1107 B43legacy_CCK_RATE_11MB);
1108
1109 status = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1110 status |= 0x03;
1111 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, status);
1112 }
1113
1114 static void b43legacy_refresh_templates(struct b43legacy_wldev *dev,
1115 struct sk_buff *beacon)
1116 {
1117 int err;
1118
1119 err = b43legacy_refresh_cached_beacon(dev, beacon);
1120 if (unlikely(err))
1121 return;
1122 b43legacy_update_templates(dev);
1123 }
1124
1125 static void b43legacy_set_ssid(struct b43legacy_wldev *dev,
1126 const u8 *ssid, u8 ssid_len)
1127 {
1128 u32 tmp;
1129 u16 i;
1130 u16 len;
1131
1132 len = min((u16)ssid_len, (u16)0x100);
1133 for (i = 0; i < len; i += sizeof(u32)) {
1134 tmp = (u32)(ssid[i + 0]);
1135 if (i + 1 < len)
1136 tmp |= (u32)(ssid[i + 1]) << 8;
1137 if (i + 2 < len)
1138 tmp |= (u32)(ssid[i + 2]) << 16;
1139 if (i + 3 < len)
1140 tmp |= (u32)(ssid[i + 3]) << 24;
1141 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1142 0x380 + i, tmp);
1143 }
1144 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1145 0x48, len);
1146 }
1147
1148 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1149 u16 beacon_int)
1150 {
1151 b43legacy_time_lock(dev);
1152 if (dev->dev->id.revision >= 3)
1153 b43legacy_write32(dev, 0x188, (beacon_int << 16));
1154 else {
1155 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1156 b43legacy_write16(dev, 0x610, beacon_int);
1157 }
1158 b43legacy_time_unlock(dev);
1159 }
1160
1161 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1162 {
1163 u32 status;
1164
1165 if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
1166 return;
1167
1168 dev->irq_savedstate &= ~B43legacy_IRQ_BEACON;
1169 status = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1170
1171 if (!dev->cached_beacon || ((status & 0x1) && (status & 0x2))) {
1172 /* ACK beacon IRQ. */
1173 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1174 B43legacy_IRQ_BEACON);
1175 dev->irq_savedstate |= B43legacy_IRQ_BEACON;
1176 if (dev->cached_beacon)
1177 kfree_skb(dev->cached_beacon);
1178 dev->cached_beacon = NULL;
1179 return;
1180 }
1181 if (!(status & 0x1)) {
1182 b43legacy_write_beacon_template(dev, 0x68, 0x18,
1183 B43legacy_CCK_RATE_1MB);
1184 status |= 0x1;
1185 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
1186 status);
1187 }
1188 if (!(status & 0x2)) {
1189 b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1190 B43legacy_CCK_RATE_1MB);
1191 status |= 0x2;
1192 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
1193 status);
1194 }
1195 }
1196
1197 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1198 {
1199 }
1200
1201 /* Interrupt handler bottom-half */
1202 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1203 {
1204 u32 reason;
1205 u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1206 u32 merged_dma_reason = 0;
1207 int i;
1208 unsigned long flags;
1209
1210 spin_lock_irqsave(&dev->wl->irq_lock, flags);
1211
1212 B43legacy_WARN_ON(b43legacy_status(dev) <
1213 B43legacy_STAT_INITIALIZED);
1214
1215 reason = dev->irq_reason;
1216 for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1217 dma_reason[i] = dev->dma_reason[i];
1218 merged_dma_reason |= dma_reason[i];
1219 }
1220
1221 if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1222 b43legacyerr(dev->wl, "MAC transmission error\n");
1223
1224 if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1225 b43legacyerr(dev->wl, "PHY transmission error\n");
1226 rmb();
1227 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1228 b43legacyerr(dev->wl, "Too many PHY TX errors, "
1229 "restarting the controller\n");
1230 b43legacy_controller_restart(dev, "PHY TX errors");
1231 }
1232 }
1233
1234 if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1235 B43legacy_DMAIRQ_NONFATALMASK))) {
1236 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1237 b43legacyerr(dev->wl, "Fatal DMA error: "
1238 "0x%08X, 0x%08X, 0x%08X, "
1239 "0x%08X, 0x%08X, 0x%08X\n",
1240 dma_reason[0], dma_reason[1],
1241 dma_reason[2], dma_reason[3],
1242 dma_reason[4], dma_reason[5]);
1243 b43legacy_controller_restart(dev, "DMA error");
1244 mmiowb();
1245 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1246 return;
1247 }
1248 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1249 b43legacyerr(dev->wl, "DMA error: "
1250 "0x%08X, 0x%08X, 0x%08X, "
1251 "0x%08X, 0x%08X, 0x%08X\n",
1252 dma_reason[0], dma_reason[1],
1253 dma_reason[2], dma_reason[3],
1254 dma_reason[4], dma_reason[5]);
1255 }
1256
1257 if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1258 handle_irq_ucode_debug(dev);
1259 if (reason & B43legacy_IRQ_TBTT_INDI)
1260 handle_irq_tbtt_indication(dev);
1261 if (reason & B43legacy_IRQ_ATIM_END)
1262 handle_irq_atim_end(dev);
1263 if (reason & B43legacy_IRQ_BEACON)
1264 handle_irq_beacon(dev);
1265 if (reason & B43legacy_IRQ_PMQ)
1266 handle_irq_pmq(dev);
1267 if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1268 ;/*TODO*/
1269 if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1270 handle_irq_noise(dev);
1271
1272 /* Check the DMA reason registers for received data. */
1273 if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1274 if (b43legacy_using_pio(dev))
1275 b43legacy_pio_rx(dev->pio.queue0);
1276 else
1277 b43legacy_dma_rx(dev->dma.rx_ring0);
1278 }
1279 B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1280 B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1281 if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1282 if (b43legacy_using_pio(dev))
1283 b43legacy_pio_rx(dev->pio.queue3);
1284 else
1285 b43legacy_dma_rx(dev->dma.rx_ring3);
1286 }
1287 B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1288 B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1289
1290 if (reason & B43legacy_IRQ_TX_OK)
1291 handle_irq_transmit_status(dev);
1292
1293 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1294 mmiowb();
1295 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1296 }
1297
1298 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1299 u16 base, int queueidx)
1300 {
1301 u16 rxctl;
1302
1303 rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1304 if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1305 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1306 else
1307 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1308 }
1309
1310 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1311 {
1312 if (b43legacy_using_pio(dev) &&
1313 (dev->dev->id.revision < 3) &&
1314 (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1315 /* Apply a PIO specific workaround to the dma_reasons */
1316 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1317 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1318 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1319 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1320 }
1321
1322 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1323
1324 b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1325 dev->dma_reason[0]);
1326 b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1327 dev->dma_reason[1]);
1328 b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1329 dev->dma_reason[2]);
1330 b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1331 dev->dma_reason[3]);
1332 b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1333 dev->dma_reason[4]);
1334 b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1335 dev->dma_reason[5]);
1336 }
1337
1338 /* Interrupt handler top-half */
1339 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1340 {
1341 irqreturn_t ret = IRQ_NONE;
1342 struct b43legacy_wldev *dev = dev_id;
1343 u32 reason;
1344
1345 if (!dev)
1346 return IRQ_NONE;
1347
1348 spin_lock(&dev->wl->irq_lock);
1349
1350 if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
1351 goto out;
1352 reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1353 if (reason == 0xffffffff) /* shared IRQ */
1354 goto out;
1355 ret = IRQ_HANDLED;
1356 reason &= b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
1357 if (!reason)
1358 goto out;
1359
1360 dev->dma_reason[0] = b43legacy_read32(dev,
1361 B43legacy_MMIO_DMA0_REASON)
1362 & 0x0001DC00;
1363 dev->dma_reason[1] = b43legacy_read32(dev,
1364 B43legacy_MMIO_DMA1_REASON)
1365 & 0x0000DC00;
1366 dev->dma_reason[2] = b43legacy_read32(dev,
1367 B43legacy_MMIO_DMA2_REASON)
1368 & 0x0000DC00;
1369 dev->dma_reason[3] = b43legacy_read32(dev,
1370 B43legacy_MMIO_DMA3_REASON)
1371 & 0x0001DC00;
1372 dev->dma_reason[4] = b43legacy_read32(dev,
1373 B43legacy_MMIO_DMA4_REASON)
1374 & 0x0000DC00;
1375 dev->dma_reason[5] = b43legacy_read32(dev,
1376 B43legacy_MMIO_DMA5_REASON)
1377 & 0x0000DC00;
1378
1379 b43legacy_interrupt_ack(dev, reason);
1380 /* disable all IRQs. They are enabled again in the bottom half. */
1381 dev->irq_savedstate = b43legacy_interrupt_disable(dev,
1382 B43legacy_IRQ_ALL);
1383 /* save the reason code and call our bottom half. */
1384 dev->irq_reason = reason;
1385 tasklet_schedule(&dev->isr_tasklet);
1386 out:
1387 mmiowb();
1388 spin_unlock(&dev->wl->irq_lock);
1389
1390 return ret;
1391 }
1392
1393 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1394 {
1395 release_firmware(dev->fw.ucode);
1396 dev->fw.ucode = NULL;
1397 release_firmware(dev->fw.pcm);
1398 dev->fw.pcm = NULL;
1399 release_firmware(dev->fw.initvals);
1400 dev->fw.initvals = NULL;
1401 release_firmware(dev->fw.initvals_band);
1402 dev->fw.initvals_band = NULL;
1403 }
1404
1405 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1406 {
1407 b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1408 "Drivers/b43#devicefirmware "
1409 "and download the correct firmware (version 3).\n");
1410 }
1411
1412 static int do_request_fw(struct b43legacy_wldev *dev,
1413 const char *name,
1414 const struct firmware **fw)
1415 {
1416 char path[sizeof(modparam_fwpostfix) + 32];
1417 struct b43legacy_fw_header *hdr;
1418 u32 size;
1419 int err;
1420
1421 if (!name)
1422 return 0;
1423
1424 snprintf(path, ARRAY_SIZE(path),
1425 "b43legacy%s/%s.fw",
1426 modparam_fwpostfix, name);
1427 err = request_firmware(fw, path, dev->dev->dev);
1428 if (err) {
1429 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1430 "or load failed.\n", path);
1431 return err;
1432 }
1433 if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1434 goto err_format;
1435 hdr = (struct b43legacy_fw_header *)((*fw)->data);
1436 switch (hdr->type) {
1437 case B43legacy_FW_TYPE_UCODE:
1438 case B43legacy_FW_TYPE_PCM:
1439 size = be32_to_cpu(hdr->size);
1440 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1441 goto err_format;
1442 /* fallthrough */
1443 case B43legacy_FW_TYPE_IV:
1444 if (hdr->ver != 1)
1445 goto err_format;
1446 break;
1447 default:
1448 goto err_format;
1449 }
1450
1451 return err;
1452
1453 err_format:
1454 b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1455 return -EPROTO;
1456 }
1457
1458 static int b43legacy_request_firmware(struct b43legacy_wldev *dev)
1459 {
1460 struct b43legacy_firmware *fw = &dev->fw;
1461 const u8 rev = dev->dev->id.revision;
1462 const char *filename;
1463 u32 tmshigh;
1464 int err;
1465
1466 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
1467 if (!fw->ucode) {
1468 if (rev == 2)
1469 filename = "ucode2";
1470 else if (rev == 4)
1471 filename = "ucode4";
1472 else
1473 filename = "ucode5";
1474 err = do_request_fw(dev, filename, &fw->ucode);
1475 if (err)
1476 goto err_load;
1477 }
1478 if (!fw->pcm) {
1479 if (rev < 5)
1480 filename = "pcm4";
1481 else
1482 filename = "pcm5";
1483 err = do_request_fw(dev, filename, &fw->pcm);
1484 if (err)
1485 goto err_load;
1486 }
1487 if (!fw->initvals) {
1488 switch (dev->phy.type) {
1489 case B43legacy_PHYTYPE_G:
1490 if ((rev >= 5) && (rev <= 10))
1491 filename = "b0g0initvals5";
1492 else if (rev == 2 || rev == 4)
1493 filename = "b0g0initvals2";
1494 else
1495 goto err_no_initvals;
1496 break;
1497 default:
1498 goto err_no_initvals;
1499 }
1500 err = do_request_fw(dev, filename, &fw->initvals);
1501 if (err)
1502 goto err_load;
1503 }
1504 if (!fw->initvals_band) {
1505 switch (dev->phy.type) {
1506 case B43legacy_PHYTYPE_G:
1507 if ((rev >= 5) && (rev <= 10))
1508 filename = "b0g0bsinitvals5";
1509 else if (rev >= 11)
1510 filename = NULL;
1511 else if (rev == 2 || rev == 4)
1512 filename = NULL;
1513 else
1514 goto err_no_initvals;
1515 break;
1516 default:
1517 goto err_no_initvals;
1518 }
1519 err = do_request_fw(dev, filename, &fw->initvals_band);
1520 if (err)
1521 goto err_load;
1522 }
1523
1524 return 0;
1525
1526 err_load:
1527 b43legacy_print_fw_helptext(dev->wl);
1528 goto error;
1529
1530 err_no_initvals:
1531 err = -ENODEV;
1532 b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1533 "core rev %u\n", dev->phy.type, rev);
1534 goto error;
1535
1536 error:
1537 b43legacy_release_firmware(dev);
1538 return err;
1539 }
1540
1541 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1542 {
1543 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1544 const __be32 *data;
1545 unsigned int i;
1546 unsigned int len;
1547 u16 fwrev;
1548 u16 fwpatch;
1549 u16 fwdate;
1550 u16 fwtime;
1551 u32 tmp, macctl;
1552 int err = 0;
1553
1554 /* Jump the microcode PSM to offset 0 */
1555 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1556 B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1557 macctl |= B43legacy_MACCTL_PSM_JMP0;
1558 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1559 /* Zero out all microcode PSM registers and shared memory. */
1560 for (i = 0; i < 64; i++)
1561 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1562 for (i = 0; i < 4096; i += 2)
1563 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1564
1565 /* Upload Microcode. */
1566 data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1567 len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1568 b43legacy_shm_control_word(dev,
1569 B43legacy_SHM_UCODE |
1570 B43legacy_SHM_AUTOINC_W,
1571 0x0000);
1572 for (i = 0; i < len; i++) {
1573 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1574 be32_to_cpu(data[i]));
1575 udelay(10);
1576 }
1577
1578 if (dev->fw.pcm) {
1579 /* Upload PCM data. */
1580 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1581 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1582 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1583 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1584 /* No need for autoinc bit in SHM_HW */
1585 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1586 for (i = 0; i < len; i++) {
1587 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1588 be32_to_cpu(data[i]));
1589 udelay(10);
1590 }
1591 }
1592
1593 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1594 B43legacy_IRQ_ALL);
1595
1596 /* Start the microcode PSM */
1597 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1598 macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1599 macctl |= B43legacy_MACCTL_PSM_RUN;
1600 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1601
1602 /* Wait for the microcode to load and respond */
1603 i = 0;
1604 while (1) {
1605 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1606 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1607 break;
1608 i++;
1609 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1610 b43legacyerr(dev->wl, "Microcode not responding\n");
1611 b43legacy_print_fw_helptext(dev->wl);
1612 err = -ENODEV;
1613 goto error;
1614 }
1615 msleep_interruptible(50);
1616 if (signal_pending(current)) {
1617 err = -EINTR;
1618 goto error;
1619 }
1620 }
1621 /* dummy read follows */
1622 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1623
1624 /* Get and check the revisions. */
1625 fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1626 B43legacy_SHM_SH_UCODEREV);
1627 fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1628 B43legacy_SHM_SH_UCODEPATCH);
1629 fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1630 B43legacy_SHM_SH_UCODEDATE);
1631 fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1632 B43legacy_SHM_SH_UCODETIME);
1633
1634 if (fwrev > 0x128) {
1635 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1636 " Only firmware from binary drivers version 3.x"
1637 " is supported. You must change your firmware"
1638 " files.\n");
1639 b43legacy_print_fw_helptext(dev->wl);
1640 err = -EOPNOTSUPP;
1641 goto error;
1642 }
1643 b43legacydbg(dev->wl, "Loading firmware version 0x%X, patch level %u "
1644 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1645 (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1646 (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F, fwtime & 0x1F);
1647
1648 dev->fw.rev = fwrev;
1649 dev->fw.patch = fwpatch;
1650
1651 return 0;
1652
1653 error:
1654 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1655 macctl &= ~B43legacy_MACCTL_PSM_RUN;
1656 macctl |= B43legacy_MACCTL_PSM_JMP0;
1657 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1658
1659 return err;
1660 }
1661
1662 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1663 const struct b43legacy_iv *ivals,
1664 size_t count,
1665 size_t array_size)
1666 {
1667 const struct b43legacy_iv *iv;
1668 u16 offset;
1669 size_t i;
1670 bool bit32;
1671
1672 BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1673 iv = ivals;
1674 for (i = 0; i < count; i++) {
1675 if (array_size < sizeof(iv->offset_size))
1676 goto err_format;
1677 array_size -= sizeof(iv->offset_size);
1678 offset = be16_to_cpu(iv->offset_size);
1679 bit32 = !!(offset & B43legacy_IV_32BIT);
1680 offset &= B43legacy_IV_OFFSET_MASK;
1681 if (offset >= 0x1000)
1682 goto err_format;
1683 if (bit32) {
1684 u32 value;
1685
1686 if (array_size < sizeof(iv->data.d32))
1687 goto err_format;
1688 array_size -= sizeof(iv->data.d32);
1689
1690 value = be32_to_cpu(get_unaligned(&iv->data.d32));
1691 b43legacy_write32(dev, offset, value);
1692
1693 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1694 sizeof(__be16) +
1695 sizeof(__be32));
1696 } else {
1697 u16 value;
1698
1699 if (array_size < sizeof(iv->data.d16))
1700 goto err_format;
1701 array_size -= sizeof(iv->data.d16);
1702
1703 value = be16_to_cpu(iv->data.d16);
1704 b43legacy_write16(dev, offset, value);
1705
1706 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1707 sizeof(__be16) +
1708 sizeof(__be16));
1709 }
1710 }
1711 if (array_size)
1712 goto err_format;
1713
1714 return 0;
1715
1716 err_format:
1717 b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1718 b43legacy_print_fw_helptext(dev->wl);
1719
1720 return -EPROTO;
1721 }
1722
1723 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1724 {
1725 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1726 const struct b43legacy_fw_header *hdr;
1727 struct b43legacy_firmware *fw = &dev->fw;
1728 const struct b43legacy_iv *ivals;
1729 size_t count;
1730 int err;
1731
1732 hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1733 ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1734 count = be32_to_cpu(hdr->size);
1735 err = b43legacy_write_initvals(dev, ivals, count,
1736 fw->initvals->size - hdr_len);
1737 if (err)
1738 goto out;
1739 if (fw->initvals_band) {
1740 hdr = (const struct b43legacy_fw_header *)
1741 (fw->initvals_band->data);
1742 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1743 + hdr_len);
1744 count = be32_to_cpu(hdr->size);
1745 err = b43legacy_write_initvals(dev, ivals, count,
1746 fw->initvals_band->size - hdr_len);
1747 if (err)
1748 goto out;
1749 }
1750 out:
1751
1752 return err;
1753 }
1754
1755 /* Initialize the GPIOs
1756 * http://bcm-specs.sipsolutions.net/GPIO
1757 */
1758 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1759 {
1760 struct ssb_bus *bus = dev->dev->bus;
1761 struct ssb_device *gpiodev, *pcidev = NULL;
1762 u32 mask;
1763 u32 set;
1764
1765 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1766 b43legacy_read32(dev,
1767 B43legacy_MMIO_MACCTL)
1768 & 0xFFFF3FFF);
1769
1770 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1771 b43legacy_read16(dev,
1772 B43legacy_MMIO_GPIO_MASK)
1773 | 0x000F);
1774
1775 mask = 0x0000001F;
1776 set = 0x0000000F;
1777 if (dev->dev->bus->chip_id == 0x4301) {
1778 mask |= 0x0060;
1779 set |= 0x0060;
1780 }
1781 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1782 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1783 b43legacy_read16(dev,
1784 B43legacy_MMIO_GPIO_MASK)
1785 | 0x0200);
1786 mask |= 0x0200;
1787 set |= 0x0200;
1788 }
1789 if (dev->dev->id.revision >= 2)
1790 mask |= 0x0010; /* FIXME: This is redundant. */
1791
1792 #ifdef CONFIG_SSB_DRIVER_PCICORE
1793 pcidev = bus->pcicore.dev;
1794 #endif
1795 gpiodev = bus->chipco.dev ? : pcidev;
1796 if (!gpiodev)
1797 return 0;
1798 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1799 (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1800 & mask) | set);
1801
1802 return 0;
1803 }
1804
1805 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1806 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1807 {
1808 struct ssb_bus *bus = dev->dev->bus;
1809 struct ssb_device *gpiodev, *pcidev = NULL;
1810
1811 #ifdef CONFIG_SSB_DRIVER_PCICORE
1812 pcidev = bus->pcicore.dev;
1813 #endif
1814 gpiodev = bus->chipco.dev ? : pcidev;
1815 if (!gpiodev)
1816 return;
1817 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1818 }
1819
1820 /* http://bcm-specs.sipsolutions.net/EnableMac */
1821 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1822 {
1823 dev->mac_suspended--;
1824 B43legacy_WARN_ON(dev->mac_suspended < 0);
1825 B43legacy_WARN_ON(irqs_disabled());
1826 if (dev->mac_suspended == 0) {
1827 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1828 b43legacy_read32(dev,
1829 B43legacy_MMIO_MACCTL)
1830 | B43legacy_MACCTL_ENABLED);
1831 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1832 B43legacy_IRQ_MAC_SUSPENDED);
1833 /* the next two are dummy reads */
1834 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1835 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1836 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1837
1838 /* Re-enable IRQs. */
1839 spin_lock_irq(&dev->wl->irq_lock);
1840 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1841 spin_unlock_irq(&dev->wl->irq_lock);
1842 }
1843 }
1844
1845 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1846 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1847 {
1848 int i;
1849 u32 tmp;
1850
1851 might_sleep();
1852 B43legacy_WARN_ON(irqs_disabled());
1853 B43legacy_WARN_ON(dev->mac_suspended < 0);
1854
1855 if (dev->mac_suspended == 0) {
1856 /* Mask IRQs before suspending MAC. Otherwise
1857 * the MAC stays busy and won't suspend. */
1858 spin_lock_irq(&dev->wl->irq_lock);
1859 tmp = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
1860 spin_unlock_irq(&dev->wl->irq_lock);
1861 b43legacy_synchronize_irq(dev);
1862 dev->irq_savedstate = tmp;
1863
1864 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1865 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1866 b43legacy_read32(dev,
1867 B43legacy_MMIO_MACCTL)
1868 & ~B43legacy_MACCTL_ENABLED);
1869 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1870 for (i = 40; i; i--) {
1871 tmp = b43legacy_read32(dev,
1872 B43legacy_MMIO_GEN_IRQ_REASON);
1873 if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1874 goto out;
1875 msleep(1);
1876 }
1877 b43legacyerr(dev->wl, "MAC suspend failed\n");
1878 }
1879 out:
1880 dev->mac_suspended++;
1881 }
1882
1883 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1884 {
1885 struct b43legacy_wl *wl = dev->wl;
1886 u32 ctl;
1887 u16 cfp_pretbtt;
1888
1889 ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1890 /* Reset status to STA infrastructure mode. */
1891 ctl &= ~B43legacy_MACCTL_AP;
1892 ctl &= ~B43legacy_MACCTL_KEEP_CTL;
1893 ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
1894 ctl &= ~B43legacy_MACCTL_KEEP_BAD;
1895 ctl &= ~B43legacy_MACCTL_PROMISC;
1896 ctl &= ~B43legacy_MACCTL_BEACPROMISC;
1897 ctl |= B43legacy_MACCTL_INFRA;
1898
1899 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
1900 ctl |= B43legacy_MACCTL_AP;
1901 else if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_IBSS))
1902 ctl &= ~B43legacy_MACCTL_INFRA;
1903
1904 if (wl->filter_flags & FIF_CONTROL)
1905 ctl |= B43legacy_MACCTL_KEEP_CTL;
1906 if (wl->filter_flags & FIF_FCSFAIL)
1907 ctl |= B43legacy_MACCTL_KEEP_BAD;
1908 if (wl->filter_flags & FIF_PLCPFAIL)
1909 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
1910 if (wl->filter_flags & FIF_PROMISC_IN_BSS)
1911 ctl |= B43legacy_MACCTL_PROMISC;
1912 if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
1913 ctl |= B43legacy_MACCTL_BEACPROMISC;
1914
1915 /* Workaround: On old hardware the HW-MAC-address-filter
1916 * doesn't work properly, so always run promisc in filter
1917 * it in software. */
1918 if (dev->dev->id.revision <= 4)
1919 ctl |= B43legacy_MACCTL_PROMISC;
1920
1921 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
1922
1923 cfp_pretbtt = 2;
1924 if ((ctl & B43legacy_MACCTL_INFRA) &&
1925 !(ctl & B43legacy_MACCTL_AP)) {
1926 if (dev->dev->bus->chip_id == 0x4306 &&
1927 dev->dev->bus->chip_rev == 3)
1928 cfp_pretbtt = 100;
1929 else
1930 cfp_pretbtt = 50;
1931 }
1932 b43legacy_write16(dev, 0x612, cfp_pretbtt);
1933 }
1934
1935 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
1936 u16 rate,
1937 int is_ofdm)
1938 {
1939 u16 offset;
1940
1941 if (is_ofdm) {
1942 offset = 0x480;
1943 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
1944 } else {
1945 offset = 0x4C0;
1946 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
1947 }
1948 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
1949 b43legacy_shm_read16(dev,
1950 B43legacy_SHM_SHARED, offset));
1951 }
1952
1953 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
1954 {
1955 switch (dev->phy.type) {
1956 case B43legacy_PHYTYPE_G:
1957 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
1958 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
1959 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
1960 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
1961 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
1962 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
1963 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
1964 /* fallthrough */
1965 case B43legacy_PHYTYPE_B:
1966 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
1967 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
1968 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
1969 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
1970 break;
1971 default:
1972 B43legacy_BUG_ON(1);
1973 }
1974 }
1975
1976 /* Set the TX-Antenna for management frames sent by firmware. */
1977 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
1978 int antenna)
1979 {
1980 u16 ant = 0;
1981 u16 tmp;
1982
1983 switch (antenna) {
1984 case B43legacy_ANTENNA0:
1985 ant |= B43legacy_TX4_PHY_ANT0;
1986 break;
1987 case B43legacy_ANTENNA1:
1988 ant |= B43legacy_TX4_PHY_ANT1;
1989 break;
1990 case B43legacy_ANTENNA_AUTO:
1991 ant |= B43legacy_TX4_PHY_ANTLAST;
1992 break;
1993 default:
1994 B43legacy_BUG_ON(1);
1995 }
1996
1997 /* FIXME We also need to set the other flags of the PHY control
1998 * field somewhere. */
1999
2000 /* For Beacons */
2001 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2002 B43legacy_SHM_SH_BEACPHYCTL);
2003 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2004 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2005 B43legacy_SHM_SH_BEACPHYCTL, tmp);
2006 /* For ACK/CTS */
2007 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2008 B43legacy_SHM_SH_ACKCTSPHYCTL);
2009 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2010 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2011 B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2012 /* For Probe Resposes */
2013 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2014 B43legacy_SHM_SH_PRPHYCTL);
2015 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2016 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2017 B43legacy_SHM_SH_PRPHYCTL, tmp);
2018 }
2019
2020 /* This is the opposite of b43legacy_chip_init() */
2021 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2022 {
2023 b43legacy_radio_turn_off(dev, 1);
2024 b43legacy_gpio_cleanup(dev);
2025 /* firmware is released later */
2026 }
2027
2028 /* Initialize the chip
2029 * http://bcm-specs.sipsolutions.net/ChipInit
2030 */
2031 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2032 {
2033 struct b43legacy_phy *phy = &dev->phy;
2034 int err;
2035 int tmp;
2036 u32 value32, macctl;
2037 u16 value16;
2038
2039 /* Initialize the MAC control */
2040 macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2041 if (dev->phy.gmode)
2042 macctl |= B43legacy_MACCTL_GMODE;
2043 macctl |= B43legacy_MACCTL_INFRA;
2044 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2045
2046 err = b43legacy_request_firmware(dev);
2047 if (err)
2048 goto out;
2049 err = b43legacy_upload_microcode(dev);
2050 if (err)
2051 goto out; /* firmware is released later */
2052
2053 err = b43legacy_gpio_init(dev);
2054 if (err)
2055 goto out; /* firmware is released later */
2056
2057 err = b43legacy_upload_initvals(dev);
2058 if (err)
2059 goto err_gpio_clean;
2060 b43legacy_radio_turn_on(dev);
2061
2062 b43legacy_write16(dev, 0x03E6, 0x0000);
2063 err = b43legacy_phy_init(dev);
2064 if (err)
2065 goto err_radio_off;
2066
2067 /* Select initial Interference Mitigation. */
2068 tmp = phy->interfmode;
2069 phy->interfmode = B43legacy_INTERFMODE_NONE;
2070 b43legacy_radio_set_interference_mitigation(dev, tmp);
2071
2072 b43legacy_phy_set_antenna_diversity(dev);
2073 b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2074
2075 if (phy->type == B43legacy_PHYTYPE_B) {
2076 value16 = b43legacy_read16(dev, 0x005E);
2077 value16 |= 0x0004;
2078 b43legacy_write16(dev, 0x005E, value16);
2079 }
2080 b43legacy_write32(dev, 0x0100, 0x01000000);
2081 if (dev->dev->id.revision < 5)
2082 b43legacy_write32(dev, 0x010C, 0x01000000);
2083
2084 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2085 value32 &= ~B43legacy_MACCTL_INFRA;
2086 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2087 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2088 value32 |= B43legacy_MACCTL_INFRA;
2089 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2090
2091 if (b43legacy_using_pio(dev)) {
2092 b43legacy_write32(dev, 0x0210, 0x00000100);
2093 b43legacy_write32(dev, 0x0230, 0x00000100);
2094 b43legacy_write32(dev, 0x0250, 0x00000100);
2095 b43legacy_write32(dev, 0x0270, 0x00000100);
2096 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2097 0x0000);
2098 }
2099
2100 /* Probe Response Timeout value */
2101 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2102 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2103
2104 /* Initially set the wireless operation mode. */
2105 b43legacy_adjust_opmode(dev);
2106
2107 if (dev->dev->id.revision < 3) {
2108 b43legacy_write16(dev, 0x060E, 0x0000);
2109 b43legacy_write16(dev, 0x0610, 0x8000);
2110 b43legacy_write16(dev, 0x0604, 0x0000);
2111 b43legacy_write16(dev, 0x0606, 0x0200);
2112 } else {
2113 b43legacy_write32(dev, 0x0188, 0x80000000);
2114 b43legacy_write32(dev, 0x018C, 0x02000000);
2115 }
2116 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2117 b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2118 b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2119 b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2120 b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2121 b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2122 b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2123
2124 value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2125 value32 |= 0x00100000;
2126 ssb_write32(dev->dev, SSB_TMSLOW, value32);
2127
2128 b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2129 dev->dev->bus->chipco.fast_pwrup_delay);
2130
2131 /* PHY TX errors counter. */
2132 atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2133
2134 B43legacy_WARN_ON(err != 0);
2135 b43legacydbg(dev->wl, "Chip initialized\n");
2136 out:
2137 return err;
2138
2139 err_radio_off:
2140 b43legacy_radio_turn_off(dev, 1);
2141 err_gpio_clean:
2142 b43legacy_gpio_cleanup(dev);
2143 goto out;
2144 }
2145
2146 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2147 {
2148 struct b43legacy_phy *phy = &dev->phy;
2149
2150 if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2151 return;
2152
2153 b43legacy_mac_suspend(dev);
2154 b43legacy_phy_lo_g_measure(dev);
2155 b43legacy_mac_enable(dev);
2156 }
2157
2158 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2159 {
2160 b43legacy_phy_lo_mark_all_unused(dev);
2161 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2162 b43legacy_mac_suspend(dev);
2163 b43legacy_calc_nrssi_slope(dev);
2164 b43legacy_mac_enable(dev);
2165 }
2166 }
2167
2168 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2169 {
2170 /* Update device statistics. */
2171 b43legacy_calculate_link_quality(dev);
2172 }
2173
2174 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2175 {
2176 b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2177
2178 atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2179 wmb();
2180 }
2181
2182 static void do_periodic_work(struct b43legacy_wldev *dev)
2183 {
2184 unsigned int state;
2185
2186 state = dev->periodic_state;
2187 if (state % 8 == 0)
2188 b43legacy_periodic_every120sec(dev);
2189 if (state % 4 == 0)
2190 b43legacy_periodic_every60sec(dev);
2191 if (state % 2 == 0)
2192 b43legacy_periodic_every30sec(dev);
2193 b43legacy_periodic_every15sec(dev);
2194 }
2195
2196 /* Periodic work locking policy:
2197 * The whole periodic work handler is protected by
2198 * wl->mutex. If another lock is needed somewhere in the
2199 * pwork callchain, it's aquired in-place, where it's needed.
2200 */
2201 static void b43legacy_periodic_work_handler(struct work_struct *work)
2202 {
2203 struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2204 periodic_work.work);
2205 struct b43legacy_wl *wl = dev->wl;
2206 unsigned long delay;
2207
2208 mutex_lock(&wl->mutex);
2209
2210 if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2211 goto out;
2212 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2213 goto out_requeue;
2214
2215 do_periodic_work(dev);
2216
2217 dev->periodic_state++;
2218 out_requeue:
2219 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2220 delay = msecs_to_jiffies(50);
2221 else
2222 delay = round_jiffies_relative(HZ * 15);
2223 queue_delayed_work(wl->hw->workqueue, &dev->periodic_work, delay);
2224 out:
2225 mutex_unlock(&wl->mutex);
2226 }
2227
2228 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2229 {
2230 struct delayed_work *work = &dev->periodic_work;
2231
2232 dev->periodic_state = 0;
2233 INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2234 queue_delayed_work(dev->wl->hw->workqueue, work, 0);
2235 }
2236
2237 /* Validate access to the chip (SHM) */
2238 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2239 {
2240 u32 value;
2241 u32 shm_backup;
2242
2243 shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2244 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2245 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2246 0xAA5555AA)
2247 goto error;
2248 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2249 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2250 0x55AAAA55)
2251 goto error;
2252 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2253
2254 value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2255 if ((value | B43legacy_MACCTL_GMODE) !=
2256 (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2257 goto error;
2258
2259 value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2260 if (value)
2261 goto error;
2262
2263 return 0;
2264 error:
2265 b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2266 return -ENODEV;
2267 }
2268
2269 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2270 {
2271 dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2272 B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2273 dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2274 0x0056);
2275 /* KTP is a word address, but we address SHM bytewise.
2276 * So multiply by two.
2277 */
2278 dev->ktp *= 2;
2279 if (dev->dev->id.revision >= 5)
2280 /* Number of RCMTA address slots */
2281 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2282 dev->max_nr_keys - 8);
2283 }
2284
2285 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2286 {
2287 struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2288 unsigned long flags;
2289
2290 /* Don't take wl->mutex here, as it could deadlock with
2291 * hwrng internal locking. It's not needed to take
2292 * wl->mutex here, anyway. */
2293
2294 spin_lock_irqsave(&wl->irq_lock, flags);
2295 *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2296 spin_unlock_irqrestore(&wl->irq_lock, flags);
2297
2298 return (sizeof(u16));
2299 }
2300
2301 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2302 {
2303 if (wl->rng_initialized)
2304 hwrng_unregister(&wl->rng);
2305 }
2306
2307 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2308 {
2309 int err;
2310
2311 snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2312 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2313 wl->rng.name = wl->rng_name;
2314 wl->rng.data_read = b43legacy_rng_read;
2315 wl->rng.priv = (unsigned long)wl;
2316 wl->rng_initialized = 1;
2317 err = hwrng_register(&wl->rng);
2318 if (err) {
2319 wl->rng_initialized = 0;
2320 b43legacyerr(wl, "Failed to register the random "
2321 "number generator (%d)\n", err);
2322 }
2323
2324 return err;
2325 }
2326
2327 static int b43legacy_op_tx(struct ieee80211_hw *hw,
2328 struct sk_buff *skb,
2329 struct ieee80211_tx_control *ctl)
2330 {
2331 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2332 struct b43legacy_wldev *dev = wl->current_dev;
2333 int err = -ENODEV;
2334 unsigned long flags;
2335
2336 if (unlikely(!dev))
2337 goto out;
2338 if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
2339 goto out;
2340 /* DMA-TX is done without a global lock. */
2341 if (b43legacy_using_pio(dev)) {
2342 spin_lock_irqsave(&wl->irq_lock, flags);
2343 err = b43legacy_pio_tx(dev, skb, ctl);
2344 spin_unlock_irqrestore(&wl->irq_lock, flags);
2345 } else
2346 err = b43legacy_dma_tx(dev, skb, ctl);
2347 out:
2348 if (unlikely(err))
2349 return NETDEV_TX_BUSY;
2350 return NETDEV_TX_OK;
2351 }
2352
2353 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2354 int queue,
2355 const struct ieee80211_tx_queue_params *params)
2356 {
2357 return 0;
2358 }
2359
2360 static int b43legacy_op_get_tx_stats(struct ieee80211_hw *hw,
2361 struct ieee80211_tx_queue_stats *stats)
2362 {
2363 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2364 struct b43legacy_wldev *dev = wl->current_dev;
2365 unsigned long flags;
2366 int err = -ENODEV;
2367
2368 if (!dev)
2369 goto out;
2370 spin_lock_irqsave(&wl->irq_lock, flags);
2371 if (likely(b43legacy_status(dev) >= B43legacy_STAT_STARTED)) {
2372 if (b43legacy_using_pio(dev))
2373 b43legacy_pio_get_tx_stats(dev, stats);
2374 else
2375 b43legacy_dma_get_tx_stats(dev, stats);
2376 err = 0;
2377 }
2378 spin_unlock_irqrestore(&wl->irq_lock, flags);
2379 out:
2380 return err;
2381 }
2382
2383 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2384 struct ieee80211_low_level_stats *stats)
2385 {
2386 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2387 unsigned long flags;
2388
2389 spin_lock_irqsave(&wl->irq_lock, flags);
2390 memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2391 spin_unlock_irqrestore(&wl->irq_lock, flags);
2392
2393 return 0;
2394 }
2395
2396 static const char *phymode_to_string(unsigned int phymode)
2397 {
2398 switch (phymode) {
2399 case B43legacy_PHYMODE_B:
2400 return "B";
2401 case B43legacy_PHYMODE_G:
2402 return "G";
2403 default:
2404 B43legacy_BUG_ON(1);
2405 }
2406 return "";
2407 }
2408
2409 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2410 unsigned int phymode,
2411 struct b43legacy_wldev **dev,
2412 bool *gmode)
2413 {
2414 struct b43legacy_wldev *d;
2415
2416 list_for_each_entry(d, &wl->devlist, list) {
2417 if (d->phy.possible_phymodes & phymode) {
2418 /* Ok, this device supports the PHY-mode.
2419 * Set the gmode bit. */
2420 *gmode = 1;
2421 *dev = d;
2422
2423 return 0;
2424 }
2425 }
2426
2427 return -ESRCH;
2428 }
2429
2430 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2431 {
2432 struct ssb_device *sdev = dev->dev;
2433 u32 tmslow;
2434
2435 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2436 tmslow &= ~B43legacy_TMSLOW_GMODE;
2437 tmslow |= B43legacy_TMSLOW_PHYRESET;
2438 tmslow |= SSB_TMSLOW_FGC;
2439 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2440 msleep(1);
2441
2442 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2443 tmslow &= ~SSB_TMSLOW_FGC;
2444 tmslow |= B43legacy_TMSLOW_PHYRESET;
2445 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2446 msleep(1);
2447 }
2448
2449 /* Expects wl->mutex locked */
2450 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2451 unsigned int new_mode)
2452 {
2453 struct b43legacy_wldev *up_dev;
2454 struct b43legacy_wldev *down_dev;
2455 int err;
2456 bool gmode = 0;
2457 int prev_status;
2458
2459 err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2460 if (err) {
2461 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2462 phymode_to_string(new_mode));
2463 return err;
2464 }
2465 if ((up_dev == wl->current_dev) &&
2466 (!!wl->current_dev->phy.gmode == !!gmode))
2467 /* This device is already running. */
2468 return 0;
2469 b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2470 phymode_to_string(new_mode));
2471 down_dev = wl->current_dev;
2472
2473 prev_status = b43legacy_status(down_dev);
2474 /* Shutdown the currently running core. */
2475 if (prev_status >= B43legacy_STAT_STARTED)
2476 b43legacy_wireless_core_stop(down_dev);
2477 if (prev_status >= B43legacy_STAT_INITIALIZED)
2478 b43legacy_wireless_core_exit(down_dev);
2479
2480 if (down_dev != up_dev)
2481 /* We switch to a different core, so we put PHY into
2482 * RESET on the old core. */
2483 b43legacy_put_phy_into_reset(down_dev);
2484
2485 /* Now start the new core. */
2486 up_dev->phy.gmode = gmode;
2487 if (prev_status >= B43legacy_STAT_INITIALIZED) {
2488 err = b43legacy_wireless_core_init(up_dev);
2489 if (err) {
2490 b43legacyerr(wl, "Fatal: Could not initialize device"
2491 " for newly selected %s-PHY mode\n",
2492 phymode_to_string(new_mode));
2493 goto init_failure;
2494 }
2495 }
2496 if (prev_status >= B43legacy_STAT_STARTED) {
2497 err = b43legacy_wireless_core_start(up_dev);
2498 if (err) {
2499 b43legacyerr(wl, "Fatal: Coult not start device for "
2500 "newly selected %s-PHY mode\n",
2501 phymode_to_string(new_mode));
2502 b43legacy_wireless_core_exit(up_dev);
2503 goto init_failure;
2504 }
2505 }
2506 B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2507
2508 b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2509
2510 wl->current_dev = up_dev;
2511
2512 return 0;
2513 init_failure:
2514 /* Whoops, failed to init the new core. No core is operating now. */
2515 wl->current_dev = NULL;
2516 return err;
2517 }
2518
2519 static int b43legacy_antenna_from_ieee80211(u8 antenna)
2520 {
2521 switch (antenna) {
2522 case 0: /* default/diversity */
2523 return B43legacy_ANTENNA_DEFAULT;
2524 case 1: /* Antenna 0 */
2525 return B43legacy_ANTENNA0;
2526 case 2: /* Antenna 1 */
2527 return B43legacy_ANTENNA1;
2528 default:
2529 return B43legacy_ANTENNA_DEFAULT;
2530 }
2531 }
2532
2533 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2534 struct ieee80211_conf *conf)
2535 {
2536 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2537 struct b43legacy_wldev *dev;
2538 struct b43legacy_phy *phy;
2539 unsigned long flags;
2540 unsigned int new_phymode = 0xFFFF;
2541 int antenna_tx;
2542 int antenna_rx;
2543 int err = 0;
2544 u32 savedirqs;
2545
2546 antenna_tx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_tx);
2547 antenna_rx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_rx);
2548
2549 mutex_lock(&wl->mutex);
2550
2551 /* Switch the PHY mode (if necessary). */
2552 switch (conf->phymode) {
2553 case MODE_IEEE80211B:
2554 new_phymode = B43legacy_PHYMODE_B;
2555 break;
2556 case MODE_IEEE80211G:
2557 new_phymode = B43legacy_PHYMODE_G;
2558 break;
2559 default:
2560 B43legacy_WARN_ON(1);
2561 }
2562 err = b43legacy_switch_phymode(wl, new_phymode);
2563 if (err)
2564 goto out_unlock_mutex;
2565 dev = wl->current_dev;
2566 phy = &dev->phy;
2567
2568 /* Disable IRQs while reconfiguring the device.
2569 * This makes it possible to drop the spinlock throughout
2570 * the reconfiguration process. */
2571 spin_lock_irqsave(&wl->irq_lock, flags);
2572 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2573 spin_unlock_irqrestore(&wl->irq_lock, flags);
2574 goto out_unlock_mutex;
2575 }
2576 savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
2577 spin_unlock_irqrestore(&wl->irq_lock, flags);
2578 b43legacy_synchronize_irq(dev);
2579
2580 /* Switch to the requested channel.
2581 * The firmware takes care of races with the TX handler. */
2582 if (conf->channel_val != phy->channel)
2583 b43legacy_radio_selectchannel(dev, conf->channel_val, 0);
2584
2585 /* Enable/Disable ShortSlot timing. */
2586 if ((!!(conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME))
2587 != dev->short_slot) {
2588 B43legacy_WARN_ON(phy->type != B43legacy_PHYTYPE_G);
2589 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME)
2590 b43legacy_short_slot_timing_enable(dev);
2591 else
2592 b43legacy_short_slot_timing_disable(dev);
2593 }
2594
2595 dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
2596
2597 /* Adjust the desired TX power level. */
2598 if (conf->power_level != 0) {
2599 if (conf->power_level != phy->power_level) {
2600 phy->power_level = conf->power_level;
2601 b43legacy_phy_xmitpower(dev);
2602 }
2603 }
2604
2605 /* Antennas for RX and management frame TX. */
2606 b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2607
2608 /* Update templates for AP mode. */
2609 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
2610 b43legacy_set_beacon_int(dev, conf->beacon_int);
2611
2612
2613 if (!!conf->radio_enabled != phy->radio_on) {
2614 if (conf->radio_enabled) {
2615 b43legacy_radio_turn_on(dev);
2616 b43legacyinfo(dev->wl, "Radio turned on by software\n");
2617 if (!dev->radio_hw_enable)
2618 b43legacyinfo(dev->wl, "The hardware RF-kill"
2619 " button still turns the radio"
2620 " physically off. Press the"
2621 " button to turn it on.\n");
2622 } else {
2623 b43legacy_radio_turn_off(dev, 0);
2624 b43legacyinfo(dev->wl, "Radio turned off by"
2625 " software\n");
2626 }
2627 }
2628
2629 spin_lock_irqsave(&wl->irq_lock, flags);
2630 b43legacy_interrupt_enable(dev, savedirqs);
2631 mmiowb();
2632 spin_unlock_irqrestore(&wl->irq_lock, flags);
2633 out_unlock_mutex:
2634 mutex_unlock(&wl->mutex);
2635
2636 return err;
2637 }
2638
2639 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2640 unsigned int changed,
2641 unsigned int *fflags,
2642 int mc_count,
2643 struct dev_addr_list *mc_list)
2644 {
2645 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2646 struct b43legacy_wldev *dev = wl->current_dev;
2647 unsigned long flags;
2648
2649 if (!dev) {
2650 *fflags = 0;
2651 return;
2652 }
2653
2654 spin_lock_irqsave(&wl->irq_lock, flags);
2655 *fflags &= FIF_PROMISC_IN_BSS |
2656 FIF_ALLMULTI |
2657 FIF_FCSFAIL |
2658 FIF_PLCPFAIL |
2659 FIF_CONTROL |
2660 FIF_OTHER_BSS |
2661 FIF_BCN_PRBRESP_PROMISC;
2662
2663 changed &= FIF_PROMISC_IN_BSS |
2664 FIF_ALLMULTI |
2665 FIF_FCSFAIL |
2666 FIF_PLCPFAIL |
2667 FIF_CONTROL |
2668 FIF_OTHER_BSS |
2669 FIF_BCN_PRBRESP_PROMISC;
2670
2671 wl->filter_flags = *fflags;
2672
2673 if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2674 b43legacy_adjust_opmode(dev);
2675 spin_unlock_irqrestore(&wl->irq_lock, flags);
2676 }
2677
2678 static int b43legacy_op_config_interface(struct ieee80211_hw *hw,
2679 struct ieee80211_vif *vif,
2680 struct ieee80211_if_conf *conf)
2681 {
2682 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2683 struct b43legacy_wldev *dev = wl->current_dev;
2684 unsigned long flags;
2685
2686 if (!dev)
2687 return -ENODEV;
2688 mutex_lock(&wl->mutex);
2689 spin_lock_irqsave(&wl->irq_lock, flags);
2690 B43legacy_WARN_ON(wl->vif != vif);
2691 if (conf->bssid)
2692 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2693 else
2694 memset(wl->bssid, 0, ETH_ALEN);
2695 if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2696 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP)) {
2697 B43legacy_WARN_ON(conf->type != IEEE80211_IF_TYPE_AP);
2698 b43legacy_set_ssid(dev, conf->ssid, conf->ssid_len);
2699 if (conf->beacon)
2700 b43legacy_refresh_templates(dev, conf->beacon);
2701 }
2702 b43legacy_write_mac_bssid_templates(dev);
2703 }
2704 spin_unlock_irqrestore(&wl->irq_lock, flags);
2705 mutex_unlock(&wl->mutex);
2706
2707 return 0;
2708 }
2709
2710 /* Locking: wl->mutex */
2711 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2712 {
2713 struct b43legacy_wl *wl = dev->wl;
2714 unsigned long flags;
2715
2716 if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2717 return;
2718
2719 /* Disable and sync interrupts. We must do this before than
2720 * setting the status to INITIALIZED, as the interrupt handler
2721 * won't care about IRQs then. */
2722 spin_lock_irqsave(&wl->irq_lock, flags);
2723 dev->irq_savedstate = b43legacy_interrupt_disable(dev,
2724 B43legacy_IRQ_ALL);
2725 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2726 spin_unlock_irqrestore(&wl->irq_lock, flags);
2727 b43legacy_synchronize_irq(dev);
2728
2729 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2730
2731 mutex_unlock(&wl->mutex);
2732 /* Must unlock as it would otherwise deadlock. No races here.
2733 * Cancel the possibly running self-rearming periodic work. */
2734 cancel_delayed_work_sync(&dev->periodic_work);
2735 mutex_lock(&wl->mutex);
2736
2737 ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */
2738
2739 b43legacy_mac_suspend(dev);
2740 free_irq(dev->dev->irq, dev);
2741 b43legacydbg(wl, "Wireless interface stopped\n");
2742 }
2743
2744 /* Locking: wl->mutex */
2745 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2746 {
2747 int err;
2748
2749 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2750
2751 drain_txstatus_queue(dev);
2752 err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2753 IRQF_SHARED, KBUILD_MODNAME, dev);
2754 if (err) {
2755 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2756 dev->dev->irq);
2757 goto out;
2758 }
2759 /* We are ready to run. */
2760 b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2761
2762 /* Start data flow (TX/RX) */
2763 b43legacy_mac_enable(dev);
2764 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
2765 ieee80211_start_queues(dev->wl->hw);
2766
2767 /* Start maintenance work */
2768 b43legacy_periodic_tasks_setup(dev);
2769
2770 b43legacydbg(dev->wl, "Wireless interface started\n");
2771 out:
2772 return err;
2773 }
2774
2775 /* Get PHY and RADIO versioning numbers */
2776 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2777 {
2778 struct b43legacy_phy *phy = &dev->phy;
2779 u32 tmp;
2780 u8 analog_type;
2781 u8 phy_type;
2782 u8 phy_rev;
2783 u16 radio_manuf;
2784 u16 radio_ver;
2785 u16 radio_rev;
2786 int unsupported = 0;
2787
2788 /* Get PHY versioning */
2789 tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2790 analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2791 >> B43legacy_PHYVER_ANALOG_SHIFT;
2792 phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2793 phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2794 switch (phy_type) {
2795 case B43legacy_PHYTYPE_B:
2796 if (phy_rev != 2 && phy_rev != 4
2797 && phy_rev != 6 && phy_rev != 7)
2798 unsupported = 1;
2799 break;
2800 case B43legacy_PHYTYPE_G:
2801 if (phy_rev > 8)
2802 unsupported = 1;
2803 break;
2804 default:
2805 unsupported = 1;
2806 };
2807 if (unsupported) {
2808 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
2809 "(Analog %u, Type %u, Revision %u)\n",
2810 analog_type, phy_type, phy_rev);
2811 return -EOPNOTSUPP;
2812 }
2813 b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
2814 analog_type, phy_type, phy_rev);
2815
2816
2817 /* Get RADIO versioning */
2818 if (dev->dev->bus->chip_id == 0x4317) {
2819 if (dev->dev->bus->chip_rev == 0)
2820 tmp = 0x3205017F;
2821 else if (dev->dev->bus->chip_rev == 1)
2822 tmp = 0x4205017F;
2823 else
2824 tmp = 0x5205017F;
2825 } else {
2826 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2827 B43legacy_RADIOCTL_ID);
2828 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
2829 tmp <<= 16;
2830 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2831 B43legacy_RADIOCTL_ID);
2832 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
2833 }
2834 radio_manuf = (tmp & 0x00000FFF);
2835 radio_ver = (tmp & 0x0FFFF000) >> 12;
2836 radio_rev = (tmp & 0xF0000000) >> 28;
2837 switch (phy_type) {
2838 case B43legacy_PHYTYPE_B:
2839 if ((radio_ver & 0xFFF0) != 0x2050)
2840 unsupported = 1;
2841 break;
2842 case B43legacy_PHYTYPE_G:
2843 if (radio_ver != 0x2050)
2844 unsupported = 1;
2845 break;
2846 default:
2847 B43legacy_BUG_ON(1);
2848 }
2849 if (unsupported) {
2850 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
2851 "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
2852 radio_manuf, radio_ver, radio_rev);
2853 return -EOPNOTSUPP;
2854 }
2855 b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
2856 " Revision %u\n", radio_manuf, radio_ver, radio_rev);
2857
2858
2859 phy->radio_manuf = radio_manuf;
2860 phy->radio_ver = radio_ver;
2861 phy->radio_rev = radio_rev;
2862
2863 phy->analog = analog_type;
2864 phy->type = phy_type;
2865 phy->rev = phy_rev;
2866
2867 return 0;
2868 }
2869
2870 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
2871 struct b43legacy_phy *phy)
2872 {
2873 struct b43legacy_lopair *lo;
2874 int i;
2875
2876 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
2877 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
2878
2879 /* Assume the radio is enabled. If it's not enabled, the state will
2880 * immediately get fixed on the first periodic work run. */
2881 dev->radio_hw_enable = 1;
2882
2883 phy->savedpctlreg = 0xFFFF;
2884 phy->aci_enable = 0;
2885 phy->aci_wlan_automatic = 0;
2886 phy->aci_hw_rssi = 0;
2887
2888 lo = phy->_lo_pairs;
2889 if (lo)
2890 memset(lo, 0, sizeof(struct b43legacy_lopair) *
2891 B43legacy_LO_COUNT);
2892 phy->max_lb_gain = 0;
2893 phy->trsw_rx_gain = 0;
2894
2895 /* Set default attenuation values. */
2896 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
2897 phy->rfatt = b43legacy_default_radio_attenuation(dev);
2898 phy->txctl1 = b43legacy_default_txctl1(dev);
2899 phy->txpwr_offset = 0;
2900
2901 /* NRSSI */
2902 phy->nrssislope = 0;
2903 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
2904 phy->nrssi[i] = -1000;
2905 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
2906 phy->nrssi_lt[i] = i;
2907
2908 phy->lofcal = 0xFFFF;
2909 phy->initval = 0xFFFF;
2910
2911 phy->interfmode = B43legacy_INTERFMODE_NONE;
2912 phy->channel = 0xFF;
2913 }
2914
2915 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
2916 {
2917 /* Flags */
2918 dev->reg124_set_0x4 = 0;
2919
2920 /* Stats */
2921 memset(&dev->stats, 0, sizeof(dev->stats));
2922
2923 setup_struct_phy_for_init(dev, &dev->phy);
2924
2925 /* IRQ related flags */
2926 dev->irq_reason = 0;
2927 memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
2928 dev->irq_savedstate = B43legacy_IRQ_MASKTEMPLATE;
2929
2930 dev->mac_suspended = 1;
2931
2932 /* Noise calculation context */
2933 memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
2934 }
2935
2936 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev *dev)
2937 {
2938 #ifdef CONFIG_SSB_DRIVER_PCICORE
2939 struct ssb_bus *bus = dev->dev->bus;
2940 u32 tmp;
2941
2942 if (bus->pcicore.dev &&
2943 bus->pcicore.dev->id.coreid == SSB_DEV_PCI &&
2944 bus->pcicore.dev->id.revision <= 5) {
2945 /* IMCFGLO timeouts workaround. */
2946 tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
2947 tmp &= ~SSB_IMCFGLO_REQTO;
2948 tmp &= ~SSB_IMCFGLO_SERTO;
2949 switch (bus->bustype) {
2950 case SSB_BUSTYPE_PCI:
2951 case SSB_BUSTYPE_PCMCIA:
2952 tmp |= 0x32;
2953 break;
2954 case SSB_BUSTYPE_SSB:
2955 tmp |= 0x53;
2956 break;
2957 }
2958 ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
2959 }
2960 #endif /* CONFIG_SSB_DRIVER_PCICORE */
2961 }
2962
2963 /* Write the short and long frame retry limit values. */
2964 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2965 unsigned int short_retry,
2966 unsigned int long_retry)
2967 {
2968 /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2969 * the chip-internal counter. */
2970 short_retry = min(short_retry, (unsigned int)0xF);
2971 long_retry = min(long_retry, (unsigned int)0xF);
2972
2973 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2974 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2975 }
2976
2977 /* Shutdown a wireless core */
2978 /* Locking: wl->mutex */
2979 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
2980 {
2981 struct b43legacy_wl *wl = dev->wl;
2982 struct b43legacy_phy *phy = &dev->phy;
2983 u32 macctl;
2984
2985 B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
2986 if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
2987 return;
2988 b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
2989
2990 /* Stop the microcode PSM. */
2991 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2992 macctl &= ~B43legacy_MACCTL_PSM_RUN;
2993 macctl |= B43legacy_MACCTL_PSM_JMP0;
2994 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2995
2996 mutex_unlock(&wl->mutex);
2997 /* Must unlock as it would otherwise deadlock. No races here.
2998 * Cancel possibly pending workqueues. */
2999 cancel_work_sync(&dev->restart_work);
3000 mutex_lock(&wl->mutex);
3001
3002 b43legacy_leds_exit(dev);
3003 b43legacy_rng_exit(dev->wl);
3004 b43legacy_pio_free(dev);
3005 b43legacy_dma_free(dev);
3006 b43legacy_chip_exit(dev);
3007 b43legacy_radio_turn_off(dev, 1);
3008 b43legacy_switch_analog(dev, 0);
3009 if (phy->dyn_tssi_tbl)
3010 kfree(phy->tssi2dbm);
3011 kfree(phy->lo_control);
3012 phy->lo_control = NULL;
3013 ssb_device_disable(dev->dev, 0);
3014 ssb_bus_may_powerdown(dev->dev->bus);
3015 }
3016
3017 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3018 {
3019 struct b43legacy_phy *phy = &dev->phy;
3020 int i;
3021
3022 /* Set default attenuation values. */
3023 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3024 phy->rfatt = b43legacy_default_radio_attenuation(dev);
3025 phy->txctl1 = b43legacy_default_txctl1(dev);
3026 phy->txctl2 = 0xFFFF;
3027 phy->txpwr_offset = 0;
3028
3029 /* NRSSI */
3030 phy->nrssislope = 0;
3031 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3032 phy->nrssi[i] = -1000;
3033 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3034 phy->nrssi_lt[i] = i;
3035
3036 phy->lofcal = 0xFFFF;
3037 phy->initval = 0xFFFF;
3038
3039 phy->aci_enable = 0;
3040 phy->aci_wlan_automatic = 0;
3041 phy->aci_hw_rssi = 0;
3042
3043 phy->antenna_diversity = 0xFFFF;
3044 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3045 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3046
3047 /* Flags */
3048 phy->calibrated = 0;
3049
3050 if (phy->_lo_pairs)
3051 memset(phy->_lo_pairs, 0,
3052 sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3053 memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3054 }
3055
3056 /* Initialize a wireless core */
3057 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3058 {
3059 struct b43legacy_wl *wl = dev->wl;
3060 struct ssb_bus *bus = dev->dev->bus;
3061 struct b43legacy_phy *phy = &dev->phy;
3062 struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3063 int err;
3064 u32 hf;
3065 u32 tmp;
3066
3067 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3068
3069 err = ssb_bus_powerup(bus, 0);
3070 if (err)
3071 goto out;
3072 if (!ssb_device_is_enabled(dev->dev)) {
3073 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3074 b43legacy_wireless_core_reset(dev, tmp);
3075 }
3076
3077 if ((phy->type == B43legacy_PHYTYPE_B) ||
3078 (phy->type == B43legacy_PHYTYPE_G)) {
3079 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3080 * B43legacy_LO_COUNT,
3081 GFP_KERNEL);
3082 if (!phy->_lo_pairs)
3083 return -ENOMEM;
3084 }
3085 setup_struct_wldev_for_init(dev);
3086
3087 err = b43legacy_phy_init_tssi2dbm_table(dev);
3088 if (err)
3089 goto err_kfree_lo_control;
3090
3091 /* Enable IRQ routing to this device. */
3092 ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3093
3094 b43legacy_imcfglo_timeouts_workaround(dev);
3095 prepare_phy_data_for_init(dev);
3096 b43legacy_phy_calibrate(dev);
3097 err = b43legacy_chip_init(dev);
3098 if (err)
3099 goto err_kfree_tssitbl;
3100 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3101 B43legacy_SHM_SH_WLCOREREV,
3102 dev->dev->id.revision);
3103 hf = b43legacy_hf_read(dev);
3104 if (phy->type == B43legacy_PHYTYPE_G) {
3105 hf |= B43legacy_HF_SYMW;
3106 if (phy->rev == 1)
3107 hf |= B43legacy_HF_GDCW;
3108 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3109 hf |= B43legacy_HF_OFDMPABOOST;
3110 } else if (phy->type == B43legacy_PHYTYPE_B) {
3111 hf |= B43legacy_HF_SYMW;
3112 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3113 hf &= ~B43legacy_HF_GDCW;
3114 }
3115 b43legacy_hf_write(dev, hf);
3116
3117 b43legacy_set_retry_limits(dev,
3118 B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3119 B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3120
3121 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3122 0x0044, 3);
3123 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3124 0x0046, 2);
3125
3126 /* Disable sending probe responses from firmware.
3127 * Setting the MaxTime to one usec will always trigger
3128 * a timeout, so we never send any probe resp.
3129 * A timeout of zero is infinite. */
3130 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3131 B43legacy_SHM_SH_PRMAXTIME, 1);
3132
3133 b43legacy_rate_memory_init(dev);
3134
3135 /* Minimum Contention Window */
3136 if (phy->type == B43legacy_PHYTYPE_B)
3137 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3138 0x0003, 31);
3139 else
3140 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3141 0x0003, 15);
3142 /* Maximum Contention Window */
3143 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3144 0x0004, 1023);
3145
3146 do {
3147 if (b43legacy_using_pio(dev))
3148 err = b43legacy_pio_init(dev);
3149 else {
3150 err = b43legacy_dma_init(dev);
3151 if (!err)
3152 b43legacy_qos_init(dev);
3153 }
3154 } while (err == -EAGAIN);
3155 if (err)
3156 goto err_chip_exit;
3157
3158 b43legacy_write16(dev, 0x0612, 0x0050);
3159 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0416, 0x0050);
3160 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0414, 0x01F4);
3161
3162 ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3163 memset(wl->bssid, 0, ETH_ALEN);
3164 memset(wl->mac_addr, 0, ETH_ALEN);
3165 b43legacy_upload_card_macaddress(dev);
3166 b43legacy_security_init(dev);
3167 b43legacy_rng_init(wl);
3168
3169 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3170
3171 b43legacy_leds_init(dev);
3172 out:
3173 return err;
3174
3175 err_chip_exit:
3176 b43legacy_chip_exit(dev);
3177 err_kfree_tssitbl:
3178 if (phy->dyn_tssi_tbl)
3179 kfree(phy->tssi2dbm);
3180 err_kfree_lo_control:
3181 kfree(phy->lo_control);
3182 phy->lo_control = NULL;
3183 ssb_bus_may_powerdown(bus);
3184 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3185 return err;
3186 }
3187
3188 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3189 struct ieee80211_if_init_conf *conf)
3190 {
3191 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3192 struct b43legacy_wldev *dev;
3193 unsigned long flags;
3194 int err = -EOPNOTSUPP;
3195
3196 /* TODO: allow WDS/AP devices to coexist */
3197
3198 if (conf->type != IEEE80211_IF_TYPE_AP &&
3199 conf->type != IEEE80211_IF_TYPE_STA &&
3200 conf->type != IEEE80211_IF_TYPE_WDS &&
3201 conf->type != IEEE80211_IF_TYPE_IBSS)
3202 return -EOPNOTSUPP;
3203
3204 mutex_lock(&wl->mutex);
3205 if (wl->operating)
3206 goto out_mutex_unlock;
3207
3208 b43legacydbg(wl, "Adding Interface type %d\n", conf->type);
3209
3210 dev = wl->current_dev;
3211 wl->operating = 1;
3212 wl->vif = conf->vif;
3213 wl->if_type = conf->type;
3214 memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN);
3215
3216 spin_lock_irqsave(&wl->irq_lock, flags);
3217 b43legacy_adjust_opmode(dev);
3218 b43legacy_upload_card_macaddress(dev);
3219 spin_unlock_irqrestore(&wl->irq_lock, flags);
3220
3221 err = 0;
3222 out_mutex_unlock:
3223 mutex_unlock(&wl->mutex);
3224
3225 return err;
3226 }
3227
3228 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3229 struct ieee80211_if_init_conf *conf)
3230 {
3231 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3232 struct b43legacy_wldev *dev = wl->current_dev;
3233 unsigned long flags;
3234
3235 b43legacydbg(wl, "Removing Interface type %d\n", conf->type);
3236
3237 mutex_lock(&wl->mutex);
3238
3239 B43legacy_WARN_ON(!wl->operating);
3240 B43legacy_WARN_ON(wl->vif != conf->vif);
3241 wl->vif = NULL;
3242
3243 wl->operating = 0;
3244
3245 spin_lock_irqsave(&wl->irq_lock, flags);
3246 b43legacy_adjust_opmode(dev);
3247 memset(wl->mac_addr, 0, ETH_ALEN);
3248 b43legacy_upload_card_macaddress(dev);
3249 spin_unlock_irqrestore(&wl->irq_lock, flags);
3250
3251 mutex_unlock(&wl->mutex);
3252 }
3253
3254 static int b43legacy_op_start(struct ieee80211_hw *hw)
3255 {
3256 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3257 struct b43legacy_wldev *dev = wl->current_dev;
3258 int did_init = 0;
3259 int err = 0;
3260 bool do_rfkill_exit = 0;
3261
3262 /* First register RFkill.
3263 * LEDs that are registered later depend on it. */
3264 b43legacy_rfkill_init(dev);
3265
3266 mutex_lock(&wl->mutex);
3267
3268 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3269 err = b43legacy_wireless_core_init(dev);
3270 if (err) {
3271 do_rfkill_exit = 1;
3272 goto out_mutex_unlock;
3273 }
3274 did_init = 1;
3275 }
3276
3277 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3278 err = b43legacy_wireless_core_start(dev);
3279 if (err) {
3280 if (did_init)
3281 b43legacy_wireless_core_exit(dev);
3282 do_rfkill_exit = 1;
3283 goto out_mutex_unlock;
3284 }
3285 }
3286
3287 out_mutex_unlock:
3288 mutex_unlock(&wl->mutex);
3289
3290 if (do_rfkill_exit)
3291 b43legacy_rfkill_exit(dev);
3292
3293 return err;
3294 }
3295
3296 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3297 {
3298 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3299 struct b43legacy_wldev *dev = wl->current_dev;
3300
3301 b43legacy_rfkill_exit(dev);
3302
3303 mutex_lock(&wl->mutex);
3304 if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3305 b43legacy_wireless_core_stop(dev);
3306 b43legacy_wireless_core_exit(dev);
3307 mutex_unlock(&wl->mutex);
3308 }
3309
3310 static int b43legacy_op_set_retry_limit(struct ieee80211_hw *hw,
3311 u32 short_retry_limit,
3312 u32 long_retry_limit)
3313 {
3314 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3315 struct b43legacy_wldev *dev;
3316 int err = 0;
3317
3318 mutex_lock(&wl->mutex);
3319 dev = wl->current_dev;
3320 if (unlikely(!dev ||
3321 (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED))) {
3322 err = -ENODEV;
3323 goto out_unlock;
3324 }
3325 b43legacy_set_retry_limits(dev, short_retry_limit, long_retry_limit);
3326 out_unlock:
3327 mutex_unlock(&wl->mutex);
3328
3329 return err;
3330 }
3331
3332 static const struct ieee80211_ops b43legacy_hw_ops = {
3333 .tx = b43legacy_op_tx,
3334 .conf_tx = b43legacy_op_conf_tx,
3335 .add_interface = b43legacy_op_add_interface,
3336 .remove_interface = b43legacy_op_remove_interface,
3337 .config = b43legacy_op_dev_config,
3338 .config_interface = b43legacy_op_config_interface,
3339 .configure_filter = b43legacy_op_configure_filter,
3340 .get_stats = b43legacy_op_get_stats,
3341 .get_tx_stats = b43legacy_op_get_tx_stats,
3342 .start = b43legacy_op_start,
3343 .stop = b43legacy_op_stop,
3344 .set_retry_limit = b43legacy_op_set_retry_limit,
3345 };
3346
3347 /* Hard-reset the chip. Do not call this directly.
3348 * Use b43legacy_controller_restart()
3349 */
3350 static void b43legacy_chip_reset(struct work_struct *work)
3351 {
3352 struct b43legacy_wldev *dev =
3353 container_of(work, struct b43legacy_wldev, restart_work);
3354 struct b43legacy_wl *wl = dev->wl;
3355 int err = 0;
3356 int prev_status;
3357
3358 mutex_lock(&wl->mutex);
3359
3360 prev_status = b43legacy_status(dev);
3361 /* Bring the device down... */
3362 if (prev_status >= B43legacy_STAT_STARTED)
3363 b43legacy_wireless_core_stop(dev);
3364 if (prev_status >= B43legacy_STAT_INITIALIZED)
3365 b43legacy_wireless_core_exit(dev);
3366
3367 /* ...and up again. */
3368 if (prev_status >= B43legacy_STAT_INITIALIZED) {
3369 err = b43legacy_wireless_core_init(dev);
3370 if (err)
3371 goto out;
3372 }
3373 if (prev_status >= B43legacy_STAT_STARTED) {
3374 err = b43legacy_wireless_core_start(dev);
3375 if (err) {
3376 b43legacy_wireless_core_exit(dev);
3377 goto out;
3378 }
3379 }
3380 out:
3381 mutex_unlock(&wl->mutex);
3382 if (err)
3383 b43legacyerr(wl, "Controller restart FAILED\n");
3384 else
3385 b43legacyinfo(wl, "Controller restarted\n");
3386 }
3387
3388 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3389 int have_bphy,
3390 int have_gphy)
3391 {
3392 struct ieee80211_hw *hw = dev->wl->hw;
3393 struct ieee80211_hw_mode *mode;
3394 struct b43legacy_phy *phy = &dev->phy;
3395 int cnt = 0;
3396 int err;
3397
3398 phy->possible_phymodes = 0;
3399 for (; 1; cnt++) {
3400 if (have_bphy) {
3401 B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3402 mode = &phy->hwmodes[cnt];
3403
3404 mode->mode = MODE_IEEE80211B;
3405 mode->num_channels = b43legacy_bg_chantable_size;
3406 mode->channels = b43legacy_bg_chantable;
3407 mode->num_rates = b43legacy_b_ratetable_size;
3408 mode->rates = b43legacy_b_ratetable;
3409 err = ieee80211_register_hwmode(hw, mode);
3410 if (err)
3411 return err;
3412
3413 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3414 have_bphy = 0;
3415 continue;
3416 }
3417 if (have_gphy) {
3418 B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3419 mode = &phy->hwmodes[cnt];
3420
3421 mode->mode = MODE_IEEE80211G;
3422 mode->num_channels = b43legacy_bg_chantable_size;
3423 mode->channels = b43legacy_bg_chantable;
3424 mode->num_rates = b43legacy_g_ratetable_size;
3425 mode->rates = b43legacy_g_ratetable;
3426 err = ieee80211_register_hwmode(hw, mode);
3427 if (err)
3428 return err;
3429
3430 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3431 have_gphy = 0;
3432 continue;
3433 }
3434 break;
3435 }
3436
3437 return 0;
3438 }
3439
3440 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3441 {
3442 /* We release firmware that late to not be required to re-request
3443 * is all the time when we reinit the core. */
3444 b43legacy_release_firmware(dev);
3445 }
3446
3447 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3448 {
3449 struct b43legacy_wl *wl = dev->wl;
3450 struct ssb_bus *bus = dev->dev->bus;
3451 struct pci_dev *pdev = bus->host_pci;
3452 int err;
3453 int have_bphy = 0;
3454 int have_gphy = 0;
3455 u32 tmp;
3456
3457 /* Do NOT do any device initialization here.
3458 * Do it in wireless_core_init() instead.
3459 * This function is for gathering basic information about the HW, only.
3460 * Also some structs may be set up here. But most likely you want to
3461 * have that in core_init(), too.
3462 */
3463
3464 err = ssb_bus_powerup(bus, 0);
3465 if (err) {
3466 b43legacyerr(wl, "Bus powerup failed\n");
3467 goto out;
3468 }
3469 /* Get the PHY type. */
3470 if (dev->dev->id.revision >= 5) {
3471 u32 tmshigh;
3472
3473 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3474 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3475 if (!have_gphy)
3476 have_bphy = 1;
3477 } else if (dev->dev->id.revision == 4)
3478 have_gphy = 1;
3479 else
3480 have_bphy = 1;
3481
3482 dev->phy.gmode = (have_gphy || have_bphy);
3483 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3484 b43legacy_wireless_core_reset(dev, tmp);
3485
3486 err = b43legacy_phy_versioning(dev);
3487 if (err)
3488 goto err_powerdown;
3489 /* Check if this device supports multiband. */
3490 if (!pdev ||
3491 (pdev->device != 0x4312 &&
3492 pdev->device != 0x4319 &&
3493 pdev->device != 0x4324)) {
3494 /* No multiband support. */
3495 have_bphy = 0;
3496 have_gphy = 0;
3497 switch (dev->phy.type) {
3498 case B43legacy_PHYTYPE_B:
3499 have_bphy = 1;
3500 break;
3501 case B43legacy_PHYTYPE_G:
3502 have_gphy = 1;
3503 break;
3504 default:
3505 B43legacy_BUG_ON(1);
3506 }
3507 }
3508 dev->phy.gmode = (have_gphy || have_bphy);
3509 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3510 b43legacy_wireless_core_reset(dev, tmp);
3511
3512 err = b43legacy_validate_chipaccess(dev);
3513 if (err)
3514 goto err_powerdown;
3515 err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3516 if (err)
3517 goto err_powerdown;
3518
3519 /* Now set some default "current_dev" */
3520 if (!wl->current_dev)
3521 wl->current_dev = dev;
3522 INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3523
3524 b43legacy_radio_turn_off(dev, 1);
3525 b43legacy_switch_analog(dev, 0);
3526 ssb_device_disable(dev->dev, 0);
3527 ssb_bus_may_powerdown(bus);
3528
3529 out:
3530 return err;
3531
3532 err_powerdown:
3533 ssb_bus_may_powerdown(bus);
3534 return err;
3535 }
3536
3537 static void b43legacy_one_core_detach(struct ssb_device *dev)
3538 {
3539 struct b43legacy_wldev *wldev;
3540 struct b43legacy_wl *wl;
3541
3542 wldev = ssb_get_drvdata(dev);
3543 wl = wldev->wl;
3544 cancel_work_sync(&wldev->restart_work);
3545 b43legacy_debugfs_remove_device(wldev);
3546 b43legacy_wireless_core_detach(wldev);
3547 list_del(&wldev->list);
3548 wl->nr_devs--;
3549 ssb_set_drvdata(dev, NULL);
3550 kfree(wldev);
3551 }
3552
3553 static int b43legacy_one_core_attach(struct ssb_device *dev,
3554 struct b43legacy_wl *wl)
3555 {
3556 struct b43legacy_wldev *wldev;
3557 struct pci_dev *pdev;
3558 int err = -ENOMEM;
3559
3560 if (!list_empty(&wl->devlist)) {
3561 /* We are not the first core on this chip. */
3562 pdev = dev->bus->host_pci;
3563 /* Only special chips support more than one wireless
3564 * core, although some of the other chips have more than
3565 * one wireless core as well. Check for this and
3566 * bail out early.
3567 */
3568 if (!pdev ||
3569 ((pdev->device != 0x4321) &&
3570 (pdev->device != 0x4313) &&
3571 (pdev->device != 0x431A))) {
3572 b43legacydbg(wl, "Ignoring unconnected 802.11 core\n");
3573 return -ENODEV;
3574 }
3575 }
3576
3577 wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3578 if (!wldev)
3579 goto out;
3580
3581 wldev->dev = dev;
3582 wldev->wl = wl;
3583 b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3584 wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3585 tasklet_init(&wldev->isr_tasklet,
3586 (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3587 (unsigned long)wldev);
3588 if (modparam_pio)
3589 wldev->__using_pio = 1;
3590 INIT_LIST_HEAD(&wldev->list);
3591
3592 err = b43legacy_wireless_core_attach(wldev);
3593 if (err)
3594 goto err_kfree_wldev;
3595
3596 list_add(&wldev->list, &wl->devlist);
3597 wl->nr_devs++;
3598 ssb_set_drvdata(dev, wldev);
3599 b43legacy_debugfs_add_device(wldev);
3600 out:
3601 return err;
3602
3603 err_kfree_wldev:
3604 kfree(wldev);
3605 return err;
3606 }
3607
3608 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3609 {
3610 /* boardflags workarounds */
3611 if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3612 bus->boardinfo.type == 0x4E &&
3613 bus->boardinfo.rev > 0x40)
3614 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3615 }
3616
3617 static void b43legacy_wireless_exit(struct ssb_device *dev,
3618 struct b43legacy_wl *wl)
3619 {
3620 struct ieee80211_hw *hw = wl->hw;
3621
3622 ssb_set_devtypedata(dev, NULL);
3623 ieee80211_free_hw(hw);
3624 }
3625
3626 static int b43legacy_wireless_init(struct ssb_device *dev)
3627 {
3628 struct ssb_sprom *sprom = &dev->bus->sprom;
3629 struct ieee80211_hw *hw;
3630 struct b43legacy_wl *wl;
3631 int err = -ENOMEM;
3632
3633 b43legacy_sprom_fixup(dev->bus);
3634
3635 hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3636 if (!hw) {
3637 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3638 goto out;
3639 }
3640
3641 /* fill hw info */
3642 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
3643 IEEE80211_HW_RX_INCLUDES_FCS;
3644 hw->max_signal = 100;
3645 hw->max_rssi = -110;
3646 hw->max_noise = -110;
3647 hw->queues = 1; /* FIXME: hardware has more queues */
3648 SET_IEEE80211_DEV(hw, dev->dev);
3649 if (is_valid_ether_addr(sprom->et1mac))
3650 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3651 else
3652 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3653
3654 /* Get and initialize struct b43legacy_wl */
3655 wl = hw_to_b43legacy_wl(hw);
3656 memset(wl, 0, sizeof(*wl));
3657 wl->hw = hw;
3658 spin_lock_init(&wl->irq_lock);
3659 spin_lock_init(&wl->leds_lock);
3660 mutex_init(&wl->mutex);
3661 INIT_LIST_HEAD(&wl->devlist);
3662
3663 ssb_set_devtypedata(dev, wl);
3664 b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
3665 err = 0;
3666 out:
3667 return err;
3668 }
3669
3670 static int b43legacy_probe(struct ssb_device *dev,
3671 const struct ssb_device_id *id)
3672 {
3673 struct b43legacy_wl *wl;
3674 int err;
3675 int first = 0;
3676
3677 wl = ssb_get_devtypedata(dev);
3678 if (!wl) {
3679 /* Probing the first core - setup common struct b43legacy_wl */
3680 first = 1;
3681 err = b43legacy_wireless_init(dev);
3682 if (err)
3683 goto out;
3684 wl = ssb_get_devtypedata(dev);
3685 B43legacy_WARN_ON(!wl);
3686 }
3687 err = b43legacy_one_core_attach(dev, wl);
3688 if (err)
3689 goto err_wireless_exit;
3690
3691 if (first) {
3692 err = ieee80211_register_hw(wl->hw);
3693 if (err)
3694 goto err_one_core_detach;
3695 }
3696
3697 out:
3698 return err;
3699
3700 err_one_core_detach:
3701 b43legacy_one_core_detach(dev);
3702 err_wireless_exit:
3703 if (first)
3704 b43legacy_wireless_exit(dev, wl);
3705 return err;
3706 }
3707
3708 static void b43legacy_remove(struct ssb_device *dev)
3709 {
3710 struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3711 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3712
3713 B43legacy_WARN_ON(!wl);
3714 if (wl->current_dev == wldev)
3715 ieee80211_unregister_hw(wl->hw);
3716
3717 b43legacy_one_core_detach(dev);
3718
3719 if (list_empty(&wl->devlist))
3720 /* Last core on the chip unregistered.
3721 * We can destroy common struct b43legacy_wl.
3722 */
3723 b43legacy_wireless_exit(dev, wl);
3724 }
3725
3726 /* Perform a hardware reset. This can be called from any context. */
3727 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3728 const char *reason)
3729 {
3730 /* Must avoid requeueing, if we are in shutdown. */
3731 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3732 return;
3733 b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3734 queue_work(dev->wl->hw->workqueue, &dev->restart_work);
3735 }
3736
3737 #ifdef CONFIG_PM
3738
3739 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3740 {
3741 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3742 struct b43legacy_wl *wl = wldev->wl;
3743
3744 b43legacydbg(wl, "Suspending...\n");
3745
3746 mutex_lock(&wl->mutex);
3747 wldev->suspend_init_status = b43legacy_status(wldev);
3748 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3749 b43legacy_wireless_core_stop(wldev);
3750 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3751 b43legacy_wireless_core_exit(wldev);
3752 mutex_unlock(&wl->mutex);
3753
3754 b43legacydbg(wl, "Device suspended.\n");
3755
3756 return 0;
3757 }
3758
3759 static int b43legacy_resume(struct ssb_device *dev)
3760 {
3761 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3762 struct b43legacy_wl *wl = wldev->wl;
3763 int err = 0;
3764
3765 b43legacydbg(wl, "Resuming...\n");
3766
3767 mutex_lock(&wl->mutex);
3768 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3769 err = b43legacy_wireless_core_init(wldev);
3770 if (err) {
3771 b43legacyerr(wl, "Resume failed at core init\n");
3772 goto out;
3773 }
3774 }
3775 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3776 err = b43legacy_wireless_core_start(wldev);
3777 if (err) {
3778 b43legacy_wireless_core_exit(wldev);
3779 b43legacyerr(wl, "Resume failed at core start\n");
3780 goto out;
3781 }
3782 }
3783 mutex_unlock(&wl->mutex);
3784
3785 b43legacydbg(wl, "Device resumed.\n");
3786 out:
3787 return err;
3788 }
3789
3790 #else /* CONFIG_PM */
3791 # define b43legacy_suspend NULL
3792 # define b43legacy_resume NULL
3793 #endif /* CONFIG_PM */
3794
3795 static struct ssb_driver b43legacy_ssb_driver = {
3796 .name = KBUILD_MODNAME,
3797 .id_table = b43legacy_ssb_tbl,
3798 .probe = b43legacy_probe,
3799 .remove = b43legacy_remove,
3800 .suspend = b43legacy_suspend,
3801 .resume = b43legacy_resume,
3802 };
3803
3804 static int __init b43legacy_init(void)
3805 {
3806 int err;
3807
3808 b43legacy_debugfs_init();
3809
3810 err = ssb_driver_register(&b43legacy_ssb_driver);
3811 if (err)
3812 goto err_dfs_exit;
3813
3814 return err;
3815
3816 err_dfs_exit:
3817 b43legacy_debugfs_exit();
3818 return err;
3819 }
3820
3821 static void __exit b43legacy_exit(void)
3822 {
3823 ssb_driver_unregister(&b43legacy_ssb_driver);
3824 b43legacy_debugfs_exit();
3825 }
3826
3827 module_init(b43legacy_init)
3828 module_exit(b43legacy_exit)
Linux kernel - Deliverables
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