drivers/net/wireless/brcm80211/brcmfmac/chip.h

   1 /*
   2  * Copyright (c) 2014 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16 #ifndef BRCMF_CHIP_H
  17 #define BRCMF_CHIP_H
  18
  19 #include <linux/types.h>
  20
  21 #define CORE_CC_REG(base, field) \
  22                 (base + offsetof(struct chipcregs, field))
  23
  24 /**
  25  * struct brcmf_chip - chip level information.
  26  *
  27  * @chip: chip identifier.
  28  * @chiprev: chip revision.
  29  * @cc_caps: chipcommon core capabilities.
  30  * @pmucaps: PMU capabilities.
  31  * @pmurev: PMU revision.
  32  * @rambase: RAM base address (only applicable for ARM CR4 chips).
  33  * @ramsize: amount of RAM on chip.
  34  * @name: string representation of the chip identifier.
  35  */
  36 struct brcmf_chip {
  37         u32 chip;
  38         u32 chiprev;
  39         u32 cc_caps;
  40         u32 pmucaps;
  41         u32 pmurev;
  42         u32 rambase;
  43         u32 ramsize;
  44         char name[8];
  45 };
  46
  47 /**
  48  * struct brcmf_core - core related information.
  49  *
  50  * @id: core identifier.
  51  * @rev: core revision.
  52  * @base: base address of core register space.
  53  */
  54 struct brcmf_core {
  55         u16 id;
  56         u16 rev;
  57         u32 base;
  58 };
  59
  60 /**
  61  * struct brcmf_buscore_ops - buscore specific callbacks.
  62  *
  63  * @read32: read 32-bit value over bus.
  64  * @write32: write 32-bit value over bus.
  65  * @prepare: prepare bus for core configuration.
  66  * @setup: bus-specific core setup.
  67  * @exit_dl: exit download state.
  68  *      The callback should use the provided @rstvec when non-zero.
  69  */
  70 struct brcmf_buscore_ops {
  71         u32 (*read32)(void *ctx, u32 addr);
  72         void (*write32)(void *ctx, u32 addr, u32 value);
  73         int (*prepare)(void *ctx);
  74         int (*setup)(void *ctx, struct brcmf_chip *chip);
  75         void (*exit_dl)(void *ctx, struct brcmf_chip *chip, u32 rstvec);
  76 };
  77
  78 struct brcmf_chip *brcmf_chip_attach(void *ctx,
  79                                      const struct brcmf_buscore_ops *ops);
  80 void brcmf_chip_detach(struct brcmf_chip *chip);
  81 struct brcmf_core *brcmf_chip_get_core(struct brcmf_chip *chip, u16 coreid);
  82 struct brcmf_core *brcmf_chip_get_chipcommon(struct brcmf_chip *chip);
  83 bool brcmf_chip_iscoreup(struct brcmf_core *core);
  84 void brcmf_chip_coredisable(struct brcmf_core *core, u32 prereset, u32 reset);
  85 void brcmf_chip_resetcore(struct brcmf_core *core, u32 prereset, u32 reset,
  86                           u32 postreset);
  87 void brcmf_chip_enter_download(struct brcmf_chip *ci);
  88 bool brcmf_chip_exit_download(struct brcmf_chip *ci, u32 rstvec);
  89 bool brcmf_chip_sr_capable(struct brcmf_chip *pub);
  90
  91 #endif /* BRCMF_AXIDMP_H */